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/linux/Documentation/devicetree/bindings/phy/
H A Dsamsung,exynos-pcie-phy.yaml28 samsung,fsys-sysreg:
30 description: phandle for FSYS sysreg interface, used to control
38 - samsung,fsys-sysreg
48 samsung,fsys-sysreg = <&syscon_fsys>;
/linux/Documentation/devicetree/bindings/interconnect/
H A Dsamsung,exynos-bus.yaml57 |--- FSYS
78 | | |FSYS | | | || |
104 |--- FSYS
122 |--- FSYS
143 |--- FSYS
158 |--- FSYS (Fixed clock rate)
/linux/arch/m68k/coldfire/
H A Dm53xx.c289 int clock_pll (int fsys, int flags);
470 int clock_pll(int fsys, int flags) in clock_pll() argument
477 if (fsys == 0) { in clock_pll()
485 if (fsys > MAX_FSYS) in clock_pll()
486 fsys = MAX_FSYS; in clock_pll()
487 if (fsys < MIN_FSYS) in clock_pll()
488 fsys = MIN_FSYS; in clock_pll()
494 temp = 100 * fsys / fref; in clock_pll()
518 /* Reprogram PLL for desired fsys */ in clock_pll()
/linux/drivers/mmc/host/
H A Dsdhci-esdhc-mcf.c224 u32 fvco, fsys, fesdhc, temp; in esdhc_mcf_pltfm_set_clock() local
237 * pll -+-> / outdiv1 --> fsys in esdhc_mcf_pltfm_set_clock()
245 * fvco = fsys * outdvi1 + 1 in esdhc_mcf_pltfm_set_clock()
249 fsys = pltfm_host->clock; in esdhc_mcf_pltfm_set_clock()
250 fvco = fsys * ((temp & 0x1f) + 1); in esdhc_mcf_pltfm_set_clock()
/linux/drivers/phy/samsung/
H A Dphy-exynos-pcie.c20 /* Sysreg FSYS register offsets and bits for Exynos5433 */
166 "samsung,fsys-sysreg"); in exynos_pcie_phy_probe()
168 dev_err(&pdev->dev, "FSYS sysreg regmap lookup failed.\n"); in exynos_pcie_phy_probe()
/linux/Documentation/devicetree/bindings/sound/
H A Dfsl,esai.yaml56 - const: fsys
112 clock-names = "core", "extal", "fsys";
/linux/Documentation/devicetree/bindings/clock/
H A Dsamsung,exynos5433-clock.yaml27 # IMEM/FSYS/G3D/GSCL/HEVC/MSCL/G2D/MFC/PERIC/PERIS domains and bus
40 - samsung,exynos5433-cmu-fsys
153 const: samsung,exynos5433-cmu-fsys
H A Dsamsung,exynos7885-clock.yaml36 - samsung,exynos7885-cmu-fsys
96 const: samsung,exynos7885-cmu-fsys
H A Dsamsung,exynos5260-clock.yaml58 - samsung,exynos5260-clock-fsys
243 const: samsung,exynos5260-clock-fsys
/linux/drivers/pinctrl/samsung/
H A Dpinctrl-exynos-arm64.c103 /* pin banks of exynos5433 pin-controller - FSYS */
154 /* PMU pin retention groups registers for Exynos5433 (without audio & fsys) */
188 /* PMU retention control for mmc pins can be tied to fsys pin bank */
461 /* pin banks of exynos7885 pin-controller 2 (FSYS) */
504 /* pin-controller instance 2 FSYS data */
874 /* pin banks of FSD pin-controller 0 (FSYS) */
/linux/drivers/clk/samsung/
H A Dclk-exynos7885.c230 /* FSYS */
288 /* FSYS */
330 /* FSYS */
829 .compatible = "samsung,exynos7885-cmu-fsys",
H A Dclk-exynos5420.c746 /* FSYS Block */
1036 /* FSYS Block */
/linux/Documentation/devicetree/bindings/soc/samsung/
H A Dsamsung,exynos-sysreg.yaml36 - samsung,exynos5433-fsys-sysreg
/linux/sound/soc/fsl/
H A Dfsl_esai.c253 * (Input from outside; output from inside, FSYS or EXTAL)
307 (clk_id % 2) ? "extal" : "fsys"); in fsl_esai_set_dai_sysclk()
996 esai_priv->fsysclk = devm_clk_get(&pdev->dev, "fsys"); in fsl_esai_probe()
998 dev_warn(&pdev->dev, "failed to get fsys clock: %ld\n", in fsl_esai_probe()
/linux/arch/arm64/boot/dts/exynos/
H A Dexynos7885.dtsi245 compatible = "samsung,exynos7885-cmu-fsys";
H A Dexynos5433.dtsi417 compatible = "samsung,exynos5433-cmu-fsys";
1136 compatible = "samsung,exynos5433-fsys-sysreg",
1960 samsung,fsys-sysreg = <&syscon_fsys>;
/linux/arch/arm/boot/dts/samsung/
H A Dexynos4210.dtsi104 bus_fsys: bus-fsys {
H A Dexynos5260.dtsi215 compatible = "samsung,exynos5260-clock-fsys";
H A Dexynos5420.dtsi51 bus_fsys: bus-fsys {
65 bus_fsys_apb: bus-fsys-apb {
H A Dexynos4x12.dtsi95 bus_fsys: bus-fsys {
H A Dexynos3250.dtsi79 bus_fsys: bus-fsys {
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8qm-ss-audio.dtsi144 clock-names = "core", "extal", "fsys", "spba";
H A Dimx8-ss-audio.dtsi175 clock-names = "core", "extal", "fsys", "spba";
/linux/drivers/spi/
H A Dspi-pxa2xx.c782 * Fsys = 200MHz
784 * Fssp = Fsys * DDS_CLK_RATE / 2^24 (1)
/linux/drivers/devfreq/event/
H A Dexynos-ppmu.c57 PPMU_EVENT(fsys),

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