| /linux/Documentation/trace/coresight/ |
| H A D | coresight-cpu-debug.rst | 12 (ARM DDI 0487A.k) Chapter 'Part H: External debug', the CPU can integrate
45 'ED' for register prefix (ARM DDI 0487A.k, chapter H9.1) and AArch32 uses
46 'DBG' as prefix (ARM DDI 0487A.k, chapter G5.1). The driver is unified to
49 - ARMv8-a (ARM DDI 0487A.k) and ARMv7-a (ARM DDI 0406C.b) have different
56 detailed description for offset is in ARMv7-a ARM (ARM DDI 0406C.b) chapter
70 have been enabled properly. In ARMv8-a ARM (ARM DDI 0487A.k) chapter 'H9.1
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| /linux/drivers/input/serio/ |
| H A D | hil_mlc.c | 255 mlc->di_map[mlc->ddi] = rc; in hilse_match()
256 mlc->serio_map[rc].di_revmap = mlc->ddi; in hilse_match()
262 mlc->di_map[mlc->ddi] = rc; in hilse_match()
266 mlc->serio_map[rc].di_revmap = mlc->ddi; in hilse_match()
306 mlc->ddi = val; in hilse_set_ddi()
314 mlc->ddi--; in hilse_dec_ddi()
315 if (mlc->ddi <= -1) { in hilse_dec_ddi()
316 mlc->ddi = -1; in hilse_dec_ddi()
320 hil_mlc_clear_di_map(mlc, mlc->ddi + 1); in hilse_dec_ddi()
327 BUG_ON(mlc->ddi >= 6); in hilse_inc_ddi()
[all …]
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| /linux/Documentation/devicetree/bindings/display/panel/ |
| H A D | jdi,lpm102a188a.yaml | 37 ddi-supply:
56 - ddi-supply
88 ddi-supply = <&pp1800_lcdio>;
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| /linux/lib/tests/ |
| H A D | longest_symbol_kunit.c | 17 #define DDI(name) DI(n##name##name) macro
18 #define DDDI(name) DDI(n##name##name)
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| /linux/tools/perf/arch/arm64/util/ |
| H A D | tsc.c | 12 * According to ARM DDI 0487F.c, from Armv8.0 to Armv8.5 inclusive, the in rdtsc()
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| /linux/Documentation/translations/zh_CN/arch/arm64/ |
| H A D | hugetlbpage.rst | 29 架构中转换页表条目(D4.5.3, ARM DDI 0487C.a)中提供一个连续
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| H A D | booting.txt | 175 ARM DDI 0487A
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| /linux/Documentation/translations/zh_TW/arch/arm64/ |
| H A D | hugetlbpage.rst | 32 架構中轉換頁表條目(D4.5.3, ARM DDI 0487C.a)中提供一個連續
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| H A D | booting.txt | 179 ARM DDI 0487A
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| /linux/tools/testing/selftests/arm64/signal/ |
| H A D | sve_helpers.c | 39 * See the ARM ARM, DDI 0487K.a, B1.4.2: I_QQRNR and I_NWYBP. in sve_fill_vls()
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| /linux/Documentation/arch/arm64/ |
| H A D | hugetlbpage.rst | 27 (D4.5.3, ARM DDI 0487C.a) that hints to the MMU to indicate that it is one of a
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| /linux/Documentation/devicetree/bindings/arm/ |
| H A D | arm,coresight-cpu-debug.yaml | 17 reference manual (ARM DDI 0487A.k) Chapter 'Part H: External debug'. The
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| /linux/include/linux/amba/ |
| H A D | kmi.h | 11 * Reference Manual - ARM DDI 0143B - see http://www.arm.com/
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| H A D | pl08x.h | 11 * Documentation: ARM DDI 0196D
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| /linux/include/linux/ |
| H A D | hil_mlc.h | 150 int ddi; /* Last operational device id */ member
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| /linux/arch/arm64/mm/ |
| H A D | hugetlbpage.c | 144 * before we can change any entries. See ARM DDI 0487A.k_iss10775,
191 * before we can change any entries. See ARM DDI 0487A.k_iss10775,
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| /linux/tools/perf/util/arm-spe-decoder/ |
| H A D | arm-spe-decoder.c | 50 * Armv8 ARM (ARM DDI 0487F.c), chapter "D10.2.1 Address packet" in arm_spe_calc_ip()
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| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_bios.c | 2365 * Each DDI port can have more than one value on the "DVO Port" field, in dvo_port_to_port()
2381 * map to DDI A,B,TC1,TC2 respectively. in dvo_port_to_port()
2592 * DDI allocation for TC capable ports only make sense for PHYs in the in sanitize_dedicated_external()
2597 …"VBT claims Port %c supports dynamic DDI allocation in TCSS, but the port is dedicated external, i… in sanitize_dedicated_external()
2690 /* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */
2774 "Port %c supports dynamic DDI allocation in TCSS\n", in print_ddi_port()
3687 * map to DDI A,TC1,TC2,TC3,TC4 respectively.
3699 * map to DDI A,B,TC1,TC2 respectively.
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| H A D | vlv_dpio_phy_regs.h | 70 * Per DDI channel DPIO regs
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| /linux/include/drm/intel/ |
| H A D | i915_hdcp_interface.h | 80 * @hdcp_ddi: ddi index as per ME/GSC FW
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| /linux/drivers/perf/ |
| H A D | arm_brbe.c | 268 * Arm ARM (DDI 0487K.a) D.18.4 rule PPBZP requires explicit sync in select_brbe_bank()
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| H A D | arm_spe_pmu.c | 397 * According to the Arm ARM (DDI 0487 L.a), section D24.7.12 PMSIRR_EL1, in arm_spe_event_sanitise_period()
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| /linux/arch/arm64/include/asm/ |
| H A D | tlbflush.h | 210 * holds addr[52:16]. Else BADDR holds page number. See for example ARM DDI
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| H A D | sysreg.h | 22 * C5.2, version:ARM DDI 0487A.f)
85 * barriers and CLREX, and PSTATE access", ARM DDI 0487 C.a, system instructions
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| /linux/tools/perf/util/ |
| H A D | cs-etm.c | 2194 * The SVC of T32 is defined in ARM DDI 0487D.a, F5.1.247: in cs_etm__is_sync_exception()
2214 * The SVC of A32 is defined in ARM DDI 0487D.a, F5.1.247: in cs_etm__set_sample_flags()
2231 * The SVC of A64 is defined in ARM DDI 0487D.a, C6.2.294: in cs_etm__set_sample_flags()
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