Home
last modified time | relevance | path

Searched full:clk_top_xfi_phy_0_xtal_sel (Results 1 – 3 of 3) sorted by relevance

/linux/Documentation/devicetree/bindings/phy/
H A Dmediatek,mt7988-xfi-tphy.yaml72 <&topckgen CLK_TOP_XFI_PHY_0_XTAL_SEL>;
/linux/include/dt-bindings/clock/
H A Dmediatek,mt7988-clk.h99 #define CLK_TOP_XFI_PHY_0_XTAL_SEL 71 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt7988-topckgen.c199 MUX_GATE_CLR_SET_UPD(CLK_TOP_XFI_PHY_0_XTAL_SEL, "xfi_phy_0_xtal_sel", sspxtp_parents,