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Searched full:clk_top_ether_125m_sel (Results 1 – 4 of 4) sorted by relevance

/linux/Documentation/devicetree/bindings/net/
H A Dmediatek-dwmac.yaml168 <&topckgen CLK_TOP_ETHER_125M_SEL>,
171 assigned-clocks = <&topckgen CLK_TOP_ETHER_125M_SEL>,
/linux/include/dt-bindings/clock/
H A Dmt2712-clk.h185 #define CLK_TOP_ETHER_125M_SEL 154 macro
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt2712e.dtsi743 <&topckgen CLK_TOP_ETHER_125M_SEL>,
746 assigned-clocks = <&topckgen CLK_TOP_ETHER_125M_SEL>,
/linux/drivers/clk/mediatek/
H A Dclk-mt2712.c731 MUX_GATE(CLK_TOP_ETHER_125M_SEL, "ether_125m_sel", ether_125m_parents,