| /linux/drivers/gpu/drm/i915/gt/ |
| H A D | intel_context.h | 22 #define CE_TRACE(ce, fmt, ...) do { \ argument 23 const struct intel_context *ce__ = (ce); \ 33 void intel_context_init(struct intel_context *ce, 35 void intel_context_fini(struct intel_context *ce); 43 int intel_context_alloc_state(struct intel_context *ce); 45 void intel_context_free(struct intel_context *ce); 47 int intel_context_reconfigure_sseu(struct intel_context *ce, 52 static inline bool intel_context_is_child(struct intel_context *ce) in intel_context_is_child() argument 54 return !!ce->parallel.parent; in intel_context_is_child() 57 static inline bool intel_context_is_parent(struct intel_context *ce) in intel_context_is_parent() argument [all …]
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| H A D | intel_context.c | 27 struct intel_context *ce = container_of(rcu, typeof(*ce), rcu); in rcu_context_free() local 29 trace_intel_context_free(ce); in rcu_context_free() 30 if (intel_context_has_own_state(ce)) in rcu_context_free() 31 fput(ce->default_state); in rcu_context_free() 32 kmem_cache_free(slab_ce, ce); in rcu_context_free() 35 void intel_context_free(struct intel_context *ce) in intel_context_free() argument 37 call_rcu(&ce->rcu, rcu_context_free); in intel_context_free() 43 struct intel_context *ce; in intel_context_create() local 45 ce = intel_context_alloc(); in intel_context_create() 46 if (!ce) in intel_context_create() [all …]
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| H A D | intel_lrc.h | 36 int lrc_alloc(struct intel_context *ce, 38 void lrc_reset(struct intel_context *ce); 39 void lrc_fini(struct intel_context *ce); 43 lrc_pre_pin(struct intel_context *ce, 48 lrc_pin(struct intel_context *ce, 51 void lrc_unpin(struct intel_context *ce); 52 void lrc_post_unpin(struct intel_context *ce); 54 void lrc_init_state(struct intel_context *ce, 58 void lrc_init_regs(const struct intel_context *ce, 61 void lrc_reset_regs(const struct intel_context *ce, [all …]
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| H A D | selftest_mocs.c | 26 struct intel_context *ce; in mocs_context_create() local 28 ce = intel_context_create(engine); in mocs_context_create() 29 if (IS_ERR(ce)) in mocs_context_create() 30 return ce; in mocs_context_create() 33 ce->ring_size = SZ_16K; in mocs_context_create() 35 return ce; in mocs_context_create() 218 struct intel_context *ce) in check_mocs_engine() argument 228 rq = intel_context_create_request(ce); in check_mocs_engine() 238 if (!err && ce->engine->class == RENDER_CLASS) in check_mocs_engine() 250 err = check_mocs_table(ce->engine, arg->mocs, &vaddr); in check_mocs_engine() [all …]
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| H A D | intel_breadcrumbs.c | 88 struct intel_context *ce) in add_signaling_context() argument 90 lockdep_assert_held(&ce->signal_lock); in add_signaling_context() 93 list_add_rcu(&ce->signal_link, &b->signalers); in add_signaling_context() 98 struct intel_context *ce) in remove_signaling_context() argument 100 lockdep_assert_held(&ce->signal_lock); in remove_signaling_context() 102 if (!list_empty(&ce->signals)) in remove_signaling_context() 106 list_del_rcu(&ce->signal_link); in remove_signaling_context() 113 check_signal_order(struct intel_context *ce, struct i915_request *rq) in check_signal_order() argument 115 if (rq->context != ce) in check_signal_order() 118 if (!list_is_last(&rq->signal_link, &ce->signals) && in check_signal_order() [all …]
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| H A D | intel_context_sseu.c | 17 const struct intel_context *ce, in gen8_emit_rpcs_config() argument 27 offset = i915_ggtt_offset(ce->state) + in gen8_emit_rpcs_config() 41 gen8_modify_rpcs(struct intel_context *ce, const struct intel_sseu sseu) in gen8_modify_rpcs() argument 46 lockdep_assert_held(&ce->pin_mutex); in gen8_modify_rpcs() 54 if (!intel_context_pin_if_active(ce)) in gen8_modify_rpcs() 57 rq = intel_engine_create_kernel_request(ce->engine); in gen8_modify_rpcs() 64 ret = intel_context_prepare_remote_request(ce, rq); in gen8_modify_rpcs() 66 ret = gen8_emit_rpcs_config(rq, ce, sseu); in gen8_modify_rpcs() 70 intel_context_unpin(ce); in gen8_modify_rpcs() 75 intel_context_reconfigure_sseu(struct intel_context *ce, in intel_context_reconfigure_sseu() argument [all …]
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| H A D | intel_engine_pm.c | 35 static void dbg_poison_ce(struct intel_context *ce) in dbg_poison_ce() argument 40 if (ce->state) { in dbg_poison_ce() 41 struct drm_i915_gem_object *obj = ce->state->obj; in dbg_poison_ce() 42 int type = intel_gt_coherent_map_type(ce->engine->gt, obj, true); in dbg_poison_ce() 62 struct intel_context *ce; in __engine_unpark() local 69 ce = engine->kernel_context; in __engine_unpark() 70 if (ce) { in __engine_unpark() 71 GEM_BUG_ON(test_bit(CONTEXT_VALID_BIT, &ce->flags)); in __engine_unpark() 74 while (unlikely(intel_context_inflight(ce))) in __engine_unpark() 78 dbg_poison_ce(ce); in __engine_unpark() [all …]
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| H A D | mock_engine.c | 139 static void mock_context_unpin(struct intel_context *ce) in mock_context_unpin() argument 143 static void mock_context_post_unpin(struct intel_context *ce) in mock_context_post_unpin() argument 145 i915_vma_unpin(ce->ring->vma); in mock_context_post_unpin() 150 struct intel_context *ce = container_of(ref, typeof(*ce), ref); in mock_context_destroy() local 152 GEM_BUG_ON(intel_context_is_pinned(ce)); in mock_context_destroy() 154 if (test_bit(CONTEXT_ALLOC_BIT, &ce->flags)) { in mock_context_destroy() 155 mock_ring_free(ce->ring); in mock_context_destroy() 156 mock_timeline_unpin(ce->timeline); in mock_context_destroy() 159 intel_context_fini(ce); in mock_context_destroy() 160 intel_context_free(ce); in mock_context_destroy() [all …]
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| /linux/drivers/gpu/drm/i915/gt/uc/ |
| H A D | intel_guc_submission.c | 112 * ce->guc_state.lock 113 * Protects everything under ce->guc_state. Ensures that a context is in the 121 * sched_engine->lock -> ce->guc_state.lock 122 * guc->submission_state.lock -> ce->guc_state.lock 181 static inline void init_sched_state(struct intel_context *ce) in init_sched_state() argument 183 lockdep_assert_held(&ce->guc_state.lock); in init_sched_state() 184 ce->guc_state.sched_state &= SCHED_STATE_BLOCKED_MASK; in init_sched_state() 198 static bool sched_state_is_init(struct intel_context *ce) in sched_state_is_init() argument 200 return !(ce->guc_state.sched_state & ~SCHED_STATE_VALID_INIT); in sched_state_is_init() 204 context_wait_for_deregister_to_register(struct intel_context *ce) in context_wait_for_deregister_to_register() argument [all …]
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| H A D | selftest_guc.c | 23 static struct i915_request *nop_user_request(struct intel_context *ce, in nop_user_request() argument 29 rq = intel_context_create_request(ce); in nop_user_request() 57 struct intel_context *ce; in intel_guc_scrub_ctbs() local 67 ce = intel_context_create(engine); in intel_guc_scrub_ctbs() 68 if (IS_ERR(ce)) { in intel_guc_scrub_ctbs() 69 ret = PTR_ERR(ce); in intel_guc_scrub_ctbs() 70 gt_err(gt, "Failed to create context %d: %pe\n", i, ce); in intel_guc_scrub_ctbs() 76 ce->drop_schedule_enable = true; in intel_guc_scrub_ctbs() 79 ce->drop_schedule_disable = true; in intel_guc_scrub_ctbs() 82 ce->drop_deregister = true; in intel_guc_scrub_ctbs() [all …]
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| /linux/fs/smb/client/ |
| H A D | dfs_cache.c | 108 static inline bool cache_entry_expired(const struct cache_entry *ce) in cache_entry_expired() argument 113 return timespec64_compare(&ts, &ce->etime) >= 0; in cache_entry_expired() 116 static inline void free_tgts(struct cache_entry *ce) in free_tgts() argument 120 list_for_each_entry_safe(t, n, &ce->tlist, list) { in free_tgts() 127 static inline void flush_cache_ent(struct cache_entry *ce) in flush_cache_ent() argument 129 cifs_dbg(FYI, "%s: %s\n", __func__, ce->path); in flush_cache_ent() 130 hlist_del_init(&ce->hlist); in flush_cache_ent() 131 kfree(ce->path); in flush_cache_ent() 132 free_tgts(ce); in flush_cache_ent() 134 kmem_cache_free(cache_slab, ce); in flush_cache_ent() [all …]
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| /linux/drivers/clocksource/ |
| H A D | timer-sun5i.c | 58 static void sun5i_clkevt_sync(struct sun5i_timer *ce) in sun5i_clkevt_sync() argument 60 u32 old = readl(ce->base + TIMER_CNTVAL_LO_REG(1)); in sun5i_clkevt_sync() 62 while ((old - readl(ce->base + TIMER_CNTVAL_LO_REG(1))) < TIMER_SYNC_TICKS) in sun5i_clkevt_sync() 66 static void sun5i_clkevt_time_stop(struct sun5i_timer *ce, u8 timer) in sun5i_clkevt_time_stop() argument 68 u32 val = readl(ce->base + TIMER_CTL_REG(timer)); in sun5i_clkevt_time_stop() 69 writel(val & ~TIMER_CTL_ENABLE, ce->base + TIMER_CTL_REG(timer)); in sun5i_clkevt_time_stop() 71 sun5i_clkevt_sync(ce); in sun5i_clkevt_time_stop() 74 static void sun5i_clkevt_time_setup(struct sun5i_timer *ce, u8 timer, u32 delay) in sun5i_clkevt_time_setup() argument 76 writel(delay, ce->base + TIMER_INTVAL_LO_REG(timer)); in sun5i_clkevt_time_setup() 79 static void sun5i_clkevt_time_start(struct sun5i_timer *ce, u8 timer, bool periodic) in sun5i_clkevt_time_start() argument [all …]
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| H A D | mps2-timer.c | 54 static int mps2_timer_shutdown(struct clock_event_device *ce) in mps2_timer_shutdown() argument 56 clockevent_mps2_writel(0, ce, TIMER_RELOAD); in mps2_timer_shutdown() 57 clockevent_mps2_writel(0, ce, TIMER_CTRL); in mps2_timer_shutdown() 62 static int mps2_timer_set_next_event(unsigned long next, struct clock_event_device *ce) in mps2_timer_set_next_event() argument 64 clockevent_mps2_writel(next, ce, TIMER_VALUE); in mps2_timer_set_next_event() 65 clockevent_mps2_writel(TIMER_CTRL_IE | TIMER_CTRL_ENABLE, ce, TIMER_CTRL); in mps2_timer_set_next_event() 70 static int mps2_timer_set_periodic(struct clock_event_device *ce) in mps2_timer_set_periodic() argument 72 u32 clock_count_per_tick = to_mps2_clkevt(ce)->clock_count_per_tick; in mps2_timer_set_periodic() 74 clockevent_mps2_writel(clock_count_per_tick, ce, TIMER_RELOAD); in mps2_timer_set_periodic() 75 clockevent_mps2_writel(clock_count_per_tick, ce, TIMER_VALUE); in mps2_timer_set_periodic() [all …]
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| H A D | timer-digicolor.c | 58 struct clock_event_device ce; member 64 static struct digicolor_timer *dc_timer(struct clock_event_device *ce) in dc_timer() argument 66 return container_of(ce, struct digicolor_timer, ce); in dc_timer() 69 static inline void dc_timer_disable(struct clock_event_device *ce) in dc_timer_disable() argument 71 struct digicolor_timer *dt = dc_timer(ce); in dc_timer_disable() 75 static inline void dc_timer_enable(struct clock_event_device *ce, u32 mode) in dc_timer_enable() argument 77 struct digicolor_timer *dt = dc_timer(ce); in dc_timer_enable() 81 static inline void dc_timer_set_count(struct clock_event_device *ce, in dc_timer_set_count() argument 84 struct digicolor_timer *dt = dc_timer(ce); in dc_timer_set_count() 88 static int digicolor_clkevt_shutdown(struct clock_event_device *ce) in digicolor_clkevt_shutdown() argument [all …]
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| H A D | timer-rockchip.c | 43 struct clock_event_device ce; member 50 static inline struct rk_timer *rk_timer(struct clock_event_device *ce) in rk_timer() argument 52 return &container_of(ce, struct rk_clkevt, ce)->timer; in rk_timer() 78 struct clock_event_device *ce) in rk_timer_set_next_event() argument 80 struct rk_timer *timer = rk_timer(ce); in rk_timer_set_next_event() 89 static int rk_timer_shutdown(struct clock_event_device *ce) in rk_timer_shutdown() argument 91 struct rk_timer *timer = rk_timer(ce); in rk_timer_shutdown() 97 static int rk_timer_set_periodic(struct clock_event_device *ce) in rk_timer_set_periodic() argument 99 struct rk_timer *timer = rk_timer(ce); in rk_timer_set_periodic() 109 struct clock_event_device *ce = dev_id; in rk_timer_interrupt() local [all …]
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| /linux/drivers/crypto/gemini/ |
| H A D | sl3516-ce-rng.c | 3 * sl3516-ce-rng.c - hardware cryptographic offloader for SL3516 SoC. 9 #include "sl3516-ce.h" 15 struct sl3516_ce_dev *ce; in sl3516_ce_rng_read() local 20 ce = container_of(rng, struct sl3516_ce_dev, trng); in sl3516_ce_rng_read() 23 ce->hwrng_stat_req++; in sl3516_ce_rng_read() 24 ce->hwrng_stat_bytes += max; in sl3516_ce_rng_read() 27 err = pm_runtime_get_sync(ce->dev); in sl3516_ce_rng_read() 29 pm_runtime_put_noidle(ce->dev); in sl3516_ce_rng_read() 34 *data = readl(ce->base + IPSEC_RAND_NUM_REG); in sl3516_ce_rng_read() 39 pm_runtime_put(ce->dev); in sl3516_ce_rng_read() [all …]
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| H A D | sl3516-ce-cipher.c | 3 * sl3516-ce-cipher.c - hardware cryptographic offloader for Storlink SL3516 SoC 22 #include "sl3516-ce.h" 24 /* sl3516_ce_need_fallback - check if a request can be handled by the CE */ 29 struct sl3516_ce_dev *ce = op->ce; in sl3516_ce_need_fallback() local 35 ce->fallback_mod16++; in sl3516_ce_need_fallback() 44 ce->fallback_sg_count_tx++; in sl3516_ce_need_fallback() 49 ce->fallback_sg_count_rx++; in sl3516_ce_need_fallback() 56 ce->fallback_mod16++; in sl3516_ce_need_fallback() 60 ce->fallback_mod16++; in sl3516_ce_need_fallback() 64 ce->fallback_align16++; in sl3516_ce_need_fallback() [all …]
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| /linux/drivers/base/power/ |
| H A D | clock_ops.c | 145 * @ce: PM clock entry corresponding to the clock. 147 static inline void __pm_clk_enable(struct device *dev, struct pm_clock_entry *ce) in __pm_clk_enable() argument 151 switch (ce->status) { in __pm_clk_enable() 153 ret = clk_prepare_enable(ce->clk); in __pm_clk_enable() 156 ret = clk_enable(ce->clk); in __pm_clk_enable() 162 ce->status = PCE_STATUS_ENABLED; in __pm_clk_enable() 165 __func__, ce->clk, ret); in __pm_clk_enable() 171 * @ce: PM clock entry corresponding to the clock. 173 static void pm_clk_acquire(struct device *dev, struct pm_clock_entry *ce) in pm_clk_acquire() argument 175 if (!ce->clk) in pm_clk_acquire() [all …]
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| /linux/drivers/gpu/drm/i915/selftests/ |
| H A D | i915_request.c | 210 struct intel_context *ce; in igt_request_rewind() local 219 ce = i915_gem_context_get_engine(ctx[0], RCS0); in igt_request_rewind() 220 GEM_BUG_ON(IS_ERR(ce)); in igt_request_rewind() 221 request = mock_request(ce, 2 * HZ); in igt_request_rewind() 222 intel_context_put(ce); in igt_request_rewind() 237 ce = i915_gem_context_get_engine(ctx[1], RCS0); in igt_request_rewind() 238 GEM_BUG_ON(IS_ERR(ce)); in igt_request_rewind() 239 vip = mock_request(ce, 0); in igt_request_rewind() 240 intel_context_put(ce); in igt_request_rewind() 288 struct i915_request *(*request_alloc)(struct intel_context *ce); [all …]
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| /linux/arch/sparc/kernel/ |
| H A D | time_32.c | 120 struct clock_event_device *ce = &timer_ce; in setup_timer_ce() local 124 ce->name = "timer_ce"; in setup_timer_ce() 125 ce->rating = 100; in setup_timer_ce() 126 ce->features = CLOCK_EVT_FEAT_PERIODIC; in setup_timer_ce() 127 ce->set_state_shutdown = timer_ce_shutdown; in setup_timer_ce() 128 ce->set_state_periodic = timer_ce_set_periodic; in setup_timer_ce() 129 ce->tick_resume = timer_ce_set_periodic; in setup_timer_ce() 130 ce->cpumask = cpu_possible_mask; in setup_timer_ce() 131 ce->shift = 32; in setup_timer_ce() 132 ce->mult = div_sc(sparc_config.clock_rate, NSEC_PER_SEC, in setup_timer_ce() [all …]
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| /linux/drivers/gpu/drm/i915/ |
| H A D | i915_trace.h | 399 TP_PROTO(struct intel_context *ce), 400 TP_ARGS(ce), 410 __entry->guc_id = ce->guc_id.id; 411 __entry->pin_count = atomic_read(&ce->pin_count); 412 __entry->sched_state = ce->guc_state.sched_state; 413 __entry->guc_prio = ce->guc_state.prio; 423 TP_PROTO(struct intel_context *ce), 424 TP_ARGS(ce) 428 TP_PROTO(struct intel_context *ce), 429 TP_ARGS(ce) [all …]
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| /linux/drivers/of/ |
| H A D | dynamic.c | 522 static void __of_changeset_entry_destroy(struct of_changeset_entry *ce) in __of_changeset_entry_destroy() argument 524 if (ce->action == OF_RECONFIG_ATTACH_NODE && in __of_changeset_entry_destroy() 525 of_node_check_flag(ce->np, OF_OVERLAY)) { in __of_changeset_entry_destroy() 526 if (kref_read(&ce->np->kobj.kref) > 1) { in __of_changeset_entry_destroy() 528 kref_read(&ce->np->kobj.kref), ce->np); in __of_changeset_entry_destroy() 530 of_node_set_flag(ce->np, OF_OVERLAY_FREE_CSET); in __of_changeset_entry_destroy() 534 of_node_put(ce->np); in __of_changeset_entry_destroy() 535 list_del(&ce->node); in __of_changeset_entry_destroy() 536 kfree(ce); in __of_changeset_entry_destroy() 539 static void __of_changeset_entry_invert(const struct of_changeset_entry *ce, in __of_changeset_entry_invert() argument [all …]
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| /linux/drivers/gpu/drm/i915/gem/selftests/ |
| H A D | i915_gem_context.c | 186 struct intel_context *ce[2]; member 203 for (n = 0; !arg->result && n < ARRAY_SIZE(arg->ce); n++) { in __live_parallel_switch1() 206 rq = i915_request_create(arg->ce[n]); in __live_parallel_switch1() 236 arg->ce[0]->engine->name, count, arg->result); in __live_parallel_switch1() 251 for (n = 0; !arg->result && n < ARRAY_SIZE(arg->ce); n++) { in __live_parallel_switchN() 254 rq = i915_request_create(arg->ce[n]); in __live_parallel_switchN() 279 arg->ce[0]->engine->name, count, arg->result); in __live_parallel_switchN() 295 struct intel_context *ce; in live_parallel_switch() local 328 for_each_gem_engine(ce, engines, it) { in live_parallel_switch() 329 err = intel_context_pin(ce); in live_parallel_switch() [all …]
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| /linux/drivers/crypto/allwinner/sun8i-ce/ |
| H A D | Makefile | 1 obj-$(CONFIG_CRYPTO_DEV_SUN8I_CE) += sun8i-ce.o 2 sun8i-ce-y += sun8i-ce-core.o sun8i-ce-cipher.o 3 sun8i-ce-$(CONFIG_CRYPTO_DEV_SUN8I_CE_HASH) += sun8i-ce-hash.o 4 sun8i-ce-$(CONFIG_CRYPTO_DEV_SUN8I_CE_PRNG) += sun8i-ce-prng.o 5 sun8i-ce-$(CONFIG_CRYPTO_DEV_SUN8I_CE_TRNG) += sun8i-ce-trng.o
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| /linux/drivers/net/wireless/ath/ath10k/ |
| H A D | ce.c | 12 #include "ce.h" 21 * A single CopyEngine (CE) comprises two "rings": 77 ath10k_warn(ar, "invalid CE id: %d", ce_id); in shadow_sr_wr_ind_addr() 92 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_read32() local 94 return ce->bus_ops->read32(ar, offset); in ath10k_ce_read32() 99 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_write32() local 101 ce->bus_ops->write32(ar, offset, value); in ath10k_ce_write32() 137 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_src_ring_read_index_from_ddr() local 139 return ce->vaddr_rri[ce_id] & CE_DDR_RRI_MASK; in ath10k_ce_src_ring_read_index_from_ddr() 145 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_src_ring_read_index_get() local [all …]
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