| /linux/arch/sh/lib/ |
| H A D | udivsi3_i4i.S | 1 /* SPDX-License-Identifier: GPL-2.0+ WITH GCC-exception-2.0 23 Uses a lookup table for divisors in the range -128 .. +128, and 54 mov.l r4,@-r15 56 mov.l r1,@-r15 67 mov.l r4,@-r15 70 mov.l r5,@-r15 108 mov.l r4,@-r15 110 mov.l r1,@-r15 117 mov.l r1,@-r15 132 mov.l r4,@-r15 [all …]
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| /linux/arch/sparc/lib/ |
| H A D | M7memset.S | 15 * Fast assembler language version of the following C-program for memset 16 * which represents the `standard' for the C-library. 25 * } while (--n != 0); 34 * For less than 32 bytes stores, align the address on 4 byte boundary. 35 * Then store as many 4-byte chunks, followed by trailing bytes. 37 * For sizes greater than 32 bytes, align the address on 8 byte boundary. 38 * if (count >= 64) { 39 * store 8-bytes chunks to align the address on 64 byte boundary 42 * 64-byte cache line to zero which will also clear the 47 * ST_CHUNK cache lines (64 bytes each) before the main [all …]
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| /linux/arch/mips/include/asm/octeon/ |
| H A D | cvmx-fau.h | 7 * Copyright (c) 2003-2008 Cavium Networks 14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty 21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 124 * - Step by 2 for 16 bit access. 125 * - Step by 4 for 32 bit access. 126 * - Step by 8 for 64 bit access. 141 * - 0 = Don't wait 142 * - 1 = Wait for tag switch to complete 144 * - Step by 2 for 16 bit access. 145 * - Step by 4 for 32 bit access. [all …]
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| H A D | cvmx-scratch.h | 7 * Copyright (c) 2003-2008 Cavium Networks 14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty 21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 31 * Scratch memory is byte addressable - all addresses are byte addresses. 40 * compile without warnings for both 32bit and 64bit. 42 #define CVMX_SCRATCH_BASE (-32768l) /* 0xffffffffffff8000 */ 47 * @address: byte address to read from 59 * @address: byte address to read from 71 * @address: byte address to read from 81 * Reads a 64 bit value from the processor local scratchpad memory. [all …]
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| /linux/drivers/net/ethernet/aquantia/atlantic/macsec/ |
| H A D | macsec_struct.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 21 /*! The match mask is per-nibble. 0 means don't care, i.e. every value 22 * will match successfully. The total data is 64 bit, i.e. 16 nibbles 52 /*! The 8 bit value used to compare with extracted value for byte 3. */ 54 /*! The 8 bit value used to compare with extracted value for byte 2. */ 56 /*! The 8 bit value used to compare with extracted value for byte 1. */ 58 /*! The 8 bit value used to compare with extracted value for byte 0. */ 62 /*! The 64 bit SCI field in the SecTAG. */ 82 /*! 0~63: byte location used extracted by packets comparator, which 83 * can be anything from the first 64 bytes of the MAC packets. [all …]
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| /linux/lib/crypto/x86/ |
| H A D | blake2s-core.S | 1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */ 3 * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved. 4 * Copyright (C) 2017-2019 Samuel Neves <sneves@dei.uc.pt>. All Rights Reserved. 26 .align 64 28 .byte 0, 2, 4, 6, 1, 3, 5, 7, 14, 8, 10, 12, 15, 9, 11, 13 29 .byte 14, 4, 9, 13, 10, 8, 15, 6, 5, 1, 0, 11, 3, 12, 2, 7 30 .byte 11, 12, 5, 15, 8, 0, 2, 13, 9, 10, 3, 7, 4, 14, 6, 1 31 .byte 7, 3, 13, 11, 9, 1, 12, 14, 15, 2, 5, 4, 8, 6, 10, 0 32 .byte 9, 5, 2, 10, 0, 7, 4, 15, 3, 14, 11, 6, 13, 1, 12, 8 33 .byte 2, 6, 0, 8, 12, 10, 11, 3, 1, 4, 7, 15, 9, 13, 5, 14 [all …]
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| /linux/tools/lib/bpf/ |
| H A D | bpf_endian.h | 1 /* SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause) */ 6 * Isolate byte #n and put it into byte #m, for __u##b type. 7 * E.g., moving byte #6 (nnnnnnnn) into byte #1 (mmmmmmmm) for __u64: 13 #define ___bpf_mvb(x, b, n, m) ((__u##b)(x) << (b-(n+1)*8) >> (b-8) << (m*8)) 26 ___bpf_mvb(x, 64, 0, 7) | \ 27 ___bpf_mvb(x, 64, 1, 6) | \ 28 ___bpf_mvb(x, 64, 2, 5) | \ 29 ___bpf_mvb(x, 64, 3, 4) | \ 30 ___bpf_mvb(x, 64, 4, 3) | \ 31 ___bpf_mvb(x, 64, 5, 2) | \ [all …]
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| /linux/Documentation/bpf/standardization/ |
| H A D | instruction-set.rst | 27 BCP 14 `<https://www.rfc-editor.org/info/rfc2119>`_ 28 `<https://www.rfc-editor.org/info/rfc8174>`_ 38 ----- 51 .. table:: Meaning of bit-width notation 59 64 64 bits 63 For example, `u32` is a type whose valid values are all the 32-bit unsigned 64 numbers and `s16` is a type whose valid values are all the 16-bit signed 68 --------- 70 The following byteswap functions are direction-agnostic. That is, 74 * be16: Takes an unsigned 16-bit number and converts it between [all …]
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| /linux/Documentation/arch/sparc/oradax/ |
| H A D | dax-hv-api.txt | 3 Publication date 2017-09-25 08:21 5 Extracted via "pdftotext -f 547 -l 572 -layout sun4v_20170925.pdf" 16 live-migration and other system management activities. 20 …high speed processoring of database-centric operations. The coprocessors may support one or more of 28 …e Completion Area and, unless execution order is specifically restricted through the use of serial- 45 …device node in the guest MD (Section 8.24.17, “Database Analytics Accelerators (DAX) virtual-device 51 36.1.1.1. "ORCL,sun4v-dax" Device Compatibility 54 • No-op/Sync 81 36.1.1.2. "ORCL,sun4v-dax-fc" Device Compatibility 82 … "ORCL,sun4v-dax-fc" is compatible with the "ORCL,sun4v-dax" interface, and includes additional CCB [all …]
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| /linux/arch/parisc/kernel/vdso64/ |
| H A D | sigtramp.S | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * Signal trampolines for 64 bit processes. 6 * Copyright (C) 2018-2022 Helge Deller <deller@gmx.de> 11 #include <generated/asm-offsets.h> 16 a 64-byte boundary by 0, 4 or 5 instructions. Since the vdso trampoline 25 .align 64 43 .Lsigrt_start = . - 4 56 .size __kernel_sigtramp_rt,.-__kernel_sigtramp_rt 61 #define PTREGS SIGFRAME_CONTEXT_REGS /* 64-bit process offset is -720 */ 65 .byte 0x05 /* DW_CFA_offset_extended */ [all …]
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| /linux/tools/perf/pmu-events/arch/x86/skylakex/ |
| H A D | uncore-io.json | 44 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-3", 147 "BriefDescription": "PCIe Completion Buffer occupancy of completions with data: Part 0-3", 257 …of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 0", 270 …of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 1", 335 …of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 0", 348 …of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 1", 413 …of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 0", 426 …of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 1", 491 …of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 0", 504 …of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 1", [all …]
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| /linux/tools/perf/pmu-events/arch/x86/cascadelakex/ |
| H A D | uncore-io.json | 44 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-3", 147 "BriefDescription": "PCIe Completion Buffer occupancy of completions with data: Part 0-3", 257 …of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 0", 270 …of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 1", 335 …of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 0", 348 …of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 1", 413 …of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 0", 426 …of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 1", 491 …of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 0", 504 …of double word (4 bytes) requests initiated by the main die to the attached device.; VTd - Type 1", [all …]
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| /linux/arch/parisc/kernel/vdso32/ |
| H A D | sigtramp.S | 1 /* SPDX-License-Identifier: GPL-2.0 */ 6 * Copyright (C) 2018-2022 Helge Deller <deller@gmx.de> 11 #include <generated/asm-offsets.h> 16 a 64-byte boundary by 0, 4 or 5 instructions. Since the vdso trampoline 25 .align 64 43 .Lsigrt_start = . - 4 56 .size __kernel_sigtramp_rt,.-__kernel_sigtramp_rt 62 #define PTREGS SIGFRAME_CONTEXT_REGS32 /* 32-bit process offset is -672 */ 66 .byte 0x05 /* DW_CFA_offset_extended */ 72 .long .Lcie_end - .Lcie_start [all …]
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| /linux/arch/arm64/crypto/ |
| H A D | sm4-ce-ccm-core.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 * SM4-CCM AEAD Algorithm using ARMv8 Crypto Extensions 13 #include "sm4-ce-asm.h" 15 .arch armv8-a+crypto 57 ld1 {v0.16b-v3.16b}, [x2], #64 100 /* en-/decrypt the mac with ctr0 */ 137 ld1 {v0.16b-v3.16b}, [x2], #64 152 st1 {v8.16b-v11.16b}, [x1], #64 187 ldrb w0, [x2], #1 /* get 1 byte from input */ 188 umov w9, v8.b[0] /* get top crypted CTR byte */ [all …]
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| /linux/arch/x86/boot/ |
| H A D | header.S | 1 /* SPDX-License-Identifier: GPL-2.0 */ 12 * BIG FAT NOTE: We're in real mode using 64k segments. Therefore segment 28 BOOTSEG = 0x07C0 /* original address of boot-sector */ 45 # "MZ", MS-DOS header 70 .word section_table - optional_header # SizeOfOptionalHeader 78 .byte 0x02 # MajorLinkerVersion 79 .byte 0x14 # MinorLinkerVersion 83 .long ZO__end - ZO__data # SizeOfInitializedData 127 .long (section_table - .) / 8 # NumberOfRvaAndSizes 139 .byte 0 [all …]
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| /linux/arch/m68k/fpsp040/ |
| H A D | binstr.S | 5 | Description: Converts a 64-bit binary integer to bcd. 7 | Input: 64-bit binary integer in d2:d3, desired length (LEN) in 9 | in d0. (This pointer must point to byte 4 of the first 12 | Output: LEN bcd digits representing the 64-bit integer. 15 | The 64-bit binary is assumed to have a decimal point before 21 | A1. Init d7 to 1. D7 is the byte digit counter, and if 1, the 23 | to force the first byte formed to have a 0 in the upper 4 bits. 28 | A3. Multiply the fraction in d2:d3 by 8 using bit-field 35 | A5. Add using the carry the 64-bit quantities in d2:d3 and d4:d5 38 | A6. Test d7. If zero, the digit formed is the ms digit. If non- [all …]
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| /linux/drivers/scsi/csiostor/ |
| H A D | csio_hw_t5.c | 4 * Copyright (c) 2008-2013 Chelsio Communications, Inc. All rights reserved. 15 * - Redistributions of source code must retain the above 19 * - Redistributions in binary form must reproduce the above 42 * Truncation intentional: we only read the bottom 32-bits of the in csio_t5_set_mem_win() 43 * 64-bit BAR0/BAR1 ... We use the hardware backdoor mechanism to in csio_t5_set_mem_win() 46 * accesses to our Configuration Space and we need to set up the PCI-E in csio_t5_set_mem_win() 48 * coming across the PCI-E link. in csio_t5_set_mem_win() 60 WINDOW_V(ilog2(MEMWIN_APERTURE) - 10), in csio_t5_set_mem_win() 76 -1, 1 }, in csio_t5_pcie_intr_handler() 77 { MSTTIMEOUTPERR_F, "Master Timeout FIFO parity error", -1, 1 }, in csio_t5_pcie_intr_handler() [all …]
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| /linux/arch/sparc/include/asm/ |
| H A D | dma.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 15 #define SIZE_64K (64*1024) 45 #define DMA_ESC_BURST 0x00000800 /* 1=16byte 0=32byte */ 48 #define DMA_BCNT_ENAB 0x00002000 /* If on, use the byte counter */ 50 #define DMA_SCSI_SBUS64 0x00008000 /* HME: Enable 64-bit SBUS mode. */ 56 #define DMA_E_BURST32 0x00040000 /* ENET: SBUS 32 byte r/w burst */ 57 #define DMA_E_BURST16 0x00000000 /* ENET: SBUS 16 byte r/w burst */ 59 #define DMA_BRST64 0x000c0000 /* SCSI: 64byte bursts (HME on UltraSparc only) */ 60 #define DMA_BRST32 0x00040000 /* SCSI: 32byte bursts */ 61 #define DMA_BRST16 0x00000000 /* SCSI: 16byte bursts */ [all …]
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| /linux/tools/testing/selftests/powerpc/nx-gzip/include/ |
| H A D | nxu.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 * Hardware interface of the NX-GZIP compression accelerator 41 #define nx_get_time() (-1) 42 #define nx_get_freq() (-1) 50 * https://github.com/libnxz/power-gzip/blob/develop/doc/power_nx_gzip_um.pdf 65 * rembytecnt: remaining byte count 67 * spbc: source processed byte count 69 * tebc: target ending bit count; valid bits in the last byte 70 * tpbc: target processed byte count 99 uint32_t ddebc; /* dde byte count */ [all …]
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| /linux/drivers/net/ethernet/pasemi/ |
| H A D | pasemi_mac_ethtool.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2006-2008 PA Semi, Inc 19 { "rx-drops" }, 20 { "rx-bytes" }, 21 { "rx-packets" }, 22 { "rx-broadcast-packets" }, 23 { "rx-multicast-packets" }, 24 { "rx-crc-errors" }, 25 { "rx-undersize-errors" }, 26 { "rx-oversize-errors" }, [all …]
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| /linux/lib/zstd/compress/ |
| H A D | zstd_cwksp.h | 1 /* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */ 6 * This source code is licensed under both the BSD-style license (found in the 9 * You may select, at your option, one of the above-listed licenses. 15 /*-************************************* 23 /*-************************************* 39 /* Set our tables and aligneds to align by 64 bytes */ 40 #define ZSTD_CWKSP_ALIGNMENT_BYTES 64 42 /*-************************************* 55 * expect a well-formed caller to free this. 71 * - These different internal datastructures have different setup requirements: [all …]
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| /linux/arch/xtensa/variants/test_kc705_hifi/include/variant/ |
| H A D | tie.h | 2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration 11 Copyright (c) 1999-2014 Tensilica Inc. 66 /* Save area for non-coprocessor optional and custom (TIE) state: */ 71 #define XCHAL_TOTAL_SA_SIZE 240 /* with 16-byte align padding */ 84 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global) 88 * galign = group byte alignment (power of 2) (galign >= align) 89 * align = register byte alignment (power of 2) 92 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>) 94 * regnum = reg index in regfile, or special/TIE-user reg number 101 * To filter out certain registers, e.g. to expand only the non-global [all …]
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| /linux/arch/x86/lib/ |
| H A D | retpoline.S | 1 /* SPDX-License-Identifier: GPL-2.0 */ 9 #include <asm/asm-offsets.h> 10 #include <asm/nospec-branch.h> 64 #include <asm/GEN-for-each-reg.h> 71 #include <asm/GEN-for-each-reg.h> 94 #include <asm/GEN-for-each-reg.h> 101 #include <asm/GEN-for-each-reg.h> 120 #include <asm/GEN-for-each-reg.h> 127 #include <asm/GEN-for-each-reg.h> 152 .skip 32 - (__x86_indirect_its_thunk_\reg - 1b), 0xcc /* skip to the next upper half */ [all …]
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| /linux/drivers/scsi/ |
| H A D | myrs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 5 * This driver supports the newer, SCSI-based firmware interface only. 10 * Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com> 109 } __packed mem_type:5; /* Byte 0 Bits 0-4 */ 110 unsigned rsvd:1; /* Byte 0 Bit 5 */ 111 unsigned mem_parity:1; /* Byte 0 Bit 6 */ 112 unsigned mem_ecc:1; /* Byte 0 Bit 7 */ 132 unsigned char rsvd1; /* Byte 0 */ 137 } __packed bus; /* Byte 1 */ 170 } __packed ctlr_type; /* Byte 2 */ [all …]
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| /linux/tools/perf/pmu-events/arch/x86/meteorlake/ |
| H A D | other.json | 3 …sed (through a software handler) beyond FP; SSE-AVX mix and A/D assists who are counted by dedicat… 7 …-AVX mix and A/D assists who are counted by dedicated sub-events. This includes, but not limited … 32 …"BriefDescription": "Counts streaming stores which modify a full 64 byte cacheline that have any t… 38 …"PublicDescription": "Counts streaming stores which modify a full 64 byte cacheline that have any … 44 …"BriefDescription": "Counts streaming stores which modify only part of a 64 byte cacheline that ha… 50 …"PublicDescription": "Counts streaming stores which modify only part of a 64 byte cacheline that h…
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