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/freebsd/sys/contrib/device-tree/Bindings/input/touchscreen/
H A Dstmpe.txt15 1 -> 50 us
18 4 -> 1 ms
19 5 -> 5 ms
20 6 -> 10 ms
21 7 -> 50 ms
26 3 -> 1 ms
27 4 -> 5 ms
28 5 -> 10 ms
29 6 -> 50 ms
30 7 -> 100 ms
[all …]
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dcs35l33.txt31 20ms. If this property is set to 0,1,2,3 then ramp times would be 40ms,
32 60ms,100ms,175ms respectively for 48KHz sample rate.
62 stage enters LDO operation. Starts as a default value of 50mV for a value
63 of 1 and increases with a step size of 50mV to a maximum of 750mV (value of
72 from 0 to 7 for delays of 5ms, 10ms, 50ms, 100ms, 200ms, 500ms, 1000ms.
73 The default is 100ms.
91 1800mV with a step size of 50mV up to a maximum value of 1750mV.
H A Dcs35l36.txt15 increments of 50mV.
21 50mA.
61 (in ms) before the Class H algorithm switches to the weak-FET voltage
64 0 = 0ms
65 1 = 5ms
66 2 = 10ms
67 3 = 50ms
68 4 = 100ms (Default)
69 5 = 200ms
[all...]
H A Ddmic.txt11 - wakeup-delay-ms: Delay (in ms) after enabling the DMIC
12 - modeswitch-delay-ms: Delay (in ms) to complete DMIC mode switch
20 wakeup-delay-ms <50>;
21 modeswitch-delay-ms <35>;
H A Dda7219.txt48 - dlg,micbias-pulse-time : Mic bias higher voltage pulse duration (ms)
49 - dlg,btn-cfg : Periodic button press measurements for 4-pole jack (ms)
50 [<2>, <5>, <10>, <50>, <100>, <200>, <500>]
53 - dlg,jack-ins-deb : Debounce time for jack insertion (ms)
54 [<5>, <10>, <20>, <50>, <100>, <200>, <500>, <1000>]
57 - dlg,jack-rem-deb : Debounce time for jack removal (ms)
98 dlg,btn-cfg = <50>;
H A Ddialog,da7219.yaml104 Mic bias higher voltage pulse duration (ms).
109 enum: [2, 5, 10, 50, 100, 200, 500]
111 Periodic button press measurements for 4-pole jack (ms).
121 enum: [5, 10, 20, 50, 100, 200, 500, 1000]
123 Debounce time for jack insertion (ms).
135 Jack type (3/4 pole) detection latency (ms).
141 Debounce time for jack removal (ms).
222 dlg,btn-cfg = <50>;
H A Ddmic-codec.yaml33 modeswitch-delay-ms:
34 description: Delay (in ms) to complete DMIC mode switch
36 wakeup-delay-ms:
37 description: Delay (in ms) after enabling the DMIC
52 wakeup-delay-ms = <50>;
53 modeswitch-delay-ms = <35>;
H A Dnau8824.txt60 0 - 30 ms
61 1 - 50 ms
62 2 - 100 ms
65 0 - 0 ms
66 1 - 1 ms
67 2 - 10 ms
H A Drt1015.txt13 - realtek,power-up-delay-ms
22 realtek,power-up-delay-ms = <50>;
/freebsd/sys/dev/usb/
H A Dusb.h86 #define USB_ISOC_TIME_MAX 128 /* ms */
92 #define USB_POWER_DOWN_TIME 200 /* ms */
93 #define USB_PORT_POWER_DOWN_TIME 100 /* ms */
103 #define USB_PORT_RESET_DELAY_SPEC 10 /* ms */
104 #define USB_PORT_ROOT_RESET_DELAY_SPEC 50 /* ms */
105 #define USB_PORT_RESET_RECOVERY_SPEC 10 /* ms */
106 #define USB_PORT_POWERUP_DELAY_SPEC 100 /* ms */
107 #define USB_PORT_RESUME_DELAY_SPEC 20 /* ms */
108 #define USB_SET_ADDRESS_SETTLE_SPEC 2 /* ms */
109 #define USB_RESUME_DELAY_SPEC (20*5) /* ms */
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3568-fastrhino-r68s.dts44 /* Reset time is 15ms, 50ms for rtl8211f */
66 /* Reset time is 15ms, 50ms for rtl8211f */
/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_spectral.c234 /* ch 11 */ {2462, { {N2DBM(-101, 50), N2DBM( -95, 00)},
235 {N2DBM(-105, 50), N2DBM( -98, 00)},
241 {N2DBM(-115, 00), N2DBM( -94, 50)},
244 {N2DBM(-115, 00), N2DBM( -94, 50)},
246 /* ch 100*/ {5500, { {N2DBM(-111, 50), N2DBM( -93, 75)},
249 /* ch 120*/ {5600, { {N2DBM(-111, 50), N2DBM( -93, 75)},
255 /* ch 157*/ {5785, { {N2DBM(-112, 50), N2DBM( -94, 75)},
256 {N2DBM(-111, 75), N2DBM( -95, 50)},
258 /* ch 165*/ {5825, { {N2DBM(-111, 50), N2DBM( -95, 00)},
431 ss->ss_fft_period = MS(val, AR_PHY_SPECTRAL_SCAN_FFT_PERIOD); in ar9300_get_spectral_params()
[all …]
/freebsd/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/aggs/
H A Dtst.trunc0.d30 #pragma D option aggrate=1ms
31 #pragma D option switchrate=50ms
35 tick-100ms
42 tick-100ms
48 tick-100ms
H A Dtst.stddev.normalize.d25 #pragma D option aggrate=1ms
26 #pragma D option switchrate=50ms
33 tick-100ms
40 tick-100ms
H A Dtst.clearavg2.d43 #pragma D option switchrate=50ms
44 #pragma D option aggrate=1ms
46 tick-100ms
52 tick-100ms
59 tick-100ms
H A Dtst.clear.d39 #pragma D option aggrate=1ms
40 #pragma D option switchrate=50ms
48 tick-100ms
55 tick-100ms
68 tick-100ms
H A Dtst.clearnormalize.d39 #pragma D option aggrate=1ms
40 #pragma D option switchrate=50ms
48 tick-100ms
55 tick-100ms
69 tick-100ms
H A Dtst.clearlquantize.d43 #pragma D option switchrate=50ms
44 #pragma D option aggrate=1ms
47 tick-100ms
54 tick-100ms
63 tick-100ms
H A Dtst.normalize.d38 #pragma D option aggrate=1ms
39 #pragma D option switchrate=50ms
47 tick-100ms
54 tick-100ms
H A Dtst.cleardenormalize.d40 #pragma D option aggrate=1ms
41 #pragma D option switchrate=50ms
49 tick-100ms
56 tick-100ms
70 tick-100ms
H A Dtst.fmtnormalize.d38 #pragma D option aggrate=1ms
39 #pragma D option switchrate=50ms
47 tick-100ms
54 tick-100ms
H A Dtst.multinormalize.d38 #pragma D option aggrate=1ms
39 #pragma D option switchrate=50ms
47 tick-100ms
55 tick-100ms
/freebsd/sys/contrib/device-tree/Bindings/leds/
H A Dleds-trigger-pattern.txt3 The pattern is given by a series of tuples, of brightness and duration (ms).
8 1. For gradual dimming, the dimming interval now is set as 50 milliseconds. So
9 the tuple with duration less than dimming interval (50ms) is treated as a step
/freebsd/sys/contrib/dev/athk/ath10k/
H A Dpci.h146 /* Waking up takes some time (up to 2ms in some cases) so it can be bad
198 #define ATH10K_PCI_RX_POST_RETRY_MS 50
199 #define ATH_PCI_RESET_WAIT_MAX 10 /* ms */
200 #define PCIE_WAKE_TIMEOUT 30000 /* 30ms */
201 #define PCIE_WAKE_LATE_US 10000 /* 10ms */
208 /* Wait up to this many Ms for a Diagnostic Access CE operation to complete */
209 #define DIAG_ACCESS_CE_TIMEOUT_US 10000 /* 10 ms */
210 #define DIAG_ACCESS_CE_WAIT_US 50
/freebsd/usr.bin/beep/
H A Dbeep.c44 #define DURATION_DEF 150 /* ms */
45 #define DURATION_MAX 2000 /* ms */
46 #define DURATION_MIN 50 /* ms */
137 "\t" "-D <duration in ms, from %d ms to %d ms, default %d ms>\n" in usage()
219 while ((1ULL << (c & 63)) < (size_t)(4 * sample_rate / 50)) in main()

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