| /linux/tools/lib/ |
| H A D | list_sort.c | 8 * Returns a list organized in an intermediate format suited
12 __attribute__((nonnull(2,3,4)))
14 struct list_head *a, struct list_head *b) in merge() argument
19 /* if equal, take 'a' -- important for sort stability */ in merge()
20 if (cmp(priv, a, b) <= 0) { in merge()
21 *tail = a; in merge()
22 tail = &a->next; in merge()
23 a = a->next; in merge()
24 if (!a) { in merge()
33 *tail = a; in merge()
[all …]
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| /linux/arch/powerpc/crypto/ |
| H A D | md5-asm.S | 61 #define R_00_15(a, b, c, d, w0, w1, p, q, off, k0h, k0l, k1h, k1l) \ argument
69 add a,a,rT0; /* 1: a = a + f */ \
71 addis w1,w1,k1h; /* 2: wk = w + k */ \
72 add a,a,w0; /* 1: a = a + wk */ \
73 addi w1,w1,k1l; /* 2: wk = w + k' */ \
74 rotrwi a,a,p; /* 1: a = a rotl x */ \
75 add d,d,w1; /* 2: a = a + wk */ \
76 add a,a,b; /* 1: a = a + b */ \
77 and rT0,a,b; /* 2: f = b and c */ \
78 andc rT1,c,a; /* 2: f' = ~b and d */ \
[all …]
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| /linux/tools/perf/pmu-events/arch/x86/skylake/ |
| H A D | virtual-memory.json | 4 "Counter": "0,1,2,3",
7 …"PublicDescription": "Counts demand data loads that caused a page walk of any page size (4K/2M/4M/…
13 "Counter": "0,1,2,3",
21 …"BriefDescription": "Cycles when at least one PMH is busy with a page walk for a load. EPT page wa…
22 "Counter": "0,1,2,3",
26 …n": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a load.",
31 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
32 "Counter": "0,1,2,3",
35 …s it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
40 "BriefDescription": "Page walk completed due to a demand data load to a 1G page",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/skylakex/ |
| H A D | virtual-memory.json | 4 "Counter": "0,1,2,3",
7 …"PublicDescription": "Counts demand data loads that caused a page walk of any page size (4K/2M/4M/…
13 "Counter": "0,1,2,3",
21 …"BriefDescription": "Cycles when at least one PMH is busy with a page walk for a load. EPT page wa…
22 "Counter": "0,1,2,3",
26 …n": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a load.",
31 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
32 "Counter": "0,1,2,3",
35 …s it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
40 "BriefDescription": "Page walk completed due to a demand data load to a 1G page",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/cascadelakex/ |
| H A D | virtual-memory.json | 4 "Counter": "0,1,2,3",
7 …"PublicDescription": "Counts demand data loads that caused a page walk of any page size (4K/2M/4M/…
13 "Counter": "0,1,2,3",
21 …"BriefDescription": "Cycles when at least one PMH is busy with a page walk for a load. EPT page wa…
22 "Counter": "0,1,2,3",
26 …n": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a load.",
31 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
32 "Counter": "0,1,2,3",
35 …s it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
40 "BriefDescription": "Page walk completed due to a demand data load to a 1G page",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/ivytown/ |
| H A D | uncore-power.json | 4 "Counter": "0,1,2,3",
7 …a fixed 800 MHz clock. This event counts the number of pclk cycles measured while the counter was…
12 "Counter": "0,1,2,3",
21 "Counter": "0,1,2,3",
30 "Counter": "0,1,2,3",
39 "Counter": "0,1,2,3",
48 "Counter": "0,1,2,3",
57 "Counter": "0,1,2,3",
66 "Counter": "0,1,2,3",
74 "BriefDescription": "Core 2 C State Transition Cycles",
[all …]
|
| /linux/lib/crypto/x86/ |
| H A D | sha256-ssse3-asm.S | 11 # This software is available to you under a choice of one of two
13 # General Public License (GPL) Version 2, available from the file
32 # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
91 INP = %rsi # 2nd arg
99 a = %eax define
134 # Rotate values of symbols a...h
143 b = a
144 a = TMP_ define
148 ## compute s0 four at a time and s1 two at a time
149 ## compute W[-16] + W[-7] 4 at a time
[all …]
|
| H A D | sha256-avx-asm.S | 11 # This software is available to you under a choice of one of two
13 # General Public License (GPL) Version 2, available from the file
32 # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
47 # This code schedules 1 block at a time, with 4 lanes per block
98 INP = %rsi # 2nd arg
106 a = %eax define
140 # Rotate values of symbols a...h
149 b = a
150 a = TMP_ define
154 ## compute s0 four at a time and s1 two at a time
[all …]
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| /linux/tools/perf/pmu-events/arch/x86/meteorlake/ |
| H A D | virtual-memory.json | 3 …s but second level hits due to a demand load that did not start a page walk. Accounts for all page…
4 "Counter": "0,1,2,3,4,5,6,7",
13 "Counter": "0,1,2,3",
22 … "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a demand load.",
23 "Counter": "0,1,2,3",
27 …ounts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a demand load.…
34 "Counter": "0,1,2,3,4,5,6,7",
42 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
43 "Counter": "0,1,2,3",
46 …n the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDI…
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/icelakex/ |
| H A D | virtual-memory.json | 4 "Counter": "0,1,2,3",
12 … "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a demand load.",
13 "Counter": "0,1,2,3",
17 …ounts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a demand load.…
22 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
23 "Counter": "0,1,2,3",
26 …s it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
31 "BriefDescription": "Page walks completed due to a demand data load to a 1G page.",
32 "Counter": "0,1,2,3",
35 …ions missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
[all …]
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| /linux/drivers/input/serio/ |
| H A D | Kconfig | 11 * standard AT keyboard and PS/2 mouse *
17 To compile this driver as a module, choose M here: the
24 the architecture might use a PC serio device (i8042) to
34 i8042 is the chip over which the standard AT keyboard and PS/2
40 To compile this driver as a module, choose M here: the
55 To compile this driver as a module, choose M here: the
62 Say Y here if you have a Texas Instruments TravelMate notebook
63 equipped with the ct82c710 chip and want to use a mouse connected
68 To compile this driver as a module, choose M here: the
79 Say Y here if you built a simple parallel port adapter to attach
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| /linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a65-e1/ |
| H A D | cache.json | 117 …2 cache refill due to prefetch. +//0 If the core is configured with a per-core L2 cache: This even…
120 …2 cache refill due to prefetch. +//0 If the core is configured with a per-core L2 cache: This even…
123 …gardless of whether they allocate. If either the core is configured without a per-core L2 or the c…
126 …gardless of whether they allocate. If either the core is configured without a per-core L2 or the c…
141 …"PublicDescription": "Level 2 cache write streaming mode. This event counts for each cycle where t…
144 …"BriefDescription": "Level 2 cache write streaming mode. This event counts for each cycle where th…
153 …"PublicDescription": "Level 2 TLB last-level walk cache access. This event does not count if the M…
156 …"BriefDescription": "Level 2 TLB last-level walk cache access. This event does not count if the MM…
159 …"PublicDescription": "Level 2 TLB last-level walk cache refill. This event does not count if the M…
162 …"BriefDescription": "Level 2 TLB last-level walk cache refill. This event does not count if the MM…
[all …]
|
| /linux/drivers/input/mouse/ |
| H A D | Kconfig | 9 Say Y here, and a list of supported mice will be displayed.
17 tristate "PS/2 mouse"
24 Say Y here if you have a PS/2 mouse connected to your system. This
25 includes the standard 2 or 3-button PS/2 mouse, as well as PS/2
30 in a specialized Xorg/XFree86 driver at:
32 and a new version of GPM at:
39 To compile this driver as a module, choose M here: the
43 bool "ALPS PS/2 mouse protocol extension" if EXPERT
47 Say Y here if you have an ALPS PS/2 touchpad connected to
53 bool "BYD PS/2 mouse protocol extension" if EXPERT
[all …]
|
| /linux/tools/testing/selftests/drivers/net/mlxsw/ |
| H A D | devlink_trap_control.sh | 15 # | | default via 2001:db8:1::2 |
22 # | 2001:db8:1::2/64 |
24 # | 2001:db8:2::2/64 |
32 # | | default via 2001:db8:2::2 |
34 # | | 2001:db8:2::1/64 |
98 ip -6 route add default vrf v$h1 nexthop via 2001:db8:1::2
103 ip -6 route del default vrf v$h1 nexthop via 2001:db8:1::2
111 simple_if_init $h2 198.51.100.1/24 2001:db8:2::1/64
114 ip -6 route add default vrf v$h2 nexthop via 2001:db8:2::2
119 ip -6 route del default vrf v$h2 nexthop via 2001:db8:2::2
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/emeraldrapids/ |
| H A D | virtual-memory.json | 4 "Counter": "0,1,2,3",
12 … "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a demand load.",
13 "Counter": "0,1,2,3",
17 …ounts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a demand load.…
22 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
23 "Counter": "0,1,2,3",
26 …n the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDI…
31 "BriefDescription": "Page walks completed due to a demand data load to a 1G page.",
32 "Counter": "0,1,2,3",
35 …n the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDI…
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/graniterapids/ |
| H A D | virtual-memory.json | 4 "Counter": "0,1,2,3",
12 … "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a demand load.",
13 "Counter": "0,1,2,3",
17 …ounts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a demand load.…
22 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
23 "Counter": "0,1,2,3",
26 …n the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDI…
31 "BriefDescription": "Page walks completed due to a demand data load to a 1G page.",
32 "Counter": "0,1,2,3",
35 …n the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDI…
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/sapphirerapids/ |
| H A D | virtual-memory.json | 4 "Counter": "0,1,2,3",
12 … "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a demand load.",
13 "Counter": "0,1,2,3",
17 …ounts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a demand load.…
22 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
23 "Counter": "0,1,2,3",
26 …n the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDI…
31 "BriefDescription": "Page walks completed due to a demand data load to a 1G page.",
32 "Counter": "0,1,2,3",
35 …n the DTLB and further levels of TLB. The page walk can end with or without a fault. Available PDI…
[all …]
|
| /linux/Documentation/userspace-api/media/v4l/ |
| H A D | pixfmt-rgb.rst | 9 These formats encode each pixel as a triplet of RGB values. They are packed
12 bits required to store a pixel is not aligned to a byte boundary, the data is
20 or a permutation thereof, collectively referred to as alpha formats) depend on
24 a meaningful value. Otherwise, when the device doesn't capture an alpha channel
25 but can set the alpha bit to a user-configurable value, the
28 the value specified by that control. Otherwise a corresponding format without
34 filled with meaningful values by applications. Otherwise a corresponding format
38 Formats that contain padding bits are named XRGB (or a permutation thereof).
44 - In all the tables that follow, bit 7 is the most significant bit in a byte.
46 respectively. 'a' denotes bits of the alpha component (if supported by the
[all …]
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| /linux/tools/perf/pmu-events/arch/x86/rocketlake/ |
| H A D | virtual-memory.json | 4 "Counter": "0,1,2,3",
12 "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a demand load.",
13 "Counter": "0,1,2,3",
17 "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a demand load.",
22 "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page sizes)",
23 "Counter": "0,1,2,3",
26 "PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
31 "BriefDescription": "Page walks completed due to a deman
21 { global() object
[all...] |
| /linux/tools/perf/pmu-events/arch/x86/tigerlake/ |
| H A D | virtual-memory.json | 4 "Counter": "0,1,2,3",
12 "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a demand load.",
13 "Counter": "0,1,2,3",
17 "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a demand load.",
22 "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page sizes)",
23 "Counter": "0,1,2,3",
26 "PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
31 "BriefDescription": "Page walks completed due to a deman
21 { global() object
[all...] |
| /linux/tools/perf/pmu-events/arch/x86/icelake/ |
| H A D | virtual-memory.json | 4 "Counter": "0,1,2,3",
12 "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a demand load.",
13 "Counter": "0,1,2,3",
17 "PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a demand load.",
22 "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page sizes)",
23 "Counter": "0,1,2,3",
26 "PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
31 "BriefDescription": "Page walks completed due to a deman
21 { global() object
[all...] |
| /linux/tools/perf/pmu-events/arch/x86/lunarlake/ |
| H A D | virtual-memory.json | 3 …"BriefDescription": "Counts the number of page walks initiated by a demand load that missed the fi…
4 "Counter": "0,1,2,3,4,5,6,7",
13 "Counter": "0,1,2,3,4,5,6,7",
21 …s but second level hits due to a demand load that did not start a page walk. Accounts for all page…
22 "Counter": "0,1,2,3,4,5,6,7",
31 "Counter": "0,1,2,3,4,5,6,7,8,9",
40 … "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a demand load.",
41 "Counter": "0,1,2,3,4,5,6,7,8,9",
45 …ounts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a demand load.…
52 "Counter": "0,1,2,3,4,5,6,7",
[all …]
|
| /linux/Documentation/filesystems/ |
| H A D | configfs.rst | 16 configfs is a ram-based filesystem that provides the converse of
17 sysfs's functionality. Where sysfs is a filesystem-based view of
18 kernel objects, configfs is a filesystem-based manager of kernel
21 With sysfs, an object is created in kernel (for example, when a device
24 readdir(3)/read(2). It may allow some attributes to be modified via
25 write(2). The important point is that the object is created and
27 representation, and sysfs is merely a window on all this.
29 A configfs config_item is created via an explicit userspace operation:
30 mkdir(2). It is destroyed via rmdir(2). The attributes appear at
31 mkdir(2) time, and can be read or modified via read(2) and write(2).
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/goldmontplus/ |
| H A D | virtual-memory.json | 3 "BriefDescription": "Page walk completed due to a demand load to a 1GB page",
4 "Counter": "0,1,2,3",
7 …ll TLB levels and were mapped to 1GB pages. The page walks can end with or without a page fault.",
12 "BriefDescription": "Page walk completed due to a demand load to a 2M or 4M page",
13 "Counter": "0,1,2,3",
16 …ons missed in all TLB levels and were mapped to 2M or 4M pages. The page walks can end with or wi…
21 "BriefDescription": "Page walk completed due to a demand load to a 4K page",
22 "Counter": "0,1,2,3",
25 …all TLB levels and were mapped to 4K pages. The page walks can end with or without a page fault.",
30 "BriefDescription": "Page walks outstanding due to a demand load every cycle.",
[all …]
|
| H A D | pipeline.json | 4 "Counter": "0,1,2,3",
7 "PEBS": "2",
13 "Counter": "0,1,2,3",
16 "PEBS": "2",
23 "Counter": "0,1,2,3",
26 "PEBS": "2",
33 "Counter": "0,1,2,3",
36 "PEBS": "2",
43 "Counter": "0,1,2,3",
46 "PEBS": "2",
[all …]
|