| /linux/drivers/media/platform/mediatek/mdp3/ |
| H A D | mtk-mdp3-regs.h | 3 * Copyright (c) 2022 MediaTek Inc.
23 ((PLANE) << 21) | ((HF) << 19) | ((VF) << 18) | ((BITS) << 8) |\
26 #define MDP_COLOR_IS_COMPRESS(c) ((0x20000000 & (c)) >> 29) argument
27 #define MDP_COLOR_IS_10BIT_PACKED(c) ((0x08000000 & (c)) >> 27) argument
28 #define MDP_COLOR_IS_10BIT_LOOSE(c) (((0x0c000000 & (c)) >> 26) == 1) argument
29 #define MDP_COLOR_IS_10BIT_TILE(c) (((0x0c000000 & (c)) >> 26) == 3) argument
30 #define MDP_COLOR_IS_UFP(c) ((0x02000000 & (c)) >> 25) argument
31 #define MDP_COLOR_IS_INTERLACED(c) ((0x01000000 & (c)) >> 24) argument
32 #define MDP_COLOR_IS_BLOCK_MODE(c) ((0x00800000 & (c)) >> 23) argument
33 #define MDP_COLOR_GET_PLANE_COUNT(c) ((0x00600000 & (c)) >> 21) argument
[all …]
|
| /linux/arch/arm/lib/ |
| H A D | copy_template.S | 91 CALGN( sbcsne r4, r3, r2 ) @ C is always set here
94 CALGN( subs r2, r2, r3 ) @ C gets set
117 addne pc, pc, ip @ C is always clear here
154 ldr1b r1, r3, ne, abort=21f
155 ldr1b r1, r4, cs, abort=21f
156 ldr1b r1, ip, cs, abort=21f
157 str1b r0, r3, ne, abort=21f
158 str1b r0, r4, cs, abort=21f
159 str1b r0, ip, cs, abort=21f
165 ldr1b r1, r3, gt, abort=21f
[all …]
|
| /linux/arch/arm/mach-omap1/ |
| H A D | mux.c | 3 * linux/arch/arm/mach-omap1/mux.c
7 * Copyright (C) 2003 - 2008 Nokia Corporation
30 MUX_CFG("UART1_TX", 9, 21, 1, 2, 3, 0, NA, 0, 0)
34 MUX_CFG("UART2_TX", C, 27, 1, 3, 3, 0, NA, 0, 0)
35 MUX_CFG("UART2_RX", C, 18, 0, 3, 1, 1, NA, 0, 0)
36 MUX_CFG("UART2_CTS", C, 21, 0, 3, 1, 1, NA, 0, 0)
37 MUX_CFG("UART2_RTS", C, 24, 1, 3, 2, 0, NA, 0, 0)
78 MUX_CFG("USB2_VM", C, 18, 1, 3, 0, 0, NA, 0, 1)
79 MUX_CFG("USB2_RCV", C, 21, 1, 3, 1, 0, NA, 0, 1)
80 MUX_CFG("USB2_SE0", C, 24, 2, 3, 2, 0, NA, 0, 1)
[all …]
|
| /linux/lib/crypto/powerpc/ |
| H A D | chacha-p10le-8x.S | 12 # 2. c += d; b ^= c; b <<<= 12;
14 # 4. c += d; b ^= c; b <<<= 7
21 # 4 blocks (a b c d)
87 SAVE_GPR 21, 168, 1
101 SAVE_VRS 21, 16, 9
120 SAVE_VSX 21, 304, 9
136 RESTORE_VRS 21, 16, 9
155 RESTORE_VSX 21, 304, 9
174 RESTORE_GPR 21, 168, 1
200 vadduwm 17, 17, 21
[all …]
|
| H A D | curve25519-ppc64le_asm.S | 11 # Copyright (c) 2006-2017, CRYPTOGAMS by <appro@openssl.org>
74 std 21,56(1)
110 mulhdu 21,11,4
112 adde 23,23,21
115 mulhdu 21,7,4
117 adde 25,25,21
120 mulhdu 21,10,4
124 adde 31,31,21
127 mulhdu 21,8,4
129 adde 27,27,21
[all …]
|
| /linux/lib/zstd/compress/ |
| H A D | clevels.h | 3 * Copyright (c) Meta Platforms, Inc. and affiliates.
26 /* W, C, H, S, L, TL, strat */
30 { 21, 16, 17, 1, 5, 0, ZSTD_dfast }, /* level 3 */
31 { 21, 18, 18, 1, 5, 0, ZSTD_dfast }, /* level 4 */
32 { 21, 18, 19, 3, 5, 2, ZSTD_greedy }, /* level 5 */
33 { 21, 18, 19, 3, 5, 4, ZSTD_lazy }, /* level 6 */
34 { 21, 19, 20, 4, 5, 8, ZSTD_lazy }, /* level 7 */
35 { 21, 19, 20, 4, 5, 16, ZSTD_lazy2 }, /* level 8 */
36 { 22, 20, 21, 4, 5, 16, ZSTD_lazy2 }, /* level 9 */
37 { 22, 21, 22, 5, 5, 16, ZSTD_lazy2 }, /* level 10 */
[all …]
|
| /linux/arch/parisc/lib/ |
| H A D | lusercopy.S | 5 * Copyright (C) 2000-2002 Hewlett-Packard (John Marvin)
6 * Copyright (C) 2000 Richard Hirst <rhirst with parisc-linux.org>
7 * Copyright (C) 2001 Matthieu Delahaye <delahaym at esiee.fr>
8 * Copyright (C) 2003 Randolph Chung <tausq with parisc-linux.org>
9 * Copyright (C) 2017 Helge Deller <deller@gmx.de>
10 * Copyright (C) 2017 John David Anglin <dave.anglin@bell.net>
65 * This code is based on a C-implementation of a copy routine written by
77 * (written in C) is actually quite fast already. This routine is able to beat
132 21: stb,ma t1,1(dstspc,dst)
137 ASM_EXCEPTIONTABLE_ENTRY(21b,.Lcopy_done)
[all …]
|
| /linux/drivers/gpu/drm/mxsfb/ |
| H A D | mxsfb_regs.h | 3 * Copyright (C) 2010 Juergen Beisert, Pengutronix
4 * Copyright (C) 2016 Marek Vasut <marex@denx.de>
60 #define CTRL1_FIFO_CLEAR BIT(21)
67 #define CTRL2_SET_OUTSTANDING_REQS_2 (0x1 << 21)
68 #define CTRL2_SET_OUTSTANDING_REQS_4 (0x2 << 21)
69 #define CTRL2_SET_OUTSTANDING_REQS_8 (0x3 << 21)
70 #define CTRL2_SET_OUTSTANDING_REQS_16 (0x4 << 21)
71 #define CTRL2_SET_OUTSTANDING_REQS_MASK (0x7 << 21)
83 #define VDCTRL0_VSYNC_PERIOD_UNIT BIT(21)
|
| /linux/arch/parisc/net/ |
| H A D | bpf_jit.h | 5 * Copyright (c) 2023 Helge Deller <deller@gmx.de>
32 HPPA_REG_ARG5 = 21,
116 hppa_t6_insn(0x02, reg2, reg1, 0, 0, 0x1c, target) /* add,c reg1,reg2,target */
233 (0x3a << 26) | (base << 21) | 0xf000
235 (0x3e << 26) | (r << 21) | (r << 16) | (target) | 0x00006900
237 (0x3e << 26) | (0 << 21) | (r << 16) | (sa << 6) | (target) | 0x00008800
239 (0x3e << 26) | (r << 21) | (0 << 16) | (sa << 6) | (target) | 0x0000c800
402 return (( (as22 & 0x200000) >> 21) in re_assemble_22()
403 | ((as22 & 0x1f0000) << (21 - 16)) in re_assemble_22()
410 /* see https://parisc.wiki.kernel.org/images-parisc/6/68/Pa11_acd.pdf, appendix C */
[all …]
|
| /linux/tools/testing/selftests/bpf/progs/ |
| H A D | fexit_many_args.c | 2 /* Copyright (c) 2023 Tencent */
11 int BPF_PROG(test1, __u64 a, void *b, short c, int d, void *e, char f, in BPF_PROG() argument
14 test1_result = a == 16 && b == (void *)17 && c == 18 && d == 19 && in BPF_PROG()
15 e == (void *)20 && f == 21 && g == 22 && ret == 133; in BPF_PROG()
21 int BPF_PROG(test2, __u64 a, void *b, short c, int d, void *e, char f, in BPF_PROG() argument
25 test2_result = a == 16 && b == (void *)17 && c == 18 && d == 19 && in BPF_PROG()
26 e == (void *)20 && f == 21 && g == 22 && h == 23 && in BPF_PROG()
33 int BPF_PROG(test3, __u64 a, __u64 b, __u64 c, __u64 d, __u64 e, __u64 f, in BPF_PROG() argument
36 test3_result = a == 16 && b == 17 && c == 18 && d == 19 && in BPF_PROG()
37 e == 20 && f == 21 && g == 22 && h == 23 && in BPF_PROG()
|
| H A D | fentry_many_args.c | 2 /* Copyright (c) 2023 Tencent */
11 int BPF_PROG(test1, __u64 a, void *b, short c, int d, void *e, char f, in BPF_PROG() argument
14 test1_result = a == 16 && b == (void *)17 && c == 18 && d == 19 && in BPF_PROG()
15 e == (void *)20 && f == 21 && g == 22; in BPF_PROG()
21 int BPF_PROG(test2, __u64 a, void *b, short c, int d, void *e, char f, in BPF_PROG() argument
24 test2_result = a == 16 && b == (void *)17 && c == 18 && d == 19 && in BPF_PROG()
25 e == (void *)20 && f == 21 && g == 22 && h == 23 && in BPF_PROG()
32 int BPF_PROG(test3, __u64 a, __u64 b, __u64 c, __u64 d, __u64 e, __u64 f, in BPF_PROG() argument
35 test3_result = a == 16 && b == 17 && c == 18 && d == 19 && in BPF_PROG()
36 e == 20 && f == 21 && g == 22 && h == 23 && in BPF_PROG()
|
| /linux/tools/testing/selftests/tc-testing/tc-tests/actions/ |
| H A D | mirred.json | 358 "id": "407c",
538 …"cmdUnderTest": "bash -c \"for i in \\`seq 1 32\\`; do cmd=\\\"action mirred egress redirect dev l…
564 …"bash -c \"for i in \\`seq 1 32\\`; do cmd=\\\"action mirred egress redirect dev lo index \\$i \\\…
566 …"cmdUnderTest": "bash -c \"for i in \\`seq 1 32\\`; do cmd=\\\"action mirred index \\$i \\\"; args…
591 …"cmdUnderTest": "bash -c \"for i in \\`seq 1 32\\`; do cmd=\\\"action mirred ingress mirror dev lo…
617 …"bash -c \"for i in \\`seq 1 32\\`; do cmd=\\\"action mirred ingress mirror dev lo index \\$i \\\"…
619 …"cmdUnderTest": "bash -c \"for i in \\`seq 1 32\\`; do cmd=\\\"action mirred index \\$i \\\"; args…
672 "$TC qdisc add dev $DEV1 egress_block 21 clsact",
676 "cmdUnderTest": "$TC actions add action mirred egress mirror index 1 blockid 21",
690 "to_blockid": 21,
[all …]
|
| /linux/Documentation/scsi/ |
| H A D | ChangeLog.sym53c8xx_2 | 1 Sat Dec 30 21:30 2000 Gerard Roudier
5 Mon Jan 08 21:30 2001 Gerard Roudier
27 Wed Jan 24 21:00 2001 Gerard Roudier
38 Wed Feb 7 21:00 2001 Gerard Roudier
50 Sat Mar 3 21:00 2001 Gerard Roudier
52 corresponding code to file sym_misc.c.
53 Also move the code that sniffes INQUIRY to sym_misc.c.
55 without polluating the core driver source (sym_hipd.c).
66 Tues Apr 10 21:00 2001 Gerard Roudier
|
| /linux/drivers/clk/samsung/ |
| H A D | clk-fsd.c | 3 * Copyright (c) 2017-2022 Samsung Electronics Co., Ltd.
5 * Copyright (c) 2017-2022 Tesla, Inc.
260 GATE(0, "cmu_cis0_clkgate", "mout_cmu_cis0_clkmux", GAT_CMU_CIS0_CLKGATE, 21,
262 GATE(0, "cmu_cis1_clkgate", "mout_cmu_cis1_clkmux", GAT_CMU_CIS1_CLKGATE, 21,
264 GATE(0, "cmu_cis2_clkgate", "mout_cmu_cis2_clkmux", GAT_CMU_CIS2_CLKGATE, 21,
267 GAT_CMU_CPUCL_SWITCH_GATE, 21, CLK_IGNORE_UNUSED, 0),
269 GAT_CMU_FSYS0_SHARED0DIV4_GATE, 21, CLK_IGNORE_UNUSED, 0),
271 GAT_CMU_FSYS0_SHARED1DIV4_CLK, 21, CLK_IGNORE_UNUSED, 0),
273 GAT_CMU_FSYS0_SHARED1DIV4_GATE, 21, CLK_IGNORE_UNUSED, 0),
275 GAT_CMU_FSYS1_SHARED0DIV4_GATE, 21, CLK_IGNORE_UNUSED, 0),
[all …]
|
| H A D | clk-exynos7885.c | 3 * Copyright (C) 2021 Dávid Virág <virag.david003@gmail.com>
303 CLK_CON_GAT_GATE_CLKCMU_CORE_BUS, 21, 0, 0),
305 CLK_CON_GAT_GATE_CLKCMU_CORE_CCI, 21, 0, 0),
307 CLK_CON_GAT_GATE_CLKCMU_CORE_G3D, 21, 0, 0),
311 CLK_CON_GAT_GATE_CLKCMU_PERI_BUS, 21, 0, 0),
313 CLK_CON_GAT_GATE_CLKCMU_PERI_SPI0, 21, 0, 0),
315 CLK_CON_GAT_GATE_CLKCMU_PERI_SPI1, 21, 0, 0),
317 CLK_CON_GAT_GATE_CLKCMU_PERI_UART0, 21, 0, 0),
319 CLK_CON_GAT_GATE_CLKCMUC_PERI_UART1, 21, 0, 0),
321 CLK_CON_GAT_GATE_CLKCMU_PERI_UART2, 21, 0, 0),
[all …]
|
| /linux/drivers/net/ethernet/broadcom/bnx2x/ |
| H A D | bnx2x_init_ops.h | 3 * This file is "included" in bnx2x_main.c.
5 * Copyright (c) 2007-2013 Broadcom Corporation
6 * Copyright (c) 2014 QLogic Corporation
344 { {8, 3, 6}, {16, 3, 11}, {32, 3, 21}, {64, 3, 41} },
345 { {8, 3, 6}, {16, 3, 11}, {32, 3, 21}, {64, 3, 41} },
346 { {8, 3, 6}, {16, 3, 11}, {32, 3, 21}, {64, 3, 41} },
347 { {8, 3, 6}, {16, 3, 11}, {32, 3, 21}, {64, 3, 41} },
348 /* 10 */{ {8, 3, 6}, {16, 3, 11}, {32, 3, 21}, {32, 3, 21} },
349 { {8, 3, 6}, {16, 3, 11}, {32, 3, 21}, {32, 3, 21} },
350 { {8, 3, 6}, {16, 3, 11}, {32, 3, 21}, {32, 3, 21} },
[all …]
|
| /linux/include/soc/mscc/ |
| H A D | ocelot_sys.h | 5 * Copyright (c) 2017 Microsemi Corporation
40 #define SYS_TIMESTAMP_OFFSET_ETH_TYPE_CFG(x) (((x) << 6) & GENMASK(21, 6))
41 #define SYS_TIMESTAMP_OFFSET_ETH_TYPE_CFG_M GENMASK(21, 6)
42 #define SYS_TIMESTAMP_OFFSET_ETH_TYPE_CFG_X(x) (((x) & GENMASK(21, 6)) >> 6)
97 #define SYS_PTP_STATUS_PTP_MESS_ID(x) (((x) << 21) & GENMASK(26, 21))
98 #define SYS_PTP_STATUS_PTP_MESS_ID_M GENMASK(26, 21)
99 #define SYS_PTP_STATUS_PTP_MESS_ID_X(x) (((x) & GENMASK(26, 21)) >> 21)
|
| /linux/drivers/phy/mediatek/ |
| H A D | phy-mtk-mipi-csi-0-5-rx-reg.h | 3 * Copyright (c) 2023, MediaTek Inc.
4 * Copyright (c) 2023, BayLibre Inc.
32 #define RG_CSI0A_L1_T1AB_EQ_IS GENMASK(21, 20)
34 #define RG_CSI0A_L2_T1BC_EQ_IS GENMASK(21, 20)
38 #define RG_CSI1A_L1_EQ_IS GENMASK(21, 20)
|
| /linux/arch/arm/kernel/ |
| H A D | phys2virt.S | 3 * Copyright (C) 1994-2002 Russell King
4 * Copyright (c) 2003, 2020 ARM Limited
41 mov r0, r3, lsr #21 @ constant for add/sub instructions
42 teq r3, r0, lsl #21 @ must be 2 MiB aligned
63 @ phys-to-virt: movw <reg>, #offset<31:21>
64 @ lsl <reg>, #21
67 @ virt-to-phys (non-LPAE): movw <reg>, #offset<31:21>
68 @ lsl <reg>, #21
71 @ virt-to-phys (LPAE): movw <reg>, #offset<31:21>
72 @ lsl <reg>, #21
[all …]
|
| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt6735-apmixedsys.c | 3 * Copyright (c) 2022 Yassine Oudjana <y.oudjana@protonmail.com>
69 …", ARMPLL_CON0, ARMPLL_PWR_CON0, 0x00000001, 0, ARMPLL_CON1, 24, 0, 0, 0, ARMPLL_CON1, 21, PLL_AO),
70 …PLL_PWR_CON0, 0xf0000101, CON0_RST_BAR, MAINPLL_CON1, 24, 0, 0, 0, MAINPLL_CON1, 21, HAVE_RST_BAR),
71 …PLL_PWR_CON0, 0xfc000001, CON0_RST_BAR, UNIVPLL_CON1, 24, 0, 0, 0, UNIVPLL_CON1, 21, HAVE_RST_BAR),
72 …L, "mmpll", MMPLL_CON0, MMPLL_PWR_CON0, 0x00000001, 0, MMPLL_CON1, 24, 0, 0, 0, MMPLL_CON1, 21, 0),
73 …l", MSDCPLL_CON0, MSDCPLL_PWR_CON0, 0x00000001, 0, MSDCPLL_CON1, 24, 0, 0, 0, MSDCPLL_CON1, 21, 0),
74 …PLL_PWR_CON0, 0x00000001, CON0_RST_BAR, VENCPLL_CON1, 24, 0, 0, 0, VENCPLL_CON1, 21, HAVE_RST_BAR),
75 …vdpll", TVDPLL_CON0, TVDPLL_PWR_CON0, 0x00000001, 0, TVDPLL_CON1, 24, 0, 0, 0, TVDPLL_CON1, 21, 0),
|
| /linux/arch/mips/include/asm/ |
| H A D | mipsmtregs.h | 4 * Copyright (C) 2004 - 2005 MIPS Technologies, Inc. All rights reserved.
16 * C macros
121 #define VPECONTROL_YSI_SHIFT 21
129 #define VPECONF0_XTC_SHIFT 21
152 #define TCSTATUS_TDS_SHIFT 21
172 #define TCBIND_CURTC_SHIFT 21
195 _ASM_INSN32_IF_MM(0x0000157C | __rt << 21))
220 _ASM_INSN32_IF_MM(0x0000357C | __rt << 21))
249 _ASM_INSN32_IF_MM(0x0000057C | __rt << 21))
274 _ASM_INSN32_IF_MM(0x0000257C | __rt << 21))
[all …]
|
| /linux/Documentation/core-api/ |
| H A D | packing.rst | 57 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
73 24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
86 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
100 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
108 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
123 24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
134 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
145 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
179 23 22 21 20 | Group 5
195 23 22 21 20 | Group 5
[all …]
|
| /linux/drivers/net/ethernet/mscc/ |
| H A D | ocelot_qs.h | 5 * Copyright (c) 2017 Microsemi Corporation
54 #define QS_INJ_CTRL_GAP_SIZE(x) (((x) << 21) & GENMASK(24, 21))
55 #define QS_INJ_CTRL_GAP_SIZE_M GENMASK(24, 21)
56 #define QS_INJ_CTRL_GAP_SIZE_X(x) (((x) & GENMASK(24, 21)) >> 21)
|
| /linux/drivers/clk/rockchip/ |
| H A D | rst-rk3506.c | 3 * Copyright (c) 2025 Rockchip Electronics Co., Ltd.
202 RK3506_CRU_RESET_OFFSET(SRST_A_VIO_BIU, 21, 3),
203 RK3506_CRU_RESET_OFFSET(SRST_H_VIO_BIU, 21, 4),
204 RK3506_CRU_RESET_OFFSET(SRST_H_RGA, 21, 6),
205 RK3506_CRU_RESET_OFFSET(SRST_A_RGA, 21, 7),
206 RK3506_CRU_RESET_OFFSET(SRST_CORE_RGA, 21, 8),
207 RK3506_CRU_RESET_OFFSET(SRST_A_VOP, 21, 9),
208 RK3506_CRU_RESET_OFFSET(SRST_H_VOP, 21, 10),
209 RK3506_CRU_RESET_OFFSET(SRST_VOP, 21, 11),
210 RK3506_CRU_RESET_OFFSET(SRST_P_DPHY, 21, 12),
[all …]
|
| /linux/include/linux/usb/ |
| H A D | pd_vdo.h | 118 * <22:21> :: connector type (SVDM version 2.0+ only; set to zero in version 1.0)
147 #define IDH_CONN_MASK GENMASK(22, 21)
151 | (is_modal) << 26 | ((dfp) & 0x7) << 23 | ((conn) & 0x3) << 21 \
158 #define PD_IDH_CONN_TYPE(vdo) (((vdo) >> 21) & 0x3)
185 * <21:11> :: Reserved
248 * <21:5> :: Reserved
270 * <19:18> :: type-C to Type-A/B/C/Captive (00b == A, 01 == B, 10 == C, 11 == Captive)
287 * <23:21> :: VDO version
289 * <19:18> :: Type-C to Type-C/Captive (10b == C, 11b == Captive)
303 * <23:21> :: VDO version
[all …]
|