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/linux/Documentation/devicetree/bindings/phy/
H A Dapm,xgene-phy.yaml7 title: APM X-Gene 15Gbps Multi-purpose PHY
13 PHY nodes are defined to describe on-chip 15Gbps Multi-purpose PHY. Each
22 maxItems: 1
26 Possible values are 0 (SATA), 1 (SGMII), 2 (PCIe), 3 (USB), and 4 (XFI).
27 const: 1
30 maxItems: 1
52 nominal sampling point. 1 means sample data later than the nominal
62 enum: [0, 1]
97 1st pre-cursor emphasis taps control. Two set of 3-tuple setting for
146 0 = 1-2Gbps
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/linux/drivers/scsi/mvsas/
H A Dmv_94xx.h72 /* ports 1-3 follow after this */
79 /* ports 1-3 follow after this */
84 /* ports 1-3 follow after this */
91 /* phys 1-3 follow after this */
94 /* phys 1-3 follow after this */
117 VSR_PHY_MODE5 = 0x05 * 4, /* Phy Counter 1 */
121 VSR_PHY_MODE9 = 0x09 * 4, /* Event Counter 1 */
141 MVS_IRQ_COM_IN_I2O_IOP0 = (1 << 0),
142 MVS_IRQ_COM_IN_I2O_IOP1 = (1 << 1),
143 MVS_IRQ_COM_IN_I2O_IOP2 = (1 << 2),
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/linux/drivers/scsi/bfa/
H A Dbfad_attr.c28 u32 fc_id = -1; in bfad_im_get_starget_port_id()
193 fc_host_active_fc4s(shost)[2] = 1; in bfad_im_get_host_active_fc4s()
195 fc_host_active_fc4s(shost)[7] = 1; in bfad_im_get_host_active_fc4s()
335 * In case it is lesser than path_tov of driver, set it to path_tov + 1
348 rport->dev_loss_tmo = path_tov + 1; in bfad_im_set_rport_loss_tmo()
414 fc_host_supported_fc4s(vshost)[2] = 1; in bfad_im_vport_create()
417 fc_host_supported_fc4s(vshost)[7] = 1; in bfad_im_vport_create()
520 return -1; in bfad_im_vport_delete()
597 .show_starget_port_id = 1,
599 .show_starget_node_name = 1,
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/linux/tools/testing/selftests/drivers/net/hw/
H A Ddevlink_rate_tc_bw.py15 - Creates 1 VF
22 1. test_no_tc_mapping_bandwidth:
39 - Total bandwidth: 1Gbps
116 cmd(f"echo 1 > /sys/class/net/{cfg.ifname}/device/sriov_numvfs", shell=True)
129 cmd(f"tc qdisc add dev {vf_ifc} root handle 5 mqprio mode dcb hw 1 num_tc 8")
168 cfg.vf_port_index = int(port_name.split("/")[-1])
209 {"index": 1, "bw": 0},
261 between the given endpoints. Returns average Gbps.
342 ksft_pr(f"TC 3 percentage: {bw_data['tc3_percentage']:.1
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/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu11_driver_if_arcturus.h44 #define MAX_GFXCLK_DPM_LEVEL (NUM_GFXCLK_DPM_LEVELS - 1)
45 #define MAX_VCLK_DPM_LEVEL (NUM_VCLK_DPM_LEVELS - 1)
46 #define MAX_DCLK_DPM_LEVEL (NUM_DCLK_DPM_LEVELS - 1)
47 #define MAX_MP0CLK_DPM_LEVEL (NUM_MP0CLK_DPM_LEVELS - 1)
48 #define MAX_SOCCLK_DPM_LEVEL (NUM_SOCCLK_DPM_LEVELS - 1)
49 #define MAX_UCLK_DPM_LEVEL (NUM_UCLK_DPM_LEVELS - 1)
50 #define MAX_FCLK_DPM_LEVEL (NUM_FCLK_DPM_LEVELS - 1)
51 #define MAX_XGMI_LEVEL (NUM_XGMI_LEVELS - 1)
52 #define MAX_XGMI_PSTATE_LEVEL (NUM_XGMI_PSTATE_LEVELS - 1)
57 #define FEATURE_DPM_GFXCLK_BIT 1
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H A Dsmu11_driver_if_sienna_cichlid.h53 #define MAX_GFXCLK_DPM_LEVEL (NUM_GFXCLK_DPM_LEVELS - 1)
54 #define MAX_SMNCLK_DPM_LEVEL (NUM_SMNCLK_DPM_LEVELS - 1)
55 #define MAX_SOCCLK_DPM_LEVEL (NUM_SOCCLK_DPM_LEVELS - 1)
56 #define MAX_MP0CLK_DPM_LEVEL (NUM_MP0CLK_DPM_LEVELS - 1)
57 #define MAX_DCLK_DPM_LEVEL (NUM_DCLK_DPM_LEVELS - 1)
58 #define MAX_VCLK_DPM_LEVEL (NUM_VCLK_DPM_LEVELS - 1)
59 #define MAX_DCEFCLK_DPM_LEVEL (NUM_DCEFCLK_DPM_LEVELS - 1)
60 #define MAX_DISPCLK_DPM_LEVEL (NUM_DISPCLK_DPM_LEVELS - 1)
61 #define MAX_PIXCLK_DPM_LEVEL (NUM_PIXCLK_DPM_LEVELS - 1)
62 #define MAX_PHYCLK_DPM_LEVEL (NUM_PHYCLK_DPM_LEVELS - 1)
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H A Dsmu13_driver_if_aldebaran.h39 #define FEATURE_DPM_GFXCLK_BIT 1
106 #define I2C_CONTROLLER_ENABLED 1
112 #define THROTTLER_PPT1_BIT 1
140 #define I2C_CONTROLLER_ENABLED 1
186 I2C_SPEED_FAST_PLUS_1M, //1 Mbits/s (in fast mode)
187 I2C_SPEED_HIGH_1M, //1 Mbits/s (in high speed mode)
199 #define CMDCONFIG_RESTART_BIT 1
200 #define CMDCONFIG_READWRITE_BIT 2 //bit should be 0 for read, 1 for write
202 #define CMDCONFIG_STOP_MASK (1 << CMDCONFIG_STOP_BIT)
203 #define CMDCONFIG_RESTART_MASK (1 << CMDCONFIG_RESTART_BIT)
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/linux/drivers/net/ethernet/ezchip/
H A Dnps_enet.h19 #define NPS_ENET_ENABLE 1
57 #define TX_DONE_SHIFT 1
59 /* Gbps Eth MAC Configuration 0 register masks and shifts */
63 #define CFG_0_TX_EN_SHIFT 1
93 /* Gbps Eth MAC Configuration 1 register masks and shifts */
103 /* Gbps Eth MAC Configuration 2 register masks and shifts */
119 /* Gbps Eth MAC Configuration 3 register masks and shifts */
123 #define CFG_3_RX_CBFC_EN_SHIFT 1
151 #define PHASE_FIFO_CTL_INIT_SHIFT 1
/linux/Documentation/devicetree/bindings/media/i2c/
H A Dmaxim,max96717.yaml25 The GMSL2 serial link operates at a fixed rate of 3Gbps or 6Gbps in the
27 MAX96717F only supports a fixed rate of 3Gbps in the forward direction.
50 maxItems: 1
68 minItems: 1
72 minItems: 1
78 port@1:
84 - port@1
107 #address-cells = <1>;
117 #address-cells = <1>;
123 data-lanes = <1 2 3 4>;
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H A Dmaxim,max96714.yaml23 The GMSL2 serial link operates at a fixed rate of 3Gbps or 6Gbps in the
25 MAX96714F only supports a fixed rate of 3Gbps in the forward direction.
37 maxItems: 1
40 maxItems: 1
59 port@1:
71 minItems: 1
75 minItems: 1
79 maxItems: 1
85 - port@1
111 #address-cells = <1>;
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/linux/tools/testing/selftests/drivers/net/mlxsw/
H A Dqos_lib.sh5 local rate=$1; shift
6 local min=$1; shift
7 local what=$1; shift
14 return 1
19 local sw_in=$1; shift # Where the traffic ingresses the switch
20 local host_in=$1; shift # Where it ingresses another host
21 local counter=$1; shift # Counter to use for measurement
22 local what=$1; shift
29 # 1Gbps. That wouldn't saturate egress and MC would thus get through,
30 # seemingly winning bandwidth on account of UC. Demand at least 2Gbps
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/linux/Documentation/networking/
H A Ddctcp.rst19 switches is 20 packets (30KB) at 1Gbps, and 65 packets (~100KB) at 10Gbps,
/linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/
H A Dhclge_main.h26 #define HCLGE_VF_VPORT_START_NUM 1
88 #define HCLGE_RSS_TC_SIZE_0 1
151 #define HCLGE_CORE_RESET_BIT 1
166 #define HCLGE_VECTOR0_RX_CMDQ_INT_B 1
168 #define HCLGE_VECTOR0_IMP_RESET_INT_B 1
178 (pci_resource_len((hdev)->pdev, HCLGE_MEM_BAR) >> 1)
188 #define HCLGE_SUPPORT_10G_BIT BIT(1)
247 HCLGE_MAC_SPEED_1G = 1000, /* 1000 Mbps = 1 Gbps */
248 HCLGE_MAC_SPEED_10G = 10000, /* 10000 Mbps = 10 Gbps */
249 HCLGE_MAC_SPEED_25G = 25000, /* 25000 Mbps = 25 Gbps */
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/linux/arch/arm64/boot/dts/marvell/
H A Darmada-8040-puzzle-m801.dts58 v_vddo_h: regulator-1-8v {
82 tx-disable-gpios = <&sfpplus_gpio 1 GPIO_ACTIVE_HIGH>;
100 led-1 {
101 /* SFP+ port 1: Activity */
103 function-enumerator = <1>;
108 /* SFP+ port 2: 10 Gbps indicator */
115 /* SFP+ port 2: 1 Gbps indicator */
122 /* SFP+ port 1: 10 Gbps indicator */
129 /* SFP+ port 1: 1 Gbps indicator */
151 no-1-8-v;
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/linux/drivers/gpu/drm/amd/display/dc/link/protocols/
H A Dlink_dp_capability.c133 return -1; in translate_dpcd_max_bpc()
139 case 0x80: // 1 lttpr repeater in dp_parse_lttpr_repeater_count()
140 return 1; in dp_parse_lttpr_repeater_count()
164 * Offset is 0 for single LTTPR cases as base LTTPR DPCD addresses target LTTPR 1 in dp_get_closest_lttpr_offset()
166 return DP_REPEATER_CONFIGURATION_AND_STATUS_SIZE * (lttpr_count - 1); in dp_get_closest_lttpr_offset()
192 // LinkRate is normally stored as a multiplier of 0.27 Gbps per lane. Do the translation. in linkRateInKHzToLinkRateMultiplier()
195 link_rate = LINK_RATE_LOW; // Rate_1 (RBR) - 1.62 Gbps/Lane in linkRateInKHzToLinkRateMultiplier()
198 link_rate = LINK_RATE_RATE_2; // Rate_2 - 2.16 Gbps/Lane in linkRateInKHzToLinkRateMultiplier()
201 link_rate = LINK_RATE_RATE_3; // Rate_3 - 2.43 Gbps/Lane in linkRateInKHzToLinkRateMultiplier()
204 link_rate = LINK_RATE_HIGH; // Rate_4 (HBR) - 2.70 Gbps/Lane in linkRateInKHzToLinkRateMultiplier()
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/linux/drivers/usb/gadget/
H A Dconfig.c80 bytes += (n_desc + 1) * sizeof(*tmp); in usb_copy_descriptors()
92 mem += (n_desc + 1) * sizeof(*tmp); in usb_copy_descriptors()
114 * pointer dereference if a 5gbps capable gadget is used with in usb_assign_descriptors()
115 * a 10gbps capable config (device port + cable + host port) in usb_assign_descriptors()
/linux/arch/mips/cavium-octeon/executive/
H A Dcvmx-helper-board.c49 * port. A result of -1 means there isn't a MII capable PHY
61 * Returns MII PHY address and bus number or -1.
68 return -1; in cvmx_helper_board_get_mii_address()
73 /* Interface 0 is SPI4, interface 1 is RGMII */ in cvmx_helper_board_get_mii_address()
77 return -1; in cvmx_helper_board_get_mii_address()
85 * Port 0 is WAN connected to a PHY, Port 1 is GMII in cvmx_helper_board_get_mii_address()
90 else if (ipd_port == 1) in cvmx_helper_board_get_mii_address()
93 return -1; in cvmx_helper_board_get_mii_address()
101 return -1; in cvmx_helper_board_get_mii_address()
104 return -1; in cvmx_helper_board_get_mii_address()
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/linux/Documentation/devicetree/bindings/usb/
H A Dmicrochip,usb5744.yaml12 Gen 1 specification. The USB5744 also supports Full Speed (FS) and Low Speed
15 controller, so 5 Gbps SuperSpeed data transfers are not affected by slower
30 maxItems: 1
33 maxItems: 1
43 1V2 power supply to the hub
81 #address-cells = <1>;
90 #address-cells = <1>;
93 /* 2.0 hub on port 1 */
94 hub_2_0: hub@1 {
96 reg = <1>;
/linux/drivers/infiniband/hw/efa/
H A Defa_verbs.c247 props->max_pkeys = 1; in efa_query_device()
288 static void efa_link_gbps_to_speed_and_width(u16 gbps, in efa_link_gbps_to_speed_and_width() argument
292 if (gbps >= 400) { in efa_link_gbps_to_speed_and_width()
295 } else if (gbps >= 200) { in efa_link_gbps_to_speed_and_width()
298 } else if (gbps >= 120) { in efa_link_gbps_to_speed_and_width()
301 } else if (gbps >= 100) { in efa_link_gbps_to_speed_and_width()
304 } else if (gbps >= 60) { in efa_link_gbps_to_speed_and_width()
307 } else if (gbps >= 50) { in efa_link_gbps_to_speed_and_width()
310 } else if (gbps >= 40) { in efa_link_gbps_to_speed_and_width()
313 } else if (gbps >= 30) { in efa_link_gbps_to_speed_and_width()
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Drenesas,ethertsn.yaml13 The RTSN device provides Ethernet network using a 10 Mbps, 100 Mbps, or 1
14 Gbps full-duplex link via MII/GMII/RMII/RGMII. Depending on the connected PHY.
47 maxItems: 1
50 maxItems: 1
53 maxItems: 1
117 #address-cells = <1>;
/linux/Documentation/networking/device_drivers/ethernet/intel/
H A Dixgbe.rst53 | Intel | DUAL RATE 1G/10G SFP+ SR (bailed) | FTLX8571D3BCV-IT |
55 | Intel | DUAL RATE 1G/10G SFP+ SR (bailed) | AFBR-703SDZ-IN2 |
57 | Intel | DUAL RATE 1G/10G SFP+ SR (bailed) | AFBR-703SDDZ-IN1 |
61 | Intel | DUAL RATE 1G/10G SFP+ LR (bailed) | FTLX1471D3BCV-IT |
63 | Intel | DUAL RATE 1G/10G SFP+ LR (bailed) | AFCT-701SDZ-IN2 |
65 | Intel | DUAL RATE 1G/10G SFP+ LR (bailed) | AFCT-701SDDZ-IN1 |
80 | Finisar | DUAL RATE 1G/10G SFP+ SR (No Bail) | FTLX8571D3QCV-IT |
82 | Avago | DUAL RATE 1G/10G SFP+ SR (No Bail) | AFBR-703SDZ-IN1 |
84 | Finisar | DUAL RATE 1G/10G SFP+ LR (No Bail) | FTLX1471D3QCV-IT |
86 | Avago | DUAL RATE 1G/10G SFP+ LR (No Bail) | AFCT-701SDZ-IN1 |
[all …]
/linux/drivers/net/ethernet/intel/igc/
H A Digc_mac.c68 /* Zero out the other (rar_entry_count - 1) receive addresses */ in igc_init_rx_addrs()
69 hw_dbg("Clearing RAR[1-%u]\n", rar_count - 1); in igc_init_rx_addrs()
70 for (i = 1; i < rar_count; i++) in igc_init_rx_addrs()
193 * 1: Rx flow control is enabled (we can receive pause in igc_force_mac_fc()
328 ((u32)addr[1] << 8) | in igc_rar_set()
375 ret_val = igc_phy_has_link(hw, 1, 0, &link); in igc_check_for_copper_link()
513 * 0 | 1 | 0 | DC | igc_fc_none in igc_config_fc_after_link_up()
514 * 0 | 1 | 1 | 0 | igc_fc_none in igc_config_fc_after_link_up()
515 * 0 | 1 | 1 | 1 | igc_fc_tx_pause in igc_config_fc_after_link_up()
516 * 1 | 0 | 0 | DC | igc_fc_none in igc_config_fc_after_link_up()
[all …]
/linux/drivers/phy/marvell/
H A Dphy-mvebu-a3700-comphy.c40 * When accessing common PHY lane registers directly, we need to shift by 1,
43 #define COMPHY_LANE_REG_DIRECT(reg) (((reg) & 0x7FF) << 1)
129 #define PRD_TXMARGIN_MASK GENMASK(3, 1)
149 #define PIPE_REG_RESET BIT(1)
160 #define BUNDLE_PERIOD_SEL BIT(1)
184 #define COMPHY_PHY_REG(lane, reg) (((1 - (lane)) * 0x28) + ((reg) & 0x3f))
187 * lane0: USB3/GbE1 PHY Configuration 1
188 * lane1: PCIe/GbE0 PHY Configuration 1
192 #define PIN_PU_IVREF_BIT BIT(1)
208 * lane0: USB3/GbE1 PHY Status 1
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/linux/drivers/message/fusion/
H A Dmptfc.c129 .this_id = -1,
168 .show_host_node_name = 1,
169 .show_host_port_name = 1,
170 .show_host_supported_classes = 1,
171 .show_host_port_id = 1,
172 .show_rport_supported_classes = 1,
173 .show_starget_node_name = 1,
174 .show_starget_port_name = 1,
175 .show_starget_port_id = 1,
177 .show_rport_dev_loss_tmo = 1,
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/linux/drivers/platform/mellanox/
H A DKconfig116 L3 management switches. It has 48 x 1Gbps RJ45 + 4 x 100G QSFP28
117 ports in a compact 1RU form factor. The system also including a
118 serial port (RS-232 interface), an OOB port (1G/100M MDI interface)
122 System equipped with Nvidia®Spectrum-1 32x100GbE Ethernet switch.

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