Searched +full:169445 +full:- +full:nand +full:- +full:gpio (Results 1 – 3 of 3) sorted by relevance
1 Bindings for the National Instruments 169445 GPIO NAND controller3 The 169445 GPIO NAND controller has two memory mapped GPIO registers, one5 intended to be used with the GPIO NAND driver.8 - compatible: should be "ni,169445-nand-gpio"9 - reg-names: must contain10 "dat" - data register11 - reg: address + size pairs describing the GPIO register sets;12 order must correspond with the order of entries in reg-names13 - #gpio-cells: must be set to 2. The first cell is the pin number and14 the second cell is used to specify the gpio polarity:[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/gpio/gpio-mmio.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Generic MMIO GPIO10 - Linus Walleij <linus.walleij@linaro.org>11 - Bartosz Golaszewski <brgl@bgdev.pl>14 Some simple GPIO controllers may consist of a single data register or a pair15 of set/clear-bit registers. Such controllers are common for glue logic in16 FPGAs or ASICs. Commonly, these controllers are accessed over memory-mapped[all …]
1 /dts-v1/;4 #address-cells = <1>;5 #size-cells = <1>;6 compatible = "ni,169445";9 #address-cells = <1>;10 #size-cells = <0>;25 compatible = "fixed-clock";26 #clock-cells = <0>;27 clock-frequency = <50000000>;30 cpu_intc: interrupt-controller {[all …]