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Searched +full:12 +full:bit +full:- +full:clkdiv +full:- +full:mode (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/hwtracing/intel_th/
H A Dpti.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2016 Intel Corporation.
25 unsigned int mode; member
27 unsigned int clkdiv; member
33 /* map PTI widths to MODE settings of PTI_CTL register */
35 0, 4, 8, 0, 12, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0,
46 return -EINVAL; in pti_width_mode()
54 return scnprintf(buf, PAGE_SIZE, "%d\n", pti_mode[pti->mode]); in mode_show()
72 pti->mode = ret; in mode_store()
77 static DEVICE_ATTR_RW(mode);
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/linux/Documentation/devicetree/bindings/iio/frequency/
H A Dadi,adf4350.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
15 - adi,adf4350
16 - adi,adf4351
21 spi-max-frequency:
28 clock-names:
31 '#clock-cells':
34 clock-output-names:
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/linux/drivers/mmc/host/
H A Dsunplus-mmc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Author: Li-hao Kuo <lhjeff911@gmail.com>
11 #include <linux/dma-mapping.h>
18 #include <linux/mmc/slot-gpio.h>
44 #define SPMMC_HW_DMA_RST BIT(9)
45 #define SPMMC_DMAIDLE BIT(10)
65 #define SPMMC_SDINT_SDCMPEN BIT(0)
66 #define SPMMC_SDINT_SDCMP BIT(1)
67 #define SPMMC_SDINT_SDCMPCLR BIT(2)
68 #define SPMMC_SDINT_SDIOEN BIT(3)
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/linux/drivers/gpu/drm/exynos/
H A Dexynos_drm_fimd.c1 // SPDX-License-Identifier: GPL-2.0-or-later
63 #define WKEYCON0_BASE(x) ((WKEYCON0 + 0x140) + ((x - 1) * 8))
65 #define WKEYCON1_BASE(x) ((WKEYCON1 + 0x140) + ((x - 1) * 8))
77 /* display mode change control register except exynos4 */
85 #define LCD_WR_SETUP(x) ((x) << 12)
195 u32 clkdiv; member
203 { .compatible = "samsung,s3c6400-fimd",
205 { .compatible = "samsung,s5pv210-fimd",
207 { .compatible = "samsung,exynos3250-fimd",
209 { .compatible = "samsung,exynos4210-fimd",
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/linux/drivers/gpu/drm/tilcdc/
H A Dtilcdc_crtc.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/dma-mapping.h>
65 struct drm_device *dev = crtc->dev; in set_scanout()
66 struct tilcdc_drm_private *priv = dev->dev_private; in set_scanout()
73 start = gem->dma_addr + fb->offsets[0] + in set_scanout()
74 crtc->y * fb->pitches[0] + in set_scanout()
75 crtc->x * fb->format->cpp[0]; in set_scanout()
77 end = start + (crtc->mode.vdisplay * fb->pitches[0]); in set_scanout()
84 if (priv->rev == 1) in set_scanout()
85 end -= 1; in set_scanout()
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/linux/drivers/video/fbdev/
H A Ds3c-fb.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* linux/drivers/video/s3c-fb.c
5 * Copyright 2008-2010 Simtec Electronics
15 #include <linux/dma-mapping.h>
31 * setting of the alpha-blending functions that each window has, so only
35 * output timings and as the control for the output power-down state.
38 /* note, the previous use of <mach/regs-fb.h> to get platform specific data
58 #define VALID_BPP(x) (1 << ((x) - 1))
67 * struct s3c_fb_variant - fb variant information
83 * @has_clksel: Set if VIDCON0 register has CLKSEL bit.
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/linux/drivers/net/wireless/broadcom/brcm80211/include/
H A Dchipcommon.h1 // SPDX-License-Identifier: ISC
49 /* gpio - cleared only by power-on-reset */
79 u32 clkdiv; /* corerev >= 3 */ member
234 #define CC_CAP_MIPSEB 0x00000004 /* MIPS is in big-endian mode */
238 #define CC_CAP_UARTGPIO 0x00000020 /* UARTs own GPIOs 15:12 */
251 #define CC_CAP_BKPLN64 0x08000000 /* 64-bit backplane */
262 #define CC_SR_CTL0_ENABLE_MASK BIT(0)
/linux/include/linux/ssb/
H A Dssb_driver_chipcommon.h1 /* SPDX-License-Identifier: GPL-2.0-only */
27 #define SSB_CHIPCO_CAP_MIPSEB 0x00000004 /* MIPS in BigEndian Mode */
30 #define SSB_CHIPCO_CAP_UARTGPIO 0x00000020 /* UARTs on GPIO 15-12 */
52 #define SSB_CHIPCO_CAP_64BIT 0x08000000 /* 64-bit Backplane */
174 #define SSB_CHIPCO_SYSCLKCTL_CLKDIV 0xFFFF0000 /* ClkDiv (ILP = 1/(4+divisor)) */
296 #define SSB_PMU1_PLLCTL2_NDIVMODE 0x000E0000 /* NDIV mode */
321 #define SSB_PMURES_4312_BB_PLL_FILTBYP 12
338 #define SSB_PMURES_4325_LNLDO4_PU 12
362 #define SSB_PMURES_4328_BG_FILTBYP 12
384 #define SSB_PMURES_5354_BG_FILTBYP 12
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/linux/include/linux/bcma/
H A Dbcma_driver_chipcommon.h1 /* SPDX-License-Identifier: GPL-2.0 */
23 #define BCMA_CC_CAP_MIPSEB 0x00000004 /* MIPS in BigEndian Mode */
26 #define BCMA_CC_CAP_UARTGPIO 0x00000020 /* UARTs on GPIO 15-12 */
49 #define BCMA_CC_CAP_64BIT 0x08000000 /* 64-bit Backplane */
103 #define BCMA_CC_CHIPST_4706_PKG_OPTION BIT(0) /* 0: full-featured package 1: low-cost package */
104 #define BCMA_CC_CHIPST_4706_SFLASH_PRESENT BIT(1) /* 0: parallel, 1: serial flash is present */
105 #define BCMA_CC_CHIPST_4706_SFLASH_TYPE BIT(2) /* 0: 8b-p/ST-s flash, 1: 16b-p/Atmal-s flash */
106 #define BCMA_CC_CHIPST_4706_MIPS_BENDIAN BIT(3) /* 0: little, 1: big endian */
107 #define BCMA_CC_CHIPST_4706_PCIE1_DISABLE BIT(5) /* PCIE1 enable strap pin */
108 #define BCMA_CC_CHIPST_5357_NAND_BOOT BIT(4) /* NAND boot, valid for CC rev 38 and/or BCM5357 */
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/linux/drivers/tty/serial/
H A Damba-pl011.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Copyright (C) 2010 ST-Ericsson SA
11 * This is a generic driver for ARM AMBA-type serial ports. They
12 * have a lot of 16550-like features, but are not register compatible.
35 #include <linux/dma-mapping.h>
54 #define UART_DUMMY_DR_RX BIT(16)
82 /* The size of the array - must be last */
268 unsigned int fifosize; /* vendor-specific */
269 unsigned int fixed_baud; /* vendor-set fixed baud rate */
270 char type[12];
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/linux/drivers/net/ethernet/actions/
H A Dowl-emac.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/dma-mapping.h>
19 #include "owl-emac.h"
27 return readl(priv->base + reg); in owl_emac_reg_read()
32 writel(data, priv->base + reg); in owl_emac_reg_write()
63 return priv->netdev->dev.parent; in owl_emac_get_dev()
129 return dma_map_single(dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE); in owl_emac_dma_map_tx()
142 return CIRC_SPACE(ring->head, ring->tail, ring->size); in owl_emac_ring_num_unused()
148 return (cur + 1) & (ring->size - 1); in owl_emac_ring_get_next()
153 ring->head = owl_emac_ring_get_next(ring, ring->head); in owl_emac_ring_push_head()
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/linux/drivers/net/ethernet/chelsio/cxgb3/
H A Dt3_hw.c2 * Copyright (c) 2003-2008 Chelsio, Inc. All rights reserved.
14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
41 * t3_wait_op_done_val - wait until an operation is completed
44 * @mask: a single-bit field within @reg that indicates completion
50 * Wait until an operation is completed by checking a bit in a register
53 * operation completes and -EAGAIN otherwise.
67 if (--attempts == 0) in t3_wait_op_done_val()
68 return -EAGAIN; in t3_wait_op_done_val()
75 * t3_write_regs - write a bunch of registers
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/linux/drivers/media/usb/gspca/
H A Dsonixj.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2009-2011 Jean-François Moine <http://moinejf.free.fr>
17 MODULE_AUTHOR("Jean-François Moine <http://moinejf.free.fr>");
103 #define SCL_SEL_OD 0x20 /* open-drain mode */
301 /* sequence specific to the sensors - !! index = SENSOR_xxx */
616 {0xb1, 0x5c, 0x06, 0x00, 0x00, 0x00, 0x00, 0x10}, /* op mode ctrl */
627 {0xb1, 0x5c, 0x20, 0x00, 0x00, 0x00, 0x00, 0x10}, /* read mode */
646 /* factory mode */
652 /* auto-exposure speed (0) / white balance mode (auto RGB) */
654 * set color mode */
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