| /linux/arch/sparc/kernel/ |
| H A D | head_64.S | 99 ba,a,pt %xcc, 1f 174 stx %l1, [%sp + 2047 + 128 + 0x00] ! service, "peer" 176 stx %l3, [%sp + 2047 + 128 + 0x08] ! num_args, 1 177 stx %l3, [%sp + 2047 + 128 + 0x10] ! num_rets, 1 178 stx %l2, [%sp + 2047 + 128 + 0x18] ! arg1, 0 179 stx %g0, [%sp + 2047 + 128 + 0x20] ! ret1 181 add %sp, (2047 + 128), %o0 ! argument array 183 ldx [%sp + 2047 + 128 + 0x20], %l4 ! prom root node 198 stx %l1, [%sp + 2047 + 128 + 0x00] ! service, "getprop" 200 stx %l3, [%sp + 2047 + 128 + 0x08] ! num_args, 4 [all …]
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| /linux/fs/btrfs/tests/ |
| H A D | free-space-tests.c | 99 test_err("couldn't create a bitmap entry %d", ret); in test_bitmaps() 132 /* Test a bit straddling two bitmaps */ in test_bitmaps() 213 * Ok so a little more evil, extent entry and bitmap at the same offset, in test_bitmaps_and_extents() 218 test_err("couldn't add to a bitmap %d", ret); in test_bitmaps_and_extents() 297 * This blew up before, we have part of the free space in a bitmap and in test_bitmaps_and_extents() 381 * Before we were able to steal free space from a bitmap entry to an extent 382 * entry, we could end up with 2 entries representing a contiguous free space. 383 * One would be an extent entry and the other a bitmap entry. Since in order 384 * to allocate space to a caller we use only 1 entry, we couldn't return that 410 * immediately adjacent to a bitmap entry, where the bitmap starts in test_steal_space_from_bitmap_to_extent() [all …]
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| /linux/Documentation/admin-guide/device-mapper/ |
| H A D | dm-service-time.rst | 5 dm-service-time is a path selector module for device-mapper targets, 6 which selects a path with the shortest estimated service time for 10 of in-flight I/Os on a path with the performance value of the path. 11 The performance value is a relative throughput value among all paths 12 in a path-group, and it can be specified as a table argument. 30 other paths having a positive value are available. 36 'A' if the path is active, 'F' if the path is failed. 51 Basically, dm-service-time selects a path having minimum service time 78 In case that 2 paths (sda and sdb) are used with repeat_count == 128 82 # echo "0 10 multipath 0 0 1 1 service-time 0 2 2 8:0 128 1 8:16 128 4" \ [all …]
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| H A D | dm-queue-length.rst | 5 dm-queue-length is a path selector module for device-mapper targets, 6 which selects a path with the least number of in-flight I/Os. 22 <status>: 'A' if the path is active, 'F' if the path is failed. 32 dm-queue-length selects a path with the minimum 'in-flight'. 37 In case that 2 paths (sda and sdb) are used with repeat_count == 128. 41 # echo "0 10 multipath 0 0 1 1 queue-length 0 2 1 8:0 128 8:16 128" \ 45 test: 0 10 multipath 0 0 1 1 queue-length 0 2 1 8:0 128 8:16 128 48 test: 0 10 multipath 2 0 0 0 1 1 E 0 2 1 8:0 A 0 0 8:16 A 0 0
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| H A D | dm-dust.rst | 8 This target behaves similarly to a linear target. At a given time, 9 the user can send a message to the target to start failing read 10 requests on specific blocks (to emulate the behavior of a hard disk 22 This emulates the "remapped sector" behavior of a drive with bad 25 Normally, a drive that is encountering bad sectors will most likely 32 simulating a "failure" event where bad sectors start to appear. 48 (minimum 512, maximum 1073741824, must be a power of 2) 59 (For a device with a block size of 512 bytes) 65 (For a device with a block size of 4096 bytes) 78 $ sudo dd if=/dev/mapper/dust1 of=/dev/null bs=512 count=128 iflag=direct [all …]
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| /linux/tools/testing/selftests/net/ |
| H A D | bareudp.sh | 13 # * A chain of 4 network namespaces, connected with veth pairs. Each veth 14 # is assigned an IPv4 and an IPv6 address. A host-route allows a veth to 24 # * NS1 and NS2 are the intermediate namespaces. They use a bareudp device to 32 # | * IPv6 address: 2001:db8::100/128 | 33 # | * IPv6 address: 2001:db8::200/128 | 35 # | * IPv6 route: 2001:db8::103/128 reachable via 2001:db8::11 | 36 # | * IPv6 route: 2001:db8::203/128 reachable via 2001:db8::11 | 41 # | | * IPv6 address: 2001:db8::10, peer 2001:db8::11/128 | 53 # | * IPv6 address: 2001:db8::11, peer 2001:db8::10/128 | 63 # | | * IPv6 address: 2001:db8::21, peer 2001:db8::22/128 | [all …]
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| /linux/lib/crc/arm/ |
| H A D | crc-t10dif-core.S | 24 // This software is available to you under a choice of one of two 49 // IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 75 .arch armv8-a 124 * where each vector element is a byte, ordered from least to most 152 * a := { w0*x0, w0*x2, w0*x4, w0*x6 }, { y0*z0, y0*z2, y0*z4, y0*z6 } 165 vld1.64 {q12}, [r4, :128] 218 vld1.64 {FOLD_CONSTS}, [fold_consts_ptr, :128]! 224 // For sizes less than 256 bytes, we can't fold 128 bytes at a time. 230 // Load the first 128 data bytes. Byte swapping is necessary to make 258 // Load the constants for folding across 128 bytes. [all …]
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| H A D | crc32-core.S | 21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 22 * General Public License version 2 for more details (a copy is included 25 * You should have received a copy of the GNU General Public License 40 * PCLMULQDQ is a new instruction in Intel SSE4.2, the reference can be found 55 .arch armv8-a 61 * [x4*128+32 mod P(x) << 32)]' << 1 = 0x154442bd4 64 * [(x4*128-32 mod P(x) << 32)]' << 1 = 0x1c6e41596 135 vld1.8 {q1-q2}, [BUF, :128]! 136 vld1.8 {q3-q4}, [BUF, :128]! 161 vld1.8 {q5}, [BUF, :128]! [all …]
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| /linux/tools/testing/selftests/bpf/ |
| H A D | test_lwt_ip_encap.sh | |
| /linux/lib/crypto/x86/ |
| H A D | polyval-pclmul-avx.S | 7 * instructions. It works on 8 blocks at a time, by precomputing the first 8 12 * than 128. We then compute p(x) = h^8m_0 + ... + h^1m_7 where multiplication 16 * modulus g(x) = x^128 + x^127 + x^126 + x^121 + 1. 54 * Performs schoolbook1_iteration on two lists of 128-bit polynomials of length 66 * Computes the product of two 128-bit polynomials at the memory locations 128 * Computes the 128-bit reduction of PH : PL. Stores the result in dest. 131 * x^128 + x^127 + x^126 + x^121 + 1. 133 * We have a 256-bit polynomial PH : PL = P_3 : P_2 : P_1 : P_0 that is the 134 * product of two 128-bit polynomials in Montgomery form. We need to reduce it 136 * of x^128, this product has two extra factors of x^128. To get it back into [all …]
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| /linux/lib/crypto/arm64/ |
| H A D | polyval-ce-core.S | 9 * It works on 8 blocks at a time, by precomputing the first 8 keys powers h^8, 14 * than 128. We then compute p(x) = h^8m_0 + ... + h^1m_7 where multiplication 18 * modulus g(x) = x^128 + x^127 + x^126 + x^121 + 1. 65 .arch armv8-a+crypto 72 * Computes the product of two 128-bit polynomials in X and Y and XORs the 154 * Computes the 128-bit reduction of PH : PL. Stores the result in dest. 157 * x^128 + x^127 + x^126 + x^121 + 1. 159 * We have a 256-bit polynomial PH : PL = P_3 : P_2 : P_1 : P_0 that is the 160 * product of two 128-bit polynomials in Montgomery form. We need to reduce it 162 * of x^128, this product has two extra factors of x^128. To get it back into [all …]
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| /linux/arch/arm/nwfpe/ |
| H A D | softfloat-macros | 12 of this code was written as part of a project to build a fixed-point vector 34 Shifts `a' right by the number of bits given in `count'. If any nonzero 38 result will be either 0 or 1, depending on whether `a' is zero or nonzero. 42 INLINE void shift32RightJamming( bits32 a, int16 count, bits32 *zPtr ) 46 z = a; 49 z = ( a>>count ) | ( ( a<<( ( - count ) & 31 ) ) != 0 ); 52 z = ( a != 0 ); 59 Shifts `a' right by the number of bits given in `count'. If any nonzero 63 result will be either 0 or 1, depending on whether `a' is zero or nonzero. 67 INLINE void shift64RightJamming( bits64 a, int16 count, bits64 *zPtr ) [all …]
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| /linux/tools/testing/selftests/bpf/progs/ |
| H A D | uninit_stack.c | 7 /* Read an uninitialized value from stack at a fixed offset */ 13 /* force stack depth to be 128 */ \ in read_uninit_stack_fixed_off() 14 *(u64*)(r10 - 128) = r1; \ in read_uninit_stack_fixed_off() 23 /* read from a spill of a wrong size, it is a separate \ in read_uninit_stack_fixed_off() 34 /* Read an uninitialized value from stack at a variable offset */ 43 /* give r0 a range [-31, -1] */ \ in read_uninit_stack_var_off() 60 /* Pass a pointer to uninitialized stack memory to a helpe [all...] |
| /linux/lib/crc/x86/ |
| H A D | crc-pclmul-template.S | 22 // Emit a VEX (or EVEX) coded instruction if allowed, or emulate it using the 30 // \insn gives the instruction without a "v" prefix and including any immediate 76 // Broadcast an aligned 128-bit mem operand to all 128-bit lanes of a vector 89 // is msb-first use \bswap_mask to reflect the bytes within each 128-bit lane. 126 // Multiply the given \src1_terms of each 128-bit lane of \src1 by the given 127 // \src2_terms of each 128-bit lane of \src2, and write the result(s) to \dst. 135 // byte-reflection is needed; otherwise it must be a vector register. \consts 136 // is a vector register containing the needed fold constants, and \tmp is a 150 // unaligned mem operand, \consts is a vector register containing the needed 151 // fold constants, \bswap_mask is a vector register containing the [all …]
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| /linux/tools/testing/selftests/net/forwarding/ |
| H A D | ip6gre_custom_multipath_hash.sh | 7 # policy, SW2 will only look at the outer IP addresses, hence only a single 108 __simple_if_init g1 v$ol1 2001:db8:3::1/128 109 ip route add vrf v$ol1 2001:db8:3::2/128 via 2001:db8:10::2 120 ip route del vrf v$ol1 2001:db8:3::2/128 121 __simple_if_fini g1 2001:db8:3::1/128 135 ip -6 route add vrf v$ul21 2001:db8:3::1/128 via 2001:db8:10::1 136 ip -6 route add vrf v$ul21 2001:db8:3::2/128 \ 143 ip -6 route del vrf v$ul21 2001:db8:3::2/128 144 ip -6 route del vrf v$ul21 2001:db8:3::1/128 159 ip -6 route add vrf v$ul31 2001:db8:3::2/128 vi [all...] |
| /linux/tools/perf/pmu-events/arch/x86/pantherlake/ |
| H A D | floating-point.json | 97 "BriefDescription": "Counts number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 100 "EventName": "FP_ARITH_OPS_RETIRED.128B_PACKED_DOUBLE", 101 "PublicDescription": "Number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.", 107 "BriefDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 110 "EventName": "FP_ARITH_OPS_RETIRED.128B_PACKED_SINGLE", 111 "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.", 137 "BriefDescription": "Number of SSE/AVX computational 128-bit packed single and 256-bit packed double precision FP instructions retired; some instructions will count twice as noted below. Each count represents 2 or/and 4 computation operations, 1 for each element. Applies to SSE* and AVX* packed single precision and packed double precision FP instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.", 141 "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision and 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 or/and 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point and packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.", 235 "BriefDescription": "Counts the number of retired instructions whose sources are a packed 128 bi [all...] |
| /linux/drivers/infiniband/hw/hfi1/ |
| H A D | qsfp.c | 44 /* do a read to force the write into the chip */ in hfi1_setsda() 68 /* do a read to force the write into the chip */ in hfi1_setscl() 369 * Set the qsfp page based on a zero-based address in qsfp_write() 370 * and a page size of QSFP_PAGESIZE bytes. in qsfp_write() 376 /* QSFPs require a 5-10msec delay after write operations */ in qsfp_write() 393 /* QSFPs require a 5-10msec delay after write operations */ in qsfp_write() 429 * Set the qsfp page based on a zero-based address in qsfp_read() 430 * and a page size of QSFP_PAGESIZE bytes. in qsfp_read() 435 /* QSFPs require a 5-10msec delay after write operations */ in qsfp_read() 465 * Perform a stand-alone single QSFP read. Acquire the resource, do the [all …]
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| /linux/tools/testing/selftests/mm/ |
| H A D | virtual_address_range.c | |
| /linux/Documentation/leds/ |
| H A D | leds-class-multicolor.rst | 53 A user first writes the multi_intensity file with the brightness levels 54 for each LED that are necessary to achieve a certain color output from a 77 global 'brightness' control. Assuming a max_brightness of 255 the user 78 may want to dim the LED color group to half. The user would write a value of 79 128 to the global brightness file then the values written to each LED will be 86 # echo 128 > /sys/class/leds/multicolor:status/brightness 92 adjusted_red_value = 128 * 138/255 = 69 93 adjusted_green_value = 128 * 43/255 = 21 94 adjusted_blue_value = 128 * 226/255 = 113 104 128
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| /linux/tools/testing/selftests/drivers/net/mlxsw/ |
| H A D | fib_offload.sh | 20 simple_if_init $tor1_p1 2001:db8:1::2/128 2001:db8:1::3/128 25 simple_if_fini $tor1_p1 2001:db8:1::2/128 2001:db8:1::3/128 30 simple_if_init $tor2_p1 2001:db8:2::2/128 2001:db8:2::3/128 35 simple_if_fini $tor2_p1 2001:db8:2::2/128 2001:db8:2::3/128 78 # Add a prefix route and check that it is offloaded. 101 # Delete the routes and add the same route with a different nexthop 116 # Add a multipath route and check that it is offloaded. 138 # Append a nexthop with an higher metric and check that the offload 147 # Prepend a nexthop with a lower metric and check that it is offloaded 188 # Replace multipath route with prefix route. A prefix route cannot [all …]
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| /linux/arch/riscv/crypto/ |
| H A D | aes-riscv64-zvkned-zvbb-zvkg.S | 9 // a copy in the file LICENSE in the source distribution or at 30 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 41 // - RISC-V Vector ('V') with VLEN >= 128 && VLEN < 2048 76 // TWEAKS: N 128-bit tweaks T*(x^i) for i in 0..(N - 1) 78 // MULTS_BREV: N 128-bit values x^N, bit-reversed. Only if N > 1. 100 // Save a copy of T bit-reversed in v12. 104 // Generate x^i for i in 0..(N - 1), i.e. 128-bit values 1 << i assuming 105 // that N <= 128. Though, this code actually requires N < 64 (or 125 // widening to 64 bits per element. When reinterpreted as N 128-bit 126 // values, this is the needed sequence of 128-bit values 1 << i (x^i). [all …]
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| /linux/drivers/pci/ |
| H A D | rebar.c | 28 * Return: encoded BAR Size as defined in the PCIe spec (0=1MB, 31=128TB) 42 * @size: encoded BAR Size as defined in the PCIe spec (0=1MB, 31=128TB) 62 * Helper to find the position of the control register for a BAR. 103 * Get the possible sizes of a resizable BAR as bitmask. 105 * Return: A bitmask of possible sizes (bit 0=1MB, bit 31=128TB), or %0 if 133 * @size: encoded size as defined in the PCIe spec (0=1MB, 31=128TB) 150 * pci_rebar_get_max_size - get the maximum supported size of a BAR 154 * Get the largest supported size of a resizable BAR as a size. 157 * (0=1MB, 31=128TB), or %-NOENT on error. 172 * pci_rebar_get_current_size - get the current size of a Resizable BAR [all …]
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| /linux/arch/mips/lib/ |
| H A D | multi3.c | 15 static inline long long notrace dmulu(long long a, long long b) in dmulu() argument 19 asm ("dmulu %0,%1,%2" : "=r" (res) : "r" (a), "r" (b)); in dmulu() 23 /* multiply 64-bit unsigned values, high 64-bits of 128-bit result returned */ 24 static inline long long notrace dmuhu(long long a, long long b) in dmuhu() argument 28 asm ("dmuhu %0,%1,%2" : "=r" (res) : "r" (a), "r" (b)); in dmuhu() 32 /* multiply 128-bit values, low 128-bits returned */ 33 ti_type notrace __multi3(ti_type a, ti_type b) in __multi3() argument 37 aa.ti = a; in __multi3() 41 * a * b = (a.lo * b.lo) in __multi3() 42 * + 2^64 * (a.hi * b.lo + a.lo * b.hi) in __multi3() [all …]
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| /linux/drivers/input/misc/ |
| H A D | yealink.h | 40 * data[0] on return returns the key number, if it changes there's a new 138 /* _SEG( type a b c d e g f ) */ 180 _SEG('8', 22,16, 22,32, 22,64, 22,128, 23,128, 23,64, 23,32 ), 181 _SEG('8', 20,16, 20,32, 20,64, 20,128, 21,128, 21,64, 21,32 ), 182 _SEG('8', 18,16, 18,32, 18,64, 18,128, 19,128, 19,64, 19,32 ), 183 _SEG('8', 16,16, 16,32, 16,64, 16,128, 17,128, 17,64, 17,32 ), 184 _SEG('8', 14,16, 14,32, 14,64, 14,128, 15,128, 15,64, 15,32 ), 185 _SEG('8', 12,16, 12,32, 12,64, 12,128, 13,128, 13,64, 13,32 ), 186 _SEG('8', 10,16, 10,32, 10,64, 10,128, 11,128, 11,64, 11,32 ), 187 _SEG('8', 8,16, 8,32, 8,64, 8,128, 9,128, 9,64, 9,32 ), [all …]
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| /linux/crypto/ |
| H A D | Kconfig | 30 required if you want the system to operate in a FIPS 200 211 This converts an arbitrary crypto algorithm into a parallel 221 This is a generic software asynchronous crypto daemon that 223 into an asynchronous algorithm that executes in a kernel thread. 366 Rijndael appears to be consistently a very good performer in 367 both hardware and software across a wide range of computing 375 The AES specifies three key sizes: 128, 192 and 256 bits 384 Anubis is a variable key length cipher which can use keys from 385 128 bits to 320 bits in length. It was evaluated as a entrant 397 ARIA is a standard encryption algorithm of the Republic of Korea. [all …]
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