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/linux/Documentation/fb/
H A Dviafb.modes14 # Scan Frequency 31.469 kHz 59.94 Hz
29 # D: 25.175 MHz, H: 31.469 kHz, V: 59.94 Hz
32 # D: 24.823 MHz, H: 39.780 kHz, V: 60.00 Hz
39 # Scan Frequency 37.500 kHz 75.00 Hz
53 # D: 31.50 MHz, H: 37.500 kHz, V: 75.00 Hz
60 # Scan Frequency 43.269 kHz 85.00 Hz
74 # D: 36.000 MHz, H: 43.269 kHz, V: 85.00 Hz
77 # 640x480, 100 Hz, Non-Interlaced (43.163 MHz dotclock)
81 # Scan Frequency 50.900 kHz 100.00 Hz
94 mode "640x480-100"
[all …]
/linux/Documentation/i2c/busses/
H A Di2c-ismt.rst21 Specify the bus speed in kHz.
27 80 kHz
28 100 kHz
29 400 kHz
30 1000 kHz
/linux/drivers/comedi/drivers/
H A Ddt2811.c74 #define DT2811_OSC_BASE 1666 /* 600 kHz = 1666.6667ns */
80 * 0 1 600 kHz 0 1
81 * 1 10 60 kHz 1 10
82 * 2 2 300 kHz 2 100
83 * 3 3 200 kHz 3 1000
84 * 4 4 150 kHz 4 10000
85 * 5 5 120 kHz 5 100000
86 * 6 6 100 kHz 6 1000000
87 * 7 12 50 kHz 7 10000000
94 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000
[all …]
/linux/drivers/pwm/
H A Dpwm-argon-fan-hat.c7 * - fixed 30 kHz period
17 #define ARGON40_FAN_HAT_PERIOD_NS 33333 /* ~30 kHz */
29 *wfhw = 100; in argon_fan_hat_round_waveform_tohw()
31 *wfhw = mul_u64_u64_div_u64(wf->duty_length_ns, 100, ARGON40_FAN_HAT_PERIOD_NS); in argon_fan_hat_round_waveform_tohw()
44 wf->duty_length_ns = DIV64_U64_ROUND_UP(wf->period_length_ns * *wfhw, 100); in argon_fan_hat_round_waveform_fromhw()
H A Dpwm-sl28cpld.c14 * Let cnt[7:0] be the counter, clocked at 32kHz:
20 * | 2 | cnt[5] | cnt[4:0] | 1 kHz | 1000000 ns |
21 * | 3 | cnt[4] | cnt[3:0] | 2 kHz | 500000 ns |
25 * - The hardware cannot generate a 100% duty cycle if the prescaler is 0.
54 #define SL28CPLD_PWM_CLK 32000 /* 32 kHz */
156 * Work around the hardware limitation. See also above. Trap 100% duty in sl28cpld_pwm_apply()
/linux/Documentation/hwmon/
H A Dmcp3021.rst36 compatible interface. Standard (100 kHz) and Fast (400 kHz) I2C modes are
H A Dlm85.rst153 driven by a 22.5 kHz clock. This is a global mode, not per-PWM output,
154 which means that setting any PWM frequency above 11.3 kHz will switch
155 all 3 PWM outputs to a 22.5 kHz frequency. Conversely, setting any PWM
156 frequency below 11.3 kHz will switch all 3 PWM outputs to a frequency
157 between 10 and 100 Hz, which can then be tuned separately.
179 The LM96000 supports additional high frequency PWM modes (22.5 kHz, 24 kHz,
180 25.7 kHz, 27.7 kHz and 30 kHz), which can be configured on a per-PWM basis.
266 -1 PWM always 100% (full on)
H A Df71805f.rst85 in2 VIN2 VRAM 100K 100K 2.00 ~1.25 V [1]_
86 in3 VIN3 VCHIPSET 47K 100K 1.47 2.24 V [2]_
150 from 187.5 kHz (default) to 31 Hz. The best frequency depends on the
153 above the audible range, such as 25 kHz, may be a good choice; if this
155 not going below 1 kHz, as the fan tachometers get confused by lower
/linux/drivers/nvmem/
H A Dlpc18xx_eeprom.c38 /* EEPROM device requires a ~1500 kHz clock (min 800 kHz, max 1600 kHz) */
109 /* Wait 100 us while the EEPROM wakes up */ in lpc18xx_eeprom_gather_write()
110 usleep_range(100, 200); in lpc18xx_eeprom_gather_write()
137 /* Wait 100 us while the EEPROM wakes up */ in lpc18xx_eeprom_read()
138 usleep_range(100, 200); in lpc18xx_eeprom_read()
/linux/drivers/i2c/busses/
H A Di2c-stm32.h19 STM32_I2C_SPEED_STANDARD, /* 100 kHz */
20 STM32_I2C_SPEED_FAST, /* 400 kHz */
H A Di2c-pca-isa.c30 /* Data sheet recommends 59kHz for 100kHz operation due to variation
76 udelay(100); in pca_isa_waitforcompletion()
/linux/arch/arm/boot/dts/allwinner/
H A Dsun5i-reference-design-tablet.dtsi55 brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
88 * The gsl1680 is rated at 400KHz and it will not work reliable at
89 * 100KHz, this has been confirmed on multiple different q8 tablets.
90 * All other devices on this bus are also rated for 400KHz.
/linux/drivers/media/radio/si470x/
H A Dradio-si470x-common.c108 /* Spacing (kHz) */
109 /* 0: 200 kHz (USA, Australia) */
110 /* 1: 100 kHz (Europe, Japan) */
111 /* 2: 50 kHz */
114 MODULE_PARM_DESC(space, "Spacing: 0=200kHz 1=100kHz *2=50kHz*");
241 /* Spacing (kHz) */ in si470x_get_step()
243 /* 0: 200 kHz (USA, Australia) */ in si470x_get_step()
246 /* 1: 100 kHz (Europe, Japan) */ in si470x_get_step()
248 return 100 * 16; in si470x_get_step()
249 /* 2: 50 kHz */ in si470x_get_step()
[all …]
/linux/sound/soc/codecs/
H A Dwm8974.c56 static const char *wm8974_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz" };
61 static const char *wm8974_eq3[] = {"650Hz", "850Hz", "1.1kHz", "1.4kHz" };
62 static const char *wm8974_eq4[] = {"1.8kHz", "2.4kHz", "3.2kHz", "4.1kHz" };
63 static const char *wm8974_eq5[] = {"5.3kHz", "6.
[all...]
H A Dmax98373.c88 9, 10, TLV_DB_SCALE_ITEM(500, 100, 0),
91 0, 9, TLV_DB_SCALE_ITEM(800, 100, 0),
95 2, 4, TLV_DB_SCALE_ITEM(100, 100, 0),
98 0, 9, TLV_DB_SCALE_ITEM(800, 100, 0),
105 10, 13, TLV_DB_SCALE_ITEM(-500, 100, 0),
106 14, 15, TLV_DB_SCALE_ITEM(-100, 50, 0),
109 0, 15, TLV_DB_SCALE_ITEM(-1500, 100, 0),
166 "333kHz", "192kHz", "6
[all...]
H A Dmax9877.c35 24, 31, TLV_DB_SCALE_ITEM(-700, 100, 0)
51 "1176KHz",
52 "1100KHz",
53 "700KHz",
/linux/drivers/gpu/drm/sprd/
H A Dmegacores_pll.c20 #define MIN_OUTPUT_FREQ (100)
32 const u32 khz = 1000; in dphy_calc_pll_param() local
34 const unsigned long long factor = 100; in dphy_calc_pll_param()
38 pll->potential_fvco = pll->freq / khz; in dphy_calc_pll_param()
39 pll->ref_clk = PHY_REF_CLK / khz; in dphy_calc_pll_param()
219 const u32 scale = 100; in dphy_timing_config()
257 - 525 * t_byteck / 100, t_byteck) - 2; in dphy_timing_config()
260 + ((tmp >> 16) & 0xffff) - 525 * t_byteck / 100, in dphy_timing_config()
273 range[L] = 100 * scale; in dphy_timing_config()
/linux/sound/firewire/motu/
H A Dmotu-protocol-v1.c36 // 0x00000004: 48.0 kHz
37 // 0x00000000: 44.1 kHz
68 // 0x00000000: force to low rate (44.1/48.0 kHz).
97 // 0x00000000: 44.1 kHz
98 // 0x00000008: 48.0 kHz
99 // 0x00000010: 88.2 kHz
100 // 0x00000018: 96.0 kHz
355 // 100 msec. in switch_fetching_mode_828()
356 msleep(100); in switch_fetching_mode_828()
/linux/Documentation/devicetree/bindings/rtc/
H A Dingenic,rtc.yaml68 (assuming RTC clock at 32 kHz)
73 default: 100
76 (assuming RTC clock at 32 kHz)
/linux/include/linux/platform_data/
H A Dad7793.h12 * @AD7793_CLK_SRC_INT: Internal 64 kHz clock, not available at the CLK pin.
13 * @AD7793_CLK_SRC_INT_CO: Internal 64 kHz clock, available at the CLK pin.
88 * @burnout_current: If set to true the 100nA burnout current is enabled.
/linux/arch/arm/boot/dts/synaptics/
H A Dberlin2cd-valve-steamlink.dts22 active-delay = <100>;
24 wait-delay = <100>;
32 /* kHz uV */
/linux/arch/arm64/boot/dts/renesas/
H A Dr8a779g3-sparrow-hawk-fan-argon40.dtso31 /* PWM period: 33us ~= 30 kHz */
34 cooling-levels = <0 50 100 150 200 255>;
35 fan-shutdown-percent = <100>;
/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-axxia.txt15 the default 100 kHz frequency will be used. As only Normal and Fast modes
/linux/arch/arm/boot/dts/marvell/
H A Dkirkwood-km_common.dtsi32 i2c-gpio,delay-us = <2>; /* ~100 kHz */
/linux/arch/arm/boot/dts/nxp/mxs/
H A Dimx23-sansa.dts180 i2c-gpio,delay-us = <2>; /* ~100 kHz */
189 i2c-gpio,delay-us = <2>; /* ~100 kHz */

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