Home
last modified time | relevance | path

Searched +full:100 +full:pg (Results 1 – 25 of 130) sorted by relevance

123456

/linux/Documentation/devicetree/bindings/iio/pressure/
H A Dhoneywell,hsc030pa.yaml64 006MD, 010MD, 016MD, 025MD, 040MD, 060MD, 100MD, 160MD, 250MD,
66 010MG, 016MG, 025MG, 040MG, 060MG, 100MG, 160MG, 250MG, 400MG,
67 600MG, 001BG, 1.6BG, 2.5BG, 004BG, 006BG, 010BG, 100KA, 160KA,
70 100KD, 160KD, 250KD, 400KD, 250LG, 400LG, 600LG, 001KG, 1.6KG,
71 2.5KG, 004KG, 006KG, 010KG, 016KG, 025KG, 040KG, 060KG, 100KG,
72 160KG, 250KG, 400KG, 600KG, 001GG, 015PA, 030PA, 060PA, 100PA,
75 010NG, 020NG, 030NG, 001PG, 005PG, 015PG, 030PG, 060PG, 100PG,
76 150PG, NA]
/linux/net/ceph/
H A Ddebugfs.c86 ((map->osd_weight[i]*100) >> 16), in osdmap_show()
88 ((ceph_get_primary_affinity(map, i)*100) >> 16), in osdmap_show()
93 struct ceph_pg_mapping *pg = in osdmap_show() local
96 seq_printf(s, "pg_temp %llu.%x [", pg->pgid.pool, in osdmap_show()
97 pg->pgid.seed); in osdmap_show()
98 for (i = 0; i < pg->pg_temp.len; i++) in osdmap_show()
100 pg->pg_temp.osds[i]); in osdmap_show()
104 struct ceph_pg_mapping *pg = in osdmap_show() local
107 seq_printf(s, "primary_temp %llu.%x %d\n", pg->pgid.pool, in osdmap_show()
108 pg->pgid.seed, pg->primary_temp.osd); in osdmap_show()
[all …]
/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_dcb.c133 /* PG */ in bnx2x_dump_dcbx_drv_param()
386 #define DCBX_LOCAL_MIB_MAX_TRY_READ (100)
540 /* Do not allow 0-100 configuration in bnx2x_dcbx_2cos_limit_update_ets_config()
983 bp->dcbx_config_params.admin_configuration_bw_precentage[0] = 100; in bnx2x_dcbx_init_params()
999 bp->dcbx_config_params.admin_recommendation_bw_precentage[0] = 100; in bnx2x_dcbx_init_params()
1127 data[i].pg = DCBX_ILLEGAL_PG; in bnx2x_dcbx_get_num_pg_traf_type()
1137 if (data[traf_type].pg == add_pg) { in bnx2x_dcbx_get_num_pg_traf_type()
1149 data[help_data->num_of_pg].pg = add_pg; in bnx2x_dcbx_get_num_pg_traf_type()
1171 cos_data->data[0].cos_bw = 100; in bnx2x_dcbx_ets_disabled_entry_data()
1213 /* There can be only one strict pg */ in bnx2x_dcbx_separate_pauseable_from_non()
[all …]
/linux/drivers/iio/pressure/
H A Dhsc030pa.c102 [HSC100MD] = "100MD", [HSC160MD] = "160MD", [HSC250MD] = "250MD",
107 [HSC040MG] = "040MG", [HSC060MG] = "060MG", [HSC100MG] = "100MG",
111 [HSC010BG] = "010BG", [HSC100KA] = "100KA", [HSC160KA] = "160KA",
118 [HSC100KD] = "100KD", [HSC160KD] = "160KD", [HSC250KD] = "250KD",
123 [HSC040KG] = "040KG", [HSC060KG] = "060KG", [HSC100KG] = "100KG",
126 [HSC030PA] = "030PA", [HSC060PA] = "060PA", [HSC100PA] = "100PA",
134 [HSC001PG] = "001PG", [HSC005PG] = "005PG", [HSC015PG] = "015PG",
135 [HSC030PG] = "030PG", [HSC060PG] = "060PG", [HSC100PG] = "100PG",
136 [HSC150PG] = "150PG",
/linux/drivers/soc/tegra/
H A Dpmc.c588 unsigned int retries = 100; in tegra20_powergate_set()
621 status == true, 1, 100); in tegra114_powergate_set()
629 status == true, 1, 100); in tegra114_powergate_set()
707 static int tegra_powergate_prepare_clocks(struct tegra_powergate *pg) in tegra_powergate_prepare_clocks() argument
709 unsigned long safe_rate = 100 * 1000 * 1000; in tegra_powergate_prepare_clocks()
713 for (i = 0; i < pg->num_clks; i++) { in tegra_powergate_prepare_clocks()
714 pg->clk_rates[i] = clk_get_rate(pg->clks[i]); in tegra_powergate_prepare_clocks()
716 if (!pg->clk_rates[i]) { in tegra_powergate_prepare_clocks()
721 if (pg->clk_rates[i] <= safe_rate) in tegra_powergate_prepare_clocks()
730 err = clk_set_rate(pg->clks[i], safe_rate); in tegra_powergate_prepare_clocks()
[all …]
/linux/drivers/net/ethernet/mellanox/mlx4/
H A Dfw_qos.h71 * tc_tx_bw, pg and ratelimit are arrays where each index represents a TC.
78 * classes within a TC group must equal 100% for correct operation.
79 * @pg: The TC group the traffic class is associated with.
85 u8 *pg, u16 *ratelimit);
H A Dfw_qos.c56 __be16 pg; member
58 __be16 max_bw_units; /* 3-100Mbps, 4-1Gbps, other values - reserved */
112 u8 *pg, u16 *ratelimit) in mlx4_SET_PORT_SCHEDULER() argument
146 tc->pg = htons(pg[i]); in mlx4_SET_PORT_SCHEDULER()
H A Den_dcb_nl.c334 en_err(priv, "Bad ETS BW sum: %d. Should be exactly 100%%\n", in mlx4_en_ets_validate()
349 __u8 pg[IEEE_8021QAZ_MAX_TCS] = { 0 }; in mlx4_en_config_port_scheduler() local
354 /* higher TC means higher priority => lower pg */ in mlx4_en_config_port_scheduler()
358 pg[i] = MLX4_EN_TC_VENDOR; in mlx4_en_config_port_scheduler()
362 pg[i] = num_strict++; in mlx4_en_config_port_scheduler()
366 pg[i] = MLX4_EN_TC_ETS; in mlx4_en_config_port_scheduler()
372 return mlx4_SET_PORT_SCHEDULER(mdev->dev, priv->port, tc_tx_bw, pg, in mlx4_en_config_port_scheduler()
/linux/drivers/net/ethernet/qlogic/
H A DKconfig55 mode of DCB is supported. PG and PFC values are related only
77 tristate "QLogic QED 25/40/100Gb core driver"
90 bool "QLogic QED 25/40/100Gb SR-IOV support"
100 tristate "QLogic QED 25/40/100Gb Ethernet NIC"
/linux/drivers/mmc/host/
H A Dusdhi6rol0.c167 struct usdhi6_page pg; /* current page from an SG */ member
324 host->head_pg.page = host->pg.page; in usdhi6_blk_bounce()
325 host->head_pg.mapped = host->pg.mapped; in usdhi6_blk_bounce()
326 host->pg.page = nth_page(host->pg.page, 1); in usdhi6_blk_bounce()
327 host->pg.mapped = kmap(host->pg.page); in usdhi6_blk_bounce()
337 memcpy(host->bounce_buf + blk_head, host->pg.mapped, in usdhi6_blk_bounce()
362 WARN(host->pg.page, "%p not properly unmapped!\n", host->pg.page); in usdhi6_sg_map()
368 host->pg.page = sg_page(sg); in usdhi6_sg_map()
369 host->pg.mapped = kmap(host->pg.page); in usdhi6_sg_map()
385 host->blk_page = host->pg.mapped; in usdhi6_sg_map()
[all …]
/linux/drivers/net/ethernet/intel/ice/
H A Dice_dcb_nl.c106 new_cfg->etscfg.tcbwtable[0] = 100; in ice_dcbnl_setets()
109 new_cfg->etsrec.tcbwtable[0] = 100; in ice_dcbnl_setets()
424 * ice_dcbnl_get_pg_tc_cfg_tx - get CEE PG Tx config
449 dev_dbg(ice_pf_to_dev(pf), "Get PG config prio=%d tc=%d\n", prio, in ice_dcbnl_get_pg_tc_cfg_tx()
454 * ice_dcbnl_set_pg_tc_cfg_tx - set CEE PG Tx config
515 dev_dbg(ice_pf_to_dev(pf), "Get PG BW config tc=%d bw_pct=%d\n", in ice_dcbnl_get_pg_bwg_cfg_tx()
520 * ice_dcbnl_set_pg_bwg_cfg_tx - set CEE PG Tx BW config
549 * ice_dcbnl_get_pg_tc_cfg_rx - Get CEE PG Rx config
553 * @pgid: the PG ID
581 * @pgid: the PG ID
[all …]
/linux/include/linux/ceph/
H A Dosdmap.h37 #define CEPH_POOL_FLAG_HASHPSPOOL (1ULL << 0) /* hash pg seed and pool id
179 u32 *osd_weight; /* 0 = failed, 0x10000 = 100% normal */
186 struct rb_root pg_upmap; /* PG := raw set */
236 pr_warn("incomplete pg encoding\n"); in ceph_decode_pgid()
241 pr_warn("do not understand pg encoding %d > 1\n", in ceph_decode_pgid()
/linux/drivers/iio/light/
H A Dltr390.c49 #define LTR390_FRACTIONAL_PRECISION 100
55 * For the default resolution of 18-bit (integration time: 100ms) and default
57 * 2300 / ((3/18) * (100/400)) = 95.83
182 *val = LTR390_WINDOW_FACTOR * 6 * 100; in ltr390_read_raw()
335 /* default value of integration time from pg: 15 of the datasheet */ in ltr390_probe()
337 /* default value of gain from pg: 16 of the datasheet */ in ltr390_probe()
/linux/include/uapi/linux/
H A Ddcbnl.h109 * value is given as percentage (1-100)
183 * @willing: willing bit in the PG tlv
184 * @error: error bit in the PG tlv
185 * @pg_en: enable bit of the PG feature
188 * @prio_pg: priority to PG mapping indexed by priority
446 * @DCB_ATTR_CEE_PEER_PG: peer PG configuration - get only
449 * @DCB_ATTR_CEE_TX_PG: TX PG configuration (DCB_CMD_PGTX_GCFG)
450 * @DCB_ATTR_CEE_RX_PG: RX PG configuration (DCB_CMD_PGRX_GCFG)
/linux/tools/testing/selftests/drivers/net/mlxsw/
H A Dqos_pfc.sh5 # of 1. This stream is consistently prioritized as priority 1, is put to PG
83 _100KB=$((100 * _1KB))
171 # Configure qdisc so that we can configure PG and therefore pool
232 # PG0 will get autoconfigured to Xoff, give PG1 arbitrarily 100K, which
399 local pct_in=$((din * 100 / size))
402 check_err $? "Relative ingress out of expected bounds, $pct_in% should be 100%"
/linux/drivers/misc/mei/
H A Dhw-me.c269 * mei_me_pg_state - translate internal pg state
741 * mei_me_pg_set - write pg enter register
760 * mei_me_pg_unset - write pg exit register
781 * mei_me_pg_legacy_enter_sync - perform legacy pg entry procedure
818 * mei_me_pg_legacy_exit_sync - perform legacy pg exit procedure
872 * mei_me_pg_in_transition - is device now in pg transition
876 * Return: true if in pg transition, false otherwise
885 * mei_me_pg_is_enabled - detect if PG is supported by HW
889 * Return: true is pg supported, false otherwise
908 dev_dbg(dev->dev, "pg: not supported: d0i3 = %d HGP = %d hbm version %d.%d ?= %d.%d\n", in mei_me_pg_is_enabled()
[all …]
/linux/drivers/gpu/drm/i915/display/
H A Dintel_display_power_well.c334 enum skl_power_gate pg) in gen9_wait_for_power_well_fuses() argument
336 /* Timeout 5us for PG#0, for other PGs 1us */ in gen9_wait_for_power_well_fuses()
339 SKL_FUSE_PG_DIST_STATUS(pg), 1)); in gen9_wait_for_power_well_fuses()
349 enum skl_power_gate pg; in hsw_power_well_enable() local
351 pg = DISPLAY_VER(dev_priv) >= 11 ? ICL_PW_CTL_IDX_TO_PG(pw_idx) : in hsw_power_well_enable()
355 if (IS_ALDERLAKE_P(dev_priv) && pg == SKL_PG1) in hsw_power_well_enable()
362 * fuses we only have to wait for that PW/PG's fuse state in hsw_power_well_enable()
365 if (pg == SKL_PG1) in hsw_power_well_enable()
374 enum skl_power_gate pg; in hsw_power_well_enable() local
376 pg = DISPLAY_VER(dev_priv) >= 11 ? ICL_PW_CTL_IDX_TO_PG(pw_idx) : in hsw_power_well_enable()
[all …]
/linux/arch/s390/crypto/
H A Dprng.c138 u8 *pg, pblock[80] = { in generate_entropy() local
153 pg = (u8 *) __get_free_page(GFP_KERNEL); in generate_entropy()
154 if (!pg) { in generate_entropy()
162 get_random_bytes(pg, PAGE_SIZE / 2); in generate_entropy()
166 u64 *p = (u64 *)(pg + offset); in generate_entropy()
170 cpacf_klmd(CPACF_KLMD_SHA_512, pblock, pg, PAGE_SIZE); in generate_entropy()
179 memzero_explicit(pg, PAGE_SIZE); in generate_entropy()
180 free_page((unsigned long)pg); in generate_entropy()
398 * 32 bytes and produces 100% entropy. So we pull 64 bytes in prng_sha512_instantiate()
/linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/
H A Dhclge_tm.c28 * @shaper_level: the shaper level. eg: port, pg, priority, queueset
723 vport->dwrr = 100; /* 100 percent as init */ in hclge_tm_vport_tc_info_update()
787 #define BW_PERCENT 100 in hclge_tm_pg_info_init()
891 /* Cfg pg schd */ in hclge_tm_pg_shaper_cfg()
895 /* Pg to pri */ in hclge_tm_pg_shaper_cfg()
934 /* cfg pg schd */ in hclge_tm_pg_dwrr_cfg()
938 /* pg to prio */ in hclge_tm_pg_dwrr_cfg()
2012 "failed to get pg to pri map, ret = %d\n", ret); in hclge_tm_get_pg_to_pri_map()
2032 "failed to get pg weight, ret = %d\n", ret); in hclge_tm_get_pg_weight()
2050 "failed to get pg sch mode, ret = %d\n", ret); in hclge_tm_get_pg_sch_mode()
[all …]
/linux/drivers/eisa/
H A Deisa.ids249 CPQ525D "Compaq 5/100 System Processor Board-1MB"
253 CPQ528A "Compaq 5/100 System Processor Board w/ Transaction Blaster"
254 CPQ528B "Compaq 5/100 System Processor Board"
299 CPQ925D "Compaq 5/100 System Processor Board-1MB"
311 CPQ928A "Compaq 5/100 System Processor Board w/ Transaction Blaster"
312 CPQ928B "Compaq 5/100 System Processor Board"
331 CPQ935D "Compaq 5/100 System Processor Board-1MB"
335 CPQ938A "Compaq 5/100 System Processor Board w/ Transaction Blaster"
336 CPQ938B "Compaq 5/100 System Processor Board"
342 CPQ945D "Compaq 5/100 System Processor Board-1MB"
[all …]
/linux/drivers/net/ethernet/qlogic/qlcnic/
H A Dqlcnic_dcb.c798 u8 i, cnt, pg; in qlcnic_dcb_get_pg_tc_cfg_tx() local
817 pg = *pgid; in qlcnic_dcb_get_pg_tc_cfg_tx()
821 if (temp->valid && (pg == temp->pgid)) in qlcnic_dcb_get_pg_tc_cfg_tx()
825 tc_cfg->bwg_percent = (100 / cnt); in qlcnic_dcb_get_pg_tc_cfg_tx()
1065 struct cee_pg *pg) in qlcnic_dcb_cee_peer_get_pg() argument
1080 pg->pg_bw[j] = peer->pg_cfg[i].total_bw_percent; in qlcnic_dcb_cee_peer_get_pg()
1086 pg->prio_pg[j++] = map; in qlcnic_dcb_cee_peer_get_pg()
/linux/arch/x86/mm/pat/
H A Dmemtype.c126 static inline enum page_cache_mode get_page_memtype(struct page *pg) in get_page_memtype() argument
128 unsigned long pg_flags = pg->flags & _PGMT_MASK; in get_page_memtype()
140 static inline void set_page_memtype(struct page *pg, in set_page_memtype() argument
163 old_flags = READ_ONCE(pg->flags); in set_page_memtype()
166 } while (!try_cmpxchg(&pg->flags, &old_flags, new_flags)); in set_page_memtype()
169 static inline enum page_cache_mode get_page_memtype(struct page *pg) in get_page_memtype() argument
173 static inline void set_page_memtype(struct page *pg, in set_page_memtype() argument
336 * 100 4 WB : Reserved in pat_bp_init()
/linux/arch/arm/boot/dts/allwinner/
H A Dsun9i-a80-cubieboard4.dts200 vcc-pg-supply = <&reg_ldo_io0>;
327 regulator-name = "vcc-pg";
416 * Set a 100ms delay to account for PMIC
H A Dsun9i-a80-optimus.dts197 vcc-pg-supply = <&reg_ldo_io0>;
324 regulator-name = "vcc-pg";
413 * Set a 100ms delay to account for PMIC
/linux/fs/ocfs2/cluster/
H A Dheartbeat.c293 mlog(ML_ERROR, "Heartbeat write timeout to device %pg after %u " in o2hb_write_timeout()
363 msleep(100); in o2hb_send_nego_msg()
389 printk(KERN_NOTICE "o2hb: node %d hb write hung for %ds on region %s (%pg).\n", in o2hb_nego_timeout()
405 printk(KERN_NOTICE "o2hb: all nodes hb write hung, maybe region %s (%pg) is down.\n", in o2hb_nego_timeout()
426 …printk(KERN_NOTICE "o2hb: node %d hb write hung for %ds on region %s (%pg), negotiate timeout with… in o2hb_nego_timeout()
444 printk(KERN_NOTICE "o2hb: receive negotiate timeout message from node %d on region %s (%pg).\n", in o2hb_nego_timeout_handler()
460 printk(KERN_NOTICE "o2hb: negotiate timeout approved by master node on region %s (%pg).\n", in o2hb_nego_approve_handler()
696 mlog(ML_ERROR, "%s (%pg): expected(%u:0x%llx, 0x%llx), " in o2hb_check_own_slot()
870 printk(KERN_NOTICE "o2hb: Region %s (%pg) is now a quorum device\n", in o2hb_set_quorum_device()
929 mlog(ML_ERROR, "Node %d has written a bad crc to %pg\n", in o2hb_check_slot()
[all …]

123456