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/linux/Documentation/devicetree/bindings/ata/
H A Dbrcm,sata-brcm.yaml72 reg = <0xf045a000 0xa9c>, <0xf0458040 0x24>;
74 interrupts = <0 30 0>;
76 #size-cells = <0>;
78 sata0: sata-port@0 {
79 reg = <0>;
80 phys = <&sata_phy 0>;
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm7445.dtsi17 #size-cells = <0>;
19 cpu@0 {
23 reg = <0>;
50 reg = <0x00 0xffd01000 0x00 0x1000>,
51 <0x00 0xffd02000 0x00 0x2000>,
52 <0x00 0xffd04000 0x00 0x2000>,
53 <0x00 0xffd06000 0x00 0x2000>;
70 ranges = <0 0x00 0xf0000000 0x1000000>;
74 reg = <0x40ab00 0x20>;
84 reg = <0x404000 0x51c>;
[all …]
/linux/arch/mips/boot/dts/brcm/
H A Dbcm7360.dtsi9 #size-cells = <0>;
13 cpu@0 {
16 reg = <0>;
25 #address-cells = <0>;
35 #clock-cells = <0>;
41 #clock-cells = <0>;
51 ranges = <0 0x10000000 0x01000000>;
55 reg = <0x411400 0x30>;
66 reg = <0x403000 0x30>;
75 reg = <0x400000 0xdc>;
[all …]
H A Dbcm7362.dtsi9 #size-cells = <0>;
13 cpu@0 {
16 reg = <0>;
31 #address-cells = <0>;
41 #clock-cells = <0>;
47 #clock-cells = <0>;
57 ranges = <0 0x10000000 0x01000000>;
61 reg = <0x411400 0x30>, <0x411600 0x30>;
72 reg = <0x403000 0x30>;
81 reg = <0x400000 0xdc>;
[all …]
H A Dbcm7346.dtsi9 #size-cells = <0>;
13 cpu@0 {
16 reg = <0>;
31 #address-cells = <0>;
41 #clock-cells = <0>;
47 #clock-cells = <0>;
57 ranges = <0 0x10000000 0x01000000>;
61 reg = <0x411400 0x30>, <0x411600 0x30>;
72 reg = <0x403000 0x30>;
81 reg = <0x400000 0xdc>;
[all …]
H A Dbcm7425.dtsi9 #size-cells = <0>;
13 cpu@0 {
16 reg = <0>;
31 #address-cells = <0>;
41 #clock-cells = <0>;
47 #clock-cells = <0>;
57 ranges = <0 0x10000000 0x01000000>;
61 reg = <0x41a400 0x30>, <0x41a600 0x30>;
72 reg = <0x403000 0x30>;
81 reg = <0x400000 0xdc>;
[all …]
H A Dbcm7435.dtsi9 #size-cells = <0>;
13 cpu@0 {
16 reg = <0>;
43 #address-cells = <0>;
53 #clock-cells = <0>;
59 #clock-cells = <0>;
69 ranges = <0 0x10000000 0x01000000>;
73 reg = <0x41b500 0x40>, <0x41b600 0x40>,
74 <0x41b700 0x40>, <0x41b800 0x40>;
85 reg = <0x403000 0x30>;
[all …]
/linux/drivers/clk/sunxi-ng/
H A Dccu-sun50i-h616.c35 * testing", so it's not modelled and then force to 0.
37 #define SUN50I_H616_PLL_CPUX_REG 0x000
43 .reg = 0x000,
51 #define SUN50I_H616_PLL_DDR0_REG 0x010
57 .p = _SUNXI_CCU_DIV(0, 1), /* output divider */
59 .reg = 0x010,
66 #define SUN50I_H616_PLL_DDR1_REG 0x018
72 .p = _SUNXI_CCU_DIV(0, 1), /* output divider */
74 .reg = 0x018,
81 #define SUN50I_H616_PLL_PERIPH0_REG 0x020
[all …]
H A Dccu-sun50i-a100.c31 #define SUN50I_A100_PLL_PERIPH1_PATTERN0 0xd1303333
41 * testing", so it's not modelled and then force to 0.
43 #define SUN50I_A100_PLL_CPUX_REG 0x000
49 .reg = 0x000,
57 #define SUN50I_A100_PLL_DDR0_REG 0x010
63 .p = _SUNXI_CCU_DIV(0, 1), /* output divider */
65 .reg = 0x010,
73 #define SUN50I_A100_PLL_PERIPH0_REG 0x020
79 .p = _SUNXI_CCU_DIV(0, 1), /* output divider */
82 .reg = 0x020,
[all …]
H A Dccu-sun20i-d1.c34 * in the user manual. So it's not modelled and forced to 0.
36 #define SUN20I_D1_PLL_CPUX_REG 0x000
42 .reg = 0x000,
50 #define SUN20I_D1_PLL_DDR0_REG 0x010
56 .p = _SUNXI_CCU_DIV(0, 1), /* output divider */
58 .reg = 0x010,
65 #define SUN20I_D1_PLL_PERIPH0_REG 0x020
72 .reg = 0x020,
83 pll_periph0_4x_hws, 0x020, 16, 3, 0);
85 pll_periph0_4x_hws, 0x020, 20, 3, 0);
[all …]
H A Dccu-sun55i-a523.c45 #define SUN55I_A523_PLL_DDR0_REG 0x010
51 .p = _SUNXI_CCU_DIV(0, 1), /* output divider */
53 .reg = 0x010,
66 #define SUN55I_A523_PLL_PERIPH0_REG 0x020
73 .reg = 0x020,
94 pll_periph0_4x_hws, 0x020, 16, 3, 0);
99 pll_periph0_4x_hws, 0x020, 20, 3, 0);
101 pll_periph0_4x_hws, 0x020, 2, 3, 0);
106 pll_periph0_2x_hws, 2, 1, 0);
108 pll_periph0_2x_hws, 3, 1, 0);
[all …]
/linux/drivers/net/wireless/realtek/rtw88/
H A Drtw8703b_tables.c9 { 0, 0, 0, 0x00000e08, 0x0000ff00, 0x00003200, },
10 { 0, 0, 0, 0x0000086c, 0xffffff00, 0x32323200, },
11 { 0, 0, 0, 0x00000e00, 0xffffffff, 0x34363636, },
12 { 0, 0, 0, 0x00000e04, 0xffffffff, 0x28303234, },
13 { 0, 0, 0, 0x00000e10, 0xffffffff, 0x30343434, },
14 { 0, 0, 0, 0x00000e14, 0xffffffff, 0x26262830, },
19 /* Regd: FCC -> 0, ETSI -> 2, MKK -> 1
20 * Band: 2.4G -> 0, 5G -> 1
21 * Bandwidth (bw): 20M -> 0, 40M -> 1, 80M -> 2, 160M -> 3
22 * Rate Section (rs): CCK -> 0, OFDM -> 1, HT -> 2, VHT -> 3
[all …]
H A Drtw8723d_table.c10 0x020, 0x00000013,
11 0x02F, 0x00000010,
12 0x077, 0x00000007,
13 0x421, 0x0000000F,
14 0x428, 0x0000000A,
15 0x429, 0x00000010,
16 0x430, 0x00000000,
17 0x431, 0x00000000,
18 0x432, 0x00000000,
19 0x433, 0x00000001,
[all …]
H A Drtw8821c_table.c10 0x010, 0x00000043,
11 0x025, 0x0000001D,
12 0x026, 0x000000CE,
13 0x04F, 0x00000001,
14 0x029, 0x000000F9,
15 0x420, 0x00000080,
16 0x421, 0x0000001F,
17 0x428, 0x0000000A,
18 0x429, 0x00000010,
19 0x430, 0x00000000,
[all …]
H A Drtw8822b_table.c10 0x029, 0x000000F9,
11 0x420, 0x00000080,
12 0x421, 0x0000001F,
13 0x428, 0x0000000A,
14 0x429, 0x00000010,
15 0x430, 0x00000000,
16 0x431, 0x00000000,
17 0x432, 0x00000000,
18 0x433, 0x00000001,
19 0x434, 0x00000004,
[all …]
H A Drtw8822c_table.c16 0x83000000, 0x00000000, 0x40000000, 0x00000000,
17 0x1D90, 0x300001FF,
18 0x1D90, 0x300101FE,
19 0x1D90, 0x300201FD,
20 0x1D90, 0x300301FC,
21 0x1D90, 0x300401FB,
22 0x1D90, 0x300501FA,
23 0x1D90, 0x300601F9,
24 0x1D90, 0x300701F8,
25 0x1D90, 0x300801F7,
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_7_1_d.h27 #define mmMC_CONFIG 0x800
28 #define mmMC_ARB_AGE_CNTL 0x9bf
29 #define mmMC_ARB_RET_CREDITS2 0x9c0
30 #define mmMC_ARB_FED_CNTL 0x9c1
31 #define mmMC_ARB_GECC2_STATUS 0x9c2
32 #define mmMC_ARB_GECC2_MISC 0x9c3
33 #define mmMC_ARB_GECC2_DEBUG 0x9c4
34 #define mmMC_ARB_GECC2_DEBUG2 0x9c5
35 #define mmMC_ARB_PERF_CID 0x9c6
36 #define mmMC_ARB_GECC2 0x9c9
[all …]
H A Dgmc_8_1_d.h27 #define mmMC_CONFIG 0x800
28 #define mmMC_ARB_ATOMIC 0x9be
29 #define mmMC_ARB_AGE_CNTL 0x9bf
30 #define mmMC_ARB_RET_CREDITS2 0x9c0
31 #define mmMC_ARB_FED_CNTL 0x9c1
32 #define mmMC_ARB_GECC2_STATUS 0x9c2
33 #define mmMC_ARB_GECC2_MISC 0x9c3
34 #define mmMC_ARB_GECC2_DEBUG 0x9c4
35 #define mmMC_ARB_GECC2_DEBUG2 0x9c5
36 #define mmMC_ARB_PERF_CID 0x9c6
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Dam437x-gp-evm.dts57 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
58 brightness-levels = <0 51 53 56 62 75 101 152 255>;
68 pinctrl-0 = <&matrix_keypad_default>;
80 linux,keymap = <0x00000201 /* P1 */
81 0x00010202 /* P2 */
82 0x01000067 /* UP */
83 0x0101006a /* RIGHT */
84 0x02000069 /* LEFT */
85 0x0201006c>; /* DOWN */
103 #clock-cells = <0>;
[all …]
/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra210.c22 #define TEGRA_PIN_PEX_L0_RST_N_PA0 _GPIO(0)
182 #define TEGRA_PIN_CORE_PWR_REQ _PIN(0)
1266 #define DRV_PINGROUP_REG_A 0x8d4 /* bank 0 */
1267 #define PINGROUP_REG_A 0x3000 /* bank 1 */
1290 .mux_bit = 0, \
1306 .drv_bank = 0, \
1335 .drv_bank = 0, \
1354 …PINGROUP(sdmmc1_clk_pm0, SDMMC1, RSVD1, RSVD2, RSVD3, 0x3000, Y, Y, N, N,…
1355 …PINGROUP(sdmmc1_cmd_pm1, SDMMC1, SPI3, RSVD2, RSVD3, 0x3004, Y, Y, N, N,…
1356 …PINGROUP(sdmmc1_dat3_pm2, SDMMC1, SPI3, RSVD2, RSVD3, 0x3008, Y, Y, N, N,…
[all …]
/linux/drivers/net/wireless/realtek/rtl8xxxu/
H A Dcore.c52 MODULE_PARM_DESC(dma_agg_pages, "Set DMA aggregation pages (range 1-127, 0 to disable)");
54 #define USB_VENDOR_ID_REALTEK 0x0bda
65 { .bitrate = 10, .hw_value = DESC_RATE_1M, .flags = 0 },
66 { .bitrate = 20, .hw_value = DESC_RATE_2M, .flags = 0 },
67 { .bitrate = 55, .hw_value = DESC_RATE_5_5M, .flags = 0 },
68 { .bitrate = 110, .hw_value = DESC_RATE_11M, .flags = 0 },
69 { .bitrate = 60, .hw_value = DESC_RATE_6M, .flags = 0 },
70 { .bitrate = 90, .hw_value = DESC_RATE_9M, .flags = 0 },
71 { .bitrate = 120, .hw_value = DESC_RATE_12M, .flags = 0 },
72 { .bitrate = 180, .hw_value = DESC_RATE_18M, .flags = 0 },
[all …]