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/linux/drivers/clk/axs10x/
H A Di2s_pll_clock.c19 #define PLL_IDIV_REG 0x0
20 #define PLL_FBDIV_REG 0x4
21 #define PLL_ODIV0_REG 0x8
22 #define PLL_ODIV1_REG 0xC
34 { 1024000, 0x104, 0x451, 0x10E38, 0x2000 },
35 { 1411200, 0x104, 0x596, 0x10D35, 0x2000 },
36 { 1536000, 0x208, 0xA28, 0x10B2C, 0x2000 },
37 { 2048000, 0x82, 0x451, 0x10E38, 0x2000 },
38 { 2822400, 0x82, 0x596, 0x10D35, 0x2000 },
39 { 3072000, 0x104, 0xA28, 0x10B2C, 0x2000 },
[all …]
/linux/Documentation/devicetree/bindings/crypto/
H A Dqcom-qce.yaml160 reg = <0xfd45a000 0x6000>;
167 iommus = <&apps_smmu 0x584 0x0011>,
168 <&apps_smmu 0x586 0x0011>,
169 <&apps_smmu 0x594 0x0011>,
170 <&apps_smmu 0x596 0x0011>;
/linux/drivers/media/i2c/
H A Dsaa717x.c36 MODULE_PARM_DESC(debug, "Debug level (0-1)");
76 #define TUNER_AUDIO_MONO 0 /* LL */
90 int fw_addr = reg == 0x454 || (reg >= 0x464 && reg <= 0x478) || reg == 0x480 || reg == 0x488; in saa717x_write()
94 msg.flags = 0; in saa717x_write()
96 mm1[0] = (reg >> 8) & 0xff; in saa717x_write()
97 mm1[1] = reg & 0xff; in saa717x_write()
100 mm1[4] = (value >> 16) & 0xff; in saa717x_write()
101 mm1[3] = (value >> 8) & 0xff; in saa717x_write()
102 mm1[2] = value & 0xff; in saa717x_write()
104 mm1[2] = value & 0xff; in saa717x_write()
[all …]
/linux/include/linux/mfd/mt6358/
H A Dregisters.h10 #define MT6358_SWCID 0xa
11 #define MT6358_TOPSTATUS 0x28
12 #define MT6358_TOP_RST_MISC 0x14c
13 #define MT6358_MISC_TOP_INT_CON0 0x188
14 #define MT6358_MISC_TOP_INT_STATUS0 0x194
15 #define MT6358_TOP_INT_STATUS0 0x19e
16 #define MT6358_SCK_TOP_INT_CON0 0x52e
17 #define MT6358_SCK_TOP_INT_STATUS0 0x53a
18 #define MT6358_EOSC_CALI_CON0 0x540
19 #define MT6358_EOSC_CALI_CON1 0x542
[all …]
/linux/include/linux/mfd/mt6359/
H A Dregisters.h10 #define MT6359_SWCID 0xa
11 #define MT6359_TOPSTATUS 0x2a
12 #define MT6359_TOP_RST_MISC 0x14c
13 #define MT6359_MISC_TOP_INT_CON0 0x188
14 #define MT6359_MISC_TOP_INT_STATUS0 0x194
15 #define MT6359_TOP_INT_STATUS0 0x19e
16 #define MT6359_SCK_TOP_INT_CON0 0x528
17 #define MT6359_SCK_TOP_INT_STATUS0 0x534
18 #define MT6359_EOSC_CALI_CON0 0x53a
19 #define MT6359_EOSC_CALI_CON1 0x53c
[all …]
/linux/include/linux/mfd/mt6357/
H A Dregisters.h10 #define MT6357_TOP0_ID 0x0
11 #define MT6357_TOP0_REV0 0x2
12 #define MT6357_TOP0_DSN_DBI 0x4
13 #define MT6357_TOP0_DSN_DXI 0x6
14 #define MT6357_HWCID 0x8
15 #define MT6357_SWCID 0xa
16 #define MT6357_PONSTS 0xc
17 #define MT6357_POFFSTS 0xe
18 #define MT6357_PSTSCTL 0x10
19 #define MT6357_PG_DEB_STS0 0x12
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsm8350.dtsi38 #clock-cells = <0>;
46 #clock-cells = <0>;
52 #size-cells = <0>;
54 CPU0: cpu@0 {
57 reg = <0x0 0x0>;
58 clocks = <&cpufreq_hw 0>;
61 qcom,freq-domain = <&cpufreq_hw 0>;
81 reg = <0x0 0x100>;
82 clocks = <&cpufreq_hw 0>;
85 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
H A Dsm8250.dtsi80 #clock-cells = <0>;
88 #clock-cells = <0>;
94 #size-cells = <0>;
96 CPU0: cpu@0 {
99 reg = <0x0 0x0>;
100 clocks = <&cpufreq_hw 0>;
107 qcom,freq-domain = <&cpufreq_hw 0>;
109 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
115 cache-size = <0x20000>;
121 cache-size = <0x400000>;
[all …]
/linux/include/linux/mfd/madera/
H A Dregisters.h14 #define MADERA_SOFTWARE_RESET 0x00
15 #define MADERA_HARDWARE_REVISION 0x01
16 #define MADERA_CTRL_IF_CFG_1 0x08
17 #define MADERA_CTRL_IF_CFG_2 0x09
18 #define MADERA_CTRL_IF_CFG_3 0x0A
19 #define MADERA_WRITE_SEQUENCER_CTRL_0 0x16
20 #define MADERA_WRITE_SEQUENCER_CTRL_1 0x17
21 #define MADERA_WRITE_SEQUENCER_CTRL_2 0x18
22 #define MADERA_TONE_GENERATOR_1 0x20
23 #define MADERA_TONE_GENERATOR_2 0x21
[all …]
/linux/drivers/mfd/
H A Dcs47l92-tables.c21 { 0x3A2, 0x2C29 },
22 { 0x3A3, 0x0E00 },
23 { 0x281, 0x0000 },
24 { 0x282, 0x0000 },
25 { 0x4EA, 0x0100 },
26 { 0x22B, 0x0000 },
27 { 0x4A0, 0x0080 },
28 { 0x4A1, 0x0000 },
29 { 0x4A2, 0x0000 },
30 { 0x180B, 0x033F },
[all …]
/linux/drivers/hid/bpf/progs/
H A Dhid_report_helpers.h22 * returns 0, which allows using it everywhere an expression
27 0 * (int) sizeof( \
36 #define i4(v_) (((__u8)(v_) & 0xf) + must_be((v_) >= -0x8 && (v_) <= 0x7, "not a i4"))
37 #define i8(v_) ((__u8)(v_) + must_be((v_) >= -0x80 && (v_) <= 0xff, "not a i8/u8"))
38 #define i16(v_) ((__u16)(v_) + must_be((v_) >= -0x8000 && (v_) <= 0xffff, "not a i16/u16"))
39 #define i32(v_) ((__u32)(v_) + must_be((v_) >= -0x80000000L && (v_) <= 0xffffffffL, \
43 #define LE16(v_) i16(v_) & 0xff, ((v_) >> 8) & 0xff
44 #define LE32(v_) i32(v_) & 0xff, ((v_) >> 8) & 0xff, ((v_) >> 16) & 0xff, ((v_) >> 24) & 0xff
47 * of the collection (0xa?) and the EndCollection item (0xc?).
55 * LogicalRange_i8(0, 1)
[all …]
/linux/arch/parisc/kernel/
H A Dhardware.c29 {HPHW_NPROC,0x01,0x4,0x0,"Indigo (840, 930)"},
30 {HPHW_NPROC,0x8,0x4,0x01,"Firefox(825,925)"},
31 {HPHW_NPROC,0xA,0x4,0x01,"Top Gun (835,834,935,635)"},
32 {HPHW_NPROC,0xB,0x4,0x01,"Technical Shogun (845, 645)"},
33 {HPHW_NPROC,0xF,0x4,0x01,"Commercial Shogun (949)"},
34 {HPHW_NPROC,0xC,0x4,0x01,"Cheetah (850, 950)"},
35 {HPHW_NPROC,0x80,0x4,0x01,"Cheetah (950S)"},
36 {HPHW_NPROC,0x81,0x4,0x01,"Jaguar (855, 955)"},
37 {HPHW_NPROC,0x82,0x4,0x01,"Cougar (860, 960)"},
38 {HPHW_NPROC,0x83,0x4,0x13,"Panther (865, 870, 980)"},
[all …]