Searched +full:0 +full:x1d9f (Results 1 – 5 of 5) sorted by relevance
27 #define mmPIPE0_PG_CONFIG 0x176028 #define mmPIPE0_PG_ENABLE 0x176129 #define mmPIPE0_PG_STATUS 0x176230 #define mmPIPE1_PG_CONFIG 0x176431 #define mmPIPE1_PG_ENABLE 0x176532 #define mmPIPE1_PG_STATUS 0x176633 #define mmPIPE2_PG_CONFIG 0x176834 #define mmPIPE2_PG_ENABLE 0x176935 #define mmPIPE2_PG_STATUS 0x176a36 #define mmPIPE3_PG_CONFIG 0x176c[all …]
27 #define mmPIPE0_PG_CONFIG 0x2c028 #define mmPIPE0_PG_ENABLE 0x2c129 #define mmPIPE0_PG_STATUS 0x2c230 #define mmPIPE1_PG_CONFIG 0x2c331 #define mmPIPE1_PG_ENABLE 0x2c432 #define mmPIPE1_PG_STATUS 0x2c533 #define mmPIPE2_PG_CONFIG 0x2c634 #define mmPIPE2_PG_ENABLE 0x2c735 #define mmPIPE2_PG_STATUS 0x2c836 #define mmDCFEV0_PG_CONFIG 0x2db[all …]
27 #define mmPIPE0_PG_CONFIG 0x2c028 #define mmPIPE0_PG_ENABLE 0x2c129 #define mmPIPE0_PG_STATUS 0x2c230 #define mmPIPE1_PG_CONFIG 0x2c331 #define mmPIPE1_PG_ENABLE 0x2c432 #define mmPIPE1_PG_STATUS 0x2c533 #define mmPIPE2_PG_CONFIG 0x2c634 #define mmPIPE2_PG_ENABLE 0x2c735 #define mmPIPE2_PG_STATUS 0x2c836 #define mmPIPE3_PG_CONFIG 0x2c9[all …]
27 // base address: 0x4828 …dispdec_VGA_MEM_WRITE_PAGE_ADDR 0x001229 …ne mmdispdec_VGA_MEM_WRITE_PAGE_ADDR_BASE_IDX 033 // base address: 0x4c34 …dispdec_VGA_MEM_READ_PAGE_ADDR 0x001435 …ne mmdispdec_VGA_MEM_READ_PAGE_ADDR_BASE_IDX 039 // base address: 0x040 …DC_PERFMON0_PERFCOUNTER_CNTL 0x002042 …DC_PERFMON0_PERFCOUNTER_CNTL2 0x002144 …DC_PERFMON0_PERFCOUNTER_STATE 0x0022[all …]