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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmediatek,mt8192-pinctrl.yaml149 reg = <0x10005000 0x1000>,
150 <0x11c20000 0x1000>,
151 <0x11d10000 0x1000>,
152 <0x11d30000 0x1000>,
153 <0x11d40000 0x1000>,
154 <0x11e20000 0x1000>,
155 <0x11e70000 0x1000>,
156 <0x11ea0000 0x1000>,
157 <0x11f20000 0x1000>,
158 <0x11f30000 0x1000>,
[all …]
H A Dmediatek,mt6893-pinctrl.yaml153 #define PINMUX_GPIO0__FUNC_GPIO0 (MTK_PIN_NO(0) | 0)
159 reg = <0x10005000 0x1000>,
160 <0x11c20000 0x0200>,
161 <0x11d10000 0x0200>,
162 <0x11e20000 0x0200>,
163 <0x11e70000 0x0200>,
164 <0x11ea0000 0x0200>,
165 <0x11f20000 0x0200>,
166 <0x11f30000 0x0200>,
167 <0x1100b000 0x1000>;
[all …]
H A Dmediatek,mt6779-pinctrl.yaml114 '-[0-9]*$':
158 enum: [0, 1]
165 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
166 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
167 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
170 enum: [0, 1, 2, 3]
177 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
178 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
179 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
182 enum: [0, 1, 2, 3]
[all …]
H A Dmediatek,mt8188-pinctrl.yaml188 reg = <0x10005000 0x1000>,
189 <0x11c00000 0x1000>,
190 <0x11e10000 0x1000>,
191 <0x11e20000 0x1000>,
192 <0x11ea0000 0x1000>,
193 <0x1000b000 0x1000>;
199 gpio-ranges = <&pio 0 0 176>;
201 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH 0>;
/linux/arch/m68k/ifpsp060/
H A Disp.sa1 .long 0x60ff0000,0x02360000,0x60ff0000,0x16260000
2 .long 0x60ff0000,0x12dc0000,0x60ff0000,0x11ea0000
3 .long 0x60ff0000,0x10de0000,0x60ff0000,0x12a40000
4 .long 0x60ff0000,0x12560000,0x60ff0000,0x122a0000
5 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
6 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
7 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
8 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
9 .long 0x2f00203a,0xfefc487b,0x0930ffff,0xfef8202f
10 .long 0x00044e74,0x00042f00,0x203afeea,0x487b0930
[all …]
/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mt8192.c13 * iocfg0:0x10005000, iocfg_rm:0x11C20000, iocfg_bm:0x11D10000,
14 * iocfg_bl:0x11D30000, iocfg_br:0x11D40000, iocfg_lm:0x11E20000,
15 * iocfg_lb:0x11E70000, iocfg_rt:0x11EA0000, iocfg_lt:0x11F20000,
16 * iocfg_tl:0x11F30000
22 32, 0)
29 PIN_FIELD(0, 228, 0x300, 0x10, 0, 4),
33 PIN_FIELD(0, 228, 0x0, 0x10, 0, 1),
37 PIN_FIELD(0, 228, 0x200, 0x10, 0, 1),
41 PIN_FIELD(0, 228, 0x100, 0x10, 0, 1),
45 PIN_FIELD_BASE(0, 0, 4, 0x00f0, 0x10, 8, 1),
[all …]
H A Dpinctrl-mt8188.c13 * iocfg[0]:0x10005000, iocfg[1]:0x11c00000, iocfg[2]:0x11e10000,
14 * iocfg[3]:0x11e20000, iocfg[4]:0x11ea0000
20 32, 0)
27 PIN_FIELD(0, 177, 0x0300, 0x10, 0, 4),
31 PIN_FIELD(0, 177, 0x0000, 0x10, 0, 1),
35 PIN_FIELD(0, 177, 0x0200, 0x10, 0, 1),
39 PIN_FIELD(0, 177, 0x0100, 0x10, 0, 1),
43 PIN_FIELD_BASE(0, 0, 1, 0x0170, 0x10, 8, 1),
44 PIN_FIELD_BASE(1, 1, 1, 0x0170, 0x10, 9, 1),
45 PIN_FIELD_BASE(2, 2, 1, 0x0170, 0x10, 10, 1),
[all …]