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/linux/Documentation/admin-guide/perf/
H A Dhisi-pmu.rst13 two HHAs (0 - 1) and four DDRCs (0 - 3), respectively.
32 e.g. hisi_sccl3_l3c0/rd_hit_cpipe is READ_HIT_CPIPE event of L3C index #0 in
35 e.g. hisi_sccl1_hha0/rx_operations is RX_OPERATIONS event of HHA index #0 in
57 $# perf stat -a -e hisi_sccl3_l3c0/config=0x02/ sleep 5
59 For HiSilicon uncore PMU v2 whose identifier is 0x30, the topology is the same
65 $# perf stat -a -e hisi_sccl3_l3c0/config=0x02,tt_core=0x3/ sleep 5
67 This will only count the operations from core/thread 0 and 1 in this cluster.
75 operations. tt_req is 3bits, 3'b100 represents read operations, 3'b101
79 $# perf stat -a -e hisi_sccl3_l3c0/config=0x02,tt_req=0x4/ sleep 5
97 $# perf stat -a -e hisi_sccl3_l3c0/config=0xb9,datasrc_cfg=0xE/,
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/linux/drivers/clk/imx/
H A Dclk-gate-93.c17 #define DIRECT_OFFSET 0x0
20 * 0b000 - LPCG will be OFF in any CPU mode.
21 * 0b100 - LPCG will be ON in any CPU mode.
23 #define LPM_SETTING_OFF 0x0
24 #define LPM_SETTING_ON 0x4
26 #define LPM_CUR_OFFSET 0x1c
28 #define AUTHEN_OFFSET 0x30
72 if (gate->share_count && (*gate->share_count)++ > 0) in imx93_clk_gate_enable()
79 return 0; in imx93_clk_gate_enable()
90 if (WARN_ON(*gate->share_count == 0)) in imx93_clk_gate_disable()
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/linux/sound/soc/intel/catpt/
H A Dregisters.h22 #define CATPT_SHIM_CS1 0x00
23 #define CATPT_SHIM_ISC 0x18
24 #define CATPT_SHIM_ISD 0x20
25 #define CATPT_SHIM_IMC 0x28
26 #define CATPT_SHIM_IMD 0x30
27 #define CATPT_SHIM_IPCC 0x38
28 #define CATPT_SHIM_IPCD 0x40
29 #define CATPT_SHIM_CLKCTL 0x78
30 #define CATPT_SHIM_CS2 0x80
31 #define CATPT_SHIM_LTRC 0xE
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/linux/arch/powerpc/kernel/
H A Dcpu_setup_power.c45 * LPES = 0b01 (HSRR0/1 used for 0x500)
46 * PECE = 0b111
48 * HDICE = 0
49 * VC = 0b100 (VPM0=1, VPM1=0, ISL=0)
50 * VRMASD = 0b10000 (L=1, LP=00)
56 lpcr |= (0x10ull << LPCR_VRMASD_SH) & LPCR_VRMASD; in init_LPCR_ISA206()
101 mtspr(SPRN_MMCRC, 0); in init_PMU_HV()
106 mtspr(SPRN_MMCRH, 0); in init_PMU_HV_ISA207()
111 mtspr(SPRN_MMCRA, 0); in init_PMU()
113 mtspr(SPRN_MMCR1, 0); in init_PMU()
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/linux/drivers/gpu/drm/meson/
H A Dmeson_dw_hdmi.h18 * Bit 4 RW sw_reset_phyif: PHY interface. 1=Apply reset; 0=Release from reset.
21 * 0=Release from reset.
23 * Bit 2 RW sw_reset_mem: KSV/REVOC mem. 1=Apply reset; 0=Release from reset.
26 * 0=Release from reset. Default 1.
27 * Bit 0 RW sw_reset_core: connects to IP's ~irstz. 1=Apply reset;
28 * 0=Release from reset. Default 1.
30 #define HDMITX_TOP_SW_RESET (0x000)
33 * Bit 31 RW free_clk_en: 0=Enable clock gating for power saving; 1= Disable
34 * Bit 12 RW i2s_ws_inv:1=Invert i2s_ws; 0=No invert. Default 0.
35 * Bit 11 RW i2s_clk_inv: 1=Invert i2s_clk; 0=No invert. Default 0.
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/linux/drivers/cpufreq/
H A Dsun50i-cpufreq-nvmem.c22 #define NVMEM_MASK 0x7
25 #define SUN50I_A100_NVMEM_MASK 0xf
48 return 0; in sun50i_h6_efuse_xlate()
59 case 0b100: in sun50i_a100_efuse_xlate()
61 case 0b010: in sun50i_a100_efuse_xlate()
64 return 0; in sun50i_a100_efuse_xlate()
79 * returned speedbin index is 4 -> 0/2 -> 3 -> 1, from worst to best.
80 * 0 and 2 seem identical from the OPP tables' point of view.
85 u32 value = 0; in sun50i_h616_efuse_xlate()
87 switch (speedbin & 0xffff) { in sun50i_h616_efuse_xlate()
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/linux/include/linux/irqchip/
H A Darm-gic-v5.h19 #define GICV5_HWIRQ_ID GENMASK(23, 0)
21 #define GICV5_HWIRQ_INTID GENMASK_ULL(31, 0)
23 #define GICV5_HWIRQ_TYPE_PPI UL(0x1)
24 #define GICV5_HWIRQ_TYPE_LPI UL(0x2)
25 #define GICV5_HWIRQ_TYPE_SPI UL(0x3)
30 #define GICV5_ARCH_PPI_S_DB_PPI 0x0
31 #define GICV5_ARCH_PPI_RL_DB_PPI 0x1
32 #define GICV5_ARCH_PPI_NS_DB_PPI 0x2
33 #define GICV5_ARCH_PPI_SW_PPI 0x3
34 #define GICV5_ARCH_PPI_HACDBSIRQ 0xf
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/linux/drivers/iommu/
H A Dio-pgfault.c78 return 0; in report_partial_fault()
126 fault->prm.pasid, 0); in find_fault_handler()
146 IOMMU_NO_PASID, 0); in find_fault_handler()
181 * them before reporting faults. A PASID Stop Marker (LRW = 0b100) doesn't
187 * outstanding ones have been pushed to the IOMMU (as per PCIe 4.0r1.0 - 6.20.1
212 * Returns 0 on success, or an error in case of a bad/failed iopf setup.
265 return 0; in iommu_report_device_fault()
276 return 0; in iommu_report_device_fault()
296 * Return: 0 on success and <0 on error.
313 return 0; in iopf_queue_flush_dev()
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/linux/drivers/net/ethernet/synopsys/
H A Ddwc-xlgmac.h30 #define XLGMAC_DRV_VERSION "1.0.0"
47 #define XLGMAC_TX_MAX_BUF_SIZE (0x3fff & ~(64 - 1))
55 * 3'b100: 1023 bytes , 3'b101'3'b111: Reserved
64 #define XLGMAC_DMA_INTERRUPT_MASK 0x31c7
71 #define XLGMAC_MAX_DMA_RIWT 0xff
72 #define XLGMAC_MIN_DMA_RIWT 0x01
86 #define XLGMAC_RSS_LOOKUP_TABLE_TYPE 0
658 #define XLGMAC_PR(x...) do { } while (0)
/linux/drivers/clk/aspeed/
H A Dclk-ast2600.c24 #define ASPEED_G6_SILICON_REV 0x014
27 #define ASPEED_G6_RESET_CTRL 0x040
28 #define ASPEED_G6_RESET_CTRL2 0x050
30 #define ASPEED_G6_CLK_STOP_CTRL 0x080
31 #define ASPEED_G6_CLK_STOP_CTRL2 0x090
33 #define ASPEED_G6_MISC_CTRL 0x0C0
36 #define ASPEED_G6_CLK_SELECTION1 0x300
37 #define ASPEED_G6_CLK_SELECTION2 0x304
38 #define ASPEED_G6_CLK_SELECTION4 0x310
39 #define ASPEED_G6_CLK_SELECTION5 0x314
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/linux/drivers/iio/addac/
H A Dad74413r.c31 #define AD74413R_CRC_POLYNOMIAL 0x7
96 #define AD74413R_REG_NOP 0x00
98 #define AD74413R_REG_CH_FUNC_SETUP_X(x) (0x01 + (x))
99 #define AD74413R_CH_FUNC_SETUP_MASK GENMASK(3, 0)
101 #define AD74413R_REG_ADC_CONFIG_X(x) (0x05 + (x))
105 #define AD74413R_ADC_RANGE_10V 0b000
106 #define AD74413R_ADC_RANGE_2P5V_EXT_POW 0b001
107 #define AD74413R_ADC_RANGE_2P5V_INT_POW 0b010
108 #define AD74413R_ADC_RANGE_5V_BI_DIR 0b011
109 #define AD74413R_ADC_REJECTION_50_60 0b00
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/linux/drivers/gpu/drm/tests/
H A Ddrm_format_helper_test.c21 #define TEST_USE_DEFAULT_PITCH 0
129 .clip = DRM_RECT_INIT(0, 0, 1, 1),
130 .xrgb8888 = { 0x01FF0000 },
133 .expected = { 0x4C },
137 .expected = { 0xE0 },
141 .expected = { 0xF800 },
142 .expected_swab = { 0x00F8 },
146 .expected = { 0x7C00 },
150 .expected = { 0xFC00 },
154 .expected = { 0xF801 },
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/linux/drivers/media/pci/cx88/
H A Dcx88-video.c41 static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
42 static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
43 static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
65 } while (0)
129 for (i = 0; i < ARRAY_SIZE(formats); i++) in format_by_fourcc()
157 .minimum = 0x00,
158 .maximum = 0xff,
160 .default_value = 0x7f,
163 .mask = 0x00ff,
164 .shift = 0,
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/linux/drivers/pinctrl/bcm/
H A Dpinctrl-bcm281xx.c24 #define BCM281XX_PIN_REG_F_SEL_MASK 0x0700
28 #define BCM281XX_STD_PIN_REG_DRV_STR_MASK 0x0007
29 #define BCM281XX_STD_PIN_REG_DRV_STR_SHIFT 0
30 #define BCM281XX_STD_PIN_REG_INPUT_DIS_MASK 0x0008
32 #define BCM281XX_STD_PIN_REG_SLEW_MASK 0x0010
34 #define BCM281XX_STD_PIN_REG_PULL_UP_MASK 0x0020
36 #define BCM281XX_STD_PIN_REG_PULL_DN_MASK 0x0040
38 #define BCM281XX_STD_PIN_REG_HYST_MASK 0x0080
42 #define BCM281XX_I2C_PIN_REG_INPUT_DIS_MASK 0x0004
44 #define BCM281XX_I2C_PIN_REG_SLEW_MASK 0x0008
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/linux/drivers/usb/host/
H A Docteon-hcd.h53 #define CVMX_USBCXBASE 0x00016F0010000000ull
56 ((bid) & 1) * 0x100000000000ull)
59 (((off) & 7) + ((bid) & 1) * 0x8000000000ull) * 32)
61 #define CVMX_USBCX_GAHBCFG(bid) CVMX_USBCXREG1(0x008, bid)
62 #define CVMX_USBCX_GHWCFG3(bid) CVMX_USBCXREG1(0x04c, bid)
63 #define CVMX_USBCX_GINTMSK(bid) CVMX_USBCXREG1(0x018, bid)
64 #define CVMX_USBCX_GINTSTS(bid) CVMX_USBCXREG1(0x014, bid)
65 #define CVMX_USBCX_GNPTXFSIZ(bid) CVMX_USBCXREG1(0x028, bid)
66 #define CVMX_USBCX_GNPTXSTS(bid) CVMX_USBCXREG1(0x02c, bid)
67 #define CVMX_USBCX_GOTGCTL(bid) CVMX_USBCXREG1(0x000, bid)
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