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Searched +full:0 +full:b011 (Results 1 – 10 of 10) sorted by relevance

/linux/Documentation/networking/device_drivers/ethernet/ti/
H A Dtlan.rst31 0e11 ae32 Compaq Netelligent 10/100 TX PCI UTP
32 0e11 ae34 Compaq Netelligent 10 T PCI UTP
33 0e11 ae35 Compaq Integrated NetFlex 3/P
34 0e11 ae40 Compaq Netelligent Dual 10/100 TX PCI UTP
35 0e11 ae43 Compaq Netelligent Integrated 10/100 TX UTP
36 0e11 b011 Compaq Netelligent 10/100 TX Embedded UTP
37 0e11 b012 Compaq Netelligent 10 T/2 PCI UTP/Coax
38 0e11 b030 Compaq Netelligent 10/100 TX UTP
39 0e11 f130 Compaq NetFlex 3/P
40 0e11 f150 Compaq NetFlex 3/P
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/linux/include/linux/irqchip/
H A Darm-gic-v5.h19 #define GICV5_HWIRQ_ID GENMASK(23, 0)
21 #define GICV5_HWIRQ_INTID GENMASK_ULL(31, 0)
23 #define GICV5_HWIRQ_TYPE_PPI UL(0x1)
24 #define GICV5_HWIRQ_TYPE_LPI UL(0x2)
25 #define GICV5_HWIRQ_TYPE_SPI UL(0x3)
30 #define GICV5_ARCH_PPI_S_DB_PPI 0x0
31 #define GICV5_ARCH_PPI_RL_DB_PPI 0x1
32 #define GICV5_ARCH_PPI_NS_DB_PPI 0x2
33 #define GICV5_ARCH_PPI_SW_PPI 0x3
34 #define GICV5_ARCH_PPI_HACDBSIRQ 0xf
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/linux/drivers/iio/addac/
H A Dad74413r.c31 #define AD74413R_CRC_POLYNOMIAL 0x7
96 #define AD74413R_REG_NOP 0x00
98 #define AD74413R_REG_CH_FUNC_SETUP_X(x) (0x01 + (x))
99 #define AD74413R_CH_FUNC_SETUP_MASK GENMASK(3, 0)
101 #define AD74413R_REG_ADC_CONFIG_X(x) (0x05 + (x))
105 #define AD74413R_ADC_RANGE_10V 0b000
106 #define AD74413R_ADC_RANGE_2P5V_EXT_POW 0b001
107 #define AD74413R_ADC_RANGE_2P5V_INT_POW 0b010
108 #define AD74413R_ADC_RANGE_5V_BI_DIR 0b011
109 #define AD74413R_ADC_REJECTION_50_60 0b00
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/linux/drivers/net/ethernet/synopsys/
H A Ddwc-xlgmac.h30 #define XLGMAC_DRV_VERSION "1.0.0"
47 #define XLGMAC_TX_MAX_BUF_SIZE (0x3fff & ~(64 - 1))
54 * 3'b010: 256 bytes, 3'b011: 512 bytes
64 #define XLGMAC_DMA_INTERRUPT_MASK 0x31c7
71 #define XLGMAC_MAX_DMA_RIWT 0xff
72 #define XLGMAC_MIN_DMA_RIWT 0x01
86 #define XLGMAC_RSS_LOOKUP_TABLE_TYPE 0
658 #define XLGMAC_PR(x...) do { } while (0)
/linux/drivers/clk/aspeed/
H A Dclk-ast2600.c24 #define ASPEED_G6_SILICON_REV 0x014
27 #define ASPEED_G6_RESET_CTRL 0x040
28 #define ASPEED_G6_RESET_CTRL2 0x050
30 #define ASPEED_G6_CLK_STOP_CTRL 0x080
31 #define ASPEED_G6_CLK_STOP_CTRL2 0x090
33 #define ASPEED_G6_MISC_CTRL 0x0C0
36 #define ASPEED_G6_CLK_SELECTION1 0x300
37 #define ASPEED_G6_CLK_SELECTION2 0x304
38 #define ASPEED_G6_CLK_SELECTION4 0x310
39 #define ASPEED_G6_CLK_SELECTION5 0x314
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/linux/drivers/media/platform/raspberrypi/pisp_be/
H A Dpisp_be.c32 #define PISP_BE_VERSION_REG 0x0
33 #define PISP_BE_CONTROL_REG 0x4
35 #define PISP_BE_CONTROL_QUEUE_JOB BIT(0)
37 #define PISP_BE_TILE_ADDR_LO_REG 0x8
38 #define PISP_BE_TILE_ADDR_HI_REG 0xc
39 #define PISP_BE_STATUS_REG 0x10
40 #define PISP_BE_STATUS_QUEUED BIT(0)
41 #define PISP_BE_BATCH_STATUS_REG 0x14
42 #define PISP_BE_INTERRUPT_EN_REG 0x18
43 #define PISP_BE_INTERRUPT_STATUS_REG 0x1c
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/linux/drivers/pinctrl/bcm/
H A Dpinctrl-bcm281xx.c24 #define BCM281XX_PIN_REG_F_SEL_MASK 0x0700
28 #define BCM281XX_STD_PIN_REG_DRV_STR_MASK 0x0007
29 #define BCM281XX_STD_PIN_REG_DRV_STR_SHIFT 0
30 #define BCM281XX_STD_PIN_REG_INPUT_DIS_MASK 0x0008
32 #define BCM281XX_STD_PIN_REG_SLEW_MASK 0x0010
34 #define BCM281XX_STD_PIN_REG_PULL_UP_MASK 0x0020
36 #define BCM281XX_STD_PIN_REG_PULL_DN_MASK 0x0040
38 #define BCM281XX_STD_PIN_REG_HYST_MASK 0x0080
42 #define BCM281XX_I2C_PIN_REG_INPUT_DIS_MASK 0x0004
44 #define BCM281XX_I2C_PIN_REG_SLEW_MASK 0x0008
[all …]
/linux/arch/arm64/include/asm/
H A Dsysreg.h30 #define Op0_mask 0x3
32 #define Op1_mask 0x7
34 #define CRn_mask 0xf
36 #define CRm_mask 0xf
38 #define Op2_mask 0x7
68 #define __INSTR_BSWAP(x) ((((x) << 24) & 0xff000000) | \
69 (((x) << 8) & 0x00ff0000) | \
70 (((x) >> 8) & 0x0000ff00) | \
71 (((x) >> 24) & 0x000000ff))
84 * As per Arm ARM for v8-A, Section "C.5.1.3 op0 == 0b00, architectural hints,
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/linux/drivers/usb/host/
H A Docteon-hcd.h53 #define CVMX_USBCXBASE 0x00016F0010000000ull
56 ((bid) & 1) * 0x100000000000ull)
59 (((off) & 7) + ((bid) & 1) * 0x8000000000ull) * 32)
61 #define CVMX_USBCX_GAHBCFG(bid) CVMX_USBCXREG1(0x008, bid)
62 #define CVMX_USBCX_GHWCFG3(bid) CVMX_USBCXREG1(0x04c, bid)
63 #define CVMX_USBCX_GINTMSK(bid) CVMX_USBCXREG1(0x018, bid)
64 #define CVMX_USBCX_GINTSTS(bid) CVMX_USBCXREG1(0x014, bid)
65 #define CVMX_USBCX_GNPTXFSIZ(bid) CVMX_USBCXREG1(0x028, bid)
66 #define CVMX_USBCX_GNPTXSTS(bid) CVMX_USBCXREG1(0x02c, bid)
67 #define CVMX_USBCX_GOTGCTL(bid) CVMX_USBCXREG1(0x000, bid)
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/linux/drivers/mmc/host/
H A Dsdhci-msm.c27 #define CORE_MCI_VERSION 0x50
29 #define CORE_VERSION_MAJOR_MASK (0xf << CORE_VERSION_MAJOR_SHIFT)
30 #define CORE_VERSION_MINOR_MASK 0xff
32 #define CORE_MCI_GENERICS 0x70
35 #define HC_MODE_EN 0x1
36 #define CORE_POWER 0x0
40 #define CORE_PWRCTL_BUS_OFF BIT(0)
44 #define CORE_PWRCTL_BUS_SUCCESS BIT(0)
48 #define REQ_BUS_OFF BIT(0)
52 #define INT_MASK 0xf
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