1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2015 Nahanni Systems, Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/types.h>
30 #include <sys/mman.h>
31 #include <sys/socket.h>
32 #include <sys/un.h>
33
34 #include <dev/vmm/vmm_mem.h>
35 #include <machine/vmm.h>
36 #include <machine/vmm_snapshot.h>
37 #include <vmmapi.h>
38
39 #include <stdio.h>
40 #include <stdlib.h>
41 #include <string.h>
42
43 #include <errno.h>
44 #include <unistd.h>
45
46 #include "bhyvegc.h"
47 #include "bhyverun.h"
48 #include "config.h"
49 #include "debug.h"
50 #include "console.h"
51 #include "pci_emul.h"
52 #include "rfb.h"
53 #ifdef __amd64__
54 #include "amd64/vga.h"
55 #endif
56
57 /*
58 * bhyve Framebuffer device emulation.
59 * BAR0 points to the current mode information.
60 * BAR1 is the 32-bit framebuffer address.
61 *
62 * -s <b>,fbuf,wait,vga=on|io|off,rfb=<ip>:port,w=width,h=height
63 */
64
65 static int fbuf_debug = 1;
66 #define DEBUG_INFO 1
67 #define DEBUG_VERBOSE 4
68 #define DPRINTF(level, params) if (level <= fbuf_debug) PRINTLN params
69
70
71 #define KB (1024UL)
72 #define MB (1024 * 1024UL)
73
74 #define DMEMSZ 128
75
76 #define FB_SIZE (32*MB)
77
78 #define COLS_MAX 3840
79 #define ROWS_MAX 2160
80
81 #define COLS_DEFAULT 1024
82 #define ROWS_DEFAULT 768
83
84 #define COLS_MIN 640
85 #define ROWS_MIN 480
86
87 struct pci_fbuf_softc {
88 struct pci_devinst *fsc_pi;
89 struct {
90 uint32_t fbsize;
91 uint16_t width;
92 uint16_t height;
93 uint16_t depth;
94 uint16_t refreshrate;
95 uint8_t reserved[116];
96 } __packed memregs;
97
98 /* rfb server */
99 sa_family_t rfb_family;
100 char *rfb_host;
101 char *rfb_password;
102 int rfb_port;
103 int rfb_wait;
104 int vga_enabled;
105 int vga_full;
106
107 uint32_t fbaddr;
108 char *fb_base;
109 uint16_t gc_width;
110 uint16_t gc_height;
111 void *vgasc;
112 struct bhyvegc_image *gc_image;
113 };
114
115 static struct pci_fbuf_softc *fbuf_sc;
116
117 #define PCI_FBUF_MSI_MSGS 4
118
119 static void
pci_fbuf_write(struct pci_devinst * pi,int baridx,uint64_t offset,int size,uint64_t value)120 pci_fbuf_write(struct pci_devinst *pi, int baridx, uint64_t offset, int size,
121 uint64_t value)
122 {
123 struct pci_fbuf_softc *sc;
124 uint8_t *p;
125
126 assert(baridx == 0);
127
128 sc = pi->pi_arg;
129
130 DPRINTF(DEBUG_VERBOSE,
131 ("fbuf wr: offset 0x%lx, size: %d, value: 0x%lx",
132 offset, size, value));
133
134 if (offset + size > DMEMSZ) {
135 printf("fbuf: write too large, offset %ld size %d\n",
136 offset, size);
137 return;
138 }
139
140 p = (uint8_t *)&sc->memregs + offset;
141
142 switch (size) {
143 case 1:
144 *p = value;
145 break;
146 case 2:
147 *(uint16_t *)p = value;
148 break;
149 case 4:
150 *(uint32_t *)p = value;
151 break;
152 case 8:
153 *(uint64_t *)p = value;
154 break;
155 default:
156 printf("fbuf: write unknown size %d\n", size);
157 break;
158 }
159
160 if (!sc->gc_image->vgamode && sc->memregs.width == 0 &&
161 sc->memregs.height == 0) {
162 DPRINTF(DEBUG_INFO, ("switching to VGA mode"));
163 sc->gc_image->vgamode = 1;
164 sc->gc_width = 0;
165 sc->gc_height = 0;
166 } else if (sc->gc_image->vgamode && sc->memregs.width != 0 &&
167 sc->memregs.height != 0) {
168 DPRINTF(DEBUG_INFO, ("switching to VESA mode"));
169 sc->gc_image->vgamode = 0;
170 }
171 }
172
173 static uint64_t
pci_fbuf_read(struct pci_devinst * pi,int baridx,uint64_t offset,int size)174 pci_fbuf_read(struct pci_devinst *pi, int baridx, uint64_t offset, int size)
175 {
176 struct pci_fbuf_softc *sc;
177 uint8_t *p;
178 uint64_t value;
179
180 assert(baridx == 0);
181
182 sc = pi->pi_arg;
183
184
185 if (offset + size > DMEMSZ) {
186 printf("fbuf: read too large, offset %ld size %d\n",
187 offset, size);
188 return (0);
189 }
190
191 p = (uint8_t *)&sc->memregs + offset;
192 value = 0;
193 switch (size) {
194 case 1:
195 value = *p;
196 break;
197 case 2:
198 value = *(uint16_t *)p;
199 break;
200 case 4:
201 value = *(uint32_t *)p;
202 break;
203 case 8:
204 value = *(uint64_t *)p;
205 break;
206 default:
207 printf("fbuf: read unknown size %d\n", size);
208 break;
209 }
210
211 DPRINTF(DEBUG_VERBOSE,
212 ("fbuf rd: offset 0x%lx, size: %d, value: 0x%lx",
213 offset, size, value));
214
215 return (value);
216 }
217
218 static void
pci_fbuf_baraddr(struct pci_devinst * pi,int baridx,int enabled,uint64_t address)219 pci_fbuf_baraddr(struct pci_devinst *pi, int baridx, int enabled,
220 uint64_t address)
221 {
222 struct pci_fbuf_softc *sc;
223 int prot;
224
225 if (baridx != 1)
226 return;
227
228 sc = pi->pi_arg;
229 if (!enabled) {
230 if (vm_munmap_memseg(pi->pi_vmctx, sc->fbaddr, FB_SIZE) != 0)
231 EPRINTLN("pci_fbuf: munmap_memseg failed");
232 sc->fbaddr = 0;
233 } else {
234 prot = PROT_READ | PROT_WRITE;
235 if (vm_mmap_memseg(pi->pi_vmctx, address, VM_FRAMEBUFFER, 0,
236 FB_SIZE, prot) != 0)
237 EPRINTLN("pci_fbuf: mmap_memseg failed");
238 else
239 sc->fbaddr = address;
240 }
241 }
242
243
244 static int
pci_fbuf_parse_config(struct pci_fbuf_softc * sc,nvlist_t * nvl)245 pci_fbuf_parse_config(struct pci_fbuf_softc *sc, nvlist_t *nvl)
246 {
247 const char *value;
248 char *cp;
249
250 sc->rfb_wait = get_config_bool_node_default(nvl, "wait", false);
251
252 /* Prefer "rfb" to "tcp". */
253 value = get_config_value_node(nvl, "rfb");
254 if (value == NULL)
255 value = get_config_value_node(nvl, "tcp");
256 if (value != NULL) {
257 /*
258 * UNIX -- unix:path/to/socket.sock
259 * IPv4 -- host-ip:port
260 * IPv6 -- [host-ip%zone]:port
261 * XXX for now port is mandatory for IPv4.
262 */
263 if (value[0] == '[') {
264 sc->rfb_family = AF_INET6;
265 cp = strchr(value + 1, ']');
266 if (cp == NULL || cp == value + 1) {
267 EPRINTLN("fbuf: Invalid IPv6 address: \"%s\"",
268 value);
269 return (-1);
270 }
271 sc->rfb_host = strndup(value + 1, cp - (value + 1));
272 cp++;
273 if (*cp == ':') {
274 cp++;
275 if (*cp == '\0') {
276 EPRINTLN(
277 "fbuf: Missing port number: \"%s\"",
278 value);
279 return (-1);
280 }
281 sc->rfb_port = atoi(cp);
282 } else if (*cp != '\0') {
283 EPRINTLN("fbuf: Invalid IPv6 address: \"%s\"",
284 value);
285 return (-1);
286 }
287 } else if (strncmp("unix:", value, 5) == 0) {
288 if (strlen(value + 5) > SUNPATHLEN) {
289 EPRINTLN(
290 "fbuf: UNIX socket path too long: \"%s\"",
291 value + 5);
292 return (-1);
293 } else if (*(value + 5) == '\0') {
294 EPRINTLN("fbuf: UNIX socket path is empty");
295 return (-1);
296 } else {
297 sc->rfb_family = AF_UNIX;
298 sc->rfb_host = strdup(value + 5);
299 }
300 } else {
301 sc->rfb_family = AF_UNSPEC;
302 cp = strchr(value, ':');
303 if (cp == NULL) {
304 sc->rfb_port = atoi(value);
305 } else {
306 sc->rfb_host = strndup(value, cp - value);
307 cp++;
308 if (*cp == '\0') {
309 EPRINTLN(
310 "fbuf: Missing port number: \"%s\"",
311 value);
312 return (-1);
313 }
314 sc->rfb_port = atoi(cp);
315 }
316 }
317 }
318
319 value = get_config_value_node(nvl, "vga");
320 if (value != NULL) {
321 if (strcmp(value, "off") == 0) {
322 sc->vga_enabled = 0;
323 } else if (strcmp(value, "io") == 0) {
324 sc->vga_enabled = 1;
325 sc->vga_full = 0;
326 } else if (strcmp(value, "on") == 0) {
327 sc->vga_enabled = 1;
328 sc->vga_full = 1;
329 } else {
330 EPRINTLN("fbuf: Invalid vga setting: \"%s\"", value);
331 return (-1);
332 }
333 }
334
335 value = get_config_value_node(nvl, "w");
336 if (value != NULL)
337 sc->memregs.width = strtol(value, NULL, 10);
338
339 value = get_config_value_node(nvl, "h");
340 if (value != NULL)
341 sc->memregs.height = strtol(value, NULL, 10);
342
343 if (sc->memregs.width > COLS_MAX ||
344 sc->memregs.height > ROWS_MAX) {
345 EPRINTLN("fbuf: max resolution is %ux%u", COLS_MAX, ROWS_MAX);
346 return (-1);
347 }
348 if (sc->memregs.width < COLS_MIN ||
349 sc->memregs.height < ROWS_MIN) {
350 EPRINTLN("fbuf: minimum resolution is %ux%u",
351 COLS_MIN, ROWS_MIN);
352 return (-1);
353 }
354
355 value = get_config_value_node(nvl, "password");
356 if (value != NULL)
357 sc->rfb_password = strdup(value);
358
359 return (0);
360 }
361
362 static void
pci_fbuf_render(struct bhyvegc * gc,void * arg)363 pci_fbuf_render(struct bhyvegc *gc, void *arg)
364 {
365 struct pci_fbuf_softc *sc;
366
367 sc = arg;
368
369 if (sc->vga_full && sc->gc_image->vgamode) {
370 /* TODO: mode switching to vga and vesa should use the special
371 * EFI-bhyve protocol port.
372 */
373 vga_render(gc, sc->vgasc);
374 return;
375 }
376 if (sc->gc_width != sc->memregs.width ||
377 sc->gc_height != sc->memregs.height) {
378 bhyvegc_resize(gc, sc->memregs.width, sc->memregs.height);
379 sc->gc_width = sc->memregs.width;
380 sc->gc_height = sc->memregs.height;
381 }
382 }
383
384 static int
pci_fbuf_init(struct pci_devinst * pi,nvlist_t * nvl)385 pci_fbuf_init(struct pci_devinst *pi, nvlist_t *nvl)
386 {
387 int error;
388 struct pci_fbuf_softc *sc;
389
390 if (fbuf_sc != NULL) {
391 EPRINTLN("Only one frame buffer device is allowed.");
392 return (-1);
393 }
394
395 sc = calloc(1, sizeof(struct pci_fbuf_softc));
396
397 pi->pi_arg = sc;
398
399 /* initialize config space */
400 pci_set_cfgdata16(pi, PCIR_DEVICE, 0x40FB);
401 pci_set_cfgdata16(pi, PCIR_VENDOR, 0xFB5D);
402 pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_DISPLAY);
403 pci_set_cfgdata8(pi, PCIR_SUBCLASS, PCIS_DISPLAY_VGA);
404
405 sc->fb_base = vm_create_devmem(pi->pi_vmctx, VM_FRAMEBUFFER,
406 "framebuffer", FB_SIZE);
407 if (sc->fb_base == MAP_FAILED) {
408 error = -1;
409 goto done;
410 }
411
412 error = pci_emul_alloc_bar(pi, 0, PCIBAR_MEM32, DMEMSZ);
413 assert(error == 0);
414
415 error = pci_emul_alloc_bar(pi, 1, PCIBAR_MEM32, FB_SIZE);
416 assert(error == 0);
417
418 error = pci_emul_add_msicap(pi, PCI_FBUF_MSI_MSGS);
419 assert(error == 0);
420
421 sc->memregs.fbsize = FB_SIZE;
422 sc->memregs.width = COLS_DEFAULT;
423 sc->memregs.height = ROWS_DEFAULT;
424 sc->memregs.depth = 32;
425
426 sc->vga_enabled = 1;
427 sc->vga_full = 0;
428
429 sc->fsc_pi = pi;
430
431 error = pci_fbuf_parse_config(sc, nvl);
432 if (error != 0)
433 goto done;
434
435 /* XXX until VGA rendering is enabled */
436 if (sc->vga_full != 0) {
437 EPRINTLN("pci_fbuf: VGA rendering not enabled");
438 goto done;
439 }
440
441 DPRINTF(DEBUG_INFO, ("fbuf frame buffer base: %p [sz %lu]",
442 sc->fb_base, FB_SIZE));
443
444 console_init(sc->memregs.width, sc->memregs.height, sc->fb_base);
445 console_fb_register(pci_fbuf_render, sc);
446
447 if (sc->vga_enabled)
448 sc->vgasc = vga_init(!sc->vga_full);
449 sc->gc_image = console_get_image();
450
451 fbuf_sc = sc;
452
453 memset((void *)sc->fb_base, 0, FB_SIZE);
454
455 error = rfb_init(sc->rfb_family, sc->rfb_host, sc->rfb_port,
456 sc->rfb_wait, sc->rfb_password);
457 done:
458 if (error)
459 free(sc);
460
461 return (error);
462 }
463
464 #ifdef BHYVE_SNAPSHOT
465 static int
pci_fbuf_snapshot(struct vm_snapshot_meta * meta)466 pci_fbuf_snapshot(struct vm_snapshot_meta *meta)
467 {
468 int ret;
469
470 SNAPSHOT_BUF_OR_LEAVE(fbuf_sc->fb_base, FB_SIZE, meta, ret, err);
471
472 err:
473 return (ret);
474 }
475 #endif
476
477 static const struct pci_devemu pci_fbuf = {
478 .pe_emu = "fbuf",
479 .pe_init = pci_fbuf_init,
480 .pe_barwrite = pci_fbuf_write,
481 .pe_barread = pci_fbuf_read,
482 .pe_baraddr = pci_fbuf_baraddr,
483 #ifdef BHYVE_SNAPSHOT
484 .pe_snapshot = pci_fbuf_snapshot,
485 #endif
486 };
487 PCI_EMUL_SET(pci_fbuf);
488