xref: /freebsd/sys/dev/pci/vga_pci.c (revision 6dc813301a173e2e1993c3064df162e6218c1231)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2005 John Baldwin <jhb@FreeBSD.org>
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 #include <sys/cdefs.h>
29 /*
30  * Simple driver for PCI VGA display devices.  Drivers such as agp(4) and
31  * drm(4) should attach as children of this device.
32  *
33  * XXX: The vgapci name is a hack until we somehow merge the isa vga driver
34  * in or rename it.
35  */
36 
37 #include <sys/param.h>
38 #include <sys/bus.h>
39 #include <sys/kernel.h>
40 #include <sys/module.h>
41 #include <sys/rman.h>
42 #include <sys/sysctl.h>
43 #include <sys/systm.h>
44 
45 #if defined(__amd64__) || defined(__i386__)
46 #include <vm/vm.h>
47 #include <vm/pmap.h>
48 #endif
49 
50 #include <dev/pci/pcireg.h>
51 #include <dev/pci/pcivar.h>
52 
53 #include <compat/x86bios/x86bios.h> /* To re-POST the card. */
54 
55 struct vga_resource {
56 	struct resource	*vr_res;
57 	int	vr_refs;
58 };
59 
60 struct vga_pci_softc {
61 	device_t	vga_msi_child;	/* Child driver using MSI. */
62 	struct vga_resource vga_bars[PCIR_MAX_BAR_0 + 1];
63 	struct vga_resource vga_bios;
64 };
65 
66 SYSCTL_DECL(_hw_pci);
67 
68 static struct vga_resource *lookup_res(struct vga_pci_softc *sc, int rid);
69 static struct resource *vga_pci_alloc_resource(device_t dev, device_t child,
70     int type, int rid, rman_res_t start, rman_res_t end, rman_res_t count,
71     u_int flags);
72 static int	vga_pci_release_resource(device_t dev, device_t child,
73     struct resource *r);
74 
75 int vga_pci_default_unit = -1;
76 SYSCTL_INT(_hw_pci, OID_AUTO, default_vgapci_unit, CTLFLAG_RDTUN,
77     &vga_pci_default_unit, -1, "Default VGA-compatible display");
78 
79 int
vga_pci_is_boot_display(device_t dev)80 vga_pci_is_boot_display(device_t dev)
81 {
82 	int unit;
83 	device_t pcib;
84 	uint16_t config;
85 
86 	/* Check that the given device is a video card */
87 	if ((pci_get_class(dev) != PCIC_DISPLAY &&
88 	    (pci_get_class(dev) != PCIC_OLD ||
89 	     pci_get_subclass(dev) != PCIS_OLD_VGA)))
90 		return (0);
91 
92 	unit = device_get_unit(dev);
93 
94 	if (vga_pci_default_unit >= 0) {
95 		/*
96 		 * The boot display device was determined by a previous
97 		 * call to this function, or the user forced it using
98 		 * the hw.pci.default_vgapci_unit tunable.
99 		 */
100 		return (vga_pci_default_unit == unit);
101 	}
102 
103 	/*
104 	 * The primary video card used as a boot display must have the
105 	 * "I/O" and "Memory Address Space Decoding" bits set in its
106 	 * Command register.
107 	 *
108 	 * Furthermore, if the card is attached to a bridge, instead of
109 	 * the root PCI bus, the bridge must have the "VGA Enable" bit
110 	 * set in its Control register.
111 	 */
112 
113 	pcib = device_get_parent(device_get_parent(dev));
114 	if (is_pci_device(pcib)) {
115 		/*
116 		 * The parent bridge is a PCI-to-PCI bridge: check the
117 		 * value of the "VGA Enable" bit.
118 		 */
119 		config = pci_read_config(pcib, PCIR_BRIDGECTL_1, 2);
120 		if ((config & PCIB_BCR_VGA_ENABLE) == 0)
121 			return (0);
122 	}
123 
124 	config = pci_read_config(dev, PCIR_COMMAND, 2);
125 	if ((config & (PCIM_CMD_PORTEN | PCIM_CMD_MEMEN)) == 0)
126 		return (0);
127 
128 	/*
129 	 * Disable interrupts until a chipset driver is loaded for
130 	 * this PCI device. Else unhandled display adapter interrupts
131 	 * might freeze the CPU.
132 	 */
133 	pci_write_config(dev, PCIR_COMMAND, config | PCIM_CMD_INTxDIS, 2);
134 
135 	/* This video card is the boot display: record its unit number. */
136 	vga_pci_default_unit = unit;
137 	device_set_flags(dev, 1);
138 
139 	return (1);
140 }
141 
142 static void
vga_pci_reset(device_t dev)143 vga_pci_reset(device_t dev)
144 {
145 	int ps;
146 	/*
147 	 * FLR is unsupported on GPUs so attempt a power-management reset by cycling
148 	 * the device in/out of D3 state.
149 	 * PCI spec says we can only go into D3 state from D0 state.
150 	 * Transition from D[12] into D0 before going to D3 state.
151 	 */
152 	ps = pci_get_powerstate(dev);
153 	if (ps != PCI_POWERSTATE_D0 && ps != PCI_POWERSTATE_D3)
154 		pci_set_powerstate(dev, PCI_POWERSTATE_D0);
155 	if (pci_get_powerstate(dev) != PCI_POWERSTATE_D3)
156 		pci_set_powerstate(dev, PCI_POWERSTATE_D3);
157 	pci_set_powerstate(dev, ps);
158 }
159 
160 void *
vga_pci_map_bios(device_t dev,size_t * size)161 vga_pci_map_bios(device_t dev, size_t *size)
162 {
163 	struct vga_resource *vr;
164 	struct resource *res;
165 	device_t pcib;
166 	uint32_t rom_addr;
167 	uint16_t config;
168 	volatile unsigned char *bios;
169 	int i, rid, found;
170 
171 #if defined(__amd64__) || defined(__i386__)
172 	if (vga_pci_is_boot_display(dev)) {
173 		/*
174 		 * On x86, the System BIOS copy the default display
175 		 * device's Video BIOS at a fixed location in system
176 		 * memory (0xC0000, 128 kBytes long) at boot time.
177 		 *
178 		 * We use this copy for the default boot device, because
179 		 * the original ROM may not be valid after boot.
180 		 */
181 
182 		*size = VGA_PCI_BIOS_SHADOW_SIZE;
183 		return (pmap_mapbios(VGA_PCI_BIOS_SHADOW_ADDR, *size));
184 	}
185 #endif
186 
187 	pcib = device_get_parent(device_get_parent(dev));
188 	if (is_pci_device(pcib)) {
189 		/*
190 		 * The parent bridge is a PCI-to-PCI bridge: check the
191 		 * value of the "VGA Enable" bit.
192 		 */
193 		config = pci_read_config(pcib, PCIR_BRIDGECTL_1, 2);
194 		if ((config & PCIB_BCR_VGA_ENABLE) == 0) {
195 			config |= PCIB_BCR_VGA_ENABLE;
196 			pci_write_config(pcib, PCIR_BRIDGECTL_1, config, 2);
197 		}
198 	}
199 
200 	switch(pci_read_config(dev, PCIR_HDRTYPE, 1)) {
201 	case PCIM_HDRTYPE_BRIDGE:
202 		rid = PCIR_BIOS_1;
203 		break;
204 	case PCIM_HDRTYPE_CARDBUS:
205 		rid = 0;
206 		break;
207 	default:
208 		rid = PCIR_BIOS;
209 		break;
210 	}
211 	if (rid == 0)
212 		return (NULL);
213 	res = vga_pci_alloc_resource(dev, NULL, SYS_RES_MEMORY, rid, 0,
214 	    ~0, 1, RF_ACTIVE);
215 
216 	if (res == NULL) {
217 		device_printf(dev, "vga_pci_alloc_resource failed\n");
218 		return (NULL);
219 	}
220 	bios = rman_get_virtual(res);
221 	*size = rman_get_size(res);
222 	for (found = i = 0; i < hz; i++) {
223 		found = (bios[0] == 0x55 && bios[1] == 0xaa);
224 		if (found)
225 			break;
226 		pause("vgabios", 1);
227 	}
228 	if (found)
229 		return (__DEVOLATILE(void *, bios));
230 	if (bootverbose)
231 		device_printf(dev, "initial ROM mapping failed -- resetting\n");
232 
233 	/*
234 	 * Enable ROM decode
235 	 */
236 	vga_pci_reset(dev);
237 	rom_addr = pci_read_config(dev, rid, 4);
238 	rom_addr &= 0x7ff;
239 	rom_addr |= rman_get_start(res) | 0x1;
240 	pci_write_config(dev, rid, rom_addr, 4);
241 	vr = lookup_res(device_get_softc(dev), rid);
242 	vga_pci_release_resource(dev, NULL, vr->vr_res);
243 
244 	/*
245 	 * re-allocate
246 	 */
247 	res = vga_pci_alloc_resource(dev, NULL, SYS_RES_MEMORY, rid, 0,
248 	    ~0, 1, RF_ACTIVE);
249 	if (res == NULL) {
250 		device_printf(dev, "vga_pci_alloc_resource failed\n");
251 		return (NULL);
252 	}
253 	bios = rman_get_virtual(res);
254 	*size = rman_get_size(res);
255 	for (found = i = 0; i < 3*hz; i++) {
256 		found = (bios[0] == 0x55 && bios[1] == 0xaa);
257 		if (found)
258 			break;
259 		pause("vgabios", 1);
260 	}
261 	if (found)
262 		return (__DEVOLATILE(void *, bios));
263 	device_printf(dev, "ROM mapping failed\n");
264 	vr = lookup_res(device_get_softc(dev), rid);
265 	vga_pci_release_resource(dev, NULL, vr->vr_res);
266 	return (NULL);
267 }
268 
269 void
vga_pci_unmap_bios(device_t dev,void * bios)270 vga_pci_unmap_bios(device_t dev, void *bios)
271 {
272 	struct vga_resource *vr;
273 	int rid;
274 
275 	if (bios == NULL) {
276 		return;
277 	}
278 
279 #if defined(__amd64__) || defined(__i386__)
280 	if (vga_pci_is_boot_display(dev)) {
281 		/* We mapped the BIOS shadow copy located at 0xC0000. */
282 		pmap_unmapdev(bios, VGA_PCI_BIOS_SHADOW_SIZE);
283 
284 		return;
285 	}
286 #endif
287 	switch(pci_read_config(dev, PCIR_HDRTYPE, 1)) {
288 	case PCIM_HDRTYPE_BRIDGE:
289 		rid = PCIR_BIOS_1;
290 		break;
291 	case PCIM_HDRTYPE_CARDBUS:
292 		rid = 0;
293 		break;
294 	default:
295 		rid = PCIR_BIOS;
296 		break;
297 	}
298 	if (rid == 0)
299 		return;
300 	/*
301 	 * Look up the PCIR_BIOS resource in our softc.  It should match
302 	 * the address we returned previously.
303 	 */
304 	vr = lookup_res(device_get_softc(dev), rid);
305 	KASSERT(vr->vr_res != NULL, ("vga_pci_unmap_bios: bios not mapped"));
306 	KASSERT(rman_get_virtual(vr->vr_res) == bios,
307 	    ("vga_pci_unmap_bios: mismatch"));
308 	vga_pci_release_resource(dev, NULL, vr->vr_res);
309 }
310 
311 int
vga_pci_repost(device_t dev)312 vga_pci_repost(device_t dev)
313 {
314 #if defined(__amd64__) || defined(__i386__)
315 	x86regs_t regs;
316 
317 	if (!vga_pci_is_boot_display(dev))
318 		return (EINVAL);
319 
320 	if (x86bios_get_orm(VGA_PCI_BIOS_SHADOW_ADDR) == NULL)
321 		return (ENOTSUP);
322 
323 	x86bios_init_regs(&regs);
324 
325 	regs.R_AH = pci_get_bus(dev);
326 	regs.R_AL = (pci_get_slot(dev) << 3) | (pci_get_function(dev) & 0x07);
327 	regs.R_DL = 0x80;
328 
329 	device_printf(dev, "REPOSTing\n");
330 	x86bios_call(&regs, X86BIOS_PHYSTOSEG(VGA_PCI_BIOS_SHADOW_ADDR + 3),
331 	    X86BIOS_PHYSTOOFF(VGA_PCI_BIOS_SHADOW_ADDR + 3));
332 
333 	x86bios_get_intr(0x10);
334 
335 	return (0);
336 #else
337 	return (ENOTSUP);
338 #endif
339 }
340 
341 static int
vga_pci_probe(device_t dev)342 vga_pci_probe(device_t dev)
343 {
344 
345 	switch (pci_get_class(dev)) {
346 	case PCIC_DISPLAY:
347 		break;
348 	case PCIC_OLD:
349 		if (pci_get_subclass(dev) != PCIS_OLD_VGA)
350 			return (ENXIO);
351 		break;
352 	default:
353 		return (ENXIO);
354 	}
355 
356 	/* Probe default display. */
357 	vga_pci_is_boot_display(dev);
358 
359 	device_set_desc(dev, "VGA-compatible display");
360 	return (BUS_PROBE_GENERIC);
361 }
362 
363 static int
vga_pci_attach(device_t dev)364 vga_pci_attach(device_t dev)
365 {
366 
367 	bus_identify_children(dev);
368 
369 	/* Always create a drmn child for now to make it easier on drm. */
370 	device_add_child(dev, "drmn", DEVICE_UNIT_ANY);
371 	bus_attach_children(dev);
372 
373 	if (vga_pci_is_boot_display(dev))
374 		device_printf(dev, "Boot video device\n");
375 
376 	return (0);
377 }
378 
379 /* Bus interface. */
380 
381 static int
vga_pci_read_ivar(device_t dev,device_t child,int which,uintptr_t * result)382 vga_pci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
383 {
384 
385 	return (BUS_READ_IVAR(device_get_parent(dev), dev, which, result));
386 }
387 
388 static int
vga_pci_write_ivar(device_t dev,device_t child,int which,uintptr_t value)389 vga_pci_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
390 {
391 
392 	return (EINVAL);
393 }
394 
395 static int
vga_pci_setup_intr(device_t dev,device_t child,struct resource * irq,int flags,driver_filter_t * filter,driver_intr_t * intr,void * arg,void ** cookiep)396 vga_pci_setup_intr(device_t dev, device_t child, struct resource *irq,
397     int flags, driver_filter_t *filter, driver_intr_t *intr, void *arg,
398     void **cookiep)
399 {
400 	return (BUS_SETUP_INTR(device_get_parent(dev), dev, irq, flags,
401 	    filter, intr, arg, cookiep));
402 }
403 
404 static int
vga_pci_teardown_intr(device_t dev,device_t child,struct resource * irq,void * cookie)405 vga_pci_teardown_intr(device_t dev, device_t child, struct resource *irq,
406     void *cookie)
407 {
408 	return (BUS_TEARDOWN_INTR(device_get_parent(dev), dev, irq, cookie));
409 }
410 
411 static struct vga_resource *
lookup_res(struct vga_pci_softc * sc,int rid)412 lookup_res(struct vga_pci_softc *sc, int rid)
413 {
414 	int bar;
415 
416 	if (rid == PCIR_BIOS)
417 		return (&sc->vga_bios);
418 	bar = PCI_RID2BAR(rid);
419 	if (bar >= 0 && bar <= PCIR_MAX_BAR_0)
420 		return (&sc->vga_bars[bar]);
421 	return (NULL);
422 }
423 
424 static struct resource *
vga_pci_alloc_resource(device_t dev,device_t child,int type,int rid,rman_res_t start,rman_res_t end,rman_res_t count,u_int flags)425 vga_pci_alloc_resource(device_t dev, device_t child, int type, int rid,
426     rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
427 {
428 	struct vga_resource *vr;
429 
430 	switch (type) {
431 	case SYS_RES_MEMORY:
432 	case SYS_RES_IOPORT:
433 		/*
434 		 * For BARs, we cache the resource so that we only allocate it
435 		 * from the PCI bus once.
436 		 */
437 		vr = lookup_res(device_get_softc(dev), rid);
438 		if (vr == NULL)
439 			return (NULL);
440 		if (vr->vr_res == NULL)
441 			vr->vr_res = bus_alloc_resource(dev, type, rid, start,
442 			    end, count, flags);
443 		if (vr->vr_res != NULL)
444 			vr->vr_refs++;
445 		return (vr->vr_res);
446 	}
447 	return (bus_alloc_resource(dev, type, rid, start, end, count, flags));
448 }
449 
450 static int
vga_pci_release_resource(device_t dev,device_t child,struct resource * r)451 vga_pci_release_resource(device_t dev, device_t child, struct resource *r)
452 {
453 	struct vga_resource *vr;
454 	int error;
455 
456 	switch (rman_get_type(r)) {
457 	case SYS_RES_MEMORY:
458 	case SYS_RES_IOPORT:
459 		/*
460 		 * For BARs, we release the resource from the PCI bus
461 		 * when the last child reference goes away.
462 		 */
463 		vr = lookup_res(device_get_softc(dev), rman_get_rid(r));
464 		if (vr == NULL)
465 			return (EINVAL);
466 		if (vr->vr_res == NULL)
467 			return (EINVAL);
468 		KASSERT(vr->vr_res == r, ("vga_pci resource mismatch"));
469 		if (vr->vr_refs > 1) {
470 			vr->vr_refs--;
471 			return (0);
472 		}
473 		KASSERT(vr->vr_refs > 0,
474 		    ("vga_pci resource reference count underflow"));
475 		error = bus_release_resource(dev, r);
476 		if (error == 0) {
477 			vr->vr_res = NULL;
478 			vr->vr_refs = 0;
479 		}
480 		return (error);
481 	}
482 
483 	return (bus_release_resource(dev, r));
484 }
485 
486 /* PCI interface. */
487 
488 static uint32_t
vga_pci_read_config(device_t dev,device_t child,int reg,int width)489 vga_pci_read_config(device_t dev, device_t child, int reg, int width)
490 {
491 
492 	return (pci_read_config(dev, reg, width));
493 }
494 
495 static void
vga_pci_write_config(device_t dev,device_t child,int reg,uint32_t val,int width)496 vga_pci_write_config(device_t dev, device_t child, int reg,
497     uint32_t val, int width)
498 {
499 
500 	pci_write_config(dev, reg, val, width);
501 }
502 
503 static int
vga_pci_enable_busmaster(device_t dev,device_t child)504 vga_pci_enable_busmaster(device_t dev, device_t child)
505 {
506 
507 	return (pci_enable_busmaster(dev));
508 }
509 
510 static int
vga_pci_disable_busmaster(device_t dev,device_t child)511 vga_pci_disable_busmaster(device_t dev, device_t child)
512 {
513 
514 	return (pci_disable_busmaster(dev));
515 }
516 
517 static int
vga_pci_enable_io(device_t dev,device_t child,int space)518 vga_pci_enable_io(device_t dev, device_t child, int space)
519 {
520 
521 	device_printf(dev, "child %s requested pci_enable_io\n",
522 	    device_get_nameunit(child));
523 	return (pci_enable_io(dev, space));
524 }
525 
526 static int
vga_pci_disable_io(device_t dev,device_t child,int space)527 vga_pci_disable_io(device_t dev, device_t child, int space)
528 {
529 
530 	device_printf(dev, "child %s requested pci_disable_io\n",
531 	    device_get_nameunit(child));
532 	return (pci_disable_io(dev, space));
533 }
534 
535 static int
vga_pci_get_vpd_ident(device_t dev,device_t child,const char ** identptr)536 vga_pci_get_vpd_ident(device_t dev, device_t child, const char **identptr)
537 {
538 
539 	return (pci_get_vpd_ident(dev, identptr));
540 }
541 
542 static int
vga_pci_get_vpd_readonly(device_t dev,device_t child,const char * kw,const char ** vptr)543 vga_pci_get_vpd_readonly(device_t dev, device_t child, const char *kw,
544     const char **vptr)
545 {
546 
547 	return (pci_get_vpd_readonly(dev, kw, vptr));
548 }
549 
550 static int
vga_pci_set_powerstate(device_t dev,device_t child,int state)551 vga_pci_set_powerstate(device_t dev, device_t child, int state)
552 {
553 
554 	device_printf(dev, "child %s requested pci_set_powerstate\n",
555 	    device_get_nameunit(child));
556 	return (pci_set_powerstate(dev, state));
557 }
558 
559 static int
vga_pci_get_powerstate(device_t dev,device_t child)560 vga_pci_get_powerstate(device_t dev, device_t child)
561 {
562 
563 	device_printf(dev, "child %s requested pci_get_powerstate\n",
564 	    device_get_nameunit(child));
565 	return (pci_get_powerstate(dev));
566 }
567 
568 static int
vga_pci_assign_interrupt(device_t dev,device_t child)569 vga_pci_assign_interrupt(device_t dev, device_t child)
570 {
571 
572 	device_printf(dev, "child %s requested pci_assign_interrupt\n",
573 	    device_get_nameunit(child));
574 	return (PCI_ASSIGN_INTERRUPT(device_get_parent(dev), dev));
575 }
576 
577 static int
vga_pci_find_cap(device_t dev,device_t child,int capability,int * capreg)578 vga_pci_find_cap(device_t dev, device_t child, int capability,
579     int *capreg)
580 {
581 
582 	return (pci_find_cap(dev, capability, capreg));
583 }
584 
585 static int
vga_pci_find_next_cap(device_t dev,device_t child,int capability,int start,int * capreg)586 vga_pci_find_next_cap(device_t dev, device_t child, int capability,
587     int start, int *capreg)
588 {
589 
590 	return (pci_find_next_cap(dev, capability, start, capreg));
591 }
592 
593 static int
vga_pci_find_extcap(device_t dev,device_t child,int capability,int * capreg)594 vga_pci_find_extcap(device_t dev, device_t child, int capability,
595     int *capreg)
596 {
597 
598 	return (pci_find_extcap(dev, capability, capreg));
599 }
600 
601 static int
vga_pci_find_next_extcap(device_t dev,device_t child,int capability,int start,int * capreg)602 vga_pci_find_next_extcap(device_t dev, device_t child, int capability,
603     int start, int *capreg)
604 {
605 
606 	return (pci_find_next_extcap(dev, capability, start, capreg));
607 }
608 
609 static int
vga_pci_find_htcap(device_t dev,device_t child,int capability,int * capreg)610 vga_pci_find_htcap(device_t dev, device_t child, int capability,
611     int *capreg)
612 {
613 
614 	return (pci_find_htcap(dev, capability, capreg));
615 }
616 
617 static int
vga_pci_find_next_htcap(device_t dev,device_t child,int capability,int start,int * capreg)618 vga_pci_find_next_htcap(device_t dev, device_t child, int capability,
619     int start, int *capreg)
620 {
621 
622 	return (pci_find_next_htcap(dev, capability, start, capreg));
623 }
624 
625 static int
vga_pci_alloc_msi(device_t dev,device_t child,int * count)626 vga_pci_alloc_msi(device_t dev, device_t child, int *count)
627 {
628 	struct vga_pci_softc *sc;
629 	int error;
630 
631 	sc = device_get_softc(dev);
632 	if (sc->vga_msi_child != NULL)
633 		return (EBUSY);
634 	error = pci_alloc_msi(dev, count);
635 	if (error == 0)
636 		sc->vga_msi_child = child;
637 	return (error);
638 }
639 
640 static int
vga_pci_alloc_msix(device_t dev,device_t child,int * count)641 vga_pci_alloc_msix(device_t dev, device_t child, int *count)
642 {
643 	struct vga_pci_softc *sc;
644 	int error;
645 
646 	sc = device_get_softc(dev);
647 	if (sc->vga_msi_child != NULL)
648 		return (EBUSY);
649 	error = pci_alloc_msix(dev, count);
650 	if (error == 0)
651 		sc->vga_msi_child = child;
652 	return (error);
653 }
654 
655 static int
vga_pci_remap_msix(device_t dev,device_t child,int count,const u_int * vectors)656 vga_pci_remap_msix(device_t dev, device_t child, int count,
657     const u_int *vectors)
658 {
659 	struct vga_pci_softc *sc;
660 
661 	sc = device_get_softc(dev);
662 	if (sc->vga_msi_child != child)
663 		return (ENXIO);
664 	return (pci_remap_msix(dev, count, vectors));
665 }
666 
667 static int
vga_pci_release_msi(device_t dev,device_t child)668 vga_pci_release_msi(device_t dev, device_t child)
669 {
670 	struct vga_pci_softc *sc;
671 	int error;
672 
673 	sc = device_get_softc(dev);
674 	if (sc->vga_msi_child != child)
675 		return (ENXIO);
676 	error = pci_release_msi(dev);
677 	if (error == 0)
678 		sc->vga_msi_child = NULL;
679 	return (error);
680 }
681 
682 static int
vga_pci_msi_count(device_t dev,device_t child)683 vga_pci_msi_count(device_t dev, device_t child)
684 {
685 
686 	return (pci_msi_count(dev));
687 }
688 
689 static int
vga_pci_msix_count(device_t dev,device_t child)690 vga_pci_msix_count(device_t dev, device_t child)
691 {
692 
693 	return (pci_msix_count(dev));
694 }
695 
696 static bus_dma_tag_t
vga_pci_get_dma_tag(device_t bus,device_t child)697 vga_pci_get_dma_tag(device_t bus, device_t child)
698 {
699 
700 	return (bus_get_dma_tag(bus));
701 }
702 
703 static device_method_t vga_pci_methods[] = {
704 	/* Device interface */
705 	DEVMETHOD(device_probe,		vga_pci_probe),
706 	DEVMETHOD(device_attach,	vga_pci_attach),
707 	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
708 	DEVMETHOD(device_suspend,	bus_generic_suspend),
709 	DEVMETHOD(device_detach,	bus_generic_detach),
710 	DEVMETHOD(device_resume,	bus_generic_resume),
711 
712 	/* Bus interface */
713 	DEVMETHOD(bus_read_ivar,	vga_pci_read_ivar),
714 	DEVMETHOD(bus_write_ivar,	vga_pci_write_ivar),
715 	DEVMETHOD(bus_setup_intr,	vga_pci_setup_intr),
716 	DEVMETHOD(bus_teardown_intr,	vga_pci_teardown_intr),
717 	DEVMETHOD(bus_alloc_resource,	vga_pci_alloc_resource),
718 	DEVMETHOD(bus_release_resource,	vga_pci_release_resource),
719 	DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
720 	DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
721 	DEVMETHOD(bus_get_dma_tag,	vga_pci_get_dma_tag),
722 
723 	/* PCI interface */
724 	DEVMETHOD(pci_read_config,	vga_pci_read_config),
725 	DEVMETHOD(pci_write_config,	vga_pci_write_config),
726 	DEVMETHOD(pci_enable_busmaster,	vga_pci_enable_busmaster),
727 	DEVMETHOD(pci_disable_busmaster, vga_pci_disable_busmaster),
728 	DEVMETHOD(pci_enable_io,	vga_pci_enable_io),
729 	DEVMETHOD(pci_disable_io,	vga_pci_disable_io),
730 	DEVMETHOD(pci_get_vpd_ident,	vga_pci_get_vpd_ident),
731 	DEVMETHOD(pci_get_vpd_readonly,	vga_pci_get_vpd_readonly),
732 	DEVMETHOD(pci_get_powerstate,	vga_pci_get_powerstate),
733 	DEVMETHOD(pci_set_powerstate,	vga_pci_set_powerstate),
734 	DEVMETHOD(pci_assign_interrupt,	vga_pci_assign_interrupt),
735 	DEVMETHOD(pci_find_cap,		vga_pci_find_cap),
736 	DEVMETHOD(pci_find_next_cap,	vga_pci_find_next_cap),
737 	DEVMETHOD(pci_find_extcap,	vga_pci_find_extcap),
738 	DEVMETHOD(pci_find_next_extcap,	vga_pci_find_next_extcap),
739 	DEVMETHOD(pci_find_htcap,	vga_pci_find_htcap),
740 	DEVMETHOD(pci_find_next_htcap,	vga_pci_find_next_htcap),
741 	DEVMETHOD(pci_alloc_msi,	vga_pci_alloc_msi),
742 	DEVMETHOD(pci_alloc_msix,	vga_pci_alloc_msix),
743 	DEVMETHOD(pci_remap_msix,	vga_pci_remap_msix),
744 	DEVMETHOD(pci_release_msi,	vga_pci_release_msi),
745 	DEVMETHOD(pci_msi_count,	vga_pci_msi_count),
746 	DEVMETHOD(pci_msix_count,	vga_pci_msix_count),
747 	DEVMETHOD_END
748 };
749 
750 static driver_t vga_pci_driver = {
751 	"vgapci",
752 	vga_pci_methods,
753 	sizeof(struct vga_pci_softc),
754 };
755 
756 DRIVER_MODULE(vgapci, pci, vga_pci_driver, 0, 0);
757 MODULE_DEPEND(vgapci, x86bios, 1, 1, 1);
758