1 /* 2 * aQuantia Corporation Network Driver 3 * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * (1) Redistributions of source code must retain the above 10 * copyright notice, this list of conditions and the following 11 * disclaimer. 12 * 13 * (2) Redistributions in binary form must reproduce the above 14 * copyright notice, this list of conditions and the following 15 * disclaimer in the documentation and/or other materials provided 16 * with the distribution. 17 * 18 * (3)The name of the author may not be used to endorse or promote 19 * products derived from this software without specific prior 20 * written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS 23 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 26 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 28 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 30 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 31 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #ifndef _AQ_RING_H_ 36 #define _AQ_RING_H_ 37 38 #include <sys/counter.h> 39 40 #include "aq_hw.h" 41 42 #define REFILL_THRESHOLD 128 43 44 45 struct aq_rx_wb { 46 uint32_t rss_type:4; 47 uint32_t pkt_type:8; 48 uint32_t rdm_err:1; 49 uint32_t rsvd:6; 50 uint32_t rx_cntl:2; 51 uint32_t sph:1; 52 uint32_t hdr_len:10; 53 uint32_t rss_hash; 54 uint16_t dd:1; 55 uint16_t eop:1; 56 uint16_t rx_stat:4; 57 uint16_t rx_estat:6; 58 uint16_t rsc_cnt:4; 59 uint16_t pkt_len; 60 uint16_t next_desp; 61 uint16_t vlan; 62 } __packed; 63 64 struct aq_rx_desc { 65 union { 66 /* HW RX descriptor */ 67 struct __packed { 68 uint64_t buf_addr; 69 uint64_t hdr_addr; 70 } read; 71 72 /* HW RX descriptor writeback */ 73 struct aq_rx_wb wb; 74 }; 75 } __packed; 76 77 /* Hardware tx descriptor */ 78 struct aq_tx_desc { 79 uint64_t buf_addr; 80 81 union { 82 struct { 83 uint32_t type:3; 84 uint32_t :1; 85 uint32_t len:16; 86 uint32_t dd:1; 87 uint32_t eop:1; 88 uint32_t cmd:8; 89 uint32_t :14; 90 uint32_t ct_idx:1; 91 uint32_t ct_en:1; 92 uint32_t pay_len:18; 93 } __packed; 94 uint64_t flags; 95 }; 96 } __packed; 97 98 enum aq_tx_desc_type { 99 tx_desc_type_desc = 1, 100 tx_desc_type_ctx = 2, 101 }; 102 103 enum aq_tx_desc_cmd { 104 tx_desc_cmd_vlan = 1, 105 tx_desc_cmd_fcs = 2, 106 tx_desc_cmd_ipv4 = 4, 107 tx_desc_cmd_l4cs = 8, 108 tx_desc_cmd_lso = 0x10, 109 tx_desc_cmd_wb = 0x20, 110 }; 111 112 /* Hardware tx context descriptor */ 113 union aq_txc_desc { 114 struct __packed { 115 uint64_t flags1; 116 uint64_t flags2; 117 }; 118 119 struct __packed { 120 uint64_t :40; 121 uint32_t tun_len:8; 122 uint32_t out_len:16; 123 uint32_t type:3; 124 uint32_t idx:1; 125 uint32_t vlan_tag:16; 126 uint32_t cmd:4; 127 uint32_t l2_len:7; 128 uint32_t l3_len:9; 129 uint32_t l4_len:8; 130 uint32_t mss_len:16; 131 }; 132 } __packed; 133 134 struct aq_ring_stats { 135 counter_u64_t rx_pkts; 136 counter_u64_t rx_bytes; 137 counter_u64_t rx_err; 138 counter_u64_t irq; 139 140 counter_u64_t tx_pkts; 141 counter_u64_t tx_bytes; 142 }; 143 144 struct aq_dev; 145 146 struct aq_ring { 147 struct aq_dev *dev; 148 int index; 149 150 struct if_irq irq; 151 int msix; 152 /* RX */ 153 qidx_t rx_size; 154 int rx_buf_size; 155 void *rx_desc_area_ptr; 156 volatile struct aq_rx_desc *rx_descs; 157 uint64_t rx_descs_phys; 158 159 /* TX */ 160 int tx_head, tx_tail; 161 qidx_t tx_size; 162 void *tx_desc_area_ptr; 163 volatile struct aq_tx_desc *tx_descs; 164 uint64_t tx_descs_phys; 165 166 struct aq_ring_stats stats; 167 }; 168 169 int aq_ring_rx_init(struct aq_hw *hw, struct aq_ring *ring); 170 int aq_ring_tx_init(struct aq_hw *hw, struct aq_ring *ring); 171 172 int aq_ring_tx_start(struct aq_hw *hw, struct aq_ring *ring); 173 int aq_ring_tx_stop(struct aq_hw *hw, struct aq_ring *ring); 174 int aq_ring_rx_start(struct aq_hw *hw, struct aq_ring *ring); 175 int aq_ring_rx_stop(struct aq_hw *hw, struct aq_ring *ring); 176 177 int aq_ring_tx_tail_update(struct aq_hw *hw, struct aq_ring *ring, uint32_t tail); 178 179 180 extern struct if_txrx aq_txrx; 181 int aq_intr(void *arg); 182 183 #endif /* _AQ_RING_H_ */ 184