1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Driver for the MMC / SD / SDIO IP found in:
4 *
5 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
6 *
7 * Copyright (C) 2015-19 Renesas Electronics Corporation
8 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
9 * Copyright (C) 2017 Horms Solutions, Simon Horman
10 * Copyright (C) 2011 Guennadi Liakhovetski
11 * Copyright (C) 2007 Ian Molton
12 * Copyright (C) 2004 Ian Molton
13 *
14 * This driver draws mainly on scattered spec sheets, Reverse engineering
15 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
16 * support). (Further 4 bit support from a later datasheet).
17 *
18 * TODO:
19 * Investigate using a workqueue for PIO transfers
20 * Eliminate FIXMEs
21 * Better Power management
22 * Handle MMC errors better
23 * double buffer support
24 *
25 */
26
27 #include <linux/delay.h>
28 #include <linux/device.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/highmem.h>
31 #include <linux/interrupt.h>
32 #include <linux/io.h>
33 #include <linux/irq.h>
34 #include <linux/mmc/card.h>
35 #include <linux/mmc/host.h>
36 #include <linux/mmc/mmc.h>
37 #include <linux/mmc/slot-gpio.h>
38 #include <linux/module.h>
39 #include <linux/of.h>
40 #include <linux/pagemap.h>
41 #include <linux/platform_data/tmio.h>
42 #include <linux/platform_device.h>
43 #include <linux/pm_qos.h>
44 #include <linux/pm_runtime.h>
45 #include <linux/regulator/consumer.h>
46 #include <linux/mmc/sdio.h>
47 #include <linux/scatterlist.h>
48 #include <linux/sizes.h>
49 #include <linux/spinlock.h>
50 #include <linux/workqueue.h>
51
52 #include "tmio_mmc.h"
53
tmio_mmc_start_dma(struct tmio_mmc_host * host,struct mmc_data * data)54 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
55 struct mmc_data *data)
56 {
57 if (host->dma_ops)
58 host->dma_ops->start(host, data);
59 }
60
tmio_mmc_end_dma(struct tmio_mmc_host * host)61 static inline void tmio_mmc_end_dma(struct tmio_mmc_host *host)
62 {
63 if (host->dma_ops && host->dma_ops->end)
64 host->dma_ops->end(host);
65 }
66
tmio_mmc_enable_dma(struct tmio_mmc_host * host,bool enable)67 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
68 {
69 if (host->dma_ops)
70 host->dma_ops->enable(host, enable);
71 }
72
tmio_mmc_request_dma(struct tmio_mmc_host * host,struct tmio_mmc_data * pdata)73 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
74 struct tmio_mmc_data *pdata)
75 {
76 if (host->dma_ops) {
77 host->dma_ops->request(host, pdata);
78 } else {
79 host->chan_tx = NULL;
80 host->chan_rx = NULL;
81 }
82 }
83
tmio_mmc_release_dma(struct tmio_mmc_host * host)84 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
85 {
86 if (host->dma_ops)
87 host->dma_ops->release(host);
88 }
89
tmio_mmc_abort_dma(struct tmio_mmc_host * host)90 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
91 {
92 if (host->dma_ops)
93 host->dma_ops->abort(host);
94 }
95
tmio_mmc_dataend_dma(struct tmio_mmc_host * host)96 static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host)
97 {
98 if (host->dma_ops)
99 host->dma_ops->dataend(host);
100 }
101
tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host * host,u32 i)102 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
103 {
104 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
105 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
106 }
107 EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);
108
tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host * host,u32 i)109 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
110 {
111 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
112 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
113 }
114 EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);
115
tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host * host,u32 i)116 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
117 {
118 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
119 }
120
tmio_mmc_init_sg(struct tmio_mmc_host * host,struct mmc_data * data)121 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
122 {
123 host->sg_len = data->sg_len;
124 host->sg_ptr = data->sg;
125 host->sg_orig = data->sg;
126 host->sg_off = 0;
127 }
128
tmio_mmc_next_sg(struct tmio_mmc_host * host)129 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
130 {
131 host->sg_ptr = sg_next(host->sg_ptr);
132 host->sg_off = 0;
133 return --host->sg_len;
134 }
135
136 #define CMDREQ_TIMEOUT 5000
137
tmio_mmc_enable_sdio_irq(struct mmc_host * mmc,int enable)138 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
139 {
140 struct tmio_mmc_host *host = mmc_priv(mmc);
141
142 if (enable && !host->sdio_irq_enabled) {
143 u16 sdio_status;
144
145 /* Keep device active while SDIO irq is enabled */
146 pm_runtime_get_sync(mmc_dev(mmc));
147
148 host->sdio_irq_enabled = true;
149 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ;
150
151 /* Clear obsolete interrupts before enabling */
152 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
153 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
154 sdio_status |= TMIO_SDIO_SETBITS_MASK;
155 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
156
157 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
158 } else if (!enable && host->sdio_irq_enabled) {
159 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
160 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
161
162 host->sdio_irq_enabled = false;
163 pm_runtime_put_autosuspend(mmc_dev(mmc));
164 }
165 }
166
tmio_mmc_set_bus_width(struct tmio_mmc_host * host,unsigned char bus_width)167 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
168 unsigned char bus_width)
169 {
170 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
171 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
172
173 /* reg now applies to MMC_BUS_WIDTH_4 */
174 if (bus_width == MMC_BUS_WIDTH_1)
175 reg |= CARD_OPT_WIDTH;
176 else if (bus_width == MMC_BUS_WIDTH_8)
177 reg |= CARD_OPT_WIDTH8;
178
179 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
180 }
181
tmio_mmc_reset(struct tmio_mmc_host * host,bool preserve)182 static void tmio_mmc_reset(struct tmio_mmc_host *host, bool preserve)
183 {
184 u16 card_opt, clk_ctrl, sdif_mode;
185
186 if (preserve) {
187 card_opt = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);
188 clk_ctrl = sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL);
189 if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
190 sdif_mode = sd_ctrl_read16(host, CTL_SDIF_MODE);
191 }
192
193 /* FIXME - should we set stop clock reg here */
194 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
195 usleep_range(10000, 11000);
196 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
197 usleep_range(10000, 11000);
198
199 tmio_mmc_abort_dma(host);
200
201 if (host->reset)
202 host->reset(host, preserve);
203
204 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask_all);
205 host->sdcard_irq_mask = host->sdcard_irq_mask_all;
206
207 if (host->native_hotplug)
208 tmio_mmc_enable_mmc_irqs(host,
209 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
210
211 tmio_mmc_set_bus_width(host, host->mmc->ios.bus_width);
212
213 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
214 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
215 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
216 }
217
218 if (preserve) {
219 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, card_opt);
220 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk_ctrl);
221 if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
222 sd_ctrl_write16(host, CTL_SDIF_MODE, sdif_mode);
223 }
224
225 if (host->mmc->card)
226 mmc_retune_needed(host->mmc);
227 }
228
tmio_mmc_reset_work(struct work_struct * work)229 static void tmio_mmc_reset_work(struct work_struct *work)
230 {
231 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
232 delayed_reset_work.work);
233 struct mmc_request *mrq;
234 unsigned long flags;
235
236 spin_lock_irqsave(&host->lock, flags);
237 mrq = host->mrq;
238
239 /*
240 * is request already finished? Since we use a non-blocking
241 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
242 * us, so, have to check for IS_ERR(host->mrq)
243 */
244 if (IS_ERR_OR_NULL(mrq) ||
245 time_is_after_jiffies(host->last_req_ts +
246 msecs_to_jiffies(CMDREQ_TIMEOUT))) {
247 spin_unlock_irqrestore(&host->lock, flags);
248 return;
249 }
250
251 dev_warn(&host->pdev->dev,
252 "timeout waiting for hardware interrupt (CMD%u)\n",
253 mrq->cmd->opcode);
254
255 if (host->data)
256 host->data->error = -ETIMEDOUT;
257 else if (host->cmd)
258 host->cmd->error = -ETIMEDOUT;
259 else
260 mrq->cmd->error = -ETIMEDOUT;
261
262 /* No new calls yet, but disallow concurrent tmio_mmc_done_work() */
263 host->mrq = ERR_PTR(-EBUSY);
264 host->cmd = NULL;
265 host->data = NULL;
266
267 spin_unlock_irqrestore(&host->lock, flags);
268
269 tmio_mmc_reset(host, true);
270
271 /* Ready for new calls */
272 host->mrq = NULL;
273 mmc_request_done(host->mmc, mrq);
274 }
275
276 /* These are the bitmasks the tmio chip requires to implement the MMC response
277 * types. Note that R1 and R6 are the same in this scheme. */
278 #define APP_CMD 0x0040
279 #define RESP_NONE 0x0300
280 #define RESP_R1 0x0400
281 #define RESP_R1B 0x0500
282 #define RESP_R2 0x0600
283 #define RESP_R3 0x0700
284 #define DATA_PRESENT 0x0800
285 #define TRANSFER_READ 0x1000
286 #define TRANSFER_MULTI 0x2000
287 #define SECURITY_CMD 0x4000
288 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
289
tmio_mmc_start_command(struct tmio_mmc_host * host,struct mmc_command * cmd)290 static int tmio_mmc_start_command(struct tmio_mmc_host *host,
291 struct mmc_command *cmd)
292 {
293 struct mmc_data *data = host->data;
294 int c = cmd->opcode;
295
296 switch (mmc_resp_type(cmd)) {
297 case MMC_RSP_NONE: c |= RESP_NONE; break;
298 case MMC_RSP_R1:
299 c |= RESP_R1; break;
300 case MMC_RSP_R1B: c |= RESP_R1B; break;
301 case MMC_RSP_R2: c |= RESP_R2; break;
302 case MMC_RSP_R3: c |= RESP_R3; break;
303 default:
304 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
305 return -EINVAL;
306 }
307
308 host->cmd = cmd;
309
310 /* FIXME - this seems to be ok commented out but the spec suggest this bit
311 * should be set when issuing app commands.
312 * if(cmd->flags & MMC_FLAG_ACMD)
313 * c |= APP_CMD;
314 */
315 if (data) {
316 c |= DATA_PRESENT;
317 if (data->blocks > 1) {
318 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
319 c |= TRANSFER_MULTI;
320
321 /*
322 * Disable auto CMD12 at IO_RW_EXTENDED and
323 * SET_BLOCK_COUNT when doing multiple block transfer
324 */
325 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
326 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))
327 c |= NO_CMD12_ISSUE;
328 }
329 if (data->flags & MMC_DATA_READ)
330 c |= TRANSFER_READ;
331 }
332
333 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD);
334
335 /* Fire off the command */
336 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
337 sd_ctrl_write16(host, CTL_SD_CMD, c);
338
339 return 0;
340 }
341
tmio_mmc_transfer_data(struct tmio_mmc_host * host,unsigned short * buf,unsigned int count)342 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
343 unsigned short *buf,
344 unsigned int count)
345 {
346 int is_read = host->data->flags & MMC_DATA_READ;
347 u8 *buf8;
348
349 /*
350 * Transfer the data
351 */
352 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
353 u32 data = 0;
354 u32 *buf32 = (u32 *)buf;
355
356 if (is_read)
357 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32,
358 count >> 2);
359 else
360 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32,
361 count >> 2);
362
363 /* if count was multiple of 4 */
364 if (!(count & 0x3))
365 return;
366
367 buf32 += count >> 2;
368 count %= 4;
369
370 if (is_read) {
371 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1);
372 memcpy(buf32, &data, count);
373 } else {
374 memcpy(&data, buf32, count);
375 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1);
376 }
377
378 return;
379 }
380
381 if (is_read)
382 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
383 else
384 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
385
386 /* if count was even number */
387 if (!(count & 0x1))
388 return;
389
390 /* if count was odd number */
391 buf8 = (u8 *)(buf + (count >> 1));
392
393 /*
394 * FIXME
395 *
396 * driver and this function are assuming that
397 * it is used as little endian
398 */
399 if (is_read)
400 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
401 else
402 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
403 }
404
405 /*
406 * This chip always returns (at least?) as much data as you ask for.
407 * I'm unsure what happens if you ask for less than a block. This should be
408 * looked into to ensure that a funny length read doesn't hose the controller.
409 */
tmio_mmc_pio_irq(struct tmio_mmc_host * host)410 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
411 {
412 struct mmc_data *data = host->data;
413 void *sg_virt;
414 unsigned short *buf;
415 unsigned int count;
416
417 if (host->dma_on) {
418 pr_err("PIO IRQ in DMA mode!\n");
419 return;
420 } else if (!data) {
421 pr_debug("Spurious PIO IRQ\n");
422 return;
423 }
424
425 sg_virt = kmap_local_page(sg_page(host->sg_ptr));
426 buf = (unsigned short *)(sg_virt + host->sg_ptr->offset + host->sg_off);
427
428 count = host->sg_ptr->length - host->sg_off;
429 if (count > data->blksz)
430 count = data->blksz;
431
432 pr_debug("count: %08x offset: %08x flags %08x\n",
433 count, host->sg_off, data->flags);
434
435 /* Transfer the data */
436 tmio_mmc_transfer_data(host, buf, count);
437
438 host->sg_off += count;
439
440 kunmap_local(sg_virt);
441
442 if (host->sg_off == host->sg_ptr->length)
443 tmio_mmc_next_sg(host);
444 }
445
tmio_mmc_check_bounce_buffer(struct tmio_mmc_host * host)446 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
447 {
448 if (host->sg_ptr == &host->bounce_sg) {
449 void *sg_virt = kmap_local_page(sg_page(host->sg_orig));
450
451 memcpy(sg_virt + host->sg_orig->offset, host->bounce_buf,
452 host->bounce_sg.length);
453 kunmap_local(sg_virt);
454 }
455 }
456
457 /* needs to be called with host->lock held */
tmio_mmc_do_data_irq(struct tmio_mmc_host * host)458 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
459 {
460 struct mmc_data *data = host->data;
461 struct mmc_command *stop;
462
463 host->data = NULL;
464
465 if (!data) {
466 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
467 return;
468 }
469 stop = data->stop;
470
471 /* FIXME - return correct transfer count on errors */
472 if (!data->error)
473 data->bytes_xfered = data->blocks * data->blksz;
474 else
475 data->bytes_xfered = 0;
476
477 pr_debug("Completed data request\n");
478
479 /*
480 * FIXME: other drivers allow an optional stop command of any given type
481 * which we dont do, as the chip can auto generate them.
482 * Perhaps we can be smarter about when to use auto CMD12 and
483 * only issue the auto request when we know this is the desired
484 * stop command, allowing fallback to the stop command the
485 * upper layers expect. For now, we do what works.
486 */
487
488 if (data->flags & MMC_DATA_READ) {
489 if (host->dma_on)
490 tmio_mmc_check_bounce_buffer(host);
491 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
492 host->mrq);
493 } else {
494 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
495 host->mrq);
496 }
497
498 if (stop && !host->mrq->sbc) {
499 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
500 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
501 stop->opcode, stop->arg);
502
503 /* fill in response from auto CMD12 */
504 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);
505
506 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
507 }
508
509 schedule_work(&host->done);
510 }
511 EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);
512
tmio_mmc_data_irq(struct tmio_mmc_host * host,unsigned int stat)513 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
514 {
515 struct mmc_data *data;
516
517 spin_lock(&host->lock);
518 data = host->data;
519
520 if (!data)
521 goto out;
522
523 if (stat & TMIO_STAT_DATATIMEOUT)
524 data->error = -ETIMEDOUT;
525 else if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
526 stat & TMIO_STAT_TXUNDERRUN)
527 data->error = -EILSEQ;
528 if (host->dma_on && (data->flags & MMC_DATA_WRITE)) {
529 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
530 bool done = false;
531
532 /*
533 * Has all data been written out yet? Testing on SuperH showed,
534 * that in most cases the first interrupt comes already with the
535 * BUSY status bit clear, but on some operations, like mount or
536 * in the beginning of a write / sync / umount, there is one
537 * DATAEND interrupt with the BUSY bit set, in this cases
538 * waiting for one more interrupt fixes the problem.
539 */
540 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
541 if (status & TMIO_STAT_SCLKDIVEN)
542 done = true;
543 } else {
544 if (!(status & TMIO_STAT_CMD_BUSY))
545 done = true;
546 }
547
548 if (done) {
549 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
550 tmio_mmc_dataend_dma(host);
551 }
552 } else if (host->dma_on && (data->flags & MMC_DATA_READ)) {
553 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
554 tmio_mmc_dataend_dma(host);
555 } else {
556 tmio_mmc_do_data_irq(host);
557 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
558 }
559 out:
560 spin_unlock(&host->lock);
561 }
562
tmio_mmc_cmd_irq(struct tmio_mmc_host * host,unsigned int stat)563 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat)
564 {
565 struct mmc_command *cmd = host->cmd;
566 int i, addr;
567
568 spin_lock(&host->lock);
569
570 if (!host->cmd) {
571 pr_debug("Spurious CMD irq\n");
572 goto out;
573 }
574
575 /* This controller is sicker than the PXA one. Not only do we need to
576 * drop the top 8 bits of the first response word, we also need to
577 * modify the order of the response for short response command types.
578 */
579
580 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
581 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
582
583 if (cmd->flags & MMC_RSP_136) {
584 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
585 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
586 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
587 cmd->resp[3] <<= 8;
588 } else if (cmd->flags & MMC_RSP_R3) {
589 cmd->resp[0] = cmd->resp[3];
590 }
591
592 if (stat & TMIO_STAT_CMDTIMEOUT)
593 cmd->error = -ETIMEDOUT;
594 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
595 stat & TMIO_STAT_STOPBIT_ERR ||
596 stat & TMIO_STAT_CMD_IDX_ERR)
597 cmd->error = -EILSEQ;
598
599 /* If there is data to handle we enable data IRQs here, and
600 * we will ultimatley finish the request in the data_end handler.
601 * If theres no data or we encountered an error, finish now.
602 */
603 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
604 if (host->data->flags & MMC_DATA_READ) {
605 if (!host->dma_on) {
606 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
607 } else {
608 tmio_mmc_disable_mmc_irqs(host,
609 TMIO_MASK_READOP);
610 queue_work(system_bh_wq, &host->dma_issue);
611 }
612 } else {
613 if (!host->dma_on) {
614 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
615 } else {
616 tmio_mmc_disable_mmc_irqs(host,
617 TMIO_MASK_WRITEOP);
618 queue_work(system_bh_wq, &host->dma_issue);
619 }
620 }
621 } else {
622 schedule_work(&host->done);
623 }
624
625 out:
626 spin_unlock(&host->lock);
627 }
628
__tmio_mmc_card_detect_irq(struct tmio_mmc_host * host,int ireg,int status)629 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
630 int ireg, int status)
631 {
632 struct mmc_host *mmc = host->mmc;
633
634 /* Card insert / remove attempts */
635 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
636 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
637 TMIO_STAT_CARD_REMOVE);
638 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
639 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
640 !work_pending(&mmc->detect.work))
641 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
642 return true;
643 }
644
645 return false;
646 }
647
__tmio_mmc_sdcard_irq(struct tmio_mmc_host * host,int ireg,int status)648 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg,
649 int status)
650 {
651 /* Command completion */
652 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
653 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND |
654 TMIO_STAT_CMDTIMEOUT);
655 tmio_mmc_cmd_irq(host, status);
656 return true;
657 }
658
659 /* Data transfer */
660 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
661 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
662 tmio_mmc_pio_irq(host);
663 return true;
664 }
665
666 /* Data transfer completion */
667 if (ireg & TMIO_STAT_DATAEND) {
668 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
669 tmio_mmc_data_irq(host, status);
670 return true;
671 }
672
673 if (host->dma_ops && host->dma_ops->dma_irq && host->dma_ops->dma_irq(host))
674 return true;
675
676 return false;
677 }
678
__tmio_mmc_sdio_irq(struct tmio_mmc_host * host)679 static bool __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
680 {
681 struct mmc_host *mmc = host->mmc;
682 struct tmio_mmc_data *pdata = host->pdata;
683 unsigned int ireg, status;
684 unsigned int sdio_status;
685
686 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
687 return false;
688
689 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
690 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
691
692 sdio_status = status & ~TMIO_SDIO_MASK_ALL;
693 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
694 sdio_status |= TMIO_SDIO_SETBITS_MASK;
695
696 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
697
698 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ) {
699 if (host->sdio_irq)
700 host->sdio_irq(host);
701 mmc_signal_sdio_irq(mmc);
702 }
703
704 return ireg;
705 }
706
tmio_mmc_irq(int irq,void * devid)707 irqreturn_t tmio_mmc_irq(int irq, void *devid)
708 {
709 struct tmio_mmc_host *host = devid;
710 unsigned int ireg, status;
711
712 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
713 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
714
715 /* Clear the status except the interrupt status */
716 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
717
718 if (__tmio_mmc_card_detect_irq(host, ireg, status))
719 return IRQ_HANDLED;
720 if (__tmio_mmc_sdcard_irq(host, ireg, status))
721 return IRQ_HANDLED;
722
723 if (__tmio_mmc_sdio_irq(host))
724 return IRQ_HANDLED;
725
726 return IRQ_NONE;
727 }
728 EXPORT_SYMBOL_GPL(tmio_mmc_irq);
729
tmio_mmc_start_data(struct tmio_mmc_host * host,struct mmc_data * data)730 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
731 struct mmc_data *data)
732 {
733 struct tmio_mmc_data *pdata = host->pdata;
734
735 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
736 data->blksz, data->blocks);
737
738 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
739 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
740 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
741 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
742
743 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
744 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
745 mmc_hostname(host->mmc), data->blksz);
746 return -EINVAL;
747 }
748 }
749
750 tmio_mmc_init_sg(host, data);
751 host->data = data;
752 host->dma_on = false;
753
754 /* Set transfer length / blocksize */
755 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
756 if (host->mmc->max_blk_count >= SZ_64K)
757 sd_ctrl_write32(host, CTL_XFER_BLK_COUNT, data->blocks);
758 else
759 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
760
761 tmio_mmc_start_dma(host, data);
762
763 return 0;
764 }
765
tmio_process_mrq(struct tmio_mmc_host * host,struct mmc_request * mrq)766 static void tmio_process_mrq(struct tmio_mmc_host *host,
767 struct mmc_request *mrq)
768 {
769 struct mmc_command *cmd;
770 int ret;
771
772 if (mrq->sbc && host->cmd != mrq->sbc) {
773 cmd = mrq->sbc;
774 } else {
775 cmd = mrq->cmd;
776 if (mrq->data) {
777 ret = tmio_mmc_start_data(host, mrq->data);
778 if (ret)
779 goto fail;
780 }
781 }
782
783 ret = tmio_mmc_start_command(host, cmd);
784 if (ret)
785 goto fail;
786
787 schedule_delayed_work(&host->delayed_reset_work,
788 msecs_to_jiffies(CMDREQ_TIMEOUT));
789 return;
790
791 fail:
792 host->mrq = NULL;
793 mrq->cmd->error = ret;
794 mmc_request_done(host->mmc, mrq);
795 }
796
797 /* Process requests from the MMC layer */
tmio_mmc_request(struct mmc_host * mmc,struct mmc_request * mrq)798 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
799 {
800 struct tmio_mmc_host *host = mmc_priv(mmc);
801 unsigned long flags;
802
803 spin_lock_irqsave(&host->lock, flags);
804
805 if (host->mrq) {
806 pr_debug("request not null\n");
807 if (IS_ERR(host->mrq)) {
808 spin_unlock_irqrestore(&host->lock, flags);
809 mrq->cmd->error = -EAGAIN;
810 mmc_request_done(mmc, mrq);
811 return;
812 }
813 }
814
815 host->last_req_ts = jiffies;
816 wmb();
817 host->mrq = mrq;
818
819 spin_unlock_irqrestore(&host->lock, flags);
820
821 tmio_process_mrq(host, mrq);
822 }
823
tmio_mmc_finish_request(struct tmio_mmc_host * host)824 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
825 {
826 struct mmc_request *mrq;
827 unsigned long flags;
828
829 spin_lock_irqsave(&host->lock, flags);
830
831 tmio_mmc_end_dma(host);
832
833 mrq = host->mrq;
834 if (IS_ERR_OR_NULL(mrq)) {
835 spin_unlock_irqrestore(&host->lock, flags);
836 return;
837 }
838
839 /* If not SET_BLOCK_COUNT, clear old data */
840 if (host->cmd != mrq->sbc) {
841 host->cmd = NULL;
842 host->data = NULL;
843 host->mrq = NULL;
844 }
845
846 cancel_delayed_work(&host->delayed_reset_work);
847
848 spin_unlock_irqrestore(&host->lock, flags);
849
850 if (mrq->cmd->error || (mrq->data && mrq->data->error)) {
851 tmio_mmc_ack_mmc_irqs(host, TMIO_MASK_IRQ); /* Clear all */
852 tmio_mmc_abort_dma(host);
853 }
854
855 /* Error means retune, but executed command was still successful */
856 if (host->check_retune && host->check_retune(host, mrq))
857 mmc_retune_needed(host->mmc);
858
859 /* If SET_BLOCK_COUNT, continue with main command */
860 if (host->mrq && !mrq->cmd->error) {
861 tmio_process_mrq(host, mrq);
862 return;
863 }
864
865 if (host->fixup_request)
866 host->fixup_request(host, mrq);
867
868 mmc_request_done(host->mmc, mrq);
869 }
870
tmio_mmc_done_work(struct work_struct * work)871 static void tmio_mmc_done_work(struct work_struct *work)
872 {
873 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
874 done);
875 tmio_mmc_finish_request(host);
876 }
877
tmio_mmc_power_on(struct tmio_mmc_host * host,unsigned short vdd)878 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
879 {
880 struct mmc_host *mmc = host->mmc;
881 int ret = 0;
882
883 /* .set_ios() is returning void, so, no chance to report an error */
884
885 if (!IS_ERR(mmc->supply.vmmc)) {
886 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
887 /*
888 * Attention: empiric value. With a b43 WiFi SDIO card this
889 * delay proved necessary for reliable card-insertion probing.
890 * 100us were not enough. Is this the same 140us delay, as in
891 * tmio_mmc_set_ios()?
892 */
893 usleep_range(200, 300);
894 }
895 /*
896 * It seems, VccQ should be switched on after Vcc, this is also what the
897 * omap_hsmmc.c driver does.
898 */
899 if (!ret) {
900 ret = mmc_regulator_enable_vqmmc(mmc);
901 usleep_range(200, 300);
902 }
903
904 if (ret < 0)
905 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
906 ret);
907 }
908
tmio_mmc_power_off(struct tmio_mmc_host * host)909 static void tmio_mmc_power_off(struct tmio_mmc_host *host)
910 {
911 struct mmc_host *mmc = host->mmc;
912
913 mmc_regulator_disable_vqmmc(mmc);
914
915 if (!IS_ERR(mmc->supply.vmmc))
916 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
917 }
918
tmio_mmc_get_timeout_cycles(struct tmio_mmc_host * host)919 static unsigned int tmio_mmc_get_timeout_cycles(struct tmio_mmc_host *host)
920 {
921 u16 val = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);
922
923 val = (val & CARD_OPT_TOP_MASK) >> CARD_OPT_TOP_SHIFT;
924 return 1 << (13 + val);
925 }
926
tmio_mmc_max_busy_timeout(struct tmio_mmc_host * host)927 static void tmio_mmc_max_busy_timeout(struct tmio_mmc_host *host)
928 {
929 unsigned int clk_rate = host->mmc->actual_clock ?: host->mmc->f_max;
930
931 host->mmc->max_busy_timeout = host->get_timeout_cycles(host) /
932 (clk_rate / MSEC_PER_SEC);
933 }
934
935 /* Set MMC clock / power.
936 * Note: This controller uses a simple divider scheme therefore it cannot
937 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
938 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
939 * slowest setting.
940 */
tmio_mmc_set_ios(struct mmc_host * mmc,struct mmc_ios * ios)941 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
942 {
943 struct tmio_mmc_host *host = mmc_priv(mmc);
944 struct device *dev = &host->pdev->dev;
945 unsigned long flags;
946
947 mutex_lock(&host->ios_lock);
948
949 spin_lock_irqsave(&host->lock, flags);
950 if (host->mrq) {
951 if (IS_ERR(host->mrq)) {
952 dev_dbg(dev,
953 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
954 current->comm, task_pid_nr(current),
955 ios->clock, ios->power_mode);
956 host->mrq = ERR_PTR(-EINTR);
957 } else {
958 dev_dbg(dev,
959 "%s.%d: CMD%u active since %lu, now %lu!\n",
960 current->comm, task_pid_nr(current),
961 host->mrq->cmd->opcode, host->last_req_ts,
962 jiffies);
963 }
964 spin_unlock_irqrestore(&host->lock, flags);
965
966 mutex_unlock(&host->ios_lock);
967 return;
968 }
969
970 /* Disallow new mrqs and work handlers to run */
971 host->mrq = ERR_PTR(-EBUSY);
972
973 spin_unlock_irqrestore(&host->lock, flags);
974
975 switch (ios->power_mode) {
976 case MMC_POWER_OFF:
977 tmio_mmc_power_off(host);
978 /* For R-Car Gen2+, we need to reset SDHI specific SCC */
979 if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
980 tmio_mmc_reset(host, false);
981
982 host->set_clock(host, 0);
983 break;
984 case MMC_POWER_UP:
985 tmio_mmc_power_on(host, ios->vdd);
986 host->set_clock(host, ios->clock);
987 tmio_mmc_set_bus_width(host, ios->bus_width);
988 break;
989 case MMC_POWER_ON:
990 host->set_clock(host, ios->clock);
991 tmio_mmc_set_bus_width(host, ios->bus_width);
992 break;
993 }
994
995 if (host->pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT)
996 tmio_mmc_max_busy_timeout(host);
997
998 /* Let things settle. delay taken from winCE driver */
999 usleep_range(140, 200);
1000 if (PTR_ERR(host->mrq) == -EINTR)
1001 dev_dbg(&host->pdev->dev,
1002 "%s.%d: IOS interrupted: clk %u, mode %u",
1003 current->comm, task_pid_nr(current),
1004 ios->clock, ios->power_mode);
1005
1006 /* Ready for new mrqs */
1007 host->mrq = NULL;
1008 host->clk_cache = ios->clock;
1009
1010 mutex_unlock(&host->ios_lock);
1011 }
1012
tmio_mmc_get_ro(struct mmc_host * mmc)1013 static int tmio_mmc_get_ro(struct mmc_host *mmc)
1014 {
1015 struct tmio_mmc_host *host = mmc_priv(mmc);
1016
1017 return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
1018 TMIO_STAT_WRPROTECT);
1019 }
1020
tmio_mmc_get_cd(struct mmc_host * mmc)1021 static int tmio_mmc_get_cd(struct mmc_host *mmc)
1022 {
1023 struct tmio_mmc_host *host = mmc_priv(mmc);
1024
1025 return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
1026 TMIO_STAT_SIGSTATE);
1027 }
1028
tmio_multi_io_quirk(struct mmc_card * card,unsigned int direction,int blk_size)1029 static int tmio_multi_io_quirk(struct mmc_card *card,
1030 unsigned int direction, int blk_size)
1031 {
1032 struct tmio_mmc_host *host = mmc_priv(card->host);
1033
1034 if (host->multi_io_quirk)
1035 return host->multi_io_quirk(card, direction, blk_size);
1036
1037 return blk_size;
1038 }
1039
1040 static struct mmc_host_ops tmio_mmc_ops = {
1041 .request = tmio_mmc_request,
1042 .set_ios = tmio_mmc_set_ios,
1043 .get_ro = tmio_mmc_get_ro,
1044 .get_cd = tmio_mmc_get_cd,
1045 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
1046 .multi_io_quirk = tmio_multi_io_quirk,
1047 };
1048
tmio_mmc_init_ocr(struct tmio_mmc_host * host)1049 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
1050 {
1051 struct tmio_mmc_data *pdata = host->pdata;
1052 struct mmc_host *mmc = host->mmc;
1053 int err;
1054
1055 err = mmc_regulator_get_supply(mmc);
1056 if (err)
1057 return err;
1058
1059 /* use ocr_mask if no regulator */
1060 if (!mmc->ocr_avail)
1061 mmc->ocr_avail = pdata->ocr_mask;
1062
1063 /*
1064 * try again.
1065 * There is possibility that regulator has not been probed
1066 */
1067 if (!mmc->ocr_avail)
1068 return -EPROBE_DEFER;
1069
1070 return 0;
1071 }
1072
tmio_mmc_of_parse(struct platform_device * pdev,struct mmc_host * mmc)1073 static void tmio_mmc_of_parse(struct platform_device *pdev,
1074 struct mmc_host *mmc)
1075 {
1076 const struct device_node *np = pdev->dev.of_node;
1077
1078 if (!np)
1079 return;
1080
1081 /*
1082 * DEPRECATED:
1083 * For new platforms, please use "disable-wp" instead of
1084 * "toshiba,mmc-wrprotect-disable"
1085 */
1086 if (of_property_read_bool(np, "toshiba,mmc-wrprotect-disable"))
1087 mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT;
1088 }
1089
tmio_mmc_host_alloc(struct platform_device * pdev,struct tmio_mmc_data * pdata)1090 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
1091 struct tmio_mmc_data *pdata)
1092 {
1093 struct tmio_mmc_host *host;
1094 struct mmc_host *mmc;
1095 void __iomem *ctl;
1096 int ret;
1097
1098 ctl = devm_platform_ioremap_resource(pdev, 0);
1099 if (IS_ERR(ctl))
1100 return ERR_CAST(ctl);
1101
1102 mmc = devm_mmc_alloc_host(&pdev->dev, sizeof(*host));
1103 if (!mmc)
1104 return ERR_PTR(-ENOMEM);
1105
1106 host = mmc_priv(mmc);
1107 host->ctl = ctl;
1108 host->mmc = mmc;
1109 host->pdev = pdev;
1110 host->pdata = pdata;
1111 host->ops = tmio_mmc_ops;
1112 mmc->ops = &host->ops;
1113
1114 ret = mmc_of_parse(host->mmc);
1115 if (ret)
1116 return ERR_PTR(ret);
1117
1118 tmio_mmc_of_parse(pdev, mmc);
1119
1120 platform_set_drvdata(pdev, host);
1121
1122 return host;
1123 }
1124 EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
1125
tmio_mmc_host_probe(struct tmio_mmc_host * _host)1126 int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
1127 {
1128 struct platform_device *pdev = _host->pdev;
1129 struct tmio_mmc_data *pdata = _host->pdata;
1130 struct mmc_host *mmc = _host->mmc;
1131 int ret;
1132
1133 /*
1134 * Check the sanity of mmc->f_min to prevent host->set_clock() from
1135 * looping forever...
1136 */
1137 if (mmc->f_min == 0)
1138 return -EINVAL;
1139
1140 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1141 _host->write16_hook = NULL;
1142
1143 if (pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT && !_host->get_timeout_cycles)
1144 _host->get_timeout_cycles = tmio_mmc_get_timeout_cycles;
1145
1146 ret = tmio_mmc_init_ocr(_host);
1147 if (ret < 0)
1148 return ret;
1149
1150 /*
1151 * Look for a card detect GPIO, if it fails with anything
1152 * else than a probe deferral, just live without it.
1153 */
1154 ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0);
1155 if (ret == -EPROBE_DEFER)
1156 return ret;
1157
1158 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1159 mmc->caps2 |= pdata->capabilities2;
1160 mmc->max_segs = pdata->max_segs ? : 32;
1161 mmc->max_blk_size = TMIO_MAX_BLK_SIZE;
1162 mmc->max_blk_count = pdata->max_blk_count ? :
1163 (PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs;
1164 mmc->max_req_size = min_t(size_t,
1165 mmc->max_blk_size * mmc->max_blk_count,
1166 dma_max_mapping_size(&pdev->dev));
1167 mmc->max_seg_size = mmc->max_req_size;
1168
1169 if (mmc_host_can_gpio_ro(mmc))
1170 _host->ops.get_ro = mmc_gpio_get_ro;
1171
1172 if (mmc_host_can_gpio_cd(mmc))
1173 _host->ops.get_cd = mmc_gpio_get_cd;
1174
1175 /* must be set before tmio_mmc_reset() */
1176 _host->native_hotplug = !(mmc_host_can_gpio_cd(mmc) ||
1177 mmc->caps & MMC_CAP_NEEDS_POLL ||
1178 !mmc_card_is_removable(mmc));
1179
1180 /*
1181 * While using internal tmio hardware logic for card detection, we need
1182 * to ensure it stays powered for it to work.
1183 */
1184 if (_host->native_hotplug)
1185 pm_runtime_get_noresume(&pdev->dev);
1186
1187 _host->sdio_irq_enabled = false;
1188 if (pdata->flags & TMIO_MMC_SDIO_IRQ)
1189 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1190
1191 if (!_host->sdcard_irq_mask_all)
1192 _host->sdcard_irq_mask_all = TMIO_MASK_ALL;
1193
1194 _host->set_clock(_host, 0);
1195 tmio_mmc_reset(_host, false);
1196
1197 spin_lock_init(&_host->lock);
1198 mutex_init(&_host->ios_lock);
1199
1200 /* Init delayed work for request timeouts */
1201 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1202 INIT_WORK(&_host->done, tmio_mmc_done_work);
1203
1204 /* See if we also get DMA */
1205 tmio_mmc_request_dma(_host, pdata);
1206
1207 pm_runtime_get_noresume(&pdev->dev);
1208 pm_runtime_set_active(&pdev->dev);
1209 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1210 pm_runtime_use_autosuspend(&pdev->dev);
1211 pm_runtime_enable(&pdev->dev);
1212
1213 ret = mmc_add_host(mmc);
1214 if (ret)
1215 goto remove_host;
1216
1217 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1218 pm_runtime_put(&pdev->dev);
1219
1220 return 0;
1221
1222 remove_host:
1223 pm_runtime_put_noidle(&pdev->dev);
1224 tmio_mmc_host_remove(_host);
1225 return ret;
1226 }
1227 EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);
1228
tmio_mmc_host_remove(struct tmio_mmc_host * host)1229 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1230 {
1231 struct platform_device *pdev = host->pdev;
1232 struct mmc_host *mmc = host->mmc;
1233
1234 pm_runtime_get_sync(&pdev->dev);
1235
1236 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
1237 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
1238
1239 dev_pm_qos_hide_latency_limit(&pdev->dev);
1240
1241 mmc_remove_host(mmc);
1242 cancel_work_sync(&host->done);
1243 cancel_delayed_work_sync(&host->delayed_reset_work);
1244 tmio_mmc_release_dma(host);
1245 tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all);
1246
1247 if (host->native_hotplug)
1248 pm_runtime_put_noidle(&pdev->dev);
1249
1250 pm_runtime_disable(&pdev->dev);
1251 pm_runtime_dont_use_autosuspend(&pdev->dev);
1252 pm_runtime_put_noidle(&pdev->dev);
1253 }
1254 EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
1255
1256 #ifdef CONFIG_PM
tmio_mmc_clk_enable(struct tmio_mmc_host * host)1257 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
1258 {
1259 if (!host->clk_enable)
1260 return -ENOTSUPP;
1261
1262 return host->clk_enable(host);
1263 }
1264
tmio_mmc_clk_disable(struct tmio_mmc_host * host)1265 static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)
1266 {
1267 if (host->clk_disable)
1268 host->clk_disable(host);
1269 }
1270
tmio_mmc_host_runtime_suspend(struct device * dev)1271 int tmio_mmc_host_runtime_suspend(struct device *dev)
1272 {
1273 struct tmio_mmc_host *host = dev_get_drvdata(dev);
1274
1275 tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all);
1276
1277 if (host->clk_cache)
1278 host->set_clock(host, 0);
1279
1280 tmio_mmc_clk_disable(host);
1281
1282 return 0;
1283 }
1284 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend);
1285
tmio_mmc_host_runtime_resume(struct device * dev)1286 int tmio_mmc_host_runtime_resume(struct device *dev)
1287 {
1288 struct tmio_mmc_host *host = dev_get_drvdata(dev);
1289
1290 tmio_mmc_clk_enable(host);
1291 tmio_mmc_reset(host, false);
1292
1293 if (host->clk_cache)
1294 host->set_clock(host, host->clk_cache);
1295
1296 tmio_mmc_enable_dma(host, true);
1297
1298 return 0;
1299 }
1300 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);
1301 #endif
1302
1303 MODULE_DESCRIPTION("TMIO MMC core driver");
1304 MODULE_LICENSE("GPL v2");
1305