1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 //
3 // This file is provided under a dual BSD/GPLv2 license. When using or
4 // redistributing this file, you may do so under either license.
5 //
6 // Copyright(c) 2022 Intel Corporation
7 //
8 // Authors: Rander Wang <rander.wang@linux.intel.com>
9 // Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
10 //
11 #include <linux/firmware.h>
12 #include <sound/sof/header.h>
13 #include <sound/sof/ipc4/header.h>
14 #include "sof-priv.h"
15 #include "sof-audio.h"
16 #include "ipc4-fw-reg.h"
17 #include "ipc4-priv.h"
18 #include "ipc4-telemetry.h"
19 #include "ops.h"
20
21 static const struct sof_ipc4_fw_status {
22 int status;
23 char *msg;
24 } ipc4_status[] = {
25 {0, "The operation was successful"},
26 {1, "Invalid parameter specified"},
27 {2, "Unknown message type specified"},
28 {3, "Not enough space in the IPC reply buffer to complete the request"},
29 {4, "The system or resource is busy"},
30 {5, "Replaced ADSP IPC PENDING (unused)"},
31 {6, "Unknown error while processing the request"},
32 {7, "Unsupported operation requested"},
33 {8, "Reserved (ADSP_STAGE_UNINITIALIZED removed)"},
34 {9, "Specified resource not found"},
35 {10, "A resource's ID requested to be created is already assigned"},
36 {11, "Reserved (ADSP_IPC_OUT_OF_MIPS removed)"},
37 {12, "Required resource is in invalid state"},
38 {13, "Requested power transition failed to complete"},
39 {14, "Manifest of the library being loaded is invalid"},
40 {15, "Requested service or data is unavailable on the target platform"},
41 {42, "Library target address is out of storage memory range"},
42 {43, "Reserved"},
43 {44, "Image verification by CSE failed"},
44 {100, "General module management error"},
45 {101, "Module loading failed"},
46 {102, "Integrity check of the loaded module content failed"},
47 {103, "Attempt to unload code of the module in use"},
48 {104, "Other failure of module instance initialization request"},
49 {105, "Reserved (ADSP_IPC_OUT_OF_MIPS removed)"},
50 {106, "Reserved (ADSP_IPC_CONFIG_GET_ERROR removed)"},
51 {107, "Reserved (ADSP_IPC_CONFIG_SET_ERROR removed)"},
52 {108, "Reserved (ADSP_IPC_LARGE_CONFIG_GET_ERROR removed)"},
53 {109, "Reserved (ADSP_IPC_LARGE_CONFIG_SET_ERROR removed)"},
54 {110, "Invalid (out of range) module ID provided"},
55 {111, "Invalid module instance ID provided"},
56 {112, "Invalid queue (pin) ID provided"},
57 {113, "Invalid destination queue (pin) ID provided"},
58 {114, "Reserved (ADSP_IPC_BIND_UNBIND_DST_SINK_UNSUPPORTED removed)"},
59 {115, "Reserved (ADSP_IPC_UNLOAD_INST_EXISTS removed)"},
60 {116, "Invalid target code ID provided"},
61 {117, "Injection DMA buffer is too small for probing the input pin"},
62 {118, "Extraction DMA buffer is too small for probing the output pin"},
63 {120, "Invalid ID of configuration item provided in TLV list"},
64 {121, "Invalid length of configuration item provided in TLV list"},
65 {122, "Invalid structure of configuration item provided"},
66 {140, "Initialization of DMA Gateway failed"},
67 {141, "Invalid ID of gateway provided"},
68 {142, "Setting state of DMA Gateway failed"},
69 {143, "DMA_CONTROL message targeting gateway not allocated yet"},
70 {150, "Attempt to configure SCLK while I2S port is running"},
71 {151, "Attempt to configure MCLK while I2S port is running"},
72 {152, "Attempt to stop SCLK that is not running"},
73 {153, "Attempt to stop MCLK that is not running"},
74 {160, "Reserved (ADSP_IPC_PIPELINE_NOT_INITIALIZED removed)"},
75 {161, "Reserved (ADSP_IPC_PIPELINE_NOT_EXIST removed)"},
76 {162, "Reserved (ADSP_IPC_PIPELINE_SAVE_FAILED removed)"},
77 {163, "Reserved (ADSP_IPC_PIPELINE_RESTORE_FAILED removed)"},
78 {165, "Reserved (ADSP_IPC_PIPELINE_ALREADY_EXISTS removed)"},
79 };
80
81 typedef void (*ipc4_notification_handler)(struct snd_sof_dev *sdev,
82 struct sof_ipc4_msg *msg);
83
sof_ipc4_check_reply_status(struct snd_sof_dev * sdev,u32 status)84 static int sof_ipc4_check_reply_status(struct snd_sof_dev *sdev, u32 status)
85 {
86 int i, ret;
87
88 status &= SOF_IPC4_REPLY_STATUS;
89
90 if (!status)
91 return 0;
92
93 for (i = 0; i < ARRAY_SIZE(ipc4_status); i++) {
94 if (ipc4_status[i].status == status) {
95 dev_err(sdev->dev, "FW reported error: %u - %s\n",
96 status, ipc4_status[i].msg);
97 goto to_errno;
98 }
99 }
100
101 if (i == ARRAY_SIZE(ipc4_status))
102 dev_err(sdev->dev, "FW reported error: %u - Unknown\n", status);
103
104 to_errno:
105 switch (status) {
106 case 2:
107 case 15:
108 ret = -EOPNOTSUPP;
109 break;
110 case 8:
111 case 11:
112 case 105 ... 109:
113 case 114 ... 115:
114 case 160 ... 163:
115 case 165:
116 ret = -ENOENT;
117 break;
118 case 4:
119 case 150:
120 case 151:
121 ret = -EBUSY;
122 break;
123 default:
124 ret = -EINVAL;
125 break;
126 }
127
128 return ret;
129 }
130
131 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC)
132 #define DBG_IPC4_MSG_TYPE_ENTRY(type) [SOF_IPC4_##type] = #type
133 static const char * const ipc4_dbg_mod_msg_type[] = {
134 DBG_IPC4_MSG_TYPE_ENTRY(MOD_INIT_INSTANCE),
135 DBG_IPC4_MSG_TYPE_ENTRY(MOD_CONFIG_GET),
136 DBG_IPC4_MSG_TYPE_ENTRY(MOD_CONFIG_SET),
137 DBG_IPC4_MSG_TYPE_ENTRY(MOD_LARGE_CONFIG_GET),
138 DBG_IPC4_MSG_TYPE_ENTRY(MOD_LARGE_CONFIG_SET),
139 DBG_IPC4_MSG_TYPE_ENTRY(MOD_BIND),
140 DBG_IPC4_MSG_TYPE_ENTRY(MOD_UNBIND),
141 DBG_IPC4_MSG_TYPE_ENTRY(MOD_SET_DX),
142 DBG_IPC4_MSG_TYPE_ENTRY(MOD_SET_D0IX),
143 DBG_IPC4_MSG_TYPE_ENTRY(MOD_ENTER_MODULE_RESTORE),
144 DBG_IPC4_MSG_TYPE_ENTRY(MOD_EXIT_MODULE_RESTORE),
145 DBG_IPC4_MSG_TYPE_ENTRY(MOD_DELETE_INSTANCE),
146 };
147
148 static const char * const ipc4_dbg_glb_msg_type[] = {
149 DBG_IPC4_MSG_TYPE_ENTRY(GLB_BOOT_CONFIG),
150 DBG_IPC4_MSG_TYPE_ENTRY(GLB_ROM_CONTROL),
151 DBG_IPC4_MSG_TYPE_ENTRY(GLB_IPCGATEWAY_CMD),
152 DBG_IPC4_MSG_TYPE_ENTRY(GLB_PERF_MEASUREMENTS_CMD),
153 DBG_IPC4_MSG_TYPE_ENTRY(GLB_CHAIN_DMA),
154 DBG_IPC4_MSG_TYPE_ENTRY(GLB_LOAD_MULTIPLE_MODULES),
155 DBG_IPC4_MSG_TYPE_ENTRY(GLB_UNLOAD_MULTIPLE_MODULES),
156 DBG_IPC4_MSG_TYPE_ENTRY(GLB_CREATE_PIPELINE),
157 DBG_IPC4_MSG_TYPE_ENTRY(GLB_DELETE_PIPELINE),
158 DBG_IPC4_MSG_TYPE_ENTRY(GLB_SET_PIPELINE_STATE),
159 DBG_IPC4_MSG_TYPE_ENTRY(GLB_GET_PIPELINE_STATE),
160 DBG_IPC4_MSG_TYPE_ENTRY(GLB_GET_PIPELINE_CONTEXT_SIZE),
161 DBG_IPC4_MSG_TYPE_ENTRY(GLB_SAVE_PIPELINE),
162 DBG_IPC4_MSG_TYPE_ENTRY(GLB_RESTORE_PIPELINE),
163 DBG_IPC4_MSG_TYPE_ENTRY(GLB_LOAD_LIBRARY),
164 DBG_IPC4_MSG_TYPE_ENTRY(GLB_LOAD_LIBRARY_PREPARE),
165 DBG_IPC4_MSG_TYPE_ENTRY(GLB_INTERNAL_MESSAGE),
166 DBG_IPC4_MSG_TYPE_ENTRY(GLB_NOTIFICATION),
167 };
168
169 #define DBG_IPC4_NOTIFICATION_TYPE_ENTRY(type) [SOF_IPC4_NOTIFY_##type] = #type
170 static const char * const ipc4_dbg_notification_type[] = {
171 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(PHRASE_DETECTED),
172 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(RESOURCE_EVENT),
173 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(LOG_BUFFER_STATUS),
174 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(TIMESTAMP_CAPTURED),
175 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(FW_READY),
176 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(FW_AUD_CLASS_RESULT),
177 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(EXCEPTION_CAUGHT),
178 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(MODULE_NOTIFICATION),
179 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(PROBE_DATA_AVAILABLE),
180 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(ASYNC_MSG_SRVC_MESSAGE),
181 };
182
sof_ipc4_log_header(struct device * dev,u8 * text,struct sof_ipc4_msg * msg,bool data_size_valid)183 static void sof_ipc4_log_header(struct device *dev, u8 *text, struct sof_ipc4_msg *msg,
184 bool data_size_valid)
185 {
186 u32 val, type;
187 const u8 *str2 = NULL;
188 const u8 *str = NULL;
189
190 val = msg->primary & SOF_IPC4_MSG_TARGET_MASK;
191 type = SOF_IPC4_MSG_TYPE_GET(msg->primary);
192
193 if (val == SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG)) {
194 /* Module message */
195 if (type < SOF_IPC4_MOD_TYPE_LAST)
196 str = ipc4_dbg_mod_msg_type[type];
197 if (!str)
198 str = "Unknown Module message type";
199 } else {
200 /* Global FW message */
201 if (type < SOF_IPC4_GLB_TYPE_LAST)
202 str = ipc4_dbg_glb_msg_type[type];
203 if (!str)
204 str = "Unknown Global message type";
205
206 if (type == SOF_IPC4_GLB_NOTIFICATION) {
207 /* Notification message */
208 u32 notif = SOF_IPC4_NOTIFICATION_TYPE_GET(msg->primary);
209
210 /* Do not print log buffer notification if not desired */
211 if (notif == SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS &&
212 !sof_debug_check_flag(SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS))
213 return;
214
215 if (notif < SOF_IPC4_NOTIFY_TYPE_LAST)
216 str2 = ipc4_dbg_notification_type[notif];
217 if (!str2)
218 str2 = "Unknown Global notification";
219 }
220 }
221
222 if (str2) {
223 if (data_size_valid && msg->data_size)
224 dev_dbg(dev, "%s: %#x|%#x: %s|%s [data size: %zu]\n",
225 text, msg->primary, msg->extension, str, str2,
226 msg->data_size);
227 else
228 dev_dbg(dev, "%s: %#x|%#x: %s|%s\n", text, msg->primary,
229 msg->extension, str, str2);
230 } else {
231 if (data_size_valid && msg->data_size)
232 dev_dbg(dev, "%s: %#x|%#x: %s [data size: %zu]\n",
233 text, msg->primary, msg->extension, str,
234 msg->data_size);
235 else
236 dev_dbg(dev, "%s: %#x|%#x: %s\n", text, msg->primary,
237 msg->extension, str);
238 }
239 }
240
sof_ipc4_pipeline_state_str(enum sof_ipc4_pipeline_state state)241 const char *sof_ipc4_pipeline_state_str(enum sof_ipc4_pipeline_state state)
242 {
243 switch (state) {
244 case SOF_IPC4_PIPE_INVALID_STATE:
245 return " (INVALID_STATE)";
246 case SOF_IPC4_PIPE_UNINITIALIZED:
247 return " (UNINITIALIZED)";
248 case SOF_IPC4_PIPE_RESET:
249 return " (RESET)";
250 case SOF_IPC4_PIPE_PAUSED:
251 return " (PAUSED)";
252 case SOF_IPC4_PIPE_RUNNING:
253 return " (RUNNING)";
254 case SOF_IPC4_PIPE_EOS:
255 return " (EOS)";
256 default:
257 return " (<unknown>)";
258 }
259 }
260 #else /* CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC */
sof_ipc4_log_header(struct device * dev,u8 * text,struct sof_ipc4_msg * msg,bool data_size_valid)261 static void sof_ipc4_log_header(struct device *dev, u8 *text, struct sof_ipc4_msg *msg,
262 bool data_size_valid)
263 {
264 /* Do not print log buffer notification if not desired */
265 if (!sof_debug_check_flag(SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS) &&
266 !SOF_IPC4_MSG_IS_MODULE_MSG(msg->primary) &&
267 SOF_IPC4_MSG_TYPE_GET(msg->primary) == SOF_IPC4_GLB_NOTIFICATION &&
268 SOF_IPC4_NOTIFICATION_TYPE_GET(msg->primary) == SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS)
269 return;
270
271 if (data_size_valid && msg->data_size)
272 dev_dbg(dev, "%s: %#x|%#x [data size: %zu]\n", text,
273 msg->primary, msg->extension, msg->data_size);
274 else
275 dev_dbg(dev, "%s: %#x|%#x\n", text, msg->primary, msg->extension);
276 }
277
sof_ipc4_pipeline_state_str(enum sof_ipc4_pipeline_state state)278 const char *sof_ipc4_pipeline_state_str(enum sof_ipc4_pipeline_state state)
279 {
280 return "";
281 }
282 #endif
283
sof_ipc4_dump_payload(struct snd_sof_dev * sdev,void * ipc_data,size_t size)284 static void sof_ipc4_dump_payload(struct snd_sof_dev *sdev,
285 void *ipc_data, size_t size)
286 {
287 print_hex_dump_debug("Message payload: ", DUMP_PREFIX_OFFSET,
288 16, 4, ipc_data, size, false);
289 }
290
sof_ipc4_get_reply(struct snd_sof_dev * sdev)291 static int sof_ipc4_get_reply(struct snd_sof_dev *sdev)
292 {
293 struct snd_sof_ipc_msg *msg = sdev->msg;
294 struct sof_ipc4_msg *ipc4_reply;
295 int ret;
296
297 /* get the generic reply */
298 ipc4_reply = msg->reply_data;
299
300 sof_ipc4_log_header(sdev->dev, "ipc tx reply", ipc4_reply, false);
301
302 ret = sof_ipc4_check_reply_status(sdev, ipc4_reply->primary);
303 if (ret)
304 return ret;
305
306 /* No other information is expected for non large config get replies */
307 if (!msg->reply_size || !SOF_IPC4_MSG_IS_MODULE_MSG(ipc4_reply->primary) ||
308 (SOF_IPC4_MSG_TYPE_GET(ipc4_reply->primary) != SOF_IPC4_MOD_LARGE_CONFIG_GET))
309 return 0;
310
311 /* Read the requested payload */
312 snd_sof_dsp_mailbox_read(sdev, sdev->dsp_box.offset, ipc4_reply->data_ptr,
313 msg->reply_size);
314
315 return 0;
316 }
317
318 /* wait for IPC message reply */
ipc4_wait_tx_done(struct snd_sof_ipc * ipc,void * reply_data)319 static int ipc4_wait_tx_done(struct snd_sof_ipc *ipc, void *reply_data)
320 {
321 struct snd_sof_ipc_msg *msg = &ipc->msg;
322 struct sof_ipc4_msg *ipc4_msg = msg->msg_data;
323 struct snd_sof_dev *sdev = ipc->sdev;
324 int ret;
325
326 /* wait for DSP IPC completion */
327 ret = wait_event_timeout(msg->waitq, msg->ipc_complete,
328 msecs_to_jiffies(sdev->ipc_timeout));
329 if (ret == 0) {
330 dev_err(sdev->dev, "ipc timed out for %#x|%#x\n",
331 ipc4_msg->primary, ipc4_msg->extension);
332 snd_sof_handle_fw_exception(ipc->sdev, "IPC timeout");
333 return -ETIMEDOUT;
334 }
335
336 if (msg->reply_error) {
337 dev_err(sdev->dev, "ipc error for msg %#x|%#x\n",
338 ipc4_msg->primary, ipc4_msg->extension);
339 ret = msg->reply_error;
340 } else {
341 if (reply_data) {
342 struct sof_ipc4_msg *ipc4_reply = msg->reply_data;
343 struct sof_ipc4_msg *ipc4_reply_data = reply_data;
344
345 /* Copy the header */
346 ipc4_reply_data->header_u64 = ipc4_reply->header_u64;
347 if (msg->reply_size && ipc4_reply_data->data_ptr) {
348 /* copy the payload returned from DSP */
349 memcpy(ipc4_reply_data->data_ptr, ipc4_reply->data_ptr,
350 msg->reply_size);
351 ipc4_reply_data->data_size = msg->reply_size;
352 }
353 }
354
355 ret = 0;
356 sof_ipc4_log_header(sdev->dev, "ipc tx done ", ipc4_msg, true);
357 }
358
359 /* re-enable dumps after successful IPC tx */
360 if (sdev->ipc_dump_printed) {
361 sdev->dbg_dump_printed = false;
362 sdev->ipc_dump_printed = false;
363 }
364
365 return ret;
366 }
367
ipc4_tx_msg_unlocked(struct snd_sof_ipc * ipc,void * msg_data,size_t msg_bytes,void * reply_data,size_t reply_bytes)368 static int ipc4_tx_msg_unlocked(struct snd_sof_ipc *ipc,
369 void *msg_data, size_t msg_bytes,
370 void *reply_data, size_t reply_bytes)
371 {
372 struct sof_ipc4_msg *ipc4_msg = msg_data;
373 struct snd_sof_dev *sdev = ipc->sdev;
374 int ret;
375
376 if (msg_bytes > ipc->max_payload_size || reply_bytes > ipc->max_payload_size)
377 return -EINVAL;
378
379 sof_ipc4_log_header(sdev->dev, "ipc tx ", msg_data, true);
380
381 ret = sof_ipc_send_msg(sdev, msg_data, msg_bytes, reply_bytes);
382 if (ret) {
383 dev_err_ratelimited(sdev->dev,
384 "%s: ipc message send for %#x|%#x failed: %d\n",
385 __func__, ipc4_msg->primary, ipc4_msg->extension, ret);
386 return ret;
387 }
388
389 /* now wait for completion */
390 return ipc4_wait_tx_done(ipc, reply_data);
391 }
392
sof_ipc4_tx_msg(struct snd_sof_dev * sdev,void * msg_data,size_t msg_bytes,void * reply_data,size_t reply_bytes,bool no_pm)393 static int sof_ipc4_tx_msg(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes,
394 void *reply_data, size_t reply_bytes, bool no_pm)
395 {
396 struct snd_sof_ipc *ipc = sdev->ipc;
397 int ret;
398
399 if (!msg_data)
400 return -EINVAL;
401
402 if (!no_pm) {
403 const struct sof_dsp_power_state target_state = {
404 .state = SOF_DSP_PM_D0,
405 };
406
407 /* ensure the DSP is in D0i0 before sending a new IPC */
408 ret = snd_sof_dsp_set_power_state(sdev, &target_state);
409 if (ret < 0)
410 return ret;
411 }
412
413 /* Serialise IPC TX */
414 mutex_lock(&ipc->tx_mutex);
415
416 ret = ipc4_tx_msg_unlocked(ipc, msg_data, msg_bytes, reply_data, reply_bytes);
417
418 if (sof_debug_check_flag(SOF_DBG_DUMP_IPC_MESSAGE_PAYLOAD)) {
419 struct sof_ipc4_msg *msg = NULL;
420
421 /* payload is indicated by non zero msg/reply_bytes */
422 if (msg_bytes)
423 msg = msg_data;
424 else if (reply_bytes)
425 msg = reply_data;
426
427 if (msg)
428 sof_ipc4_dump_payload(sdev, msg->data_ptr, msg->data_size);
429 }
430
431 mutex_unlock(&ipc->tx_mutex);
432
433 return ret;
434 }
435
sof_ipc4_set_get_data(struct snd_sof_dev * sdev,void * data,size_t payload_bytes,bool set)436 static int sof_ipc4_set_get_data(struct snd_sof_dev *sdev, void *data,
437 size_t payload_bytes, bool set)
438 {
439 const struct sof_dsp_power_state target_state = {
440 .state = SOF_DSP_PM_D0,
441 };
442 size_t payload_limit = sdev->ipc->max_payload_size;
443 struct sof_ipc4_msg *ipc4_msg = data;
444 struct sof_ipc4_msg tx = {{ 0 }};
445 struct sof_ipc4_msg rx = {{ 0 }};
446 size_t remaining = payload_bytes;
447 size_t offset = 0;
448 size_t chunk_size;
449 int ret;
450
451 if (!data)
452 return -EINVAL;
453
454 if ((ipc4_msg->primary & SOF_IPC4_MSG_TARGET_MASK) !=
455 SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG))
456 return -EINVAL;
457
458 ipc4_msg->primary &= ~SOF_IPC4_MSG_TYPE_MASK;
459 tx.primary = ipc4_msg->primary;
460 tx.extension = ipc4_msg->extension;
461
462 if (set)
463 tx.primary |= SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_LARGE_CONFIG_SET);
464 else
465 tx.primary |= SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_LARGE_CONFIG_GET);
466
467 tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_SIZE_MASK;
468 tx.extension |= SOF_IPC4_MOD_EXT_MSG_SIZE(payload_bytes);
469
470 tx.extension |= SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK(1);
471
472 /* ensure the DSP is in D0i0 before sending IPC */
473 ret = snd_sof_dsp_set_power_state(sdev, &target_state);
474 if (ret < 0)
475 return ret;
476
477 /* Serialise IPC TX */
478 mutex_lock(&sdev->ipc->tx_mutex);
479
480 do {
481 size_t tx_size, rx_size;
482
483 if (remaining > payload_limit) {
484 chunk_size = payload_limit;
485 } else {
486 chunk_size = remaining;
487 if (set)
488 tx.extension |= SOF_IPC4_MOD_EXT_MSG_LAST_BLOCK(1);
489 }
490
491 if (offset) {
492 tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK_MASK;
493 tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_SIZE_MASK;
494 tx.extension |= SOF_IPC4_MOD_EXT_MSG_SIZE(offset);
495 }
496
497 if (set) {
498 tx.data_size = chunk_size;
499 tx.data_ptr = ipc4_msg->data_ptr + offset;
500
501 tx_size = chunk_size;
502 rx_size = 0;
503 } else {
504 rx.primary = 0;
505 rx.extension = 0;
506 rx.data_size = chunk_size;
507 rx.data_ptr = ipc4_msg->data_ptr + offset;
508
509 tx_size = 0;
510 rx_size = chunk_size;
511 }
512
513 /* Send the message for the current chunk */
514 ret = ipc4_tx_msg_unlocked(sdev->ipc, &tx, tx_size, &rx, rx_size);
515 if (ret < 0) {
516 dev_err(sdev->dev,
517 "%s: large config %s failed at offset %zu: %d\n",
518 __func__, set ? "set" : "get", offset, ret);
519 goto out;
520 }
521
522 if (!set && rx.extension & SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK_MASK) {
523 /* Verify the firmware reported total payload size */
524 rx_size = rx.extension & SOF_IPC4_MOD_EXT_MSG_SIZE_MASK;
525
526 if (rx_size > payload_bytes) {
527 dev_err(sdev->dev,
528 "%s: Receive buffer (%zu) is too small for %zu\n",
529 __func__, payload_bytes, rx_size);
530 ret = -ENOMEM;
531 goto out;
532 }
533
534 if (rx_size < chunk_size) {
535 chunk_size = rx_size;
536 remaining = rx_size;
537 } else if (rx_size < payload_bytes) {
538 remaining = rx_size;
539 }
540 }
541
542 offset += chunk_size;
543 remaining -= chunk_size;
544 } while (remaining);
545
546 /* Adjust the received data size if needed */
547 if (!set && payload_bytes != offset)
548 ipc4_msg->data_size = offset;
549
550 out:
551 if (sof_debug_check_flag(SOF_DBG_DUMP_IPC_MESSAGE_PAYLOAD))
552 sof_ipc4_dump_payload(sdev, ipc4_msg->data_ptr, ipc4_msg->data_size);
553
554 mutex_unlock(&sdev->ipc->tx_mutex);
555
556 return ret;
557 }
558
sof_ipc4_init_msg_memory(struct snd_sof_dev * sdev)559 static int sof_ipc4_init_msg_memory(struct snd_sof_dev *sdev)
560 {
561 struct sof_ipc4_msg *ipc4_msg;
562 struct snd_sof_ipc_msg *msg = &sdev->ipc->msg;
563
564 /* TODO: get max_payload_size from firmware */
565 sdev->ipc->max_payload_size = SOF_IPC4_MSG_MAX_SIZE;
566
567 /* Allocate memory for the ipc4 container and the maximum payload */
568 msg->reply_data = devm_kzalloc(sdev->dev, sdev->ipc->max_payload_size +
569 sizeof(struct sof_ipc4_msg), GFP_KERNEL);
570 if (!msg->reply_data)
571 return -ENOMEM;
572
573 ipc4_msg = msg->reply_data;
574 ipc4_msg->data_ptr = msg->reply_data + sizeof(struct sof_ipc4_msg);
575
576 return 0;
577 }
578
sof_ipc4_find_debug_slot_offset_by_type(struct snd_sof_dev * sdev,u32 slot_type)579 size_t sof_ipc4_find_debug_slot_offset_by_type(struct snd_sof_dev *sdev,
580 u32 slot_type)
581 {
582 size_t slot_desc_type_offset;
583 u32 type;
584 int i;
585
586 /* The type is the second u32 in the slot descriptor */
587 slot_desc_type_offset = sdev->debug_box.offset + sizeof(u32);
588 for (i = 0; i < SOF_IPC4_MAX_DEBUG_SLOTS; i++) {
589 sof_mailbox_read(sdev, slot_desc_type_offset, &type, sizeof(type));
590
591 if (type == slot_type)
592 return sdev->debug_box.offset + (i + 1) * SOF_IPC4_DEBUG_SLOT_SIZE;
593
594 slot_desc_type_offset += SOF_IPC4_DEBUG_DESCRIPTOR_SIZE;
595 }
596
597 dev_dbg(sdev->dev, "Slot type %#x is not available in debug window\n", slot_type);
598 return 0;
599 }
600 EXPORT_SYMBOL(sof_ipc4_find_debug_slot_offset_by_type);
601
ipc4_fw_ready(struct snd_sof_dev * sdev,struct sof_ipc4_msg * ipc4_msg)602 static int ipc4_fw_ready(struct snd_sof_dev *sdev, struct sof_ipc4_msg *ipc4_msg)
603 {
604 if (!sdev->first_boot) {
605 struct sof_ipc4_fw_data *ipc4_data = sdev->private;
606
607 /*
608 * After the initial boot only check if the libraries have been
609 * restored when full context save is not enabled
610 */
611 if (!ipc4_data->fw_context_save)
612 ipc4_data->libraries_restored = !!(ipc4_msg->primary &
613 SOF_IPC4_FW_READY_LIB_RESTORED);
614
615 return 0;
616 }
617
618 sof_ipc4_create_exception_debugfs_node(sdev);
619
620 return sof_ipc4_init_msg_memory(sdev);
621 }
622
sof_ipc4_module_notification_handler(struct snd_sof_dev * sdev,struct sof_ipc4_msg * ipc4_msg)623 static void sof_ipc4_module_notification_handler(struct snd_sof_dev *sdev,
624 struct sof_ipc4_msg *ipc4_msg)
625 {
626 struct sof_ipc4_notify_module_data *data = ipc4_msg->data_ptr;
627
628 /*
629 * If the notification includes additional, module specific data, then
630 * we need to re-allocate the buffer and re-read the whole payload,
631 * including the event_data
632 */
633 if (data->event_data_size) {
634 void *new;
635 int ret;
636
637 ipc4_msg->data_size += data->event_data_size;
638
639 new = krealloc(ipc4_msg->data_ptr, ipc4_msg->data_size, GFP_KERNEL);
640 if (!new) {
641 ipc4_msg->data_size -= data->event_data_size;
642 return;
643 }
644
645 /* re-read the whole payload */
646 ipc4_msg->data_ptr = new;
647 ret = snd_sof_ipc_msg_data(sdev, NULL, ipc4_msg->data_ptr,
648 ipc4_msg->data_size);
649 if (ret < 0) {
650 dev_err(sdev->dev,
651 "Failed to read the full module notification: %d\n",
652 ret);
653 return;
654 }
655 data = ipc4_msg->data_ptr;
656 }
657
658 /* Handle ALSA kcontrol notification */
659 if ((data->event_id & SOF_IPC4_NOTIFY_MODULE_EVENTID_ALSA_MAGIC_MASK) ==
660 SOF_IPC4_NOTIFY_MODULE_EVENTID_ALSA_MAGIC_VAL) {
661 const struct sof_ipc_tplg_ops *tplg_ops = sdev->ipc->ops->tplg;
662
663 if (tplg_ops->control->update)
664 tplg_ops->control->update(sdev, ipc4_msg);
665 }
666 }
667
sof_ipc4_rx_msg(struct snd_sof_dev * sdev)668 static void sof_ipc4_rx_msg(struct snd_sof_dev *sdev)
669 {
670 struct sof_ipc4_msg *ipc4_msg = sdev->ipc->msg.rx_data;
671 ipc4_notification_handler handler_func = NULL;
672 size_t data_size = 0;
673 int err;
674
675 if (!ipc4_msg || !SOF_IPC4_MSG_IS_NOTIFICATION(ipc4_msg->primary))
676 return;
677
678 ipc4_msg->data_ptr = NULL;
679 ipc4_msg->data_size = 0;
680
681 sof_ipc4_log_header(sdev->dev, "ipc rx ", ipc4_msg, false);
682
683 switch (SOF_IPC4_NOTIFICATION_TYPE_GET(ipc4_msg->primary)) {
684 case SOF_IPC4_NOTIFY_FW_READY:
685 /* check for FW boot completion */
686 if (sdev->fw_state == SOF_FW_BOOT_IN_PROGRESS) {
687 err = ipc4_fw_ready(sdev, ipc4_msg);
688 if (err < 0)
689 sof_set_fw_state(sdev, SOF_FW_BOOT_READY_FAILED);
690 else
691 sof_set_fw_state(sdev, SOF_FW_BOOT_READY_OK);
692
693 /* wake up firmware loader */
694 wake_up(&sdev->boot_wait);
695 }
696
697 break;
698 case SOF_IPC4_NOTIFY_RESOURCE_EVENT:
699 data_size = sizeof(struct sof_ipc4_notify_resource_data);
700 break;
701 case SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS:
702 sof_ipc4_mtrace_update_pos(sdev, SOF_IPC4_LOG_CORE_GET(ipc4_msg->primary));
703 break;
704 case SOF_IPC4_NOTIFY_EXCEPTION_CAUGHT:
705 snd_sof_dsp_panic(sdev, 0, true);
706 break;
707 case SOF_IPC4_NOTIFY_MODULE_NOTIFICATION:
708 data_size = sizeof(struct sof_ipc4_notify_module_data);
709 handler_func = sof_ipc4_module_notification_handler;
710 break;
711 default:
712 dev_dbg(sdev->dev, "Unhandled DSP message: %#x|%#x\n",
713 ipc4_msg->primary, ipc4_msg->extension);
714 break;
715 }
716
717 if (data_size) {
718 ipc4_msg->data_ptr = kmalloc(data_size, GFP_KERNEL);
719 if (!ipc4_msg->data_ptr)
720 return;
721
722 ipc4_msg->data_size = data_size;
723 err = snd_sof_ipc_msg_data(sdev, NULL, ipc4_msg->data_ptr, ipc4_msg->data_size);
724 if (err < 0) {
725 dev_err(sdev->dev, "failed to read IPC notification data: %d\n", err);
726 kfree(ipc4_msg->data_ptr);
727 ipc4_msg->data_ptr = NULL;
728 ipc4_msg->data_size = 0;
729 return;
730 }
731 }
732
733 /* Handle notifications with payload */
734 if (handler_func)
735 handler_func(sdev, ipc4_msg);
736
737 sof_ipc4_log_header(sdev->dev, "ipc rx done ", ipc4_msg, true);
738
739 if (data_size) {
740 if (sof_debug_check_flag(SOF_DBG_DUMP_IPC_MESSAGE_PAYLOAD))
741 sof_ipc4_dump_payload(sdev, ipc4_msg->data_ptr,
742 ipc4_msg->data_size);
743
744 kfree(ipc4_msg->data_ptr);
745 ipc4_msg->data_ptr = NULL;
746 ipc4_msg->data_size = 0;
747 }
748 }
749
sof_ipc4_set_core_state(struct snd_sof_dev * sdev,int core_idx,bool on)750 static int sof_ipc4_set_core_state(struct snd_sof_dev *sdev, int core_idx, bool on)
751 {
752 struct sof_ipc4_dx_state_info dx_state;
753 struct sof_ipc4_msg msg;
754
755 dx_state.core_mask = BIT(core_idx);
756 if (on)
757 dx_state.dx_mask = BIT(core_idx);
758 else
759 dx_state.dx_mask = 0;
760
761 msg.primary = SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_SET_DX);
762 msg.primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST);
763 msg.primary |= SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG);
764 msg.extension = 0;
765 msg.data_ptr = &dx_state;
766 msg.data_size = sizeof(dx_state);
767
768 return sof_ipc4_tx_msg(sdev, &msg, msg.data_size, NULL, 0, false);
769 }
770
771 /*
772 * The context save callback is used to send a message to the firmware notifying
773 * it that the primary core is going to be turned off, which is used as an
774 * indication to prepare for a full power down, thus preparing for IMR boot
775 * (when supported)
776 *
777 * Note: in IPC4 there is no message used to restore context, thus no context
778 * restore callback is implemented
779 */
sof_ipc4_ctx_save(struct snd_sof_dev * sdev)780 static int sof_ipc4_ctx_save(struct snd_sof_dev *sdev)
781 {
782 return sof_ipc4_set_core_state(sdev, SOF_DSP_PRIMARY_CORE, false);
783 }
784
sof_ipc4_set_pm_gate(struct snd_sof_dev * sdev,u32 flags)785 static int sof_ipc4_set_pm_gate(struct snd_sof_dev *sdev, u32 flags)
786 {
787 struct sof_ipc4_msg msg = {{0}};
788
789 msg.primary = SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_SET_D0IX);
790 msg.primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST);
791 msg.primary |= SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG);
792 msg.extension = flags;
793
794 return sof_ipc4_tx_msg(sdev, &msg, 0, NULL, 0, true);
795 }
796
797 static const struct sof_ipc_pm_ops ipc4_pm_ops = {
798 .ctx_save = sof_ipc4_ctx_save,
799 .set_core_state = sof_ipc4_set_core_state,
800 .set_pm_gate = sof_ipc4_set_pm_gate,
801 };
802
sof_ipc4_init(struct snd_sof_dev * sdev)803 static int sof_ipc4_init(struct snd_sof_dev *sdev)
804 {
805 struct sof_ipc4_fw_data *ipc4_data = sdev->private;
806 int inbox_offset;
807
808 mutex_init(&ipc4_data->pipeline_state_mutex);
809
810 xa_init_flags(&ipc4_data->fw_lib_xa, XA_FLAGS_ALLOC);
811
812 /* Set up the windows for IPC communication */
813 inbox_offset = snd_sof_dsp_get_mailbox_offset(sdev);
814 if (inbox_offset < 0) {
815 dev_err(sdev->dev, "%s: No mailbox offset\n", __func__);
816 return inbox_offset;
817 }
818
819 sdev->dsp_box.offset = inbox_offset;
820 sdev->dsp_box.size = SOF_IPC4_MSG_MAX_SIZE;
821 sdev->host_box.offset = snd_sof_dsp_get_window_offset(sdev,
822 SOF_IPC4_OUTBOX_WINDOW_IDX);
823 sdev->host_box.size = SOF_IPC4_MSG_MAX_SIZE;
824
825 sdev->debug_box.offset = snd_sof_dsp_get_window_offset(sdev,
826 SOF_IPC4_DEBUG_WINDOW_IDX);
827
828 sdev->fw_info_box.offset = snd_sof_dsp_get_window_offset(sdev,
829 SOF_IPC4_INBOX_WINDOW_IDX);
830 sdev->fw_info_box.size = sizeof(struct sof_ipc4_fw_registers);
831
832 dev_dbg(sdev->dev, "mailbox upstream %#x - size %#x\n",
833 sdev->dsp_box.offset, SOF_IPC4_MSG_MAX_SIZE);
834 dev_dbg(sdev->dev, "mailbox downstream %#x - size %#x\n",
835 sdev->host_box.offset, SOF_IPC4_MSG_MAX_SIZE);
836 dev_dbg(sdev->dev, "debug box %#x\n", sdev->debug_box.offset);
837
838 return 0;
839 }
840
sof_ipc4_exit(struct snd_sof_dev * sdev)841 static void sof_ipc4_exit(struct snd_sof_dev *sdev)
842 {
843 struct sof_ipc4_fw_data *ipc4_data = sdev->private;
844 struct sof_ipc4_fw_library *fw_lib;
845 unsigned long lib_id;
846
847 xa_for_each(&ipc4_data->fw_lib_xa, lib_id, fw_lib) {
848 /*
849 * The basefw (ID == 0) is handled by generic code, it is not
850 * loaded by IPC4 code.
851 */
852 if (lib_id != 0)
853 release_firmware(fw_lib->sof_fw.fw);
854
855 fw_lib->sof_fw.fw = NULL;
856 }
857
858 xa_destroy(&ipc4_data->fw_lib_xa);
859 }
860
sof_ipc4_post_boot(struct snd_sof_dev * sdev)861 static int sof_ipc4_post_boot(struct snd_sof_dev *sdev)
862 {
863 if (sdev->first_boot) {
864 int ret = sof_ipc4_complete_split_release(sdev);
865
866 if (ret)
867 return ret;
868
869 return sof_ipc4_query_fw_configuration(sdev);
870 }
871
872 return sof_ipc4_reload_fw_libraries(sdev);
873 }
874
875 const struct sof_ipc_ops ipc4_ops = {
876 .init = sof_ipc4_init,
877 .exit = sof_ipc4_exit,
878 .post_fw_boot = sof_ipc4_post_boot,
879 .tx_msg = sof_ipc4_tx_msg,
880 .rx_msg = sof_ipc4_rx_msg,
881 .set_get_data = sof_ipc4_set_get_data,
882 .get_reply = sof_ipc4_get_reply,
883 .pm = &ipc4_pm_ops,
884 .fw_loader = &ipc4_loader_ops,
885 .tplg = &ipc4_tplg_ops,
886 .pcm = &ipc4_pcm_ops,
887 .fw_tracing = &ipc4_mtrace_ops,
888 };
889
sof_ipc4_mic_privacy_state_change(struct snd_sof_dev * sdev,bool state)890 void sof_ipc4_mic_privacy_state_change(struct snd_sof_dev *sdev, bool state)
891 {
892 struct sof_ipc4_msg msg;
893 u32 data = state;
894
895 msg.primary = SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG);
896 msg.primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST);
897 msg.primary |= SOF_IPC4_MOD_ID(SOF_IPC4_MOD_INIT_BASEFW_MOD_ID);
898 msg.primary |= SOF_IPC4_MOD_INSTANCE(SOF_IPC4_MOD_INIT_BASEFW_INSTANCE_ID);
899 msg.extension = SOF_IPC4_MOD_EXT_MSG_PARAM_ID(SOF_IPC4_FW_PARAM_MIC_PRIVACY_STATE_CHANGE);
900
901 msg.data_size = sizeof(data);
902 msg.data_ptr = &data;
903
904 sof_ipc4_set_get_data(sdev, &msg, msg.data_size, true);
905 }
906 EXPORT_SYMBOL(sof_ipc4_mic_privacy_state_change);
907