xref: /linux/drivers/gpu/drm/xe/xe_guc_submit.c (revision ddb7a62af2e766eabb4ab7080e6ed8d6b8915302)
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2022 Intel Corporation
4  */
5 
6 #include "xe_guc_submit.h"
7 
8 #include <linux/bitfield.h>
9 #include <linux/bitmap.h>
10 #include <linux/circ_buf.h>
11 #include <linux/delay.h>
12 #include <linux/dma-fence-array.h>
13 #include <linux/math64.h>
14 
15 #include <drm/drm_managed.h>
16 
17 #include "abi/guc_actions_abi.h"
18 #include "abi/guc_actions_slpc_abi.h"
19 #include "abi/guc_klvs_abi.h"
20 #include "regs/xe_lrc_layout.h"
21 #include "xe_assert.h"
22 #include "xe_devcoredump.h"
23 #include "xe_device.h"
24 #include "xe_exec_queue.h"
25 #include "xe_force_wake.h"
26 #include "xe_gpu_scheduler.h"
27 #include "xe_gt.h"
28 #include "xe_gt_clock.h"
29 #include "xe_gt_printk.h"
30 #include "xe_guc.h"
31 #include "xe_guc_capture.h"
32 #include "xe_guc_ct.h"
33 #include "xe_guc_exec_queue_types.h"
34 #include "xe_guc_id_mgr.h"
35 #include "xe_guc_submit_types.h"
36 #include "xe_hw_engine.h"
37 #include "xe_hw_fence.h"
38 #include "xe_lrc.h"
39 #include "xe_macros.h"
40 #include "xe_map.h"
41 #include "xe_mocs.h"
42 #include "xe_pm.h"
43 #include "xe_ring_ops_types.h"
44 #include "xe_sched_job.h"
45 #include "xe_trace.h"
46 #include "xe_vm.h"
47 
48 static struct xe_guc *
exec_queue_to_guc(struct xe_exec_queue * q)49 exec_queue_to_guc(struct xe_exec_queue *q)
50 {
51 	return &q->gt->uc.guc;
52 }
53 
54 /*
55  * Helpers for engine state, using an atomic as some of the bits can transition
56  * as the same time (e.g. a suspend can be happning at the same time as schedule
57  * engine done being processed).
58  */
59 #define EXEC_QUEUE_STATE_REGISTERED		(1 << 0)
60 #define EXEC_QUEUE_STATE_ENABLED		(1 << 1)
61 #define EXEC_QUEUE_STATE_PENDING_ENABLE		(1 << 2)
62 #define EXEC_QUEUE_STATE_PENDING_DISABLE	(1 << 3)
63 #define EXEC_QUEUE_STATE_DESTROYED		(1 << 4)
64 #define EXEC_QUEUE_STATE_SUSPENDED		(1 << 5)
65 #define EXEC_QUEUE_STATE_RESET			(1 << 6)
66 #define EXEC_QUEUE_STATE_KILLED			(1 << 7)
67 #define EXEC_QUEUE_STATE_WEDGED			(1 << 8)
68 #define EXEC_QUEUE_STATE_BANNED			(1 << 9)
69 #define EXEC_QUEUE_STATE_CHECK_TIMEOUT		(1 << 10)
70 #define EXEC_QUEUE_STATE_EXTRA_REF		(1 << 11)
71 
exec_queue_registered(struct xe_exec_queue * q)72 static bool exec_queue_registered(struct xe_exec_queue *q)
73 {
74 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_REGISTERED;
75 }
76 
set_exec_queue_registered(struct xe_exec_queue * q)77 static void set_exec_queue_registered(struct xe_exec_queue *q)
78 {
79 	atomic_or(EXEC_QUEUE_STATE_REGISTERED, &q->guc->state);
80 }
81 
clear_exec_queue_registered(struct xe_exec_queue * q)82 static void clear_exec_queue_registered(struct xe_exec_queue *q)
83 {
84 	atomic_and(~EXEC_QUEUE_STATE_REGISTERED, &q->guc->state);
85 }
86 
exec_queue_enabled(struct xe_exec_queue * q)87 static bool exec_queue_enabled(struct xe_exec_queue *q)
88 {
89 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_ENABLED;
90 }
91 
set_exec_queue_enabled(struct xe_exec_queue * q)92 static void set_exec_queue_enabled(struct xe_exec_queue *q)
93 {
94 	atomic_or(EXEC_QUEUE_STATE_ENABLED, &q->guc->state);
95 }
96 
clear_exec_queue_enabled(struct xe_exec_queue * q)97 static void clear_exec_queue_enabled(struct xe_exec_queue *q)
98 {
99 	atomic_and(~EXEC_QUEUE_STATE_ENABLED, &q->guc->state);
100 }
101 
exec_queue_pending_enable(struct xe_exec_queue * q)102 static bool exec_queue_pending_enable(struct xe_exec_queue *q)
103 {
104 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_PENDING_ENABLE;
105 }
106 
set_exec_queue_pending_enable(struct xe_exec_queue * q)107 static void set_exec_queue_pending_enable(struct xe_exec_queue *q)
108 {
109 	atomic_or(EXEC_QUEUE_STATE_PENDING_ENABLE, &q->guc->state);
110 }
111 
clear_exec_queue_pending_enable(struct xe_exec_queue * q)112 static void clear_exec_queue_pending_enable(struct xe_exec_queue *q)
113 {
114 	atomic_and(~EXEC_QUEUE_STATE_PENDING_ENABLE, &q->guc->state);
115 }
116 
exec_queue_pending_disable(struct xe_exec_queue * q)117 static bool exec_queue_pending_disable(struct xe_exec_queue *q)
118 {
119 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_PENDING_DISABLE;
120 }
121 
set_exec_queue_pending_disable(struct xe_exec_queue * q)122 static void set_exec_queue_pending_disable(struct xe_exec_queue *q)
123 {
124 	atomic_or(EXEC_QUEUE_STATE_PENDING_DISABLE, &q->guc->state);
125 }
126 
clear_exec_queue_pending_disable(struct xe_exec_queue * q)127 static void clear_exec_queue_pending_disable(struct xe_exec_queue *q)
128 {
129 	atomic_and(~EXEC_QUEUE_STATE_PENDING_DISABLE, &q->guc->state);
130 }
131 
exec_queue_destroyed(struct xe_exec_queue * q)132 static bool exec_queue_destroyed(struct xe_exec_queue *q)
133 {
134 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_DESTROYED;
135 }
136 
set_exec_queue_destroyed(struct xe_exec_queue * q)137 static void set_exec_queue_destroyed(struct xe_exec_queue *q)
138 {
139 	atomic_or(EXEC_QUEUE_STATE_DESTROYED, &q->guc->state);
140 }
141 
exec_queue_banned(struct xe_exec_queue * q)142 static bool exec_queue_banned(struct xe_exec_queue *q)
143 {
144 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_BANNED;
145 }
146 
set_exec_queue_banned(struct xe_exec_queue * q)147 static void set_exec_queue_banned(struct xe_exec_queue *q)
148 {
149 	atomic_or(EXEC_QUEUE_STATE_BANNED, &q->guc->state);
150 }
151 
exec_queue_suspended(struct xe_exec_queue * q)152 static bool exec_queue_suspended(struct xe_exec_queue *q)
153 {
154 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_SUSPENDED;
155 }
156 
set_exec_queue_suspended(struct xe_exec_queue * q)157 static void set_exec_queue_suspended(struct xe_exec_queue *q)
158 {
159 	atomic_or(EXEC_QUEUE_STATE_SUSPENDED, &q->guc->state);
160 }
161 
clear_exec_queue_suspended(struct xe_exec_queue * q)162 static void clear_exec_queue_suspended(struct xe_exec_queue *q)
163 {
164 	atomic_and(~EXEC_QUEUE_STATE_SUSPENDED, &q->guc->state);
165 }
166 
exec_queue_reset(struct xe_exec_queue * q)167 static bool exec_queue_reset(struct xe_exec_queue *q)
168 {
169 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_RESET;
170 }
171 
set_exec_queue_reset(struct xe_exec_queue * q)172 static void set_exec_queue_reset(struct xe_exec_queue *q)
173 {
174 	atomic_or(EXEC_QUEUE_STATE_RESET, &q->guc->state);
175 }
176 
exec_queue_killed(struct xe_exec_queue * q)177 static bool exec_queue_killed(struct xe_exec_queue *q)
178 {
179 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_KILLED;
180 }
181 
set_exec_queue_killed(struct xe_exec_queue * q)182 static void set_exec_queue_killed(struct xe_exec_queue *q)
183 {
184 	atomic_or(EXEC_QUEUE_STATE_KILLED, &q->guc->state);
185 }
186 
exec_queue_wedged(struct xe_exec_queue * q)187 static bool exec_queue_wedged(struct xe_exec_queue *q)
188 {
189 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_WEDGED;
190 }
191 
set_exec_queue_wedged(struct xe_exec_queue * q)192 static void set_exec_queue_wedged(struct xe_exec_queue *q)
193 {
194 	atomic_or(EXEC_QUEUE_STATE_WEDGED, &q->guc->state);
195 }
196 
exec_queue_check_timeout(struct xe_exec_queue * q)197 static bool exec_queue_check_timeout(struct xe_exec_queue *q)
198 {
199 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_CHECK_TIMEOUT;
200 }
201 
set_exec_queue_check_timeout(struct xe_exec_queue * q)202 static void set_exec_queue_check_timeout(struct xe_exec_queue *q)
203 {
204 	atomic_or(EXEC_QUEUE_STATE_CHECK_TIMEOUT, &q->guc->state);
205 }
206 
clear_exec_queue_check_timeout(struct xe_exec_queue * q)207 static void clear_exec_queue_check_timeout(struct xe_exec_queue *q)
208 {
209 	atomic_and(~EXEC_QUEUE_STATE_CHECK_TIMEOUT, &q->guc->state);
210 }
211 
exec_queue_extra_ref(struct xe_exec_queue * q)212 static bool exec_queue_extra_ref(struct xe_exec_queue *q)
213 {
214 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_EXTRA_REF;
215 }
216 
set_exec_queue_extra_ref(struct xe_exec_queue * q)217 static void set_exec_queue_extra_ref(struct xe_exec_queue *q)
218 {
219 	atomic_or(EXEC_QUEUE_STATE_EXTRA_REF, &q->guc->state);
220 }
221 
exec_queue_killed_or_banned_or_wedged(struct xe_exec_queue * q)222 static bool exec_queue_killed_or_banned_or_wedged(struct xe_exec_queue *q)
223 {
224 	return (atomic_read(&q->guc->state) &
225 		(EXEC_QUEUE_STATE_WEDGED | EXEC_QUEUE_STATE_KILLED |
226 		 EXEC_QUEUE_STATE_BANNED));
227 }
228 
guc_submit_fini(struct drm_device * drm,void * arg)229 static void guc_submit_fini(struct drm_device *drm, void *arg)
230 {
231 	struct xe_guc *guc = arg;
232 	struct xe_device *xe = guc_to_xe(guc);
233 	struct xe_gt *gt = guc_to_gt(guc);
234 	int ret;
235 
236 	ret = wait_event_timeout(guc->submission_state.fini_wq,
237 				 xa_empty(&guc->submission_state.exec_queue_lookup),
238 				 HZ * 5);
239 
240 	drain_workqueue(xe->destroy_wq);
241 
242 	xe_gt_assert(gt, ret);
243 
244 	xa_destroy(&guc->submission_state.exec_queue_lookup);
245 }
246 
guc_submit_wedged_fini(void * arg)247 static void guc_submit_wedged_fini(void *arg)
248 {
249 	struct xe_guc *guc = arg;
250 	struct xe_exec_queue *q;
251 	unsigned long index;
252 
253 	mutex_lock(&guc->submission_state.lock);
254 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
255 		if (exec_queue_wedged(q)) {
256 			mutex_unlock(&guc->submission_state.lock);
257 			xe_exec_queue_put(q);
258 			mutex_lock(&guc->submission_state.lock);
259 		}
260 	}
261 	mutex_unlock(&guc->submission_state.lock);
262 }
263 
264 static const struct xe_exec_queue_ops guc_exec_queue_ops;
265 
primelockdep(struct xe_guc * guc)266 static void primelockdep(struct xe_guc *guc)
267 {
268 	if (!IS_ENABLED(CONFIG_LOCKDEP))
269 		return;
270 
271 	fs_reclaim_acquire(GFP_KERNEL);
272 
273 	mutex_lock(&guc->submission_state.lock);
274 	mutex_unlock(&guc->submission_state.lock);
275 
276 	fs_reclaim_release(GFP_KERNEL);
277 }
278 
279 /**
280  * xe_guc_submit_init() - Initialize GuC submission.
281  * @guc: the &xe_guc to initialize
282  * @num_ids: number of GuC context IDs to use
283  *
284  * The bare-metal or PF driver can pass ~0 as &num_ids to indicate that all
285  * GuC context IDs supported by the GuC firmware should be used for submission.
286  *
287  * Only VF drivers will have to provide explicit number of GuC context IDs
288  * that they can use for submission.
289  *
290  * Return: 0 on success or a negative error code on failure.
291  */
xe_guc_submit_init(struct xe_guc * guc,unsigned int num_ids)292 int xe_guc_submit_init(struct xe_guc *guc, unsigned int num_ids)
293 {
294 	struct xe_device *xe = guc_to_xe(guc);
295 	struct xe_gt *gt = guc_to_gt(guc);
296 	int err;
297 
298 	err = drmm_mutex_init(&xe->drm, &guc->submission_state.lock);
299 	if (err)
300 		return err;
301 
302 	err = xe_guc_id_mgr_init(&guc->submission_state.idm, num_ids);
303 	if (err)
304 		return err;
305 
306 	gt->exec_queue_ops = &guc_exec_queue_ops;
307 
308 	xa_init(&guc->submission_state.exec_queue_lookup);
309 
310 	init_waitqueue_head(&guc->submission_state.fini_wq);
311 
312 	primelockdep(guc);
313 
314 	guc->submission_state.initialized = true;
315 
316 	return drmm_add_action_or_reset(&xe->drm, guc_submit_fini, guc);
317 }
318 
__release_guc_id(struct xe_guc * guc,struct xe_exec_queue * q,u32 xa_count)319 static void __release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q, u32 xa_count)
320 {
321 	int i;
322 
323 	lockdep_assert_held(&guc->submission_state.lock);
324 
325 	for (i = 0; i < xa_count; ++i)
326 		xa_erase(&guc->submission_state.exec_queue_lookup, q->guc->id + i);
327 
328 	xe_guc_id_mgr_release_locked(&guc->submission_state.idm,
329 				     q->guc->id, q->width);
330 
331 	if (xa_empty(&guc->submission_state.exec_queue_lookup))
332 		wake_up(&guc->submission_state.fini_wq);
333 }
334 
alloc_guc_id(struct xe_guc * guc,struct xe_exec_queue * q)335 static int alloc_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
336 {
337 	int ret;
338 	int i;
339 
340 	/*
341 	 * Must use GFP_NOWAIT as this lock is in the dma fence signalling path,
342 	 * worse case user gets -ENOMEM on engine create and has to try again.
343 	 *
344 	 * FIXME: Have caller pre-alloc or post-alloc /w GFP_KERNEL to prevent
345 	 * failure.
346 	 */
347 	lockdep_assert_held(&guc->submission_state.lock);
348 
349 	ret = xe_guc_id_mgr_reserve_locked(&guc->submission_state.idm,
350 					   q->width);
351 	if (ret < 0)
352 		return ret;
353 
354 	q->guc->id = ret;
355 
356 	for (i = 0; i < q->width; ++i) {
357 		ret = xa_err(xa_store(&guc->submission_state.exec_queue_lookup,
358 				      q->guc->id + i, q, GFP_NOWAIT));
359 		if (ret)
360 			goto err_release;
361 	}
362 
363 	return 0;
364 
365 err_release:
366 	__release_guc_id(guc, q, i);
367 
368 	return ret;
369 }
370 
release_guc_id(struct xe_guc * guc,struct xe_exec_queue * q)371 static void release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
372 {
373 	mutex_lock(&guc->submission_state.lock);
374 	__release_guc_id(guc, q, q->width);
375 	mutex_unlock(&guc->submission_state.lock);
376 }
377 
378 struct exec_queue_policy {
379 	u32 count;
380 	struct guc_update_exec_queue_policy h2g;
381 };
382 
__guc_exec_queue_policy_action_size(struct exec_queue_policy * policy)383 static u32 __guc_exec_queue_policy_action_size(struct exec_queue_policy *policy)
384 {
385 	size_t bytes = sizeof(policy->h2g.header) +
386 		       (sizeof(policy->h2g.klv[0]) * policy->count);
387 
388 	return bytes / sizeof(u32);
389 }
390 
__guc_exec_queue_policy_start_klv(struct exec_queue_policy * policy,u16 guc_id)391 static void __guc_exec_queue_policy_start_klv(struct exec_queue_policy *policy,
392 					      u16 guc_id)
393 {
394 	policy->h2g.header.action =
395 		XE_GUC_ACTION_HOST2GUC_UPDATE_CONTEXT_POLICIES;
396 	policy->h2g.header.guc_id = guc_id;
397 	policy->count = 0;
398 }
399 
400 #define MAKE_EXEC_QUEUE_POLICY_ADD(func, id) \
401 static void __guc_exec_queue_policy_add_##func(struct exec_queue_policy *policy, \
402 					   u32 data) \
403 { \
404 	XE_WARN_ON(policy->count >= GUC_CONTEXT_POLICIES_KLV_NUM_IDS); \
405 \
406 	policy->h2g.klv[policy->count].kl = \
407 		FIELD_PREP(GUC_KLV_0_KEY, \
408 			   GUC_CONTEXT_POLICIES_KLV_ID_##id) | \
409 		FIELD_PREP(GUC_KLV_0_LEN, 1); \
410 	policy->h2g.klv[policy->count].value = data; \
411 	policy->count++; \
412 }
413 
414 MAKE_EXEC_QUEUE_POLICY_ADD(execution_quantum, EXECUTION_QUANTUM)
415 MAKE_EXEC_QUEUE_POLICY_ADD(preemption_timeout, PREEMPTION_TIMEOUT)
416 MAKE_EXEC_QUEUE_POLICY_ADD(priority, SCHEDULING_PRIORITY)
417 MAKE_EXEC_QUEUE_POLICY_ADD(slpc_exec_queue_freq_req, SLPM_GT_FREQUENCY)
418 #undef MAKE_EXEC_QUEUE_POLICY_ADD
419 
420 static const int xe_exec_queue_prio_to_guc[] = {
421 	[XE_EXEC_QUEUE_PRIORITY_LOW] = GUC_CLIENT_PRIORITY_NORMAL,
422 	[XE_EXEC_QUEUE_PRIORITY_NORMAL] = GUC_CLIENT_PRIORITY_KMD_NORMAL,
423 	[XE_EXEC_QUEUE_PRIORITY_HIGH] = GUC_CLIENT_PRIORITY_HIGH,
424 	[XE_EXEC_QUEUE_PRIORITY_KERNEL] = GUC_CLIENT_PRIORITY_KMD_HIGH,
425 };
426 
init_policies(struct xe_guc * guc,struct xe_exec_queue * q)427 static void init_policies(struct xe_guc *guc, struct xe_exec_queue *q)
428 {
429 	struct exec_queue_policy policy;
430 	enum xe_exec_queue_priority prio = q->sched_props.priority;
431 	u32 timeslice_us = q->sched_props.timeslice_us;
432 	u32 slpc_exec_queue_freq_req = 0;
433 	u32 preempt_timeout_us = q->sched_props.preempt_timeout_us;
434 
435 	xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q));
436 
437 	if (q->flags & EXEC_QUEUE_FLAG_LOW_LATENCY)
438 		slpc_exec_queue_freq_req |= SLPC_CTX_FREQ_REQ_IS_COMPUTE;
439 
440 	__guc_exec_queue_policy_start_klv(&policy, q->guc->id);
441 	__guc_exec_queue_policy_add_priority(&policy, xe_exec_queue_prio_to_guc[prio]);
442 	__guc_exec_queue_policy_add_execution_quantum(&policy, timeslice_us);
443 	__guc_exec_queue_policy_add_preemption_timeout(&policy, preempt_timeout_us);
444 	__guc_exec_queue_policy_add_slpc_exec_queue_freq_req(&policy,
445 							     slpc_exec_queue_freq_req);
446 
447 	xe_guc_ct_send(&guc->ct, (u32 *)&policy.h2g,
448 		       __guc_exec_queue_policy_action_size(&policy), 0, 0);
449 }
450 
set_min_preemption_timeout(struct xe_guc * guc,struct xe_exec_queue * q)451 static void set_min_preemption_timeout(struct xe_guc *guc, struct xe_exec_queue *q)
452 {
453 	struct exec_queue_policy policy;
454 
455 	__guc_exec_queue_policy_start_klv(&policy, q->guc->id);
456 	__guc_exec_queue_policy_add_preemption_timeout(&policy, 1);
457 
458 	xe_guc_ct_send(&guc->ct, (u32 *)&policy.h2g,
459 		       __guc_exec_queue_policy_action_size(&policy), 0, 0);
460 }
461 
462 #define parallel_read(xe_, map_, field_) \
463 	xe_map_rd_field(xe_, &map_, 0, struct guc_submit_parallel_scratch, \
464 			field_)
465 #define parallel_write(xe_, map_, field_, val_) \
466 	xe_map_wr_field(xe_, &map_, 0, struct guc_submit_parallel_scratch, \
467 			field_, val_)
468 
__register_mlrc_exec_queue(struct xe_guc * guc,struct xe_exec_queue * q,struct guc_ctxt_registration_info * info)469 static void __register_mlrc_exec_queue(struct xe_guc *guc,
470 				       struct xe_exec_queue *q,
471 				       struct guc_ctxt_registration_info *info)
472 {
473 #define MAX_MLRC_REG_SIZE      (13 + XE_HW_ENGINE_MAX_INSTANCE * 2)
474 	u32 action[MAX_MLRC_REG_SIZE];
475 	int len = 0;
476 	int i;
477 
478 	xe_gt_assert(guc_to_gt(guc), xe_exec_queue_is_parallel(q));
479 
480 	action[len++] = XE_GUC_ACTION_REGISTER_CONTEXT_MULTI_LRC;
481 	action[len++] = info->flags;
482 	action[len++] = info->context_idx;
483 	action[len++] = info->engine_class;
484 	action[len++] = info->engine_submit_mask;
485 	action[len++] = info->wq_desc_lo;
486 	action[len++] = info->wq_desc_hi;
487 	action[len++] = info->wq_base_lo;
488 	action[len++] = info->wq_base_hi;
489 	action[len++] = info->wq_size;
490 	action[len++] = q->width;
491 	action[len++] = info->hwlrca_lo;
492 	action[len++] = info->hwlrca_hi;
493 
494 	for (i = 1; i < q->width; ++i) {
495 		struct xe_lrc *lrc = q->lrc[i];
496 
497 		action[len++] = lower_32_bits(xe_lrc_descriptor(lrc));
498 		action[len++] = upper_32_bits(xe_lrc_descriptor(lrc));
499 	}
500 
501 	/* explicitly checks some fields that we might fixup later */
502 	xe_gt_assert(guc_to_gt(guc), info->wq_desc_lo ==
503 		     action[XE_GUC_REGISTER_CONTEXT_MULTI_LRC_DATA_5_WQ_DESC_ADDR_LOWER]);
504 	xe_gt_assert(guc_to_gt(guc), info->wq_base_lo ==
505 		     action[XE_GUC_REGISTER_CONTEXT_MULTI_LRC_DATA_7_WQ_BUF_BASE_LOWER]);
506 	xe_gt_assert(guc_to_gt(guc), q->width ==
507 		     action[XE_GUC_REGISTER_CONTEXT_MULTI_LRC_DATA_10_NUM_CTXS]);
508 	xe_gt_assert(guc_to_gt(guc), info->hwlrca_lo ==
509 		     action[XE_GUC_REGISTER_CONTEXT_MULTI_LRC_DATA_11_HW_LRC_ADDR]);
510 	xe_gt_assert(guc_to_gt(guc), len <= MAX_MLRC_REG_SIZE);
511 #undef MAX_MLRC_REG_SIZE
512 
513 	xe_guc_ct_send(&guc->ct, action, len, 0, 0);
514 }
515 
__register_exec_queue(struct xe_guc * guc,struct guc_ctxt_registration_info * info)516 static void __register_exec_queue(struct xe_guc *guc,
517 				  struct guc_ctxt_registration_info *info)
518 {
519 	u32 action[] = {
520 		XE_GUC_ACTION_REGISTER_CONTEXT,
521 		info->flags,
522 		info->context_idx,
523 		info->engine_class,
524 		info->engine_submit_mask,
525 		info->wq_desc_lo,
526 		info->wq_desc_hi,
527 		info->wq_base_lo,
528 		info->wq_base_hi,
529 		info->wq_size,
530 		info->hwlrca_lo,
531 		info->hwlrca_hi,
532 	};
533 
534 	/* explicitly checks some fields that we might fixup later */
535 	xe_gt_assert(guc_to_gt(guc), info->wq_desc_lo ==
536 		     action[XE_GUC_REGISTER_CONTEXT_DATA_5_WQ_DESC_ADDR_LOWER]);
537 	xe_gt_assert(guc_to_gt(guc), info->wq_base_lo ==
538 		     action[XE_GUC_REGISTER_CONTEXT_DATA_7_WQ_BUF_BASE_LOWER]);
539 	xe_gt_assert(guc_to_gt(guc), info->hwlrca_lo ==
540 		     action[XE_GUC_REGISTER_CONTEXT_DATA_10_HW_LRC_ADDR]);
541 
542 	xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action), 0, 0);
543 }
544 
register_exec_queue(struct xe_exec_queue * q)545 static void register_exec_queue(struct xe_exec_queue *q)
546 {
547 	struct xe_guc *guc = exec_queue_to_guc(q);
548 	struct xe_device *xe = guc_to_xe(guc);
549 	struct xe_lrc *lrc = q->lrc[0];
550 	struct guc_ctxt_registration_info info;
551 
552 	xe_gt_assert(guc_to_gt(guc), !exec_queue_registered(q));
553 
554 	memset(&info, 0, sizeof(info));
555 	info.context_idx = q->guc->id;
556 	info.engine_class = xe_engine_class_to_guc_class(q->class);
557 	info.engine_submit_mask = q->logical_mask;
558 	info.hwlrca_lo = lower_32_bits(xe_lrc_descriptor(lrc));
559 	info.hwlrca_hi = upper_32_bits(xe_lrc_descriptor(lrc));
560 	info.flags = CONTEXT_REGISTRATION_FLAG_KMD;
561 
562 	if (xe_exec_queue_is_parallel(q)) {
563 		u64 ggtt_addr = xe_lrc_parallel_ggtt_addr(lrc);
564 		struct iosys_map map = xe_lrc_parallel_map(lrc);
565 
566 		info.wq_desc_lo = lower_32_bits(ggtt_addr +
567 			offsetof(struct guc_submit_parallel_scratch, wq_desc));
568 		info.wq_desc_hi = upper_32_bits(ggtt_addr +
569 			offsetof(struct guc_submit_parallel_scratch, wq_desc));
570 		info.wq_base_lo = lower_32_bits(ggtt_addr +
571 			offsetof(struct guc_submit_parallel_scratch, wq[0]));
572 		info.wq_base_hi = upper_32_bits(ggtt_addr +
573 			offsetof(struct guc_submit_parallel_scratch, wq[0]));
574 		info.wq_size = WQ_SIZE;
575 
576 		q->guc->wqi_head = 0;
577 		q->guc->wqi_tail = 0;
578 		xe_map_memset(xe, &map, 0, 0, PARALLEL_SCRATCH_SIZE - WQ_SIZE);
579 		parallel_write(xe, map, wq_desc.wq_status, WQ_STATUS_ACTIVE);
580 	}
581 
582 	/*
583 	 * We must keep a reference for LR engines if engine is registered with
584 	 * the GuC as jobs signal immediately and can't destroy an engine if the
585 	 * GuC has a reference to it.
586 	 */
587 	if (xe_exec_queue_is_lr(q))
588 		xe_exec_queue_get(q);
589 
590 	set_exec_queue_registered(q);
591 	trace_xe_exec_queue_register(q);
592 	if (xe_exec_queue_is_parallel(q))
593 		__register_mlrc_exec_queue(guc, q, &info);
594 	else
595 		__register_exec_queue(guc, &info);
596 	init_policies(guc, q);
597 }
598 
wq_space_until_wrap(struct xe_exec_queue * q)599 static u32 wq_space_until_wrap(struct xe_exec_queue *q)
600 {
601 	return (WQ_SIZE - q->guc->wqi_tail);
602 }
603 
wq_wait_for_space(struct xe_exec_queue * q,u32 wqi_size)604 static int wq_wait_for_space(struct xe_exec_queue *q, u32 wqi_size)
605 {
606 	struct xe_guc *guc = exec_queue_to_guc(q);
607 	struct xe_device *xe = guc_to_xe(guc);
608 	struct iosys_map map = xe_lrc_parallel_map(q->lrc[0]);
609 	unsigned int sleep_period_ms = 1;
610 
611 #define AVAILABLE_SPACE \
612 	CIRC_SPACE(q->guc->wqi_tail, q->guc->wqi_head, WQ_SIZE)
613 	if (wqi_size > AVAILABLE_SPACE) {
614 try_again:
615 		q->guc->wqi_head = parallel_read(xe, map, wq_desc.head);
616 		if (wqi_size > AVAILABLE_SPACE) {
617 			if (sleep_period_ms == 1024) {
618 				xe_gt_reset_async(q->gt);
619 				return -ENODEV;
620 			}
621 
622 			msleep(sleep_period_ms);
623 			sleep_period_ms <<= 1;
624 			goto try_again;
625 		}
626 	}
627 #undef AVAILABLE_SPACE
628 
629 	return 0;
630 }
631 
wq_noop_append(struct xe_exec_queue * q)632 static int wq_noop_append(struct xe_exec_queue *q)
633 {
634 	struct xe_guc *guc = exec_queue_to_guc(q);
635 	struct xe_device *xe = guc_to_xe(guc);
636 	struct iosys_map map = xe_lrc_parallel_map(q->lrc[0]);
637 	u32 len_dw = wq_space_until_wrap(q) / sizeof(u32) - 1;
638 
639 	if (wq_wait_for_space(q, wq_space_until_wrap(q)))
640 		return -ENODEV;
641 
642 	xe_gt_assert(guc_to_gt(guc), FIELD_FIT(WQ_LEN_MASK, len_dw));
643 
644 	parallel_write(xe, map, wq[q->guc->wqi_tail / sizeof(u32)],
645 		       FIELD_PREP(WQ_TYPE_MASK, WQ_TYPE_NOOP) |
646 		       FIELD_PREP(WQ_LEN_MASK, len_dw));
647 	q->guc->wqi_tail = 0;
648 
649 	return 0;
650 }
651 
wq_item_append(struct xe_exec_queue * q)652 static void wq_item_append(struct xe_exec_queue *q)
653 {
654 	struct xe_guc *guc = exec_queue_to_guc(q);
655 	struct xe_device *xe = guc_to_xe(guc);
656 	struct iosys_map map = xe_lrc_parallel_map(q->lrc[0]);
657 #define WQ_HEADER_SIZE	4	/* Includes 1 LRC address too */
658 	u32 wqi[XE_HW_ENGINE_MAX_INSTANCE + (WQ_HEADER_SIZE - 1)];
659 	u32 wqi_size = (q->width + (WQ_HEADER_SIZE - 1)) * sizeof(u32);
660 	u32 len_dw = (wqi_size / sizeof(u32)) - 1;
661 	int i = 0, j;
662 
663 	if (wqi_size > wq_space_until_wrap(q)) {
664 		if (wq_noop_append(q))
665 			return;
666 	}
667 	if (wq_wait_for_space(q, wqi_size))
668 		return;
669 
670 	wqi[i++] = FIELD_PREP(WQ_TYPE_MASK, WQ_TYPE_MULTI_LRC) |
671 		FIELD_PREP(WQ_LEN_MASK, len_dw);
672 	wqi[i++] = xe_lrc_descriptor(q->lrc[0]);
673 	wqi[i++] = FIELD_PREP(WQ_GUC_ID_MASK, q->guc->id) |
674 		FIELD_PREP(WQ_RING_TAIL_MASK, q->lrc[0]->ring.tail / sizeof(u64));
675 	wqi[i++] = 0;
676 	for (j = 1; j < q->width; ++j) {
677 		struct xe_lrc *lrc = q->lrc[j];
678 
679 		wqi[i++] = lrc->ring.tail / sizeof(u64);
680 	}
681 
682 	xe_gt_assert(guc_to_gt(guc), i == wqi_size / sizeof(u32));
683 
684 	iosys_map_incr(&map, offsetof(struct guc_submit_parallel_scratch,
685 				      wq[q->guc->wqi_tail / sizeof(u32)]));
686 	xe_map_memcpy_to(xe, &map, 0, wqi, wqi_size);
687 	q->guc->wqi_tail += wqi_size;
688 	xe_gt_assert(guc_to_gt(guc), q->guc->wqi_tail <= WQ_SIZE);
689 
690 	xe_device_wmb(xe);
691 
692 	map = xe_lrc_parallel_map(q->lrc[0]);
693 	parallel_write(xe, map, wq_desc.tail, q->guc->wqi_tail);
694 }
695 
696 #define RESUME_PENDING	~0x0ull
submit_exec_queue(struct xe_exec_queue * q)697 static void submit_exec_queue(struct xe_exec_queue *q)
698 {
699 	struct xe_guc *guc = exec_queue_to_guc(q);
700 	struct xe_lrc *lrc = q->lrc[0];
701 	u32 action[3];
702 	u32 g2h_len = 0;
703 	u32 num_g2h = 0;
704 	int len = 0;
705 	bool extra_submit = false;
706 
707 	xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q));
708 
709 	if (xe_exec_queue_is_parallel(q))
710 		wq_item_append(q);
711 	else
712 		xe_lrc_set_ring_tail(lrc, lrc->ring.tail);
713 
714 	if (exec_queue_suspended(q) && !xe_exec_queue_is_parallel(q))
715 		return;
716 
717 	if (!exec_queue_enabled(q) && !exec_queue_suspended(q)) {
718 		action[len++] = XE_GUC_ACTION_SCHED_CONTEXT_MODE_SET;
719 		action[len++] = q->guc->id;
720 		action[len++] = GUC_CONTEXT_ENABLE;
721 		g2h_len = G2H_LEN_DW_SCHED_CONTEXT_MODE_SET;
722 		num_g2h = 1;
723 		if (xe_exec_queue_is_parallel(q))
724 			extra_submit = true;
725 
726 		q->guc->resume_time = RESUME_PENDING;
727 		set_exec_queue_pending_enable(q);
728 		set_exec_queue_enabled(q);
729 		trace_xe_exec_queue_scheduling_enable(q);
730 	} else {
731 		action[len++] = XE_GUC_ACTION_SCHED_CONTEXT;
732 		action[len++] = q->guc->id;
733 		trace_xe_exec_queue_submit(q);
734 	}
735 
736 	xe_guc_ct_send(&guc->ct, action, len, g2h_len, num_g2h);
737 
738 	if (extra_submit) {
739 		len = 0;
740 		action[len++] = XE_GUC_ACTION_SCHED_CONTEXT;
741 		action[len++] = q->guc->id;
742 		trace_xe_exec_queue_submit(q);
743 
744 		xe_guc_ct_send(&guc->ct, action, len, 0, 0);
745 	}
746 }
747 
748 static struct dma_fence *
guc_exec_queue_run_job(struct drm_sched_job * drm_job)749 guc_exec_queue_run_job(struct drm_sched_job *drm_job)
750 {
751 	struct xe_sched_job *job = to_xe_sched_job(drm_job);
752 	struct xe_exec_queue *q = job->q;
753 	struct xe_guc *guc = exec_queue_to_guc(q);
754 	struct dma_fence *fence = NULL;
755 	bool lr = xe_exec_queue_is_lr(q);
756 
757 	xe_gt_assert(guc_to_gt(guc), !(exec_queue_destroyed(q) || exec_queue_pending_disable(q)) ||
758 		     exec_queue_banned(q) || exec_queue_suspended(q));
759 
760 	trace_xe_sched_job_run(job);
761 
762 	if (!exec_queue_killed_or_banned_or_wedged(q) && !xe_sched_job_is_error(job)) {
763 		if (!exec_queue_registered(q))
764 			register_exec_queue(q);
765 		if (!lr)	/* LR jobs are emitted in the exec IOCTL */
766 			q->ring_ops->emit_job(job);
767 		submit_exec_queue(q);
768 	}
769 
770 	if (lr) {
771 		xe_sched_job_set_error(job, -EOPNOTSUPP);
772 		dma_fence_put(job->fence);	/* Drop ref from xe_sched_job_arm */
773 	} else {
774 		fence = job->fence;
775 	}
776 
777 	return fence;
778 }
779 
guc_exec_queue_free_job(struct drm_sched_job * drm_job)780 static void guc_exec_queue_free_job(struct drm_sched_job *drm_job)
781 {
782 	struct xe_sched_job *job = to_xe_sched_job(drm_job);
783 
784 	trace_xe_sched_job_free(job);
785 	xe_sched_job_put(job);
786 }
787 
xe_guc_read_stopped(struct xe_guc * guc)788 int xe_guc_read_stopped(struct xe_guc *guc)
789 {
790 	return atomic_read(&guc->submission_state.stopped);
791 }
792 
793 #define MAKE_SCHED_CONTEXT_ACTION(q, enable_disable)			\
794 	u32 action[] = {						\
795 		XE_GUC_ACTION_SCHED_CONTEXT_MODE_SET,			\
796 		q->guc->id,						\
797 		GUC_CONTEXT_##enable_disable,				\
798 	}
799 
disable_scheduling_deregister(struct xe_guc * guc,struct xe_exec_queue * q)800 static void disable_scheduling_deregister(struct xe_guc *guc,
801 					  struct xe_exec_queue *q)
802 {
803 	MAKE_SCHED_CONTEXT_ACTION(q, DISABLE);
804 	int ret;
805 
806 	set_min_preemption_timeout(guc, q);
807 	smp_rmb();
808 	ret = wait_event_timeout(guc->ct.wq,
809 				 (!exec_queue_pending_enable(q) &&
810 				  !exec_queue_pending_disable(q)) ||
811 					 xe_guc_read_stopped(guc),
812 				 HZ * 5);
813 	if (!ret) {
814 		struct xe_gpu_scheduler *sched = &q->guc->sched;
815 
816 		xe_gt_warn(q->gt, "Pending enable/disable failed to respond\n");
817 		xe_sched_submission_start(sched);
818 		xe_gt_reset_async(q->gt);
819 		xe_sched_tdr_queue_imm(sched);
820 		return;
821 	}
822 
823 	clear_exec_queue_enabled(q);
824 	set_exec_queue_pending_disable(q);
825 	set_exec_queue_destroyed(q);
826 	trace_xe_exec_queue_scheduling_disable(q);
827 
828 	/*
829 	 * Reserve space for both G2H here as the 2nd G2H is sent from a G2H
830 	 * handler and we are not allowed to reserved G2H space in handlers.
831 	 */
832 	xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action),
833 		       G2H_LEN_DW_SCHED_CONTEXT_MODE_SET +
834 		       G2H_LEN_DW_DEREGISTER_CONTEXT, 2);
835 }
836 
xe_guc_exec_queue_trigger_cleanup(struct xe_exec_queue * q)837 static void xe_guc_exec_queue_trigger_cleanup(struct xe_exec_queue *q)
838 {
839 	struct xe_guc *guc = exec_queue_to_guc(q);
840 	struct xe_device *xe = guc_to_xe(guc);
841 
842 	/** to wakeup xe_wait_user_fence ioctl if exec queue is reset */
843 	wake_up_all(&xe->ufence_wq);
844 
845 	if (xe_exec_queue_is_lr(q))
846 		queue_work(guc_to_gt(guc)->ordered_wq, &q->guc->lr_tdr);
847 	else
848 		xe_sched_tdr_queue_imm(&q->guc->sched);
849 }
850 
851 /**
852  * xe_guc_submit_wedge() - Wedge GuC submission
853  * @guc: the GuC object
854  *
855  * Save exec queue's registered with GuC state by taking a ref to each queue.
856  * Register a DRMM handler to drop refs upon driver unload.
857  */
xe_guc_submit_wedge(struct xe_guc * guc)858 void xe_guc_submit_wedge(struct xe_guc *guc)
859 {
860 	struct xe_gt *gt = guc_to_gt(guc);
861 	struct xe_exec_queue *q;
862 	unsigned long index;
863 	int err;
864 
865 	xe_gt_assert(guc_to_gt(guc), guc_to_xe(guc)->wedged.mode);
866 
867 	/*
868 	 * If device is being wedged even before submission_state is
869 	 * initialized, there's nothing to do here.
870 	 */
871 	if (!guc->submission_state.initialized)
872 		return;
873 
874 	err = devm_add_action_or_reset(guc_to_xe(guc)->drm.dev,
875 				       guc_submit_wedged_fini, guc);
876 	if (err) {
877 		xe_gt_err(gt, "Failed to register clean-up on wedged.mode=2; "
878 			  "Although device is wedged.\n");
879 		return;
880 	}
881 
882 	mutex_lock(&guc->submission_state.lock);
883 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
884 		if (xe_exec_queue_get_unless_zero(q))
885 			set_exec_queue_wedged(q);
886 	mutex_unlock(&guc->submission_state.lock);
887 }
888 
guc_submit_hint_wedged(struct xe_guc * guc)889 static bool guc_submit_hint_wedged(struct xe_guc *guc)
890 {
891 	struct xe_device *xe = guc_to_xe(guc);
892 
893 	if (xe->wedged.mode != 2)
894 		return false;
895 
896 	if (xe_device_wedged(xe))
897 		return true;
898 
899 	xe_device_declare_wedged(xe);
900 
901 	return true;
902 }
903 
xe_guc_exec_queue_lr_cleanup(struct work_struct * w)904 static void xe_guc_exec_queue_lr_cleanup(struct work_struct *w)
905 {
906 	struct xe_guc_exec_queue *ge =
907 		container_of(w, struct xe_guc_exec_queue, lr_tdr);
908 	struct xe_exec_queue *q = ge->q;
909 	struct xe_guc *guc = exec_queue_to_guc(q);
910 	struct xe_gpu_scheduler *sched = &ge->sched;
911 	bool wedged = false;
912 
913 	xe_gt_assert(guc_to_gt(guc), xe_exec_queue_is_lr(q));
914 	trace_xe_exec_queue_lr_cleanup(q);
915 
916 	if (!exec_queue_killed(q))
917 		wedged = guc_submit_hint_wedged(exec_queue_to_guc(q));
918 
919 	/* Kill the run_job / process_msg entry points */
920 	xe_sched_submission_stop(sched);
921 
922 	/*
923 	 * Engine state now mostly stable, disable scheduling / deregister if
924 	 * needed. This cleanup routine might be called multiple times, where
925 	 * the actual async engine deregister drops the final engine ref.
926 	 * Calling disable_scheduling_deregister will mark the engine as
927 	 * destroyed and fire off the CT requests to disable scheduling /
928 	 * deregister, which we only want to do once. We also don't want to mark
929 	 * the engine as pending_disable again as this may race with the
930 	 * xe_guc_deregister_done_handler() which treats it as an unexpected
931 	 * state.
932 	 */
933 	if (!wedged && exec_queue_registered(q) && !exec_queue_destroyed(q)) {
934 		struct xe_guc *guc = exec_queue_to_guc(q);
935 		int ret;
936 
937 		set_exec_queue_banned(q);
938 		disable_scheduling_deregister(guc, q);
939 
940 		/*
941 		 * Must wait for scheduling to be disabled before signalling
942 		 * any fences, if GT broken the GT reset code should signal us.
943 		 */
944 		ret = wait_event_timeout(guc->ct.wq,
945 					 !exec_queue_pending_disable(q) ||
946 					 xe_guc_read_stopped(guc), HZ * 5);
947 		if (!ret) {
948 			xe_gt_warn(q->gt, "Schedule disable failed to respond, guc_id=%d\n",
949 				   q->guc->id);
950 			xe_devcoredump(q, NULL, "Schedule disable failed to respond, guc_id=%d\n",
951 				       q->guc->id);
952 			xe_sched_submission_start(sched);
953 			xe_gt_reset_async(q->gt);
954 			return;
955 		}
956 	}
957 
958 	if (!exec_queue_killed(q) && !xe_lrc_ring_is_idle(q->lrc[0]))
959 		xe_devcoredump(q, NULL, "LR job cleanup, guc_id=%d", q->guc->id);
960 
961 	xe_sched_submission_start(sched);
962 }
963 
964 #define ADJUST_FIVE_PERCENT(__t)	mul_u64_u32_div(__t, 105, 100)
965 
check_timeout(struct xe_exec_queue * q,struct xe_sched_job * job)966 static bool check_timeout(struct xe_exec_queue *q, struct xe_sched_job *job)
967 {
968 	struct xe_gt *gt = guc_to_gt(exec_queue_to_guc(q));
969 	u32 ctx_timestamp, ctx_job_timestamp;
970 	u32 timeout_ms = q->sched_props.job_timeout_ms;
971 	u32 diff;
972 	u64 running_time_ms;
973 
974 	if (!xe_sched_job_started(job)) {
975 		xe_gt_warn(gt, "Check job timeout: seqno=%u, lrc_seqno=%u, guc_id=%d, not started",
976 			   xe_sched_job_seqno(job), xe_sched_job_lrc_seqno(job),
977 			   q->guc->id);
978 
979 		return xe_sched_invalidate_job(job, 2);
980 	}
981 
982 	ctx_timestamp = lower_32_bits(xe_lrc_ctx_timestamp(q->lrc[0]));
983 	ctx_job_timestamp = xe_lrc_ctx_job_timestamp(q->lrc[0]);
984 
985 	/*
986 	 * Counter wraps at ~223s at the usual 19.2MHz, be paranoid catch
987 	 * possible overflows with a high timeout.
988 	 */
989 	xe_gt_assert(gt, timeout_ms < 100 * MSEC_PER_SEC);
990 
991 	diff = ctx_timestamp - ctx_job_timestamp;
992 
993 	/*
994 	 * Ensure timeout is within 5% to account for an GuC scheduling latency
995 	 */
996 	running_time_ms =
997 		ADJUST_FIVE_PERCENT(xe_gt_clock_interval_to_ms(gt, diff));
998 
999 	xe_gt_dbg(gt,
1000 		  "Check job timeout: seqno=%u, lrc_seqno=%u, guc_id=%d, running_time_ms=%llu, timeout_ms=%u, diff=0x%08x",
1001 		  xe_sched_job_seqno(job), xe_sched_job_lrc_seqno(job),
1002 		  q->guc->id, running_time_ms, timeout_ms, diff);
1003 
1004 	return running_time_ms >= timeout_ms;
1005 }
1006 
enable_scheduling(struct xe_exec_queue * q)1007 static void enable_scheduling(struct xe_exec_queue *q)
1008 {
1009 	MAKE_SCHED_CONTEXT_ACTION(q, ENABLE);
1010 	struct xe_guc *guc = exec_queue_to_guc(q);
1011 	int ret;
1012 
1013 	xe_gt_assert(guc_to_gt(guc), !exec_queue_destroyed(q));
1014 	xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q));
1015 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_disable(q));
1016 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_enable(q));
1017 
1018 	set_exec_queue_pending_enable(q);
1019 	set_exec_queue_enabled(q);
1020 	trace_xe_exec_queue_scheduling_enable(q);
1021 
1022 	xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action),
1023 		       G2H_LEN_DW_SCHED_CONTEXT_MODE_SET, 1);
1024 
1025 	ret = wait_event_timeout(guc->ct.wq,
1026 				 !exec_queue_pending_enable(q) ||
1027 				 xe_guc_read_stopped(guc), HZ * 5);
1028 	if (!ret || xe_guc_read_stopped(guc)) {
1029 		xe_gt_warn(guc_to_gt(guc), "Schedule enable failed to respond");
1030 		set_exec_queue_banned(q);
1031 		xe_gt_reset_async(q->gt);
1032 		xe_sched_tdr_queue_imm(&q->guc->sched);
1033 	}
1034 }
1035 
disable_scheduling(struct xe_exec_queue * q,bool immediate)1036 static void disable_scheduling(struct xe_exec_queue *q, bool immediate)
1037 {
1038 	MAKE_SCHED_CONTEXT_ACTION(q, DISABLE);
1039 	struct xe_guc *guc = exec_queue_to_guc(q);
1040 
1041 	xe_gt_assert(guc_to_gt(guc), !exec_queue_destroyed(q));
1042 	xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q));
1043 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_disable(q));
1044 
1045 	if (immediate)
1046 		set_min_preemption_timeout(guc, q);
1047 	clear_exec_queue_enabled(q);
1048 	set_exec_queue_pending_disable(q);
1049 	trace_xe_exec_queue_scheduling_disable(q);
1050 
1051 	xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action),
1052 		       G2H_LEN_DW_SCHED_CONTEXT_MODE_SET, 1);
1053 }
1054 
__deregister_exec_queue(struct xe_guc * guc,struct xe_exec_queue * q)1055 static void __deregister_exec_queue(struct xe_guc *guc, struct xe_exec_queue *q)
1056 {
1057 	u32 action[] = {
1058 		XE_GUC_ACTION_DEREGISTER_CONTEXT,
1059 		q->guc->id,
1060 	};
1061 
1062 	xe_gt_assert(guc_to_gt(guc), !exec_queue_destroyed(q));
1063 	xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q));
1064 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_enable(q));
1065 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_disable(q));
1066 
1067 	set_exec_queue_destroyed(q);
1068 	trace_xe_exec_queue_deregister(q);
1069 
1070 	xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action),
1071 		       G2H_LEN_DW_DEREGISTER_CONTEXT, 1);
1072 }
1073 
1074 static enum drm_gpu_sched_stat
guc_exec_queue_timedout_job(struct drm_sched_job * drm_job)1075 guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
1076 {
1077 	struct xe_sched_job *job = to_xe_sched_job(drm_job);
1078 	struct xe_sched_job *tmp_job;
1079 	struct xe_exec_queue *q = job->q;
1080 	struct xe_gpu_scheduler *sched = &q->guc->sched;
1081 	struct xe_guc *guc = exec_queue_to_guc(q);
1082 	const char *process_name = "no process";
1083 	struct xe_device *xe = guc_to_xe(guc);
1084 	unsigned int fw_ref;
1085 	int err = -ETIME;
1086 	pid_t pid = -1;
1087 	int i = 0;
1088 	bool wedged = false, skip_timeout_check;
1089 
1090 	/*
1091 	 * TDR has fired before free job worker. Common if exec queue
1092 	 * immediately closed after last fence signaled. Add back to pending
1093 	 * list so job can be freed and kick scheduler ensuring free job is not
1094 	 * lost.
1095 	 */
1096 	if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &job->fence->flags))
1097 		return DRM_GPU_SCHED_STAT_NO_HANG;
1098 
1099 	/* Kill the run_job entry point */
1100 	xe_sched_submission_stop(sched);
1101 
1102 	/* Must check all state after stopping scheduler */
1103 	skip_timeout_check = exec_queue_reset(q) ||
1104 		exec_queue_killed_or_banned_or_wedged(q) ||
1105 		exec_queue_destroyed(q);
1106 
1107 	/*
1108 	 * If devcoredump not captured and GuC capture for the job is not ready
1109 	 * do manual capture first and decide later if we need to use it
1110 	 */
1111 	if (!exec_queue_killed(q) && !xe->devcoredump.captured &&
1112 	    !xe_guc_capture_get_matching_and_lock(q)) {
1113 		/* take force wake before engine register manual capture */
1114 		fw_ref = xe_force_wake_get(gt_to_fw(q->gt), XE_FORCEWAKE_ALL);
1115 		if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL))
1116 			xe_gt_info(q->gt, "failed to get forcewake for coredump capture\n");
1117 
1118 		xe_engine_snapshot_capture_for_queue(q);
1119 
1120 		xe_force_wake_put(gt_to_fw(q->gt), fw_ref);
1121 	}
1122 
1123 	/*
1124 	 * XXX: Sampling timeout doesn't work in wedged mode as we have to
1125 	 * modify scheduling state to read timestamp. We could read the
1126 	 * timestamp from a register to accumulate current running time but this
1127 	 * doesn't work for SRIOV. For now assuming timeouts in wedged mode are
1128 	 * genuine timeouts.
1129 	 */
1130 	if (!exec_queue_killed(q))
1131 		wedged = guc_submit_hint_wedged(exec_queue_to_guc(q));
1132 
1133 	/* Engine state now stable, disable scheduling to check timestamp */
1134 	if (!wedged && exec_queue_registered(q)) {
1135 		int ret;
1136 
1137 		if (exec_queue_reset(q))
1138 			err = -EIO;
1139 
1140 		if (!exec_queue_destroyed(q)) {
1141 			/*
1142 			 * Wait for any pending G2H to flush out before
1143 			 * modifying state
1144 			 */
1145 			ret = wait_event_timeout(guc->ct.wq,
1146 						 (!exec_queue_pending_enable(q) &&
1147 						  !exec_queue_pending_disable(q)) ||
1148 						 xe_guc_read_stopped(guc), HZ * 5);
1149 			if (!ret || xe_guc_read_stopped(guc))
1150 				goto trigger_reset;
1151 
1152 			/*
1153 			 * Flag communicates to G2H handler that schedule
1154 			 * disable originated from a timeout check. The G2H then
1155 			 * avoid triggering cleanup or deregistering the exec
1156 			 * queue.
1157 			 */
1158 			set_exec_queue_check_timeout(q);
1159 			disable_scheduling(q, skip_timeout_check);
1160 		}
1161 
1162 		/*
1163 		 * Must wait for scheduling to be disabled before signalling
1164 		 * any fences, if GT broken the GT reset code should signal us.
1165 		 *
1166 		 * FIXME: Tests can generate a ton of 0x6000 (IOMMU CAT fault
1167 		 * error) messages which can cause the schedule disable to get
1168 		 * lost. If this occurs, trigger a GT reset to recover.
1169 		 */
1170 		smp_rmb();
1171 		ret = wait_event_timeout(guc->ct.wq,
1172 					 !exec_queue_pending_disable(q) ||
1173 					 xe_guc_read_stopped(guc), HZ * 5);
1174 		if (!ret || xe_guc_read_stopped(guc)) {
1175 trigger_reset:
1176 			if (!ret)
1177 				xe_gt_warn(guc_to_gt(guc),
1178 					   "Schedule disable failed to respond, guc_id=%d",
1179 					   q->guc->id);
1180 			xe_devcoredump(q, job,
1181 				       "Schedule disable failed to respond, guc_id=%d, ret=%d, guc_read=%d",
1182 				       q->guc->id, ret, xe_guc_read_stopped(guc));
1183 			set_exec_queue_extra_ref(q);
1184 			xe_exec_queue_get(q);	/* GT reset owns this */
1185 			set_exec_queue_banned(q);
1186 			xe_gt_reset_async(q->gt);
1187 			xe_sched_tdr_queue_imm(sched);
1188 			goto rearm;
1189 		}
1190 	}
1191 
1192 	/*
1193 	 * Check if job is actually timed out, if so restart job execution and TDR
1194 	 */
1195 	if (!wedged && !skip_timeout_check && !check_timeout(q, job) &&
1196 	    !exec_queue_reset(q) && exec_queue_registered(q)) {
1197 		clear_exec_queue_check_timeout(q);
1198 		goto sched_enable;
1199 	}
1200 
1201 	if (q->vm && q->vm->xef) {
1202 		process_name = q->vm->xef->process_name;
1203 		pid = q->vm->xef->pid;
1204 	}
1205 
1206 	if (!exec_queue_killed(q))
1207 		xe_gt_notice(guc_to_gt(guc),
1208 			     "Timedout job: seqno=%u, lrc_seqno=%u, guc_id=%d, flags=0x%lx in %s [%d]",
1209 			     xe_sched_job_seqno(job), xe_sched_job_lrc_seqno(job),
1210 			     q->guc->id, q->flags, process_name, pid);
1211 
1212 	trace_xe_sched_job_timedout(job);
1213 
1214 	if (!exec_queue_killed(q))
1215 		xe_devcoredump(q, job,
1216 			       "Timedout job - seqno=%u, lrc_seqno=%u, guc_id=%d, flags=0x%lx",
1217 			       xe_sched_job_seqno(job), xe_sched_job_lrc_seqno(job),
1218 			       q->guc->id, q->flags);
1219 
1220 	/*
1221 	 * Kernel jobs should never fail, nor should VM jobs if they do
1222 	 * somethings has gone wrong and the GT needs a reset
1223 	 */
1224 	xe_gt_WARN(q->gt, q->flags & EXEC_QUEUE_FLAG_KERNEL,
1225 		   "Kernel-submitted job timed out\n");
1226 	xe_gt_WARN(q->gt, q->flags & EXEC_QUEUE_FLAG_VM && !exec_queue_killed(q),
1227 		   "VM job timed out on non-killed execqueue\n");
1228 	if (!wedged && (q->flags & EXEC_QUEUE_FLAG_KERNEL ||
1229 			(q->flags & EXEC_QUEUE_FLAG_VM && !exec_queue_killed(q)))) {
1230 		if (!xe_sched_invalidate_job(job, 2)) {
1231 			clear_exec_queue_check_timeout(q);
1232 			xe_gt_reset_async(q->gt);
1233 			goto rearm;
1234 		}
1235 	}
1236 
1237 	/* Finish cleaning up exec queue via deregister */
1238 	set_exec_queue_banned(q);
1239 	if (!wedged && exec_queue_registered(q) && !exec_queue_destroyed(q)) {
1240 		set_exec_queue_extra_ref(q);
1241 		xe_exec_queue_get(q);
1242 		__deregister_exec_queue(guc, q);
1243 	}
1244 
1245 	/* Stop fence signaling */
1246 	xe_hw_fence_irq_stop(q->fence_irq);
1247 
1248 	/*
1249 	 * Fence state now stable, stop / start scheduler which cleans up any
1250 	 * fences that are complete
1251 	 */
1252 	xe_sched_add_pending_job(sched, job);
1253 	xe_sched_submission_start(sched);
1254 
1255 	xe_guc_exec_queue_trigger_cleanup(q);
1256 
1257 	/* Mark all outstanding jobs as bad, thus completing them */
1258 	spin_lock(&sched->base.job_list_lock);
1259 	list_for_each_entry(tmp_job, &sched->base.pending_list, drm.list)
1260 		xe_sched_job_set_error(tmp_job, !i++ ? err : -ECANCELED);
1261 	spin_unlock(&sched->base.job_list_lock);
1262 
1263 	/* Start fence signaling */
1264 	xe_hw_fence_irq_start(q->fence_irq);
1265 
1266 	return DRM_GPU_SCHED_STAT_RESET;
1267 
1268 sched_enable:
1269 	enable_scheduling(q);
1270 rearm:
1271 	/*
1272 	 * XXX: Ideally want to adjust timeout based on current execution time
1273 	 * but there is not currently an easy way to do in DRM scheduler. With
1274 	 * some thought, do this in a follow up.
1275 	 */
1276 	xe_sched_submission_start(sched);
1277 	return DRM_GPU_SCHED_STAT_NO_HANG;
1278 }
1279 
__guc_exec_queue_fini_async(struct work_struct * w)1280 static void __guc_exec_queue_fini_async(struct work_struct *w)
1281 {
1282 	struct xe_guc_exec_queue *ge =
1283 		container_of(w, struct xe_guc_exec_queue, fini_async);
1284 	struct xe_exec_queue *q = ge->q;
1285 	struct xe_guc *guc = exec_queue_to_guc(q);
1286 
1287 	xe_pm_runtime_get(guc_to_xe(guc));
1288 	trace_xe_exec_queue_destroy(q);
1289 
1290 	release_guc_id(guc, q);
1291 	if (xe_exec_queue_is_lr(q))
1292 		cancel_work_sync(&ge->lr_tdr);
1293 	/* Confirm no work left behind accessing device structures */
1294 	cancel_delayed_work_sync(&ge->sched.base.work_tdr);
1295 	xe_sched_entity_fini(&ge->entity);
1296 	xe_sched_fini(&ge->sched);
1297 
1298 	/*
1299 	 * RCU free due sched being exported via DRM scheduler fences
1300 	 * (timeline name).
1301 	 */
1302 	kfree_rcu(ge, rcu);
1303 	xe_exec_queue_fini(q);
1304 	xe_pm_runtime_put(guc_to_xe(guc));
1305 }
1306 
guc_exec_queue_fini_async(struct xe_exec_queue * q)1307 static void guc_exec_queue_fini_async(struct xe_exec_queue *q)
1308 {
1309 	struct xe_guc *guc = exec_queue_to_guc(q);
1310 	struct xe_device *xe = guc_to_xe(guc);
1311 
1312 	INIT_WORK(&q->guc->fini_async, __guc_exec_queue_fini_async);
1313 
1314 	/* We must block on kernel engines so slabs are empty on driver unload */
1315 	if (q->flags & EXEC_QUEUE_FLAG_PERMANENT || exec_queue_wedged(q))
1316 		__guc_exec_queue_fini_async(&q->guc->fini_async);
1317 	else
1318 		queue_work(xe->destroy_wq, &q->guc->fini_async);
1319 }
1320 
__guc_exec_queue_fini(struct xe_guc * guc,struct xe_exec_queue * q)1321 static void __guc_exec_queue_fini(struct xe_guc *guc, struct xe_exec_queue *q)
1322 {
1323 	/*
1324 	 * Might be done from within the GPU scheduler, need to do async as we
1325 	 * fini the scheduler when the engine is fini'd, the scheduler can't
1326 	 * complete fini within itself (circular dependency). Async resolves
1327 	 * this we and don't really care when everything is fini'd, just that it
1328 	 * is.
1329 	 */
1330 	guc_exec_queue_fini_async(q);
1331 }
1332 
__guc_exec_queue_process_msg_cleanup(struct xe_sched_msg * msg)1333 static void __guc_exec_queue_process_msg_cleanup(struct xe_sched_msg *msg)
1334 {
1335 	struct xe_exec_queue *q = msg->private_data;
1336 	struct xe_guc *guc = exec_queue_to_guc(q);
1337 
1338 	xe_gt_assert(guc_to_gt(guc), !(q->flags & EXEC_QUEUE_FLAG_PERMANENT));
1339 	trace_xe_exec_queue_cleanup_entity(q);
1340 
1341 	if (exec_queue_registered(q))
1342 		disable_scheduling_deregister(guc, q);
1343 	else
1344 		__guc_exec_queue_fini(guc, q);
1345 }
1346 
guc_exec_queue_allowed_to_change_state(struct xe_exec_queue * q)1347 static bool guc_exec_queue_allowed_to_change_state(struct xe_exec_queue *q)
1348 {
1349 	return !exec_queue_killed_or_banned_or_wedged(q) && exec_queue_registered(q);
1350 }
1351 
__guc_exec_queue_process_msg_set_sched_props(struct xe_sched_msg * msg)1352 static void __guc_exec_queue_process_msg_set_sched_props(struct xe_sched_msg *msg)
1353 {
1354 	struct xe_exec_queue *q = msg->private_data;
1355 	struct xe_guc *guc = exec_queue_to_guc(q);
1356 
1357 	if (guc_exec_queue_allowed_to_change_state(q))
1358 		init_policies(guc, q);
1359 	kfree(msg);
1360 }
1361 
__suspend_fence_signal(struct xe_exec_queue * q)1362 static void __suspend_fence_signal(struct xe_exec_queue *q)
1363 {
1364 	if (!q->guc->suspend_pending)
1365 		return;
1366 
1367 	WRITE_ONCE(q->guc->suspend_pending, false);
1368 	wake_up(&q->guc->suspend_wait);
1369 }
1370 
suspend_fence_signal(struct xe_exec_queue * q)1371 static void suspend_fence_signal(struct xe_exec_queue *q)
1372 {
1373 	struct xe_guc *guc = exec_queue_to_guc(q);
1374 
1375 	xe_gt_assert(guc_to_gt(guc), exec_queue_suspended(q) || exec_queue_killed(q) ||
1376 		     xe_guc_read_stopped(guc));
1377 	xe_gt_assert(guc_to_gt(guc), q->guc->suspend_pending);
1378 
1379 	__suspend_fence_signal(q);
1380 }
1381 
__guc_exec_queue_process_msg_suspend(struct xe_sched_msg * msg)1382 static void __guc_exec_queue_process_msg_suspend(struct xe_sched_msg *msg)
1383 {
1384 	struct xe_exec_queue *q = msg->private_data;
1385 	struct xe_guc *guc = exec_queue_to_guc(q);
1386 
1387 	if (guc_exec_queue_allowed_to_change_state(q) && !exec_queue_suspended(q) &&
1388 	    exec_queue_enabled(q)) {
1389 		wait_event(guc->ct.wq, (q->guc->resume_time != RESUME_PENDING ||
1390 			   xe_guc_read_stopped(guc)) && !exec_queue_pending_disable(q));
1391 
1392 		if (!xe_guc_read_stopped(guc)) {
1393 			s64 since_resume_ms =
1394 				ktime_ms_delta(ktime_get(),
1395 					       q->guc->resume_time);
1396 			s64 wait_ms = q->vm->preempt.min_run_period_ms -
1397 				since_resume_ms;
1398 
1399 			if (wait_ms > 0 && q->guc->resume_time)
1400 				msleep(wait_ms);
1401 
1402 			set_exec_queue_suspended(q);
1403 			disable_scheduling(q, false);
1404 		}
1405 	} else if (q->guc->suspend_pending) {
1406 		set_exec_queue_suspended(q);
1407 		suspend_fence_signal(q);
1408 	}
1409 }
1410 
__guc_exec_queue_process_msg_resume(struct xe_sched_msg * msg)1411 static void __guc_exec_queue_process_msg_resume(struct xe_sched_msg *msg)
1412 {
1413 	struct xe_exec_queue *q = msg->private_data;
1414 
1415 	if (guc_exec_queue_allowed_to_change_state(q)) {
1416 		clear_exec_queue_suspended(q);
1417 		if (!exec_queue_enabled(q)) {
1418 			q->guc->resume_time = RESUME_PENDING;
1419 			enable_scheduling(q);
1420 		}
1421 	} else {
1422 		clear_exec_queue_suspended(q);
1423 	}
1424 }
1425 
1426 #define CLEANUP		1	/* Non-zero values to catch uninitialized msg */
1427 #define SET_SCHED_PROPS	2
1428 #define SUSPEND		3
1429 #define RESUME		4
1430 #define OPCODE_MASK	0xf
1431 #define MSG_LOCKED	BIT(8)
1432 
guc_exec_queue_process_msg(struct xe_sched_msg * msg)1433 static void guc_exec_queue_process_msg(struct xe_sched_msg *msg)
1434 {
1435 	struct xe_device *xe = guc_to_xe(exec_queue_to_guc(msg->private_data));
1436 
1437 	trace_xe_sched_msg_recv(msg);
1438 
1439 	switch (msg->opcode) {
1440 	case CLEANUP:
1441 		__guc_exec_queue_process_msg_cleanup(msg);
1442 		break;
1443 	case SET_SCHED_PROPS:
1444 		__guc_exec_queue_process_msg_set_sched_props(msg);
1445 		break;
1446 	case SUSPEND:
1447 		__guc_exec_queue_process_msg_suspend(msg);
1448 		break;
1449 	case RESUME:
1450 		__guc_exec_queue_process_msg_resume(msg);
1451 		break;
1452 	default:
1453 		XE_WARN_ON("Unknown message type");
1454 	}
1455 
1456 	xe_pm_runtime_put(xe);
1457 }
1458 
1459 static const struct drm_sched_backend_ops drm_sched_ops = {
1460 	.run_job = guc_exec_queue_run_job,
1461 	.free_job = guc_exec_queue_free_job,
1462 	.timedout_job = guc_exec_queue_timedout_job,
1463 };
1464 
1465 static const struct xe_sched_backend_ops xe_sched_ops = {
1466 	.process_msg = guc_exec_queue_process_msg,
1467 };
1468 
guc_exec_queue_init(struct xe_exec_queue * q)1469 static int guc_exec_queue_init(struct xe_exec_queue *q)
1470 {
1471 	struct xe_gpu_scheduler *sched;
1472 	struct xe_guc *guc = exec_queue_to_guc(q);
1473 	struct xe_guc_exec_queue *ge;
1474 	long timeout;
1475 	int err, i;
1476 
1477 	xe_gt_assert(guc_to_gt(guc), xe_device_uc_enabled(guc_to_xe(guc)));
1478 
1479 	ge = kzalloc(sizeof(*ge), GFP_KERNEL);
1480 	if (!ge)
1481 		return -ENOMEM;
1482 
1483 	q->guc = ge;
1484 	ge->q = q;
1485 	init_rcu_head(&ge->rcu);
1486 	init_waitqueue_head(&ge->suspend_wait);
1487 
1488 	for (i = 0; i < MAX_STATIC_MSG_TYPE; ++i)
1489 		INIT_LIST_HEAD(&ge->static_msgs[i].link);
1490 
1491 	timeout = (q->vm && xe_vm_in_lr_mode(q->vm)) ? MAX_SCHEDULE_TIMEOUT :
1492 		  msecs_to_jiffies(q->sched_props.job_timeout_ms);
1493 	err = xe_sched_init(&ge->sched, &drm_sched_ops, &xe_sched_ops,
1494 			    NULL, q->lrc[0]->ring.size / MAX_JOB_SIZE_BYTES, 64,
1495 			    timeout, guc_to_gt(guc)->ordered_wq, NULL,
1496 			    q->name, gt_to_xe(q->gt)->drm.dev);
1497 	if (err)
1498 		goto err_free;
1499 
1500 	sched = &ge->sched;
1501 	err = xe_sched_entity_init(&ge->entity, sched);
1502 	if (err)
1503 		goto err_sched;
1504 
1505 	if (xe_exec_queue_is_lr(q))
1506 		INIT_WORK(&q->guc->lr_tdr, xe_guc_exec_queue_lr_cleanup);
1507 
1508 	mutex_lock(&guc->submission_state.lock);
1509 
1510 	err = alloc_guc_id(guc, q);
1511 	if (err)
1512 		goto err_entity;
1513 
1514 	q->entity = &ge->entity;
1515 
1516 	if (xe_guc_read_stopped(guc))
1517 		xe_sched_stop(sched);
1518 
1519 	mutex_unlock(&guc->submission_state.lock);
1520 
1521 	xe_exec_queue_assign_name(q, q->guc->id);
1522 
1523 	trace_xe_exec_queue_create(q);
1524 
1525 	return 0;
1526 
1527 err_entity:
1528 	mutex_unlock(&guc->submission_state.lock);
1529 	xe_sched_entity_fini(&ge->entity);
1530 err_sched:
1531 	xe_sched_fini(&ge->sched);
1532 err_free:
1533 	kfree(ge);
1534 
1535 	return err;
1536 }
1537 
guc_exec_queue_kill(struct xe_exec_queue * q)1538 static void guc_exec_queue_kill(struct xe_exec_queue *q)
1539 {
1540 	trace_xe_exec_queue_kill(q);
1541 	set_exec_queue_killed(q);
1542 	__suspend_fence_signal(q);
1543 	xe_guc_exec_queue_trigger_cleanup(q);
1544 }
1545 
guc_exec_queue_add_msg(struct xe_exec_queue * q,struct xe_sched_msg * msg,u32 opcode)1546 static void guc_exec_queue_add_msg(struct xe_exec_queue *q, struct xe_sched_msg *msg,
1547 				   u32 opcode)
1548 {
1549 	xe_pm_runtime_get_noresume(guc_to_xe(exec_queue_to_guc(q)));
1550 
1551 	INIT_LIST_HEAD(&msg->link);
1552 	msg->opcode = opcode & OPCODE_MASK;
1553 	msg->private_data = q;
1554 
1555 	trace_xe_sched_msg_add(msg);
1556 	if (opcode & MSG_LOCKED)
1557 		xe_sched_add_msg_locked(&q->guc->sched, msg);
1558 	else
1559 		xe_sched_add_msg(&q->guc->sched, msg);
1560 }
1561 
guc_exec_queue_try_add_msg(struct xe_exec_queue * q,struct xe_sched_msg * msg,u32 opcode)1562 static bool guc_exec_queue_try_add_msg(struct xe_exec_queue *q,
1563 				       struct xe_sched_msg *msg,
1564 				       u32 opcode)
1565 {
1566 	if (!list_empty(&msg->link))
1567 		return false;
1568 
1569 	guc_exec_queue_add_msg(q, msg, opcode | MSG_LOCKED);
1570 
1571 	return true;
1572 }
1573 
1574 #define STATIC_MSG_CLEANUP	0
1575 #define STATIC_MSG_SUSPEND	1
1576 #define STATIC_MSG_RESUME	2
guc_exec_queue_fini(struct xe_exec_queue * q)1577 static void guc_exec_queue_fini(struct xe_exec_queue *q)
1578 {
1579 	struct xe_sched_msg *msg = q->guc->static_msgs + STATIC_MSG_CLEANUP;
1580 
1581 	if (!(q->flags & EXEC_QUEUE_FLAG_PERMANENT) && !exec_queue_wedged(q))
1582 		guc_exec_queue_add_msg(q, msg, CLEANUP);
1583 	else
1584 		__guc_exec_queue_fini(exec_queue_to_guc(q), q);
1585 }
1586 
guc_exec_queue_set_priority(struct xe_exec_queue * q,enum xe_exec_queue_priority priority)1587 static int guc_exec_queue_set_priority(struct xe_exec_queue *q,
1588 				       enum xe_exec_queue_priority priority)
1589 {
1590 	struct xe_sched_msg *msg;
1591 
1592 	if (q->sched_props.priority == priority ||
1593 	    exec_queue_killed_or_banned_or_wedged(q))
1594 		return 0;
1595 
1596 	msg = kmalloc(sizeof(*msg), GFP_KERNEL);
1597 	if (!msg)
1598 		return -ENOMEM;
1599 
1600 	q->sched_props.priority = priority;
1601 	guc_exec_queue_add_msg(q, msg, SET_SCHED_PROPS);
1602 
1603 	return 0;
1604 }
1605 
guc_exec_queue_set_timeslice(struct xe_exec_queue * q,u32 timeslice_us)1606 static int guc_exec_queue_set_timeslice(struct xe_exec_queue *q, u32 timeslice_us)
1607 {
1608 	struct xe_sched_msg *msg;
1609 
1610 	if (q->sched_props.timeslice_us == timeslice_us ||
1611 	    exec_queue_killed_or_banned_or_wedged(q))
1612 		return 0;
1613 
1614 	msg = kmalloc(sizeof(*msg), GFP_KERNEL);
1615 	if (!msg)
1616 		return -ENOMEM;
1617 
1618 	q->sched_props.timeslice_us = timeslice_us;
1619 	guc_exec_queue_add_msg(q, msg, SET_SCHED_PROPS);
1620 
1621 	return 0;
1622 }
1623 
guc_exec_queue_set_preempt_timeout(struct xe_exec_queue * q,u32 preempt_timeout_us)1624 static int guc_exec_queue_set_preempt_timeout(struct xe_exec_queue *q,
1625 					      u32 preempt_timeout_us)
1626 {
1627 	struct xe_sched_msg *msg;
1628 
1629 	if (q->sched_props.preempt_timeout_us == preempt_timeout_us ||
1630 	    exec_queue_killed_or_banned_or_wedged(q))
1631 		return 0;
1632 
1633 	msg = kmalloc(sizeof(*msg), GFP_KERNEL);
1634 	if (!msg)
1635 		return -ENOMEM;
1636 
1637 	q->sched_props.preempt_timeout_us = preempt_timeout_us;
1638 	guc_exec_queue_add_msg(q, msg, SET_SCHED_PROPS);
1639 
1640 	return 0;
1641 }
1642 
guc_exec_queue_suspend(struct xe_exec_queue * q)1643 static int guc_exec_queue_suspend(struct xe_exec_queue *q)
1644 {
1645 	struct xe_gpu_scheduler *sched = &q->guc->sched;
1646 	struct xe_sched_msg *msg = q->guc->static_msgs + STATIC_MSG_SUSPEND;
1647 
1648 	if (exec_queue_killed_or_banned_or_wedged(q))
1649 		return -EINVAL;
1650 
1651 	xe_sched_msg_lock(sched);
1652 	if (guc_exec_queue_try_add_msg(q, msg, SUSPEND))
1653 		q->guc->suspend_pending = true;
1654 	xe_sched_msg_unlock(sched);
1655 
1656 	return 0;
1657 }
1658 
guc_exec_queue_suspend_wait(struct xe_exec_queue * q)1659 static int guc_exec_queue_suspend_wait(struct xe_exec_queue *q)
1660 {
1661 	struct xe_guc *guc = exec_queue_to_guc(q);
1662 	int ret;
1663 
1664 	/*
1665 	 * Likely don't need to check exec_queue_killed() as we clear
1666 	 * suspend_pending upon kill but to be paranoid but races in which
1667 	 * suspend_pending is set after kill also check kill here.
1668 	 */
1669 	ret = wait_event_interruptible_timeout(q->guc->suspend_wait,
1670 					       !READ_ONCE(q->guc->suspend_pending) ||
1671 					       exec_queue_killed(q) ||
1672 					       xe_guc_read_stopped(guc),
1673 					       HZ * 5);
1674 
1675 	if (!ret) {
1676 		xe_gt_warn(guc_to_gt(guc),
1677 			   "Suspend fence, guc_id=%d, failed to respond",
1678 			   q->guc->id);
1679 		/* XXX: Trigger GT reset? */
1680 		return -ETIME;
1681 	}
1682 
1683 	return ret < 0 ? ret : 0;
1684 }
1685 
guc_exec_queue_resume(struct xe_exec_queue * q)1686 static void guc_exec_queue_resume(struct xe_exec_queue *q)
1687 {
1688 	struct xe_gpu_scheduler *sched = &q->guc->sched;
1689 	struct xe_sched_msg *msg = q->guc->static_msgs + STATIC_MSG_RESUME;
1690 	struct xe_guc *guc = exec_queue_to_guc(q);
1691 
1692 	xe_gt_assert(guc_to_gt(guc), !q->guc->suspend_pending);
1693 
1694 	xe_sched_msg_lock(sched);
1695 	guc_exec_queue_try_add_msg(q, msg, RESUME);
1696 	xe_sched_msg_unlock(sched);
1697 }
1698 
guc_exec_queue_reset_status(struct xe_exec_queue * q)1699 static bool guc_exec_queue_reset_status(struct xe_exec_queue *q)
1700 {
1701 	return exec_queue_reset(q) || exec_queue_killed_or_banned_or_wedged(q);
1702 }
1703 
1704 /*
1705  * All of these functions are an abstraction layer which other parts of XE can
1706  * use to trap into the GuC backend. All of these functions, aside from init,
1707  * really shouldn't do much other than trap into the DRM scheduler which
1708  * synchronizes these operations.
1709  */
1710 static const struct xe_exec_queue_ops guc_exec_queue_ops = {
1711 	.init = guc_exec_queue_init,
1712 	.kill = guc_exec_queue_kill,
1713 	.fini = guc_exec_queue_fini,
1714 	.set_priority = guc_exec_queue_set_priority,
1715 	.set_timeslice = guc_exec_queue_set_timeslice,
1716 	.set_preempt_timeout = guc_exec_queue_set_preempt_timeout,
1717 	.suspend = guc_exec_queue_suspend,
1718 	.suspend_wait = guc_exec_queue_suspend_wait,
1719 	.resume = guc_exec_queue_resume,
1720 	.reset_status = guc_exec_queue_reset_status,
1721 };
1722 
guc_exec_queue_stop(struct xe_guc * guc,struct xe_exec_queue * q)1723 static void guc_exec_queue_stop(struct xe_guc *guc, struct xe_exec_queue *q)
1724 {
1725 	struct xe_gpu_scheduler *sched = &q->guc->sched;
1726 
1727 	/* Stop scheduling + flush any DRM scheduler operations */
1728 	xe_sched_submission_stop(sched);
1729 
1730 	/* Clean up lost G2H + reset engine state */
1731 	if (exec_queue_registered(q)) {
1732 		if (exec_queue_extra_ref(q) || xe_exec_queue_is_lr(q))
1733 			xe_exec_queue_put(q);
1734 		else if (exec_queue_destroyed(q))
1735 			__guc_exec_queue_fini(guc, q);
1736 	}
1737 	if (q->guc->suspend_pending) {
1738 		set_exec_queue_suspended(q);
1739 		suspend_fence_signal(q);
1740 	}
1741 	atomic_and(EXEC_QUEUE_STATE_WEDGED | EXEC_QUEUE_STATE_BANNED |
1742 		   EXEC_QUEUE_STATE_KILLED | EXEC_QUEUE_STATE_DESTROYED |
1743 		   EXEC_QUEUE_STATE_SUSPENDED,
1744 		   &q->guc->state);
1745 	q->guc->resume_time = 0;
1746 	trace_xe_exec_queue_stop(q);
1747 
1748 	/*
1749 	 * Ban any engine (aside from kernel and engines used for VM ops) with a
1750 	 * started but not complete job or if a job has gone through a GT reset
1751 	 * more than twice.
1752 	 */
1753 	if (!(q->flags & (EXEC_QUEUE_FLAG_KERNEL | EXEC_QUEUE_FLAG_VM))) {
1754 		struct xe_sched_job *job = xe_sched_first_pending_job(sched);
1755 		bool ban = false;
1756 
1757 		if (job) {
1758 			if ((xe_sched_job_started(job) &&
1759 			    !xe_sched_job_completed(job)) ||
1760 			    xe_sched_invalidate_job(job, 2)) {
1761 				trace_xe_sched_job_ban(job);
1762 				ban = true;
1763 			}
1764 		} else if (xe_exec_queue_is_lr(q) &&
1765 			   !xe_lrc_ring_is_idle(q->lrc[0])) {
1766 			ban = true;
1767 		}
1768 
1769 		if (ban) {
1770 			set_exec_queue_banned(q);
1771 			xe_guc_exec_queue_trigger_cleanup(q);
1772 		}
1773 	}
1774 }
1775 
xe_guc_submit_reset_prepare(struct xe_guc * guc)1776 int xe_guc_submit_reset_prepare(struct xe_guc *guc)
1777 {
1778 	int ret;
1779 
1780 	if (!guc->submission_state.initialized)
1781 		return 0;
1782 
1783 	/*
1784 	 * Using an atomic here rather than submission_state.lock as this
1785 	 * function can be called while holding the CT lock (engine reset
1786 	 * failure). submission_state.lock needs the CT lock to resubmit jobs.
1787 	 * Atomic is not ideal, but it works to prevent against concurrent reset
1788 	 * and releasing any TDRs waiting on guc->submission_state.stopped.
1789 	 */
1790 	ret = atomic_fetch_or(1, &guc->submission_state.stopped);
1791 	smp_wmb();
1792 	wake_up_all(&guc->ct.wq);
1793 
1794 	return ret;
1795 }
1796 
xe_guc_submit_reset_wait(struct xe_guc * guc)1797 void xe_guc_submit_reset_wait(struct xe_guc *guc)
1798 {
1799 	wait_event(guc->ct.wq, xe_device_wedged(guc_to_xe(guc)) ||
1800 		   !xe_guc_read_stopped(guc));
1801 }
1802 
xe_guc_submit_stop(struct xe_guc * guc)1803 void xe_guc_submit_stop(struct xe_guc *guc)
1804 {
1805 	struct xe_exec_queue *q;
1806 	unsigned long index;
1807 
1808 	xe_gt_assert(guc_to_gt(guc), xe_guc_read_stopped(guc) == 1);
1809 
1810 	mutex_lock(&guc->submission_state.lock);
1811 
1812 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
1813 		/* Prevent redundant attempts to stop parallel queues */
1814 		if (q->guc->id != index)
1815 			continue;
1816 
1817 		guc_exec_queue_stop(guc, q);
1818 	}
1819 
1820 	mutex_unlock(&guc->submission_state.lock);
1821 
1822 	/*
1823 	 * No one can enter the backend at this point, aside from new engine
1824 	 * creation which is protected by guc->submission_state.lock.
1825 	 */
1826 
1827 }
1828 
guc_exec_queue_start(struct xe_exec_queue * q)1829 static void guc_exec_queue_start(struct xe_exec_queue *q)
1830 {
1831 	struct xe_gpu_scheduler *sched = &q->guc->sched;
1832 
1833 	if (!exec_queue_killed_or_banned_or_wedged(q)) {
1834 		int i;
1835 
1836 		trace_xe_exec_queue_resubmit(q);
1837 		for (i = 0; i < q->width; ++i)
1838 			xe_lrc_set_ring_head(q->lrc[i], q->lrc[i]->ring.tail);
1839 		xe_sched_resubmit_jobs(sched);
1840 	}
1841 
1842 	xe_sched_submission_start(sched);
1843 	xe_sched_submission_resume_tdr(sched);
1844 }
1845 
xe_guc_submit_start(struct xe_guc * guc)1846 int xe_guc_submit_start(struct xe_guc *guc)
1847 {
1848 	struct xe_exec_queue *q;
1849 	unsigned long index;
1850 
1851 	xe_gt_assert(guc_to_gt(guc), xe_guc_read_stopped(guc) == 1);
1852 
1853 	mutex_lock(&guc->submission_state.lock);
1854 	atomic_dec(&guc->submission_state.stopped);
1855 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
1856 		/* Prevent redundant attempts to start parallel queues */
1857 		if (q->guc->id != index)
1858 			continue;
1859 
1860 		guc_exec_queue_start(q);
1861 	}
1862 	mutex_unlock(&guc->submission_state.lock);
1863 
1864 	wake_up_all(&guc->ct.wq);
1865 
1866 	return 0;
1867 }
1868 
1869 static struct xe_exec_queue *
g2h_exec_queue_lookup(struct xe_guc * guc,u32 guc_id)1870 g2h_exec_queue_lookup(struct xe_guc *guc, u32 guc_id)
1871 {
1872 	struct xe_gt *gt = guc_to_gt(guc);
1873 	struct xe_exec_queue *q;
1874 
1875 	if (unlikely(guc_id >= GUC_ID_MAX)) {
1876 		xe_gt_err(gt, "Invalid guc_id %u\n", guc_id);
1877 		return NULL;
1878 	}
1879 
1880 	q = xa_load(&guc->submission_state.exec_queue_lookup, guc_id);
1881 	if (unlikely(!q)) {
1882 		xe_gt_err(gt, "Not engine present for guc_id %u\n", guc_id);
1883 		return NULL;
1884 	}
1885 
1886 	xe_gt_assert(guc_to_gt(guc), guc_id >= q->guc->id);
1887 	xe_gt_assert(guc_to_gt(guc), guc_id < (q->guc->id + q->width));
1888 
1889 	return q;
1890 }
1891 
deregister_exec_queue(struct xe_guc * guc,struct xe_exec_queue * q)1892 static void deregister_exec_queue(struct xe_guc *guc, struct xe_exec_queue *q)
1893 {
1894 	u32 action[] = {
1895 		XE_GUC_ACTION_DEREGISTER_CONTEXT,
1896 		q->guc->id,
1897 	};
1898 
1899 	xe_gt_assert(guc_to_gt(guc), exec_queue_destroyed(q));
1900 	xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q));
1901 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_disable(q));
1902 	xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_enable(q));
1903 
1904 	trace_xe_exec_queue_deregister(q);
1905 
1906 	xe_guc_ct_send_g2h_handler(&guc->ct, action, ARRAY_SIZE(action));
1907 }
1908 
handle_sched_done(struct xe_guc * guc,struct xe_exec_queue * q,u32 runnable_state)1909 static void handle_sched_done(struct xe_guc *guc, struct xe_exec_queue *q,
1910 			      u32 runnable_state)
1911 {
1912 	trace_xe_exec_queue_scheduling_done(q);
1913 
1914 	if (runnable_state == 1) {
1915 		xe_gt_assert(guc_to_gt(guc), exec_queue_pending_enable(q));
1916 
1917 		q->guc->resume_time = ktime_get();
1918 		clear_exec_queue_pending_enable(q);
1919 		smp_wmb();
1920 		wake_up_all(&guc->ct.wq);
1921 	} else {
1922 		bool check_timeout = exec_queue_check_timeout(q);
1923 
1924 		xe_gt_assert(guc_to_gt(guc), runnable_state == 0);
1925 		xe_gt_assert(guc_to_gt(guc), exec_queue_pending_disable(q));
1926 
1927 		if (q->guc->suspend_pending) {
1928 			suspend_fence_signal(q);
1929 			clear_exec_queue_pending_disable(q);
1930 		} else {
1931 			if (exec_queue_banned(q) || check_timeout) {
1932 				smp_wmb();
1933 				wake_up_all(&guc->ct.wq);
1934 			}
1935 			if (!check_timeout && exec_queue_destroyed(q)) {
1936 				/*
1937 				 * Make sure to clear the pending_disable only
1938 				 * after sampling the destroyed state. We want
1939 				 * to ensure we don't trigger the unregister too
1940 				 * early with something intending to only
1941 				 * disable scheduling. The caller doing the
1942 				 * destroy must wait for an ongoing
1943 				 * pending_disable before marking as destroyed.
1944 				 */
1945 				clear_exec_queue_pending_disable(q);
1946 				deregister_exec_queue(guc, q);
1947 			} else {
1948 				clear_exec_queue_pending_disable(q);
1949 			}
1950 		}
1951 	}
1952 }
1953 
xe_guc_sched_done_handler(struct xe_guc * guc,u32 * msg,u32 len)1954 int xe_guc_sched_done_handler(struct xe_guc *guc, u32 *msg, u32 len)
1955 {
1956 	struct xe_exec_queue *q;
1957 	u32 guc_id, runnable_state;
1958 
1959 	if (unlikely(len < 2))
1960 		return -EPROTO;
1961 
1962 	guc_id = msg[0];
1963 	runnable_state = msg[1];
1964 
1965 	q = g2h_exec_queue_lookup(guc, guc_id);
1966 	if (unlikely(!q))
1967 		return -EPROTO;
1968 
1969 	if (unlikely(!exec_queue_pending_enable(q) &&
1970 		     !exec_queue_pending_disable(q))) {
1971 		xe_gt_err(guc_to_gt(guc),
1972 			  "SCHED_DONE: Unexpected engine state 0x%04x, guc_id=%d, runnable_state=%u",
1973 			  atomic_read(&q->guc->state), q->guc->id,
1974 			  runnable_state);
1975 		return -EPROTO;
1976 	}
1977 
1978 	handle_sched_done(guc, q, runnable_state);
1979 
1980 	return 0;
1981 }
1982 
handle_deregister_done(struct xe_guc * guc,struct xe_exec_queue * q)1983 static void handle_deregister_done(struct xe_guc *guc, struct xe_exec_queue *q)
1984 {
1985 	trace_xe_exec_queue_deregister_done(q);
1986 
1987 	clear_exec_queue_registered(q);
1988 
1989 	if (exec_queue_extra_ref(q) || xe_exec_queue_is_lr(q))
1990 		xe_exec_queue_put(q);
1991 	else
1992 		__guc_exec_queue_fini(guc, q);
1993 }
1994 
xe_guc_deregister_done_handler(struct xe_guc * guc,u32 * msg,u32 len)1995 int xe_guc_deregister_done_handler(struct xe_guc *guc, u32 *msg, u32 len)
1996 {
1997 	struct xe_exec_queue *q;
1998 	u32 guc_id;
1999 
2000 	if (unlikely(len < 1))
2001 		return -EPROTO;
2002 
2003 	guc_id = msg[0];
2004 
2005 	q = g2h_exec_queue_lookup(guc, guc_id);
2006 	if (unlikely(!q))
2007 		return -EPROTO;
2008 
2009 	if (!exec_queue_destroyed(q) || exec_queue_pending_disable(q) ||
2010 	    exec_queue_pending_enable(q) || exec_queue_enabled(q)) {
2011 		xe_gt_err(guc_to_gt(guc),
2012 			  "DEREGISTER_DONE: Unexpected engine state 0x%04x, guc_id=%d",
2013 			  atomic_read(&q->guc->state), q->guc->id);
2014 		return -EPROTO;
2015 	}
2016 
2017 	handle_deregister_done(guc, q);
2018 
2019 	return 0;
2020 }
2021 
xe_guc_exec_queue_reset_handler(struct xe_guc * guc,u32 * msg,u32 len)2022 int xe_guc_exec_queue_reset_handler(struct xe_guc *guc, u32 *msg, u32 len)
2023 {
2024 	struct xe_gt *gt = guc_to_gt(guc);
2025 	struct xe_exec_queue *q;
2026 	u32 guc_id;
2027 
2028 	if (unlikely(len < 1))
2029 		return -EPROTO;
2030 
2031 	guc_id = msg[0];
2032 
2033 	q = g2h_exec_queue_lookup(guc, guc_id);
2034 	if (unlikely(!q))
2035 		return -EPROTO;
2036 
2037 	xe_gt_info(gt, "Engine reset: engine_class=%s, logical_mask: 0x%x, guc_id=%d",
2038 		   xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id);
2039 
2040 	trace_xe_exec_queue_reset(q);
2041 
2042 	/*
2043 	 * A banned engine is a NOP at this point (came from
2044 	 * guc_exec_queue_timedout_job). Otherwise, kick drm scheduler to cancel
2045 	 * jobs by setting timeout of the job to the minimum value kicking
2046 	 * guc_exec_queue_timedout_job.
2047 	 */
2048 	set_exec_queue_reset(q);
2049 	if (!exec_queue_banned(q) && !exec_queue_check_timeout(q))
2050 		xe_guc_exec_queue_trigger_cleanup(q);
2051 
2052 	return 0;
2053 }
2054 
2055 /*
2056  * xe_guc_error_capture_handler - Handler of GuC captured message
2057  * @guc: The GuC object
2058  * @msg: Point to the message
2059  * @len: The message length
2060  *
2061  * When GuC captured data is ready, GuC will send message
2062  * XE_GUC_ACTION_STATE_CAPTURE_NOTIFICATION to host, this function will be
2063  * called 1st to check status before process the data comes with the message.
2064  *
2065  * Returns: error code. 0 if success
2066  */
xe_guc_error_capture_handler(struct xe_guc * guc,u32 * msg,u32 len)2067 int xe_guc_error_capture_handler(struct xe_guc *guc, u32 *msg, u32 len)
2068 {
2069 	u32 status;
2070 
2071 	if (unlikely(len != XE_GUC_ACTION_STATE_CAPTURE_NOTIFICATION_DATA_LEN))
2072 		return -EPROTO;
2073 
2074 	status = msg[0] & XE_GUC_STATE_CAPTURE_EVENT_STATUS_MASK;
2075 	if (status == XE_GUC_STATE_CAPTURE_EVENT_STATUS_NOSPACE)
2076 		xe_gt_warn(guc_to_gt(guc), "G2H-Error capture no space");
2077 
2078 	xe_guc_capture_process(guc);
2079 
2080 	return 0;
2081 }
2082 
xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc * guc,u32 * msg,u32 len)2083 int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg,
2084 					       u32 len)
2085 {
2086 	struct xe_gt *gt = guc_to_gt(guc);
2087 	struct xe_exec_queue *q;
2088 	u32 guc_id;
2089 	u32 type = XE_GUC_CAT_ERR_TYPE_INVALID;
2090 
2091 	if (unlikely(!len || len > 2))
2092 		return -EPROTO;
2093 
2094 	guc_id = msg[0];
2095 
2096 	if (len == 2)
2097 		type = msg[1];
2098 
2099 	if (guc_id == GUC_ID_UNKNOWN) {
2100 		/*
2101 		 * GuC uses GUC_ID_UNKNOWN if it can not map the CAT fault to any PF/VF
2102 		 * context. In such case only PF will be notified about that fault.
2103 		 */
2104 		xe_gt_err_ratelimited(gt, "Memory CAT error reported by GuC!\n");
2105 		return 0;
2106 	}
2107 
2108 	q = g2h_exec_queue_lookup(guc, guc_id);
2109 	if (unlikely(!q))
2110 		return -EPROTO;
2111 
2112 	/*
2113 	 * The type is HW-defined and changes based on platform, so we don't
2114 	 * decode it in the kernel and only check if it is valid.
2115 	 * See bspec 54047 and 72187 for details.
2116 	 */
2117 	if (type != XE_GUC_CAT_ERR_TYPE_INVALID)
2118 		xe_gt_dbg(gt,
2119 			  "Engine memory CAT error [%u]: class=%s, logical_mask: 0x%x, guc_id=%d",
2120 			  type, xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id);
2121 	else
2122 		xe_gt_dbg(gt,
2123 			  "Engine memory CAT error: class=%s, logical_mask: 0x%x, guc_id=%d",
2124 			  xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id);
2125 
2126 	trace_xe_exec_queue_memory_cat_error(q);
2127 
2128 	/* Treat the same as engine reset */
2129 	set_exec_queue_reset(q);
2130 	if (!exec_queue_banned(q) && !exec_queue_check_timeout(q))
2131 		xe_guc_exec_queue_trigger_cleanup(q);
2132 
2133 	return 0;
2134 }
2135 
xe_guc_exec_queue_reset_failure_handler(struct xe_guc * guc,u32 * msg,u32 len)2136 int xe_guc_exec_queue_reset_failure_handler(struct xe_guc *guc, u32 *msg, u32 len)
2137 {
2138 	struct xe_gt *gt = guc_to_gt(guc);
2139 	u8 guc_class, instance;
2140 	u32 reason;
2141 
2142 	if (unlikely(len != 3))
2143 		return -EPROTO;
2144 
2145 	guc_class = msg[0];
2146 	instance = msg[1];
2147 	reason = msg[2];
2148 
2149 	/* Unexpected failure of a hardware feature, log an actual error */
2150 	xe_gt_err(gt, "GuC engine reset request failed on %d:%d because 0x%08X",
2151 		  guc_class, instance, reason);
2152 
2153 	xe_gt_reset_async(gt);
2154 
2155 	return 0;
2156 }
2157 
2158 static void
guc_exec_queue_wq_snapshot_capture(struct xe_exec_queue * q,struct xe_guc_submit_exec_queue_snapshot * snapshot)2159 guc_exec_queue_wq_snapshot_capture(struct xe_exec_queue *q,
2160 				   struct xe_guc_submit_exec_queue_snapshot *snapshot)
2161 {
2162 	struct xe_guc *guc = exec_queue_to_guc(q);
2163 	struct xe_device *xe = guc_to_xe(guc);
2164 	struct iosys_map map = xe_lrc_parallel_map(q->lrc[0]);
2165 	int i;
2166 
2167 	snapshot->guc.wqi_head = q->guc->wqi_head;
2168 	snapshot->guc.wqi_tail = q->guc->wqi_tail;
2169 	snapshot->parallel.wq_desc.head = parallel_read(xe, map, wq_desc.head);
2170 	snapshot->parallel.wq_desc.tail = parallel_read(xe, map, wq_desc.tail);
2171 	snapshot->parallel.wq_desc.status = parallel_read(xe, map,
2172 							  wq_desc.wq_status);
2173 
2174 	if (snapshot->parallel.wq_desc.head !=
2175 	    snapshot->parallel.wq_desc.tail) {
2176 		for (i = snapshot->parallel.wq_desc.head;
2177 		     i != snapshot->parallel.wq_desc.tail;
2178 		     i = (i + sizeof(u32)) % WQ_SIZE)
2179 			snapshot->parallel.wq[i / sizeof(u32)] =
2180 				parallel_read(xe, map, wq[i / sizeof(u32)]);
2181 	}
2182 }
2183 
2184 static void
guc_exec_queue_wq_snapshot_print(struct xe_guc_submit_exec_queue_snapshot * snapshot,struct drm_printer * p)2185 guc_exec_queue_wq_snapshot_print(struct xe_guc_submit_exec_queue_snapshot *snapshot,
2186 				 struct drm_printer *p)
2187 {
2188 	int i;
2189 
2190 	drm_printf(p, "\tWQ head: %u (internal), %d (memory)\n",
2191 		   snapshot->guc.wqi_head, snapshot->parallel.wq_desc.head);
2192 	drm_printf(p, "\tWQ tail: %u (internal), %d (memory)\n",
2193 		   snapshot->guc.wqi_tail, snapshot->parallel.wq_desc.tail);
2194 	drm_printf(p, "\tWQ status: %u\n", snapshot->parallel.wq_desc.status);
2195 
2196 	if (snapshot->parallel.wq_desc.head !=
2197 	    snapshot->parallel.wq_desc.tail) {
2198 		for (i = snapshot->parallel.wq_desc.head;
2199 		     i != snapshot->parallel.wq_desc.tail;
2200 		     i = (i + sizeof(u32)) % WQ_SIZE)
2201 			drm_printf(p, "\tWQ[%zu]: 0x%08x\n", i / sizeof(u32),
2202 				   snapshot->parallel.wq[i / sizeof(u32)]);
2203 	}
2204 }
2205 
2206 /**
2207  * xe_guc_exec_queue_snapshot_capture - Take a quick snapshot of the GuC Engine.
2208  * @q: faulty exec queue
2209  *
2210  * This can be printed out in a later stage like during dev_coredump
2211  * analysis.
2212  *
2213  * Returns: a GuC Submit Engine snapshot object that must be freed by the
2214  * caller, using `xe_guc_exec_queue_snapshot_free`.
2215  */
2216 struct xe_guc_submit_exec_queue_snapshot *
xe_guc_exec_queue_snapshot_capture(struct xe_exec_queue * q)2217 xe_guc_exec_queue_snapshot_capture(struct xe_exec_queue *q)
2218 {
2219 	struct xe_gpu_scheduler *sched = &q->guc->sched;
2220 	struct xe_guc_submit_exec_queue_snapshot *snapshot;
2221 	int i;
2222 
2223 	snapshot = kzalloc(sizeof(*snapshot), GFP_ATOMIC);
2224 
2225 	if (!snapshot)
2226 		return NULL;
2227 
2228 	snapshot->guc.id = q->guc->id;
2229 	memcpy(&snapshot->name, &q->name, sizeof(snapshot->name));
2230 	snapshot->class = q->class;
2231 	snapshot->logical_mask = q->logical_mask;
2232 	snapshot->width = q->width;
2233 	snapshot->refcount = kref_read(&q->refcount);
2234 	snapshot->sched_timeout = sched->base.timeout;
2235 	snapshot->sched_props.timeslice_us = q->sched_props.timeslice_us;
2236 	snapshot->sched_props.preempt_timeout_us =
2237 		q->sched_props.preempt_timeout_us;
2238 
2239 	snapshot->lrc = kmalloc_array(q->width, sizeof(struct xe_lrc_snapshot *),
2240 				      GFP_ATOMIC);
2241 
2242 	if (snapshot->lrc) {
2243 		for (i = 0; i < q->width; ++i) {
2244 			struct xe_lrc *lrc = q->lrc[i];
2245 
2246 			snapshot->lrc[i] = xe_lrc_snapshot_capture(lrc);
2247 		}
2248 	}
2249 
2250 	snapshot->schedule_state = atomic_read(&q->guc->state);
2251 	snapshot->exec_queue_flags = q->flags;
2252 
2253 	snapshot->parallel_execution = xe_exec_queue_is_parallel(q);
2254 	if (snapshot->parallel_execution)
2255 		guc_exec_queue_wq_snapshot_capture(q, snapshot);
2256 
2257 	spin_lock(&sched->base.job_list_lock);
2258 	snapshot->pending_list_size = list_count_nodes(&sched->base.pending_list);
2259 	snapshot->pending_list = kmalloc_array(snapshot->pending_list_size,
2260 					       sizeof(struct pending_list_snapshot),
2261 					       GFP_ATOMIC);
2262 
2263 	if (snapshot->pending_list) {
2264 		struct xe_sched_job *job_iter;
2265 
2266 		i = 0;
2267 		list_for_each_entry(job_iter, &sched->base.pending_list, drm.list) {
2268 			snapshot->pending_list[i].seqno =
2269 				xe_sched_job_seqno(job_iter);
2270 			snapshot->pending_list[i].fence =
2271 				dma_fence_is_signaled(job_iter->fence) ? 1 : 0;
2272 			snapshot->pending_list[i].finished =
2273 				dma_fence_is_signaled(&job_iter->drm.s_fence->finished)
2274 				? 1 : 0;
2275 			i++;
2276 		}
2277 	}
2278 
2279 	spin_unlock(&sched->base.job_list_lock);
2280 
2281 	return snapshot;
2282 }
2283 
2284 /**
2285  * xe_guc_exec_queue_snapshot_capture_delayed - Take delayed part of snapshot of the GuC Engine.
2286  * @snapshot: Previously captured snapshot of job.
2287  *
2288  * This captures some data that requires taking some locks, so it cannot be done in signaling path.
2289  */
2290 void
xe_guc_exec_queue_snapshot_capture_delayed(struct xe_guc_submit_exec_queue_snapshot * snapshot)2291 xe_guc_exec_queue_snapshot_capture_delayed(struct xe_guc_submit_exec_queue_snapshot *snapshot)
2292 {
2293 	int i;
2294 
2295 	if (!snapshot || !snapshot->lrc)
2296 		return;
2297 
2298 	for (i = 0; i < snapshot->width; ++i)
2299 		xe_lrc_snapshot_capture_delayed(snapshot->lrc[i]);
2300 }
2301 
2302 /**
2303  * xe_guc_exec_queue_snapshot_print - Print out a given GuC Engine snapshot.
2304  * @snapshot: GuC Submit Engine snapshot object.
2305  * @p: drm_printer where it will be printed out.
2306  *
2307  * This function prints out a given GuC Submit Engine snapshot object.
2308  */
2309 void
xe_guc_exec_queue_snapshot_print(struct xe_guc_submit_exec_queue_snapshot * snapshot,struct drm_printer * p)2310 xe_guc_exec_queue_snapshot_print(struct xe_guc_submit_exec_queue_snapshot *snapshot,
2311 				 struct drm_printer *p)
2312 {
2313 	int i;
2314 
2315 	if (!snapshot)
2316 		return;
2317 
2318 	drm_printf(p, "GuC ID: %d\n", snapshot->guc.id);
2319 	drm_printf(p, "\tName: %s\n", snapshot->name);
2320 	drm_printf(p, "\tClass: %d\n", snapshot->class);
2321 	drm_printf(p, "\tLogical mask: 0x%x\n", snapshot->logical_mask);
2322 	drm_printf(p, "\tWidth: %d\n", snapshot->width);
2323 	drm_printf(p, "\tRef: %d\n", snapshot->refcount);
2324 	drm_printf(p, "\tTimeout: %ld (ms)\n", snapshot->sched_timeout);
2325 	drm_printf(p, "\tTimeslice: %u (us)\n",
2326 		   snapshot->sched_props.timeslice_us);
2327 	drm_printf(p, "\tPreempt timeout: %u (us)\n",
2328 		   snapshot->sched_props.preempt_timeout_us);
2329 
2330 	for (i = 0; snapshot->lrc && i < snapshot->width; ++i)
2331 		xe_lrc_snapshot_print(snapshot->lrc[i], p);
2332 
2333 	drm_printf(p, "\tSchedule State: 0x%x\n", snapshot->schedule_state);
2334 	drm_printf(p, "\tFlags: 0x%lx\n", snapshot->exec_queue_flags);
2335 
2336 	if (snapshot->parallel_execution)
2337 		guc_exec_queue_wq_snapshot_print(snapshot, p);
2338 
2339 	for (i = 0; snapshot->pending_list && i < snapshot->pending_list_size;
2340 	     i++)
2341 		drm_printf(p, "\tJob: seqno=%d, fence=%d, finished=%d\n",
2342 			   snapshot->pending_list[i].seqno,
2343 			   snapshot->pending_list[i].fence,
2344 			   snapshot->pending_list[i].finished);
2345 }
2346 
2347 /**
2348  * xe_guc_exec_queue_snapshot_free - Free all allocated objects for a given
2349  * snapshot.
2350  * @snapshot: GuC Submit Engine snapshot object.
2351  *
2352  * This function free all the memory that needed to be allocated at capture
2353  * time.
2354  */
xe_guc_exec_queue_snapshot_free(struct xe_guc_submit_exec_queue_snapshot * snapshot)2355 void xe_guc_exec_queue_snapshot_free(struct xe_guc_submit_exec_queue_snapshot *snapshot)
2356 {
2357 	int i;
2358 
2359 	if (!snapshot)
2360 		return;
2361 
2362 	if (snapshot->lrc) {
2363 		for (i = 0; i < snapshot->width; i++)
2364 			xe_lrc_snapshot_free(snapshot->lrc[i]);
2365 		kfree(snapshot->lrc);
2366 	}
2367 	kfree(snapshot->pending_list);
2368 	kfree(snapshot);
2369 }
2370 
guc_exec_queue_print(struct xe_exec_queue * q,struct drm_printer * p)2371 static void guc_exec_queue_print(struct xe_exec_queue *q, struct drm_printer *p)
2372 {
2373 	struct xe_guc_submit_exec_queue_snapshot *snapshot;
2374 
2375 	snapshot = xe_guc_exec_queue_snapshot_capture(q);
2376 	xe_guc_exec_queue_snapshot_print(snapshot, p);
2377 	xe_guc_exec_queue_snapshot_free(snapshot);
2378 }
2379 
2380 /**
2381  * xe_guc_submit_print - GuC Submit Print.
2382  * @guc: GuC.
2383  * @p: drm_printer where it will be printed out.
2384  *
2385  * This function capture and prints snapshots of **all** GuC Engines.
2386  */
xe_guc_submit_print(struct xe_guc * guc,struct drm_printer * p)2387 void xe_guc_submit_print(struct xe_guc *guc, struct drm_printer *p)
2388 {
2389 	struct xe_exec_queue *q;
2390 	unsigned long index;
2391 
2392 	if (!xe_device_uc_enabled(guc_to_xe(guc)))
2393 		return;
2394 
2395 	mutex_lock(&guc->submission_state.lock);
2396 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
2397 		guc_exec_queue_print(q, p);
2398 	mutex_unlock(&guc->submission_state.lock);
2399 }
2400