1 /*****************************************************************************
2
3 Copyright (c) 2001-2017, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
15
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
19
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32 *****************************************************************************/
33
34 #include "opt_inet.h"
35 #include "opt_inet6.h"
36 #include "opt_rss.h"
37
38 #include "ixgbe.h"
39 #include "mdio_if.h"
40 #include "ixgbe_sriov.h"
41 #include "ifdi_if.h"
42 #include "if_ix_mdio_hw.h"
43 #include "if_ix_mdio.h"
44
45 #include <net/netmap.h>
46 #include <dev/mdio/mdio.h>
47 #include <dev/netmap/netmap_kern.h>
48
49 /************************************************************************
50 * Driver version
51 ************************************************************************/
52 static const char ixgbe_driver_version[] = "5.0.1-k";
53
54 /* Bound one admin-task invocation while still coalescing new requests. */
55 #define IXGBE_ADMIN_TASK_BUDGET 8
56
57 /************************************************************************
58 * PCI Device ID Table
59 *
60 * Used by probe to select devices to load on
61 * Last field stores an index into ixgbe_strings
62 * Last entry must be all 0s
63 *
64 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index }
65 ************************************************************************/
66 static const pci_vendor_info_t ixgbe_vendor_info_array[] =
67 {
68 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_DUAL_PORT,
69 "Intel(R) 82598EB AF (Dual Fiber)"),
70 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_SINGLE_PORT,
71 "Intel(R) 82598EB AF (Fiber)"),
72 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_CX4,
73 "Intel(R) 82598EB AT (CX4)"),
74 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT,
75 "Intel(R) 82598EB AT"),
76 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT2,
77 "Intel(R) 82598EB AT2"),
78 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598, "Intel(R) 82598"),
79 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_DA_DUAL_PORT,
80 "Intel(R) 82598EB AF DA (Dual Fiber)"),
81 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_CX4_DUAL_PORT,
82 "Intel(R) 82598EB AT (Dual CX4)"),
83 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_XF_LR,
84 "Intel(R) 82598EB AF (Dual Fiber LR)"),
85 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM,
86 "Intel(R) 82598EB AF (Dual Fiber SR)"),
87 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_SFP_LOM,
88 "Intel(R) 82598EB LOM"),
89 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_BX,
90 "Intel(R) 82598EB BX Backplane"),
91 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4,
92 "Intel(R) X520 82599 (KX4)"),
93 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4_MEZZ,
94 "Intel(R) X520 82599 (KX4 Mezzanine)"),
95 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP,
96 "Intel(R) X520 82599ES (SFI/SFP+)"),
97 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KR,
98 "Intel(R) X520 82599ES (KR Backplane)"),
99 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_EM,
100 "Intel(R) X520-P2 82599 (SFP+)"),
101 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_XAUI_LOM,
102 "Intel(R) X520 82599 (XAUI/BX4)"),
103 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_CX4,
104 "Intel(R) X520 82599 (Dual CX4)"),
105 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_T3_LOM,
106 "Intel(R) X520-T 82599 LOM"),
107 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_LS,
108 "Intel(R) X520 82599 LS"),
109 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_COMBO_BACKPLANE,
110 "Intel(R) X520 82599 (Combined Backplane)"),
111 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BACKPLANE_FCOE,
112 "Intel(R) X520 82599 (Backplane w/FCoE)"),
113 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF2,
114 "Intel(R) X520 82599 (Dual SFP+)"),
115 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_FCOE,
116 "Intel(R) X520 82599 (Dual SFP+ w/FCoE)"),
117 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599EN_SFP,
118 "Intel(R) X520-1 82599EN (SFP+)"),
119 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF_QP,
120 "Intel(R) X520-4 82599 (Quad SFP+)"),
121 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_QSFP_SF_QP,
122 "Intel(R) X520-Q1 82599 (QSFP+)"),
123 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T,
124 "Intel(R) X540-AT2"),
125 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1, "Intel(R) X540-T1"),
126 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T, "Intel(R) X550-T2"),
127 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T1, "Intel(R) X550-T1"),
128 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KR,
129 "Intel(R) X552 (KR Backplane)"),
130 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KX4,
131 "Intel(R) X552 (KX4 Backplane)"),
132 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_10G_T,
133 "Intel(R) X552/X557-AT (10GBASE-T)"),
134 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_1G_T,
135 "Intel(R) X552 (1000BASE-T)"),
136 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_SFP,
137 "Intel(R) X552 (SFP+)"),
138 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_XFI,
139 "Intel(R) X552 (XFI Backplane)"),
140 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR,
141 "Intel(R) X553 (KR Backplane)"),
142 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR_L,
143 "Intel(R) X553 L (KR Backplane)"),
144 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP,
145 "Intel(R) X553 (SFP+)"),
146 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP_N,
147 "Intel(R) X553 N (SFP+)"),
148 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_QSFP,
149 "Intel(R) X553 (QSFP+)"),
150 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_QSFP_N,
151 "Intel(R) X553 N (QSFP+)"),
152 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII,
153 "Intel(R) X553 (1GbE SGMII)"),
154 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII_L,
155 "Intel(R) X553 L (1GbE SGMII)"),
156 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_10G_T,
157 "Intel(R) X553/X557-AT (10GBASE-T)"),
158 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T,
159 "Intel(R) X553 (1GbE)"),
160 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T_L,
161 "Intel(R) X553 L (1GbE)"),
162 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540_BYPASS,
163 "Intel(R) X540-T2 (Bypass)"),
164 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BYPASS,
165 "Intel(R) X520 82599 (Bypass)"),
166 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_E610_BACKPLANE,
167 "Intel(R) E610 (Backplane)"),
168 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_E610_SFP,
169 "Intel(R) E610 (SFP)"),
170 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_E610_2_5G_T,
171 "Intel(R) E610 (2.5 GbE)"),
172 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_E610_10G_T,
173 "Intel(R) E610 (10 GbE)"),
174 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_E610_SGMII,
175 "Intel(R) E610 (SGMII)"),
176 /* required last entry */
177 PVID_END
178 };
179
180 static void *ixgbe_register(device_t);
181 static int ixgbe_if_attach_pre(if_ctx_t);
182 static int ixgbe_if_attach_post(if_ctx_t);
183 static int ixgbe_if_detach(if_ctx_t);
184 static int ixgbe_if_shutdown(if_ctx_t);
185 static int ixgbe_if_suspend(if_ctx_t);
186 static int ixgbe_if_resume(if_ctx_t);
187 #ifdef PCI_IOV
188 static int ixgbe_device_iov_init(device_t, uint16_t, const nvlist_t *);
189 #endif
190
191 static void ixgbe_if_stop(if_ctx_t);
192 void ixgbe_if_enable_intr(if_ctx_t);
193 static void ixgbe_if_disable_intr(if_ctx_t);
194 static void ixgbe_link_intr_enable(if_ctx_t);
195 static int ixgbe_if_rx_queue_intr_enable(if_ctx_t, uint16_t);
196 static void ixgbe_if_media_status(if_ctx_t, struct ifmediareq *);
197 static int ixgbe_if_media_change(if_ctx_t);
198 static int ixgbe_if_msix_intr_assign(if_ctx_t, int);
199 static int ixgbe_if_mtu_set(if_ctx_t, uint32_t);
200 static void ixgbe_if_crcstrip_set(if_ctx_t, int, int);
201 static void ixgbe_if_multi_set(if_ctx_t);
202 static int ixgbe_if_promisc_set(if_ctx_t, int);
203 static int ixgbe_if_tx_queues_alloc(if_ctx_t, caddr_t *, uint64_t *, int,
204 int);
205 static int ixgbe_if_rx_queues_alloc(if_ctx_t, caddr_t *, uint64_t *, int,
206 int);
207 static void ixgbe_if_queues_free(if_ctx_t);
208 static void ixgbe_if_timer(if_ctx_t, uint16_t);
209 static const char *ixgbe_link_speed_to_str(u32 link_speed);
210 static void ixgbe_if_update_admin_status(if_ctx_t);
211 static void ixgbe_if_vlan_register(if_ctx_t, u16);
212 static void ixgbe_if_vlan_unregister(if_ctx_t, u16);
213 static int ixgbe_if_i2c_req(if_ctx_t, struct ifi2creq *);
214 static bool ixgbe_if_needs_restart(if_ctx_t, enum iflib_restart_event);
215 static void ixgbe_if_led_func(if_ctx_t, int);
216 static void ixgbe_led_restore(struct ixgbe_softc *);
217 int ixgbe_intr(void *);
218
219 static int ixgbe_if_priv_ioctl(if_ctx_t ctx, u_long command, caddr_t data);
220
221 /************************************************************************
222 * Function prototypes
223 ************************************************************************/
224 static uint64_t ixgbe_if_get_counter(if_ctx_t, ift_counter);
225
226 static void ixgbe_enable_queue(struct ixgbe_softc *, u32);
227 static void ixgbe_disable_queue(struct ixgbe_softc *, u32);
228 static void ixgbe_add_device_sysctls(if_ctx_t);
229 static int ixgbe_allocate_pci_resources(if_ctx_t);
230 static int ixgbe_setup_low_power_mode(if_ctx_t);
231
232 static void ixgbe_config_dmac(struct ixgbe_softc *);
233 static void ixgbe_configure_ivars(struct ixgbe_softc *);
234 static void ixgbe_set_ivar(struct ixgbe_softc *, u8, u8, s8);
235 static u8 *ixgbe_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *);
236 static bool ixgbe_sfp_probe(if_ctx_t);
237
238 static void ixgbe_free_pci_resources(if_ctx_t);
239
240 static int ixgbe_msix_link(void *);
241 static int ixgbe_msix_que(void *);
242 static void ixgbe_initialize_rss_mapping(struct ixgbe_softc *);
243 static void ixgbe_initialize_receive_units(if_ctx_t);
244 static void ixgbe_initialize_transmit_units(if_ctx_t);
245
246 static int ixgbe_setup_interface(if_ctx_t);
247 static void ixgbe_init_device_features(struct ixgbe_softc *);
248 static void ixgbe_check_fan_failure(struct ixgbe_softc *, u32, bool);
249 static void ixgbe_sbuf_fw_version(struct ixgbe_hw *, struct sbuf *);
250 static void ixgbe_print_fw_version(if_ctx_t);
251 static void ixgbe_add_media_types(if_ctx_t);
252 static void ixgbe_update_stats_counters(struct ixgbe_softc *);
253 static void ixgbe_config_link(if_ctx_t);
254 static void ixgbe_get_slot_info(struct ixgbe_softc *);
255 static void ixgbe_fw_mode_timer(void *);
256 static void ixgbe_check_wol_support(struct ixgbe_softc *);
257 static void ixgbe_enable_rx_drop(struct ixgbe_softc *);
258 static void ixgbe_disable_rx_drop(struct ixgbe_softc *);
259
260 static void ixgbe_add_hw_stats(struct ixgbe_softc *);
261 static int ixgbe_set_flowcntl(struct ixgbe_softc *, int);
262 static int ixgbe_set_advertise(struct ixgbe_softc *, int);
263 static int ixgbe_get_default_advertise(struct ixgbe_softc *);
264 static void ixgbe_config_gpie(struct ixgbe_softc *);
265 static void ixgbe_config_delay_values(struct ixgbe_softc *);
266
267 static void ixgbe_add_debug_sysctls(struct ixgbe_softc *sc);
268 static void ixgbe_add_debug_dump_sysctls(struct ixgbe_softc *sc);
269 static int ixgbe_debug_dump_ioctl(struct ixgbe_softc *sc, struct ifdrv *ifd);
270 static u8 ixgbe_debug_dump_print_cluster(struct ixgbe_softc *sc,
271 struct sbuf *sbuf, u8 cluster_id);
272 static int ixgbe_nvm_access_ioctl(struct ixgbe_softc *sc, struct ifdrv *ifd);
273
274 /* Sysctl handlers */
275 static int ixgbe_sysctl_flowcntl(SYSCTL_HANDLER_ARGS);
276 static int ixgbe_sysctl_advertise(SYSCTL_HANDLER_ARGS);
277 static int ixgbe_sysctl_interrupt_rate_handler(SYSCTL_HANDLER_ARGS);
278 static int ixgbe_sysctl_dmac(SYSCTL_HANDLER_ARGS);
279 static int ixgbe_sysctl_phy_temp(SYSCTL_HANDLER_ARGS);
280 static int ixgbe_sysctl_phy_overtemp_occurred(SYSCTL_HANDLER_ARGS);
281 static int ixgbe_sysctl_print_fw_version(SYSCTL_HANDLER_ARGS);
282 #ifdef IXGBE_DEBUG
283 static int ixgbe_sysctl_power_state(SYSCTL_HANDLER_ARGS);
284 static int ixgbe_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS);
285 #endif
286 static int ixgbe_sysctl_rdh_handler(SYSCTL_HANDLER_ARGS);
287 static int ixgbe_sysctl_rdt_handler(SYSCTL_HANDLER_ARGS);
288 static int ixgbe_sysctl_tdt_handler(SYSCTL_HANDLER_ARGS);
289 static int ixgbe_sysctl_tdh_handler(SYSCTL_HANDLER_ARGS);
290 static int ixgbe_sysctl_eee_state(SYSCTL_HANDLER_ARGS);
291 static int ixgbe_sysctl_wol_enable(SYSCTL_HANDLER_ARGS);
292 static int ixgbe_sysctl_wufc(SYSCTL_HANDLER_ARGS);
293 static int ixgbe_sysctl_tso_tcp_flags_mask(SYSCTL_HANDLER_ARGS);
294
295 static int ixgbe_sysctl_debug_dump_set_clusters(SYSCTL_HANDLER_ARGS);
296 static int ixgbe_sysctl_dump_debug_dump(SYSCTL_HANDLER_ARGS);
297
298 /* Deferred interrupt tasklets */
299 static void ixgbe_handle_msf(void *);
300 static bool ixgbe_handle_mod(void *);
301 static void ixgbe_handle_phy(void *);
302 static u32 ixgbe_handle_fw_event(void *);
303
304 static int ixgbe_enable_lse(struct ixgbe_softc *sc);
305 static int ixgbe_disable_lse(struct ixgbe_softc *sc);
306
307 /************************************************************************
308 * FreeBSD Device Interface Entry Points
309 ************************************************************************/
310 static device_method_t ix_methods[] = {
311 /* Device interface */
312 DEVMETHOD(device_register, ixgbe_register),
313 DEVMETHOD(device_probe, iflib_device_probe),
314 DEVMETHOD(device_attach, iflib_device_attach),
315 DEVMETHOD(device_detach, iflib_device_detach),
316 DEVMETHOD(device_shutdown, iflib_device_shutdown),
317 DEVMETHOD(device_suspend, iflib_device_suspend),
318 DEVMETHOD(device_resume, iflib_device_resume),
319 #ifdef PCI_IOV
320 DEVMETHOD(pci_iov_init, ixgbe_device_iov_init),
321 DEVMETHOD(pci_iov_uninit, iflib_device_iov_uninit_restart),
322 DEVMETHOD(pci_iov_add_vf, iflib_device_iov_add_vf),
323 #endif /* PCI_IOV */
324 DEVMETHOD(bus_add_child, device_add_child_ordered),
325 DEVMETHOD(mdio_readreg, ixgbe_mdio_readreg_c22),
326 DEVMETHOD(mdio_writereg, ixgbe_mdio_writereg_c22),
327
328 DEVMETHOD_END
329 };
330
331 static driver_t ix_driver = {
332 "ix", ix_methods, sizeof(struct ixgbe_softc),
333 };
334
335 DRIVER_MODULE(mdio, ix, mdio_driver, 0, 0); /* needs to happen before ix */
336 DRIVER_MODULE_ORDERED(ix, pci, ix_driver, NULL, NULL, SI_ORDER_ANY); /* needs to be last */
337 IFLIB_PNP_INFO(pci, ix_driver, ixgbe_vendor_info_array);
338 MODULE_DEPEND(ix, pci, 1, 1, 1);
339 MODULE_DEPEND(ix, ether, 1, 1, 1);
340 MODULE_DEPEND(ix, iflib, 1, 1, 1);
341 MODULE_DEPEND(ix, mdio, 1, 1, 1);
342
343 #ifdef PCI_IOV
344 static int
ixgbe_device_iov_init(device_t dev,uint16_t num_vfs,const nvlist_t * params)345 ixgbe_device_iov_init(device_t dev, uint16_t num_vfs,
346 const nvlist_t *params)
347 {
348 struct ixgbe_softc *sc;
349 if_ctx_t ctx;
350 int error;
351
352 ctx = device_get_softc(dev);
353 sc = iflib_get_softc(ctx);
354 error = ixgbe_iov_validate(sc, num_vfs);
355 if (error != 0)
356 return (error);
357 return (iflib_device_iov_init_restart(dev, num_vfs, params));
358 }
359 #endif
360
361 static device_method_t ixgbe_if_methods[] = {
362 DEVMETHOD(ifdi_attach_pre, ixgbe_if_attach_pre),
363 DEVMETHOD(ifdi_attach_post, ixgbe_if_attach_post),
364 DEVMETHOD(ifdi_detach, ixgbe_if_detach),
365 DEVMETHOD(ifdi_shutdown, ixgbe_if_shutdown),
366 DEVMETHOD(ifdi_suspend, ixgbe_if_suspend),
367 DEVMETHOD(ifdi_resume, ixgbe_if_resume),
368 DEVMETHOD(ifdi_init, ixgbe_if_init),
369 DEVMETHOD(ifdi_stop, ixgbe_if_stop),
370 DEVMETHOD(ifdi_msix_intr_assign, ixgbe_if_msix_intr_assign),
371 DEVMETHOD(ifdi_intr_enable, ixgbe_if_enable_intr),
372 DEVMETHOD(ifdi_intr_disable, ixgbe_if_disable_intr),
373 DEVMETHOD(ifdi_link_intr_enable, ixgbe_link_intr_enable),
374 DEVMETHOD(ifdi_tx_queue_intr_enable, ixgbe_if_rx_queue_intr_enable),
375 DEVMETHOD(ifdi_rx_queue_intr_enable, ixgbe_if_rx_queue_intr_enable),
376 DEVMETHOD(ifdi_tx_queues_alloc, ixgbe_if_tx_queues_alloc),
377 DEVMETHOD(ifdi_rx_queues_alloc, ixgbe_if_rx_queues_alloc),
378 DEVMETHOD(ifdi_queues_free, ixgbe_if_queues_free),
379 DEVMETHOD(ifdi_update_admin_status, ixgbe_if_update_admin_status),
380 DEVMETHOD(ifdi_multi_set, ixgbe_if_multi_set),
381 DEVMETHOD(ifdi_mtu_set, ixgbe_if_mtu_set),
382 DEVMETHOD(ifdi_crcstrip_set, ixgbe_if_crcstrip_set),
383 DEVMETHOD(ifdi_media_status, ixgbe_if_media_status),
384 DEVMETHOD(ifdi_media_change, ixgbe_if_media_change),
385 DEVMETHOD(ifdi_promisc_set, ixgbe_if_promisc_set),
386 DEVMETHOD(ifdi_timer, ixgbe_if_timer),
387 DEVMETHOD(ifdi_vlan_register, ixgbe_if_vlan_register),
388 DEVMETHOD(ifdi_vlan_unregister, ixgbe_if_vlan_unregister),
389 DEVMETHOD(ifdi_get_counter, ixgbe_if_get_counter),
390 DEVMETHOD(ifdi_i2c_req, ixgbe_if_i2c_req),
391 DEVMETHOD(ifdi_needs_restart, ixgbe_if_needs_restart),
392 DEVMETHOD(ifdi_priv_ioctl, ixgbe_if_priv_ioctl),
393 DEVMETHOD(ifdi_led_func, ixgbe_if_led_func),
394 #ifdef PCI_IOV
395 DEVMETHOD(ifdi_iov_init, ixgbe_if_iov_init),
396 DEVMETHOD(ifdi_iov_uninit, ixgbe_if_iov_uninit),
397 DEVMETHOD(ifdi_iov_vf_add, ixgbe_if_iov_vf_add),
398 #endif /* PCI_IOV */
399 DEVMETHOD_END
400 };
401
402 /*
403 * TUNEABLE PARAMETERS:
404 */
405
406 static SYSCTL_NODE(_hw, OID_AUTO, ix, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
407 "IXGBE driver parameters");
408 static driver_t ixgbe_if_driver = {
409 "ixgbe_if", ixgbe_if_methods, sizeof(struct ixgbe_softc)
410 };
411
412 static int ixgbe_max_interrupt_rate = (4000000 / IXGBE_LOW_LATENCY);
413 SYSCTL_INT(_hw_ix, OID_AUTO, max_interrupt_rate, CTLFLAG_RDTUN,
414 &ixgbe_max_interrupt_rate, 0, "Maximum interrupts per second");
415
416 /* Flow control setting, default to full */
417 static int ixgbe_flow_control = ixgbe_fc_full;
418 SYSCTL_INT(_hw_ix, OID_AUTO, flow_control, CTLFLAG_RDTUN,
419 &ixgbe_flow_control, 0, "Default flow control used for all adapters");
420
421 /* Advertise Speed, default to 0 (auto) */
422 static int ixgbe_advertise_speed = 0;
423 SYSCTL_INT(_hw_ix, OID_AUTO, advertise_speed, CTLFLAG_RDTUN,
424 &ixgbe_advertise_speed, 0, "Default advertised speed for all adapters");
425
426 /*
427 * Smart speed setting, default to on
428 * this only works as a compile option
429 * right now as its during attach, set
430 * this to 'ixgbe_smart_speed_off' to
431 * disable.
432 */
433 static int ixgbe_smart_speed = ixgbe_smart_speed_on;
434
435 /*
436 * MSI-X should be the default for best performance,
437 * but this allows it to be forced off for testing.
438 */
439 static int ixgbe_enable_msix = 1;
440 SYSCTL_INT(_hw_ix, OID_AUTO, enable_msix, CTLFLAG_RDTUN, &ixgbe_enable_msix,
441 0,
442 "Enable MSI-X interrupts");
443
444 /*
445 * Defining this on will allow the use
446 * of unsupported SFP+ modules, note that
447 * doing so you are on your own :)
448 */
449 static int allow_unsupported_sfp = false;
450 SYSCTL_INT(_hw_ix, OID_AUTO, unsupported_sfp, CTLFLAG_RDTUN,
451 &allow_unsupported_sfp, 0,
452 "Allow unsupported SFP modules...use at your own risk");
453
454 /*
455 * Not sure if Flow Director is fully baked,
456 * so we'll default to turning it off.
457 */
458 static int ixgbe_enable_fdir = 0;
459 SYSCTL_INT(_hw_ix, OID_AUTO, enable_fdir, CTLFLAG_RDTUN, &ixgbe_enable_fdir,
460 0,
461 "Enable Flow Director");
462
463 /* Receive-Side Scaling */
464 static int ixgbe_enable_rss = 1;
465 SYSCTL_INT(_hw_ix, OID_AUTO, enable_rss, CTLFLAG_RDTUN, &ixgbe_enable_rss,
466 0,
467 "Enable Receive-Side Scaling (RSS)");
468
469 /*
470 * AIM: Adaptive Interrupt Moderation
471 * which means that the interrupt rate
472 * is varied over time based on the
473 * traffic for that interrupt vector
474 */
475 static int ixgbe_enable_aim = false;
476 SYSCTL_INT(_hw_ix, OID_AUTO, enable_aim, CTLFLAG_RWTUN, &ixgbe_enable_aim,
477 0,
478 "Enable adaptive interrupt moderation");
479
480 #if 0
481 /* Keep running tab on them for sanity check */
482 static int ixgbe_total_ports;
483 #endif
484
485 MALLOC_DEFINE(M_IXGBE, "ix", "ix driver allocations");
486
487 /*
488 * For Flow Director: this is the number of TX packets we sample
489 * for the filter pool, this means every 20th packet will be probed.
490 *
491 * This feature can be disabled by setting this to 0.
492 */
493 static int atr_sample_rate = 20;
494
495 extern struct if_txrx ixgbe_txrx;
496
497 static struct if_shared_ctx ixgbe_sctx_init = {
498 .isc_magic = IFLIB_MAGIC,
499 .isc_q_align = PAGE_SIZE,/* max(DBA_ALIGN, PAGE_SIZE) */
500 .isc_tx_maxsize = IXGBE_TSO_SIZE + sizeof(struct ether_vlan_header),
501 .isc_tx_maxsegsize = PAGE_SIZE,
502 .isc_tso_maxsize = IXGBE_TSO_SIZE + sizeof(struct ether_vlan_header),
503 .isc_tso_maxsegsize = PAGE_SIZE,
504 .isc_rx_maxsize = PAGE_SIZE*4,
505 .isc_rx_nsegments = 1,
506 .isc_rx_maxsegsize = PAGE_SIZE*4,
507 .isc_nfl = 1,
508 .isc_ntxqs = 1,
509 .isc_nrxqs = 1,
510
511 .isc_admin_intrcnt = 1,
512 .isc_vendor_info = ixgbe_vendor_info_array,
513 .isc_driver_version = ixgbe_driver_version,
514 .isc_driver = &ixgbe_if_driver,
515 .isc_flags = IFLIB_TSO_INIT_IP,
516
517 .isc_nrxd_min = {MIN_RXD},
518 .isc_ntxd_min = {MIN_TXD},
519 .isc_nrxd_max = {MAX_RXD},
520 .isc_ntxd_max = {MAX_TXD},
521 .isc_nrxd_default = {DEFAULT_RXD},
522 .isc_ntxd_default = {DEFAULT_TXD},
523 };
524
525 /************************************************************************
526 * ixgbe_if_tx_queues_alloc
527 ************************************************************************/
528 static int
ixgbe_if_tx_queues_alloc(if_ctx_t ctx,caddr_t * vaddrs,uint64_t * paddrs,int ntxqs,int ntxqsets)529 ixgbe_if_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs,
530 int ntxqs, int ntxqsets)
531 {
532 struct ixgbe_softc *sc = iflib_get_softc(ctx);
533 if_softc_ctx_t scctx = sc->shared;
534 struct ix_tx_queue *que;
535 int i, j, error;
536
537 MPASS(sc->num_tx_queues > 0);
538 MPASS(sc->num_tx_queues == ntxqsets);
539 MPASS(ntxqs == 1);
540
541 /* Allocate queue structure memory */
542 sc->tx_queues =
543 (struct ix_tx_queue *)malloc(sizeof(struct ix_tx_queue) *
544 ntxqsets, M_IXGBE, M_NOWAIT | M_ZERO);
545 if (!sc->tx_queues) {
546 device_printf(iflib_get_dev(ctx),
547 "Unable to allocate TX ring memory\n");
548 return (ENOMEM);
549 }
550
551 for (i = 0, que = sc->tx_queues; i < ntxqsets; i++, que++) {
552 struct tx_ring *txr = &que->txr;
553
554 /* In case SR-IOV is enabled, align the index properly */
555 txr->me = ixgbe_vf_que_index(sc->iov_mode, sc->pool, i);
556
557 txr->sc = que->sc = sc;
558
559 /* Allocate report status array */
560 txr->tx_rsq = (qidx_t *)malloc(sizeof(qidx_t) *
561 scctx->isc_ntxd[0], M_IXGBE, M_NOWAIT | M_ZERO);
562 if (txr->tx_rsq == NULL) {
563 error = ENOMEM;
564 goto fail;
565 }
566 for (j = 0; j < scctx->isc_ntxd[0]; j++)
567 txr->tx_rsq[j] = QIDX_INVALID;
568 /* get virtual and physical address of the hardware queues */
569 txr->tail = IXGBE_TDT(txr->me);
570 txr->tx_base = (union ixgbe_adv_tx_desc *)vaddrs[i];
571 txr->tx_paddr = paddrs[i];
572
573 txr->bytes = 0;
574 txr->total_packets = 0;
575
576 /* Set the rate at which we sample packets */
577 if (sc->feat_en & IXGBE_FEATURE_FDIR)
578 txr->atr_sample = atr_sample_rate;
579
580 }
581
582 device_printf(iflib_get_dev(ctx), "allocated for %d queues\n",
583 sc->num_tx_queues);
584
585 return (0);
586
587 fail:
588 ixgbe_if_queues_free(ctx);
589
590 return (error);
591 } /* ixgbe_if_tx_queues_alloc */
592
593 /************************************************************************
594 * ixgbe_if_rx_queues_alloc
595 ************************************************************************/
596 static int
ixgbe_if_rx_queues_alloc(if_ctx_t ctx,caddr_t * vaddrs,uint64_t * paddrs,int nrxqs,int nrxqsets)597 ixgbe_if_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs,
598 int nrxqs, int nrxqsets)
599 {
600 struct ixgbe_softc *sc = iflib_get_softc(ctx);
601 struct ix_rx_queue *que;
602 int i;
603
604 MPASS(sc->num_rx_queues > 0);
605 MPASS(sc->num_rx_queues == nrxqsets);
606 MPASS(nrxqs == 1);
607
608 /* Allocate queue structure memory */
609 sc->rx_queues =
610 (struct ix_rx_queue *)malloc(sizeof(struct ix_rx_queue)*nrxqsets,
611 M_IXGBE, M_NOWAIT | M_ZERO);
612 if (!sc->rx_queues) {
613 device_printf(iflib_get_dev(ctx),
614 "Unable to allocate TX ring memory\n");
615 return (ENOMEM);
616 }
617
618 for (i = 0, que = sc->rx_queues; i < nrxqsets; i++, que++) {
619 struct rx_ring *rxr = &que->rxr;
620
621 /* In case SR-IOV is enabled, align the index properly */
622 rxr->me = ixgbe_vf_que_index(sc->iov_mode, sc->pool, i);
623
624 rxr->sc = que->sc = sc;
625
626 /* get the virtual and physical address of the hw queues */
627 rxr->tail = IXGBE_RDT(rxr->me);
628 rxr->rx_base = (union ixgbe_adv_rx_desc *)vaddrs[i];
629 rxr->rx_paddr = paddrs[i];
630 rxr->bytes = 0;
631 rxr->que = que;
632 }
633
634 device_printf(iflib_get_dev(ctx), "allocated for %d rx queues\n",
635 sc->num_rx_queues);
636
637 return (0);
638 } /* ixgbe_if_rx_queues_alloc */
639
640 /************************************************************************
641 * ixgbe_if_queues_free
642 ************************************************************************/
643 static void
ixgbe_if_queues_free(if_ctx_t ctx)644 ixgbe_if_queues_free(if_ctx_t ctx)
645 {
646 struct ixgbe_softc *sc = iflib_get_softc(ctx);
647 struct ix_tx_queue *tx_que = sc->tx_queues;
648 struct ix_rx_queue *rx_que = sc->rx_queues;
649 int i;
650
651 if (tx_que != NULL) {
652 for (i = 0; i < sc->num_tx_queues; i++, tx_que++) {
653 struct tx_ring *txr = &tx_que->txr;
654 if (txr->tx_rsq == NULL)
655 break;
656
657 free(txr->tx_rsq, M_IXGBE);
658 txr->tx_rsq = NULL;
659 }
660
661 free(sc->tx_queues, M_IXGBE);
662 sc->tx_queues = NULL;
663 }
664 if (rx_que != NULL) {
665 free(sc->rx_queues, M_IXGBE);
666 sc->rx_queues = NULL;
667 }
668 } /* ixgbe_if_queues_free */
669
670 /************************************************************************
671 * ixgbe_initialize_rss_mapping
672 ************************************************************************/
673 static void
ixgbe_initialize_rss_mapping(struct ixgbe_softc * sc)674 ixgbe_initialize_rss_mapping(struct ixgbe_softc *sc)
675 {
676 struct ixgbe_hw *hw = &sc->hw;
677 bool per_pool_rss;
678 u32 reta = 0, mrqc, rss_fields, rss_key[10];
679 int i, index_mult, j, queue_id, reta_queues, table_size;
680 u32 rss_hash_config;
681 #ifdef PCI_IOV
682 u32 pfmrqc;
683 #endif
684
685 if (sc->feat_en & IXGBE_FEATURE_RSS) {
686 /* Fetch the configured RSS key */
687 rss_getkey((uint8_t *)&rss_key);
688 } else {
689 /* set up random bits */
690 arc4rand(&rss_key, sizeof(rss_key), 0);
691 }
692
693 /* Set multiplier for RETA setup and table size based on MAC */
694 index_mult = 0x1;
695 per_pool_rss = false;
696 table_size = 128;
697 switch (sc->hw.mac.type) {
698 case ixgbe_mac_82598EB:
699 index_mult = 0x11;
700 break;
701 case ixgbe_mac_X550:
702 case ixgbe_mac_X550EM_x:
703 case ixgbe_mac_X550EM_a:
704 case ixgbe_mac_E610:
705 table_size = 512;
706 #ifdef PCI_IOV
707 if (sc->iov_mode != IXGBE_NO_VM) {
708 per_pool_rss = true;
709 table_size = 64;
710 }
711 #endif
712 break;
713 default:
714 break;
715 }
716
717 /*
718 * The global RETA is shared by the PF and VFs on 82599 and X540.
719 * X550-family devices instead use per-pool tables in multiple-RSS
720 * mode; initialize only the PF pool here because each VF owns and
721 * programs its own key and redirection table.
722 * On the shared tables, program all four queue indices while SR-IOV
723 * is active so a VF can use its full queue grant even when the PF uses
724 * fewer queues. PSRTYPE.RQPL limits the subset selected in each pool.
725 */
726 reta_queues = sc->num_rx_queues;
727 #ifdef PCI_IOV
728 if (sc->iov_mode != IXGBE_NO_VM && !per_pool_rss)
729 reta_queues = MAX(reta_queues, 4);
730 #endif
731
732 /* Set up the redirection table */
733 for (i = 0, j = 0; i < table_size; i++, j++) {
734 if (j == reta_queues)
735 j = 0;
736
737 if (sc->feat_en & IXGBE_FEATURE_RSS) {
738 /*
739 * Fetch the RSS bucket id for the given indirection
740 * entry. Cap it at the number of queue indices that must
741 * be represented in the shared table.
742 */
743 queue_id = rss_get_indirection_to_bucket(i);
744 queue_id = queue_id % reta_queues;
745 } else
746 queue_id = (j * index_mult);
747
748 /*
749 * The low 8 bits are for hash value (n+0);
750 * The next 8 bits are for hash value (n+1), etc.
751 */
752 reta = reta >> 8;
753 reta = reta | (((uint32_t)queue_id) << 24);
754 if ((i & 3) == 3) {
755 if (per_pool_rss) {
756 #ifdef PCI_IOV
757 IXGBE_WRITE_REG(hw,
758 IXGBE_PFVFRETA(i >> 2, sc->pool), reta);
759 #endif
760 } else if (i < 128)
761 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
762 else
763 IXGBE_WRITE_REG(hw,
764 IXGBE_ERETA((i >> 2) - 32), reta);
765 reta = 0;
766 }
767 }
768
769 /* Now fill our hash function seeds */
770 for (i = 0; i < 10; i++) {
771 if (per_pool_rss) {
772 #ifdef PCI_IOV
773 IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, sc->pool),
774 rss_key[i]);
775 #endif
776 } else
777 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), rss_key[i]);
778 }
779
780 /* Perform hash on these packet types */
781 if (sc->feat_en & IXGBE_FEATURE_RSS)
782 rss_hash_config = rss_gethashconfig();
783 else {
784 /*
785 * Disable UDP - IP fragments aren't currently being handled
786 * and so we end up with a mix of 2-tuple and 4-tuple
787 * traffic.
788 */
789 rss_hash_config = RSS_HASHTYPE_RSS_IPV4 |
790 RSS_HASHTYPE_RSS_TCP_IPV4 |
791 RSS_HASHTYPE_RSS_IPV6 |
792 RSS_HASHTYPE_RSS_TCP_IPV6 |
793 RSS_HASHTYPE_RSS_IPV6_EX |
794 RSS_HASHTYPE_RSS_TCP_IPV6_EX;
795 }
796
797 mrqc = ixgbe_get_mrqc(sc->iov_mode);
798 rss_fields = 0;
799 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV4)
800 rss_fields |= IXGBE_MRQC_RSS_FIELD_IPV4;
801 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV4)
802 rss_fields |= IXGBE_MRQC_RSS_FIELD_IPV4_TCP;
803 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6)
804 rss_fields |= IXGBE_MRQC_RSS_FIELD_IPV6;
805 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6)
806 rss_fields |= IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
807 if (rss_hash_config & RSS_HASHTYPE_RSS_IPV6_EX)
808 rss_fields |= IXGBE_MRQC_RSS_FIELD_IPV6_EX;
809 if (rss_hash_config & RSS_HASHTYPE_RSS_TCP_IPV6_EX)
810 rss_fields |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP;
811 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV4)
812 rss_fields |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
813 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6)
814 rss_fields |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
815 if (rss_hash_config & RSS_HASHTYPE_RSS_UDP_IPV6_EX)
816 rss_fields |= IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
817 if (hw->mac.type == ixgbe_mac_E610) {
818 /* E610 folds IPv6 extension headers into the base selectors. */
819 if (rss_fields & IXGBE_MRQC_RSS_FIELD_IPV6_EX)
820 rss_fields |= IXGBE_MRQC_RSS_FIELD_IPV6;
821 if (rss_fields & IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP)
822 rss_fields |= IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
823 if (rss_fields & IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP)
824 rss_fields |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
825 rss_fields &= ~(IXGBE_MRQC_RSS_FIELD_IPV6_EX |
826 IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP |
827 IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP);
828 }
829
830 if (per_pool_rss) {
831 #ifdef PCI_IOV
832 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
833 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
834
835 pfmrqc = IXGBE_MRQC_RSSEN | rss_fields;
836 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(sc->pool), pfmrqc);
837 #endif
838 } else {
839 mrqc |= rss_fields;
840 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
841 }
842 } /* ixgbe_initialize_rss_mapping */
843
844 /************************************************************************
845 * ixgbe_initialize_receive_units - Setup receive registers and features.
846 ************************************************************************/
847 #define BSIZEPKT_ROUNDUP ((1<<IXGBE_SRRCTL_BSIZEPKT_SHIFT)-1)
848
849 static void
ixgbe_initialize_receive_units(if_ctx_t ctx)850 ixgbe_initialize_receive_units(if_ctx_t ctx)
851 {
852 struct ixgbe_softc *sc = iflib_get_softc(ctx);
853 if_softc_ctx_t scctx = sc->shared;
854 struct ixgbe_hw *hw = &sc->hw;
855 if_t ifp = iflib_get_ifp(ctx);
856 struct ix_rx_queue *que;
857 int i, j;
858 u32 bufsz, fctrl, srrctl, rxcsum;
859 u32 hlreg;
860
861 /*
862 * Make sure receives are disabled while
863 * setting up the descriptor ring
864 */
865 ixgbe_disable_rx(hw);
866
867 /* Enable broadcasts */
868 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
869 fctrl |= IXGBE_FCTRL_BAM;
870 if (sc->hw.mac.type == ixgbe_mac_82598EB) {
871 fctrl |= IXGBE_FCTRL_DPF;
872 fctrl |= IXGBE_FCTRL_PMCF;
873 }
874 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
875
876 /* Set for Jumbo Frames? */
877 hlreg = IXGBE_READ_REG(hw, IXGBE_HLREG0);
878 if (if_getmtu(ifp) > ETHERMTU)
879 hlreg |= IXGBE_HLREG0_JUMBOEN;
880 else
881 hlreg &= ~IXGBE_HLREG0_JUMBOEN;
882 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg);
883
884 bufsz = (sc->rx_mbuf_sz + BSIZEPKT_ROUNDUP) >>
885 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
886
887 /* Setup the Base and Length of the Rx Descriptor Ring */
888 for (i = 0, que = sc->rx_queues; i < sc->num_rx_queues; i++, que++) {
889 struct rx_ring *rxr = &que->rxr;
890 u64 rdba = rxr->rx_paddr;
891
892 j = rxr->me;
893
894 /* Setup the Base and Length of the Rx Descriptor Ring */
895 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j),
896 (rdba & 0x00000000ffffffffULL));
897 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
898 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j),
899 scctx->isc_nrxd[0] * sizeof(union ixgbe_adv_rx_desc));
900
901 /* Set up the SRRCTL register */
902 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(j));
903 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
904 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
905 srrctl |= bufsz;
906 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
907
908 /*
909 * Set DROP_EN iff we have no flow control and >1 queue.
910 * Note that srrctl was cleared shortly before during reset,
911 * so we do not need to clear the bit, but do it just in case
912 * this code is moved elsewhere.
913 */
914 if (sc->num_rx_queues > 1 &&
915 sc->hw.fc.requested_mode == ixgbe_fc_none) {
916 srrctl |= IXGBE_SRRCTL_DROP_EN;
917 } else {
918 srrctl &= ~IXGBE_SRRCTL_DROP_EN;
919 }
920
921 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(j), srrctl);
922
923 /* Setup the HW Rx Head and Tail Descriptor Pointers */
924 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
925 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
926
927 /* Set the driver rx tail address */
928 rxr->tail = IXGBE_RDT(rxr->me);
929 }
930
931 if (sc->hw.mac.type != ixgbe_mac_82598EB) {
932 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
933 IXGBE_PSRTYPE_UDPHDR |
934 IXGBE_PSRTYPE_IPV4HDR |
935 IXGBE_PSRTYPE_IPV6HDR;
936
937 /*
938 * In VMDq+RSS mode PSRTYPE is per pool, and RQPL controls
939 * how many receive queues RSS may select within that pool.
940 * The PF occupies the last pool rather than pool zero.
941 */
942 #ifdef PCI_IOV
943 if (sc->iov_mode != IXGBE_NO_VM) {
944 if (sc->num_rx_queues > 3)
945 psrtype |= 2u << IXGBE_PSRTYPE_RQPL_SHIFT;
946 else if (sc->num_rx_queues > 1)
947 psrtype |= 1u << IXGBE_PSRTYPE_RQPL_SHIFT;
948 }
949 #endif
950 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(sc->pool), psrtype);
951 }
952
953 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
954
955 ixgbe_initialize_rss_mapping(sc);
956
957 if (sc->feat_en & IXGBE_FEATURE_RSS) {
958 /* RSS and RX IPP Checksum are mutually exclusive */
959 rxcsum |= IXGBE_RXCSUM_PCSD;
960 }
961
962 if (if_getcapenable(ifp) & IFCAP_RXCSUM)
963 rxcsum |= IXGBE_RXCSUM_PCSD;
964
965 /* This is useful for calculating UDP/IP fragment checksums */
966 if (!(rxcsum & IXGBE_RXCSUM_PCSD))
967 rxcsum |= IXGBE_RXCSUM_IPPCSE;
968
969 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
970
971 } /* ixgbe_initialize_receive_units */
972
973 /************************************************************************
974 * ixgbe_initialize_transmit_units - Enable transmit units.
975 ************************************************************************/
976 static void
ixgbe_initialize_transmit_units(if_ctx_t ctx)977 ixgbe_initialize_transmit_units(if_ctx_t ctx)
978 {
979 struct ixgbe_softc *sc = iflib_get_softc(ctx);
980 struct ixgbe_hw *hw = &sc->hw;
981 if_softc_ctx_t scctx = sc->shared;
982 struct ix_tx_queue *que;
983 int i;
984
985 /* Setup the Base and Length of the Tx Descriptor Ring */
986 for (i = 0, que = sc->tx_queues; i < sc->num_tx_queues;
987 i++, que++) {
988 struct tx_ring *txr = &que->txr;
989 u64 tdba = txr->tx_paddr;
990 u32 txctrl = 0;
991 int j = txr->me;
992
993 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
994 (tdba & 0x00000000ffffffffULL));
995 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
996 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j),
997 scctx->isc_ntxd[0] * sizeof(union ixgbe_adv_tx_desc));
998
999 /* Setup the HW Tx Head and Tail descriptor pointers */
1000 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
1001 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
1002
1003 /* Cache the tail address */
1004 txr->tail = IXGBE_TDT(txr->me);
1005
1006 txr->tx_rs_cidx = txr->tx_rs_pidx;
1007 txr->tx_cidx_processed = scctx->isc_ntxd[0] - 1;
1008 for (int k = 0; k < scctx->isc_ntxd[0]; k++)
1009 txr->tx_rsq[k] = QIDX_INVALID;
1010
1011 /* Disable Head Writeback */
1012 /*
1013 * Note: for X550 series devices, these registers are actually
1014 * prefixed with TPH_ isntead of DCA_, but the addresses and
1015 * fields remain the same.
1016 */
1017 switch (hw->mac.type) {
1018 case ixgbe_mac_82598EB:
1019 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));
1020 break;
1021 default:
1022 txctrl =
1023 IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(j));
1024 break;
1025 }
1026 txctrl &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN;
1027 switch (hw->mac.type) {
1028 case ixgbe_mac_82598EB:
1029 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);
1030 break;
1031 default:
1032 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(j),
1033 txctrl);
1034 break;
1035 }
1036
1037 }
1038
1039 if (hw->mac.type != ixgbe_mac_82598EB) {
1040 u32 dmatxctl, rttdcs;
1041
1042 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
1043 dmatxctl |= IXGBE_DMATXCTL_TE;
1044 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
1045 /* Disable arbiter to set MTQC */
1046 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
1047 rttdcs |= IXGBE_RTTDCS_ARBDIS;
1048 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
1049 IXGBE_WRITE_REG(hw, IXGBE_MTQC,
1050 ixgbe_get_mtqc(sc->iov_mode));
1051 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
1052 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
1053 }
1054
1055 } /* ixgbe_initialize_transmit_units */
1056
1057 static int
ixgbe_check_fw_api_version(struct ixgbe_softc * sc)1058 ixgbe_check_fw_api_version(struct ixgbe_softc *sc)
1059 {
1060 struct ixgbe_hw *hw = &sc->hw;
1061 if (hw->api_maj_ver > IXGBE_FW_API_VER_MAJOR) {
1062 device_printf(sc->dev,
1063 "The driver for the device stopped because the NVM "
1064 "image is newer than expected. You must install the "
1065 "most recent version of the network driver.\n");
1066 return (EOPNOTSUPP);
1067 } else if (hw->api_maj_ver == IXGBE_FW_API_VER_MAJOR &&
1068 hw->api_min_ver > (IXGBE_FW_API_VER_MINOR + 2)) {
1069 device_printf(sc->dev,
1070 "The driver for the device detected a newer version of "
1071 "the NVM image than expected. Please install the most "
1072 "recent version of the network driver.\n");
1073 } else if (hw->api_maj_ver < IXGBE_FW_API_VER_MAJOR ||
1074 hw->api_min_ver < IXGBE_FW_API_VER_MINOR - 2) {
1075 device_printf(sc->dev,
1076 "The driver for the device detected an older version "
1077 "of the NVM image than expected. "
1078 "Please update the NVM image.\n");
1079 }
1080 return (0);
1081 }
1082
1083 /************************************************************************
1084 * ixgbe_register
1085 ************************************************************************/
1086 static void *
ixgbe_register(device_t dev)1087 ixgbe_register(device_t dev)
1088 {
1089 return (&ixgbe_sctx_init);
1090 } /* ixgbe_register */
1091
1092 /************************************************************************
1093 * ixgbe_if_attach_pre - Device initialization routine, part 1
1094 *
1095 * Called when the driver is being loaded.
1096 * Identifies the type of hardware, initializes the hardware,
1097 * and initializes iflib structures.
1098 *
1099 * return 0 on success, positive on failure
1100 ************************************************************************/
1101 static int
ixgbe_if_attach_pre(if_ctx_t ctx)1102 ixgbe_if_attach_pre(if_ctx_t ctx)
1103 {
1104 struct ixgbe_softc *sc;
1105 device_t dev;
1106 if_softc_ctx_t scctx;
1107 struct ixgbe_hw *hw;
1108 int error = 0;
1109 u32 ctrl_ext;
1110 size_t i;
1111
1112 INIT_DEBUGOUT("ixgbe_attach: begin");
1113
1114 /* Allocate, clear, and link in our adapter structure */
1115 dev = iflib_get_dev(ctx);
1116 sc = iflib_get_softc(ctx);
1117 sc->hw.back = sc;
1118 sc->ctx = ctx;
1119 sc->dev = dev;
1120 scctx = sc->shared = iflib_get_softc_ctx(ctx);
1121 sc->media = iflib_get_media(ctx);
1122 hw = &sc->hw;
1123
1124 /* Determine hardware revision */
1125 hw->vendor_id = pci_get_vendor(dev);
1126 hw->device_id = pci_get_device(dev);
1127 hw->revision_id = pci_get_revid(dev);
1128 hw->subsystem_vendor_id = pci_get_subvendor(dev);
1129 hw->subsystem_device_id = pci_get_subdevice(dev);
1130
1131 /* Do base PCI setup - map BAR0 */
1132 if (ixgbe_allocate_pci_resources(ctx)) {
1133 device_printf(dev, "Allocation of PCI resources failed\n");
1134 return (ENXIO);
1135 }
1136
1137 /* let hardware know driver is loaded */
1138 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
1139 ctrl_ext |= IXGBE_CTRL_EXT_DRV_LOAD;
1140 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
1141
1142 /*
1143 * Initialize the shared code
1144 */
1145 if (ixgbe_init_shared_code(hw) != 0) {
1146 device_printf(dev, "Unable to initialize the shared code\n");
1147 error = ENXIO;
1148 goto err_pci;
1149 }
1150
1151 if (hw->mac.type == ixgbe_mac_E610)
1152 ixgbe_init_aci(hw);
1153
1154 sc->do_debug_dump = false;
1155
1156 if (hw->mac.ops.fw_recovery_mode &&
1157 hw->mac.ops.fw_recovery_mode(hw)) {
1158 device_printf(dev,
1159 "Firmware recovery mode detected. Limiting "
1160 "functionality.\nRefer to the Intel(R) Ethernet Adapters "
1161 "and Devices User Guide for details on firmware recovery "
1162 "mode.");
1163 error = ENOSYS;
1164 goto err_pci;
1165 }
1166
1167 /* 82598 Does not support SR-IOV, initialize everything else */
1168 if (hw->mac.type >= ixgbe_mac_82599_vf) {
1169 for (i = 0; i < sc->num_vfs; i++)
1170 hw->mbx.ops[i].init_params(hw);
1171 }
1172
1173 hw->allow_unsupported_sfp = allow_unsupported_sfp;
1174
1175 if (hw->mac.type != ixgbe_mac_82598EB)
1176 hw->phy.smart_speed = ixgbe_smart_speed;
1177
1178 ixgbe_init_device_features(sc);
1179
1180 /* Enable WoL (if supported) */
1181 ixgbe_check_wol_support(sc);
1182
1183 /* Verify adapter fan is still functional (if applicable) */
1184 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) {
1185 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
1186 ixgbe_check_fan_failure(sc, esdp, false);
1187 }
1188
1189 /* Ensure SW/FW semaphore is free */
1190 ixgbe_init_swfw_semaphore(hw);
1191
1192 /* Enable EEE power saving */
1193 if (sc->feat_en & IXGBE_FEATURE_EEE)
1194 hw->mac.ops.setup_eee(hw, true);
1195
1196 /* Set an initial default flow control value */
1197 hw->fc.requested_mode = ixgbe_flow_control;
1198
1199 hw->phy.reset_if_overtemp = true;
1200 error = ixgbe_reset_hw(hw);
1201 hw->phy.reset_if_overtemp = false;
1202 if (error == IXGBE_ERR_SFP_NOT_PRESENT) {
1203 /*
1204 * No optics in this port, set up
1205 * so the timer routine will probe
1206 * for later insertion.
1207 */
1208 sc->sfp_probe = true;
1209 error = 0;
1210 } else if (error == IXGBE_ERR_SFP_NOT_SUPPORTED) {
1211 device_printf(dev, "Unsupported SFP+ module detected!\n");
1212 error = EIO;
1213 goto err_pci;
1214 } else if (error) {
1215 device_printf(dev, "Hardware initialization failed\n");
1216 error = EIO;
1217 goto err_pci;
1218 }
1219
1220 /* Make sure we have a good EEPROM before we read from it */
1221 if (ixgbe_validate_eeprom_checksum(&sc->hw, NULL) < 0) {
1222 device_printf(dev, "The EEPROM Checksum Is Not Valid\n");
1223 error = EIO;
1224 goto err_pci;
1225 }
1226
1227 error = ixgbe_start_hw(hw);
1228 switch (error) {
1229 case IXGBE_ERR_EEPROM_VERSION:
1230 device_printf(dev,
1231 "This device is a pre-production adapter/LOM. Please be"
1232 " aware there may be issues associated with your"
1233 " hardware.\nIf you are experiencing problems please"
1234 " contact your Intel or hardware representative who"
1235 " provided you with this hardware.\n");
1236 break;
1237 case IXGBE_ERR_SFP_NOT_SUPPORTED:
1238 device_printf(dev, "Unsupported SFP+ Module\n");
1239 error = EIO;
1240 goto err_pci;
1241 case IXGBE_ERR_SFP_NOT_PRESENT:
1242 device_printf(dev, "No SFP+ Module found\n");
1243 /* falls thru */
1244 default:
1245 break;
1246 }
1247
1248 /* Check the FW API version and enable FW logging support for E610 */
1249 if (hw->mac.type == ixgbe_mac_E610) {
1250 if (ixgbe_check_fw_api_version(sc)) {
1251 error = EIO;
1252 goto err_pci;
1253 }
1254 ixgbe_fwlog_set_support_ena(hw);
1255 }
1256
1257 /* Most of the iflib initialization... */
1258
1259 iflib_set_mac(ctx, hw->mac.addr);
1260 switch (sc->hw.mac.type) {
1261 case ixgbe_mac_X550:
1262 case ixgbe_mac_X550EM_x:
1263 case ixgbe_mac_X550EM_a:
1264 scctx->isc_rss_table_size = 512;
1265 scctx->isc_ntxqsets_max = scctx->isc_nrxqsets_max = 64;
1266 break;
1267 default:
1268 scctx->isc_rss_table_size = 128;
1269 scctx->isc_ntxqsets_max = scctx->isc_nrxqsets_max = 16;
1270 }
1271
1272 /* Allow legacy interrupts */
1273 ixgbe_txrx.ift_legacy_intr = ixgbe_intr;
1274
1275 scctx->isc_txqsizes[0] =
1276 roundup2(scctx->isc_ntxd[0] * sizeof(union ixgbe_adv_tx_desc) +
1277 sizeof(u32), DBA_ALIGN),
1278 scctx->isc_rxqsizes[0] =
1279 roundup2(scctx->isc_nrxd[0] * sizeof(union ixgbe_adv_rx_desc),
1280 DBA_ALIGN);
1281
1282 /* XXX */
1283 scctx->isc_tx_csum_flags = CSUM_IP | CSUM_TCP | CSUM_UDP | CSUM_TSO |
1284 CSUM_IP6_TCP | CSUM_IP6_UDP | CSUM_IP6_TSO;
1285 if (sc->hw.mac.type == ixgbe_mac_82598EB) {
1286 scctx->isc_tx_nsegments = IXGBE_82598_SCATTER;
1287 } else {
1288 scctx->isc_tx_csum_flags |= CSUM_SCTP |CSUM_IP6_SCTP;
1289 scctx->isc_tx_nsegments = IXGBE_82599_SCATTER;
1290 }
1291
1292 scctx->isc_msix_bar = pci_msix_table_bar(dev);
1293
1294 scctx->isc_tx_tso_segments_max = scctx->isc_tx_nsegments;
1295 scctx->isc_tx_tso_size_max = IXGBE_TSO_SIZE;
1296 scctx->isc_tx_tso_segsize_max = PAGE_SIZE;
1297
1298 scctx->isc_txrx = &ixgbe_txrx;
1299
1300 scctx->isc_capabilities = scctx->isc_capenable = IXGBE_CAPS;
1301
1302 return (0);
1303
1304 err_pci:
1305 ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT);
1306 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD;
1307 IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext);
1308 ixgbe_free_pci_resources(ctx);
1309
1310 if (hw->mac.type == ixgbe_mac_E610)
1311 ixgbe_shutdown_aci(hw);
1312
1313 return (error);
1314 } /* ixgbe_if_attach_pre */
1315
1316 /*********************************************************************
1317 * ixgbe_if_attach_post - Device initialization routine, part 2
1318 *
1319 * Called during driver load, but after interrupts and
1320 * resources have been allocated and configured.
1321 * Sets up some data structures not relevant to iflib.
1322 *
1323 * return 0 on success, positive on failure
1324 *********************************************************************/
1325 static int
ixgbe_if_attach_post(if_ctx_t ctx)1326 ixgbe_if_attach_post(if_ctx_t ctx)
1327 {
1328 device_t dev;
1329 struct ixgbe_softc *sc;
1330 struct ixgbe_hw *hw;
1331 int error = 0;
1332
1333 dev = iflib_get_dev(ctx);
1334 sc = iflib_get_softc(ctx);
1335 hw = &sc->hw;
1336 ixgbe_init_iov_recovery(sc);
1337
1338 if (sc->intr_type == IFLIB_INTR_LEGACY &&
1339 (sc->feat_cap & IXGBE_FEATURE_LEGACY_IRQ) == 0) {
1340 device_printf(dev, "Device does not support legacy interrupts");
1341 error = ENXIO;
1342 goto err;
1343 }
1344
1345 /* Allocate multicast array memory. */
1346 sc->mta = malloc(sizeof(*sc->mta) * MAX_NUM_MULTICAST_ADDRESSES,
1347 M_IXGBE, M_NOWAIT);
1348 if (sc->mta == NULL) {
1349 device_printf(dev,
1350 "Can not allocate multicast setup array\n");
1351 error = ENOMEM;
1352 goto err;
1353 }
1354
1355 /* hw.ix defaults init */
1356 ixgbe_set_advertise(sc, ixgbe_advertise_speed);
1357
1358 /* Enable the optics for 82599 SFP+ fiber */
1359 ixgbe_enable_tx_laser(hw);
1360
1361 /* Enable power to the phy. */
1362 ixgbe_set_phy_power(hw, true);
1363
1364 ixgbe_initialize_iov(sc);
1365
1366 error = ixgbe_setup_interface(ctx);
1367 if (error) {
1368 device_printf(dev, "Interface setup failed: %d\n", error);
1369 goto err;
1370 }
1371
1372 ixgbe_if_update_admin_status(ctx);
1373
1374 /* Initialize statistics */
1375 ixgbe_update_stats_counters(sc);
1376 ixgbe_add_hw_stats(sc);
1377
1378 /* Check PCIE slot type/speed/width */
1379 ixgbe_get_slot_info(sc);
1380
1381 /*
1382 * Do time init and sysctl init here, but
1383 * only on the first port of a bypass sc.
1384 */
1385 ixgbe_bypass_init(sc);
1386
1387 /* Display NVM and Option ROM versions */
1388 ixgbe_print_fw_version(ctx);
1389
1390 /* Set an initial dmac value */
1391 sc->dmac = 0;
1392 /* Set initial advertised speeds (if applicable) */
1393 sc->advertise = ixgbe_get_default_advertise(sc);
1394
1395 if (sc->feat_cap & IXGBE_FEATURE_SRIOV)
1396 ixgbe_define_iov_schemas(dev, &error);
1397
1398 /* Add sysctls */
1399 ixgbe_add_device_sysctls(ctx);
1400
1401 /* Add MDIO bus if required / supported */
1402 ixgbe_mdio_attach(sc);
1403
1404 /* Init recovery mode timer and state variable */
1405 if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) {
1406 sc->recovery_mode = 0;
1407
1408 /* Set up the timer callout */
1409 callout_init(&sc->fw_mode_timer, true);
1410
1411 /* Start the task */
1412 callout_reset(&sc->fw_mode_timer, hz, ixgbe_fw_mode_timer, sc);
1413 }
1414
1415 return (0);
1416 err:
1417 return (error);
1418 } /* ixgbe_if_attach_post */
1419
1420 /************************************************************************
1421 * ixgbe_check_wol_support
1422 *
1423 * Checks whether the adapter's ports are capable of
1424 * Wake On LAN by reading the adapter's NVM.
1425 *
1426 * Sets each port's hw->wol_enabled value depending
1427 * on the value read here.
1428 ************************************************************************/
1429 static void
ixgbe_check_wol_support(struct ixgbe_softc * sc)1430 ixgbe_check_wol_support(struct ixgbe_softc *sc)
1431 {
1432 struct ixgbe_hw *hw = &sc->hw;
1433 u16 dev_caps = 0;
1434
1435 /* Find out WoL support for port */
1436 sc->wol_support = hw->wol_enabled = 0;
1437 ixgbe_get_device_caps(hw, &dev_caps);
1438 if ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
1439 ((dev_caps & IXGBE_DEVICE_CAPS_WOL_PORT0) &&
1440 hw->bus.func == 0))
1441 sc->wol_support = hw->wol_enabled = 1;
1442
1443 /* Save initial wake up filter configuration */
1444 sc->wufc = IXGBE_READ_REG(hw, IXGBE_WUFC);
1445
1446 return;
1447 } /* ixgbe_check_wol_support */
1448
1449 /************************************************************************
1450 * ixgbe_setup_interface
1451 *
1452 * Setup networking device structure and register an interface.
1453 ************************************************************************/
1454 static int
ixgbe_setup_interface(if_ctx_t ctx)1455 ixgbe_setup_interface(if_ctx_t ctx)
1456 {
1457 if_t ifp = iflib_get_ifp(ctx);
1458 struct ixgbe_softc *sc = iflib_get_softc(ctx);
1459
1460 INIT_DEBUGOUT("ixgbe_setup_interface: begin");
1461
1462 if_setbaudrate(ifp, IF_Gbps(10));
1463
1464 sc->max_frame_size = if_getmtu(ifp) + ETHER_HDR_LEN + ETHER_CRC_LEN;
1465
1466 sc->phy_layer = ixgbe_get_supported_physical_layer(&sc->hw);
1467
1468 ixgbe_add_media_types(ctx);
1469
1470 /* Autoselect media by default */
1471 ifmedia_set(sc->media, IFM_ETHER | IFM_AUTO);
1472
1473 return (0);
1474 } /* ixgbe_setup_interface */
1475
1476 /************************************************************************
1477 * ixgbe_if_get_counter
1478 ************************************************************************/
1479 static uint64_t
ixgbe_if_get_counter(if_ctx_t ctx,ift_counter cnt)1480 ixgbe_if_get_counter(if_ctx_t ctx, ift_counter cnt)
1481 {
1482 struct ixgbe_softc *sc = iflib_get_softc(ctx);
1483 if_t ifp = iflib_get_ifp(ctx);
1484
1485 switch (cnt) {
1486 case IFCOUNTER_IPACKETS:
1487 return (sc->ipackets);
1488 case IFCOUNTER_OPACKETS:
1489 return (sc->opackets);
1490 case IFCOUNTER_IBYTES:
1491 return (sc->ibytes);
1492 case IFCOUNTER_OBYTES:
1493 return (sc->obytes);
1494 case IFCOUNTER_IMCASTS:
1495 return (sc->imcasts);
1496 case IFCOUNTER_OMCASTS:
1497 return (sc->omcasts);
1498 case IFCOUNTER_COLLISIONS:
1499 return (0);
1500 case IFCOUNTER_IQDROPS:
1501 return (sc->iqdrops);
1502 case IFCOUNTER_IERRORS:
1503 return (sc->ierrors);
1504 default:
1505 return (if_get_counter_default(ifp, cnt));
1506 }
1507 } /* ixgbe_if_get_counter */
1508
1509 /************************************************************************
1510 * ixgbe_if_i2c_req
1511 ************************************************************************/
1512 static int
ixgbe_if_i2c_req(if_ctx_t ctx,struct ifi2creq * req)1513 ixgbe_if_i2c_req(if_ctx_t ctx, struct ifi2creq *req)
1514 {
1515 struct ixgbe_softc *sc = iflib_get_softc(ctx);
1516 struct ixgbe_hw *hw = &sc->hw;
1517 int i;
1518
1519 if (hw->phy.ops.read_i2c_byte == NULL)
1520 return (ENXIO);
1521 for (i = 0; i < req->len; i++)
1522 hw->phy.ops.read_i2c_byte(hw, req->offset + i,
1523 req->dev_addr, &req->data[i]);
1524 return (0);
1525 } /* ixgbe_if_i2c_req */
1526
1527 /* ixgbe_if_needs_restart - Tell iflib when the driver needs to be
1528 * reinitialized
1529 * @ctx: iflib context
1530 * @event: event code to check
1531 *
1532 * Defaults to returning false for unknown events.
1533 *
1534 * @returns true if iflib needs to reinit the interface
1535 */
1536 static bool
ixgbe_if_needs_restart(if_ctx_t ctx __unused,enum iflib_restart_event event)1537 ixgbe_if_needs_restart(if_ctx_t ctx __unused, enum iflib_restart_event event)
1538 {
1539 switch (event) {
1540 case IFLIB_RESTART_VLAN_CONFIG:
1541 default:
1542 return (false);
1543 }
1544 }
1545
1546 /************************************************************************
1547 * ixgbe_if_priv_ioctl - Ioctl handler for driver
1548 *
1549 * Handler for custom driver specific ioctls
1550 *
1551 * return 0 on success, positive on failure
1552 ************************************************************************/
1553 static int
ixgbe_if_priv_ioctl(if_ctx_t ctx,u_long command,caddr_t data)1554 ixgbe_if_priv_ioctl(if_ctx_t ctx, u_long command, caddr_t data)
1555 {
1556 struct ixgbe_softc *sc = iflib_get_softc(ctx);
1557 struct ifdrv *ifd;
1558 device_t dev = sc->dev;
1559
1560 /* Make sure the command type is valid */
1561 switch (command) {
1562 case SIOCSDRVSPEC:
1563 case SIOCGDRVSPEC:
1564 /* Accepted commands */
1565 break;
1566 case SIOCGPRIVATE_0:
1567 /*
1568 * Although we do not support this ioctl command, it's expected
1569 * that iflib will forward it to the IFDI_PRIV_IOCTL handler.
1570 * Do not print a message in this case.
1571 */
1572 return (ENOTSUP);
1573 default:
1574 /*
1575 * If we get a different command for this function, it's
1576 * definitely unexpected, so log a message indicating what
1577 * command we got for debugging purposes.
1578 */
1579 device_printf(dev,
1580 "%s: unexpected ioctl command %08lx\n",
1581 __func__, command);
1582 return (EINVAL);
1583 }
1584
1585 ifd = (struct ifdrv *)data;
1586
1587 switch (ifd->ifd_cmd) {
1588 case IXGBE_NVM_ACCESS:
1589 IOCTL_DEBUGOUT("ioctl: NVM ACCESS");
1590 return (ixgbe_nvm_access_ioctl(sc, ifd));
1591 case IXGBE_DEBUG_DUMP:
1592 IOCTL_DEBUGOUT("ioctl: DEBUG DUMP");
1593 return (ixgbe_debug_dump_ioctl(sc, ifd));
1594 default:
1595 IOCTL_DEBUGOUT1(
1596 "ioctl: UNKNOWN SIOC(S|G)DRVSPEC (0x%X) command\n",
1597 (int)ifd->ifd_cmd);
1598 return (EINVAL);
1599 }
1600
1601 return (0);
1602 }
1603
1604 /************************************************************************
1605 * ixgbe_nvm_access_ioctl
1606 *
1607 * Handles an NVM access ioctl request
1608 ************************************************************************/
1609 static int
ixgbe_nvm_access_ioctl(struct ixgbe_softc * sc,struct ifdrv * ifd)1610 ixgbe_nvm_access_ioctl(struct ixgbe_softc *sc, struct ifdrv *ifd)
1611 {
1612 struct ixgbe_nvm_access_data *data;
1613 struct ixgbe_nvm_access_cmd *cmd;
1614 struct ixgbe_hw *hw = &sc->hw;
1615 size_t ifd_len = ifd->ifd_len;
1616 size_t malloc_len;
1617 device_t dev = sc->dev;
1618 s32 status;
1619 u8 *nvm_buffer;
1620 int error = 0;
1621
1622 /*
1623 * ifioctl forwards SIOCxDRVSPEC to iflib without conducting
1624 * a privilege check. Subsequently, iflib passes the ioctl to the driver
1625 * without verifying privileges. To prevent non-privileged threads from
1626 * accessing this interface, perform a privilege check at this point.
1627 */
1628 error = priv_check(curthread, PRIV_DRIVER);
1629 if (error)
1630 return (error);
1631
1632 if (ifd_len < sizeof(*cmd)) {
1633 device_printf(dev,
1634 "%s: ifdrv length is too small. Got %zu, "
1635 "but expected %zu\n",
1636 __func__, ifd_len, sizeof(*cmd));
1637 return (EINVAL);
1638 }
1639
1640 if (ifd->ifd_data == NULL) {
1641 device_printf(dev, "%s: No ifd data buffer.\n",
1642 __func__);
1643 return (EINVAL);
1644 }
1645
1646 malloc_len = max(ifd_len, sizeof(*data) + sizeof(*cmd));
1647
1648 nvm_buffer = (u8 *)malloc(malloc_len, M_IXGBE, M_ZERO | M_NOWAIT);
1649 if (!nvm_buffer)
1650 return (ENOMEM);
1651
1652 /* Copy the NVM access command and data in from user space */
1653 error = copyin(ifd->ifd_data, nvm_buffer, ifd_len);
1654 if (error) {
1655 device_printf(dev, "%s: Failed to copy data in, error: %d\n",
1656 __func__, error);
1657 goto cleanup_free_nvm_buffer;
1658 }
1659
1660 /*
1661 * The NVM command structure is immediately followed by data which
1662 * varies in size based on the command.
1663 */
1664 cmd = (struct ixgbe_nvm_access_cmd *)nvm_buffer;
1665 data = (struct ixgbe_nvm_access_data *)
1666 (nvm_buffer + sizeof(struct ixgbe_nvm_access_cmd));
1667
1668 /* Handle the NVM access request */
1669 status = ixgbe_handle_nvm_access(hw, cmd, data);
1670 if (status) {
1671 device_printf(dev, "%s: NVM access request failed, error %d\n",
1672 __func__, status);
1673 }
1674
1675 /* Copy the possibly modified contents of the handled request out */
1676 error = copyout(nvm_buffer, ifd->ifd_data, ifd_len);
1677 if (error) {
1678 device_printf(dev, "%s: Copying response back to "
1679 "user space failed, error %d\n",
1680 __func__, error);
1681 goto cleanup_free_nvm_buffer;
1682 }
1683
1684 /* Convert private status to an error code for proper ioctl response */
1685 switch (status) {
1686 case IXGBE_SUCCESS:
1687 error = 0;
1688 break;
1689 case IXGBE_ERR_OUT_OF_RANGE:
1690 error = ENOTTY;
1691 break;
1692 case IXGBE_ERR_PARAM:
1693 default:
1694 error = EINVAL;
1695 break;
1696 }
1697
1698 cleanup_free_nvm_buffer:
1699 free(nvm_buffer, M_IXGBE);
1700 return (error);
1701 }
1702
1703 /************************************************************************
1704 * ixgbe_debug_dump_ioctl
1705 *
1706 * Makes debug dump of internal FW/HW data.
1707 ************************************************************************/
1708 static int
ixgbe_debug_dump_ioctl(struct ixgbe_softc * sc,struct ifdrv * ifd)1709 ixgbe_debug_dump_ioctl(struct ixgbe_softc *sc, struct ifdrv *ifd)
1710 {
1711 struct ixgbe_debug_dump_cmd *dd_cmd;
1712 struct ixgbe_hw *hw = &sc->hw;
1713 size_t ifd_len = ifd->ifd_len;
1714 device_t dev = sc->dev;
1715 s32 error = 0;
1716
1717 if (!(sc->feat_en & IXGBE_FEATURE_DBG_DUMP))
1718 return (ENODEV);
1719
1720 /* Data returned from ACI command */
1721 u16 ret_buf_size = 0;
1722 u16 ret_next_cluster = 0;
1723 u16 ret_next_table = 0;
1724 u32 ret_next_index = 0;
1725
1726 /*
1727 * ifioctl forwards SIOCxDRVSPEC to iflib without conducting
1728 * a privilege check. Subsequently, iflib passes the ioctl to the driver
1729 * without verifying privileges. To prevent non-privileged threads from
1730 * accessing this interface, perform a privilege check at this point.
1731 */
1732 error = priv_check(curthread, PRIV_DRIVER);
1733 if (error)
1734 return (error);
1735
1736 if (ifd_len < sizeof(*dd_cmd)) {
1737 device_printf(dev,
1738 "%s: ifdrv length is too small. Got %zu, "
1739 "but expected %zu\n",
1740 __func__, ifd_len, sizeof(*dd_cmd));
1741 return (EINVAL);
1742 }
1743
1744 if (ifd->ifd_data == NULL) {
1745 device_printf(dev, "%s: No ifd data buffer.\n",
1746 __func__);
1747 return (EINVAL);
1748 }
1749
1750 dd_cmd = (struct ixgbe_debug_dump_cmd *)malloc(ifd_len, M_IXGBE,
1751 M_NOWAIT | M_ZERO);
1752 if (!dd_cmd) {
1753 error = -ENOMEM;
1754 goto out;
1755 }
1756 /* copy data from userspace */
1757 error = copyin(ifd->ifd_data, dd_cmd, ifd_len);
1758 if (error) {
1759 device_printf(dev, "%s: Failed to copy data in, error: %d\n",
1760 __func__, error);
1761 goto out;
1762 }
1763
1764 /* ACI command requires buf_size arg to be grater than 0 */
1765 if (dd_cmd->data_size == 0) {
1766 device_printf(dev, "%s: data_size must be greater than 0\n",
1767 __func__);
1768 error = EINVAL;
1769 goto out;
1770 }
1771
1772 /* Zero the data buffer memory space */
1773 memset(dd_cmd->data, 0, ifd_len - sizeof(*dd_cmd));
1774
1775 error = ixgbe_aci_get_internal_data(hw, dd_cmd->cluster_id,
1776 dd_cmd->table_id, dd_cmd->offset, dd_cmd->data, dd_cmd->data_size,
1777 &ret_buf_size, &ret_next_cluster, &ret_next_table, &ret_next_index);
1778 if (error) {
1779 device_printf(dev,
1780 "%s: Failed to get internal FW/HW data, error: %d\n",
1781 __func__, error);
1782 goto out;
1783 }
1784
1785 dd_cmd->cluster_id = ret_next_cluster;
1786 dd_cmd->table_id = ret_next_table;
1787 dd_cmd->offset = ret_next_index;
1788 dd_cmd->data_size = ret_buf_size;
1789
1790 error = copyout(dd_cmd, ifd->ifd_data, ifd->ifd_len);
1791 if (error) {
1792 device_printf(dev,
1793 "%s: Failed to copy data out, error: %d\n",
1794 __func__, error);
1795 }
1796
1797 out:
1798 free(dd_cmd, M_IXGBE);
1799
1800 return (error);
1801 }
1802
1803 /************************************************************************
1804 * ixgbe_add_media_types
1805 ************************************************************************/
1806 static void
ixgbe_add_media_types(if_ctx_t ctx)1807 ixgbe_add_media_types(if_ctx_t ctx)
1808 {
1809 struct ixgbe_softc *sc = iflib_get_softc(ctx);
1810 struct ixgbe_hw *hw = &sc->hw;
1811 device_t dev = iflib_get_dev(ctx);
1812 u64 layer;
1813
1814 layer = sc->phy_layer = ixgbe_get_supported_physical_layer(hw);
1815
1816 /* Media types with matching FreeBSD media defines */
1817 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T)
1818 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_T, 0, NULL);
1819 if (layer & IXGBE_PHYSICAL_LAYER_5000BASE_T)
1820 ifmedia_add(sc->media, IFM_ETHER | IFM_5000_T, 0, NULL);
1821 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_T)
1822 ifmedia_add(sc->media, IFM_ETHER | IFM_2500_T, 0, NULL);
1823 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_T)
1824 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_T, 0, NULL);
1825 if (layer & IXGBE_PHYSICAL_LAYER_100BASE_TX)
1826 ifmedia_add(sc->media, IFM_ETHER | IFM_100_TX, 0, NULL);
1827 if (layer & IXGBE_PHYSICAL_LAYER_10BASE_T)
1828 ifmedia_add(sc->media, IFM_ETHER | IFM_10_T, 0, NULL);
1829
1830 if (hw->mac.type == ixgbe_mac_X550) {
1831 ifmedia_add(sc->media, IFM_ETHER | IFM_2500_T, 0, NULL);
1832 ifmedia_add(sc->media, IFM_ETHER | IFM_5000_T, 0, NULL);
1833 }
1834
1835 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU ||
1836 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA) {
1837 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_TWINAX, 0,
1838 NULL);
1839 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_KX, 0, NULL);
1840 }
1841
1842 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR) {
1843 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_LR, 0, NULL);
1844 if (hw->phy.multispeed_fiber)
1845 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_LX, 0,
1846 NULL);
1847 }
1848 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_BX) {
1849 device_printf(dev, "Media supported: 10Gbase-BX\n");
1850 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_BX, 0, NULL);
1851 }
1852 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR) {
1853 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_SR, 0, NULL);
1854 if (hw->phy.multispeed_fiber)
1855 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_SX, 0,
1856 NULL);
1857 } else if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX)
1858 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_SX, 0, NULL);
1859 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4)
1860 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_CX4, 0, NULL);
1861
1862 #ifdef IFM_ETH_XTYPE
1863 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR)
1864 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_KR, 0, NULL);
1865 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4)
1866 ifmedia_add( sc->media, IFM_ETHER | IFM_10G_KX4, 0, NULL);
1867 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX)
1868 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_KX, 0, NULL);
1869 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX)
1870 ifmedia_add(sc->media, IFM_ETHER | IFM_2500_KX, 0, NULL);
1871 #else
1872 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR) {
1873 device_printf(dev, "Media supported: 10GbaseKR\n");
1874 device_printf(dev, "10GbaseKR mapped to 10GbaseSR\n");
1875 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_SR, 0, NULL);
1876 }
1877 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4) {
1878 device_printf(dev, "Media supported: 10GbaseKX4\n");
1879 device_printf(dev, "10GbaseKX4 mapped to 10GbaseCX4\n");
1880 ifmedia_add(sc->media, IFM_ETHER | IFM_10G_CX4, 0, NULL);
1881 }
1882 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX) {
1883 device_printf(dev, "Media supported: 1000baseKX\n");
1884 device_printf(dev, "1000baseKX mapped to 1000baseCX\n");
1885 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_CX, 0, NULL);
1886 }
1887 if (layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX) {
1888 device_printf(dev, "Media supported: 2500baseKX\n");
1889 device_printf(dev, "2500baseKX mapped to 2500baseSX\n");
1890 ifmedia_add(sc->media, IFM_ETHER | IFM_2500_SX, 0, NULL);
1891 }
1892 #endif
1893 if (layer & IXGBE_PHYSICAL_LAYER_1000BASE_BX) {
1894 device_printf(dev, "Media supported: 1000baseBX\n");
1895 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_BX, 0, NULL);
1896 }
1897
1898 if (hw->device_id == IXGBE_DEV_ID_82598AT) {
1899 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_T | IFM_FDX,
1900 0, NULL);
1901 ifmedia_add(sc->media, IFM_ETHER | IFM_1000_T, 0, NULL);
1902 }
1903
1904 ifmedia_add(sc->media, IFM_ETHER | IFM_AUTO, 0, NULL);
1905 } /* ixgbe_add_media_types */
1906
1907 /************************************************************************
1908 * ixgbe_is_sfp
1909 ************************************************************************/
1910 static inline bool
ixgbe_is_sfp(struct ixgbe_hw * hw)1911 ixgbe_is_sfp(struct ixgbe_hw *hw)
1912 {
1913 switch (hw->mac.type) {
1914 case ixgbe_mac_82598EB:
1915 if (hw->phy.type == ixgbe_phy_nl)
1916 return (true);
1917 return (false);
1918 case ixgbe_mac_82599EB:
1919 switch (hw->mac.ops.get_media_type(hw)) {
1920 case ixgbe_media_type_fiber:
1921 case ixgbe_media_type_fiber_qsfp:
1922 return (true);
1923 default:
1924 return (false);
1925 }
1926 case ixgbe_mac_X550EM_x:
1927 case ixgbe_mac_X550EM_a:
1928 case ixgbe_mac_E610:
1929 if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber)
1930 return (true);
1931 return (false);
1932 default:
1933 return (false);
1934 }
1935 } /* ixgbe_is_sfp */
1936
1937 /************************************************************************
1938 * ixgbe_config_link
1939 ************************************************************************/
1940 static void
ixgbe_config_link(if_ctx_t ctx)1941 ixgbe_config_link(if_ctx_t ctx)
1942 {
1943 struct ixgbe_softc *sc = iflib_get_softc(ctx);
1944 struct ixgbe_hw *hw = &sc->hw;
1945 u32 autoneg, err = 0;
1946 bool sfp, negotiate;
1947
1948 sfp = ixgbe_is_sfp(hw);
1949
1950 if (sfp) {
1951 /* ixgbe_if_stop() disables it on every 82599 SFP port. */
1952 ixgbe_enable_tx_laser(hw);
1953 atomic_set_32(&sc->task_requests, IXGBE_REQUEST_TASK_MOD);
1954 iflib_admin_intr_deferred(ctx);
1955 } else {
1956 if (hw->mac.ops.check_link)
1957 err = ixgbe_check_link(hw, &sc->link_speed,
1958 &sc->link_up, false);
1959 if (err)
1960 return;
1961 autoneg = hw->phy.autoneg_advertised;
1962 if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
1963 err = hw->mac.ops.get_link_capabilities(hw, &autoneg,
1964 &negotiate);
1965 if (err)
1966 return;
1967
1968 if (hw->mac.type == ixgbe_mac_X550 &&
1969 hw->phy.autoneg_advertised == 0) {
1970 /*
1971 * 2.5G and 5G autonegotiation speeds on X550
1972 * are disabled by default due to reported
1973 * interoperability issues with some switches.
1974 *
1975 * The second condition checks if any operations
1976 * involving setting autonegotiation speeds have
1977 * been performed prior to this ixgbe_config_link()
1978 * call.
1979 *
1980 * If hw->phy.autoneg_advertised does not
1981 * equal 0, this means that the user might have
1982 * set autonegotiation speeds via the sysctl
1983 * before bringing the interface up. In this
1984 * case, we should not disable 2.5G and 5G
1985 * since that speeds might be selected by the
1986 * user.
1987 *
1988 * Otherwise (i.e. if hw->phy.autoneg_advertised
1989 * is set to 0), it is the first time we set
1990 * autonegotiation preferences and the default
1991 * set of speeds should exclude 2.5G and 5G.
1992 */
1993 autoneg &= ~(IXGBE_LINK_SPEED_2_5GB_FULL |
1994 IXGBE_LINK_SPEED_5GB_FULL);
1995 }
1996
1997 if (hw->mac.type == ixgbe_mac_E610) {
1998 hw->phy.ops.init(hw);
1999 err = ixgbe_enable_lse(sc);
2000 if (err)
2001 device_printf(sc->dev,
2002 "Failed to enable Link Status Event, "
2003 "error: %d", err);
2004 }
2005
2006 if (hw->mac.ops.setup_link)
2007 err = hw->mac.ops.setup_link(hw, autoneg,
2008 sc->link_up);
2009 }
2010 } /* ixgbe_config_link */
2011
2012 /************************************************************************
2013 * ixgbe_update_stats_counters - Update board statistics counters.
2014 ************************************************************************/
2015 static void
ixgbe_update_stats_counters(struct ixgbe_softc * sc)2016 ixgbe_update_stats_counters(struct ixgbe_softc *sc)
2017 {
2018 struct ixgbe_hw *hw = &sc->hw;
2019 struct ixgbe_hw_stats *stats = &sc->stats.pf;
2020 u32 missed_rx = 0, mpc, bprc, lxon, lxoff;
2021 u32 lxoffrxc;
2022 u64 total_missed_rx = 0, total;
2023
2024 stats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
2025 stats->illerrc += IXGBE_READ_REG(hw, IXGBE_ILLERRC);
2026 stats->errbc += IXGBE_READ_REG(hw, IXGBE_ERRBC);
2027 stats->mspdc += IXGBE_READ_REG(hw, IXGBE_MSPDC);
2028 for (int i = 0; i < nitems(stats->mpc); i++) {
2029 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
2030 missed_rx += mpc;
2031 stats->mpc[i] += mpc;
2032 total_missed_rx += stats->mpc[i];
2033 }
2034 stats->mpctotal = total_missed_rx;
2035
2036 for (int i = 0; i < 16; i++) {
2037 stats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
2038 stats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
2039 stats->qprdc[i] += IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
2040 }
2041 stats->mlfc += IXGBE_READ_REG(hw, IXGBE_MLFC);
2042 stats->mrfc += IXGBE_READ_REG(hw, IXGBE_MRFC);
2043 stats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
2044
2045 /* Hardware workaround, gprc counts missed packets */
2046 stats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
2047 stats->gprc -= missed_rx;
2048
2049 if (hw->mac.type != ixgbe_mac_82598EB) {
2050 stats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL) +
2051 ((u64)IXGBE_READ_REG(hw, IXGBE_GORCH) << 32);
2052 stats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL) +
2053 ((u64)IXGBE_READ_REG(hw, IXGBE_GOTCH) << 32);
2054 stats->tor += IXGBE_READ_REG(hw, IXGBE_TORL) +
2055 ((u64)IXGBE_READ_REG(hw, IXGBE_TORH) << 32);
2056 stats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
2057 lxoffrxc = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
2058 stats->lxoffrxc += lxoffrxc;
2059 } else {
2060 stats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
2061 lxoffrxc = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
2062 stats->lxoffrxc += lxoffrxc;
2063 /* 82598 only has a counter in the high register */
2064 stats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
2065 stats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
2066 stats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
2067 }
2068
2069 /*
2070 * For watchdog management we need to know if we have been paused
2071 * during the last interval, so capture that here.
2072 */
2073 if (lxoffrxc)
2074 sc->shared->isc_pause_frames = 1;
2075
2076 /*
2077 * Workaround: mprc hardware is incorrectly counting
2078 * broadcasts, so for now we subtract those.
2079 */
2080 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
2081 stats->bprc += bprc;
2082 stats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
2083 if (hw->mac.type == ixgbe_mac_82598EB)
2084 stats->mprc -= bprc;
2085
2086 stats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
2087 stats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
2088 stats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
2089 stats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
2090 stats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
2091 stats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
2092
2093 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
2094 stats->lxontxc += lxon;
2095 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
2096 stats->lxofftxc += lxoff;
2097 total = (u64)lxon + lxoff;
2098
2099 stats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
2100 stats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
2101 stats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
2102 stats->gptc -= total;
2103 stats->mptc -= total;
2104 stats->ptc64 -= total;
2105 stats->gotc -= total * ETHER_MIN_LEN;
2106
2107 stats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2108 stats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
2109 stats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
2110 stats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
2111 stats->mngprc += IXGBE_READ_REG(hw, IXGBE_MNGPRC);
2112 stats->mngpdc += IXGBE_READ_REG(hw, IXGBE_MNGPDC);
2113 stats->mngptc += IXGBE_READ_REG(hw, IXGBE_MNGPTC);
2114 stats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
2115 stats->tpt += IXGBE_READ_REG(hw, IXGBE_TPT);
2116 stats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
2117 stats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
2118 stats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
2119 stats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
2120 stats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
2121 stats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
2122 stats->xec += IXGBE_READ_REG(hw, IXGBE_XEC);
2123 stats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
2124 stats->fclast += IXGBE_READ_REG(hw, IXGBE_FCLAST);
2125 /* Only read FCOE on 82599 */
2126 if (hw->mac.type != ixgbe_mac_82598EB) {
2127 stats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
2128 stats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
2129 stats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
2130 stats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
2131 stats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
2132 }
2133
2134 /* TLPIC and RLPIC are clear-on-read. */
2135 if (sc->feat_cap & IXGBE_FEATURE_EEE) {
2136 stats->tlpic += IXGBE_READ_REG(hw, IXGBE_TLPIC);
2137 stats->rlpic += IXGBE_READ_REG(hw, IXGBE_RLPIC);
2138 }
2139
2140 /* Fill out the OS statistics structure */
2141 IXGBE_SET_IPACKETS(sc, stats->gprc);
2142 IXGBE_SET_OPACKETS(sc, stats->gptc);
2143 IXGBE_SET_IBYTES(sc, stats->gorc);
2144 IXGBE_SET_OBYTES(sc, stats->gotc);
2145 IXGBE_SET_IMCASTS(sc, stats->mprc);
2146 IXGBE_SET_OMCASTS(sc, stats->mptc);
2147 IXGBE_SET_COLLISIONS(sc, 0);
2148 IXGBE_SET_IQDROPS(sc, total_missed_rx);
2149
2150 /*
2151 * Aggregate following types of errors as RX errors:
2152 * - CRC error count,
2153 * - illegal byte error count,
2154 * - missed packets count,
2155 * - length error count,
2156 * - undersized packets count,
2157 * - fragmented packets count,
2158 * - oversized packets count,
2159 * - jabber count.
2160 */
2161 IXGBE_SET_IERRORS(sc, stats->crcerrs + stats->illerrc +
2162 stats->mpctotal + stats->rlec + stats->ruc + stats->rfc +
2163 stats->roc + stats->rjc);
2164 } /* ixgbe_update_stats_counters */
2165
2166 /************************************************************************
2167 * ixgbe_add_hw_stats
2168 *
2169 * Add sysctl variables, one per statistic, to the system.
2170 ************************************************************************/
2171 static void
ixgbe_add_hw_stats(struct ixgbe_softc * sc)2172 ixgbe_add_hw_stats(struct ixgbe_softc *sc)
2173 {
2174 device_t dev = iflib_get_dev(sc->ctx);
2175 struct ix_rx_queue *rx_que;
2176 struct ix_tx_queue *tx_que;
2177 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev);
2178 struct sysctl_oid *tree = device_get_sysctl_tree(dev);
2179 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree);
2180 struct ixgbe_hw_stats *stats = &sc->stats.pf;
2181 struct sysctl_oid *stat_node, *queue_node;
2182 struct sysctl_oid_list *stat_list, *queue_list;
2183 int i;
2184
2185 #define QUEUE_NAME_LEN 32
2186 char namebuf[QUEUE_NAME_LEN];
2187
2188 /* Driver Statistics */
2189 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "dropped",
2190 CTLFLAG_RD, &sc->dropped_pkts, "Driver dropped packets");
2191 SYSCTL_ADD_ULONG(ctx, child, OID_AUTO, "link_irq",
2192 CTLFLAG_RD, &sc->link_irq, "Link MSI-X IRQ Handled");
2193
2194 for (i = 0, tx_que = sc->tx_queues; i < sc->num_tx_queues;
2195 i++, tx_que++) {
2196 struct tx_ring *txr = &tx_que->txr;
2197 snprintf(namebuf, QUEUE_NAME_LEN, "queue%d", i);
2198 queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf,
2199 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Queue Name");
2200 queue_list = SYSCTL_CHILDREN(queue_node);
2201
2202 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "txd_head",
2203 CTLTYPE_UINT | CTLFLAG_RD, txr, 0,
2204 ixgbe_sysctl_tdh_handler, "IU",
2205 "Transmit Descriptor Head");
2206 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "txd_tail",
2207 CTLTYPE_UINT | CTLFLAG_RD, txr, 0,
2208 ixgbe_sysctl_tdt_handler, "IU",
2209 "Transmit Descriptor Tail");
2210 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tso_tx",
2211 CTLFLAG_RD, &txr->tso_tx, "TSO");
2212 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_packets",
2213 CTLFLAG_RD, &txr->total_packets,
2214 "Queue Packets Transmitted");
2215 }
2216
2217 for (i = 0, rx_que = sc->rx_queues; i < sc->num_rx_queues;
2218 i++, rx_que++) {
2219 struct rx_ring *rxr = &rx_que->rxr;
2220 snprintf(namebuf, QUEUE_NAME_LEN, "queue%d", i);
2221 queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf,
2222 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Queue Name");
2223 queue_list = SYSCTL_CHILDREN(queue_node);
2224
2225 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "interrupt_rate",
2226 CTLTYPE_UINT | CTLFLAG_RW,
2227 &sc->rx_queues[i], 0,
2228 ixgbe_sysctl_interrupt_rate_handler, "IU",
2229 "Interrupt Rate");
2230 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "irqs",
2231 CTLFLAG_RD, &(sc->rx_queues[i].irqs),
2232 "irqs on this queue");
2233 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rxd_head",
2234 CTLTYPE_UINT | CTLFLAG_RD, rxr, 0,
2235 ixgbe_sysctl_rdh_handler, "IU",
2236 "Receive Descriptor Head");
2237 SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rxd_tail",
2238 CTLTYPE_UINT | CTLFLAG_RD, rxr, 0,
2239 ixgbe_sysctl_rdt_handler, "IU",
2240 "Receive Descriptor Tail");
2241 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_packets",
2242 CTLFLAG_RD, &rxr->rx_packets, "Queue Packets Received");
2243 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_bytes",
2244 CTLFLAG_RD, &rxr->rx_bytes, "Queue Bytes Received");
2245 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_copies",
2246 CTLFLAG_RD, &rxr->rx_copies, "Copied RX Frames");
2247 SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_discarded",
2248 CTLFLAG_RD, &rxr->rx_discarded, "Discarded RX packets");
2249 }
2250
2251 /* MAC stats get their own sub node */
2252 stat_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "mac_stats",
2253 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "MAC Statistics");
2254 stat_list = SYSCTL_CHILDREN(stat_node);
2255
2256 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_errs",
2257 CTLFLAG_RD, &sc->ierrors, IXGBE_SYSCTL_DESC_RX_ERRS);
2258 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "crc_errs",
2259 CTLFLAG_RD, &stats->crcerrs, "CRC Errors");
2260 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "ill_errs",
2261 CTLFLAG_RD, &stats->illerrc, "Illegal Byte Errors");
2262 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "byte_errs",
2263 CTLFLAG_RD, &stats->errbc, "Byte Errors");
2264 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "short_discards",
2265 CTLFLAG_RD, &stats->mspdc, "MAC Short Packets Discarded");
2266 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "local_faults",
2267 CTLFLAG_RD, &stats->mlfc, "MAC Local Faults");
2268 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "remote_faults",
2269 CTLFLAG_RD, &stats->mrfc, "MAC Remote Faults");
2270 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rec_len_errs",
2271 CTLFLAG_RD, &stats->rlec, "Receive Length Errors");
2272 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_missed_packets",
2273 CTLFLAG_RD, &stats->mpctotal, "RX Missed Packet Count");
2274
2275 /* Flow Control stats */
2276 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xon_txd",
2277 CTLFLAG_RD, &stats->lxontxc, "Link XON Transmitted");
2278 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xon_recvd",
2279 CTLFLAG_RD, &stats->lxonrxc, "Link XON Received");
2280 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xoff_txd",
2281 CTLFLAG_RD, &stats->lxofftxc, "Link XOFF Transmitted");
2282 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "xoff_recvd",
2283 CTLFLAG_RD, &stats->lxoffrxc, "Link XOFF Received");
2284
2285 /* Packet Reception Stats */
2286 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_octets_rcvd",
2287 CTLFLAG_RD, &stats->tor, "Total Octets Received");
2288 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_rcvd",
2289 CTLFLAG_RD, &stats->gorc, "Good Octets Received");
2290 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_pkts_rcvd",
2291 CTLFLAG_RD, &stats->tpr, "Total Packets Received");
2292 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_rcvd",
2293 CTLFLAG_RD, &stats->gprc, "Good Packets Received");
2294 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_rcvd",
2295 CTLFLAG_RD, &stats->mprc, "Multicast Packets Received");
2296 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_rcvd",
2297 CTLFLAG_RD, &stats->bprc, "Broadcast Packets Received");
2298 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_64",
2299 CTLFLAG_RD, &stats->prc64, "64 byte frames received ");
2300 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_65_127",
2301 CTLFLAG_RD, &stats->prc127, "65-127 byte frames received");
2302 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_128_255",
2303 CTLFLAG_RD, &stats->prc255, "128-255 byte frames received");
2304 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_256_511",
2305 CTLFLAG_RD, &stats->prc511, "256-511 byte frames received");
2306 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_512_1023",
2307 CTLFLAG_RD, &stats->prc1023, "512-1023 byte frames received");
2308 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "rx_frames_1024_1522",
2309 CTLFLAG_RD, &stats->prc1522, "1023-1522 byte frames received");
2310 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_undersized",
2311 CTLFLAG_RD, &stats->ruc, "Receive Undersized");
2312 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_fragmented",
2313 CTLFLAG_RD, &stats->rfc, "Fragmented Packets Received ");
2314 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_oversized",
2315 CTLFLAG_RD, &stats->roc, "Oversized Packets Received");
2316 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "recv_jabberd",
2317 CTLFLAG_RD, &stats->rjc, "Received Jabber");
2318 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_rcvd",
2319 CTLFLAG_RD, &stats->mngprc, "Management Packets Received");
2320 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_drpd",
2321 CTLFLAG_RD, &stats->mngpdc, "Management Packets Dropped");
2322 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "checksum_errs",
2323 CTLFLAG_RD, &stats->xec, "Checksum Errors");
2324
2325 /* Packet Transmission Stats */
2326 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_octets_txd",
2327 CTLFLAG_RD, &stats->gotc, "Good Octets Transmitted");
2328 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "total_pkts_txd",
2329 CTLFLAG_RD, &stats->tpt, "Total Packets Transmitted");
2330 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "good_pkts_txd",
2331 CTLFLAG_RD, &stats->gptc, "Good Packets Transmitted");
2332 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "bcast_pkts_txd",
2333 CTLFLAG_RD, &stats->bptc, "Broadcast Packets Transmitted");
2334 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "mcast_pkts_txd",
2335 CTLFLAG_RD, &stats->mptc, "Multicast Packets Transmitted");
2336 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "management_pkts_txd",
2337 CTLFLAG_RD, &stats->mngptc, "Management Packets Transmitted");
2338 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_64",
2339 CTLFLAG_RD, &stats->ptc64, "64 byte frames transmitted ");
2340 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_65_127",
2341 CTLFLAG_RD, &stats->ptc127, "65-127 byte frames transmitted");
2342 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_128_255",
2343 CTLFLAG_RD, &stats->ptc255, "128-255 byte frames transmitted");
2344 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_256_511",
2345 CTLFLAG_RD, &stats->ptc511, "256-511 byte frames transmitted");
2346 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_512_1023",
2347 CTLFLAG_RD, &stats->ptc1023, "512-1023 byte frames transmitted");
2348 SYSCTL_ADD_UQUAD(ctx, stat_list, OID_AUTO, "tx_frames_1024_1522",
2349 CTLFLAG_RD, &stats->ptc1522, "1024-1522 byte frames transmitted");
2350 } /* ixgbe_add_hw_stats */
2351
2352 /************************************************************************
2353 * ixgbe_sysctl_tdh_handler - Transmit Descriptor Head handler function
2354 *
2355 * Retrieves the TDH value from the hardware
2356 ************************************************************************/
2357 static int
ixgbe_sysctl_tdh_handler(SYSCTL_HANDLER_ARGS)2358 ixgbe_sysctl_tdh_handler(SYSCTL_HANDLER_ARGS)
2359 {
2360 struct tx_ring *txr = ((struct tx_ring *)oidp->oid_arg1);
2361 int error;
2362 unsigned int val;
2363
2364 if (!txr)
2365 return (0);
2366
2367
2368 if (atomic_load_acq_int(&txr->sc->recovery_mode))
2369 return (EPERM);
2370
2371 val = IXGBE_READ_REG(&txr->sc->hw, IXGBE_TDH(txr->me));
2372 error = sysctl_handle_int(oidp, &val, 0, req);
2373 if (error || !req->newptr)
2374 return error;
2375
2376 return (0);
2377 } /* ixgbe_sysctl_tdh_handler */
2378
2379 /************************************************************************
2380 * ixgbe_sysctl_tdt_handler - Transmit Descriptor Tail handler function
2381 *
2382 * Retrieves the TDT value from the hardware
2383 ************************************************************************/
2384 static int
ixgbe_sysctl_tdt_handler(SYSCTL_HANDLER_ARGS)2385 ixgbe_sysctl_tdt_handler(SYSCTL_HANDLER_ARGS)
2386 {
2387 struct tx_ring *txr = ((struct tx_ring *)oidp->oid_arg1);
2388 int error;
2389 unsigned int val;
2390
2391 if (!txr)
2392 return (0);
2393
2394 if (atomic_load_acq_int(&txr->sc->recovery_mode))
2395 return (EPERM);
2396
2397 val = IXGBE_READ_REG(&txr->sc->hw, IXGBE_TDT(txr->me));
2398 error = sysctl_handle_int(oidp, &val, 0, req);
2399 if (error || !req->newptr)
2400 return error;
2401
2402 return (0);
2403 } /* ixgbe_sysctl_tdt_handler */
2404
2405 /************************************************************************
2406 * ixgbe_sysctl_rdh_handler - Receive Descriptor Head handler function
2407 *
2408 * Retrieves the RDH value from the hardware
2409 ************************************************************************/
2410 static int
ixgbe_sysctl_rdh_handler(SYSCTL_HANDLER_ARGS)2411 ixgbe_sysctl_rdh_handler(SYSCTL_HANDLER_ARGS)
2412 {
2413 struct rx_ring *rxr = ((struct rx_ring *)oidp->oid_arg1);
2414 int error;
2415 unsigned int val;
2416
2417 if (!rxr)
2418 return (0);
2419
2420 if (atomic_load_acq_int(&rxr->sc->recovery_mode))
2421 return (EPERM);
2422
2423 val = IXGBE_READ_REG(&rxr->sc->hw, IXGBE_RDH(rxr->me));
2424 error = sysctl_handle_int(oidp, &val, 0, req);
2425 if (error || !req->newptr)
2426 return error;
2427
2428 return (0);
2429 } /* ixgbe_sysctl_rdh_handler */
2430
2431 /************************************************************************
2432 * ixgbe_sysctl_rdt_handler - Receive Descriptor Tail handler function
2433 *
2434 * Retrieves the RDT value from the hardware
2435 ************************************************************************/
2436 static int
ixgbe_sysctl_rdt_handler(SYSCTL_HANDLER_ARGS)2437 ixgbe_sysctl_rdt_handler(SYSCTL_HANDLER_ARGS)
2438 {
2439 struct rx_ring *rxr = ((struct rx_ring *)oidp->oid_arg1);
2440 int error;
2441 unsigned int val;
2442
2443 if (!rxr)
2444 return (0);
2445
2446 if (atomic_load_acq_int(&rxr->sc->recovery_mode))
2447 return (EPERM);
2448
2449 val = IXGBE_READ_REG(&rxr->sc->hw, IXGBE_RDT(rxr->me));
2450 error = sysctl_handle_int(oidp, &val, 0, req);
2451 if (error || !req->newptr)
2452 return error;
2453
2454 return (0);
2455 } /* ixgbe_sysctl_rdt_handler */
2456
2457 /************************************************************************
2458 * ixgbe_if_vlan_register
2459 *
2460 * Run via vlan config EVENT, it enables us to use the
2461 * HW Filter table since we can get the vlan id. This
2462 * just creates the entry in the soft version of the
2463 * VFTA, init will repopulate the real table.
2464 ************************************************************************/
2465 static void
ixgbe_if_vlan_register(if_ctx_t ctx,u16 vtag)2466 ixgbe_if_vlan_register(if_ctx_t ctx, u16 vtag)
2467 {
2468 struct ixgbe_softc *sc = iflib_get_softc(ctx);
2469 bool present;
2470 u16 index;
2471 u32 mask;
2472
2473 index = (vtag >> 5) & 0x7F;
2474 mask = 1U << (vtag & 0x1F);
2475 present = (sc->shadow_vfta[index] & mask) != 0;
2476 sc->shadow_vfta[index] |= mask;
2477 if (!present)
2478 ++sc->num_vlans;
2479 #ifdef PCI_IOV
2480 if ((sc->feat_en & IXGBE_FEATURE_SRIOV) != 0 &&
2481 sc->iov_vfta_valid && !sc->iov_vlan_promisc)
2482 (void)ixgbe_set_vfta(&sc->hw, vtag, sc->pool, true, true);
2483 #endif
2484 ixgbe_setup_vlan_hw_support(ctx);
2485 } /* ixgbe_if_vlan_register */
2486
2487 /************************************************************************
2488 * ixgbe_if_vlan_unregister
2489 *
2490 * Run via vlan unconfig EVENT, remove our entry in the soft vfta.
2491 ************************************************************************/
2492 static void
ixgbe_if_vlan_unregister(if_ctx_t ctx,u16 vtag)2493 ixgbe_if_vlan_unregister(if_ctx_t ctx, u16 vtag)
2494 {
2495 struct ixgbe_softc *sc = iflib_get_softc(ctx);
2496 bool present;
2497 u16 index;
2498 u32 mask;
2499
2500 index = (vtag >> 5) & 0x7F;
2501 mask = 1U << (vtag & 0x1F);
2502 present = (sc->shadow_vfta[index] & mask) != 0;
2503 sc->shadow_vfta[index] &= ~mask;
2504 if (present)
2505 --sc->num_vlans;
2506 #ifdef PCI_IOV
2507 if ((sc->feat_en & IXGBE_FEATURE_SRIOV) != 0 &&
2508 sc->iov_vfta_valid && !sc->iov_vlan_promisc)
2509 (void)ixgbe_set_vfta(&sc->hw, vtag, sc->pool, false, true);
2510 #endif
2511 ixgbe_setup_vlan_hw_support(ctx);
2512 } /* ixgbe_if_vlan_unregister */
2513
2514 #ifdef PCI_IOV
2515 static bool
ixgbe_iov_pf_owns_vlan(const struct ixgbe_softc * sc,u16 vlan)2516 ixgbe_iov_pf_owns_vlan(const struct ixgbe_softc *sc, u16 vlan)
2517 {
2518
2519 return ((sc->shadow_vfta[vlan >> 5] &
2520 (1U << (vlan & 0x1f))) != 0);
2521 }
2522
2523 /*
2524 * start_hw clears both VFTA and VLVF. Reconstruct the shared tables from
2525 * PF and VF desired state after every reset or filtering-mode transition.
2526 * Allocate VF entries first so PF-only VLANs cannot exhaust VLVF.
2527 */
2528 static void
ixgbe_iov_vlan_rebuild(struct ixgbe_softc * sc,bool promisc)2529 ixgbe_iov_vlan_rebuild(struct ixgbe_softc *sc, bool promisc)
2530 {
2531 struct ixgbe_hw *hw;
2532 struct ixgbe_vf *vf;
2533 u32 vfta[IXGBE_VFTA_SIZE];
2534 u32 bits, vlan, vlvf;
2535 int bit, failures, i, word;
2536
2537 hw = &sc->hw;
2538 bcopy(sc->shadow_vfta, vfta, sizeof(vfta));
2539 (void)ixgbe_clear_vfta(hw);
2540 failures = 0;
2541 for (i = 0; i < sc->num_vfs; i++) {
2542 vf = &sc->vfs[i];
2543 if ((vf->flags & IXGBE_VF_ACTIVE) == 0)
2544 continue;
2545 if (vf->default_vlan == 0 &&
2546 ixgbe_set_vfta(hw, 0, vf->pool, true, false) !=
2547 IXGBE_SUCCESS)
2548 failures++;
2549 for (word = 0; word < IXGBE_VFTA_SIZE; word++) {
2550 bits = vf->vlans[word];
2551 while (bits != 0) {
2552 bit = ffs(bits) - 1;
2553 vlan = word * 32 + bit;
2554 if (ixgbe_set_vfta(hw, vlan, vf->pool, true,
2555 false) == IXGBE_SUCCESS)
2556 vfta[word] |= 1U << bit;
2557 else
2558 failures++;
2559 bits &= ~(1U << bit);
2560 }
2561 }
2562 }
2563 if (ixgbe_set_vfta(hw, 0, sc->pool, true, false) != IXGBE_SUCCESS)
2564 failures++;
2565
2566 /* Add the PF to shared entries, or every entry in promiscuous mode. */
2567 for (i = 1; i < IXGBE_VLVF_ENTRIES; i++) {
2568 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
2569 if ((vlvf & IXGBE_VLVF_VIEN) == 0)
2570 continue;
2571 vlan = vlvf & IXGBE_VLVF_VLANID_MASK;
2572 if (promisc || ixgbe_iov_pf_owns_vlan(sc, vlan))
2573 (void)ixgbe_set_vfta(hw, vlan, sc->pool, true, true);
2574 vfta[vlan >> 5] |= 1U << (vlan & 0x1f);
2575 }
2576 if (promisc)
2577 for (i = 0; i < IXGBE_VFTA_SIZE; i++)
2578 vfta[i] = UINT32_MAX;
2579 for (i = 0; i < IXGBE_VFTA_SIZE; i++)
2580 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), vfta[i]);
2581 if (failures != 0)
2582 device_printf(sc->dev,
2583 "VLAN pool restore failed for %d memberships\n", failures);
2584 }
2585
2586 static void
ixgbe_iov_vlan_sync(struct ixgbe_softc * sc,bool promisc)2587 ixgbe_iov_vlan_sync(struct ixgbe_softc *sc, bool promisc)
2588 {
2589
2590 if (sc->iov_vfta_valid && sc->iov_vlan_promisc == promisc)
2591 return;
2592 ixgbe_iov_vlan_rebuild(sc, promisc);
2593 sc->iov_vlan_promisc = promisc;
2594 sc->iov_vfta_valid = true;
2595 }
2596 #endif
2597
2598 /************************************************************************
2599 * ixgbe_setup_vlan_hw_support
2600 ************************************************************************/
2601 void
ixgbe_setup_vlan_hw_support(if_ctx_t ctx)2602 ixgbe_setup_vlan_hw_support(if_ctx_t ctx)
2603 {
2604 if_t ifp = iflib_get_ifp(ctx);
2605 struct ixgbe_softc *sc = iflib_get_softc(ctx);
2606 struct ixgbe_hw *hw = &sc->hw;
2607 struct rx_ring *rxr;
2608 bool strip;
2609 int i;
2610 u32 ctrl;
2611
2612 strip = sc->num_vlans != 0 &&
2613 (if_getcapenable(ifp) & IFCAP_VLAN_HWTAGGING) != 0;
2614 for (i = 0; i < sc->num_rx_queues; i++) {
2615 rxr = &sc->rx_queues[i].rxr;
2616 /* On 82599 and newer VLAN stripping is per receive queue. */
2617 if (hw->mac.type != ixgbe_mac_82598EB) {
2618 ctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me));
2619 if (strip)
2620 ctrl |= IXGBE_RXDCTL_VME;
2621 else
2622 ctrl &= ~IXGBE_RXDCTL_VME;
2623 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), ctrl);
2624 }
2625 rxr->vtag_strip = strip;
2626 }
2627
2628 ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
2629 if (hw->mac.type == ixgbe_mac_82598EB) {
2630 if (strip)
2631 ctrl |= IXGBE_VLNCTRL_VME;
2632 else
2633 ctrl &= ~IXGBE_VLNCTRL_VME;
2634 }
2635
2636 /* Always admit priority-tagged frames. */
2637 sc->shadow_vfta[0] |= 1U;
2638
2639 #ifdef PCI_IOV
2640 if ((sc->feat_en & IXGBE_FEATURE_SRIOV) != 0) {
2641 /*
2642 * VFE must remain enabled to enforce per-pool VLAN ownership.
2643 */
2644 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
2645 ctrl |= IXGBE_VLNCTRL_VFE;
2646 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl);
2647 ixgbe_iov_vlan_sync(sc,
2648 (if_getcapenable(ifp) & IFCAP_VLAN_HWFILTER) == 0);
2649 return;
2650 }
2651 #endif
2652
2653 if (!strip ||
2654 (if_getcapenable(ifp) & IFCAP_VLAN_HWFILTER) == 0) {
2655 ctrl |= IXGBE_VLNCTRL_CFIEN;
2656 ctrl &= ~IXGBE_VLNCTRL_VFE;
2657 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl);
2658 return;
2659 }
2660
2661 /* A soft reset clears VFTA, so restore the PF's desired bitmap. */
2662 for (i = 0; i < IXGBE_VFTA_SIZE; i++)
2663 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), sc->shadow_vfta[i]);
2664 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
2665 ctrl |= IXGBE_VLNCTRL_VFE;
2666 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl);
2667 } /* ixgbe_setup_vlan_hw_support */
2668
2669 /************************************************************************
2670 * ixgbe_get_slot_info
2671 *
2672 * Get the width and transaction speed of
2673 * the slot this adapter is plugged into.
2674 ************************************************************************/
2675 static void
ixgbe_get_slot_info(struct ixgbe_softc * sc)2676 ixgbe_get_slot_info(struct ixgbe_softc *sc)
2677 {
2678 device_t dev = iflib_get_dev(sc->ctx);
2679 struct ixgbe_hw *hw = &sc->hw;
2680 int bus_info_valid = true;
2681 u32 offset;
2682 u16 link;
2683
2684 /* Some devices are behind an internal bridge */
2685 switch (hw->device_id) {
2686 case IXGBE_DEV_ID_82599_SFP_SF_QP:
2687 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
2688 goto get_parent_info;
2689 default:
2690 break;
2691 }
2692
2693 ixgbe_get_bus_info(hw);
2694
2695 /*
2696 * Some devices don't use PCI-E, but there is no need
2697 * to display "Unknown" for bus speed and width.
2698 */
2699 switch (hw->mac.type) {
2700 case ixgbe_mac_X550EM_x:
2701 case ixgbe_mac_X550EM_a:
2702 return;
2703 default:
2704 goto display;
2705 }
2706
2707 get_parent_info:
2708 /*
2709 * For the Quad port adapter we need to parse back
2710 * up the PCI tree to find the speed of the expansion
2711 * slot into which this adapter is plugged. A bit more work.
2712 */
2713 dev = device_get_parent(device_get_parent(dev));
2714 #ifdef IXGBE_DEBUG
2715 device_printf(dev, "parent pcib = %x,%x,%x\n", pci_get_bus(dev),
2716 pci_get_slot(dev), pci_get_function(dev));
2717 #endif
2718 dev = device_get_parent(device_get_parent(dev));
2719 #ifdef IXGBE_DEBUG
2720 device_printf(dev, "slot pcib = %x,%x,%x\n", pci_get_bus(dev),
2721 pci_get_slot(dev), pci_get_function(dev));
2722 #endif
2723 /* Now get the PCI Express Capabilities offset */
2724 if (pci_find_cap(dev, PCIY_EXPRESS, &offset)) {
2725 /*
2726 * Hmm...can't get PCI-Express capabilities.
2727 * Falling back to default method.
2728 */
2729 bus_info_valid = false;
2730 ixgbe_get_bus_info(hw);
2731 goto display;
2732 }
2733 /* ...and read the Link Status Register */
2734 link = pci_read_config(dev, offset + PCIER_LINK_STA, 2);
2735 ixgbe_set_pci_config_data_generic(hw, link);
2736
2737 display:
2738 device_printf(dev, "PCI Express Bus: Speed %s Width %s\n",
2739 ((hw->bus.speed == ixgbe_bus_speed_16000) ? "16.0GT/s" :
2740 (hw->bus.speed == ixgbe_bus_speed_8000) ? "8.0GT/s" :
2741 (hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0GT/s" :
2742 (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5GT/s" :
2743 "Unknown"),
2744 ((hw->bus.width == ixgbe_bus_width_pcie_x8) ? "x8" :
2745 (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "x4" :
2746 (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "x1" :
2747 "Unknown"));
2748
2749 if (bus_info_valid) {
2750 if ((hw->device_id != IXGBE_DEV_ID_82599_SFP_SF_QP) &&
2751 ((hw->bus.width <= ixgbe_bus_width_pcie_x4) &&
2752 (hw->bus.speed == ixgbe_bus_speed_2500))) {
2753 device_printf(dev,
2754 "PCI-Express bandwidth available for this card"
2755 " is not sufficient for optimal performance.\n");
2756 device_printf(dev,
2757 "For optimal performance a x8 PCIE, or x4 PCIE"
2758 " Gen2 slot is required.\n");
2759 }
2760 if ((hw->device_id == IXGBE_DEV_ID_82599_SFP_SF_QP) &&
2761 ((hw->bus.width <= ixgbe_bus_width_pcie_x8) &&
2762 (hw->bus.speed < ixgbe_bus_speed_8000))) {
2763 device_printf(dev,
2764 "PCI-Express bandwidth available for this card"
2765 " is not sufficient for optimal performance.\n");
2766 device_printf(dev,
2767 "For optimal performance a x8 PCIE Gen3 slot is"
2768 " required.\n");
2769 }
2770 } else
2771 device_printf(dev,
2772 "Unable to determine slot speed/width. The speed/width"
2773 " reported are that of the internal switch.\n");
2774
2775 return;
2776 } /* ixgbe_get_slot_info */
2777
2778 /************************************************************************
2779 * ixgbe_if_msix_intr_assign
2780 *
2781 * Setup MSI-X Interrupt resources and handlers
2782 ************************************************************************/
2783 static int
ixgbe_if_msix_intr_assign(if_ctx_t ctx,int msix)2784 ixgbe_if_msix_intr_assign(if_ctx_t ctx, int msix)
2785 {
2786 struct ixgbe_softc *sc = iflib_get_softc(ctx);
2787 struct ix_rx_queue *rx_que = sc->rx_queues;
2788 struct ix_tx_queue *tx_que;
2789 int error, rid, vector = 0;
2790 char buf[16];
2791
2792 /* Admin Que is vector 0*/
2793 rid = vector + 1;
2794 for (int i = 0; i < sc->num_rx_queues; i++, vector++, rx_que++) {
2795 rid = vector + 1;
2796
2797 snprintf(buf, sizeof(buf), "rxq%d", i);
2798 error = iflib_irq_alloc_generic(ctx, &rx_que->que_irq, rid,
2799 IFLIB_INTR_RXTX, ixgbe_msix_que, rx_que, rx_que->rxr.me,
2800 buf);
2801
2802 if (error) {
2803 device_printf(iflib_get_dev(ctx),
2804 "Failed to allocate que int %d err: %d",
2805 i,error);
2806 sc->num_rx_queues = i + 1;
2807 goto fail;
2808 }
2809
2810 rx_que->msix = vector;
2811 }
2812 for (int i = 0; i < sc->num_tx_queues; i++) {
2813 snprintf(buf, sizeof(buf), "txq%d", i);
2814 tx_que = &sc->tx_queues[i];
2815 tx_que->msix = i % sc->num_rx_queues;
2816 iflib_softirq_alloc_generic(ctx,
2817 &sc->rx_queues[tx_que->msix].que_irq,
2818 IFLIB_INTR_TX, tx_que, tx_que->txr.me, buf);
2819 }
2820 rid = vector + 1;
2821 error = iflib_irq_alloc_generic(ctx, &sc->irq, rid,
2822 IFLIB_INTR_ADMIN, ixgbe_msix_link, sc, 0, "aq");
2823 if (error) {
2824 device_printf(iflib_get_dev(ctx),
2825 "Failed to register admin handler");
2826 return (error);
2827 }
2828
2829 sc->vector = vector;
2830
2831 return (0);
2832 fail:
2833 iflib_irq_free(ctx, &sc->irq);
2834 rx_que = sc->rx_queues;
2835 for (int i = 0; i < sc->num_rx_queues; i++, rx_que++)
2836 iflib_irq_free(ctx, &rx_que->que_irq);
2837
2838 return (error);
2839 } /* ixgbe_if_msix_intr_assign */
2840
2841 static inline void
ixgbe_perform_aim(struct ixgbe_softc * sc,struct ix_rx_queue * que)2842 ixgbe_perform_aim(struct ixgbe_softc *sc, struct ix_rx_queue *que)
2843 {
2844 uint32_t newitr = 0;
2845 struct rx_ring *rxr = &que->rxr;
2846 /* FIXME struct tx_ring *txr = ... ->txr; */
2847
2848 /*
2849 * Do Adaptive Interrupt Moderation:
2850 * - Write out last calculated setting
2851 * - Calculate based on average size over
2852 * the last interval.
2853 */
2854 if (que->eitr_setting) {
2855 IXGBE_WRITE_REG(&sc->hw, IXGBE_EITR(que->msix),
2856 que->eitr_setting);
2857 }
2858
2859 que->eitr_setting = 0;
2860 /* Idle, do nothing */
2861 if (rxr->bytes == 0) {
2862 /* FIXME && txr->bytes == 0 */
2863 return;
2864 }
2865
2866 if ((rxr->bytes) && (rxr->packets))
2867 newitr = rxr->bytes / rxr->packets;
2868 /* FIXME for transmit accounting
2869 * if ((txr->bytes) && (txr->packets))
2870 * newitr = txr->bytes/txr->packets;
2871 * if ((rxr->bytes) && (rxr->packets))
2872 * newitr = max(newitr, (rxr->bytes / rxr->packets));
2873 */
2874
2875 newitr += 24; /* account for hardware frame, crc */
2876 /* set an upper boundary */
2877 newitr = min(newitr, 3000);
2878
2879 /* Be nice to the mid range */
2880 if ((newitr > 300) && (newitr < 1200)) {
2881 newitr = (newitr / 3);
2882 } else {
2883 newitr = (newitr / 2);
2884 }
2885
2886 if (sc->hw.mac.type == ixgbe_mac_82598EB) {
2887 newitr |= newitr << 16;
2888 } else {
2889 newitr |= IXGBE_EITR_CNT_WDIS;
2890 }
2891
2892 /* save for next interrupt */
2893 que->eitr_setting = newitr;
2894
2895 /* Reset state */
2896 /* FIXME txr->bytes = 0; */
2897 /* FIXME txr->packets = 0; */
2898 rxr->bytes = 0;
2899 rxr->packets = 0;
2900
2901 return;
2902 }
2903
2904 /*********************************************************************
2905 * ixgbe_msix_que - MSI-X Queue Interrupt Service routine
2906 **********************************************************************/
2907 static int
ixgbe_msix_que(void * arg)2908 ixgbe_msix_que(void *arg)
2909 {
2910 struct ix_rx_queue *que = arg;
2911 struct ixgbe_softc *sc = que->sc;
2912 if_t ifp = iflib_get_ifp(que->sc->ctx);
2913
2914 /* Protect against spurious interrupts */
2915 if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0)
2916 return (FILTER_HANDLED);
2917
2918 ixgbe_disable_queue(sc, que->msix);
2919 ++que->irqs;
2920
2921 /* Check for AIM */
2922 if (sc->enable_aim) {
2923 ixgbe_perform_aim(sc, que);
2924 }
2925
2926 return (FILTER_SCHEDULE_THREAD);
2927 } /* ixgbe_msix_que */
2928
2929 /************************************************************************
2930 * ixgbe_media_status - Media Ioctl callback
2931 *
2932 * Called whenever the user queries the status of
2933 * the interface using ifconfig.
2934 ************************************************************************/
2935 static void
ixgbe_if_media_status(if_ctx_t ctx,struct ifmediareq * ifmr)2936 ixgbe_if_media_status(if_ctx_t ctx, struct ifmediareq * ifmr)
2937 {
2938 struct ixgbe_softc *sc = iflib_get_softc(ctx);
2939 struct ixgbe_hw *hw = &sc->hw;
2940 int layer;
2941
2942 INIT_DEBUGOUT("ixgbe_if_media_status: begin");
2943
2944 ifmr->ifm_status = IFM_AVALID;
2945 ifmr->ifm_active = IFM_ETHER;
2946
2947 if (!sc->link_active)
2948 return;
2949
2950 ifmr->ifm_status |= IFM_ACTIVE;
2951 layer = sc->phy_layer;
2952
2953 if (layer & IXGBE_PHYSICAL_LAYERS_BASE_T_ALL)
2954 switch (sc->link_speed) {
2955 case IXGBE_LINK_SPEED_10GB_FULL:
2956 ifmr->ifm_active |= IFM_10G_T | IFM_FDX;
2957 break;
2958 case IXGBE_LINK_SPEED_5GB_FULL:
2959 ifmr->ifm_active |= IFM_5000_T | IFM_FDX;
2960 break;
2961 case IXGBE_LINK_SPEED_2_5GB_FULL:
2962 ifmr->ifm_active |= IFM_2500_T | IFM_FDX;
2963 break;
2964 case IXGBE_LINK_SPEED_1GB_FULL:
2965 ifmr->ifm_active |= IFM_1000_T | IFM_FDX;
2966 break;
2967 case IXGBE_LINK_SPEED_100_FULL:
2968 ifmr->ifm_active |= IFM_100_TX | IFM_FDX;
2969 break;
2970 case IXGBE_LINK_SPEED_10_FULL:
2971 ifmr->ifm_active |= IFM_10_T | IFM_FDX;
2972 break;
2973 }
2974 if (layer & IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU ||
2975 layer & IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA)
2976 switch (sc->link_speed) {
2977 case IXGBE_LINK_SPEED_10GB_FULL:
2978 ifmr->ifm_active |= IFM_10G_TWINAX | IFM_FDX;
2979 break;
2980 case IXGBE_LINK_SPEED_1GB_FULL:
2981 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX;
2982 break;
2983 }
2984 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LR)
2985 switch (sc->link_speed) {
2986 case IXGBE_LINK_SPEED_10GB_FULL:
2987 ifmr->ifm_active |= IFM_10G_LR | IFM_FDX;
2988 break;
2989 case IXGBE_LINK_SPEED_1GB_FULL:
2990 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX;
2991 break;
2992 }
2993 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_BX &&
2994 sc->link_speed == IXGBE_LINK_SPEED_10GB_FULL)
2995 ifmr->ifm_active |= IFM_10G_BX | IFM_FDX;
2996 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_LRM)
2997 switch (sc->link_speed) {
2998 case IXGBE_LINK_SPEED_10GB_FULL:
2999 ifmr->ifm_active |= IFM_10G_LRM | IFM_FDX;
3000 break;
3001 case IXGBE_LINK_SPEED_1GB_FULL:
3002 ifmr->ifm_active |= IFM_1000_LX | IFM_FDX;
3003 break;
3004 }
3005 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_SR ||
3006 layer & IXGBE_PHYSICAL_LAYER_1000BASE_SX)
3007 switch (sc->link_speed) {
3008 case IXGBE_LINK_SPEED_10GB_FULL:
3009 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX;
3010 break;
3011 case IXGBE_LINK_SPEED_1GB_FULL:
3012 ifmr->ifm_active |= IFM_1000_SX | IFM_FDX;
3013 break;
3014 }
3015 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_CX4)
3016 switch (sc->link_speed) {
3017 case IXGBE_LINK_SPEED_10GB_FULL:
3018 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX;
3019 break;
3020 }
3021 /*
3022 * XXX: These need to use the proper media types once
3023 * they're added.
3024 */
3025 #ifndef IFM_ETH_XTYPE
3026 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR)
3027 switch (sc->link_speed) {
3028 case IXGBE_LINK_SPEED_10GB_FULL:
3029 ifmr->ifm_active |= IFM_10G_SR | IFM_FDX;
3030 break;
3031 case IXGBE_LINK_SPEED_2_5GB_FULL:
3032 ifmr->ifm_active |= IFM_2500_SX | IFM_FDX;
3033 break;
3034 case IXGBE_LINK_SPEED_1GB_FULL:
3035 ifmr->ifm_active |= IFM_1000_CX | IFM_FDX;
3036 break;
3037 }
3038 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 ||
3039 layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX ||
3040 layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX)
3041 switch (sc->link_speed) {
3042 case IXGBE_LINK_SPEED_10GB_FULL:
3043 ifmr->ifm_active |= IFM_10G_CX4 | IFM_FDX;
3044 break;
3045 case IXGBE_LINK_SPEED_2_5GB_FULL:
3046 ifmr->ifm_active |= IFM_2500_SX | IFM_FDX;
3047 break;
3048 case IXGBE_LINK_SPEED_1GB_FULL:
3049 ifmr->ifm_active |= IFM_1000_CX | IFM_FDX;
3050 break;
3051 }
3052 #else
3053 if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KR)
3054 switch (sc->link_speed) {
3055 case IXGBE_LINK_SPEED_10GB_FULL:
3056 ifmr->ifm_active |= IFM_10G_KR | IFM_FDX;
3057 break;
3058 case IXGBE_LINK_SPEED_2_5GB_FULL:
3059 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX;
3060 break;
3061 case IXGBE_LINK_SPEED_1GB_FULL:
3062 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX;
3063 break;
3064 }
3065 else if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_KX4 ||
3066 layer & IXGBE_PHYSICAL_LAYER_2500BASE_KX ||
3067 layer & IXGBE_PHYSICAL_LAYER_1000BASE_KX)
3068 switch (sc->link_speed) {
3069 case IXGBE_LINK_SPEED_10GB_FULL:
3070 ifmr->ifm_active |= IFM_10G_KX4 | IFM_FDX;
3071 break;
3072 case IXGBE_LINK_SPEED_2_5GB_FULL:
3073 ifmr->ifm_active |= IFM_2500_KX | IFM_FDX;
3074 break;
3075 case IXGBE_LINK_SPEED_1GB_FULL:
3076 ifmr->ifm_active |= IFM_1000_KX | IFM_FDX;
3077 break;
3078 }
3079 #endif
3080
3081 /* If nothing is recognized... */
3082 if (IFM_SUBTYPE(ifmr->ifm_active) == 0)
3083 ifmr->ifm_active |= IFM_UNKNOWN;
3084
3085 /* Display current flow control setting used on link */
3086 if (hw->fc.current_mode == ixgbe_fc_rx_pause ||
3087 hw->fc.current_mode == ixgbe_fc_full)
3088 ifmr->ifm_active |= IFM_ETH_RXPAUSE;
3089 if (hw->fc.current_mode == ixgbe_fc_tx_pause ||
3090 hw->fc.current_mode == ixgbe_fc_full)
3091 ifmr->ifm_active |= IFM_ETH_TXPAUSE;
3092 } /* ixgbe_media_status */
3093
3094 /************************************************************************
3095 * ixgbe_media_change - Media Ioctl callback
3096 *
3097 * Called when the user changes speed/duplex using
3098 * media/mediopt option with ifconfig.
3099 ************************************************************************/
3100 static int
ixgbe_if_media_change(if_ctx_t ctx)3101 ixgbe_if_media_change(if_ctx_t ctx)
3102 {
3103 struct ixgbe_softc *sc = iflib_get_softc(ctx);
3104 struct ifmedia *ifm = iflib_get_media(ctx);
3105 struct ixgbe_hw *hw = &sc->hw;
3106 ixgbe_link_speed speed = 0;
3107
3108 INIT_DEBUGOUT("ixgbe_if_media_change: begin");
3109
3110 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
3111 return (EINVAL);
3112
3113 if (hw->phy.media_type == ixgbe_media_type_backplane)
3114 return (EPERM);
3115
3116 /*
3117 * We don't actually need to check against the supported
3118 * media types of the adapter; ifmedia will take care of
3119 * that for us.
3120 */
3121 switch (IFM_SUBTYPE(ifm->ifm_media)) {
3122 case IFM_AUTO:
3123 case IFM_10G_T:
3124 speed |= IXGBE_LINK_SPEED_100_FULL;
3125 speed |= IXGBE_LINK_SPEED_1GB_FULL;
3126 speed |= IXGBE_LINK_SPEED_10GB_FULL;
3127 break;
3128 case IFM_10G_BX:
3129 speed |= IXGBE_LINK_SPEED_10GB_FULL;
3130 break;
3131 case IFM_10G_LRM:
3132 case IFM_10G_LR:
3133 #ifndef IFM_ETH_XTYPE
3134 case IFM_10G_SR: /* KR, too */
3135 case IFM_10G_CX4: /* KX4 */
3136 #else
3137 case IFM_10G_KR:
3138 case IFM_10G_KX4:
3139 #endif
3140 speed |= IXGBE_LINK_SPEED_1GB_FULL;
3141 speed |= IXGBE_LINK_SPEED_10GB_FULL;
3142 break;
3143 #ifndef IFM_ETH_XTYPE
3144 case IFM_1000_CX: /* KX */
3145 #else
3146 case IFM_1000_KX:
3147 #endif
3148 case IFM_1000_LX:
3149 case IFM_1000_SX:
3150 case IFM_1000_BX:
3151 speed |= IXGBE_LINK_SPEED_1GB_FULL;
3152 break;
3153 case IFM_1000_T:
3154 speed |= IXGBE_LINK_SPEED_100_FULL;
3155 speed |= IXGBE_LINK_SPEED_1GB_FULL;
3156 break;
3157 case IFM_10G_TWINAX:
3158 speed |= IXGBE_LINK_SPEED_10GB_FULL;
3159 break;
3160 case IFM_5000_T:
3161 speed |= IXGBE_LINK_SPEED_5GB_FULL;
3162 break;
3163 case IFM_2500_T:
3164 speed |= IXGBE_LINK_SPEED_2_5GB_FULL;
3165 break;
3166 case IFM_100_TX:
3167 speed |= IXGBE_LINK_SPEED_100_FULL;
3168 break;
3169 case IFM_10_T:
3170 speed |= IXGBE_LINK_SPEED_10_FULL;
3171 break;
3172 default:
3173 goto invalid;
3174 }
3175
3176 hw->mac.autotry_restart = true;
3177 hw->mac.ops.setup_link(hw, speed, true);
3178 sc->advertise =
3179 ((speed & IXGBE_LINK_SPEED_10GB_FULL) ? 0x4 : 0) |
3180 ((speed & IXGBE_LINK_SPEED_5GB_FULL) ? 0x20 : 0) |
3181 ((speed & IXGBE_LINK_SPEED_2_5GB_FULL) ? 0x10 : 0) |
3182 ((speed & IXGBE_LINK_SPEED_1GB_FULL) ? 0x2 : 0) |
3183 ((speed & IXGBE_LINK_SPEED_100_FULL) ? 0x1 : 0) |
3184 ((speed & IXGBE_LINK_SPEED_10_FULL) ? 0x8 : 0);
3185
3186 return (0);
3187
3188 invalid:
3189 device_printf(iflib_get_dev(ctx), "Invalid media type!\n");
3190
3191 return (EINVAL);
3192 } /* ixgbe_if_media_change */
3193
3194 /************************************************************************
3195 * ixgbe_set_promisc
3196 ************************************************************************/
3197 static int
ixgbe_if_promisc_set(if_ctx_t ctx,int flags)3198 ixgbe_if_promisc_set(if_ctx_t ctx, int flags)
3199 {
3200 struct ixgbe_softc *sc = iflib_get_softc(ctx);
3201 if_t ifp = iflib_get_ifp(ctx);
3202 u32 rctl;
3203 int mcnt = 0;
3204
3205 rctl = IXGBE_READ_REG(&sc->hw, IXGBE_FCTRL);
3206 rctl &= (~IXGBE_FCTRL_UPE);
3207 if (if_getflags(ifp) & IFF_ALLMULTI)
3208 mcnt = MAX_NUM_MULTICAST_ADDRESSES;
3209 else {
3210 mcnt = min(if_llmaddr_count(ifp),
3211 MAX_NUM_MULTICAST_ADDRESSES);
3212 }
3213 if (mcnt < MAX_NUM_MULTICAST_ADDRESSES)
3214 rctl &= (~IXGBE_FCTRL_MPE);
3215 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, rctl);
3216
3217 if (if_getflags(ifp) & IFF_PROMISC) {
3218 rctl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
3219 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, rctl);
3220 } else if (if_getflags(ifp) & IFF_ALLMULTI) {
3221 rctl |= IXGBE_FCTRL_MPE;
3222 rctl &= ~IXGBE_FCTRL_UPE;
3223 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, rctl);
3224 }
3225 return (0);
3226 } /* ixgbe_if_promisc_set */
3227
3228 /************************************************************************
3229 * ixgbe_handle_ecc - Defer recovery from an ECC interrupt
3230 ************************************************************************/
3231 static bool
ixgbe_handle_ecc(struct ixgbe_softc * sc,u32 eicr)3232 ixgbe_handle_ecc(struct ixgbe_softc *sc, u32 eicr)
3233 {
3234 struct ixgbe_hw *hw = &sc->hw;
3235
3236 if ((eicr & IXGBE_EICR_ECC) == 0)
3237 return (false);
3238
3239 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_ECC);
3240 if (!atomic_cmpset_int(&sc->ecc_reset_pending, 0, 1))
3241 return (false);
3242
3243 device_printf(sc->dev, "Received ECC Err, initiating reset\n");
3244 return (true);
3245 }
3246
3247 /************************************************************************
3248 * ixgbe_msix_link - Link status change ISR (MSI/MSI-X)
3249 ************************************************************************/
3250 static int
ixgbe_msix_link(void * arg)3251 ixgbe_msix_link(void *arg)
3252 {
3253 struct ixgbe_softc *sc = arg;
3254 struct ixgbe_hw *hw = &sc->hw;
3255 u32 eicr, eicr_mask;
3256 s32 retval;
3257
3258 ++sc->link_irq;
3259
3260 /* Pause other interrupts */
3261 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_OTHER);
3262
3263 /* First get the cause */
3264 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
3265 /* Be sure the queue bits are not cleared */
3266 eicr &= ~IXGBE_EICR_RTX_QUEUE;
3267 /* Clear interrupt with write */
3268 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
3269
3270 /* Link status change */
3271 if (eicr & IXGBE_EICR_LSC) {
3272 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
3273 atomic_set_32(&sc->task_requests, IXGBE_REQUEST_TASK_LSC);
3274 }
3275
3276 if (eicr & IXGBE_EICR_FW_EVENT) {
3277 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EICR_FW_EVENT);
3278 atomic_set_32(&sc->task_requests, IXGBE_REQUEST_TASK_FWEVENT);
3279 }
3280
3281 if (sc->hw.mac.type != ixgbe_mac_82598EB) {
3282 if ((sc->feat_en & IXGBE_FEATURE_FDIR) &&
3283 (eicr & IXGBE_EICR_FLOW_DIR)) {
3284 /* This is probably overkill :) */
3285 if (atomic_cmpset_int(&sc->fdir_reinit, 0, 1)) {
3286 /* Disable the interrupt */
3287 IXGBE_WRITE_REG(hw, IXGBE_EIMC,
3288 IXGBE_EICR_FLOW_DIR);
3289 atomic_set_32(&sc->task_requests,
3290 IXGBE_REQUEST_TASK_FDIR);
3291 }
3292 }
3293 if (ixgbe_handle_ecc(sc, eicr))
3294 atomic_set_32(&sc->task_requests,
3295 IXGBE_REQUEST_TASK_RESET);
3296
3297 /* Check for over temp condition */
3298 if (sc->feat_en & IXGBE_FEATURE_TEMP_SENSOR) {
3299 switch (sc->hw.mac.type) {
3300 case ixgbe_mac_X550EM_a:
3301 if (!(eicr & IXGBE_EICR_GPI_SDP0_X550EM_a))
3302 break;
3303 IXGBE_WRITE_REG(hw, IXGBE_EIMC,
3304 IXGBE_EICR_GPI_SDP0_X550EM_a);
3305 IXGBE_WRITE_REG(hw, IXGBE_EICR,
3306 IXGBE_EICR_GPI_SDP0_X550EM_a);
3307 retval = hw->phy.ops.check_overtemp(hw);
3308 if (retval != IXGBE_ERR_OVERTEMP)
3309 break;
3310 device_printf(iflib_get_dev(sc->ctx),
3311 "\nCRITICAL: OVER TEMP!!"
3312 " PHY IS SHUT DOWN!!\n");
3313 device_printf(iflib_get_dev(sc->ctx),
3314 "System shutdown required!\n");
3315 break;
3316 default:
3317 if (!(eicr & IXGBE_EICR_TS))
3318 break;
3319 retval = hw->phy.ops.check_overtemp(hw);
3320 if (retval != IXGBE_ERR_OVERTEMP)
3321 break;
3322 device_printf(iflib_get_dev(sc->ctx),
3323 "\nCRITICAL: OVER TEMP!!"
3324 " PHY IS SHUT DOWN!!\n");
3325 device_printf(iflib_get_dev(sc->ctx),
3326 "System shutdown required!\n");
3327 IXGBE_WRITE_REG(hw, IXGBE_EICR,
3328 IXGBE_EICR_TS);
3329 break;
3330 }
3331 }
3332
3333 /* Check for VF message */
3334 if ((sc->feat_en & IXGBE_FEATURE_SRIOV) &&
3335 (eicr & IXGBE_EICR_MAILBOX)) {
3336 atomic_set_32(&sc->task_requests, IXGBE_REQUEST_TASK_MBX);
3337 }
3338 }
3339
3340 /*
3341 * On E610, the firmware handles PHY configuration, so
3342 * there is no need to perform any SFP-specific tasks.
3343 */
3344 if (hw->mac.type != ixgbe_mac_E610 && ixgbe_is_sfp(hw)) {
3345 /* Pluggable optics-related interrupt */
3346 if (hw->mac.type >= ixgbe_mac_X540)
3347 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
3348 else
3349 eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw);
3350
3351 if (eicr & eicr_mask) {
3352 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
3353 atomic_set_32(&sc->task_requests, IXGBE_REQUEST_TASK_MOD);
3354 }
3355
3356 if ((hw->mac.type == ixgbe_mac_82599EB) &&
3357 (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) {
3358 IXGBE_WRITE_REG(hw, IXGBE_EICR,
3359 IXGBE_EICR_GPI_SDP1_BY_MAC(hw));
3360 atomic_set_32(&sc->task_requests, IXGBE_REQUEST_TASK_MSF);
3361 }
3362 }
3363
3364 /* Check for fan failure */
3365 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL) {
3366 ixgbe_check_fan_failure(sc, eicr, true);
3367 IXGBE_WRITE_REG(hw, IXGBE_EICR,
3368 IXGBE_EICR_GPI_SDP1_BY_MAC(hw));
3369 }
3370
3371 /* External PHY interrupt */
3372 if ((hw->phy.type == ixgbe_phy_x550em_ext_t) &&
3373 (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
3374 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP0_X540);
3375 atomic_set_32(&sc->task_requests, IXGBE_REQUEST_TASK_PHY);
3376 }
3377
3378 return (atomic_load_acq_32(&sc->task_requests) != 0) ?
3379 FILTER_SCHEDULE_THREAD : FILTER_HANDLED;
3380 } /* ixgbe_msix_link */
3381
3382 /************************************************************************
3383 * ixgbe_sysctl_interrupt_rate_handler
3384 ************************************************************************/
3385 static int
ixgbe_sysctl_interrupt_rate_handler(SYSCTL_HANDLER_ARGS)3386 ixgbe_sysctl_interrupt_rate_handler(SYSCTL_HANDLER_ARGS)
3387 {
3388 struct ix_rx_queue *que = ((struct ix_rx_queue *)oidp->oid_arg1);
3389 int error;
3390 unsigned int reg, usec, rate;
3391
3392 if (atomic_load_acq_int(&que->sc->recovery_mode))
3393 return (EPERM);
3394
3395 reg = IXGBE_READ_REG(&que->sc->hw, IXGBE_EITR(que->msix));
3396 usec = ((reg & 0x0FF8) >> 3);
3397 if (usec > 0)
3398 rate = 500000 / usec;
3399 else
3400 rate = 0;
3401 error = sysctl_handle_int(oidp, &rate, 0, req);
3402 if (error || !req->newptr)
3403 return error;
3404 reg &= ~0xfff; /* default, no limitation */
3405 ixgbe_max_interrupt_rate = 0;
3406 if (rate > 0 && rate < 500000) {
3407 if (rate < 1000)
3408 rate = 1000;
3409 ixgbe_max_interrupt_rate = rate;
3410 reg |= ((4000000/rate) & 0xff8);
3411 }
3412 IXGBE_WRITE_REG(&que->sc->hw, IXGBE_EITR(que->msix), reg);
3413
3414 return (0);
3415 } /* ixgbe_sysctl_interrupt_rate_handler */
3416
3417 /************************************************************************
3418 * ixgbe_debug_dump_print_cluster
3419 ************************************************************************/
3420 static u8
ixgbe_debug_dump_print_cluster(struct ixgbe_softc * sc,struct sbuf * sbuf,u8 cluster_id)3421 ixgbe_debug_dump_print_cluster(struct ixgbe_softc *sc, struct sbuf *sbuf,
3422 u8 cluster_id)
3423 {
3424 u16 data_buf_size = IXGBE_ACI_MAX_BUFFER_SIZE;
3425 device_t dev = sc->dev;
3426 struct ixgbe_hw *hw = &sc->hw;
3427 const u8 reserved_buf[8] = {};
3428 int max_aci_calls = 1000;
3429 int error, counter = 0;
3430 u8 *data_buf;
3431
3432 /* Input parameters / loop variables */
3433 u16 table_id = 0;
3434 u32 offset = 0;
3435
3436 /* Data returned from ACI command */
3437 u16 ret_buf_size = 0;
3438 u16 ret_next_cluster = 0;
3439 u16 ret_next_table = 0;
3440 u32 ret_next_index = 0;
3441
3442 data_buf = (u8 *)malloc(data_buf_size, M_IXGBE, M_NOWAIT | M_ZERO);
3443 if (!data_buf)
3444 return (0);
3445
3446 DEBUGOUT2("%s: dumping cluster id (relative) %d\n",
3447 __func__, cluster_id);
3448
3449 do {
3450 DEBUGOUT3("table_id 0x%04x offset 0x%08x buf_size %d\n",
3451 table_id, offset, data_buf_size);
3452
3453 error = ixgbe_aci_get_internal_data(hw, cluster_id, table_id,
3454 offset, data_buf, data_buf_size, &ret_buf_size,
3455 &ret_next_cluster, &ret_next_table, &ret_next_index);
3456 if (error) {
3457 device_printf(dev,
3458 "%s: Failed to get internal FW/HW data, error: %d, "
3459 "last aci status: %d\n",
3460 __func__, error, hw->aci.last_status);
3461 break;
3462 }
3463
3464 DEBUGOUT3("ret_table_id 0x%04x ret_offset 0x%08x "
3465 "ret_buf_size %d\n",
3466 ret_next_table, ret_next_index, ret_buf_size);
3467
3468 /* Print cluster id */
3469 u32 print_cluster_id = (u32)cluster_id;
3470 sbuf_bcat(sbuf, &print_cluster_id, sizeof(print_cluster_id));
3471 /* Print table id */
3472 u32 print_table_id = (u32)table_id;
3473 sbuf_bcat(sbuf, &print_table_id, sizeof(print_table_id));
3474 /* Print table length */
3475 u32 print_table_length = (u32)ret_buf_size;
3476 sbuf_bcat(sbuf, &print_table_length,
3477 sizeof(print_table_length));
3478 /* Print current offset */
3479 u32 print_curr_offset = offset;
3480 sbuf_bcat(sbuf, &print_curr_offset, sizeof(print_curr_offset));
3481 /* Print reserved bytes */
3482 sbuf_bcat(sbuf, reserved_buf, sizeof(reserved_buf));
3483 /* Print data */
3484 sbuf_bcat(sbuf, data_buf, ret_buf_size);
3485
3486 /* Prepare for the next loop spin */
3487 memset(data_buf, 0, data_buf_size);
3488
3489 bool last_index = (ret_next_index == 0xffffffff);
3490 bool last_table = ((ret_next_table == 0xff ||
3491 ret_next_table == 0xffff) &&
3492 last_index);
3493
3494 if (last_table) {
3495 /* End of the cluster */
3496 DEBUGOUT1("End of the cluster ID %d\n", cluster_id);
3497 break;
3498 } else if (last_index) {
3499 /* End of the table */
3500 table_id = ret_next_table;
3501 offset = 0;
3502 } else {
3503 /* More data left in the table */
3504 offset = ret_next_index;
3505 }
3506 } while (++counter < max_aci_calls);
3507
3508 if (counter >= max_aci_calls)
3509 device_printf(dev, "Exceeded nr of ACI calls for cluster %d\n",
3510 cluster_id);
3511
3512 free(data_buf, M_IXGBE);
3513
3514 return (++cluster_id);
3515 } /* ixgbe_print_debug_dump_cluster */
3516
3517 /************************************************************************
3518 * ixgbe_sysctl_debug_dump_set_clusters
3519 *
3520 * Sets the cluster to dump from FW when Debug Dump requested.
3521 ************************************************************************/
3522 static int
ixgbe_sysctl_debug_dump_set_clusters(SYSCTL_HANDLER_ARGS)3523 ixgbe_sysctl_debug_dump_set_clusters(SYSCTL_HANDLER_ARGS)
3524 {
3525 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1;
3526 u32 clusters = sc->debug_dump_cluster_mask;
3527 device_t dev = sc->dev;
3528 int error;
3529
3530 error = sysctl_handle_32(oidp, &clusters, 0, req);
3531 if ((error) || !req->newptr)
3532 return (error);
3533
3534 if (clusters & ~(IXGBE_DBG_DUMP_VALID_CLUSTERS_MASK)) {
3535 device_printf(dev,
3536 "%s: Unrecognized parameter: %u\n",
3537 __func__, clusters);
3538 sc->debug_dump_cluster_mask =
3539 IXGBE_ACI_DBG_DUMP_CLUSTER_ID_INVALID;
3540 return (EINVAL);
3541 }
3542
3543 sc->debug_dump_cluster_mask = clusters;
3544
3545 return (0);
3546 } /* ixgbe_sysctl_debug_dump_set_clusters */
3547
3548 /************************************************************************
3549 * ixgbe_sysctl_dump_debug_dump
3550 ************************************************************************/
3551 static int
ixgbe_sysctl_dump_debug_dump(SYSCTL_HANDLER_ARGS)3552 ixgbe_sysctl_dump_debug_dump(SYSCTL_HANDLER_ARGS)
3553 {
3554 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1;
3555 device_t dev = sc->dev;
3556 struct sbuf *sbuf;
3557 int error = 0;
3558
3559 UNREFERENCED_PARAMETER(arg2);
3560
3561 if (!sc->do_debug_dump) {
3562 if (req->oldptr == NULL && req->newptr == NULL) {
3563 error = SYSCTL_OUT(req, 0, 0);
3564 return (error);
3565 }
3566
3567 char input_buf[2] = "";
3568 error = sysctl_handle_string(oidp, input_buf,
3569 sizeof(input_buf), req);
3570 if ((error) || (req->newptr == NULL))
3571 return (error);
3572
3573 if (input_buf[0] == '1') {
3574 if (sc->debug_dump_cluster_mask ==
3575 IXGBE_ACI_DBG_DUMP_CLUSTER_ID_INVALID) {
3576 device_printf(dev,
3577 "Debug Dump failed because an invalid "
3578 "cluster was specified.\n");
3579 return (EINVAL);
3580 }
3581
3582 sc->do_debug_dump = true;
3583 return (0);
3584 }
3585
3586 return (EINVAL);
3587 }
3588
3589 /* Caller just wants the upper bound for size */
3590 if (req->oldptr == NULL && req->newptr == NULL) {
3591 size_t est_output_len = IXGBE_DBG_DUMP_BASE_SIZE;
3592 if (sc->debug_dump_cluster_mask & 0x2)
3593 est_output_len += IXGBE_DBG_DUMP_BASE_SIZE;
3594 error = SYSCTL_OUT(req, 0, est_output_len);
3595 return (error);
3596 }
3597
3598 sbuf = sbuf_new_for_sysctl(NULL, NULL, 128, req);
3599 sbuf_clear_flags(sbuf, SBUF_INCLUDENUL);
3600
3601 DEBUGOUT("FW Debug Dump running...\n");
3602
3603 if (sc->debug_dump_cluster_mask) {
3604 for (u8 id = 0; id <= IXGBE_ACI_DBG_DUMP_CLUSTER_ID_MAX; id++) {
3605 if (sc->debug_dump_cluster_mask & BIT(id)) {
3606 DEBUGOUT1("Dumping cluster ID %u...\n", id);
3607 ixgbe_debug_dump_print_cluster(sc, sbuf, id);
3608 }
3609 }
3610 } else {
3611 u8 next_cluster_id = 0;
3612 do {
3613 DEBUGOUT1("Dumping cluster ID %u...\n",
3614 next_cluster_id);
3615 next_cluster_id = ixgbe_debug_dump_print_cluster(sc,
3616 sbuf, next_cluster_id);
3617 } while (next_cluster_id != 0 &&
3618 next_cluster_id <= IXGBE_ACI_DBG_DUMP_CLUSTER_ID_MAX);
3619 }
3620
3621 sbuf_finish(sbuf);
3622 sbuf_delete(sbuf);
3623
3624 sc->do_debug_dump = false;
3625
3626 return (error);
3627 } /* ixgbe_sysctl_dump_debug_dump */
3628
3629 /************************************************************************
3630 * ixgbe_add_debug_dump_sysctls
3631 ************************************************************************/
3632 static void
ixgbe_add_debug_dump_sysctls(struct ixgbe_softc * sc)3633 ixgbe_add_debug_dump_sysctls(struct ixgbe_softc *sc)
3634 {
3635 struct sysctl_oid_list *debug_list, *dump_list;
3636 struct sysctl_oid *dump_node;
3637 struct sysctl_ctx_list *ctx;
3638 device_t dev = sc->dev;
3639
3640 ctx = device_get_sysctl_ctx(dev);
3641 debug_list = SYSCTL_CHILDREN(sc->debug_sysctls);
3642
3643 dump_node = SYSCTL_ADD_NODE(ctx, debug_list, OID_AUTO, "dump",
3644 CTLFLAG_RD, NULL, "Internal FW/HW Dump");
3645 dump_list = SYSCTL_CHILDREN(dump_node);
3646
3647 SYSCTL_ADD_PROC(ctx, dump_list, OID_AUTO, "clusters",
3648 CTLTYPE_U32 | CTLFLAG_RW, sc, 0,
3649 ixgbe_sysctl_debug_dump_set_clusters, "SU",
3650 IXGBE_SYSCTL_DESC_DEBUG_DUMP_SET_CLUSTER);
3651
3652 SYSCTL_ADD_PROC(ctx, dump_list, OID_AUTO, "dump",
3653 CTLTYPE_STRING | CTLFLAG_RW | CTLFLAG_MPSAFE, sc, 0,
3654 ixgbe_sysctl_dump_debug_dump, "",
3655 IXGBE_SYSCTL_DESC_DUMP_DEBUG_DUMP);
3656 } /* ixgbe_add_debug_dump_sysctls */
3657
3658 static void
ixgbe_add_debug_sysctls(struct ixgbe_softc * sc)3659 ixgbe_add_debug_sysctls(struct ixgbe_softc *sc)
3660 {
3661 struct sysctl_oid_list *ctx_list;
3662 struct sysctl_ctx_list *ctx;
3663 device_t dev = sc->dev;
3664
3665 ctx = device_get_sysctl_ctx(dev);
3666 ctx_list = SYSCTL_CHILDREN(device_get_sysctl_tree(dev));
3667
3668 sc->debug_sysctls = SYSCTL_ADD_NODE(ctx, ctx_list, OID_AUTO, "debug",
3669 CTLFLAG_RD, NULL, "Debug Sysctls");
3670
3671 if (sc->feat_en & IXGBE_FEATURE_DBG_DUMP)
3672 ixgbe_add_debug_dump_sysctls(sc);
3673
3674 if (sc->feat_en & IXGBE_FEATURE_FW_LOGGING)
3675 ixgbe_add_fw_logging_tunables(sc, sc->debug_sysctls);
3676 } /* ixgbe_add_debug_sysctls */
3677
3678 /************************************************************************
3679 * ixgbe_add_device_sysctls
3680 ************************************************************************/
3681 static void
ixgbe_add_device_sysctls(if_ctx_t ctx)3682 ixgbe_add_device_sysctls(if_ctx_t ctx)
3683 {
3684 struct ixgbe_softc *sc = iflib_get_softc(ctx);
3685 device_t dev = iflib_get_dev(ctx);
3686 struct ixgbe_hw *hw = &sc->hw;
3687 struct sysctl_oid_list *child;
3688 struct sysctl_ctx_list *ctx_list;
3689
3690 ctx_list = device_get_sysctl_ctx(dev);
3691 child = SYSCTL_CHILDREN(device_get_sysctl_tree(dev));
3692
3693 /* Sysctls for all devices */
3694 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "fc",
3695 CTLTYPE_INT | CTLFLAG_RW,
3696 sc, 0, ixgbe_sysctl_flowcntl, "I",
3697 IXGBE_SYSCTL_DESC_SET_FC);
3698
3699 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "advertise_speed",
3700 CTLTYPE_INT | CTLFLAG_RW,
3701 sc, 0, ixgbe_sysctl_advertise, "I",
3702 IXGBE_SYSCTL_DESC_ADV_SPEED);
3703 if (hw->mac.type == ixgbe_mac_82599EB ||
3704 hw->mac.type == ixgbe_mac_X540) {
3705 SYSCTL_ADD_U64(ctx_list, child, OID_AUTO,
3706 "iov_dma_abort_events", CTLFLAG_RD,
3707 &sc->iov_dma_abort_events, 0,
3708 "VF invalid-DMA events");
3709 SYSCTL_ADD_U64(ctx_list, child, OID_AUTO,
3710 "iov_dma_abort_flr_failures", CTLFLAG_RD,
3711 &sc->iov_dma_abort_flr_failures, 0,
3712 "Failed VF reset attempts after invalid-DMA events");
3713 SYSCTL_ADD_U64(ctx_list, child, OID_AUTO,
3714 "iov_dma_abort_quarantines", CTLFLAG_RD,
3715 &sc->iov_dma_abort_quarantines, 0,
3716 "VFs quarantined after repeated invalid-DMA events");
3717 SYSCTL_ADD_U64(ctx_list, child, OID_AUTO,
3718 "iov_quarantined_vfs", CTLFLAG_RD,
3719 &sc->iov_quarantined_vfs, 0,
3720 "Bitmap of quarantined VF pools");
3721 }
3722
3723 sc->enable_aim = ixgbe_enable_aim;
3724 SYSCTL_ADD_INT(ctx_list, child, OID_AUTO, "enable_aim", CTLFLAG_RW,
3725 &sc->enable_aim, 0, "Interrupt Moderation");
3726
3727 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "fw_version",
3728 CTLTYPE_STRING | CTLFLAG_RD, sc, 0,
3729 ixgbe_sysctl_print_fw_version, "A", "Prints FW/NVM Versions");
3730
3731 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO,
3732 "tso_tcp_flags_mask_first_segment",
3733 CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_NEEDGIANT,
3734 sc, 0, ixgbe_sysctl_tso_tcp_flags_mask, "IU",
3735 "TSO TCP flags mask for first segment");
3736
3737 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO,
3738 "tso_tcp_flags_mask_middle_segment",
3739 CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_NEEDGIANT,
3740 sc, 1, ixgbe_sysctl_tso_tcp_flags_mask, "IU",
3741 "TSO TCP flags mask for middle segment");
3742
3743 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO,
3744 "tso_tcp_flags_mask_last_segment",
3745 CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_NEEDGIANT,
3746 sc, 2, ixgbe_sysctl_tso_tcp_flags_mask, "IU",
3747 "TSO TCP flags mask for last segment");
3748
3749 #ifdef IXGBE_DEBUG
3750 /* testing sysctls (for all devices) */
3751 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "power_state",
3752 CTLTYPE_INT | CTLFLAG_RW,
3753 sc, 0, ixgbe_sysctl_power_state,
3754 "I", "PCI Power State");
3755
3756 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "print_rss_config",
3757 CTLTYPE_STRING | CTLFLAG_RD, sc, 0,
3758 ixgbe_sysctl_print_rss_config, "A", "Prints RSS Configuration");
3759 #endif
3760 /* for X550 series devices */
3761 if (hw->mac.type >= ixgbe_mac_X550)
3762 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "dmac",
3763 CTLTYPE_U16 | CTLFLAG_RW,
3764 sc, 0, ixgbe_sysctl_dmac,
3765 "I", "DMA Coalesce");
3766
3767 /* for WoL-capable devices */
3768 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) {
3769 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "wol_enable",
3770 CTLTYPE_INT | CTLFLAG_RW, sc, 0,
3771 ixgbe_sysctl_wol_enable, "I",
3772 "Enable/Disable Wake on LAN");
3773
3774 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "wufc",
3775 CTLTYPE_U32 | CTLFLAG_RW,
3776 sc, 0, ixgbe_sysctl_wufc,
3777 "I", "Enable/Disable Wake Up Filters");
3778 }
3779
3780 /* for X552/X557-AT devices */
3781 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) {
3782 struct sysctl_oid *phy_node;
3783 struct sysctl_oid_list *phy_list;
3784
3785 phy_node = SYSCTL_ADD_NODE(ctx_list, child, OID_AUTO, "phy",
3786 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL,
3787 "External PHY sysctls");
3788 phy_list = SYSCTL_CHILDREN(phy_node);
3789
3790 SYSCTL_ADD_PROC(ctx_list, phy_list, OID_AUTO, "temp",
3791 CTLTYPE_U16 | CTLFLAG_RD,
3792 sc, 0, ixgbe_sysctl_phy_temp,
3793 "I", "Current External PHY Temperature (Celsius)");
3794
3795 SYSCTL_ADD_PROC(ctx_list, phy_list, OID_AUTO,
3796 "overtemp_occurred",
3797 CTLTYPE_U16 | CTLFLAG_RD, sc, 0,
3798 ixgbe_sysctl_phy_overtemp_occurred, "I",
3799 "External PHY High Temperature Event Occurred");
3800 }
3801
3802 if (sc->feat_cap & IXGBE_FEATURE_EEE) {
3803 struct sysctl_oid *eee_node;
3804 struct sysctl_oid_list *eee_list;
3805
3806 SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "eee_state",
3807 CTLTYPE_INT | CTLFLAG_RW, sc, 0,
3808 ixgbe_sysctl_eee_state, "I", "EEE Power Save State");
3809
3810 eee_node = SYSCTL_ADD_NODE(ctx_list, child, OID_AUTO, "eee",
3811 CTLFLAG_RD | CTLFLAG_MPSAFE, NULL,
3812 "Energy Efficient Ethernet statistics");
3813 eee_list = SYSCTL_CHILDREN(eee_node);
3814 SYSCTL_ADD_UQUAD(ctx_list, eee_list, OID_AUTO, "tx_lpi_count",
3815 CTLFLAG_RD, &sc->stats.pf.tlpic, "TX LPI event count");
3816 SYSCTL_ADD_UQUAD(ctx_list, eee_list, OID_AUTO, "rx_lpi_count",
3817 CTLFLAG_RD, &sc->stats.pf.rlpic, "RX LPI event count");
3818 }
3819
3820 ixgbe_add_debug_sysctls(sc);
3821 } /* ixgbe_add_device_sysctls */
3822
3823 /************************************************************************
3824 * ixgbe_allocate_pci_resources
3825 ************************************************************************/
3826 static int
ixgbe_allocate_pci_resources(if_ctx_t ctx)3827 ixgbe_allocate_pci_resources(if_ctx_t ctx)
3828 {
3829 struct ixgbe_softc *sc = iflib_get_softc(ctx);
3830 device_t dev = iflib_get_dev(ctx);
3831 int rid;
3832
3833 rid = PCIR_BAR(0);
3834 sc->pci_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
3835 RF_ACTIVE);
3836
3837 if (!(sc->pci_mem)) {
3838 device_printf(dev,
3839 "Unable to allocate bus resource: memory\n");
3840 return (ENXIO);
3841 }
3842
3843 /* Save bus_space values for READ/WRITE_REG macros */
3844 sc->osdep.mem_bus_space_tag = rman_get_bustag(sc->pci_mem);
3845 sc->osdep.mem_bus_space_handle =
3846 rman_get_bushandle(sc->pci_mem);
3847 /* Set hw values for shared code */
3848 sc->hw.hw_addr = (u8 *)&sc->osdep.mem_bus_space_handle;
3849
3850 return (0);
3851 } /* ixgbe_allocate_pci_resources */
3852
3853 /************************************************************************
3854 * ixgbe_detach - Device removal routine
3855 *
3856 * Called when the driver is being removed.
3857 * Stops the adapter and deallocates all the resources
3858 * that were allocated for driver operation.
3859 *
3860 * return 0 on success, positive on failure
3861 ************************************************************************/
3862 static int
ixgbe_if_detach(if_ctx_t ctx)3863 ixgbe_if_detach(if_ctx_t ctx)
3864 {
3865 struct ixgbe_softc *sc = iflib_get_softc(ctx);
3866 u32 ctrl_ext;
3867
3868 INIT_DEBUGOUT("ixgbe_detach: begin");
3869
3870 sc->iov_recovery_stop = true;
3871
3872 ixgbe_setup_low_power_mode(ctx);
3873
3874 /* let hardware know driver is unloading */
3875 ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT);
3876 ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD;
3877 IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext);
3878
3879 callout_drain(&sc->fw_mode_timer);
3880
3881 if (sc->hw.mac.type == ixgbe_mac_E610) {
3882 ixgbe_disable_lse(sc);
3883 ixgbe_shutdown_aci(&sc->hw);
3884 }
3885
3886 ixgbe_free_pci_resources(ctx);
3887
3888 free(sc->mta, M_IXGBE);
3889
3890 return (0);
3891 } /* ixgbe_if_detach */
3892
3893 /************************************************************************
3894 * ixgbe_setup_low_power_mode - LPLU/WoL preparation
3895 *
3896 * Prepare the adapter/port for LPLU and/or WoL
3897 ************************************************************************/
3898 static int
ixgbe_setup_low_power_mode(if_ctx_t ctx)3899 ixgbe_setup_low_power_mode(if_ctx_t ctx)
3900 {
3901 struct ixgbe_softc *sc = iflib_get_softc(ctx);
3902 struct ixgbe_hw *hw = &sc->hw;
3903 device_t dev = iflib_get_dev(ctx);
3904 s32 error = 0;
3905
3906 if (!hw->wol_enabled)
3907 ixgbe_set_phy_power(hw, false);
3908
3909 /* Limit power management flow to X550EM baseT */
3910 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T &&
3911 hw->phy.ops.enter_lplu) {
3912 /* Turn off support for APM wakeup. (Using ACPI instead) */
3913 IXGBE_WRITE_REG(hw, IXGBE_GRC_BY_MAC(hw),
3914 IXGBE_READ_REG(hw, IXGBE_GRC_BY_MAC(hw)) & ~(u32)2);
3915
3916 /*
3917 * Clear Wake Up Status register to prevent any previous
3918 * wakeup events from waking us up immediately after we
3919 * suspend.
3920 */
3921 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff);
3922
3923 /*
3924 * Program the Wakeup Filter Control register with user filter
3925 * settings
3926 */
3927 IXGBE_WRITE_REG(hw, IXGBE_WUFC, sc->wufc);
3928
3929 /* Enable wakeups and power management in Wakeup Control */
3930 IXGBE_WRITE_REG(hw, IXGBE_WUC,
3931 IXGBE_WUC_WKEN | IXGBE_WUC_PME_EN);
3932
3933 /* X550EM baseT adapters need a special LPLU flow */
3934 hw->phy.reset_disable = true;
3935 ixgbe_if_stop(ctx);
3936 error = hw->phy.ops.enter_lplu(hw);
3937 if (error)
3938 device_printf(dev, "Error entering LPLU: %d\n",
3939 error);
3940 hw->phy.reset_disable = false;
3941 } else {
3942 /* Just stop for other adapters */
3943 ixgbe_if_stop(ctx);
3944 }
3945
3946 /* Disable the 82599 link only when actually entering D3. */
3947 if (hw->mac.type == ixgbe_mac_82599EB)
3948 ixgbe_stop_mac_link_on_d3_82599(hw);
3949
3950 return error;
3951 } /* ixgbe_setup_low_power_mode */
3952
3953 /************************************************************************
3954 * ixgbe_shutdown - Shutdown entry point
3955 ************************************************************************/
3956 static int
ixgbe_if_shutdown(if_ctx_t ctx)3957 ixgbe_if_shutdown(if_ctx_t ctx)
3958 {
3959 int error = 0;
3960
3961 INIT_DEBUGOUT("ixgbe_shutdown: begin");
3962
3963 error = ixgbe_setup_low_power_mode(ctx);
3964
3965 return (error);
3966 } /* ixgbe_if_shutdown */
3967
3968 /************************************************************************
3969 * ixgbe_suspend
3970 *
3971 * From D0 to D3
3972 ************************************************************************/
3973 static int
ixgbe_if_suspend(if_ctx_t ctx)3974 ixgbe_if_suspend(if_ctx_t ctx)
3975 {
3976 int error = 0;
3977
3978 INIT_DEBUGOUT("ixgbe_suspend: begin");
3979
3980 error = ixgbe_setup_low_power_mode(ctx);
3981
3982 return (error);
3983 } /* ixgbe_if_suspend */
3984
3985 /************************************************************************
3986 * ixgbe_resume
3987 *
3988 * From D3 to D0
3989 ************************************************************************/
3990 static int
ixgbe_if_resume(if_ctx_t ctx)3991 ixgbe_if_resume(if_ctx_t ctx)
3992 {
3993 struct ixgbe_softc *sc = iflib_get_softc(ctx);
3994 device_t dev = iflib_get_dev(ctx);
3995 if_t ifp = iflib_get_ifp(ctx);
3996 struct ixgbe_hw *hw = &sc->hw;
3997 u32 wus;
3998
3999 INIT_DEBUGOUT("ixgbe_resume: begin");
4000
4001 /* Read & clear WUS register */
4002 wus = IXGBE_READ_REG(hw, IXGBE_WUS);
4003 if (wus)
4004 device_printf(dev, "Woken up by (WUS): %#010x\n",
4005 IXGBE_READ_REG(hw, IXGBE_WUS));
4006 IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff);
4007 /* And clear WUFC until next low-power transition */
4008 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
4009
4010 /*
4011 * Required after D3->D0 transition;
4012 * will re-advertise all previous advertised speeds
4013 */
4014 if (if_getflags(ifp) & IFF_UP)
4015 ixgbe_if_init(ctx);
4016
4017 return (0);
4018 } /* ixgbe_if_resume */
4019
4020 /************************************************************************
4021 * ixgbe_if_mtu_set - Ioctl mtu entry point
4022 *
4023 * Return 0 on success, EINVAL on failure
4024 ************************************************************************/
4025 static int
ixgbe_if_mtu_set(if_ctx_t ctx,uint32_t mtu)4026 ixgbe_if_mtu_set(if_ctx_t ctx, uint32_t mtu)
4027 {
4028 struct ixgbe_softc *sc = iflib_get_softc(ctx);
4029 int error = 0;
4030
4031 IOCTL_DEBUGOUT("ioctl: SIOCIFMTU (Set Interface MTU)");
4032
4033 if (mtu > IXGBE_MAX_MTU) {
4034 error = EINVAL;
4035 } else {
4036 sc->max_frame_size = mtu + IXGBE_MTU_HDR;
4037 }
4038
4039 return error;
4040 } /* ixgbe_if_mtu_set */
4041
4042 /************************************************************************
4043 * ixgbe_if_crcstrip_set
4044 ************************************************************************/
4045 static void
ixgbe_if_crcstrip_set(if_ctx_t ctx,int onoff,int crcstrip)4046 ixgbe_if_crcstrip_set(if_ctx_t ctx, int onoff, int crcstrip)
4047 {
4048 struct ixgbe_softc *sc = iflib_get_softc(ctx);
4049 struct ixgbe_hw *hw = &sc->hw;
4050 /* crc stripping is set in two places:
4051 * IXGBE_HLREG0 (modified on init_locked and hw reset)
4052 * IXGBE_RDRXCTL (set by the original driver in
4053 * ixgbe_setup_hw_rsc() called in init_locked.
4054 * We disable the setting when netmap is compiled in).
4055 * We update the values here, but also in ixgbe.c because
4056 * init_locked sometimes is called outside our control.
4057 */
4058 uint32_t hl, rxc;
4059
4060 hl = IXGBE_READ_REG(hw, IXGBE_HLREG0);
4061 rxc = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
4062 #ifdef NETMAP
4063 if (netmap_verbose)
4064 D("%s read HLREG 0x%x rxc 0x%x",
4065 onoff ? "enter" : "exit", hl, rxc);
4066 #endif
4067 /* hw requirements ... */
4068 rxc &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
4069 rxc |= IXGBE_RDRXCTL_RSCACKC;
4070 if (onoff && !crcstrip) {
4071 /* keep the crc. Fast rx */
4072 hl &= ~IXGBE_HLREG0_RXCRCSTRP;
4073 rxc &= ~IXGBE_RDRXCTL_CRCSTRIP;
4074 } else {
4075 /* reset default mode */
4076 hl |= IXGBE_HLREG0_RXCRCSTRP;
4077 rxc |= IXGBE_RDRXCTL_CRCSTRIP;
4078 }
4079 #ifdef NETMAP
4080 if (netmap_verbose)
4081 D("%s write HLREG 0x%x rxc 0x%x",
4082 onoff ? "enter" : "exit", hl, rxc);
4083 #endif
4084 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hl);
4085 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rxc);
4086 } /* ixgbe_if_crcstrip_set */
4087
4088 /*********************************************************************
4089 * ixgbe_if_init - Init entry point
4090 *
4091 * Used in two ways: It is used by the stack as an init
4092 * entry point in network interface structure. It is also
4093 * used by the driver as a hw/sw initialization routine to
4094 * get to a consistent state.
4095 *
4096 * Return 0 on success, positive on failure
4097 **********************************************************************/
4098 void
ixgbe_if_init(if_ctx_t ctx)4099 ixgbe_if_init(if_ctx_t ctx)
4100 {
4101 struct ixgbe_softc *sc = iflib_get_softc(ctx);
4102 if_t ifp = iflib_get_ifp(ctx);
4103 device_t dev = iflib_get_dev(ctx);
4104 struct ixgbe_hw *hw = &sc->hw;
4105 struct ix_rx_queue *rx_que;
4106 struct ix_tx_queue *tx_que;
4107 u32 txdctl, mhadd;
4108 u32 rxdctl, rxctrl;
4109 u32 ctrl_ext;
4110
4111 int i, j, err;
4112
4113 INIT_DEBUGOUT("ixgbe_if_init: begin");
4114 if (atomic_load_acq_int(&sc->recovery_mode)) {
4115 iflib_init_failed(ctx);
4116 return;
4117 }
4118 /* Leave an overheated adapter stopped until an operator retries. */
4119 if (sc->overtemp_shutdown_pending) {
4120 sc->overtemp_shutdown_pending = false;
4121 iflib_init_failed(ctx);
4122 return;
4123 }
4124
4125 /* Preserve the largest frame requested by the PF or an active VF. */
4126 sc->max_frame_size = if_getmtu(ifp) + IXGBE_MTU_HDR;
4127 ixgbe_recalculate_max_frame(sc);
4128
4129 /* Queue indices may change with IOV mode */
4130 ixgbe_align_all_queue_indices(sc);
4131
4132 /* reprogram the RAR[0] in case user changed it. */
4133 ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, IXGBE_RAH_AV);
4134
4135 /* Get the latest mac address, User can use a LAA */
4136 bcopy(if_getlladdr(ifp), hw->mac.addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
4137 ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, 1);
4138 hw->addr_ctrl.rar_used_count = 1;
4139
4140 ixgbe_init_hw(hw);
4141 sc->iov_mta_valid = false;
4142 sc->iov_vfta_valid = false;
4143
4144 ixgbe_initialize_iov(sc);
4145
4146 ixgbe_initialize_transmit_units(ctx);
4147
4148 /* Setup Multicast table */
4149 ixgbe_if_multi_set(ctx);
4150
4151 /* Determine the correct mbuf pool, based on frame size */
4152 sc->rx_mbuf_sz = iflib_get_rx_mbuf_sz(ctx);
4153
4154 /* Configure RX settings */
4155 ixgbe_initialize_receive_units(ctx);
4156
4157 /*
4158 * Initialize the deferred administrative request mask.
4159 */
4160 atomic_store_rel_32(&sc->task_requests, 0);
4161
4162 /* Enable SDP & MSI-X interrupts based on adapter */
4163 ixgbe_config_gpie(sc);
4164
4165 /* Set MTU size */
4166 if (sc->max_frame_size > ETHER_MAX_LEN) {
4167 /* aka IXGBE_MAXFRS on 82599 and newer */
4168 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
4169 mhadd &= ~IXGBE_MHADD_MFS_MASK;
4170 mhadd |= sc->max_frame_size << IXGBE_MHADD_MFS_SHIFT;
4171 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
4172 }
4173
4174 /* Now enable all the queues */
4175 for (i = 0, tx_que = sc->tx_queues; i < sc->num_tx_queues;
4176 i++, tx_que++) {
4177 struct tx_ring *txr = &tx_que->txr;
4178
4179 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txr->me));
4180 txdctl &= ~IXGBE_TXDCTL_THRESH_MASK;
4181 txdctl |= IXGBE_TXDCTL_ENABLE | IXGBE_TXDCTL_THRESH_DEFAULT;
4182 /*
4183 * When the internal queue falls below PTHRESH (32),
4184 * start prefetching as long as there are at least
4185 * HTHRESH (1) buffers ready. Leave WTHRESH at zero
4186 * so that writeback follows iflib's sparse RS bits.
4187 * Prefetching enables tx line rate even with 1 queue.
4188 */
4189 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txr->me), txdctl);
4190 }
4191
4192 for (i = 0, rx_que = sc->rx_queues; i < sc->num_rx_queues;
4193 i++, rx_que++) {
4194 struct rx_ring *rxr = &rx_que->rxr;
4195
4196 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me));
4197 if (hw->mac.type == ixgbe_mac_82598EB) {
4198 /*
4199 * PTHRESH = 21
4200 * HTHRESH = 4
4201 * WTHRESH = 8
4202 */
4203 rxdctl &= ~0x3FFFFF;
4204 rxdctl |= 0x080420;
4205 }
4206 rxdctl |= IXGBE_RXDCTL_ENABLE;
4207 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), rxdctl);
4208 for (j = 0; j < 10; j++) {
4209 if (IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)) &
4210 IXGBE_RXDCTL_ENABLE)
4211 break;
4212 else
4213 msec_delay(1);
4214 }
4215 wmb();
4216 }
4217
4218 /* Enable Receive engine */
4219 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4220 if (hw->mac.type == ixgbe_mac_82598EB)
4221 rxctrl |= IXGBE_RXCTRL_DMBYPS;
4222 rxctrl |= IXGBE_RXCTRL_RXEN;
4223 ixgbe_enable_rx_dma(hw, rxctrl);
4224
4225 /* Set up MSI/MSI-X routing */
4226 if (ixgbe_enable_msix) {
4227 ixgbe_configure_ivars(sc);
4228 /* Set up auto-mask */
4229 if (hw->mac.type == ixgbe_mac_82598EB)
4230 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4231 else {
4232 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
4233 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
4234 }
4235 } else { /* Simple settings for Legacy/MSI */
4236 ixgbe_set_ivar(sc, 0, 0, 0);
4237 ixgbe_set_ivar(sc, 0, 0, 1);
4238 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4239 }
4240
4241 ixgbe_init_fdir(sc);
4242
4243 /*
4244 * Check on any SFP devices that
4245 * need to be kick-started
4246 */
4247 if (hw->phy.type == ixgbe_phy_none) {
4248 err = hw->phy.ops.identify(hw);
4249 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
4250 device_printf(dev,
4251 "Unsupported SFP+ module type was detected.\n");
4252 return;
4253 }
4254 }
4255
4256 /* Set moderation on the Link interrupt */
4257 IXGBE_WRITE_REG(hw, IXGBE_EITR(sc->vector), IXGBE_LINK_ITR);
4258
4259 /* Enable power to the phy. */
4260 ixgbe_set_phy_power(hw, true);
4261
4262 /* Config/Enable Link */
4263 ixgbe_config_link(ctx);
4264
4265 /* Hardware Packet Buffer & Flow Control setup */
4266 ixgbe_config_delay_values(sc);
4267
4268 /* Initialize the FC settings */
4269 ixgbe_start_hw(hw);
4270
4271 /* Set up VLAN support and filter */
4272 ixgbe_setup_vlan_hw_support(ctx);
4273
4274 /* Setup DMA Coalescing */
4275 ixgbe_config_dmac(sc);
4276
4277 if (sc->feat_en & IXGBE_FEATURE_SRIOV) {
4278 ixgbe_enable_mdd(hw);
4279 ixgbe_activate_vfs(sc);
4280 }
4281
4282 /* And now turn on interrupts */
4283 ixgbe_if_enable_intr(ctx);
4284
4285 /* Enable the use of the MBX by the VF's */
4286 if (sc->feat_en & IXGBE_FEATURE_SRIOV) {
4287 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
4288 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
4289 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
4290 }
4291
4292 } /* ixgbe_init_locked */
4293
4294 /************************************************************************
4295 * ixgbe_set_ivar
4296 *
4297 * Setup the correct IVAR register for a particular MSI-X interrupt
4298 * (yes this is all very magic and confusing :)
4299 * - entry is the register array entry
4300 * - vector is the MSI-X vector for this queue
4301 * - type is RX/TX/MISC
4302 ************************************************************************/
4303 static void
ixgbe_set_ivar(struct ixgbe_softc * sc,u8 entry,u8 vector,s8 type)4304 ixgbe_set_ivar(struct ixgbe_softc *sc, u8 entry, u8 vector, s8 type)
4305 {
4306 struct ixgbe_hw *hw = &sc->hw;
4307 u32 ivar, index;
4308
4309 vector |= IXGBE_IVAR_ALLOC_VAL;
4310
4311 switch (hw->mac.type) {
4312 case ixgbe_mac_82598EB:
4313 if (type == -1)
4314 entry = IXGBE_IVAR_OTHER_CAUSES_INDEX;
4315 else
4316 entry += (type * 64);
4317 index = (entry >> 2) & 0x1F;
4318 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
4319 ivar &= ~(0xFF << (8 * (entry & 0x3)));
4320 ivar |= (vector << (8 * (entry & 0x3)));
4321 IXGBE_WRITE_REG(&sc->hw, IXGBE_IVAR(index), ivar);
4322 break;
4323 case ixgbe_mac_82599EB:
4324 case ixgbe_mac_X540:
4325 case ixgbe_mac_X550:
4326 case ixgbe_mac_X550EM_x:
4327 case ixgbe_mac_X550EM_a:
4328 case ixgbe_mac_E610:
4329 if (type == -1) { /* MISC IVAR */
4330 index = (entry & 1) * 8;
4331 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC);
4332 ivar &= ~(0xFF << index);
4333 ivar |= (vector << index);
4334 IXGBE_WRITE_REG(hw, IXGBE_IVAR_MISC, ivar);
4335 } else { /* RX/TX IVARS */
4336 index = (16 * (entry & 1)) + (8 * type);
4337 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(entry >> 1));
4338 ivar &= ~(0xFF << index);
4339 ivar |= (vector << index);
4340 IXGBE_WRITE_REG(hw, IXGBE_IVAR(entry >> 1), ivar);
4341 }
4342 default:
4343 break;
4344 }
4345 } /* ixgbe_set_ivar */
4346
4347 /************************************************************************
4348 * ixgbe_configure_ivars
4349 ************************************************************************/
4350 static void
ixgbe_configure_ivars(struct ixgbe_softc * sc)4351 ixgbe_configure_ivars(struct ixgbe_softc *sc)
4352 {
4353 struct ix_rx_queue *rx_que = sc->rx_queues;
4354 struct ix_tx_queue *tx_que = sc->tx_queues;
4355 u32 newitr;
4356
4357 if (ixgbe_max_interrupt_rate > 0)
4358 newitr = (4000000 / ixgbe_max_interrupt_rate) & 0x0FF8;
4359 else {
4360 /*
4361 * Disable DMA coalescing if interrupt moderation is
4362 * disabled.
4363 */
4364 sc->dmac = 0;
4365 newitr = 0;
4366 }
4367
4368 for (int i = 0; i < sc->num_rx_queues; i++, rx_que++) {
4369 struct rx_ring *rxr = &rx_que->rxr;
4370
4371 /* First the RX queue entry */
4372 ixgbe_set_ivar(sc, rxr->me, rx_que->msix, 0);
4373
4374 /* Set an Initial EITR value */
4375 IXGBE_WRITE_REG(&sc->hw, IXGBE_EITR(rx_que->msix), newitr);
4376 }
4377 for (int i = 0; i < sc->num_tx_queues; i++, tx_que++) {
4378 struct tx_ring *txr = &tx_que->txr;
4379
4380 /* ... and the TX */
4381 ixgbe_set_ivar(sc, txr->me, tx_que->msix, 1);
4382 }
4383 /* For the Link interrupt */
4384 ixgbe_set_ivar(sc, 1, sc->vector, -1);
4385 } /* ixgbe_configure_ivars */
4386
4387 /************************************************************************
4388 * ixgbe_config_gpie
4389 ************************************************************************/
4390 static void
ixgbe_config_gpie(struct ixgbe_softc * sc)4391 ixgbe_config_gpie(struct ixgbe_softc *sc)
4392 {
4393 struct ixgbe_hw *hw = &sc->hw;
4394 u32 gpie;
4395
4396 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
4397
4398 if (sc->intr_type == IFLIB_INTR_MSIX) {
4399 /* Enable Enhanced MSI-X mode */
4400 gpie |= IXGBE_GPIE_MSIX_MODE |
4401 IXGBE_GPIE_EIAME |
4402 IXGBE_GPIE_PBA_SUPPORT |
4403 IXGBE_GPIE_OCD;
4404 }
4405
4406 /* Fan Failure Interrupt */
4407 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL)
4408 gpie |= IXGBE_SDP1_GPIEN;
4409
4410 /* Thermal Sensor Interrupt */
4411 if (sc->feat_en & IXGBE_FEATURE_TEMP_SENSOR)
4412 gpie |= IXGBE_SDP0_GPIEN_X540;
4413
4414 /* Link detection */
4415 switch (hw->mac.type) {
4416 case ixgbe_mac_82599EB:
4417 gpie |= IXGBE_SDP1_GPIEN | IXGBE_SDP2_GPIEN;
4418 break;
4419 case ixgbe_mac_X550EM_x:
4420 case ixgbe_mac_X550EM_a:
4421 gpie |= IXGBE_SDP0_GPIEN_X540;
4422 break;
4423 default:
4424 break;
4425 }
4426
4427 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
4428
4429 } /* ixgbe_config_gpie */
4430
4431 /************************************************************************
4432 * ixgbe_config_delay_values
4433 *
4434 * Requires sc->max_frame_size to be set.
4435 ************************************************************************/
4436 static void
ixgbe_config_delay_values(struct ixgbe_softc * sc)4437 ixgbe_config_delay_values(struct ixgbe_softc *sc)
4438 {
4439 struct ixgbe_hw *hw = &sc->hw;
4440 u32 rxpb, frame, size, tmp;
4441
4442 frame = sc->max_frame_size;
4443
4444 /* Calculate High Water */
4445 switch (hw->mac.type) {
4446 case ixgbe_mac_X540:
4447 case ixgbe_mac_X550:
4448 case ixgbe_mac_X550EM_x:
4449 case ixgbe_mac_X550EM_a:
4450 tmp = IXGBE_DV_X540(frame, frame);
4451 break;
4452 default:
4453 tmp = IXGBE_DV(frame, frame);
4454 break;
4455 }
4456 size = IXGBE_BT2KB(tmp);
4457 rxpb = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(0)) >> 10;
4458 hw->fc.high_water[0] = rxpb - size;
4459
4460 /* Now calculate Low Water */
4461 switch (hw->mac.type) {
4462 case ixgbe_mac_X540:
4463 case ixgbe_mac_X550:
4464 case ixgbe_mac_X550EM_x:
4465 case ixgbe_mac_X550EM_a:
4466 tmp = IXGBE_LOW_DV_X540(frame);
4467 break;
4468 default:
4469 tmp = IXGBE_LOW_DV(frame);
4470 break;
4471 }
4472 hw->fc.low_water[0] = IXGBE_BT2KB(tmp);
4473
4474 hw->fc.pause_time = IXGBE_FC_PAUSE;
4475 hw->fc.send_xon = true;
4476 } /* ixgbe_config_delay_values */
4477
4478 /************************************************************************
4479 * ixgbe_set_multi - Multicast Update
4480 *
4481 * Called whenever multicast address list is updated.
4482 ************************************************************************/
4483 static u_int
ixgbe_mc_filter_apply(void * arg,struct sockaddr_dl * sdl,u_int idx)4484 ixgbe_mc_filter_apply(void *arg, struct sockaddr_dl *sdl, u_int idx)
4485 {
4486 struct ixgbe_softc *sc = arg;
4487 struct ixgbe_mc_addr *mta = sc->mta;
4488
4489 if (idx == MAX_NUM_MULTICAST_ADDRESSES)
4490 return (0);
4491 bcopy(LLADDR(sdl), mta[idx].addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
4492 mta[idx].vmdq = sc->pool;
4493
4494 return (1);
4495 } /* ixgbe_mc_filter_apply */
4496
4497 #ifdef PCI_IOV
4498 /*
4499 * The MTA is shared by the PF and every VF. Rebuild it from all owners
4500 * because an individual bit cannot be cleared safely when hashes collide.
4501 */
4502 u_int
ixgbe_iov_rebuild_mta(struct ixgbe_softc * sc)4503 ixgbe_iov_rebuild_mta(struct ixgbe_softc *sc)
4504 {
4505 struct ixgbe_hw *hw;
4506 struct ixgbe_mc_addr *mta;
4507 struct ixgbe_vf *vf;
4508 u32 old_mta[IXGBE_MAX_MTA];
4509 u32 hash;
4510 u_int i, mcnt;
4511 int vf_index;
4512
4513 hw = &sc->hw;
4514 mta = sc->mta;
4515 bzero(mta, sizeof(*mta) * MAX_NUM_MULTICAST_ADDRESSES);
4516 mcnt = if_foreach_llmaddr(iflib_get_ifp(sc->ctx),
4517 ixgbe_mc_filter_apply, sc);
4518
4519 bcopy(hw->mac.mta_shadow, old_mta, sizeof(old_mta));
4520 bzero(hw->mac.mta_shadow, sizeof(hw->mac.mta_shadow));
4521 hw->addr_ctrl.num_mc_addrs = mcnt;
4522 hw->addr_ctrl.mta_in_use = 0;
4523
4524 for (i = 0; i < mcnt; i++)
4525 ixgbe_set_mta(hw, mta[i].addr);
4526
4527 for (vf_index = 0; vf_index < sc->num_vfs; vf_index++) {
4528 vf = &sc->vfs[vf_index];
4529 if (!(vf->flags & IXGBE_VF_ACTIVE))
4530 continue;
4531
4532 for (i = 0; i < vf->num_mc_hashes; i++) {
4533 hash = vf->mc_hash[i] & 0xfff;
4534 hw->mac.mta_shadow[(hash >> 5) &
4535 (hw->mac.mcft_size - 1)] |=
4536 1U << (hash & 0x1f);
4537 hw->addr_ctrl.mta_in_use++;
4538 }
4539 }
4540
4541 for (i = 0; i < hw->mac.mcft_size; i++) {
4542 if (sc->iov_mta_valid &&
4543 old_mta[i] == hw->mac.mta_shadow[i])
4544 continue;
4545 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_MTA(0), i,
4546 hw->mac.mta_shadow[i]);
4547 }
4548 sc->iov_mta_valid = true;
4549
4550 IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL,
4551 (hw->addr_ctrl.mta_in_use != 0 ? IXGBE_MCSTCTRL_MFE : 0) |
4552 hw->mac.mc_filter_type);
4553
4554 return (mcnt);
4555 }
4556 #endif
4557
4558 static void
ixgbe_if_multi_set(if_ctx_t ctx)4559 ixgbe_if_multi_set(if_ctx_t ctx)
4560 {
4561 struct ixgbe_softc *sc = iflib_get_softc(ctx);
4562 struct ixgbe_mc_addr *mta;
4563 if_t ifp = iflib_get_ifp(ctx);
4564 u8 *update_ptr;
4565 u32 fctrl;
4566 u_int mcnt;
4567
4568 IOCTL_DEBUGOUT("ixgbe_if_multi_set: begin");
4569
4570 #ifdef PCI_IOV
4571 if (sc->feat_en & IXGBE_FEATURE_SRIOV) {
4572 mcnt = ixgbe_iov_rebuild_mta(sc);
4573 } else
4574 #endif
4575 {
4576 mta = sc->mta;
4577 bzero(mta, sizeof(*mta) * MAX_NUM_MULTICAST_ADDRESSES);
4578
4579 mcnt = if_foreach_llmaddr(iflib_get_ifp(ctx),
4580 ixgbe_mc_filter_apply, sc);
4581
4582 if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) {
4583 update_ptr = (u8 *)mta;
4584 ixgbe_update_mc_addr_list(&sc->hw, update_ptr, mcnt,
4585 ixgbe_mc_array_itr, true);
4586 }
4587 }
4588
4589 fctrl = IXGBE_READ_REG(&sc->hw, IXGBE_FCTRL);
4590
4591 if (if_getflags(ifp) & IFF_PROMISC)
4592 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4593 else if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES ||
4594 if_getflags(ifp) & IFF_ALLMULTI) {
4595 fctrl |= IXGBE_FCTRL_MPE;
4596 fctrl &= ~IXGBE_FCTRL_UPE;
4597 } else
4598 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4599
4600 IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, fctrl);
4601 } /* ixgbe_if_multi_set */
4602
4603 /************************************************************************
4604 * ixgbe_mc_array_itr
4605 *
4606 * An iterator function needed by the multicast shared code.
4607 * It feeds the shared code routine the addresses in the
4608 * array of ixgbe_set_multi() one by one.
4609 ************************************************************************/
4610 static u8 *
ixgbe_mc_array_itr(struct ixgbe_hw * hw,u8 ** update_ptr,u32 * vmdq)4611 ixgbe_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq)
4612 {
4613 struct ixgbe_mc_addr *mta;
4614
4615 mta = (struct ixgbe_mc_addr *)*update_ptr;
4616 *vmdq = mta->vmdq;
4617
4618 *update_ptr = (u8*)(mta + 1);
4619
4620 return (mta->addr);
4621 } /* ixgbe_mc_array_itr */
4622
4623 /************************************************************************
4624 * ixgbe_local_timer - Timer routine
4625 *
4626 * Checks for link status, updates statistics,
4627 * and runs the watchdog check.
4628 ************************************************************************/
4629 static void
ixgbe_if_timer(if_ctx_t ctx,uint16_t qid)4630 ixgbe_if_timer(if_ctx_t ctx, uint16_t qid)
4631 {
4632 struct ixgbe_softc *sc = iflib_get_softc(ctx);
4633
4634 if (qid != 0)
4635 return;
4636
4637 /* Check for pluggable optics */
4638 if (sc->sfp_probe)
4639 if (!ixgbe_sfp_probe(ctx))
4640 return; /* Nothing to do */
4641
4642 ixgbe_check_link(&sc->hw, &sc->link_speed, &sc->link_up, 0);
4643
4644 /* Fire off the adminq task */
4645 iflib_admin_intr_deferred(ctx);
4646
4647 } /* ixgbe_if_timer */
4648
4649 /************************************************************************
4650 * ixgbe_fw_mode_timer - FW mode timer routine
4651 ************************************************************************/
4652 static void
ixgbe_fw_mode_timer(void * arg)4653 ixgbe_fw_mode_timer(void *arg)
4654 {
4655 struct ixgbe_softc *sc = arg;
4656 struct ixgbe_hw *hw = &sc->hw;
4657
4658 if (ixgbe_fw_recovery_mode(hw)) {
4659 if (atomic_cmpset_acq_int(&sc->recovery_mode, 0, 1)) {
4660 /* Firmware error detected, entering recovery mode */
4661 device_printf(sc->dev,
4662 "Firmware recovery mode detected. Limiting"
4663 " functionality. Refer to the Intel(R) Ethernet"
4664 " Adapters and Devices User Guide for details on"
4665 " firmware recovery mode.\n");
4666
4667 /* Stop and publish the failure from the iflib taskqueue. */
4668 iflib_request_reset_if_up(sc->ctx);
4669 iflib_admin_intr_deferred(sc->ctx);
4670 }
4671 } else if (atomic_cmpset_acq_int(&sc->recovery_mode, 1, 0)) {
4672 /* Reinitialize an interface which was up when recovery began. */
4673 iflib_request_reset_if_up(sc->ctx);
4674 iflib_admin_intr_deferred(sc->ctx);
4675 }
4676
4677
4678 callout_reset(&sc->fw_mode_timer, hz,
4679 ixgbe_fw_mode_timer, sc);
4680 } /* ixgbe_fw_mode_timer */
4681
4682 /************************************************************************
4683 * ixgbe_sfp_probe
4684 *
4685 * Determine if a port had optics inserted.
4686 ************************************************************************/
4687 static bool
ixgbe_sfp_probe(if_ctx_t ctx)4688 ixgbe_sfp_probe(if_ctx_t ctx)
4689 {
4690 struct ixgbe_softc *sc = iflib_get_softc(ctx);
4691 struct ixgbe_hw *hw = &sc->hw;
4692 device_t dev = iflib_get_dev(ctx);
4693 bool result = false;
4694
4695 if ((hw->phy.type == ixgbe_phy_nl) &&
4696 (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) {
4697 s32 ret = hw->phy.ops.identify_sfp(hw);
4698 if (ret)
4699 goto out;
4700 ret = hw->phy.ops.reset(hw);
4701 sc->sfp_probe = false;
4702 if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) {
4703 device_printf(dev,
4704 "Unsupported SFP+ module detected!");
4705 device_printf(dev,
4706 "Reload driver with supported module.\n");
4707 goto out;
4708 } else
4709 device_printf(dev, "SFP+ module detected!\n");
4710 /* We now have supported optics */
4711 result = true;
4712 }
4713 out:
4714
4715 return (result);
4716 } /* ixgbe_sfp_probe */
4717
4718 /************************************************************************
4719 * ixgbe_handle_mod - Tasklet for SFP module interrupts
4720 ************************************************************************/
4721 static bool
ixgbe_handle_mod(void * context)4722 ixgbe_handle_mod(void *context)
4723 {
4724 if_ctx_t ctx = context;
4725 struct ixgbe_softc *sc = iflib_get_softc(ctx);
4726 struct ixgbe_hw *hw = &sc->hw;
4727 device_t dev = iflib_get_dev(ctx);
4728 u32 err, cage_full = 0;
4729
4730 if (sc->hw.need_crosstalk_fix) {
4731 switch (hw->mac.type) {
4732 case ixgbe_mac_82599EB:
4733 cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) &
4734 IXGBE_ESDP_SDP2;
4735 break;
4736 case ixgbe_mac_X550EM_x:
4737 case ixgbe_mac_X550EM_a:
4738 cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) &
4739 IXGBE_ESDP_SDP0;
4740 break;
4741 default:
4742 break;
4743 }
4744
4745 if (!cage_full)
4746 goto handle_mod_out;
4747 }
4748
4749 err = hw->phy.ops.identify_sfp(hw);
4750 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
4751 device_printf(dev,
4752 "Unsupported SFP+ module type was detected.\n");
4753 goto handle_mod_out;
4754 }
4755
4756 if (hw->mac.type == ixgbe_mac_82598EB)
4757 err = hw->phy.ops.reset(hw);
4758 else
4759 err = hw->mac.ops.setup_sfp(hw);
4760
4761 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
4762 device_printf(dev,
4763 "Setup failure - unsupported SFP+ module type.\n");
4764 goto handle_mod_out;
4765 }
4766 return (true);
4767
4768 handle_mod_out:
4769 return (false);
4770 } /* ixgbe_handle_mod */
4771
4772
4773 /************************************************************************
4774 * ixgbe_handle_msf - Tasklet for MSF (multispeed fiber) interrupts
4775 ************************************************************************/
4776 static void
ixgbe_handle_msf(void * context)4777 ixgbe_handle_msf(void *context)
4778 {
4779 if_ctx_t ctx = context;
4780 struct ixgbe_softc *sc = iflib_get_softc(ctx);
4781 struct ixgbe_hw *hw = &sc->hw;
4782 u32 autoneg;
4783 bool negotiate;
4784
4785 /* get_supported_phy_layer will call hw->phy.ops.identify_sfp() */
4786 sc->phy_layer = ixgbe_get_supported_physical_layer(hw);
4787
4788 autoneg = hw->phy.autoneg_advertised;
4789 if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
4790 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiate);
4791 if (hw->mac.ops.setup_link)
4792 hw->mac.ops.setup_link(hw, autoneg, true);
4793
4794 /* Adjust media types shown in ifconfig */
4795 ifmedia_removeall(sc->media);
4796 ixgbe_add_media_types(sc->ctx);
4797 ifmedia_set(sc->media, IFM_ETHER | IFM_AUTO);
4798 } /* ixgbe_handle_msf */
4799
4800 /************************************************************************
4801 * ixgbe_handle_phy - Tasklet for external PHY interrupts
4802 ************************************************************************/
4803 static void
ixgbe_handle_phy(void * context)4804 ixgbe_handle_phy(void *context)
4805 {
4806 if_ctx_t ctx = context;
4807 struct ixgbe_softc *sc = iflib_get_softc(ctx);
4808 struct ixgbe_hw *hw = &sc->hw;
4809 int error;
4810
4811 error = hw->phy.ops.handle_lasi(hw);
4812 if (error == IXGBE_ERR_OVERTEMP)
4813 device_printf(sc->dev,
4814 "CRITICAL: EXTERNAL PHY OVER TEMP!!"
4815 " PHY will downshift to lower power state!\n");
4816 else if (error)
4817 device_printf(sc->dev,
4818 "Error handling LASI interrupt: %d\n", error);
4819 } /* ixgbe_handle_phy */
4820
4821 /************************************************************************
4822 * ixgbe_enable_lse - enable link status events
4823 *
4824 * Sets mask and enables link status events
4825 ************************************************************************/
ixgbe_enable_lse(struct ixgbe_softc * sc)4826 s32 ixgbe_enable_lse(struct ixgbe_softc *sc)
4827 {
4828 s32 error;
4829
4830 u16 mask = ~((u16)(IXGBE_ACI_LINK_EVENT_UPDOWN |
4831 IXGBE_ACI_LINK_EVENT_MEDIA_NA |
4832 IXGBE_ACI_LINK_EVENT_MODULE_QUAL_FAIL |
4833 IXGBE_ACI_LINK_EVENT_PHY_FW_LOAD_FAIL));
4834
4835 error = ixgbe_configure_lse(&sc->hw, TRUE, mask);
4836 if (error)
4837 return (error);
4838
4839 sc->lse_mask = mask;
4840 return (IXGBE_SUCCESS);
4841 } /* ixgbe_enable_lse */
4842
4843 /************************************************************************
4844 * ixgbe_disable_lse - disable link status events
4845 ************************************************************************/
ixgbe_disable_lse(struct ixgbe_softc * sc)4846 s32 ixgbe_disable_lse(struct ixgbe_softc *sc)
4847 {
4848 s32 error;
4849
4850 error = ixgbe_configure_lse(&sc->hw, false, sc->lse_mask);
4851 if (error)
4852 return (error);
4853
4854 sc->lse_mask = 0;
4855 return (IXGBE_SUCCESS);
4856 } /* ixgbe_disable_lse */
4857
4858 /************************************************************************
4859 * ixgbe_handle_fw_event - Tasklet for MSI-X Link Status Event interrupts
4860 ************************************************************************/
4861 static u32
ixgbe_handle_fw_event(void * context)4862 ixgbe_handle_fw_event(void *context)
4863 {
4864 if_ctx_t ctx = context;
4865 struct ixgbe_softc *sc = iflib_get_softc(ctx);
4866 struct ixgbe_hw *hw = &sc->hw;
4867 struct ixgbe_aci_event event;
4868 bool pending = false;
4869 s32 error;
4870 u32 requests = 0;
4871
4872 event.buf_len = IXGBE_ACI_MAX_BUFFER_SIZE;
4873 event.msg_buf = malloc(event.buf_len, M_IXGBE, M_ZERO | M_NOWAIT);
4874 if (!event.msg_buf) {
4875 device_printf(sc->dev, "Can not allocate buffer for "
4876 "event message\n");
4877 return (0);
4878 }
4879
4880 do {
4881 error = ixgbe_aci_get_event(hw, &event, &pending);
4882 if (error) {
4883 device_printf(sc->dev, "Error getting event from "
4884 "FW:%d\n", error);
4885 break;
4886 }
4887
4888 switch (le16toh(event.desc.opcode)) {
4889 case ixgbe_aci_opc_get_link_status:
4890 requests |= IXGBE_REQUEST_TASK_LSC;
4891 break;
4892
4893 case ixgbe_aci_opc_fw_logs_event:
4894 ixgbe_fwlog_event_dump(&sc->hw, &event.desc, event.msg_buf);
4895 break;
4896
4897 case ixgbe_aci_opc_temp_tca_event:
4898 if (!sc->overtemp_shutdown_pending) {
4899 sc->overtemp_shutdown_pending = true;
4900 requests |= IXGBE_REQUEST_TASK_RESET;
4901 device_printf(sc->dev,
4902 "CRITICAL: OVER TEMP!! PHY IS SHUT DOWN!!\n");
4903 device_printf(sc->dev,
4904 "System shutdown required!\n");
4905 }
4906 break;
4907
4908 default:
4909 device_printf(sc->dev,
4910 "Unknown FW event captured, opcode=0x%04X\n",
4911 le16toh(event.desc.opcode));
4912 break;
4913 }
4914 } while (pending);
4915
4916 free(event.msg_buf, M_IXGBE);
4917 return (requests);
4918 } /* ixgbe_handle_fw_event */
4919
4920 /************************************************************************
4921 * ixgbe_if_stop - Stop the hardware
4922 *
4923 * Disables all traffic on the adapter by issuing a
4924 * global reset on the MAC and deallocates TX/RX buffers.
4925 ************************************************************************/
4926 static void
ixgbe_if_stop(if_ctx_t ctx)4927 ixgbe_if_stop(if_ctx_t ctx)
4928 {
4929 struct ixgbe_softc *sc = iflib_get_softc(ctx);
4930 struct ixgbe_hw *hw = &sc->hw;
4931
4932 INIT_DEBUGOUT("ixgbe_if_stop: begin\n");
4933
4934 ixgbe_led_restore(sc);
4935 if (sc->feat_en & IXGBE_FEATURE_SRIOV) {
4936 ixgbe_disable_mdd(hw);
4937 ixgbe_quiesce_vfs(sc);
4938 }
4939 ixgbe_reset_hw(hw);
4940 atomic_store_rel_int(&sc->ecc_reset_pending, 0);
4941 hw->adapter_stopped = false;
4942 ixgbe_stop_adapter(hw);
4943 /* Turn off the laser - noop with no optics */
4944 ixgbe_disable_tx_laser(hw);
4945
4946 /* Update the stack */
4947 sc->link_up = false;
4948 if (sc->link_active) {
4949 if (bootverbose)
4950 device_printf(sc->dev, "Link is Down\n");
4951 iflib_link_state_change(ctx, LINK_STATE_DOWN, 0);
4952 sc->link_active = false;
4953 }
4954
4955 /* reprogram the RAR[0] in case user changed it. */
4956 ixgbe_set_rar(&sc->hw, 0, sc->hw.mac.addr, 0, IXGBE_RAH_AV);
4957
4958 return;
4959 } /* ixgbe_if_stop */
4960
4961 /*
4962 * Identify the physical port while retaining the NVM-selected LED mode.
4963 * E610 exposes identification through firmware rather than LEDCTL.
4964 */
4965 static void
ixgbe_if_led_func(if_ctx_t ctx,int onoff)4966 ixgbe_if_led_func(if_ctx_t ctx, int onoff)
4967 {
4968 struct ixgbe_softc *sc;
4969 struct ixgbe_hw *hw;
4970
4971 sc = iflib_get_softc(ctx);
4972 hw = &sc->hw;
4973 if (!onoff) {
4974 ixgbe_led_restore(sc);
4975 return;
4976 }
4977 if (sc->led_active)
4978 return;
4979
4980 if (hw->mac.type == ixgbe_mac_E610) {
4981 if (ixgbe_aci_set_port_id_led(hw, false) == IXGBE_SUCCESS)
4982 sc->led_active = true;
4983 return;
4984 }
4985
4986 sc->ledctl_default = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
4987 if (ixgbe_led_on(hw, hw->mac.led_link_act) == IXGBE_SUCCESS)
4988 sc->led_active = true;
4989 }
4990
4991 static void
ixgbe_led_restore(struct ixgbe_softc * sc)4992 ixgbe_led_restore(struct ixgbe_softc *sc)
4993 {
4994 struct ixgbe_hw *hw;
4995
4996 if (!sc->led_active)
4997 return;
4998
4999 hw = &sc->hw;
5000 if (hw->mac.type == ixgbe_mac_E610) {
5001 (void)ixgbe_aci_set_port_id_led(hw, true);
5002 } else {
5003 /* Clear any PHY manual override before restoring LEDCTL. */
5004 (void)ixgbe_led_off(hw, hw->mac.led_link_act);
5005 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, sc->ledctl_default);
5006 IXGBE_WRITE_FLUSH(hw);
5007 }
5008 sc->led_active = false;
5009 }
5010
5011 /************************************************************************
5012 * ixgbe_link_speed_to_str - Convert link speed to string
5013 *
5014 * Helper function to convert link speed constants to human-readable
5015 * string representations in conventional Gbps or Mbps.
5016 ************************************************************************/
5017 static const char *
ixgbe_link_speed_to_str(u32 link_speed)5018 ixgbe_link_speed_to_str(u32 link_speed)
5019 {
5020 switch (link_speed) {
5021 case IXGBE_LINK_SPEED_10GB_FULL:
5022 return "10 Gbps";
5023 case IXGBE_LINK_SPEED_5GB_FULL:
5024 return "5 Gbps";
5025 case IXGBE_LINK_SPEED_2_5GB_FULL:
5026 return "2.5 Gbps";
5027 case IXGBE_LINK_SPEED_1GB_FULL:
5028 return "1 Gbps";
5029 case IXGBE_LINK_SPEED_100_FULL:
5030 return "100 Mbps";
5031 case IXGBE_LINK_SPEED_10_FULL:
5032 return "10 Mbps";
5033 default:
5034 return "Unknown";
5035 }
5036 } /* ixgbe_link_speed_to_str */
5037
5038 /************************************************************************
5039 * ixgbe_update_link_status - Update OS on link state
5040 *
5041 * Process deferred administrative requests and update the OS link state.
5042 ************************************************************************/
5043 static void
ixgbe_if_update_admin_status(if_ctx_t ctx)5044 ixgbe_if_update_admin_status(if_ctx_t ctx)
5045 {
5046 struct ixgbe_softc *sc = iflib_get_softc(ctx);
5047 device_t dev = iflib_get_dev(ctx);
5048 u32 requests;
5049 u_int pass;
5050 bool check_link = false;
5051
5052 /*
5053 * The interrupt filter and other producers can run concurrently with
5054 * this task. Claim each batch atomically so a request posted while the
5055 * task is running remains pending for this or the next invocation.
5056 *
5057 * MOD and firmware events can produce dependent requests. Fold those
5058 * into the claimed batch so link state is sampled after any link setup.
5059 */
5060 if ((if_getdrvflags(iflib_get_ifp(ctx)) & IFF_DRV_RUNNING) != 0 &&
5061 (sc->iov_mbx_cleanup_pending || ixgbe_mbx_pending(sc)))
5062 atomic_set_32(&sc->task_requests, IXGBE_REQUEST_TASK_MBX);
5063 for (pass = 0; pass < IXGBE_ADMIN_TASK_BUDGET; pass++) {
5064 requests = atomic_readandclear_32(&sc->task_requests);
5065 if (requests == 0)
5066 break;
5067 if (requests & IXGBE_REQUEST_TASK_FWEVENT)
5068 requests |= ixgbe_handle_fw_event(ctx);
5069 if (requests & IXGBE_REQUEST_TASK_MOD) {
5070 if (ixgbe_handle_mod(ctx))
5071 requests |= IXGBE_REQUEST_TASK_MSF;
5072 else
5073 requests &= ~IXGBE_REQUEST_TASK_MSF;
5074 }
5075 if (requests & IXGBE_REQUEST_TASK_MSF)
5076 ixgbe_handle_msf(ctx);
5077 /* A reset request can re-enable VF traffic; skip it while stopped. */
5078 if ((requests & IXGBE_REQUEST_TASK_MBX) != 0 &&
5079 (if_getdrvflags(iflib_get_ifp(ctx)) & IFF_DRV_RUNNING) != 0)
5080 ixgbe_handle_mbx(ctx);
5081 if (requests & IXGBE_REQUEST_TASK_FDIR)
5082 ixgbe_reinit_fdir(ctx);
5083 if (requests & IXGBE_REQUEST_TASK_PHY)
5084 ixgbe_handle_phy(ctx);
5085 if (requests & IXGBE_REQUEST_TASK_LSC)
5086 check_link = true;
5087 if (requests & IXGBE_REQUEST_TASK_RESET) {
5088 /* Re-enter the admin task so it observes IFC_DO_RESET. */
5089 iflib_request_reset(ctx);
5090 iflib_admin_intr_deferred(ctx);
5091 }
5092 }
5093
5094 /* Do not let a continuous producer monopolize the admin taskqueue. */
5095 if (atomic_load_acq_32(&sc->task_requests) != 0)
5096 iflib_admin_intr_deferred(ctx);
5097
5098 if (check_link)
5099 ixgbe_check_link(&sc->hw, &sc->link_speed, &sc->link_up,
5100 false);
5101
5102 if (sc->link_up) {
5103 if (sc->link_active == false) {
5104 if (bootverbose)
5105 device_printf(dev,
5106 "Link is up %s Full Duplex\n",
5107 ixgbe_link_speed_to_str(sc->link_speed));
5108 sc->link_active = true;
5109
5110 /* If link speed is <= 1Gbps and EEE is enabled,
5111 * log info.
5112 */
5113 if (sc->hw.mac.type == ixgbe_mac_E610 &&
5114 (sc->feat_en & IXGBE_FEATURE_EEE) &&
5115 sc->link_speed <= IXGBE_LINK_SPEED_1GB_FULL) {
5116 device_printf(sc->dev,
5117 "Energy Efficient Ethernet (EEE) feature "
5118 "is not supported on link speeds equal to "
5119 "or below 1Gbps. EEE is supported on "
5120 "speeds above 1Gbps.\n");
5121 }
5122
5123 /* Update any Flow Control changes */
5124 ixgbe_fc_enable(&sc->hw);
5125 /* Update DMA coalescing config */
5126 ixgbe_config_dmac(sc);
5127 iflib_link_state_change(ctx, LINK_STATE_UP,
5128 ixgbe_link_speed_to_baudrate(sc->link_speed));
5129
5130 if (sc->feat_en & IXGBE_FEATURE_SRIOV)
5131 ixgbe_ping_all_vfs(sc);
5132 }
5133 } else { /* Link down */
5134 if (sc->link_active == true) {
5135 if (bootverbose)
5136 device_printf(dev, "Link is Down\n");
5137 iflib_link_state_change(ctx, LINK_STATE_DOWN, 0);
5138 sc->link_active = false;
5139 if (sc->feat_en & IXGBE_FEATURE_SRIOV)
5140 ixgbe_ping_all_vfs(sc);
5141 }
5142 }
5143
5144 ixgbe_schedule_iov_recovery(sc);
5145
5146 ixgbe_update_stats_counters(sc);
5147 } /* ixgbe_if_update_admin_status */
5148
5149 /************************************************************************
5150 * ixgbe_config_dmac - Configure DMA Coalescing
5151 ************************************************************************/
5152 static void
ixgbe_config_dmac(struct ixgbe_softc * sc)5153 ixgbe_config_dmac(struct ixgbe_softc *sc)
5154 {
5155 struct ixgbe_hw *hw = &sc->hw;
5156 struct ixgbe_dmac_config *dcfg = &hw->mac.dmac_config;
5157
5158 if (hw->mac.type < ixgbe_mac_X550 || !hw->mac.ops.dmac_config)
5159 return;
5160
5161 if (dcfg->watchdog_timer ^ sc->dmac ||
5162 dcfg->link_speed ^ sc->link_speed) {
5163 dcfg->watchdog_timer = sc->dmac;
5164 dcfg->fcoe_en = false;
5165 dcfg->link_speed = sc->link_speed;
5166 dcfg->num_tcs = 1;
5167
5168 INIT_DEBUGOUT2("dmac settings: watchdog %d, link speed %d\n",
5169 dcfg->watchdog_timer, dcfg->link_speed);
5170
5171 hw->mac.ops.dmac_config(hw);
5172 }
5173 } /* ixgbe_config_dmac */
5174
5175 /************************************************************************
5176 * ixgbe_if_enable_intr
5177 ************************************************************************/
5178 void
ixgbe_if_enable_intr(if_ctx_t ctx)5179 ixgbe_if_enable_intr(if_ctx_t ctx)
5180 {
5181 struct ixgbe_softc *sc = iflib_get_softc(ctx);
5182 struct ixgbe_hw *hw = &sc->hw;
5183 struct ix_rx_queue *que = sc->rx_queues;
5184 u32 mask, fwsm;
5185
5186 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
5187
5188 switch (sc->hw.mac.type) {
5189 case ixgbe_mac_82599EB:
5190 mask |= IXGBE_EIMS_ECC;
5191 /* Temperature sensor on some scs */
5192 mask |= IXGBE_EIMS_GPI_SDP0;
5193 /* SFP+ (RX_LOS_N & MOD_ABS_N) */
5194 mask |= IXGBE_EIMS_GPI_SDP1;
5195 mask |= IXGBE_EIMS_GPI_SDP2;
5196 break;
5197 case ixgbe_mac_X540:
5198 /* Detect if Thermal Sensor is enabled */
5199 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM);
5200 if (fwsm & IXGBE_FWSM_TS_ENABLED)
5201 mask |= IXGBE_EIMS_TS;
5202 mask |= IXGBE_EIMS_ECC;
5203 break;
5204 case ixgbe_mac_X550:
5205 /* MAC thermal sensor is automatically enabled */
5206 mask |= IXGBE_EIMS_TS;
5207 mask |= IXGBE_EIMS_ECC;
5208 break;
5209 case ixgbe_mac_X550EM_x:
5210 case ixgbe_mac_X550EM_a:
5211 /* Some devices use SDP0 for important information */
5212 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
5213 hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
5214 hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N ||
5215 hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T)
5216 mask |= IXGBE_EIMS_GPI_SDP0_BY_MAC(hw);
5217 if (hw->phy.type == ixgbe_phy_x550em_ext_t)
5218 mask |= IXGBE_EICR_GPI_SDP0_X540;
5219 mask |= IXGBE_EIMS_ECC;
5220 break;
5221 case ixgbe_mac_E610:
5222 mask |= IXGBE_EIMS_FW_EVENT;
5223 break;
5224 default:
5225 break;
5226 }
5227
5228 /* Enable Fan Failure detection */
5229 if (sc->feat_en & IXGBE_FEATURE_FAN_FAIL)
5230 mask |= IXGBE_EIMS_GPI_SDP1;
5231 /* Enable SR-IOV */
5232 if (sc->feat_en & IXGBE_FEATURE_SRIOV)
5233 mask |= IXGBE_EIMS_MAILBOX;
5234 /* Enable Flow Director */
5235 if (sc->feat_en & IXGBE_FEATURE_FDIR)
5236 mask |= IXGBE_EIMS_FLOW_DIR;
5237 if (atomic_load_acq_int(&sc->ecc_reset_pending))
5238 mask &= ~IXGBE_EIMS_ECC;
5239
5240 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
5241
5242 /* With MSI-X we use auto clear */
5243 if (sc->intr_type == IFLIB_INTR_MSIX) {
5244 mask = IXGBE_EIMS_ENABLE_MASK;
5245 /* Don't autoclear Link */
5246 mask &= ~IXGBE_EIMS_OTHER;
5247 mask &= ~IXGBE_EIMS_LSC;
5248 mask &= ~IXGBE_EIMS_FW_EVENT;
5249 if (sc->feat_cap & IXGBE_FEATURE_SRIOV)
5250 mask &= ~IXGBE_EIMS_MAILBOX;
5251 IXGBE_WRITE_REG(hw, IXGBE_EIAC, mask);
5252 }
5253
5254 /*
5255 * Now enable all queues, this is done separately to
5256 * allow for handling the extended (beyond 32) MSI-X
5257 * vectors that can be used by 82599
5258 */
5259 for (int i = 0; i < sc->num_rx_queues; i++, que++)
5260 ixgbe_enable_queue(sc, que->msix);
5261
5262 IXGBE_WRITE_FLUSH(hw);
5263
5264 } /* ixgbe_if_enable_intr */
5265
5266 /************************************************************************
5267 * ixgbe_if_disable_intr
5268 ************************************************************************/
5269 static void
ixgbe_if_disable_intr(if_ctx_t ctx)5270 ixgbe_if_disable_intr(if_ctx_t ctx)
5271 {
5272 struct ixgbe_softc *sc = iflib_get_softc(ctx);
5273
5274 if (sc->intr_type == IFLIB_INTR_MSIX)
5275 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIAC, 0);
5276 if (sc->hw.mac.type == ixgbe_mac_82598EB) {
5277 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC, ~0);
5278 } else {
5279 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC, 0xFFFF0000);
5280 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC_EX(0), ~0);
5281 IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC_EX(1), ~0);
5282 }
5283 IXGBE_WRITE_FLUSH(&sc->hw);
5284
5285 } /* ixgbe_if_disable_intr */
5286
5287 /************************************************************************
5288 * ixgbe_link_intr_enable
5289 ************************************************************************/
5290 static void
ixgbe_link_intr_enable(if_ctx_t ctx)5291 ixgbe_link_intr_enable(if_ctx_t ctx)
5292 {
5293 struct ixgbe_hw *hw =
5294 &((struct ixgbe_softc *)iflib_get_softc(ctx))->hw;
5295
5296 /* Re-enable other interrupts */
5297 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC);
5298 } /* ixgbe_link_intr_enable */
5299
5300 /************************************************************************
5301 * ixgbe_if_rx_queue_intr_enable
5302 ************************************************************************/
5303 static int
ixgbe_if_rx_queue_intr_enable(if_ctx_t ctx,uint16_t rxqid)5304 ixgbe_if_rx_queue_intr_enable(if_ctx_t ctx, uint16_t rxqid)
5305 {
5306 struct ixgbe_softc *sc = iflib_get_softc(ctx);
5307 struct ix_rx_queue *que = &sc->rx_queues[rxqid];
5308
5309 ixgbe_enable_queue(sc, que->msix);
5310
5311 return (0);
5312 } /* ixgbe_if_rx_queue_intr_enable */
5313
5314 /************************************************************************
5315 * ixgbe_enable_queue
5316 ************************************************************************/
5317 static void
ixgbe_enable_queue(struct ixgbe_softc * sc,u32 vector)5318 ixgbe_enable_queue(struct ixgbe_softc *sc, u32 vector)
5319 {
5320 struct ixgbe_hw *hw = &sc->hw;
5321 u64 queue = 1ULL << vector;
5322 u32 mask;
5323
5324 if (hw->mac.type == ixgbe_mac_82598EB) {
5325 mask = (IXGBE_EIMS_RTX_QUEUE & queue);
5326 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
5327 } else {
5328 mask = (queue & 0xFFFFFFFF);
5329 if (mask)
5330 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
5331 mask = (queue >> 32);
5332 if (mask)
5333 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
5334 }
5335 } /* ixgbe_enable_queue */
5336
5337 /************************************************************************
5338 * ixgbe_disable_queue
5339 ************************************************************************/
5340 static void
ixgbe_disable_queue(struct ixgbe_softc * sc,u32 vector)5341 ixgbe_disable_queue(struct ixgbe_softc *sc, u32 vector)
5342 {
5343 struct ixgbe_hw *hw = &sc->hw;
5344 u64 queue = 1ULL << vector;
5345 u32 mask;
5346
5347 if (hw->mac.type == ixgbe_mac_82598EB) {
5348 mask = (IXGBE_EIMS_RTX_QUEUE & queue);
5349 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
5350 } else {
5351 mask = (queue & 0xFFFFFFFF);
5352 if (mask)
5353 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
5354 mask = (queue >> 32);
5355 if (mask)
5356 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
5357 }
5358 } /* ixgbe_disable_queue */
5359
5360 /************************************************************************
5361 * ixgbe_intr - Legacy Interrupt Service Routine
5362 ************************************************************************/
5363 int
ixgbe_intr(void * arg)5364 ixgbe_intr(void *arg)
5365 {
5366 struct ixgbe_softc *sc = arg;
5367 struct ix_rx_queue *que = sc->rx_queues;
5368 struct ixgbe_hw *hw = &sc->hw;
5369 if_ctx_t ctx = sc->ctx;
5370 u32 eicr, eicr_mask, requests;
5371
5372 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
5373 requests = 0;
5374
5375 ++que->irqs;
5376 if (eicr == 0) {
5377 ixgbe_if_enable_intr(ctx);
5378 return (FILTER_HANDLED);
5379 }
5380
5381 /* Check for fan failure */
5382 if ((sc->feat_en & IXGBE_FEATURE_FAN_FAIL) &&
5383 (eicr & IXGBE_EICR_GPI_SDP1)) {
5384 device_printf(sc->dev,
5385 "\nCRITICAL: FAN FAILURE!! REPLACE IMMEDIATELY!!\n");
5386 IXGBE_WRITE_REG(hw, IXGBE_EIMS,
5387 IXGBE_EICR_GPI_SDP1_BY_MAC(hw));
5388 }
5389
5390 /* Link status change */
5391 if (eicr & IXGBE_EICR_LSC) {
5392 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
5393 requests |= IXGBE_REQUEST_TASK_LSC;
5394 }
5395
5396 if (ixgbe_is_sfp(hw)) {
5397 /* Pluggable optics-related interrupt */
5398 if (hw->mac.type >= ixgbe_mac_X540)
5399 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
5400 else
5401 eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw);
5402
5403 if (eicr & eicr_mask) {
5404 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
5405 requests |= IXGBE_REQUEST_TASK_MOD;
5406 }
5407
5408 if ((hw->mac.type == ixgbe_mac_82599EB) &&
5409 (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) {
5410 IXGBE_WRITE_REG(hw, IXGBE_EICR,
5411 IXGBE_EICR_GPI_SDP1_BY_MAC(hw));
5412 requests |= IXGBE_REQUEST_TASK_MSF;
5413 }
5414 }
5415
5416 /* External PHY interrupt */
5417 if ((hw->phy.type == ixgbe_phy_x550em_ext_t) &&
5418 (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
5419 requests |= IXGBE_REQUEST_TASK_PHY;
5420 }
5421 if (hw->mac.type != ixgbe_mac_82598EB &&
5422 ixgbe_handle_ecc(sc, eicr))
5423 requests |= IXGBE_REQUEST_TASK_RESET;
5424 if (requests != 0) {
5425 atomic_set_32(&sc->task_requests, requests);
5426 iflib_admin_intr_deferred(ctx);
5427 }
5428
5429 return (FILTER_SCHEDULE_THREAD);
5430 } /* ixgbe_intr */
5431
5432 /************************************************************************
5433 * ixgbe_free_pci_resources
5434 ************************************************************************/
5435 static void
ixgbe_free_pci_resources(if_ctx_t ctx)5436 ixgbe_free_pci_resources(if_ctx_t ctx)
5437 {
5438 struct ixgbe_softc *sc = iflib_get_softc(ctx);
5439 struct ix_rx_queue *que = sc->rx_queues;
5440 device_t dev = iflib_get_dev(ctx);
5441
5442 /* Release all MSI-X queue resources */
5443 if (sc->intr_type == IFLIB_INTR_MSIX)
5444 iflib_irq_free(ctx, &sc->irq);
5445
5446 if (que != NULL) {
5447 for (int i = 0; i < sc->num_rx_queues; i++, que++) {
5448 iflib_irq_free(ctx, &que->que_irq);
5449 }
5450 }
5451
5452 if (sc->pci_mem != NULL)
5453 bus_release_resource(dev, SYS_RES_MEMORY,
5454 rman_get_rid(sc->pci_mem), sc->pci_mem);
5455 } /* ixgbe_free_pci_resources */
5456
5457 /************************************************************************
5458 * ixgbe_sysctl_flowcntl
5459 *
5460 * SYSCTL wrapper around setting Flow Control
5461 ************************************************************************/
5462 static int
ixgbe_sysctl_flowcntl(SYSCTL_HANDLER_ARGS)5463 ixgbe_sysctl_flowcntl(SYSCTL_HANDLER_ARGS)
5464 {
5465 struct ixgbe_softc *sc;
5466 struct sx *ctx_lock;
5467 int error, fc;
5468
5469 sc = (struct ixgbe_softc *)arg1;
5470 fc = sc->hw.fc.requested_mode;
5471
5472 error = sysctl_handle_int(oidp, &fc, 0, req);
5473 if ((error) || (req->newptr == NULL))
5474 return (error);
5475
5476 /* Serialize the live register update with the administrative task. */
5477 ctx_lock = iflib_ctx_lock_get(sc->ctx);
5478 sx_xlock(ctx_lock);
5479 if (fc == sc->hw.fc.requested_mode)
5480 error = 0;
5481 else
5482 error = ixgbe_set_flowcntl(sc, fc);
5483 sx_xunlock(ctx_lock);
5484 return (error);
5485 } /* ixgbe_sysctl_flowcntl */
5486
5487 /************************************************************************
5488 * ixgbe_set_flowcntl - Set flow control
5489 *
5490 * Flow control values:
5491 * 0 - off
5492 * 1 - rx pause
5493 * 2 - tx pause
5494 * 3 - full
5495 ************************************************************************/
5496 static int
ixgbe_set_flowcntl(struct ixgbe_softc * sc,int fc)5497 ixgbe_set_flowcntl(struct ixgbe_softc *sc, int fc)
5498 {
5499 bool enable_drop, mdd_active;
5500
5501 switch (fc) {
5502 case ixgbe_fc_rx_pause:
5503 case ixgbe_fc_tx_pause:
5504 case ixgbe_fc_full:
5505 enable_drop = false;
5506 break;
5507 case ixgbe_fc_none:
5508 enable_drop = true;
5509 break;
5510 default:
5511 return (EINVAL);
5512 }
5513
5514 /* Updating SRRCTL on a live queue is itself an MDD violation. */
5515 mdd_active = sc->num_rx_queues > 1 &&
5516 (sc->feat_en & IXGBE_FEATURE_SRIOV) != 0 &&
5517 (if_getdrvflags(iflib_get_ifp(sc->ctx)) & IFF_DRV_RUNNING) != 0;
5518 if (mdd_active)
5519 ixgbe_disable_mdd(&sc->hw);
5520 if (sc->num_rx_queues > 1) {
5521 if (enable_drop)
5522 ixgbe_enable_rx_drop(sc);
5523 else
5524 ixgbe_disable_rx_drop(sc);
5525 }
5526 if (mdd_active) {
5527 ixgbe_enable_mdd(&sc->hw);
5528 /* Service an event whose interrupt edge was lost while masked. */
5529 if (ixgbe_mbx_pending(sc)) {
5530 atomic_set_32(&sc->task_requests,
5531 IXGBE_REQUEST_TASK_MBX);
5532 iflib_admin_intr_deferred(sc->ctx);
5533 }
5534 }
5535
5536 sc->hw.fc.requested_mode = fc;
5537
5538 /* Don't autoneg if forcing a value */
5539 sc->hw.fc.disable_fc_autoneg = true;
5540 ixgbe_fc_enable(&sc->hw);
5541
5542 return (0);
5543 } /* ixgbe_set_flowcntl */
5544
5545 /************************************************************************
5546 * ixgbe_enable_rx_drop
5547 *
5548 * Enable the hardware to drop packets when the buffer is
5549 * full. This is useful with multiqueue, so that no single
5550 * queue being full stalls the entire RX engine. We only
5551 * enable this when Multiqueue is enabled AND Flow Control
5552 * is disabled.
5553 ************************************************************************/
5554 static void
ixgbe_enable_rx_drop(struct ixgbe_softc * sc)5555 ixgbe_enable_rx_drop(struct ixgbe_softc *sc)
5556 {
5557 struct ixgbe_hw *hw = &sc->hw;
5558 struct rx_ring *rxr;
5559 u32 srrctl;
5560
5561 for (int i = 0; i < sc->num_rx_queues; i++) {
5562 rxr = &sc->rx_queues[i].rxr;
5563 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me));
5564 srrctl |= IXGBE_SRRCTL_DROP_EN;
5565 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl);
5566 }
5567
5568 } /* ixgbe_enable_rx_drop */
5569
5570 /************************************************************************
5571 * ixgbe_disable_rx_drop
5572 ************************************************************************/
5573 static void
ixgbe_disable_rx_drop(struct ixgbe_softc * sc)5574 ixgbe_disable_rx_drop(struct ixgbe_softc *sc)
5575 {
5576 struct ixgbe_hw *hw = &sc->hw;
5577 struct rx_ring *rxr;
5578 u32 srrctl;
5579
5580 for (int i = 0; i < sc->num_rx_queues; i++) {
5581 rxr = &sc->rx_queues[i].rxr;
5582 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me));
5583 srrctl &= ~IXGBE_SRRCTL_DROP_EN;
5584 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl);
5585 }
5586
5587 } /* ixgbe_disable_rx_drop */
5588
5589 /************************************************************************
5590 * ixgbe_sysctl_advertise
5591 *
5592 * SYSCTL wrapper around setting advertised speed
5593 ************************************************************************/
5594 static int
ixgbe_sysctl_advertise(SYSCTL_HANDLER_ARGS)5595 ixgbe_sysctl_advertise(SYSCTL_HANDLER_ARGS)
5596 {
5597 struct ixgbe_softc *sc;
5598 int error, advertise;
5599
5600 sc = (struct ixgbe_softc *)arg1;
5601 if (atomic_load_acq_int(&sc->recovery_mode))
5602 return (EPERM);
5603
5604 advertise = sc->advertise;
5605
5606 error = sysctl_handle_int(oidp, &advertise, 0, req);
5607 if ((error) || (req->newptr == NULL))
5608 return (error);
5609
5610 return ixgbe_set_advertise(sc, advertise);
5611 } /* ixgbe_sysctl_advertise */
5612
5613 /************************************************************************
5614 * ixgbe_set_advertise - Control advertised link speed
5615 *
5616 * Flags:
5617 * 0x1 - advertise 100 Mb
5618 * 0x2 - advertise 1G
5619 * 0x4 - advertise 10G
5620 * 0x8 - advertise 10 Mb (yes, Mb)
5621 * 0x10 - advertise 2.5G (disabled by default)
5622 * 0x20 - advertise 5G (disabled by default)
5623 *
5624 ************************************************************************/
5625 static int
ixgbe_set_advertise(struct ixgbe_softc * sc,int advertise)5626 ixgbe_set_advertise(struct ixgbe_softc *sc, int advertise)
5627 {
5628 device_t dev = iflib_get_dev(sc->ctx);
5629 struct ixgbe_hw *hw;
5630 ixgbe_link_speed speed = 0;
5631 ixgbe_link_speed link_caps = 0;
5632 s32 err = IXGBE_NOT_IMPLEMENTED;
5633 bool negotiate = false;
5634
5635 /* Checks to validate new value */
5636 if (sc->advertise == advertise) /* no change */
5637 return (0);
5638
5639 hw = &sc->hw;
5640
5641 /* No speed changes for backplane media */
5642 if (hw->phy.media_type == ixgbe_media_type_backplane)
5643 return (ENODEV);
5644
5645 if (!((hw->phy.media_type == ixgbe_media_type_copper) ||
5646 (hw->phy.multispeed_fiber))) {
5647 device_printf(dev,
5648 "Advertised speed can only be set on copper or multispeed"
5649 " fiber media types.\n");
5650 return (EINVAL);
5651 }
5652
5653 if (advertise < 0x1 || advertise > 0x3F) {
5654 device_printf(dev,
5655 "Invalid advertised speed; valid modes are 0x1 through"
5656 " 0x3F\n");
5657 return (EINVAL);
5658 }
5659
5660 if (hw->mac.ops.get_link_capabilities) {
5661 err = hw->mac.ops.get_link_capabilities(hw, &link_caps,
5662 &negotiate);
5663 if (err != IXGBE_SUCCESS) {
5664 device_printf(dev,
5665 "Unable to determine supported advertise speeds"
5666 "\n");
5667 return (ENODEV);
5668 }
5669 }
5670
5671 /* Set new value and report new advertised mode */
5672 if (advertise & 0x1) {
5673 if (!(link_caps & IXGBE_LINK_SPEED_100_FULL)) {
5674 device_printf(dev,
5675 "Interface does not support 100Mb advertised"
5676 " speed\n");
5677 return (EINVAL);
5678 }
5679 speed |= IXGBE_LINK_SPEED_100_FULL;
5680 }
5681 if (advertise & 0x2) {
5682 if (!(link_caps & IXGBE_LINK_SPEED_1GB_FULL)) {
5683 device_printf(dev,
5684 "Interface does not support 1Gb advertised speed"
5685 "\n");
5686 return (EINVAL);
5687 }
5688 speed |= IXGBE_LINK_SPEED_1GB_FULL;
5689 }
5690 if (advertise & 0x4) {
5691 if (!(link_caps & IXGBE_LINK_SPEED_10GB_FULL)) {
5692 device_printf(dev,
5693 "Interface does not support 10Gb advertised speed"
5694 "\n");
5695 return (EINVAL);
5696 }
5697 speed |= IXGBE_LINK_SPEED_10GB_FULL;
5698 }
5699 if (advertise & 0x8) {
5700 if (!(link_caps & IXGBE_LINK_SPEED_10_FULL)) {
5701 device_printf(dev,
5702 "Interface does not support 10Mb advertised speed"
5703 "\n");
5704 return (EINVAL);
5705 }
5706 speed |= IXGBE_LINK_SPEED_10_FULL;
5707 }
5708 if (advertise & 0x10) {
5709 if (!(link_caps & IXGBE_LINK_SPEED_2_5GB_FULL)) {
5710 device_printf(dev,
5711 "Interface does not support 2.5G advertised speed"
5712 "\n");
5713 return (EINVAL);
5714 }
5715 speed |= IXGBE_LINK_SPEED_2_5GB_FULL;
5716 }
5717 if (advertise & 0x20) {
5718 if (!(link_caps & IXGBE_LINK_SPEED_5GB_FULL)) {
5719 device_printf(dev,
5720 "Interface does not support 5G advertised speed"
5721 "\n");
5722 return (EINVAL);
5723 }
5724 speed |= IXGBE_LINK_SPEED_5GB_FULL;
5725 }
5726
5727 hw->mac.autotry_restart = true;
5728 hw->mac.ops.setup_link(hw, speed, true);
5729 sc->advertise = advertise;
5730
5731 return (0);
5732 } /* ixgbe_set_advertise */
5733
5734 /************************************************************************
5735 * ixgbe_get_default_advertise - Get default advertised speed settings
5736 *
5737 * Formatted for sysctl usage.
5738 * Flags:
5739 * 0x1 - advertise 100 Mb
5740 * 0x2 - advertise 1G
5741 * 0x4 - advertise 10G
5742 * 0x8 - advertise 10 Mb (yes, Mb)
5743 * 0x10 - advertise 2.5G (disabled by default)
5744 * 0x20 - advertise 5G (disabled by default)
5745 ************************************************************************/
5746 static int
ixgbe_get_default_advertise(struct ixgbe_softc * sc)5747 ixgbe_get_default_advertise(struct ixgbe_softc *sc)
5748 {
5749 struct ixgbe_hw *hw = &sc->hw;
5750 int speed;
5751 ixgbe_link_speed link_caps = 0;
5752 s32 err;
5753 bool negotiate = false;
5754
5755 /*
5756 * Advertised speed means nothing unless it's copper or
5757 * multi-speed fiber
5758 */
5759 if (!(hw->phy.media_type == ixgbe_media_type_copper) &&
5760 !(hw->phy.multispeed_fiber))
5761 return (0);
5762
5763 err = hw->mac.ops.get_link_capabilities(hw, &link_caps, &negotiate);
5764 if (err != IXGBE_SUCCESS)
5765 return (0);
5766
5767 if (hw->mac.type == ixgbe_mac_X550) {
5768 /*
5769 * 2.5G and 5G autonegotiation speeds on X550
5770 * are disabled by default due to reported
5771 * interoperability issues with some switches.
5772 */
5773 link_caps &= ~(IXGBE_LINK_SPEED_2_5GB_FULL |
5774 IXGBE_LINK_SPEED_5GB_FULL);
5775 }
5776
5777 speed =
5778 ((link_caps & IXGBE_LINK_SPEED_10GB_FULL) ? 0x4 : 0) |
5779 ((link_caps & IXGBE_LINK_SPEED_5GB_FULL) ? 0x20 : 0) |
5780 ((link_caps & IXGBE_LINK_SPEED_2_5GB_FULL) ? 0x10 : 0) |
5781 ((link_caps & IXGBE_LINK_SPEED_1GB_FULL) ? 0x2 : 0) |
5782 ((link_caps & IXGBE_LINK_SPEED_100_FULL) ? 0x1 : 0) |
5783 ((link_caps & IXGBE_LINK_SPEED_10_FULL) ? 0x8 : 0);
5784
5785 return speed;
5786 } /* ixgbe_get_default_advertise */
5787
5788 /************************************************************************
5789 * ixgbe_sysctl_dmac - Manage DMA Coalescing
5790 *
5791 * Control values:
5792 * 0/1 - off / on (use default value of 1000)
5793 *
5794 * Legal timer values are:
5795 * 50,100,250,500,1000,2000,5000,10000
5796 *
5797 * Turning off interrupt moderation will also turn this off.
5798 ************************************************************************/
5799 static int
ixgbe_sysctl_dmac(SYSCTL_HANDLER_ARGS)5800 ixgbe_sysctl_dmac(SYSCTL_HANDLER_ARGS)
5801 {
5802 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1;
5803 if_t ifp = iflib_get_ifp(sc->ctx);
5804 int error;
5805 u16 newval;
5806
5807 newval = sc->dmac;
5808 error = sysctl_handle_16(oidp, &newval, 0, req);
5809 if ((error) || (req->newptr == NULL))
5810 return (error);
5811
5812 switch (newval) {
5813 case 0:
5814 /* Disabled */
5815 sc->dmac = 0;
5816 break;
5817 case 1:
5818 /* Enable and use default */
5819 sc->dmac = 1000;
5820 break;
5821 case 50:
5822 case 100:
5823 case 250:
5824 case 500:
5825 case 1000:
5826 case 2000:
5827 case 5000:
5828 case 10000:
5829 /* Legal values - allow */
5830 sc->dmac = newval;
5831 break;
5832 default:
5833 /* Do nothing, illegal value */
5834 return (EINVAL);
5835 }
5836
5837 /* Re-initialize hardware if it's already running */
5838 if (if_getdrvflags(ifp) & IFF_DRV_RUNNING)
5839 if_init(ifp, ifp);
5840
5841 return (0);
5842 } /* ixgbe_sysctl_dmac */
5843
5844 #ifdef IXGBE_DEBUG
5845 /************************************************************************
5846 * ixgbe_sysctl_power_state
5847 *
5848 * Sysctl to test power states
5849 * Values:
5850 * 0 - set device to D0
5851 * 3 - set device to D3
5852 * (none) - get current device power state
5853 ************************************************************************/
5854 static int
ixgbe_sysctl_power_state(SYSCTL_HANDLER_ARGS)5855 ixgbe_sysctl_power_state(SYSCTL_HANDLER_ARGS)
5856 {
5857 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1;
5858 device_t dev = sc->dev;
5859 int curr_ps, new_ps, error = 0;
5860
5861 curr_ps = new_ps = pci_get_powerstate(dev);
5862
5863 error = sysctl_handle_int(oidp, &new_ps, 0, req);
5864 if ((error) || (req->newptr == NULL))
5865 return (error);
5866
5867 if (new_ps == curr_ps)
5868 return (0);
5869
5870 if (new_ps == 3 && curr_ps == 0)
5871 error = DEVICE_SUSPEND(dev);
5872 else if (new_ps == 0 && curr_ps == 3)
5873 error = DEVICE_RESUME(dev);
5874 else
5875 return (EINVAL);
5876
5877 device_printf(dev, "New state: %d\n", pci_get_powerstate(dev));
5878
5879 return (error);
5880 } /* ixgbe_sysctl_power_state */
5881 #endif
5882
5883 /************************************************************************
5884 * ixgbe_sysctl_wol_enable
5885 *
5886 * Sysctl to enable/disable the WoL capability,
5887 * if supported by the adapter.
5888 *
5889 * Values:
5890 * 0 - disabled
5891 * 1 - enabled
5892 ************************************************************************/
5893 static int
ixgbe_sysctl_wol_enable(SYSCTL_HANDLER_ARGS)5894 ixgbe_sysctl_wol_enable(SYSCTL_HANDLER_ARGS)
5895 {
5896 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1;
5897 struct ixgbe_hw *hw = &sc->hw;
5898 int new_wol_enabled;
5899 int error = 0;
5900
5901 new_wol_enabled = hw->wol_enabled;
5902 error = sysctl_handle_int(oidp, &new_wol_enabled, 0, req);
5903 if ((error) || (req->newptr == NULL))
5904 return (error);
5905 new_wol_enabled = !!(new_wol_enabled);
5906 if (new_wol_enabled == hw->wol_enabled)
5907 return (0);
5908
5909 if (new_wol_enabled > 0 && !sc->wol_support)
5910 return (ENODEV);
5911 else
5912 hw->wol_enabled = new_wol_enabled;
5913
5914 return (0);
5915 } /* ixgbe_sysctl_wol_enable */
5916
5917 /************************************************************************
5918 * ixgbe_sysctl_wufc - Wake Up Filter Control
5919 *
5920 * Sysctl to enable/disable the types of packets that the
5921 * adapter will wake up on upon receipt.
5922 * Flags:
5923 * 0x1 - Link Status Change
5924 * 0x2 - Magic Packet
5925 * 0x4 - Direct Exact
5926 * 0x8 - Directed Multicast
5927 * 0x10 - Broadcast
5928 * 0x20 - ARP/IPv4 Request Packet
5929 * 0x40 - Direct IPv4 Packet
5930 * 0x80 - Direct IPv6 Packet
5931 *
5932 * Settings not listed above will cause the sysctl to return an error.
5933 ************************************************************************/
5934 static int
ixgbe_sysctl_wufc(SYSCTL_HANDLER_ARGS)5935 ixgbe_sysctl_wufc(SYSCTL_HANDLER_ARGS)
5936 {
5937 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1;
5938 int error = 0;
5939 u32 new_wufc;
5940
5941 new_wufc = sc->wufc;
5942
5943 error = sysctl_handle_32(oidp, &new_wufc, 0, req);
5944 if ((error) || (req->newptr == NULL))
5945 return (error);
5946 if (new_wufc == sc->wufc)
5947 return (0);
5948
5949 if (new_wufc & 0xffffff00)
5950 return (EINVAL);
5951
5952 new_wufc &= 0xff;
5953 new_wufc |= (0xffffff & sc->wufc);
5954 sc->wufc = new_wufc;
5955
5956 return (0);
5957 } /* ixgbe_sysctl_wufc */
5958
5959 #ifdef IXGBE_DEBUG
5960 /************************************************************************
5961 * ixgbe_sysctl_print_rss_config
5962 ************************************************************************/
5963 static int
ixgbe_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS)5964 ixgbe_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS)
5965 {
5966 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1;
5967 struct ixgbe_hw *hw = &sc->hw;
5968 device_t dev = sc->dev;
5969 struct sbuf *buf;
5970 int error = 0, reta_size;
5971 u32 reg;
5972
5973 if (atomic_load_acq_int(&sc->recovery_mode))
5974 return (EPERM);
5975
5976 buf = sbuf_new_for_sysctl(NULL, NULL, 128, req);
5977 if (!buf) {
5978 device_printf(dev, "Could not allocate sbuf for output.\n");
5979 return (ENOMEM);
5980 }
5981
5982 // TODO: use sbufs to make a string to print out
5983 /* Set multiplier for RETA setup and table size based on MAC */
5984 switch (sc->hw.mac.type) {
5985 case ixgbe_mac_X550:
5986 case ixgbe_mac_X550EM_x:
5987 case ixgbe_mac_X550EM_a:
5988 reta_size = 128;
5989 break;
5990 default:
5991 reta_size = 32;
5992 break;
5993 }
5994
5995 /* Print out the redirection table */
5996 sbuf_cat(buf, "\n");
5997 for (int i = 0; i < reta_size; i++) {
5998 if (i < 32) {
5999 reg = IXGBE_READ_REG(hw, IXGBE_RETA(i));
6000 sbuf_printf(buf, "RETA(%2d): 0x%08x\n", i, reg);
6001 } else {
6002 reg = IXGBE_READ_REG(hw, IXGBE_ERETA(i - 32));
6003 sbuf_printf(buf, "ERETA(%2d): 0x%08x\n", i - 32, reg);
6004 }
6005 }
6006
6007 // TODO: print more config
6008
6009 error = sbuf_finish(buf);
6010 if (error)
6011 device_printf(dev, "Error finishing sbuf: %d\n", error);
6012
6013 sbuf_delete(buf);
6014
6015 return (0);
6016 } /* ixgbe_sysctl_print_rss_config */
6017 #endif /* IXGBE_DEBUG */
6018
6019 /************************************************************************
6020 * ixgbe_sysctl_phy_temp - Retrieve temperature of PHY
6021 *
6022 * For X552/X557-AT devices using an external PHY
6023 ************************************************************************/
6024 static int
ixgbe_sysctl_phy_temp(SYSCTL_HANDLER_ARGS)6025 ixgbe_sysctl_phy_temp(SYSCTL_HANDLER_ARGS)
6026 {
6027 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1;
6028 struct ixgbe_hw *hw = &sc->hw;
6029 u16 reg;
6030
6031 if (atomic_load_acq_int(&sc->recovery_mode))
6032 return (EPERM);
6033
6034 if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) {
6035 device_printf(iflib_get_dev(sc->ctx),
6036 "Device has no supported external thermal sensor.\n");
6037 return (ENODEV);
6038 }
6039
6040 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_CURRENT_TEMP,
6041 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) {
6042 device_printf(iflib_get_dev(sc->ctx),
6043 "Error reading from PHY's current temperature register"
6044 "\n");
6045 return (EAGAIN);
6046 }
6047
6048 /* Shift temp for output */
6049 reg = reg >> 8;
6050
6051 return (sysctl_handle_16(oidp, NULL, reg, req));
6052 } /* ixgbe_sysctl_phy_temp */
6053
6054 /************************************************************************
6055 * ixgbe_sysctl_phy_overtemp_occurred
6056 *
6057 * Reports (directly from the PHY) whether the current PHY
6058 * temperature is over the overtemp threshold.
6059 ************************************************************************/
6060 static int
ixgbe_sysctl_phy_overtemp_occurred(SYSCTL_HANDLER_ARGS)6061 ixgbe_sysctl_phy_overtemp_occurred(SYSCTL_HANDLER_ARGS)
6062 {
6063 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1;
6064 struct ixgbe_hw *hw = &sc->hw;
6065 u16 reg;
6066
6067 if (atomic_load_acq_int(&sc->recovery_mode))
6068 return (EPERM);
6069
6070 if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) {
6071 device_printf(iflib_get_dev(sc->ctx),
6072 "Device has no supported external thermal sensor.\n");
6073 return (ENODEV);
6074 }
6075
6076 if (hw->phy.ops.read_reg(hw, IXGBE_PHY_OVERTEMP_STATUS,
6077 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, ®)) {
6078 device_printf(iflib_get_dev(sc->ctx),
6079 "Error reading from PHY's temperature status register\n");
6080 return (EAGAIN);
6081 }
6082
6083 /* Get occurrence bit */
6084 reg = !!(reg & 0x4000);
6085
6086 return (sysctl_handle_16(oidp, 0, reg, req));
6087 } /* ixgbe_sysctl_phy_overtemp_occurred */
6088
6089 /************************************************************************
6090 * ixgbe_sysctl_eee_state
6091 *
6092 * Sysctl to set EEE power saving feature
6093 * Values:
6094 * 0 - disable EEE
6095 * 1 - enable EEE
6096 * (none) - get current device EEE state
6097 ************************************************************************/
6098 static int
ixgbe_sysctl_eee_state(SYSCTL_HANDLER_ARGS)6099 ixgbe_sysctl_eee_state(SYSCTL_HANDLER_ARGS)
6100 {
6101 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1;
6102 device_t dev = sc->dev;
6103 if_t ifp = iflib_get_ifp(sc->ctx);
6104 int curr_eee, new_eee, error = 0;
6105 s32 retval;
6106
6107 if (atomic_load_acq_int(&sc->recovery_mode))
6108 return (EPERM);
6109
6110 curr_eee = new_eee = !!(sc->feat_en & IXGBE_FEATURE_EEE);
6111
6112 error = sysctl_handle_int(oidp, &new_eee, 0, req);
6113 if ((error) || (req->newptr == NULL))
6114 return (error);
6115
6116 /* Nothing to do */
6117 if (new_eee == curr_eee)
6118 return (0);
6119
6120 /* Not supported */
6121 if (!(sc->feat_cap & IXGBE_FEATURE_EEE))
6122 return (EINVAL);
6123
6124 /* Bounds checking */
6125 if ((new_eee < 0) || (new_eee > 1))
6126 return (EINVAL);
6127
6128 /* If link speed is <= 1Gbps and EEE is being enabled, log info */
6129 if (sc->hw.mac.type == ixgbe_mac_E610 &&
6130 new_eee &&
6131 sc->link_speed <= IXGBE_LINK_SPEED_1GB_FULL) {
6132 device_printf(dev,
6133 "Energy Efficient Ethernet (EEE) feature is not "
6134 "supported on link speeds equal to or below 1Gbps. "
6135 "EEE is supported on speeds above 1Gbps.\n");
6136 return (EINVAL);
6137 }
6138
6139 retval = ixgbe_setup_eee(&sc->hw, new_eee);
6140 if (retval) {
6141 device_printf(dev, "Error in EEE setup: 0x%08X\n", retval);
6142 return (EINVAL);
6143 }
6144
6145 /* Restart auto-neg */
6146 if_init(ifp, ifp);
6147
6148 device_printf(dev, "New EEE state: %d\n", new_eee);
6149
6150 /* Cache new value */
6151 if (new_eee)
6152 sc->feat_en |= IXGBE_FEATURE_EEE;
6153 else
6154 sc->feat_en &= ~IXGBE_FEATURE_EEE;
6155
6156 return (error);
6157 } /* ixgbe_sysctl_eee_state */
6158
6159 static int
ixgbe_sysctl_tso_tcp_flags_mask(SYSCTL_HANDLER_ARGS)6160 ixgbe_sysctl_tso_tcp_flags_mask(SYSCTL_HANDLER_ARGS)
6161 {
6162 struct ixgbe_softc *sc;
6163 u32 reg, val, shift;
6164 int error, mask;
6165
6166 sc = oidp->oid_arg1;
6167 switch (oidp->oid_arg2) {
6168 case 0:
6169 reg = IXGBE_DTXTCPFLGL;
6170 shift = 0;
6171 break;
6172 case 1:
6173 reg = IXGBE_DTXTCPFLGL;
6174 shift = 16;
6175 break;
6176 case 2:
6177 reg = IXGBE_DTXTCPFLGH;
6178 shift = 0;
6179 break;
6180 default:
6181 return (EINVAL);
6182 break;
6183 }
6184 val = IXGBE_READ_REG(&sc->hw, reg);
6185 mask = (val >> shift) & 0xfff;
6186 error = sysctl_handle_int(oidp, &mask, 0, req);
6187 if (error != 0 || req->newptr == NULL)
6188 return (error);
6189 if (mask < 0 || mask > 0xfff)
6190 return (EINVAL);
6191 val = (val & ~(0xfff << shift)) | (mask << shift);
6192 IXGBE_WRITE_REG(&sc->hw, reg, val);
6193 return (0);
6194 }
6195
6196 /************************************************************************
6197 * ixgbe_init_device_features
6198 ************************************************************************/
6199 static void
ixgbe_init_device_features(struct ixgbe_softc * sc)6200 ixgbe_init_device_features(struct ixgbe_softc *sc)
6201 {
6202 s32 error;
6203
6204 sc->feat_cap = IXGBE_FEATURE_NETMAP |
6205 IXGBE_FEATURE_RSS |
6206 IXGBE_FEATURE_MSI |
6207 IXGBE_FEATURE_MSIX |
6208 IXGBE_FEATURE_LEGACY_IRQ;
6209
6210 /* Set capabilities first... */
6211 switch (sc->hw.mac.type) {
6212 case ixgbe_mac_82598EB:
6213 if (sc->hw.device_id == IXGBE_DEV_ID_82598AT)
6214 sc->feat_cap |= IXGBE_FEATURE_FAN_FAIL;
6215 break;
6216 case ixgbe_mac_X540:
6217 sc->feat_cap |= IXGBE_FEATURE_SRIOV;
6218 sc->feat_cap |= IXGBE_FEATURE_FDIR;
6219 if ((sc->hw.device_id == IXGBE_DEV_ID_X540_BYPASS) &&
6220 (sc->hw.bus.func == 0))
6221 sc->feat_cap |= IXGBE_FEATURE_BYPASS;
6222 break;
6223 case ixgbe_mac_X550:
6224 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE;
6225 sc->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR;
6226 sc->feat_cap |= IXGBE_FEATURE_SRIOV;
6227 sc->feat_cap |= IXGBE_FEATURE_FDIR;
6228 break;
6229 case ixgbe_mac_X550EM_x:
6230 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE;
6231 sc->feat_cap |= IXGBE_FEATURE_SRIOV;
6232 sc->feat_cap |= IXGBE_FEATURE_FDIR;
6233 if (sc->hw.device_id == IXGBE_DEV_ID_X550EM_X_KR)
6234 sc->feat_cap |= IXGBE_FEATURE_EEE;
6235 break;
6236 case ixgbe_mac_X550EM_a:
6237 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE;
6238 sc->feat_cap |= IXGBE_FEATURE_SRIOV;
6239 sc->feat_cap |= IXGBE_FEATURE_FDIR;
6240 sc->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ;
6241 if ((sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T) ||
6242 (sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L)) {
6243 sc->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR;
6244 sc->feat_cap |= IXGBE_FEATURE_EEE;
6245 }
6246 break;
6247 case ixgbe_mac_82599EB:
6248 sc->feat_cap |= IXGBE_FEATURE_SRIOV;
6249 sc->feat_cap |= IXGBE_FEATURE_FDIR;
6250 if ((sc->hw.device_id == IXGBE_DEV_ID_82599_BYPASS) &&
6251 (sc->hw.bus.func == 0))
6252 sc->feat_cap |= IXGBE_FEATURE_BYPASS;
6253 if (sc->hw.device_id == IXGBE_DEV_ID_82599_QSFP_SF_QP)
6254 sc->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ;
6255 break;
6256 case ixgbe_mac_E610:
6257 sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE;
6258 sc->feat_cap |= IXGBE_FEATURE_SRIOV;
6259 sc->feat_cap |= IXGBE_FEATURE_DBG_DUMP;
6260 sc->feat_cap |= IXGBE_FEATURE_FW_LOGGING;
6261 error = ixgbe_get_caps(&sc->hw);
6262 if (error == 0 && sc->hw.func_caps.common_cap.eee_support != 0)
6263 sc->feat_cap |= IXGBE_FEATURE_EEE;
6264 break;
6265 default:
6266 break;
6267 }
6268
6269 /* Enabled by default... */
6270 /* Fan failure detection */
6271 if (sc->feat_cap & IXGBE_FEATURE_FAN_FAIL)
6272 sc->feat_en |= IXGBE_FEATURE_FAN_FAIL;
6273 /* Netmap */
6274 if (sc->feat_cap & IXGBE_FEATURE_NETMAP)
6275 sc->feat_en |= IXGBE_FEATURE_NETMAP;
6276 /* EEE */
6277 if (sc->feat_cap & IXGBE_FEATURE_EEE)
6278 sc->feat_en |= IXGBE_FEATURE_EEE;
6279 /* Thermal Sensor */
6280 if (sc->feat_cap & IXGBE_FEATURE_TEMP_SENSOR)
6281 sc->feat_en |= IXGBE_FEATURE_TEMP_SENSOR;
6282 /* Recovery mode */
6283 if (sc->feat_cap & IXGBE_FEATURE_RECOVERY_MODE)
6284 sc->feat_en |= IXGBE_FEATURE_RECOVERY_MODE;
6285 /* FW Debug Dump */
6286 if (sc->feat_cap & IXGBE_FEATURE_DBG_DUMP)
6287 sc->feat_en |= IXGBE_FEATURE_DBG_DUMP;
6288 /* FW Logging */
6289 if (sc->feat_cap & IXGBE_FEATURE_FW_LOGGING)
6290 sc->feat_en |= IXGBE_FEATURE_FW_LOGGING;
6291
6292 /* Enabled via global sysctl... */
6293 /* Flow Director */
6294 if (ixgbe_enable_fdir) {
6295 if (sc->feat_cap & IXGBE_FEATURE_FDIR)
6296 sc->feat_en |= IXGBE_FEATURE_FDIR;
6297 else
6298 device_printf(sc->dev,
6299 "Device does not support Flow Director."
6300 " Leaving disabled.");
6301 }
6302 /*
6303 * Message Signal Interrupts - Extended (MSI-X)
6304 * Normal MSI is only enabled if MSI-X calls fail.
6305 */
6306 if (!ixgbe_enable_msix)
6307 sc->feat_cap &= ~IXGBE_FEATURE_MSIX;
6308 /* Receive-Side Scaling (RSS) */
6309 if ((sc->feat_cap & IXGBE_FEATURE_RSS) && ixgbe_enable_rss)
6310 sc->feat_en |= IXGBE_FEATURE_RSS;
6311
6312 /* Disable features with unmet dependencies... */
6313 /* No MSI-X */
6314 if (!(sc->feat_cap & IXGBE_FEATURE_MSIX)) {
6315 sc->feat_cap &= ~IXGBE_FEATURE_RSS;
6316 sc->feat_cap &= ~IXGBE_FEATURE_SRIOV;
6317 sc->feat_en &= ~IXGBE_FEATURE_RSS;
6318 sc->feat_en &= ~IXGBE_FEATURE_SRIOV;
6319 }
6320 } /* ixgbe_init_device_features */
6321
6322 /************************************************************************
6323 * ixgbe_check_fan_failure
6324 ************************************************************************/
6325 static void
ixgbe_check_fan_failure(struct ixgbe_softc * sc,u32 reg,bool in_interrupt)6326 ixgbe_check_fan_failure(struct ixgbe_softc *sc, u32 reg, bool in_interrupt)
6327 {
6328 u32 mask;
6329
6330 mask = (in_interrupt) ? IXGBE_EICR_GPI_SDP1_BY_MAC(&sc->hw) :
6331 IXGBE_ESDP_SDP1;
6332
6333 if (reg & mask)
6334 device_printf(sc->dev,
6335 "\nCRITICAL: FAN FAILURE!! REPLACE IMMEDIATELY!!\n");
6336 } /* ixgbe_check_fan_failure */
6337
6338 /************************************************************************
6339 * ixgbe_sbuf_fw_version
6340 ************************************************************************/
6341 static void
ixgbe_sbuf_fw_version(struct ixgbe_hw * hw,struct sbuf * buf)6342 ixgbe_sbuf_fw_version(struct ixgbe_hw *hw, struct sbuf *buf)
6343 {
6344 struct ixgbe_nvm_version nvm_ver = {0};
6345 const char *space = "";
6346
6347 ixgbe_get_nvm_version(hw, &nvm_ver); /* NVM version */
6348 ixgbe_get_oem_prod_version(hw, &nvm_ver); /* OEM's NVM version */
6349 ixgbe_get_etk_id(hw, &nvm_ver); /* eTrack a build ID in Intel's SCM */
6350 ixgbe_get_orom_version(hw, &nvm_ver); /* Option ROM */
6351
6352 /* FW version */
6353 if ((nvm_ver.phy_fw_maj == 0x0 &&
6354 nvm_ver.phy_fw_min == 0x0 &&
6355 nvm_ver.phy_fw_id == 0x0) ||
6356 (nvm_ver.phy_fw_maj == 0xF &&
6357 nvm_ver.phy_fw_min == 0xFF &&
6358 nvm_ver.phy_fw_id == 0xF)) {
6359 /* If major, minor and id numbers are set to 0,
6360 * reading FW version is unsupported. If major number
6361 * is set to 0xF, minor is set to 0xFF and id is set
6362 * to 0xF, this means that number read is invalid. */
6363 } else
6364 sbuf_printf(buf, "fw %d.%d.%d ",
6365 nvm_ver.phy_fw_maj, nvm_ver.phy_fw_min,
6366 nvm_ver.phy_fw_id);
6367
6368 /* NVM version */
6369 if ((nvm_ver.nvm_major == 0x0 &&
6370 nvm_ver.nvm_minor == 0x0 &&
6371 nvm_ver.nvm_id == 0x0) ||
6372 (nvm_ver.nvm_major == 0xF &&
6373 nvm_ver.nvm_minor == 0xFF &&
6374 nvm_ver.nvm_id == 0xF)) {
6375 /* If major, minor and id numbers are set to 0,
6376 * reading NVM version is unsupported. If major number
6377 * is set to 0xF, minor is set to 0xFF and id is set
6378 * to 0xF, this means that number read is invalid. */
6379 } else
6380 sbuf_printf(buf, "nvm %x.%02x.%x ",
6381 nvm_ver.nvm_major, nvm_ver.nvm_minor, nvm_ver.nvm_id);
6382
6383 if (nvm_ver.oem_valid) {
6384 sbuf_printf(buf, "NVM OEM V%d.%d R%d", nvm_ver.oem_major,
6385 nvm_ver.oem_minor, nvm_ver.oem_release);
6386 space = " ";
6387 }
6388
6389 if (nvm_ver.or_valid) {
6390 sbuf_printf(buf, "%sOption ROM V%d-b%d-p%d",
6391 space, nvm_ver.or_major, nvm_ver.or_build,
6392 nvm_ver.or_patch);
6393 space = " ";
6394 }
6395
6396 if (nvm_ver.etk_id != ((NVM_VER_INVALID << NVM_ETK_SHIFT) |
6397 NVM_VER_INVALID | 0xFFFFFFFF)) {
6398 sbuf_printf(buf, "%seTrack 0x%08x", space, nvm_ver.etk_id);
6399 }
6400 } /* ixgbe_sbuf_fw_version */
6401
6402 /************************************************************************
6403 * ixgbe_print_fw_version
6404 ************************************************************************/
6405 static void
ixgbe_print_fw_version(if_ctx_t ctx)6406 ixgbe_print_fw_version(if_ctx_t ctx)
6407 {
6408 struct ixgbe_softc *sc = iflib_get_softc(ctx);
6409 struct ixgbe_hw *hw = &sc->hw;
6410 device_t dev = sc->dev;
6411 struct sbuf *buf;
6412 int error = 0;
6413
6414 buf = sbuf_new_auto();
6415 if (!buf) {
6416 device_printf(dev, "Could not allocate sbuf for output.\n");
6417 return;
6418 }
6419
6420 ixgbe_sbuf_fw_version(hw, buf);
6421
6422 error = sbuf_finish(buf);
6423 if (error)
6424 device_printf(dev, "Error finishing sbuf: %d\n", error);
6425 else if (sbuf_len(buf))
6426 device_printf(dev, "%s\n", sbuf_data(buf));
6427
6428 sbuf_delete(buf);
6429 } /* ixgbe_print_fw_version */
6430
6431 /************************************************************************
6432 * ixgbe_sysctl_print_fw_version
6433 ************************************************************************/
6434 static int
ixgbe_sysctl_print_fw_version(SYSCTL_HANDLER_ARGS)6435 ixgbe_sysctl_print_fw_version(SYSCTL_HANDLER_ARGS)
6436 {
6437 struct ixgbe_softc *sc = (struct ixgbe_softc *)arg1;
6438 struct ixgbe_hw *hw = &sc->hw;
6439 device_t dev = sc->dev;
6440 struct sbuf *buf;
6441 int error = 0;
6442
6443 buf = sbuf_new_for_sysctl(NULL, NULL, 128, req);
6444 if (!buf) {
6445 device_printf(dev, "Could not allocate sbuf for output.\n");
6446 return (ENOMEM);
6447 }
6448
6449 ixgbe_sbuf_fw_version(hw, buf);
6450
6451 error = sbuf_finish(buf);
6452 if (error)
6453 device_printf(dev, "Error finishing sbuf: %d\n", error);
6454
6455 sbuf_delete(buf);
6456
6457 return (0);
6458 } /* ixgbe_sysctl_print_fw_version */
6459