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Searched defs:reg_name (Results 1 – 25 of 133) sorted by relevance

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/linux/drivers/gpu/drm/amd/display/dmub/src/
H A Ddmub_reg.h37 #define REG_OFFSET(reg_name) (BASE(mm##reg_name##_BASE_IDX) + mm##reg_name) argument
39 #define FD_SHIFT(reg_name, field) reg_name##__##field##__SHIFT argument
41 #define FD_MASK(reg_name, field) reg_name##__##field##_MASK argument
47 #define FN(reg_name, field) FD(reg_name##__##field) argument
58 #define REG_SET_N(reg_name, n, initial_val, ...) \ argument
61 #define REG_SET(reg_name, initial_val, field, val) \ argument
85 #define REG_UPDATE_N(reg_name, n, ...)\ argument
88 #define REG_UPDATE(reg_name, field, val) \ argument
111 #define REG_GET(reg_name, field, val) \ argument
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn32/
H A Dhw_factory_dcn32.c59 #define REG(reg_name)\ argument
62 #define SF_HPD(reg_name, field_name, post_fix)\ argument
65 #define REGI(reg_name, block, id)\ argument
69 #define SF(reg_name, field_name, post_fix)\ argument
101 #define SF_DDC(reg_name, field_name, post_fix)\ argument
169 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn30/
H A Dhw_factory_dcn30.c66 #define REG(reg_name)\ argument
69 #define SF_HPD(reg_name, field_name, post_fix)\ argument
72 #define REGI(reg_name, block, id)\ argument
76 #define SF(reg_name, field_name, post_fix)\ argument
109 #define SF_DDC(reg_name, field_name, post_fix)\ argument
165 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn21/
H A Dhw_factory_dcn21.c57 #define REG(reg_name)\ argument
60 #define SF_HPD(reg_name, field_name, post_fix)\ argument
63 #define REGI(reg_name, block, id)\ argument
67 #define SF(reg_name, field_name, post_fix)\ argument
99 #define SF_DDC(reg_name, field_name, post_fix)\ argument
139 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn20/
H A Dhw_factory_dcn20.c59 #define REG(reg_name)\ argument
62 #define SF_HPD(reg_name, field_name, post_fix)\ argument
65 #define REGI(reg_name, block, id)\ argument
69 #define SF(reg_name, field_name, post_fix)\ argument
102 #define SF_DDC(reg_name, field_name, post_fix)\ argument
158 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn401/
H A Dhw_factory_dcn401.c39 #define REG(reg_name)\ argument
42 #define SF_HPD(reg_name, field_name, post_fix)\ argument
45 #define REGI(reg_name, block, id)\ argument
49 #define SF(reg_name, field_name, post_fix)\ argument
81 #define SF_DDC(reg_name, field_name, post_fix)\ argument
161 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn315/
H A Dhw_factory_dcn315.c63 #define REG(reg_name)\ argument
66 #define SF_HPD(reg_name, field_name, post_fix)\ argument
69 #define REGI(reg_name, block, id)\ argument
73 #define SF(reg_name, field_name, post_fix)\ argument
105 #define SF_DDC(reg_name, field_name, post_fix)\ argument
157 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
/linux/drivers/gpu/drm/amd/display/dc/gpio/dce120/
H A Dhw_factory_dce120.c46 #define SF_HPD(reg_name, field_name, post_fix)\ argument
50 #define SF_HPD(reg_name, field_name, post_fix)\ argument
60 #define REG(reg_name)\ argument
63 #define REGI(reg_name, block, id)\ argument
96 #define SF_DDC(reg_name, field_name, post_fix)\ argument
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn60/
H A Ddcn60_resource.c116 REG_STRUCT.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \ argument
119 REG_STRUCT[id].reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \ argument
110 SR(reg_name) global() argument
113 SR_ARR(reg_name,id) global() argument
123 SRI_ARR(reg_name,block,id) global() argument
127 SRI_ARR_DDC(reg_name,block,id) global() argument
134 SRI_ARR_US(reg_name,block,id) global() argument
137 SR_ARR_I2C(reg_name,id) global() argument
140 SRI_ARR_I2C(reg_name,block,id) global() argument
144 SRI_ARR_DME(reg_name,block,id,offset) global() argument
148 SRI_ARR_ALPHABET(reg_name,block,index,id) global() argument
152 SRI2(reg_name,block,id) global() argument
155 SRI2_ARR(reg_name,block,id) global() argument
159 SRIR(var_name,reg_name,block,id) global() argument
163 SRII(reg_name,block,id) global() argument
167 SRII_ARR_2(reg_name,block,id,inst) global() argument
171 SRII_MPC_RMU(reg_name,block,id) global() argument
175 SRII_DWB(reg_name,temp_name,block,id) global() argument
179 DCCG_SRII(reg_name,block,id) global() argument
183 SF_DWB2(reg_name,block,id,field_name,post_fix) global() argument
186 VUPDATE_SRII(reg_name,block,id) global() argument
202 NBIO_SR(reg_name) global() argument
205 NBIO_SR_ARR(reg_name,id) global() argument
210 REG(reg_name) global() argument
[all...]
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn10/
H A Dhw_factory_dcn10.c47 #define SF_HPD(reg_name, field_name, post_fix)\ argument
57 #define REG(reg_name)\ argument
60 #define REGI(reg_name, block, id)\ argument
92 #define SF_DDC(reg_name, field_name, post_fix)\ argument
128 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn321/
H A Ddcn321_resource.c121 #define SR(reg_name)\ argument
124 #define SR_ARR(reg_name, id)\ argument
127 #define SR_ARR_INIT(reg_name, id, value)\ argument
130 #define SRI(reg_name, block, id)\ argument
134 #define SRI_ARR(reg_name, block, id)\ argument
138 #define SR_ARR_I2C(reg_name, id) \ argument
141 #define SRI_ARR_I2C(reg_name, block, id)\ argument
145 #define SRI_ARR_DME(reg_name, block, id, offset)\ argument
149 #define SRI_ARR_ALPHABET(reg_name, block, index, id)\ argument
153 #define SRI2(reg_name, block, id)\ argument
[all …]
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/
H A Ddcn401_resource.c103 #define SR(reg_name)\ argument
106 #define SR_ARR(reg_name, id)\ argument
109 #define SR_ARR_INIT(reg_name, id, value)\ argument
112 SRI(reg_name,block,id) global() argument
116 SRI_ARR(reg_name,block,id) global() argument
123 SRI_ARR_US(reg_name,block,id) global() argument
126 SR_ARR_I2C(reg_name,id) global() argument
129 SRI_ARR_I2C(reg_name,block,id) global() argument
133 SRI_ARR_DME(reg_name,block,id,offset) global() argument
137 SRI_ARR_ALPHABET(reg_name,block,index,id) global() argument
141 SRI2(reg_name,block,id) global() argument
144 SRI2_ARR(reg_name,block,id) global() argument
148 SRIR(var_name,reg_name,block,id) global() argument
152 SRII(reg_name,block,id) global() argument
156 SRII_ARR_2(reg_name,block,id,inst) global() argument
160 SRII_MPC_RMU(reg_name,block,id) global() argument
164 SRII_DWB(reg_name,temp_name,block,id) global() argument
168 DCCG_SRII(reg_name,block,id) global() argument
172 SF_DWB2(reg_name,block,id,field_name,post_fix) global() argument
175 VUPDATE_SRII(reg_name,block,id) global() argument
185 NBIO_SR(reg_name) global() argument
188 NBIO_SR_ARR(reg_name,id) global() argument
193 REG(reg_name) global() argument
[all...]
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn42/
H A Ddcn42_resource.c120 reg##reg_name argument
123 reg##reg_name argument
117 SR(reg_name) global() argument
126 SRI(reg_name,block,id) global() argument
130 SRI_ARR(reg_name,block,id) global() argument
137 SRI_ARR_US(reg_name,block,id) global() argument
140 SR_ARR_I2C(reg_name,id) global() argument
143 SRI_ARR_I2C(reg_name,block,id) global() argument
147 SRI_ARR_DME(reg_name,block,id,offset) global() argument
151 SRI_ARR_ALPHABET(reg_name,block,index,id) global() argument
155 SRI2(reg_name,block,id) global() argument
158 SRI2_ARR(reg_name,block,id) global() argument
162 SRIR(var_name,reg_name,block,id) global() argument
166 SRII(reg_name,block,id) global() argument
170 SRII_ARR_2(reg_name,block,id,inst) global() argument
174 SRII_MPC_RMU(reg_name,block,id) global() argument
178 SRII_DWB(reg_name,temp_name,block,id) global() argument
183 DCCG_SRII(reg_name,block,id) global() argument
188 SF_DWB2(reg_name,block,id,field_name,post_fix) global() argument
191 VUPDATE_SRII(reg_name,block,id) global() argument
201 NBIO_SR(reg_name) global() argument
204 NBIO_SR_ARR(reg_name,id) global() argument
209 REG(reg_name) global() argument
[all...]
/linux/drivers/gpu/drm/amd/display/dc/gpio/dce110/
H A Dhw_factory_dce110.c42 #define SF_HPD(reg_name, field_name, post_fix)\ argument
45 #define REG(reg_name)\ argument
48 #define REGI(reg_name, block, id)\ argument
79 #define SF_DDC(reg_name, field_name, post_fix)\ argument
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn42b/
H A Ddcn42b_resource.c185 reg##reg_name argument
188 reg##reg_name argument
182 SR(reg_name) global() argument
191 SRI(reg_name,block,id) global() argument
195 SRI_ARR(reg_name,block,id) global() argument
202 SRI_ARR_US(reg_name,block,id) global() argument
205 SR_ARR_I2C(reg_name,id) global() argument
208 SRI_ARR_I2C(reg_name,block,id) global() argument
212 SRI_ARR_ALPHABET(reg_name,block,index,id) global() argument
216 SRI2(reg_name,block,id) global() argument
219 SRI2_ARR(reg_name,block,id) global() argument
223 SRIR(var_name,reg_name,block,id) global() argument
227 SRII(reg_name,block,id) global() argument
231 SRII_ARR_2(reg_name,block,id,inst) global() argument
235 SRII_MPC_RMU(reg_name,block,id) global() argument
239 SRII_DWB(reg_name,temp_name,block,id) global() argument
244 DCCG_SRII(reg_name,block,id) global() argument
249 SF_DWB2(reg_name,block,id,field_name,post_fix) global() argument
252 VUPDATE_SRII(reg_name,block,id) global() argument
262 NBIO_SR(reg_name) global() argument
265 NBIO_SR_ARR(reg_name,id) global() argument
270 REG(reg_name) global() argument
[all...]
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn36/
H A Ddcn36_resource.c120 #define SR(reg_name)\ argument
124 #define SR_ARR(reg_name, id) \ argument
127 #define SR_ARR_INIT(reg_name, id, value) \ argument
130 SRI(reg_name,block,id) global() argument
134 SRI_ARR(reg_name,block,id) global() argument
138 SR_ARR_I2C(reg_name,id) global() argument
141 SRI_ARR_I2C(reg_name,block,id) global() argument
145 SRI_ARR_DME(reg_name,block,id,offset) global() argument
149 SRI_ARR_ALPHABET(reg_name,block,index,id) global() argument
153 SRI2(reg_name,block,id) global() argument
157 SRI2_ARR(reg_name,block,id) global() argument
161 SRIR(var_name,reg_name,block,id) global() argument
165 SRII(reg_name,block,id) global() argument
169 SRII_ARR_2(reg_name,block,id,inst) global() argument
173 SRII_MPC_RMU(reg_name,block,id) global() argument
177 SRII_DWB(reg_name,temp_name,block,id) global() argument
181 SF_DWB2(reg_name,block,id,field_name,post_fix) global() argument
184 DCCG_SRII(reg_name,block,id) global() argument
188 VUPDATE_SRII(reg_name,block,id) global() argument
198 NBIO_SR(reg_name) global() argument
202 NBIO_SR_ARR(reg_name,id) global() argument
[all...]
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn35/
H A Ddcn35_resource.c135 #define SR(reg_name)\ argument
139 #define SR_ARR(reg_name, id) \ argument
142 #define SR_ARR_INIT(reg_name, id, value) \ argument
145 SRI(reg_name,block,id) global() argument
149 SRI_ARR(reg_name,block,id) global() argument
153 SR_ARR_I2C(reg_name,id) global() argument
156 SRI_ARR_I2C(reg_name,block,id) global() argument
160 SRI_ARR_DME(reg_name,block,id,offset) global() argument
164 SRI_ARR_ALPHABET(reg_name,block,index,id) global() argument
168 SRI2(reg_name,block,id) global() argument
172 SRI2_ARR(reg_name,block,id) global() argument
176 SRIR(var_name,reg_name,block,id) global() argument
180 SRII(reg_name,block,id) global() argument
184 SRII_ARR_2(reg_name,block,id,inst) global() argument
188 SRII_MPC_RMU(reg_name,block,id) global() argument
192 SRII_DWB(reg_name,temp_name,block,id) global() argument
196 SF_DWB2(reg_name,block,id,field_name,post_fix) global() argument
199 DCCG_SRII(reg_name,block,id) global() argument
203 VUPDATE_SRII(reg_name,block,id) global() argument
213 NBIO_SR(reg_name) global() argument
217 NBIO_SR_ARR(reg_name,id) global() argument
[all...]
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn351/
H A Ddcn351_resource.c115 #define SR(reg_name)\ argument
119 #define SR_ARR(reg_name, id) \ argument
122 #define SR_ARR_INIT(reg_name, id, value) \ argument
125 SRI(reg_name,block,id) global() argument
129 SRI_ARR(reg_name,block,id) global() argument
133 SR_ARR_I2C(reg_name,id) global() argument
136 SRI_ARR_I2C(reg_name,block,id) global() argument
140 SRI_ARR_DME(reg_name,block,id,offset) global() argument
144 SRI_ARR_ALPHABET(reg_name,block,index,id) global() argument
148 SRI2(reg_name,block,id) global() argument
152 SRI2_ARR(reg_name,block,id) global() argument
156 SRIR(var_name,reg_name,block,id) global() argument
160 SRII(reg_name,block,id) global() argument
164 SRII_ARR_2(reg_name,block,id,inst) global() argument
168 SRII_MPC_RMU(reg_name,block,id) global() argument
172 SRII_DWB(reg_name,temp_name,block,id) global() argument
176 SF_DWB2(reg_name,block,id,field_name,post_fix) global() argument
179 DCCG_SRII(reg_name,block,id) global() argument
183 VUPDATE_SRII(reg_name,block,id) global() argument
193 NBIO_SR(reg_name) global() argument
197 NBIO_SR_ARR(reg_name,id) global() argument
[all...]
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.c126 #define SR(reg_name)\ argument
129 #define SR_ARR(reg_name, id) \ argument
132 #define SR_ARR_INIT(reg_name, id, value) \ argument
135 SRI(reg_name,block,id) global() argument
139 SRI_ARR(reg_name,block,id) global() argument
143 SR_ARR_I2C(reg_name,id) global() argument
146 SRI_ARR_I2C(reg_name,block,id) global() argument
150 SRI_ARR_DME(reg_name,block,id,offset) global() argument
154 SRI_ARR_ALPHABET(reg_name,block,index,id) global() argument
158 SRI2(reg_name,block,id) global() argument
161 SRI2_ARR(reg_name,block,id) global() argument
165 SRIR(var_name,reg_name,block,id) global() argument
169 SRII(reg_name,block,id) global() argument
173 SRII_ARR_2(reg_name,block,id,inst) global() argument
177 SRII_MPC_RMU(reg_name,block,id) global() argument
181 SRII_DWB(reg_name,temp_name,block,id) global() argument
185 SF_DWB2(reg_name,block,id,field_name,post_fix) global() argument
188 DCCG_SRII(reg_name,block,id) global() argument
192 VUPDATE_SRII(reg_name,block,id) global() argument
202 NBIO_SR(reg_name) global() argument
205 NBIO_SR_ARR(reg_name,id) global() argument
211 REG(reg_name) global() argument
[all...]
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn303/
H A Ddcn303_resource.c172 #define NBIO_SR(reg_name)\ argument
181 #define SR(reg_name)\ argument
184 #define SF(reg_name, field_name, post_fix)\ argument
187 #define SRI(reg_name, block, id)\ argument
190 #define SRI2(reg_name, block, id)\ argument
193 #define SRII(reg_name, block, id)\ argument
197 #define DCCG_SRII(reg_name, block, id)\ argument
201 #define VUPDATE_SRII(reg_name, block, id)\ argument
205 #define SRII_DWB(reg_name, temp_name, block, id)\ argument
209 #define SF_DWB2(reg_name, block, id, field_name, post_fix) \ argument
[all …]
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn302/
H A Ddcn302_resource.c176 #define NBIO_SR(reg_name)\ argument
185 #define SR(reg_name)\ argument
188 #define SF(reg_name, field_name, post_fix)\ argument
191 #define SRI(reg_name, block, id)\ argument
194 #define SRI2(reg_name, block, id)\ argument
197 #define SRII(reg_name, block, id)\ argument
201 #define DCCG_SRII(reg_name, block, id)\ argument
205 #define VUPDATE_SRII(reg_name, block, id)\ argument
209 #define SRII_DWB(reg_name, temp_name, block, id)\ argument
213 #define SF_DWB2(reg_name, block, id, field_name, post_fix) \ argument
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_panel_cntl.h32 #define DCE_PANEL_CNTL_SR(reg_name, block)\ argument
45 #define DCN_PANEL_CNTL_SR(reg_name, block)\ argument
59 #define DCE_PANEL_CNTL_SF(reg_name, field_name, post_fix)\ argument
/linux/drivers/media/i2c/ccs/
H A Dccs-reg-access.h33 #define ccs_read(sensor, reg_name, val) \ argument
36 #define ccs_write(sensor, reg_name, val) \ argument
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn314/
H A Ddcn314_resource.c149 #define SR(reg_name)\ argument
153 #define SRI(reg_name, block, id)\ argument
157 #define SRI2(reg_name, block, id)\ argument
161 #define SRIR(var_name, reg_name, block, id)\ argument
165 #define SRII(reg_name, block, id)\ argument
169 #define SRII_MPC_RMU(reg_name, block, id)\ argument
173 #define SRII_DWB(reg_name, temp_name, block, id)\ argument
177 #define SF_DWB2(reg_name, block, id, field_name, post_fix) \ argument
180 #define DCCG_SRII(reg_name, block, id)\ argument
184 #define VUPDATE_SRII(reg_name, block, id)\ argument
[all …]
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/
H A Ddcn31_resource.c132 #define SR(reg_name)\ argument
136 #define SRI(reg_name, block, id)\ argument
140 #define SRI2(reg_name, block, id)\ argument
144 #define SRIR(var_name, reg_name, block, id)\ argument
148 #define SRII(reg_name, block, id)\ argument
152 #define SRII_MPC_RMU(reg_name, block, id)\ argument
156 #define SRII_DWB(reg_name, temp_name, block, id)\ argument
160 #define SF_DWB2(reg_name, block, id, field_name, post_fix) \ argument
163 #define DCCG_SRII(reg_name, block, id)\ argument
167 #define VUPDATE_SRII(reg_name, block, id)\ argument
[all …]

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