| /linux/drivers/gpu/drm/amd/display/dmub/src/ |
| H A D | dmub_reg.h | 37 #define REG_OFFSET(reg_name) (BASE(mm##reg_name##_BASE_IDX) + mm##reg_name) argument
39 #define FD_SHIFT(reg_name, field) reg_name##__##field##__SHIFT argument
41 #define FD_MASK(reg_name, field) reg_name##__##field##_MASK argument
47 #define FN(reg_name, field) FD(reg_name##__##field) argument
58 #define REG_SET_N(reg_name, n, initial_val, ...) \ argument
61 #define REG_SET(reg_name, initial_val, field, val) \ argument
85 #define REG_UPDATE_N(reg_name, n, ...)\ argument
88 #define REG_UPDATE(reg_name, field, val) \ argument
111 #define REG_GET(reg_name, field, val) \ argument
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn32/ |
| H A D | hw_factory_dcn32.c | 59 #define REG(reg_name)\ argument
62 #define SF_HPD(reg_name, field_name, post_fix)\ argument
65 #define REGI(reg_name, block, id)\ argument
69 #define SF(reg_name, field_name, post_fix)\ argument
101 #define SF_DDC(reg_name, field_name, post_fix)\ argument
169 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn30/ |
| H A D | hw_factory_dcn30.c | 66 #define REG(reg_name)\ argument
69 #define SF_HPD(reg_name, field_name, post_fix)\ argument
72 #define REGI(reg_name, block, id)\ argument
76 #define SF(reg_name, field_name, post_fix)\ argument
109 #define SF_DDC(reg_name, field_name, post_fix)\ argument
165 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
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| H A D | hw_translate_dcn30.c | 60 #define REG(reg_name)\ argument
62 #define SF_HPD(reg_name, field_name, post_fix)\ argument
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn21/ |
| H A D | hw_factory_dcn21.c | 57 #define REG(reg_name)\ argument
60 #define SF_HPD(reg_name, field_name, post_fix)\ argument
63 #define REGI(reg_name, block, id)\ argument
67 #define SF(reg_name, field_name, post_fix)\ argument
99 #define SF_DDC(reg_name, field_name, post_fix)\ argument
139 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
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| H A D | hw_translate_dcn21.c | 55 #define REG(reg_name)\ argument
57 #define SF_HPD(reg_name, field_name, post_fix)\ argument
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn20/ |
| H A D | hw_factory_dcn20.c | 59 #define REG(reg_name)\ argument
62 #define SF_HPD(reg_name, field_name, post_fix)\ argument
65 #define REGI(reg_name, block, id)\ argument
69 #define SF(reg_name, field_name, post_fix)\ argument
102 #define SF_DDC(reg_name, field_name, post_fix)\ argument
158 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
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| H A D | hw_translate_dcn20.c | 55 #define REG(reg_name)\ argument
57 #define SF_HPD(reg_name, field_name, post_fix)\ argument
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn401/ |
| H A D | hw_factory_dcn401.c | 39 #define REG(reg_name)\ argument
42 #define SF_HPD(reg_name, field_name, post_fix)\ argument
45 #define REGI(reg_name, block, id)\ argument
49 #define SF(reg_name, field_name, post_fix)\ argument
81 #define SF_DDC(reg_name, field_name, post_fix)\ argument
161 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn315/ |
| H A D | hw_factory_dcn315.c | 63 #define REG(reg_name)\ argument
66 #define SF_HPD(reg_name, field_name, post_fix)\ argument
69 #define REGI(reg_name, block, id)\ argument
73 #define SF(reg_name, field_name, post_fix)\ argument
105 #define SF_DDC(reg_name, field_name, post_fix)\ argument
157 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dce120/ |
| H A D | hw_factory_dce120.c | 46 #define SF_HPD(reg_name, field_name, post_fix)\ argument
50 #define SF_HPD(reg_name, field_name, post_fix)\ argument
60 #define REG(reg_name)\ argument
63 #define REGI(reg_name, block, id)\ argument
96 #define SF_DDC(reg_name, field_name, post_fix)\ argument
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| H A D | hw_translate_dce120.c | 51 #define REG(reg_name)\ argument
54 #define REGI(reg_name, block, id)\ argument
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn10/ |
| H A D | hw_factory_dcn10.c | 47 #define SF_HPD(reg_name, field_name, post_fix)\ argument
57 #define REG(reg_name)\ argument
60 #define REGI(reg_name, block, id)\ argument
92 #define SF_DDC(reg_name, field_name, post_fix)\ argument
128 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
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| H A D | hw_translate_dcn10.c | 51 #define REG(reg_name)\ argument
54 #define REGI(reg_name, block, id)\ argument
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dce110/ |
| H A D | hw_factory_dce110.c | 42 #define SF_HPD(reg_name, field_name, post_fix)\ argument
45 #define REG(reg_name)\ argument
48 #define REGI(reg_name, block, id)\ argument
79 #define SF_DDC(reg_name, field_name, post_fix)\ argument
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| H A D | dcn35_resource.c | 131 #define SR(reg_name)\ argument
135 #define SR_ARR(reg_name, id) \ argument
138 #define SR_ARR_INIT(reg_name, id, value) \ argument
141 #define SRI(reg_name, block, id)\ argument
145 #define SRI_ARR(reg_name, block, id)\ argument
149 #define SR_ARR_I2C(reg_name, id) \ argument
152 #define SRI_ARR_I2C(reg_name, block, id)\ argument
156 #define SRI_ARR_ALPHABET(reg_name, block, index, id)\ argument
160 #define SRI2(reg_name, block, id)\ argument
164 #define SRI2_ARR(reg_name, block, id)\ argument
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn351/ |
| H A D | dcn351_resource.c | 111 #define SR(reg_name)\ argument
115 #define SR_ARR(reg_name, id) \ argument
118 #define SR_ARR_INIT(reg_name, id, value) \ argument
121 #define SRI(reg_name, block, id)\ argument
125 #define SRI_ARR(reg_name, block, id)\ argument
129 #define SR_ARR_I2C(reg_name, id) \ argument
132 #define SRI_ARR_I2C(reg_name, block, id)\ argument
136 #define SRI_ARR_ALPHABET(reg_name, block, index, id)\ argument
140 #define SRI2(reg_name, block, id)\ argument
144 #define SRI2_ARR(reg_name, block, id)\ argument
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn321/ |
| H A D | dcn321_dio_link_encoder.c | 50 #define FN(reg_name, field_name) \ argument
56 #define AUX_REG_READ(reg_name) \ argument
59 #define AUX_REG_WRITE(reg_name, val) \ argument
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn30/ |
| H A D | dcn30_dio_link_encoder.c | 44 #define FN(reg_name, field_name) \ argument
211 #define AUX_REG_READ(reg_name) \ argument
214 #define AUX_REG_WRITE(reg_name, val) \ argument
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_panel_cntl.h | 32 #define DCE_PANEL_CNTL_SR(reg_name, block)\ argument
45 #define DCN_PANEL_CNTL_SR(reg_name, block)\ argument
59 #define DCE_PANEL_CNTL_SF(reg_name, field_name, post_fix)\ argument
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| /linux/drivers/media/i2c/ccs/ |
| H A D | ccs-reg-access.h | 33 #define ccs_read(sensor, reg_name, val) \ argument
36 #define ccs_write(sensor, reg_name, val) \ argument
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn32/ |
| H A D | dcn32_dio_link_encoder.c | 53 #define FN(reg_name, field_name) \ argument
59 #define AUX_REG_READ(reg_name) \ argument
62 #define AUX_REG_WRITE(reg_name, val) \ argument
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn401/ |
| H A D | dcn401_dio_link_encoder.c | 52 #define FN(reg_name, field_name) \ argument
58 #define AUX_REG_READ(reg_name) \ argument
61 #define AUX_REG_WRITE(reg_name, val) \ argument
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| /linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_dwb.h | 34 #define SR(reg_name)\ argument
38 #define SRI(reg_name, block, id)\ argument
43 #define SRII(reg_name, block, id)\ argument
47 #define SF(reg_name, field_name, post_fix)\ argument
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| /linux/drivers/gpu/drm/amd/display/dc/hubbub/dcn301/ |
| H A D | dcn301_hubbub.c | 37 #define FN(reg_name, field_name) \ argument
47 #define FN(reg_name, field_name) \ argument
|