xref: /linux/drivers/infiniband/hw/bnxt_re/qplib_fp.c (revision 32a92f8c89326985e05dce8b22d3f0aa07a3e1bd)
1 /*
2  * Broadcom NetXtreme-E RoCE driver.
3  *
4  * Copyright (c) 2016 - 2017, Broadcom. All rights reserved.  The term
5  * Broadcom refers to Broadcom Limited and/or its subsidiaries.
6  *
7  * This software is available to you under a choice of one of two
8  * licenses.  You may choose to be licensed under the terms of the GNU
9  * General Public License (GPL) Version 2, available from the file
10  * COPYING in the main directory of this source tree, or the
11  * BSD license below:
12  *
13  * Redistribution and use in source and binary forms, with or without
14  * modification, are permitted provided that the following conditions
15  * are met:
16  *
17  * 1. Redistributions of source code must retain the above copyright
18  *    notice, this list of conditions and the following disclaimer.
19  * 2. Redistributions in binary form must reproduce the above copyright
20  *    notice, this list of conditions and the following disclaimer in
21  *    the documentation and/or other materials provided with the
22  *    distribution.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
25  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
26  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
28  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
31  * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
33  * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
34  * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35  *
36  * Description: Fast Path Operators
37  */
38 
39 #define dev_fmt(fmt) "QPLIB: " fmt
40 
41 #include <linux/interrupt.h>
42 #include <linux/spinlock.h>
43 #include <linux/sched.h>
44 #include <linux/slab.h>
45 #include <linux/pci.h>
46 #include <linux/delay.h>
47 #include <linux/prefetch.h>
48 #include <linux/if_ether.h>
49 #include <rdma/ib_mad.h>
50 
51 #include "roce_hsi.h"
52 
53 #include "qplib_res.h"
54 #include "qplib_rcfw.h"
55 #include "qplib_sp.h"
56 #include "qplib_fp.h"
57 #include <rdma/ib_addr.h>
58 #include "bnxt_ulp.h"
59 #include "bnxt_re.h"
60 #include "ib_verbs.h"
61 
62 static void __clean_cq(struct bnxt_qplib_cq *cq, u64 qp);
63 
bnxt_qplib_cancel_phantom_processing(struct bnxt_qplib_qp * qp)64 static void bnxt_qplib_cancel_phantom_processing(struct bnxt_qplib_qp *qp)
65 {
66 	qp->sq.condition = false;
67 	qp->sq.send_phantom = false;
68 	qp->sq.single = false;
69 }
70 
71 /* Flush list */
__bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp * qp)72 static void __bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp *qp)
73 {
74 	struct bnxt_qplib_cq *scq, *rcq;
75 
76 	scq = qp->scq;
77 	rcq = qp->rcq;
78 
79 	if (!qp->sq.flushed) {
80 		dev_dbg(&scq->hwq.pdev->dev,
81 			"FP: Adding to SQ Flush list = %p\n", qp);
82 		bnxt_qplib_cancel_phantom_processing(qp);
83 		list_add_tail(&qp->sq_flush, &scq->sqf_head);
84 		qp->sq.flushed = true;
85 	}
86 	if (!qp->srq) {
87 		if (!qp->rq.flushed) {
88 			dev_dbg(&rcq->hwq.pdev->dev,
89 				"FP: Adding to RQ Flush list = %p\n", qp);
90 			list_add_tail(&qp->rq_flush, &rcq->rqf_head);
91 			qp->rq.flushed = true;
92 		}
93 	}
94 }
95 
bnxt_qplib_acquire_cq_flush_locks(struct bnxt_qplib_qp * qp,unsigned long * flags)96 static void bnxt_qplib_acquire_cq_flush_locks(struct bnxt_qplib_qp *qp,
97 				       unsigned long *flags)
98 	__acquires(&qp->scq->flush_lock) __acquires(&qp->rcq->flush_lock)
99 {
100 	spin_lock_irqsave(&qp->scq->flush_lock, *flags);
101 	if (qp->scq == qp->rcq)
102 		__acquire(&qp->rcq->flush_lock);
103 	else
104 		spin_lock(&qp->rcq->flush_lock);
105 }
106 
bnxt_qplib_release_cq_flush_locks(struct bnxt_qplib_qp * qp,unsigned long * flags)107 static void bnxt_qplib_release_cq_flush_locks(struct bnxt_qplib_qp *qp,
108 				       unsigned long *flags)
109 	__releases(&qp->scq->flush_lock) __releases(&qp->rcq->flush_lock)
110 {
111 	if (qp->scq == qp->rcq)
112 		__release(&qp->rcq->flush_lock);
113 	else
114 		spin_unlock(&qp->rcq->flush_lock);
115 	spin_unlock_irqrestore(&qp->scq->flush_lock, *flags);
116 }
117 
bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp * qp)118 void bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp *qp)
119 {
120 	unsigned long flags;
121 
122 	bnxt_qplib_acquire_cq_flush_locks(qp, &flags);
123 	__bnxt_qplib_add_flush_qp(qp);
124 	bnxt_qplib_release_cq_flush_locks(qp, &flags);
125 }
126 
__bnxt_qplib_del_flush_qp(struct bnxt_qplib_qp * qp)127 static void __bnxt_qplib_del_flush_qp(struct bnxt_qplib_qp *qp)
128 {
129 	if (qp->sq.flushed) {
130 		qp->sq.flushed = false;
131 		list_del(&qp->sq_flush);
132 	}
133 	if (!qp->srq) {
134 		if (qp->rq.flushed) {
135 			qp->rq.flushed = false;
136 			list_del(&qp->rq_flush);
137 		}
138 	}
139 }
140 
bnxt_qplib_clean_qp(struct bnxt_qplib_qp * qp)141 void bnxt_qplib_clean_qp(struct bnxt_qplib_qp *qp)
142 {
143 	unsigned long flags;
144 
145 	bnxt_qplib_acquire_cq_flush_locks(qp, &flags);
146 	__clean_cq(qp->scq, (u64)(unsigned long)qp);
147 	qp->sq.hwq.prod = 0;
148 	qp->sq.hwq.cons = 0;
149 	__clean_cq(qp->rcq, (u64)(unsigned long)qp);
150 	qp->rq.hwq.prod = 0;
151 	qp->rq.hwq.cons = 0;
152 
153 	__bnxt_qplib_del_flush_qp(qp);
154 	bnxt_qplib_release_cq_flush_locks(qp, &flags);
155 }
156 
bnxt_qpn_cqn_sched_task(struct work_struct * work)157 static void bnxt_qpn_cqn_sched_task(struct work_struct *work)
158 {
159 	struct bnxt_qplib_nq_work *nq_work =
160 			container_of(work, struct bnxt_qplib_nq_work, work);
161 
162 	struct bnxt_qplib_cq *cq = nq_work->cq;
163 	struct bnxt_qplib_nq *nq = nq_work->nq;
164 
165 	if (cq && nq) {
166 		spin_lock_bh(&cq->compl_lock);
167 		if (atomic_read(&cq->arm_state) && nq->cqn_handler) {
168 			dev_dbg(&nq->pdev->dev,
169 				"%s:Trigger cq  = %p event nq = %p\n",
170 				__func__, cq, nq);
171 			nq->cqn_handler(nq, cq);
172 		}
173 		spin_unlock_bh(&cq->compl_lock);
174 	}
175 	kfree(nq_work);
176 }
177 
bnxt_qplib_free_qp_hdr_buf(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)178 static void bnxt_qplib_free_qp_hdr_buf(struct bnxt_qplib_res *res,
179 				       struct bnxt_qplib_qp *qp)
180 {
181 	struct bnxt_qplib_q *rq = &qp->rq;
182 	struct bnxt_qplib_q *sq = &qp->sq;
183 
184 	if (qp->rq_hdr_buf)
185 		dma_free_coherent(&res->pdev->dev,
186 				  rq->max_wqe * qp->rq_hdr_buf_size,
187 				  qp->rq_hdr_buf, qp->rq_hdr_buf_map);
188 	if (qp->sq_hdr_buf)
189 		dma_free_coherent(&res->pdev->dev,
190 				  sq->max_wqe * qp->sq_hdr_buf_size,
191 				  qp->sq_hdr_buf, qp->sq_hdr_buf_map);
192 	qp->rq_hdr_buf = NULL;
193 	qp->sq_hdr_buf = NULL;
194 	qp->rq_hdr_buf_map = 0;
195 	qp->sq_hdr_buf_map = 0;
196 	qp->sq_hdr_buf_size = 0;
197 	qp->rq_hdr_buf_size = 0;
198 }
199 
bnxt_qplib_alloc_qp_hdr_buf(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)200 static int bnxt_qplib_alloc_qp_hdr_buf(struct bnxt_qplib_res *res,
201 				       struct bnxt_qplib_qp *qp)
202 {
203 	struct bnxt_qplib_q *rq = &qp->rq;
204 	struct bnxt_qplib_q *sq = &qp->sq;
205 	int rc = 0;
206 
207 	if (qp->sq_hdr_buf_size && sq->max_wqe) {
208 		qp->sq_hdr_buf = dma_alloc_coherent(&res->pdev->dev,
209 					sq->max_wqe * qp->sq_hdr_buf_size,
210 					&qp->sq_hdr_buf_map, GFP_KERNEL);
211 		if (!qp->sq_hdr_buf) {
212 			rc = -ENOMEM;
213 			dev_err(&res->pdev->dev,
214 				"Failed to create sq_hdr_buf\n");
215 			goto fail;
216 		}
217 	}
218 
219 	if (qp->rq_hdr_buf_size && rq->max_wqe) {
220 		qp->rq_hdr_buf = dma_alloc_coherent(&res->pdev->dev,
221 						    rq->max_wqe *
222 						    qp->rq_hdr_buf_size,
223 						    &qp->rq_hdr_buf_map,
224 						    GFP_KERNEL);
225 		if (!qp->rq_hdr_buf) {
226 			rc = -ENOMEM;
227 			dev_err(&res->pdev->dev,
228 				"Failed to create rq_hdr_buf\n");
229 			goto fail;
230 		}
231 	}
232 	return 0;
233 
234 fail:
235 	bnxt_qplib_free_qp_hdr_buf(res, qp);
236 	return rc;
237 }
238 
clean_nq(struct bnxt_qplib_nq * nq,struct bnxt_qplib_cq * cq)239 static void clean_nq(struct bnxt_qplib_nq *nq, struct bnxt_qplib_cq *cq)
240 {
241 	struct bnxt_qplib_hwq *hwq = &nq->hwq;
242 	struct nq_base *nqe, **nq_ptr;
243 	int budget = nq->budget;
244 	uintptr_t q_handle;
245 	u16 type;
246 
247 	spin_lock_bh(&hwq->lock);
248 	/* Service the NQ until empty */
249 	while (budget--) {
250 		nq_ptr = (struct nq_base **)hwq->pbl_ptr;
251 		nqe = &nq_ptr[NQE_PG(hwq->cons)][NQE_IDX(hwq->cons)];
252 		if (!NQE_CMP_VALID(nqe, nq->nq_db.dbinfo.flags))
253 			break;
254 
255 		/*
256 		 * The valid test of the entry must be done first before
257 		 * reading any further.
258 		 */
259 		dma_rmb();
260 
261 		type = le16_to_cpu(nqe->info10_type) & NQ_BASE_TYPE_MASK;
262 		switch (type) {
263 		case NQ_BASE_TYPE_CQ_NOTIFICATION:
264 		{
265 			struct nq_cn *nqcne = (struct nq_cn *)nqe;
266 
267 			q_handle = le32_to_cpu(nqcne->cq_handle_low);
268 			q_handle |= (u64)le32_to_cpu(nqcne->cq_handle_high)
269 						     << 32;
270 			if ((unsigned long)cq == q_handle) {
271 				nqcne->cq_handle_low = 0;
272 				nqcne->cq_handle_high = 0;
273 				cq->cnq_events++;
274 			}
275 			break;
276 		}
277 		default:
278 			break;
279 		}
280 		bnxt_qplib_hwq_incr_cons(hwq->max_elements, &hwq->cons,
281 					 1, &nq->nq_db.dbinfo.flags);
282 	}
283 	spin_unlock_bh(&hwq->lock);
284 }
285 
286 /* Wait for receiving all NQEs for this CQ and clean the NQEs associated with
287  * this CQ.
288  */
__wait_for_all_nqes(struct bnxt_qplib_cq * cq,u16 cnq_events)289 static void __wait_for_all_nqes(struct bnxt_qplib_cq *cq, u16 cnq_events)
290 {
291 	u32 retry_cnt = 100;
292 
293 	while (retry_cnt--) {
294 		if (cnq_events == cq->cnq_events)
295 			return;
296 		usleep_range(50, 100);
297 		clean_nq(cq->nq, cq);
298 	}
299 }
300 
bnxt_qplib_service_nq(struct tasklet_struct * t)301 static void bnxt_qplib_service_nq(struct tasklet_struct *t)
302 {
303 	struct bnxt_qplib_nq *nq = from_tasklet(nq, t, nq_tasklet);
304 	struct bnxt_qplib_hwq *hwq = &nq->hwq;
305 	struct bnxt_qplib_cq *cq;
306 	int budget = nq->budget;
307 	struct nq_base *nqe;
308 	uintptr_t q_handle;
309 	u32 hw_polled = 0;
310 	u16 type;
311 
312 	spin_lock_bh(&hwq->lock);
313 	/* Service the NQ until empty */
314 	while (budget--) {
315 		nqe = bnxt_qplib_get_qe(hwq, hwq->cons, NULL);
316 		if (!NQE_CMP_VALID(nqe, nq->nq_db.dbinfo.flags))
317 			break;
318 
319 		/*
320 		 * The valid test of the entry must be done first before
321 		 * reading any further.
322 		 */
323 		dma_rmb();
324 
325 		type = le16_to_cpu(nqe->info10_type) & NQ_BASE_TYPE_MASK;
326 		switch (type) {
327 		case NQ_BASE_TYPE_CQ_NOTIFICATION:
328 		{
329 			struct nq_cn *nqcne = (struct nq_cn *)nqe;
330 			struct bnxt_re_cq *cq_p;
331 
332 			q_handle = le32_to_cpu(nqcne->cq_handle_low);
333 			q_handle |= (u64)le32_to_cpu(nqcne->cq_handle_high)
334 						     << 32;
335 			cq = (struct bnxt_qplib_cq *)(unsigned long)q_handle;
336 			if (!cq)
337 				break;
338 			cq->toggle = (le16_to_cpu(nqe->info10_type) &
339 					NQ_CN_TOGGLE_MASK) >> NQ_CN_TOGGLE_SFT;
340 			cq->dbinfo.toggle = cq->toggle;
341 			cq_p = container_of(cq, struct bnxt_re_cq, qplib_cq);
342 			if (cq_p->uctx_cq_page)
343 				*((u32 *)cq_p->uctx_cq_page) = cq->toggle;
344 
345 			bnxt_qplib_armen_db(&cq->dbinfo,
346 					    DBC_DBC_TYPE_CQ_ARMENA);
347 			spin_lock_bh(&cq->compl_lock);
348 			atomic_set(&cq->arm_state, 0);
349 			if (nq->cqn_handler(nq, (cq)))
350 				dev_warn(&nq->pdev->dev,
351 					 "cqn - type 0x%x not handled\n", type);
352 			cq->cnq_events++;
353 			spin_unlock_bh(&cq->compl_lock);
354 			break;
355 		}
356 		case NQ_BASE_TYPE_SRQ_EVENT:
357 		{
358 			struct bnxt_qplib_srq *srq;
359 			struct bnxt_re_srq *srq_p;
360 			struct nq_srq_event *nqsrqe =
361 						(struct nq_srq_event *)nqe;
362 
363 			q_handle = le32_to_cpu(nqsrqe->srq_handle_low);
364 			q_handle |= (u64)le32_to_cpu(nqsrqe->srq_handle_high)
365 				     << 32;
366 			srq = (struct bnxt_qplib_srq *)q_handle;
367 			srq->toggle = (le16_to_cpu(nqe->info10_type) & NQ_CN_TOGGLE_MASK)
368 				      >> NQ_CN_TOGGLE_SFT;
369 			srq->dbinfo.toggle = srq->toggle;
370 			srq_p = container_of(srq, struct bnxt_re_srq, qplib_srq);
371 			if (srq_p->uctx_srq_page)
372 				*((u32 *)srq_p->uctx_srq_page) = srq->toggle;
373 			bnxt_qplib_armen_db(&srq->dbinfo,
374 					    DBC_DBC_TYPE_SRQ_ARMENA);
375 			if (nq->srqn_handler(nq,
376 					     (struct bnxt_qplib_srq *)q_handle,
377 					     nqsrqe->event))
378 				dev_warn(&nq->pdev->dev,
379 					 "SRQ event 0x%x not handled\n",
380 					 nqsrqe->event);
381 			break;
382 		}
383 		case NQ_BASE_TYPE_DBQ_EVENT:
384 			break;
385 		default:
386 			dev_warn(&nq->pdev->dev,
387 				 "nqe with type = 0x%x not handled\n", type);
388 			break;
389 		}
390 		hw_polled++;
391 		bnxt_qplib_hwq_incr_cons(hwq->max_elements, &hwq->cons,
392 					 1, &nq->nq_db.dbinfo.flags);
393 	}
394 	if (hw_polled)
395 		bnxt_qplib_ring_nq_db(&nq->nq_db.dbinfo, nq->res->cctx, true);
396 	spin_unlock_bh(&hwq->lock);
397 }
398 
399 /* bnxt_re_synchronize_nq - self polling notification queue.
400  * @nq      -     notification queue pointer
401  *
402  * This function will start polling entries of a given notification queue
403  * for all pending  entries.
404  * This function is useful to synchronize notification entries while resources
405  * are going away.
406  */
407 
bnxt_re_synchronize_nq(struct bnxt_qplib_nq * nq)408 void bnxt_re_synchronize_nq(struct bnxt_qplib_nq *nq)
409 {
410 	int budget = nq->budget;
411 
412 	nq->budget = nq->hwq.max_elements;
413 	bnxt_qplib_service_nq(&nq->nq_tasklet);
414 	nq->budget = budget;
415 }
416 
bnxt_qplib_nq_irq(int irq,void * dev_instance)417 static irqreturn_t bnxt_qplib_nq_irq(int irq, void *dev_instance)
418 {
419 	struct bnxt_qplib_nq *nq = dev_instance;
420 	struct bnxt_qplib_hwq *hwq = &nq->hwq;
421 	u32 sw_cons;
422 
423 	/* Prefetch the NQ element */
424 	sw_cons = HWQ_CMP(hwq->cons, hwq);
425 	prefetch(bnxt_qplib_get_qe(hwq, sw_cons, NULL));
426 
427 	/* Fan out to CPU affinitized kthreads? */
428 	tasklet_schedule(&nq->nq_tasklet);
429 
430 	return IRQ_HANDLED;
431 }
432 
bnxt_qplib_nq_stop_irq(struct bnxt_qplib_nq * nq,bool kill)433 void bnxt_qplib_nq_stop_irq(struct bnxt_qplib_nq *nq, bool kill)
434 {
435 	if (!nq->requested)
436 		return;
437 
438 	nq->requested = false;
439 	/* Mask h/w interrupt */
440 	bnxt_qplib_ring_nq_db(&nq->nq_db.dbinfo, nq->res->cctx, false);
441 	/* Sync with last running IRQ handler */
442 	synchronize_irq(nq->msix_vec);
443 	irq_set_affinity_hint(nq->msix_vec, NULL);
444 	free_irq(nq->msix_vec, nq);
445 	kfree(nq->name);
446 	nq->name = NULL;
447 
448 	if (kill)
449 		tasklet_kill(&nq->nq_tasklet);
450 	tasklet_disable(&nq->nq_tasklet);
451 }
452 
bnxt_qplib_disable_nq(struct bnxt_qplib_nq * nq)453 void bnxt_qplib_disable_nq(struct bnxt_qplib_nq *nq)
454 {
455 	if (nq->cqn_wq) {
456 		destroy_workqueue(nq->cqn_wq);
457 		nq->cqn_wq = NULL;
458 	}
459 
460 	/* Make sure the HW is stopped! */
461 	bnxt_qplib_nq_stop_irq(nq, true);
462 
463 	if (nq->nq_db.reg.bar_reg) {
464 		iounmap(nq->nq_db.reg.bar_reg);
465 		nq->nq_db.reg.bar_reg = NULL;
466 	}
467 
468 	nq->cqn_handler = NULL;
469 	nq->srqn_handler = NULL;
470 	nq->msix_vec = 0;
471 }
472 
bnxt_qplib_nq_start_irq(struct bnxt_qplib_nq * nq,int nq_indx,int msix_vector,bool need_init)473 int bnxt_qplib_nq_start_irq(struct bnxt_qplib_nq *nq, int nq_indx,
474 			    int msix_vector, bool need_init)
475 {
476 	struct bnxt_qplib_res *res = nq->res;
477 	int rc;
478 
479 	if (nq->requested)
480 		return -EFAULT;
481 
482 	nq->msix_vec = msix_vector;
483 	if (need_init)
484 		tasklet_setup(&nq->nq_tasklet, bnxt_qplib_service_nq);
485 	else
486 		tasklet_enable(&nq->nq_tasklet);
487 
488 	nq->name = kasprintf(GFP_KERNEL, "bnxt_re-nq-%d@pci:%s",
489 			     nq_indx, pci_name(res->pdev));
490 	if (!nq->name)
491 		return -ENOMEM;
492 	rc = request_irq(nq->msix_vec, bnxt_qplib_nq_irq, 0, nq->name, nq);
493 	if (rc) {
494 		kfree(nq->name);
495 		nq->name = NULL;
496 		tasklet_disable(&nq->nq_tasklet);
497 		return rc;
498 	}
499 
500 	cpumask_clear(&nq->mask);
501 	cpumask_set_cpu(nq_indx, &nq->mask);
502 	rc = irq_set_affinity_hint(nq->msix_vec, &nq->mask);
503 	if (rc) {
504 		dev_warn(&nq->pdev->dev,
505 			 "set affinity failed; vector: %d nq_idx: %d\n",
506 			 nq->msix_vec, nq_indx);
507 	}
508 	nq->requested = true;
509 	bnxt_qplib_ring_nq_db(&nq->nq_db.dbinfo, res->cctx, true);
510 
511 	return rc;
512 }
513 
bnxt_qplib_map_nq_db(struct bnxt_qplib_nq * nq,u32 reg_offt)514 static int bnxt_qplib_map_nq_db(struct bnxt_qplib_nq *nq,  u32 reg_offt)
515 {
516 	resource_size_t reg_base;
517 	struct bnxt_qplib_nq_db *nq_db;
518 	struct pci_dev *pdev;
519 
520 	pdev = nq->pdev;
521 	nq_db = &nq->nq_db;
522 
523 	nq_db->dbinfo.flags = 0;
524 	nq_db->reg.bar_id = NQ_CONS_PCI_BAR_REGION;
525 	nq_db->reg.bar_base = pci_resource_start(pdev, nq_db->reg.bar_id);
526 	if (!nq_db->reg.bar_base) {
527 		dev_err(&pdev->dev, "QPLIB: NQ BAR region %d resc start is 0!",
528 			nq_db->reg.bar_id);
529 		return -ENOMEM;
530 	}
531 
532 	reg_base = nq_db->reg.bar_base + reg_offt;
533 	/* Unconditionally map 8 bytes to support 57500 series */
534 	nq_db->reg.len = 8;
535 	nq_db->reg.bar_reg = ioremap(reg_base, nq_db->reg.len);
536 	if (!nq_db->reg.bar_reg) {
537 		dev_err(&pdev->dev, "QPLIB: NQ BAR region %d mapping failed",
538 			nq_db->reg.bar_id);
539 		return -ENOMEM;
540 	}
541 
542 	nq_db->dbinfo.db = nq_db->reg.bar_reg;
543 	nq_db->dbinfo.hwq = &nq->hwq;
544 	nq_db->dbinfo.xid = nq->ring_id;
545 
546 	return 0;
547 }
548 
bnxt_qplib_enable_nq(struct pci_dev * pdev,struct bnxt_qplib_nq * nq,int nq_idx,int msix_vector,int bar_reg_offset,cqn_handler_t cqn_handler,srqn_handler_t srqn_handler)549 int bnxt_qplib_enable_nq(struct pci_dev *pdev, struct bnxt_qplib_nq *nq,
550 			 int nq_idx, int msix_vector, int bar_reg_offset,
551 			 cqn_handler_t cqn_handler,
552 			 srqn_handler_t srqn_handler)
553 {
554 	int rc;
555 
556 	nq->pdev = pdev;
557 	nq->cqn_handler = cqn_handler;
558 	nq->srqn_handler = srqn_handler;
559 	nq->load = 0;
560 
561 	/* Have a task to schedule CQ notifiers in post send case */
562 	nq->cqn_wq  = create_singlethread_workqueue("bnxt_qplib_nq");
563 	if (!nq->cqn_wq)
564 		return -ENOMEM;
565 
566 	rc = bnxt_qplib_map_nq_db(nq, bar_reg_offset);
567 	if (rc)
568 		goto fail;
569 
570 	rc = bnxt_qplib_nq_start_irq(nq, nq_idx, msix_vector, true);
571 	if (rc) {
572 		dev_err(&nq->pdev->dev,
573 			"Failed to request irq for nq-idx %d\n", nq_idx);
574 		goto fail;
575 	}
576 
577 	return 0;
578 fail:
579 	bnxt_qplib_disable_nq(nq);
580 	return rc;
581 }
582 
bnxt_qplib_free_nq(struct bnxt_qplib_nq * nq)583 void bnxt_qplib_free_nq(struct bnxt_qplib_nq *nq)
584 {
585 	if (nq->hwq.max_elements) {
586 		bnxt_qplib_free_hwq(nq->res, &nq->hwq);
587 		nq->hwq.max_elements = 0;
588 	}
589 }
590 
bnxt_qplib_alloc_nq(struct bnxt_qplib_res * res,struct bnxt_qplib_nq * nq)591 int bnxt_qplib_alloc_nq(struct bnxt_qplib_res *res, struct bnxt_qplib_nq *nq)
592 {
593 	struct bnxt_qplib_hwq_attr hwq_attr = {};
594 	struct bnxt_qplib_sg_info sginfo = {};
595 
596 	nq->pdev = res->pdev;
597 	nq->res = res;
598 	if (!nq->hwq.max_elements ||
599 	    nq->hwq.max_elements > BNXT_QPLIB_NQE_MAX_CNT)
600 		nq->hwq.max_elements = BNXT_QPLIB_NQE_MAX_CNT;
601 
602 	sginfo.pgsize = PAGE_SIZE;
603 	sginfo.pgshft = PAGE_SHIFT;
604 	hwq_attr.res = res;
605 	hwq_attr.sginfo = &sginfo;
606 	hwq_attr.depth = nq->hwq.max_elements;
607 	hwq_attr.stride = sizeof(struct nq_base);
608 	hwq_attr.type = bnxt_qplib_get_hwq_type(nq->res);
609 	if (bnxt_qplib_alloc_init_hwq(&nq->hwq, &hwq_attr)) {
610 		dev_err(&nq->pdev->dev, "FP NQ allocation failed");
611 		return -ENOMEM;
612 	}
613 	nq->budget = 8;
614 	return 0;
615 }
616 
617 /* SRQ */
bnxt_qplib_destroy_srq(struct bnxt_qplib_res * res,struct bnxt_qplib_srq * srq)618 void bnxt_qplib_destroy_srq(struct bnxt_qplib_res *res,
619 			   struct bnxt_qplib_srq *srq)
620 {
621 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
622 	struct creq_destroy_srq_resp resp = {};
623 	struct bnxt_qplib_cmdqmsg msg = {};
624 	struct cmdq_destroy_srq req = {};
625 	int rc;
626 
627 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
628 				 CMDQ_BASE_OPCODE_DESTROY_SRQ,
629 				 sizeof(req));
630 
631 	/* Configure the request */
632 	req.srq_cid = cpu_to_le32(srq->id);
633 
634 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), sizeof(resp), 0);
635 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
636 	kfree(srq->swq);
637 	if (rc)
638 		return;
639 	bnxt_qplib_free_hwq(res, &srq->hwq);
640 }
641 
bnxt_qplib_create_srq(struct bnxt_qplib_res * res,struct bnxt_qplib_srq * srq)642 int bnxt_qplib_create_srq(struct bnxt_qplib_res *res,
643 			  struct bnxt_qplib_srq *srq)
644 {
645 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
646 	struct bnxt_qplib_hwq_attr hwq_attr = {};
647 	struct creq_create_srq_resp resp = {};
648 	struct bnxt_qplib_cmdqmsg msg = {};
649 	struct cmdq_create_srq req = {};
650 	struct bnxt_qplib_pbl *pbl;
651 	u16 pg_sz_lvl;
652 	int rc, idx;
653 
654 	hwq_attr.res = res;
655 	hwq_attr.sginfo = &srq->sg_info;
656 	hwq_attr.depth = srq->max_wqe;
657 	hwq_attr.stride = srq->wqe_size;
658 	hwq_attr.type = HWQ_TYPE_QUEUE;
659 	rc = bnxt_qplib_alloc_init_hwq(&srq->hwq, &hwq_attr);
660 	if (rc)
661 		return rc;
662 	srq->dbinfo.flags = 0;
663 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
664 				 CMDQ_BASE_OPCODE_CREATE_SRQ,
665 				 sizeof(req));
666 
667 	/* Configure the request */
668 	req.dpi = cpu_to_le32(srq->dpi->dpi);
669 	req.srq_handle = cpu_to_le64((uintptr_t)srq);
670 
671 	req.srq_size = cpu_to_le16((u16)srq->hwq.max_elements);
672 	pbl = &srq->hwq.pbl[PBL_LVL_0];
673 	pg_sz_lvl = ((u16)bnxt_qplib_base_pg_size(&srq->hwq) <<
674 		     CMDQ_CREATE_SRQ_PG_SIZE_SFT);
675 	pg_sz_lvl |= (srq->hwq.level & CMDQ_CREATE_SRQ_LVL_MASK) <<
676 		      CMDQ_CREATE_SRQ_LVL_SFT;
677 	req.pg_size_lvl = cpu_to_le16(pg_sz_lvl);
678 	req.pbl = cpu_to_le64(pbl->pg_map_arr[0]);
679 	req.pd_id = cpu_to_le32(srq->pd->id);
680 	req.eventq_id = cpu_to_le16(srq->eventq_hw_ring_id);
681 
682 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), sizeof(resp), 0);
683 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
684 	if (rc)
685 		goto fail;
686 
687 	spin_lock_init(&srq->lock);
688 	srq->start_idx = 0;
689 	srq->last_idx = srq->hwq.max_elements - 1;
690 	if (!srq->hwq.is_user) {
691 		srq->swq = kzalloc_objs(*srq->swq, srq->hwq.max_elements);
692 		if (!srq->swq) {
693 			rc = -ENOMEM;
694 			goto fail;
695 		}
696 		for (idx = 0; idx < srq->hwq.max_elements; idx++)
697 			srq->swq[idx].next_idx = idx + 1;
698 		srq->swq[srq->last_idx].next_idx = -1;
699 	}
700 
701 	srq->id = le32_to_cpu(resp.xid);
702 	srq->dbinfo.hwq = &srq->hwq;
703 	srq->dbinfo.xid = srq->id;
704 	srq->dbinfo.db = srq->dpi->dbr;
705 	srq->dbinfo.max_slot = 1;
706 	srq->dbinfo.priv_db = res->dpi_tbl.priv_db;
707 	bnxt_qplib_armen_db(&srq->dbinfo, DBC_DBC_TYPE_SRQ_ARMENA);
708 
709 	return 0;
710 fail:
711 	bnxt_qplib_free_hwq(res, &srq->hwq);
712 	kfree(srq->swq);
713 
714 	return rc;
715 }
716 
bnxt_qplib_query_srq(struct bnxt_qplib_res * res,struct bnxt_qplib_srq * srq)717 int bnxt_qplib_query_srq(struct bnxt_qplib_res *res,
718 			 struct bnxt_qplib_srq *srq)
719 {
720 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
721 	struct creq_query_srq_resp resp = {};
722 	struct bnxt_qplib_cmdqmsg msg = {};
723 	struct bnxt_qplib_rcfw_sbuf sbuf;
724 	struct creq_query_srq_resp_sb *sb;
725 	struct cmdq_query_srq req = {};
726 	int rc;
727 
728 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
729 				 CMDQ_BASE_OPCODE_QUERY_SRQ,
730 				 sizeof(req));
731 
732 	/* Configure the request */
733 	sbuf.size = ALIGN(sizeof(*sb), BNXT_QPLIB_CMDQE_UNITS);
734 	sbuf.sb = dma_alloc_coherent(&rcfw->pdev->dev, sbuf.size,
735 				     &sbuf.dma_addr, GFP_KERNEL);
736 	if (!sbuf.sb)
737 		return -ENOMEM;
738 	req.resp_size = sbuf.size / BNXT_QPLIB_CMDQE_UNITS;
739 	req.srq_cid = cpu_to_le32(srq->id);
740 	sb = sbuf.sb;
741 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, &sbuf, sizeof(req),
742 				sizeof(resp), 0);
743 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
744 	if (!rc)
745 		srq->threshold = le16_to_cpu(sb->srq_limit);
746 	dma_free_coherent(&rcfw->pdev->dev, sbuf.size,
747 			  sbuf.sb, sbuf.dma_addr);
748 
749 	return rc;
750 }
751 
bnxt_qplib_post_srq_recv(struct bnxt_qplib_srq * srq,struct bnxt_qplib_swqe * wqe)752 int bnxt_qplib_post_srq_recv(struct bnxt_qplib_srq *srq,
753 			     struct bnxt_qplib_swqe *wqe)
754 {
755 	struct bnxt_qplib_hwq *srq_hwq = &srq->hwq;
756 	struct rq_wqe *srqe;
757 	struct sq_sge *hw_sge;
758 	int i, next;
759 
760 	spin_lock(&srq_hwq->lock);
761 	if (srq->start_idx == srq->last_idx) {
762 		dev_err(&srq_hwq->pdev->dev,
763 			"FP: SRQ (0x%x) is full!\n", srq->id);
764 		spin_unlock(&srq_hwq->lock);
765 		return -EINVAL;
766 	}
767 	next = srq->start_idx;
768 	srq->start_idx = srq->swq[next].next_idx;
769 	spin_unlock(&srq_hwq->lock);
770 
771 	srqe = bnxt_qplib_get_qe(srq_hwq, srq_hwq->prod, NULL);
772 	memset(srqe, 0, srq->wqe_size);
773 	/* Calculate wqe_size16 and data_len */
774 	for (i = 0, hw_sge = (struct sq_sge *)srqe->data;
775 	     i < wqe->num_sge; i++, hw_sge++) {
776 		hw_sge->va_or_pa = cpu_to_le64(wqe->sg_list[i].addr);
777 		hw_sge->l_key = cpu_to_le32(wqe->sg_list[i].lkey);
778 		hw_sge->size = cpu_to_le32(wqe->sg_list[i].size);
779 	}
780 	srqe->wqe_type = wqe->type;
781 	srqe->flags = wqe->flags;
782 	srqe->wqe_size = wqe->num_sge +
783 			((offsetof(typeof(*srqe), data) + 15) >> 4);
784 	srqe->wr_id[0] = cpu_to_le32((u32)next);
785 	srq->swq[next].wr_id = wqe->wr_id;
786 
787 	bnxt_qplib_hwq_incr_prod(&srq->dbinfo, srq_hwq, srq->dbinfo.max_slot);
788 
789 	/* Ring DB */
790 	bnxt_qplib_ring_prod_db(&srq->dbinfo, DBC_DBC_TYPE_SRQ);
791 
792 	return 0;
793 }
794 
795 /* QP */
796 
bnxt_qplib_alloc_init_swq(struct bnxt_qplib_q * que)797 static int bnxt_qplib_alloc_init_swq(struct bnxt_qplib_q *que)
798 {
799 	int indx;
800 
801 	que->swq = kzalloc_objs(*que->swq, que->max_sw_wqe);
802 	if (!que->swq)
803 		return -ENOMEM;
804 
805 	que->swq_start = 0;
806 	que->swq_last = que->max_sw_wqe - 1;
807 	for (indx = 0; indx < que->max_sw_wqe; indx++)
808 		que->swq[indx].next_idx = indx + 1;
809 	que->swq[que->swq_last].next_idx = 0; /* Make it circular */
810 	que->swq_last = 0;
811 
812 	return 0;
813 }
814 
bnxt_qplib_create_qp1(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)815 int bnxt_qplib_create_qp1(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
816 {
817 	struct bnxt_qplib_hwq_attr hwq_attr = {};
818 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
819 	struct creq_create_qp1_resp resp = {};
820 	struct bnxt_qplib_cmdqmsg msg = {};
821 	struct bnxt_qplib_q *sq = &qp->sq;
822 	struct bnxt_qplib_q *rq = &qp->rq;
823 	struct cmdq_create_qp1 req = {};
824 	struct bnxt_qplib_pbl *pbl;
825 	u32 qp_flags = 0;
826 	u8 pg_sz_lvl;
827 	u32 tbl_indx;
828 	int rc;
829 
830 	sq->dbinfo.flags = 0;
831 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
832 				 CMDQ_BASE_OPCODE_CREATE_QP1,
833 				 sizeof(req));
834 	/* General */
835 	req.type = qp->type;
836 	req.dpi = cpu_to_le32(qp->dpi->dpi);
837 	req.qp_handle = cpu_to_le64(qp->qp_handle);
838 
839 	/* SQ */
840 	hwq_attr.res = res;
841 	hwq_attr.sginfo = &sq->sg_info;
842 	hwq_attr.stride = sizeof(struct sq_sge);
843 	hwq_attr.depth = bnxt_qplib_get_depth(sq, qp->wqe_mode, false);
844 	hwq_attr.type = HWQ_TYPE_QUEUE;
845 	rc = bnxt_qplib_alloc_init_hwq(&sq->hwq, &hwq_attr);
846 	if (rc)
847 		return rc;
848 
849 	rc = bnxt_qplib_alloc_init_swq(sq);
850 	if (rc)
851 		goto fail_sq;
852 
853 	req.sq_size = cpu_to_le32(bnxt_qplib_set_sq_size(sq, qp->wqe_mode));
854 	pbl = &sq->hwq.pbl[PBL_LVL_0];
855 	req.sq_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
856 	pg_sz_lvl = (bnxt_qplib_base_pg_size(&sq->hwq) <<
857 		     CMDQ_CREATE_QP1_SQ_PG_SIZE_SFT);
858 	pg_sz_lvl |= (sq->hwq.level & CMDQ_CREATE_QP1_SQ_LVL_MASK);
859 	req.sq_pg_size_sq_lvl = pg_sz_lvl;
860 	req.sq_fwo_sq_sge =
861 		cpu_to_le16((sq->max_sge & CMDQ_CREATE_QP1_SQ_SGE_MASK) <<
862 			     CMDQ_CREATE_QP1_SQ_SGE_SFT);
863 	req.scq_cid = cpu_to_le32(qp->scq->id);
864 
865 	/* RQ */
866 	if (rq->max_wqe) {
867 		rq->dbinfo.flags = 0;
868 		hwq_attr.res = res;
869 		hwq_attr.sginfo = &rq->sg_info;
870 		hwq_attr.stride = sizeof(struct sq_sge);
871 		hwq_attr.depth = bnxt_qplib_get_depth(rq, qp->wqe_mode, false);
872 		hwq_attr.type = HWQ_TYPE_QUEUE;
873 		rc = bnxt_qplib_alloc_init_hwq(&rq->hwq, &hwq_attr);
874 		if (rc)
875 			goto sq_swq;
876 		rc = bnxt_qplib_alloc_init_swq(rq);
877 		if (rc)
878 			goto fail_rq;
879 		req.rq_size = cpu_to_le32(rq->max_wqe);
880 		pbl = &rq->hwq.pbl[PBL_LVL_0];
881 		req.rq_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
882 		pg_sz_lvl = (bnxt_qplib_base_pg_size(&rq->hwq) <<
883 			     CMDQ_CREATE_QP1_RQ_PG_SIZE_SFT);
884 		pg_sz_lvl |= (rq->hwq.level & CMDQ_CREATE_QP1_RQ_LVL_MASK);
885 		req.rq_pg_size_rq_lvl = pg_sz_lvl;
886 		req.rq_fwo_rq_sge =
887 			cpu_to_le16((rq->max_sge &
888 				     CMDQ_CREATE_QP1_RQ_SGE_MASK) <<
889 				    CMDQ_CREATE_QP1_RQ_SGE_SFT);
890 	}
891 	req.rcq_cid = cpu_to_le32(qp->rcq->id);
892 	/* Header buffer - allow hdr_buf pass in */
893 	rc = bnxt_qplib_alloc_qp_hdr_buf(res, qp);
894 	if (rc) {
895 		rc = -ENOMEM;
896 		goto rq_rwq;
897 	}
898 	qp_flags |= CMDQ_CREATE_QP1_QP_FLAGS_RESERVED_LKEY_ENABLE;
899 	req.qp_flags = cpu_to_le32(qp_flags);
900 	req.pd_id = cpu_to_le32(qp->pd->id);
901 
902 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), sizeof(resp), 0);
903 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
904 	if (rc)
905 		goto fail;
906 
907 	qp->id = le32_to_cpu(resp.xid);
908 	qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET;
909 	qp->cctx = res->cctx;
910 	sq->dbinfo.hwq = &sq->hwq;
911 	sq->dbinfo.xid = qp->id;
912 	sq->dbinfo.db = qp->dpi->dbr;
913 	sq->dbinfo.max_slot = bnxt_qplib_set_sq_max_slot(qp->wqe_mode);
914 	if (rq->max_wqe) {
915 		rq->dbinfo.hwq = &rq->hwq;
916 		rq->dbinfo.xid = qp->id;
917 		rq->dbinfo.db = qp->dpi->dbr;
918 		rq->dbinfo.max_slot = bnxt_qplib_set_rq_max_slot(rq->wqe_size);
919 	}
920 	tbl_indx = map_qp_id_to_tbl_indx(qp->id, rcfw);
921 	rcfw->qp_tbl[tbl_indx].qp_id = qp->id;
922 	rcfw->qp_tbl[tbl_indx].qp_handle = (void *)qp;
923 
924 	return 0;
925 
926 fail:
927 	bnxt_qplib_free_qp_hdr_buf(res, qp);
928 rq_rwq:
929 	kfree(rq->swq);
930 fail_rq:
931 	bnxt_qplib_free_hwq(res, &rq->hwq);
932 sq_swq:
933 	kfree(sq->swq);
934 fail_sq:
935 	bnxt_qplib_free_hwq(res, &sq->hwq);
936 	return rc;
937 }
938 
bnxt_qplib_init_psn_ptr(struct bnxt_qplib_qp * qp,int size)939 static void bnxt_qplib_init_psn_ptr(struct bnxt_qplib_qp *qp, int size)
940 {
941 	struct bnxt_qplib_hwq *hwq;
942 	struct bnxt_qplib_q *sq;
943 	u64 fpsne, psn_pg;
944 	u16 indx_pad = 0;
945 
946 	sq = &qp->sq;
947 	hwq = &sq->hwq;
948 	/* First psn entry */
949 	fpsne = (u64)bnxt_qplib_get_qe(hwq, hwq->depth, &psn_pg);
950 	if (!IS_ALIGNED(fpsne, PAGE_SIZE))
951 		indx_pad = (fpsne & ~PAGE_MASK) / size;
952 	hwq->pad_pgofft = indx_pad;
953 	hwq->pad_pg = (u64 *)psn_pg;
954 	hwq->pad_stride = size;
955 }
956 
bnxt_qplib_create_qp(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)957 int bnxt_qplib_create_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
958 {
959 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
960 	struct bnxt_qplib_hwq_attr hwq_attr = {};
961 	struct bnxt_qplib_sg_info sginfo = {};
962 	struct creq_create_qp_resp resp = {};
963 	struct bnxt_qplib_cmdqmsg msg = {};
964 	struct bnxt_qplib_q *sq = &qp->sq;
965 	struct bnxt_qplib_q *rq = &qp->rq;
966 	struct cmdq_create_qp req = {};
967 	int rc, req_size, psn_sz = 0;
968 	struct bnxt_qplib_hwq *xrrq;
969 	struct bnxt_qplib_pbl *pbl;
970 	u32 qp_flags = 0;
971 	u8 pg_sz_lvl;
972 	u32 tbl_indx;
973 	u16 nsge;
974 
975 	qp->is_host_msn_tbl = _is_host_msn_table(res->dattr->dev_cap_flags2);
976 	sq->dbinfo.flags = 0;
977 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
978 				 CMDQ_BASE_OPCODE_CREATE_QP,
979 				 sizeof(req));
980 
981 	/* General */
982 	req.type = qp->type;
983 	req.dpi = cpu_to_le32(qp->dpi->dpi);
984 	req.qp_handle = cpu_to_le64(qp->qp_handle);
985 
986 	/* SQ */
987 	if (qp->type == CMDQ_CREATE_QP_TYPE_RC) {
988 		psn_sz = bnxt_qplib_is_chip_gen_p5_p7(res->cctx) ?
989 			 sizeof(struct sq_psn_search_ext) :
990 			 sizeof(struct sq_psn_search);
991 
992 		if (qp->is_host_msn_tbl) {
993 			psn_sz = sizeof(struct sq_msn_search);
994 			qp->msn = 0;
995 		}
996 	}
997 
998 	hwq_attr.res = res;
999 	hwq_attr.sginfo = &sq->sg_info;
1000 	hwq_attr.stride = sizeof(struct sq_sge);
1001 	hwq_attr.depth = bnxt_qplib_get_depth(sq, qp->wqe_mode, true);
1002 	hwq_attr.aux_stride = psn_sz;
1003 	hwq_attr.aux_depth = psn_sz ? bnxt_qplib_set_sq_size(sq, qp->wqe_mode)
1004 				    : 0;
1005 	/* Update msn tbl size */
1006 	if (qp->is_host_msn_tbl && psn_sz) {
1007 		if (qp->wqe_mode == BNXT_QPLIB_WQE_MODE_STATIC)
1008 			hwq_attr.aux_depth =
1009 				roundup_pow_of_two(bnxt_qplib_set_sq_size(sq, qp->wqe_mode));
1010 		else
1011 			hwq_attr.aux_depth =
1012 				roundup_pow_of_two(bnxt_qplib_set_sq_size(sq, qp->wqe_mode)) / 2;
1013 		qp->msn_tbl_sz = hwq_attr.aux_depth;
1014 		qp->msn = 0;
1015 	}
1016 
1017 	hwq_attr.type = HWQ_TYPE_QUEUE;
1018 	rc = bnxt_qplib_alloc_init_hwq(&sq->hwq, &hwq_attr);
1019 	if (rc)
1020 		return rc;
1021 
1022 	if (!sq->hwq.is_user) {
1023 		rc = bnxt_qplib_alloc_init_swq(sq);
1024 		if (rc)
1025 			goto fail_sq;
1026 
1027 		if (psn_sz)
1028 			bnxt_qplib_init_psn_ptr(qp, psn_sz);
1029 	}
1030 	req.sq_size = cpu_to_le32(bnxt_qplib_set_sq_size(sq, qp->wqe_mode));
1031 	pbl = &sq->hwq.pbl[PBL_LVL_0];
1032 	req.sq_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
1033 	pg_sz_lvl = (bnxt_qplib_base_pg_size(&sq->hwq) <<
1034 		     CMDQ_CREATE_QP_SQ_PG_SIZE_SFT);
1035 	pg_sz_lvl |= (sq->hwq.level & CMDQ_CREATE_QP_SQ_LVL_MASK);
1036 	req.sq_pg_size_sq_lvl = pg_sz_lvl;
1037 	req.sq_fwo_sq_sge =
1038 		cpu_to_le16(((sq->max_sge & CMDQ_CREATE_QP_SQ_SGE_MASK) <<
1039 			     CMDQ_CREATE_QP_SQ_SGE_SFT) | 0);
1040 	req.scq_cid = cpu_to_le32(qp->scq->id);
1041 
1042 	/* RQ */
1043 	if (!qp->srq) {
1044 		rq->dbinfo.flags = 0;
1045 		hwq_attr.res = res;
1046 		hwq_attr.sginfo = &rq->sg_info;
1047 		hwq_attr.stride = sizeof(struct sq_sge);
1048 		hwq_attr.depth = bnxt_qplib_get_depth(rq, qp->wqe_mode, false);
1049 		hwq_attr.aux_stride = 0;
1050 		hwq_attr.aux_depth = 0;
1051 		hwq_attr.type = HWQ_TYPE_QUEUE;
1052 		rc = bnxt_qplib_alloc_init_hwq(&rq->hwq, &hwq_attr);
1053 		if (rc)
1054 			goto sq_swq;
1055 		if (!rq->hwq.is_user) {
1056 			rc = bnxt_qplib_alloc_init_swq(rq);
1057 			if (rc)
1058 				goto fail_rq;
1059 		}
1060 
1061 		req.rq_size = cpu_to_le32(rq->max_wqe);
1062 		pbl = &rq->hwq.pbl[PBL_LVL_0];
1063 		req.rq_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
1064 		pg_sz_lvl = (bnxt_qplib_base_pg_size(&rq->hwq) <<
1065 			     CMDQ_CREATE_QP_RQ_PG_SIZE_SFT);
1066 		pg_sz_lvl |= (rq->hwq.level & CMDQ_CREATE_QP_RQ_LVL_MASK);
1067 		req.rq_pg_size_rq_lvl = pg_sz_lvl;
1068 		nsge = (qp->wqe_mode == BNXT_QPLIB_WQE_MODE_STATIC) ?
1069 			6 : rq->max_sge;
1070 		req.rq_fwo_rq_sge =
1071 			cpu_to_le16(((nsge &
1072 				      CMDQ_CREATE_QP_RQ_SGE_MASK) <<
1073 				     CMDQ_CREATE_QP_RQ_SGE_SFT) | 0);
1074 	} else {
1075 		/* SRQ */
1076 		qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_SRQ_USED;
1077 		req.srq_cid = cpu_to_le32(qp->srq->id);
1078 	}
1079 	req.rcq_cid = cpu_to_le32(qp->rcq->id);
1080 
1081 	qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_RESERVED_LKEY_ENABLE;
1082 	qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_FR_PMR_ENABLED;
1083 	if (qp->sig_type)
1084 		qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_FORCE_COMPLETION;
1085 	if (qp->wqe_mode == BNXT_QPLIB_WQE_MODE_VARIABLE)
1086 		qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_VARIABLE_SIZED_WQE_ENABLED;
1087 	if (bnxt_ext_stats_supported(res->cctx, res->dattr->dev_cap_flags, res->is_vf))
1088 		qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_EXT_STATS_ENABLED;
1089 
1090 	req.qp_flags = cpu_to_le32(qp_flags);
1091 
1092 	/* ORRQ and IRRQ */
1093 	if (psn_sz) {
1094 		xrrq = &qp->orrq;
1095 		xrrq->max_elements =
1096 			ORD_LIMIT_TO_ORRQ_SLOTS(qp->max_rd_atomic);
1097 		req_size = xrrq->max_elements *
1098 			   BNXT_QPLIB_MAX_ORRQE_ENTRY_SIZE + PAGE_SIZE - 1;
1099 		req_size &= ~(PAGE_SIZE - 1);
1100 		sginfo.pgsize = req_size;
1101 		sginfo.pgshft = PAGE_SHIFT;
1102 
1103 		hwq_attr.res = res;
1104 		hwq_attr.sginfo = &sginfo;
1105 		hwq_attr.depth = xrrq->max_elements;
1106 		hwq_attr.stride = BNXT_QPLIB_MAX_ORRQE_ENTRY_SIZE;
1107 		hwq_attr.aux_stride = 0;
1108 		hwq_attr.aux_depth = 0;
1109 		hwq_attr.type = HWQ_TYPE_CTX;
1110 		rc = bnxt_qplib_alloc_init_hwq(xrrq, &hwq_attr);
1111 		if (rc)
1112 			goto rq_swq;
1113 		pbl = &xrrq->pbl[PBL_LVL_0];
1114 		req.orrq_addr = cpu_to_le64(pbl->pg_map_arr[0]);
1115 
1116 		xrrq = &qp->irrq;
1117 		xrrq->max_elements = IRD_LIMIT_TO_IRRQ_SLOTS(
1118 						qp->max_dest_rd_atomic);
1119 		req_size = xrrq->max_elements *
1120 			   BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE + PAGE_SIZE - 1;
1121 		req_size &= ~(PAGE_SIZE - 1);
1122 		sginfo.pgsize = req_size;
1123 		hwq_attr.depth =  xrrq->max_elements;
1124 		hwq_attr.stride = BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE;
1125 		rc = bnxt_qplib_alloc_init_hwq(xrrq, &hwq_attr);
1126 		if (rc)
1127 			goto fail_orrq;
1128 
1129 		pbl = &xrrq->pbl[PBL_LVL_0];
1130 		req.irrq_addr = cpu_to_le64(pbl->pg_map_arr[0]);
1131 	}
1132 	req.pd_id = cpu_to_le32(qp->pd->id);
1133 
1134 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),
1135 				sizeof(resp), 0);
1136 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
1137 	if (rc)
1138 		goto fail;
1139 
1140 	qp->id = le32_to_cpu(resp.xid);
1141 	qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET;
1142 	INIT_LIST_HEAD(&qp->sq_flush);
1143 	INIT_LIST_HEAD(&qp->rq_flush);
1144 	qp->cctx = res->cctx;
1145 	sq->dbinfo.hwq = &sq->hwq;
1146 	sq->dbinfo.xid = qp->id;
1147 	sq->dbinfo.db = qp->dpi->dbr;
1148 	sq->dbinfo.max_slot = bnxt_qplib_set_sq_max_slot(qp->wqe_mode);
1149 	if (rq->max_wqe) {
1150 		rq->dbinfo.hwq = &rq->hwq;
1151 		rq->dbinfo.xid = qp->id;
1152 		rq->dbinfo.db = qp->dpi->dbr;
1153 		rq->dbinfo.max_slot = bnxt_qplib_set_rq_max_slot(rq->wqe_size);
1154 	}
1155 	spin_lock_bh(&rcfw->tbl_lock);
1156 	tbl_indx = map_qp_id_to_tbl_indx(qp->id, rcfw);
1157 	rcfw->qp_tbl[tbl_indx].qp_id = qp->id;
1158 	rcfw->qp_tbl[tbl_indx].qp_handle = (void *)qp;
1159 	spin_unlock_bh(&rcfw->tbl_lock);
1160 
1161 	return 0;
1162 fail:
1163 	bnxt_qplib_free_hwq(res, &qp->irrq);
1164 fail_orrq:
1165 	bnxt_qplib_free_hwq(res, &qp->orrq);
1166 rq_swq:
1167 	kfree(rq->swq);
1168 fail_rq:
1169 	bnxt_qplib_free_hwq(res, &rq->hwq);
1170 sq_swq:
1171 	kfree(sq->swq);
1172 fail_sq:
1173 	bnxt_qplib_free_hwq(res, &sq->hwq);
1174 	return rc;
1175 }
1176 
__modify_flags_from_init_state(struct bnxt_qplib_qp * qp)1177 static void __modify_flags_from_init_state(struct bnxt_qplib_qp *qp)
1178 {
1179 	switch (qp->state) {
1180 	case CMDQ_MODIFY_QP_NEW_STATE_RTR:
1181 		/* INIT->RTR, configure the path_mtu to the default
1182 		 * 2048 if not being requested
1183 		 */
1184 		if (!(qp->modify_flags &
1185 		    CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU)) {
1186 			qp->modify_flags |=
1187 				CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU;
1188 			qp->path_mtu =
1189 				CMDQ_MODIFY_QP_PATH_MTU_MTU_2048;
1190 		}
1191 		/* Bono FW require the max_dest_rd_atomic to be >= 1 */
1192 		if (qp->max_dest_rd_atomic < 1)
1193 			qp->max_dest_rd_atomic = 1;
1194 		qp->modify_flags &= ~CMDQ_MODIFY_QP_MODIFY_MASK_SRC_MAC;
1195 		/* Bono FW 20.6.5 requires SGID_INDEX configuration */
1196 		if (!(qp->modify_flags &
1197 		    CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX)) {
1198 			qp->modify_flags |=
1199 				CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX;
1200 			qp->ah.sgid_index = 0;
1201 		}
1202 		break;
1203 	default:
1204 		break;
1205 	}
1206 }
1207 
__modify_flags_from_rtr_state(struct bnxt_qplib_qp * qp)1208 static void __modify_flags_from_rtr_state(struct bnxt_qplib_qp *qp)
1209 {
1210 	switch (qp->state) {
1211 	case CMDQ_MODIFY_QP_NEW_STATE_RTS:
1212 		/* Bono FW requires the max_rd_atomic to be >= 1 */
1213 		if (qp->max_rd_atomic < 1)
1214 			qp->max_rd_atomic = 1;
1215 		/* Bono FW does not allow PKEY_INDEX,
1216 		 * DGID, FLOW_LABEL, SGID_INDEX, HOP_LIMIT,
1217 		 * TRAFFIC_CLASS, DEST_MAC, PATH_MTU, RQ_PSN,
1218 		 * MIN_RNR_TIMER, MAX_DEST_RD_ATOMIC, DEST_QP_ID
1219 		 * modification
1220 		 */
1221 		qp->modify_flags &=
1222 			~(CMDQ_MODIFY_QP_MODIFY_MASK_PKEY |
1223 			  CMDQ_MODIFY_QP_MODIFY_MASK_DGID |
1224 			  CMDQ_MODIFY_QP_MODIFY_MASK_FLOW_LABEL |
1225 			  CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX |
1226 			  CMDQ_MODIFY_QP_MODIFY_MASK_HOP_LIMIT |
1227 			  CMDQ_MODIFY_QP_MODIFY_MASK_TRAFFIC_CLASS |
1228 			  CMDQ_MODIFY_QP_MODIFY_MASK_DEST_MAC |
1229 			  CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU |
1230 			  CMDQ_MODIFY_QP_MODIFY_MASK_RQ_PSN |
1231 			  CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER |
1232 			  CMDQ_MODIFY_QP_MODIFY_MASK_MAX_DEST_RD_ATOMIC |
1233 			  CMDQ_MODIFY_QP_MODIFY_MASK_DEST_QP_ID);
1234 		break;
1235 	default:
1236 		break;
1237 	}
1238 }
1239 
__filter_modify_flags(struct bnxt_qplib_qp * qp)1240 static void __filter_modify_flags(struct bnxt_qplib_qp *qp)
1241 {
1242 	switch (qp->cur_qp_state) {
1243 	case CMDQ_MODIFY_QP_NEW_STATE_RESET:
1244 		break;
1245 	case CMDQ_MODIFY_QP_NEW_STATE_INIT:
1246 		__modify_flags_from_init_state(qp);
1247 		break;
1248 	case CMDQ_MODIFY_QP_NEW_STATE_RTR:
1249 		__modify_flags_from_rtr_state(qp);
1250 		break;
1251 	case CMDQ_MODIFY_QP_NEW_STATE_RTS:
1252 		break;
1253 	case CMDQ_MODIFY_QP_NEW_STATE_SQD:
1254 		break;
1255 	case CMDQ_MODIFY_QP_NEW_STATE_SQE:
1256 		break;
1257 	case CMDQ_MODIFY_QP_NEW_STATE_ERR:
1258 		break;
1259 	default:
1260 		break;
1261 	}
1262 }
1263 
bnxt_set_mandatory_attributes(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp,struct cmdq_modify_qp * req)1264 static void bnxt_set_mandatory_attributes(struct bnxt_qplib_res *res,
1265 					  struct bnxt_qplib_qp *qp,
1266 					  struct cmdq_modify_qp *req)
1267 {
1268 	u32 mandatory_flags = 0;
1269 
1270 	if (qp->type == CMDQ_MODIFY_QP_QP_TYPE_RC)
1271 		mandatory_flags |= CMDQ_MODIFY_QP_MODIFY_MASK_ACCESS;
1272 
1273 	if (qp->cur_qp_state == CMDQ_MODIFY_QP_NEW_STATE_INIT &&
1274 	    qp->state == CMDQ_MODIFY_QP_NEW_STATE_RTR) {
1275 		if (qp->type == CMDQ_MODIFY_QP_QP_TYPE_RC && qp->srq)
1276 			req->flags = cpu_to_le16(CMDQ_MODIFY_QP_FLAGS_SRQ_USED);
1277 		mandatory_flags |= CMDQ_MODIFY_QP_MODIFY_MASK_PKEY;
1278 	}
1279 
1280 	if (_is_min_rnr_in_rtr_rts_mandatory(res->dattr->dev_cap_flags2) &&
1281 	    (qp->cur_qp_state == CMDQ_MODIFY_QP_NEW_STATE_RTR &&
1282 	     qp->state == CMDQ_MODIFY_QP_NEW_STATE_RTS)) {
1283 		if (qp->type == CMDQ_MODIFY_QP_QP_TYPE_RC)
1284 			mandatory_flags |=
1285 				CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER;
1286 	}
1287 
1288 	if (qp->type == CMDQ_MODIFY_QP_QP_TYPE_UD ||
1289 	    qp->type == CMDQ_MODIFY_QP_QP_TYPE_GSI)
1290 		mandatory_flags |= CMDQ_MODIFY_QP_MODIFY_MASK_QKEY;
1291 
1292 	qp->modify_flags |= mandatory_flags;
1293 	req->qp_type = qp->type;
1294 }
1295 
is_optimized_state_transition(struct bnxt_qplib_qp * qp)1296 static bool is_optimized_state_transition(struct bnxt_qplib_qp *qp)
1297 {
1298 	if ((qp->cur_qp_state == CMDQ_MODIFY_QP_NEW_STATE_INIT &&
1299 	     qp->state == CMDQ_MODIFY_QP_NEW_STATE_RTR) ||
1300 	    (qp->cur_qp_state == CMDQ_MODIFY_QP_NEW_STATE_RTR &&
1301 	     qp->state == CMDQ_MODIFY_QP_NEW_STATE_RTS))
1302 		return true;
1303 
1304 	return false;
1305 }
1306 
bnxt_qplib_modify_qp(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)1307 int bnxt_qplib_modify_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
1308 {
1309 	struct bnxt_qplib_sgid_tbl *sgid_tbl = &res->sgid_tbl;
1310 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
1311 	struct creq_modify_qp_resp resp = {};
1312 	struct bnxt_qplib_cmdqmsg msg = {};
1313 	struct cmdq_modify_qp req = {};
1314 	u16 vlan_pcp_vlan_dei_vlan_id;
1315 	u32 bmask, bmask_ext;
1316 	u32 temp32[4];
1317 	int rc;
1318 
1319 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
1320 				 CMDQ_BASE_OPCODE_MODIFY_QP,
1321 				 sizeof(req));
1322 
1323 	/* Filter out the qp_attr_mask based on the state->new transition */
1324 	__filter_modify_flags(qp);
1325 	if (qp->modify_flags & CMDQ_MODIFY_QP_MODIFY_MASK_STATE) {
1326 		/* Set mandatory attributes for INIT -> RTR and RTR -> RTS transition */
1327 		if (_is_optimize_modify_qp_supported(res->dattr->dev_cap_flags2) &&
1328 		    is_optimized_state_transition(qp))
1329 			bnxt_set_mandatory_attributes(res, qp, &req);
1330 	}
1331 
1332 	bmask = qp->modify_flags;
1333 	req.modify_mask = cpu_to_le32(qp->modify_flags);
1334 	bmask_ext = qp->ext_modify_flags;
1335 	req.ext_modify_mask = cpu_to_le32(qp->ext_modify_flags);
1336 	req.qp_cid = cpu_to_le32(qp->id);
1337 
1338 	if (bmask_ext & CMDQ_MODIFY_QP_EXT_MODIFY_MASK_RATE_LIMIT_VALID)
1339 		req.rate_limit = cpu_to_le32(qp->rate_limit);
1340 
1341 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_STATE) {
1342 		req.network_type_en_sqd_async_notify_new_state =
1343 				(qp->state & CMDQ_MODIFY_QP_NEW_STATE_MASK) |
1344 				(qp->en_sqd_async_notify ?
1345 					CMDQ_MODIFY_QP_EN_SQD_ASYNC_NOTIFY : 0);
1346 	}
1347 	req.network_type_en_sqd_async_notify_new_state |= qp->nw_type;
1348 
1349 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_ACCESS)
1350 		req.access = qp->access;
1351 
1352 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_PKEY)
1353 		req.pkey = cpu_to_le16(IB_DEFAULT_PKEY_FULL);
1354 
1355 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_QKEY)
1356 		req.qkey = cpu_to_le32(qp->qkey);
1357 
1358 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DGID) {
1359 		memcpy(temp32, qp->ah.dgid.data, sizeof(struct bnxt_qplib_gid));
1360 		req.dgid[0] = cpu_to_le32(temp32[0]);
1361 		req.dgid[1] = cpu_to_le32(temp32[1]);
1362 		req.dgid[2] = cpu_to_le32(temp32[2]);
1363 		req.dgid[3] = cpu_to_le32(temp32[3]);
1364 	}
1365 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_FLOW_LABEL)
1366 		req.flow_label = cpu_to_le32(qp->ah.flow_label);
1367 
1368 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX) {
1369 		if (qp->type == CMDQ_CREATE_QP_TYPE_RAW_ETHERTYPE)
1370 			req.sgid_index =
1371 				cpu_to_le16(sgid_tbl->hw_id[qp->ugid_index]);
1372 		else
1373 			req.sgid_index =
1374 				cpu_to_le16(sgid_tbl->hw_id[qp->ah.sgid_index]);
1375 	}
1376 
1377 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_HOP_LIMIT)
1378 		req.hop_limit = qp->ah.hop_limit;
1379 
1380 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_TRAFFIC_CLASS)
1381 		req.traffic_class = qp->ah.traffic_class;
1382 
1383 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DEST_MAC)
1384 		memcpy(req.dest_mac, qp->ah.dmac, 6);
1385 
1386 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU)
1387 		req.path_mtu_pingpong_push_enable |= qp->path_mtu;
1388 
1389 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_TIMEOUT)
1390 		req.timeout = qp->timeout;
1391 
1392 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RETRY_CNT)
1393 		req.retry_cnt = qp->retry_cnt;
1394 
1395 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RNR_RETRY)
1396 		req.rnr_retry = qp->rnr_retry;
1397 
1398 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER)
1399 		req.min_rnr_timer = qp->min_rnr_timer;
1400 
1401 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RQ_PSN)
1402 		req.rq_psn = cpu_to_le32(qp->rq.psn);
1403 
1404 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_SQ_PSN)
1405 		req.sq_psn = cpu_to_le32(qp->sq.psn);
1406 
1407 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MAX_RD_ATOMIC)
1408 		req.max_rd_atomic =
1409 			ORD_LIMIT_TO_ORRQ_SLOTS(qp->max_rd_atomic);
1410 
1411 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MAX_DEST_RD_ATOMIC)
1412 		req.max_dest_rd_atomic =
1413 			IRD_LIMIT_TO_IRRQ_SLOTS(qp->max_dest_rd_atomic);
1414 
1415 	req.sq_size = cpu_to_le32(qp->sq.hwq.max_elements);
1416 	req.rq_size = cpu_to_le32(qp->rq.hwq.max_elements);
1417 	req.sq_sge = cpu_to_le16(qp->sq.max_sge);
1418 	req.rq_sge = cpu_to_le16(qp->rq.max_sge);
1419 	req.max_inline_data = cpu_to_le32(qp->max_inline_data);
1420 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DEST_QP_ID)
1421 		req.dest_qp_id = cpu_to_le32(qp->dest_qpn);
1422 
1423 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_VLAN_ID) {
1424 		vlan_pcp_vlan_dei_vlan_id =
1425 			((res->sgid_tbl.tbl[qp->ah.sgid_index].vlan_id <<
1426 			  CMDQ_MODIFY_QP_VLAN_ID_SFT) &
1427 			 CMDQ_MODIFY_QP_VLAN_ID_MASK);
1428 		vlan_pcp_vlan_dei_vlan_id |=
1429 			((qp->ah.sl << CMDQ_MODIFY_QP_VLAN_PCP_SFT) &
1430 			 CMDQ_MODIFY_QP_VLAN_PCP_MASK);
1431 		req.vlan_pcp_vlan_dei_vlan_id = cpu_to_le16(vlan_pcp_vlan_dei_vlan_id);
1432 	}
1433 
1434 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),  sizeof(resp), 0);
1435 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
1436 	if (rc)
1437 		return rc;
1438 
1439 	if (bmask_ext & CMDQ_MODIFY_QP_EXT_MODIFY_MASK_RATE_LIMIT_VALID)
1440 		qp->shaper_allocation_status = resp.shaper_allocation_status;
1441 	qp->cur_qp_state = qp->state;
1442 	return 0;
1443 }
1444 
bnxt_qplib_query_qp(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)1445 int bnxt_qplib_query_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
1446 {
1447 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
1448 	struct creq_query_qp_resp resp = {};
1449 	struct bnxt_qplib_cmdqmsg msg = {};
1450 	struct bnxt_qplib_rcfw_sbuf sbuf;
1451 	struct creq_query_qp_resp_sb *sb;
1452 	struct cmdq_query_qp req = {};
1453 	u32 temp32[4];
1454 	int i, rc;
1455 
1456 	sbuf.size = ALIGN(sizeof(*sb), BNXT_QPLIB_CMDQE_UNITS);
1457 	sbuf.sb = dma_alloc_coherent(&rcfw->pdev->dev, sbuf.size,
1458 				     &sbuf.dma_addr, GFP_KERNEL);
1459 	if (!sbuf.sb)
1460 		return -ENOMEM;
1461 	sb = sbuf.sb;
1462 
1463 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
1464 				 CMDQ_BASE_OPCODE_QUERY_QP,
1465 				 sizeof(req));
1466 
1467 	req.qp_cid = cpu_to_le32(qp->id);
1468 	req.resp_size = sbuf.size / BNXT_QPLIB_CMDQE_UNITS;
1469 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, &sbuf, sizeof(req),
1470 				sizeof(resp), 0);
1471 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
1472 	if (rc)
1473 		goto bail;
1474 	/* Extract the context from the side buffer */
1475 	qp->state = sb->en_sqd_async_notify_state &
1476 			CREQ_QUERY_QP_RESP_SB_STATE_MASK;
1477 	qp->en_sqd_async_notify = sb->en_sqd_async_notify_state &
1478 				  CREQ_QUERY_QP_RESP_SB_EN_SQD_ASYNC_NOTIFY;
1479 	qp->access = sb->access;
1480 	qp->pkey_index = le16_to_cpu(sb->pkey);
1481 	qp->qkey = le32_to_cpu(sb->qkey);
1482 	qp->udp_sport = le16_to_cpu(sb->udp_src_port);
1483 
1484 	temp32[0] = le32_to_cpu(sb->dgid[0]);
1485 	temp32[1] = le32_to_cpu(sb->dgid[1]);
1486 	temp32[2] = le32_to_cpu(sb->dgid[2]);
1487 	temp32[3] = le32_to_cpu(sb->dgid[3]);
1488 	memcpy(qp->ah.dgid.data, temp32, sizeof(qp->ah.dgid.data));
1489 
1490 	qp->ah.flow_label = le32_to_cpu(sb->flow_label);
1491 
1492 	qp->ah.sgid_index = 0;
1493 	for (i = 0; i < res->sgid_tbl.max; i++) {
1494 		if (res->sgid_tbl.hw_id[i] == le16_to_cpu(sb->sgid_index)) {
1495 			qp->ah.sgid_index = i;
1496 			break;
1497 		}
1498 	}
1499 	if (i == res->sgid_tbl.max)
1500 		dev_warn(&res->pdev->dev, "SGID not found??\n");
1501 
1502 	qp->ah.hop_limit = sb->hop_limit;
1503 	qp->ah.traffic_class = sb->traffic_class;
1504 	memcpy(qp->ah.dmac, sb->dest_mac, 6);
1505 	qp->ah.vlan_id = (le16_to_cpu(sb->path_mtu_dest_vlan_id) &
1506 				CREQ_QUERY_QP_RESP_SB_VLAN_ID_MASK) >>
1507 				CREQ_QUERY_QP_RESP_SB_VLAN_ID_SFT;
1508 	qp->path_mtu = (le16_to_cpu(sb->path_mtu_dest_vlan_id) &
1509 				    CREQ_QUERY_QP_RESP_SB_PATH_MTU_MASK) >>
1510 				    CREQ_QUERY_QP_RESP_SB_PATH_MTU_SFT;
1511 	qp->timeout = sb->timeout;
1512 	qp->retry_cnt = sb->retry_cnt;
1513 	qp->rnr_retry = sb->rnr_retry;
1514 	qp->min_rnr_timer = sb->min_rnr_timer;
1515 	qp->rq.psn = le32_to_cpu(sb->rq_psn);
1516 	qp->max_rd_atomic = ORRQ_SLOTS_TO_ORD_LIMIT(sb->max_rd_atomic);
1517 	qp->sq.psn = le32_to_cpu(sb->sq_psn);
1518 	qp->max_dest_rd_atomic =
1519 			IRRQ_SLOTS_TO_IRD_LIMIT(sb->max_dest_rd_atomic);
1520 	qp->sq.max_wqe = qp->sq.hwq.max_elements;
1521 	qp->rq.max_wqe = qp->rq.hwq.max_elements;
1522 	qp->sq.max_sge = le16_to_cpu(sb->sq_sge);
1523 	qp->rq.max_sge = le16_to_cpu(sb->rq_sge);
1524 	qp->max_inline_data = le32_to_cpu(sb->max_inline_data);
1525 	qp->dest_qpn = le32_to_cpu(sb->dest_qp_id);
1526 	memcpy(qp->smac, sb->src_mac, 6);
1527 	qp->vlan_id = le16_to_cpu(sb->vlan_pcp_vlan_dei_vlan_id);
1528 	qp->port_id = le16_to_cpu(sb->port_id);
1529 bail:
1530 	dma_free_coherent(&rcfw->pdev->dev, sbuf.size,
1531 			  sbuf.sb, sbuf.dma_addr);
1532 	return rc;
1533 }
1534 
__clean_cq(struct bnxt_qplib_cq * cq,u64 qp)1535 static void __clean_cq(struct bnxt_qplib_cq *cq, u64 qp)
1536 {
1537 	struct bnxt_qplib_hwq *cq_hwq = &cq->hwq;
1538 	u32 peek_flags, peek_cons;
1539 	struct cq_base *hw_cqe;
1540 	int i;
1541 
1542 	peek_flags = cq->dbinfo.flags;
1543 	peek_cons = cq_hwq->cons;
1544 	for (i = 0; i < cq_hwq->max_elements; i++) {
1545 		hw_cqe = bnxt_qplib_get_qe(cq_hwq, peek_cons, NULL);
1546 		if (!CQE_CMP_VALID(hw_cqe, peek_flags))
1547 			continue;
1548 		/*
1549 		 * The valid test of the entry must be done first before
1550 		 * reading any further.
1551 		 */
1552 		dma_rmb();
1553 		switch (hw_cqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK) {
1554 		case CQ_BASE_CQE_TYPE_REQ:
1555 		case CQ_BASE_CQE_TYPE_TERMINAL:
1556 		{
1557 			struct cq_req *cqe = (struct cq_req *)hw_cqe;
1558 
1559 			if (qp == le64_to_cpu(cqe->qp_handle))
1560 				cqe->qp_handle = 0;
1561 			break;
1562 		}
1563 		case CQ_BASE_CQE_TYPE_RES_RC:
1564 		case CQ_BASE_CQE_TYPE_RES_UD:
1565 		case CQ_BASE_CQE_TYPE_RES_RAWETH_QP1:
1566 		{
1567 			struct cq_res_rc *cqe = (struct cq_res_rc *)hw_cqe;
1568 
1569 			if (qp == le64_to_cpu(cqe->qp_handle))
1570 				cqe->qp_handle = 0;
1571 			break;
1572 		}
1573 		default:
1574 			break;
1575 		}
1576 		bnxt_qplib_hwq_incr_cons(cq_hwq->max_elements, &peek_cons,
1577 					 1, &peek_flags);
1578 	}
1579 }
1580 
bnxt_qplib_destroy_qp(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)1581 int bnxt_qplib_destroy_qp(struct bnxt_qplib_res *res,
1582 			  struct bnxt_qplib_qp *qp)
1583 {
1584 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
1585 	struct creq_destroy_qp_resp resp = {};
1586 	struct bnxt_qplib_cmdqmsg msg = {};
1587 	struct cmdq_destroy_qp req = {};
1588 	u32 tbl_indx;
1589 	int rc;
1590 
1591 	spin_lock_bh(&rcfw->tbl_lock);
1592 	tbl_indx = map_qp_id_to_tbl_indx(qp->id, rcfw);
1593 	rcfw->qp_tbl[tbl_indx].qp_id = BNXT_QPLIB_QP_ID_INVALID;
1594 	rcfw->qp_tbl[tbl_indx].qp_handle = NULL;
1595 	spin_unlock_bh(&rcfw->tbl_lock);
1596 
1597 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
1598 				 CMDQ_BASE_OPCODE_DESTROY_QP,
1599 				 sizeof(req));
1600 
1601 	req.qp_cid = cpu_to_le32(qp->id);
1602 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),
1603 				sizeof(resp), 0);
1604 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
1605 	if (rc) {
1606 		spin_lock_bh(&rcfw->tbl_lock);
1607 		rcfw->qp_tbl[tbl_indx].qp_id = qp->id;
1608 		rcfw->qp_tbl[tbl_indx].qp_handle = qp;
1609 		spin_unlock_bh(&rcfw->tbl_lock);
1610 		return rc;
1611 	}
1612 
1613 	return 0;
1614 }
1615 
bnxt_qplib_free_qp_res(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)1616 void bnxt_qplib_free_qp_res(struct bnxt_qplib_res *res,
1617 			    struct bnxt_qplib_qp *qp)
1618 {
1619 	bnxt_qplib_free_qp_hdr_buf(res, qp);
1620 	bnxt_qplib_free_hwq(res, &qp->sq.hwq);
1621 	kfree(qp->sq.swq);
1622 
1623 	bnxt_qplib_free_hwq(res, &qp->rq.hwq);
1624 	kfree(qp->rq.swq);
1625 
1626 	if (qp->irrq.max_elements)
1627 		bnxt_qplib_free_hwq(res, &qp->irrq);
1628 	if (qp->orrq.max_elements)
1629 		bnxt_qplib_free_hwq(res, &qp->orrq);
1630 
1631 }
1632 
bnxt_qplib_get_qp1_sq_buf(struct bnxt_qplib_qp * qp,struct bnxt_qplib_sge * sge)1633 void *bnxt_qplib_get_qp1_sq_buf(struct bnxt_qplib_qp *qp,
1634 				struct bnxt_qplib_sge *sge)
1635 {
1636 	struct bnxt_qplib_q *sq = &qp->sq;
1637 	u32 sw_prod;
1638 
1639 	memset(sge, 0, sizeof(*sge));
1640 
1641 	if (qp->sq_hdr_buf) {
1642 		sw_prod = sq->swq_start;
1643 		sge->addr = (dma_addr_t)(qp->sq_hdr_buf_map +
1644 					 sw_prod * qp->sq_hdr_buf_size);
1645 		sge->lkey = 0xFFFFFFFF;
1646 		sge->size = qp->sq_hdr_buf_size;
1647 		return qp->sq_hdr_buf + sw_prod * sge->size;
1648 	}
1649 	return NULL;
1650 }
1651 
bnxt_qplib_get_rq_prod_index(struct bnxt_qplib_qp * qp)1652 u32 bnxt_qplib_get_rq_prod_index(struct bnxt_qplib_qp *qp)
1653 {
1654 	struct bnxt_qplib_q *rq = &qp->rq;
1655 
1656 	return rq->swq_start;
1657 }
1658 
bnxt_qplib_get_qp_buf_from_index(struct bnxt_qplib_qp * qp,u32 index)1659 dma_addr_t bnxt_qplib_get_qp_buf_from_index(struct bnxt_qplib_qp *qp, u32 index)
1660 {
1661 	return (qp->rq_hdr_buf_map + index * qp->rq_hdr_buf_size);
1662 }
1663 
bnxt_qplib_get_qp1_rq_buf(struct bnxt_qplib_qp * qp,struct bnxt_qplib_sge * sge)1664 void *bnxt_qplib_get_qp1_rq_buf(struct bnxt_qplib_qp *qp,
1665 				struct bnxt_qplib_sge *sge)
1666 {
1667 	struct bnxt_qplib_q *rq = &qp->rq;
1668 	u32 sw_prod;
1669 
1670 	memset(sge, 0, sizeof(*sge));
1671 
1672 	if (qp->rq_hdr_buf) {
1673 		sw_prod = rq->swq_start;
1674 		sge->addr = (dma_addr_t)(qp->rq_hdr_buf_map +
1675 					 sw_prod * qp->rq_hdr_buf_size);
1676 		sge->lkey = 0xFFFFFFFF;
1677 		sge->size = qp->rq_hdr_buf_size;
1678 		return qp->rq_hdr_buf + sw_prod * sge->size;
1679 	}
1680 	return NULL;
1681 }
1682 
1683 /* Fil the MSN table into the next psn row */
bnxt_qplib_fill_msn_search(struct bnxt_qplib_qp * qp,struct bnxt_qplib_swqe * wqe,struct bnxt_qplib_swq * swq)1684 static void bnxt_qplib_fill_msn_search(struct bnxt_qplib_qp *qp,
1685 				       struct bnxt_qplib_swqe *wqe,
1686 				       struct bnxt_qplib_swq *swq)
1687 {
1688 	struct sq_msn_search *msns;
1689 	u32 start_psn, next_psn;
1690 	u16 start_idx;
1691 
1692 	msns = (struct sq_msn_search *)swq->psn_search;
1693 	msns->start_idx_next_psn_start_psn = 0;
1694 
1695 	start_psn = swq->start_psn;
1696 	next_psn = swq->next_psn;
1697 	start_idx = swq->slot_idx;
1698 	msns->start_idx_next_psn_start_psn |=
1699 		bnxt_re_update_msn_tbl(start_idx, next_psn, start_psn);
1700 	qp->msn++;
1701 	qp->msn %= qp->msn_tbl_sz;
1702 }
1703 
bnxt_qplib_fill_psn_search(struct bnxt_qplib_qp * qp,struct bnxt_qplib_swqe * wqe,struct bnxt_qplib_swq * swq)1704 static void bnxt_qplib_fill_psn_search(struct bnxt_qplib_qp *qp,
1705 				       struct bnxt_qplib_swqe *wqe,
1706 				       struct bnxt_qplib_swq *swq)
1707 {
1708 	struct sq_psn_search_ext *psns_ext;
1709 	struct sq_psn_search *psns;
1710 	u32 flg_npsn;
1711 	u32 op_spsn;
1712 
1713 	if (!swq->psn_search)
1714 		return;
1715 	/* Handle MSN differently on cap flags  */
1716 	if (qp->is_host_msn_tbl) {
1717 		bnxt_qplib_fill_msn_search(qp, wqe, swq);
1718 		return;
1719 	}
1720 	psns = (struct sq_psn_search *)swq->psn_search;
1721 	psns = swq->psn_search;
1722 	psns_ext = swq->psn_ext;
1723 
1724 	op_spsn = ((swq->start_psn << SQ_PSN_SEARCH_START_PSN_SFT) &
1725 		    SQ_PSN_SEARCH_START_PSN_MASK);
1726 	op_spsn |= ((wqe->type << SQ_PSN_SEARCH_OPCODE_SFT) &
1727 		     SQ_PSN_SEARCH_OPCODE_MASK);
1728 	flg_npsn = ((swq->next_psn << SQ_PSN_SEARCH_NEXT_PSN_SFT) &
1729 		     SQ_PSN_SEARCH_NEXT_PSN_MASK);
1730 
1731 	if (bnxt_qplib_is_chip_gen_p5_p7(qp->cctx)) {
1732 		psns_ext->opcode_start_psn = cpu_to_le32(op_spsn);
1733 		psns_ext->flags_next_psn = cpu_to_le32(flg_npsn);
1734 		psns_ext->start_slot_idx = cpu_to_le16(swq->slot_idx);
1735 	} else {
1736 		psns->opcode_start_psn = cpu_to_le32(op_spsn);
1737 		psns->flags_next_psn = cpu_to_le32(flg_npsn);
1738 	}
1739 }
1740 
bnxt_qplib_put_inline(struct bnxt_qplib_qp * qp,struct bnxt_qplib_swqe * wqe,u32 * idx)1741 static unsigned int bnxt_qplib_put_inline(struct bnxt_qplib_qp *qp,
1742 					  struct bnxt_qplib_swqe *wqe,
1743 					  u32 *idx)
1744 {
1745 	struct bnxt_qplib_hwq *hwq;
1746 	int len, t_len, offt;
1747 	bool pull_dst = true;
1748 	void *il_dst = NULL;
1749 	void *il_src = NULL;
1750 	int t_cplen, cplen;
1751 	int indx;
1752 
1753 	hwq = &qp->sq.hwq;
1754 	t_len = 0;
1755 	for (indx = 0; indx < wqe->num_sge; indx++) {
1756 		len = wqe->sg_list[indx].size;
1757 		il_src = (void *)wqe->sg_list[indx].addr;
1758 		t_len += len;
1759 		if (t_len > qp->max_inline_data)
1760 			return BNXT_RE_INVAL_MSG_SIZE;
1761 		while (len) {
1762 			if (pull_dst) {
1763 				pull_dst = false;
1764 				il_dst = bnxt_qplib_get_prod_qe(hwq, *idx);
1765 				(*idx)++;
1766 				t_cplen = 0;
1767 				offt = 0;
1768 			}
1769 			cplen = min_t(int, len, sizeof(struct sq_sge));
1770 			cplen = min_t(int, cplen,
1771 					(sizeof(struct sq_sge) - offt));
1772 			memcpy(il_dst, il_src, cplen);
1773 			t_cplen += cplen;
1774 			il_src += cplen;
1775 			il_dst += cplen;
1776 			offt += cplen;
1777 			len -= cplen;
1778 			if (t_cplen == sizeof(struct sq_sge))
1779 				pull_dst = true;
1780 		}
1781 	}
1782 
1783 	return t_len;
1784 }
1785 
bnxt_qplib_put_sges(struct bnxt_qplib_hwq * hwq,struct bnxt_qplib_sge * ssge,u32 nsge,u32 * idx)1786 static unsigned int bnxt_qplib_put_sges(struct bnxt_qplib_hwq *hwq,
1787 					struct bnxt_qplib_sge *ssge,
1788 					u32 nsge, u32 *idx)
1789 {
1790 	struct sq_sge *dsge;
1791 	int indx, len = 0;
1792 
1793 	for (indx = 0; indx < nsge; indx++, (*idx)++) {
1794 		dsge = bnxt_qplib_get_prod_qe(hwq, *idx);
1795 		dsge->va_or_pa = cpu_to_le64(ssge[indx].addr);
1796 		dsge->l_key = cpu_to_le32(ssge[indx].lkey);
1797 		dsge->size = cpu_to_le32(ssge[indx].size);
1798 		len += ssge[indx].size;
1799 	}
1800 
1801 	return len;
1802 }
1803 
bnxt_qplib_required_slots(struct bnxt_qplib_qp * qp,struct bnxt_qplib_swqe * wqe,u16 * wqe_sz,u16 * qdf,u8 mode)1804 static u16 bnxt_qplib_required_slots(struct bnxt_qplib_qp *qp,
1805 				     struct bnxt_qplib_swqe *wqe,
1806 				     u16 *wqe_sz, u16 *qdf, u8 mode)
1807 {
1808 	u32 ilsize, bytes;
1809 	u16 nsge;
1810 	u16 slot;
1811 
1812 	nsge = wqe->num_sge;
1813 	/* Adding sq_send_hdr is a misnomer, for rq also hdr size is same. */
1814 	bytes = sizeof(struct sq_send_hdr) + nsge * sizeof(struct sq_sge);
1815 	if (wqe->flags & BNXT_QPLIB_SWQE_FLAGS_INLINE) {
1816 		ilsize = bnxt_qplib_calc_ilsize(wqe, qp->max_inline_data);
1817 		bytes = ALIGN(ilsize, sizeof(struct sq_sge));
1818 		bytes += sizeof(struct sq_send_hdr);
1819 	}
1820 
1821 	*qdf =  __xlate_qfd(qp->sq.q_full_delta, bytes);
1822 	slot = bytes >> 4;
1823 	*wqe_sz = slot;
1824 	if (mode == BNXT_QPLIB_WQE_MODE_STATIC)
1825 		slot = 8;
1826 	return slot;
1827 }
1828 
bnxt_qplib_pull_psn_buff(struct bnxt_qplib_qp * qp,struct bnxt_qplib_q * sq,struct bnxt_qplib_swq * swq,bool hw_retx)1829 static void bnxt_qplib_pull_psn_buff(struct bnxt_qplib_qp *qp, struct bnxt_qplib_q *sq,
1830 				     struct bnxt_qplib_swq *swq, bool hw_retx)
1831 {
1832 	struct bnxt_qplib_hwq *hwq;
1833 	u32 pg_num, pg_indx;
1834 	void *buff;
1835 	u32 tail;
1836 
1837 	hwq = &sq->hwq;
1838 	if (!hwq->pad_pg)
1839 		return;
1840 	tail = swq->slot_idx / sq->dbinfo.max_slot;
1841 	if (hw_retx) {
1842 		/* For HW retx use qp msn index */
1843 		tail = qp->msn;
1844 		tail %= qp->msn_tbl_sz;
1845 	}
1846 	pg_num = (tail + hwq->pad_pgofft) / (PAGE_SIZE / hwq->pad_stride);
1847 	pg_indx = (tail + hwq->pad_pgofft) % (PAGE_SIZE / hwq->pad_stride);
1848 	buff = (void *)(hwq->pad_pg[pg_num] + pg_indx * hwq->pad_stride);
1849 	swq->psn_ext = buff;
1850 	swq->psn_search = buff;
1851 }
1852 
bnxt_qplib_post_send_db(struct bnxt_qplib_qp * qp)1853 void bnxt_qplib_post_send_db(struct bnxt_qplib_qp *qp)
1854 {
1855 	struct bnxt_qplib_q *sq = &qp->sq;
1856 
1857 	bnxt_qplib_ring_prod_db(&sq->dbinfo, DBC_DBC_TYPE_SQ);
1858 }
1859 
bnxt_qplib_post_send(struct bnxt_qplib_qp * qp,struct bnxt_qplib_swqe * wqe)1860 int bnxt_qplib_post_send(struct bnxt_qplib_qp *qp,
1861 			 struct bnxt_qplib_swqe *wqe)
1862 {
1863 	struct bnxt_qplib_nq_work *nq_work = NULL;
1864 	int i, rc = 0, data_len = 0, pkt_num = 0;
1865 	struct bnxt_qplib_q *sq = &qp->sq;
1866 	struct bnxt_qplib_hwq *hwq;
1867 	struct bnxt_qplib_swq *swq;
1868 	bool sch_handler = false;
1869 	u32 wqe_idx, slots, idx;
1870 	u16 wqe_sz, qdf = 0;
1871 	bool msn_update;
1872 	void *base_hdr;
1873 	void *ext_hdr;
1874 	__le32 temp32;
1875 
1876 	hwq = &sq->hwq;
1877 	if (qp->state != CMDQ_MODIFY_QP_NEW_STATE_RTS &&
1878 	    qp->state != CMDQ_MODIFY_QP_NEW_STATE_ERR) {
1879 		dev_err(&hwq->pdev->dev,
1880 			"QPLIB: FP: QP (0x%x) is in the 0x%x state",
1881 			qp->id, qp->state);
1882 		rc = -EINVAL;
1883 		goto done;
1884 	}
1885 
1886 	slots = bnxt_qplib_required_slots(qp, wqe, &wqe_sz, &qdf, qp->wqe_mode);
1887 	if (bnxt_qplib_queue_full(sq, slots + qdf)) {
1888 		dev_err(&hwq->pdev->dev,
1889 			"prod = %#x cons = %#x qdepth = %#x delta = %#x\n",
1890 			hwq->prod, hwq->cons, hwq->depth, sq->q_full_delta);
1891 		rc = -ENOMEM;
1892 		goto done;
1893 	}
1894 
1895 	swq = bnxt_qplib_get_swqe(sq, &wqe_idx);
1896 	bnxt_qplib_pull_psn_buff(qp, sq, swq, qp->is_host_msn_tbl);
1897 
1898 	idx = 0;
1899 	swq->slot_idx = hwq->prod;
1900 	swq->slots = slots;
1901 	swq->wr_id = wqe->wr_id;
1902 	swq->type = wqe->type;
1903 	swq->flags = wqe->flags;
1904 	swq->start_psn = sq->psn & BTH_PSN_MASK;
1905 	if (qp->sig_type)
1906 		swq->flags |= SQ_SEND_FLAGS_SIGNAL_COMP;
1907 
1908 	if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_ERR) {
1909 		sch_handler = true;
1910 		dev_dbg(&hwq->pdev->dev,
1911 			"%s Error QP. Scheduling for poll_cq\n", __func__);
1912 		goto queue_err;
1913 	}
1914 
1915 	base_hdr = bnxt_qplib_get_prod_qe(hwq, idx++);
1916 	ext_hdr = bnxt_qplib_get_prod_qe(hwq, idx++);
1917 	memset(base_hdr, 0, sizeof(struct sq_sge));
1918 	memset(ext_hdr, 0, sizeof(struct sq_sge));
1919 
1920 	if (wqe->flags & BNXT_QPLIB_SWQE_FLAGS_INLINE)
1921 		/* Copy the inline data */
1922 		data_len = bnxt_qplib_put_inline(qp, wqe, &idx);
1923 	else
1924 		data_len = bnxt_qplib_put_sges(hwq, wqe->sg_list, wqe->num_sge,
1925 					       &idx);
1926 	if (data_len > BNXT_RE_MAX_MSG_SIZE) {
1927 		rc = -EINVAL;
1928 		goto done;
1929 	}
1930 	/* Make sure we update MSN table only for wired wqes */
1931 	msn_update = true;
1932 	/* Specifics */
1933 	switch (wqe->type) {
1934 	case BNXT_QPLIB_SWQE_TYPE_SEND:
1935 		if (qp->type == CMDQ_CREATE_QP1_TYPE_GSI) {
1936 			struct sq_send_raweth_qp1_hdr *sqe = base_hdr;
1937 			struct sq_raw_ext_hdr *ext_sqe = ext_hdr;
1938 			/* Assemble info for Raw Ethertype QPs */
1939 
1940 			sqe->wqe_type = wqe->type;
1941 			sqe->flags = wqe->flags;
1942 			sqe->wqe_size = wqe_sz;
1943 			sqe->cfa_action = cpu_to_le16(wqe->rawqp1.cfa_action);
1944 			sqe->lflags = cpu_to_le16(wqe->rawqp1.lflags);
1945 			sqe->length = cpu_to_le32(data_len);
1946 			ext_sqe->cfa_meta = cpu_to_le32((wqe->rawqp1.cfa_meta &
1947 				SQ_SEND_RAWETH_QP1_CFA_META_VLAN_VID_MASK) <<
1948 				SQ_SEND_RAWETH_QP1_CFA_META_VLAN_VID_SFT);
1949 
1950 			break;
1951 		}
1952 		fallthrough;
1953 	case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_IMM:
1954 	case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_INV:
1955 	{
1956 		struct sq_ud_ext_hdr *ext_sqe = ext_hdr;
1957 		struct sq_send_hdr *sqe = base_hdr;
1958 
1959 		sqe->wqe_type = wqe->type;
1960 		sqe->flags = wqe->flags;
1961 		sqe->wqe_size = wqe_sz;
1962 		sqe->inv_key_or_imm_data = cpu_to_le32(wqe->send.inv_key);
1963 		if (qp->type == CMDQ_CREATE_QP_TYPE_UD ||
1964 		    qp->type == CMDQ_CREATE_QP_TYPE_GSI) {
1965 			sqe->q_key = cpu_to_le32(wqe->send.q_key);
1966 			sqe->length = cpu_to_le32(data_len);
1967 			sq->psn = (sq->psn + 1) & BTH_PSN_MASK;
1968 			ext_sqe->dst_qp = cpu_to_le32(wqe->send.dst_qp &
1969 						      SQ_SEND_DST_QP_MASK);
1970 			ext_sqe->avid = cpu_to_le32(wqe->send.avid &
1971 						    SQ_SEND_AVID_MASK);
1972 			msn_update = false;
1973 		} else {
1974 			sqe->length = cpu_to_le32(data_len);
1975 			if (qp->mtu)
1976 				pkt_num = (data_len + qp->mtu - 1) / qp->mtu;
1977 			if (!pkt_num)
1978 				pkt_num = 1;
1979 			sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK;
1980 		}
1981 		break;
1982 	}
1983 	case BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE:
1984 	case BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE_WITH_IMM:
1985 	case BNXT_QPLIB_SWQE_TYPE_RDMA_READ:
1986 	{
1987 		struct sq_rdma_ext_hdr *ext_sqe = ext_hdr;
1988 		struct sq_rdma_hdr *sqe = base_hdr;
1989 
1990 		sqe->wqe_type = wqe->type;
1991 		sqe->flags = wqe->flags;
1992 		sqe->wqe_size = wqe_sz;
1993 		sqe->imm_data = cpu_to_le32(wqe->rdma.inv_key);
1994 		sqe->length = cpu_to_le32((u32)data_len);
1995 		ext_sqe->remote_va = cpu_to_le64(wqe->rdma.remote_va);
1996 		ext_sqe->remote_key = cpu_to_le32(wqe->rdma.r_key);
1997 		if (qp->mtu)
1998 			pkt_num = (data_len + qp->mtu - 1) / qp->mtu;
1999 		if (!pkt_num)
2000 			pkt_num = 1;
2001 		sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK;
2002 		break;
2003 	}
2004 	case BNXT_QPLIB_SWQE_TYPE_ATOMIC_CMP_AND_SWP:
2005 	case BNXT_QPLIB_SWQE_TYPE_ATOMIC_FETCH_AND_ADD:
2006 	{
2007 		struct sq_atomic_ext_hdr *ext_sqe = ext_hdr;
2008 		struct sq_atomic_hdr *sqe = base_hdr;
2009 
2010 		sqe->wqe_type = wqe->type;
2011 		sqe->flags = wqe->flags;
2012 		sqe->remote_key = cpu_to_le32(wqe->atomic.r_key);
2013 		sqe->remote_va = cpu_to_le64(wqe->atomic.remote_va);
2014 		ext_sqe->swap_data = cpu_to_le64(wqe->atomic.swap_data);
2015 		ext_sqe->cmp_data = cpu_to_le64(wqe->atomic.cmp_data);
2016 		if (qp->mtu)
2017 			pkt_num = (data_len + qp->mtu - 1) / qp->mtu;
2018 		if (!pkt_num)
2019 			pkt_num = 1;
2020 		sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK;
2021 		break;
2022 	}
2023 	case BNXT_QPLIB_SWQE_TYPE_LOCAL_INV:
2024 	{
2025 		struct sq_localinvalidate *sqe = base_hdr;
2026 
2027 		sqe->wqe_type = wqe->type;
2028 		sqe->flags = wqe->flags;
2029 		sqe->inv_l_key = cpu_to_le32(wqe->local_inv.inv_l_key);
2030 		msn_update = false;
2031 		break;
2032 	}
2033 	case BNXT_QPLIB_SWQE_TYPE_FAST_REG_MR:
2034 	{
2035 		struct sq_fr_pmr_ext_hdr *ext_sqe = ext_hdr;
2036 		struct sq_fr_pmr_hdr *sqe = base_hdr;
2037 
2038 		sqe->wqe_type = wqe->type;
2039 		sqe->flags = wqe->flags;
2040 		sqe->access_cntl = wqe->frmr.access_cntl |
2041 				   SQ_FR_PMR_ACCESS_CNTL_LOCAL_WRITE;
2042 		sqe->zero_based_page_size_log =
2043 			(wqe->frmr.pg_sz_log & SQ_FR_PMR_PAGE_SIZE_LOG_MASK) <<
2044 			SQ_FR_PMR_PAGE_SIZE_LOG_SFT |
2045 			(wqe->frmr.zero_based ? SQ_FR_PMR_ZERO_BASED : 0);
2046 		sqe->l_key = cpu_to_le32(wqe->frmr.l_key);
2047 		temp32 = cpu_to_le32(wqe->frmr.length);
2048 		memcpy(sqe->length, &temp32, sizeof(wqe->frmr.length));
2049 		sqe->numlevels_pbl_page_size_log =
2050 			((wqe->frmr.pbl_pg_sz_log <<
2051 					SQ_FR_PMR_PBL_PAGE_SIZE_LOG_SFT) &
2052 					SQ_FR_PMR_PBL_PAGE_SIZE_LOG_MASK) |
2053 			((wqe->frmr.levels << SQ_FR_PMR_NUMLEVELS_SFT) &
2054 					SQ_FR_PMR_NUMLEVELS_MASK);
2055 
2056 		for (i = 0; i < wqe->frmr.page_list_len; i++)
2057 			wqe->frmr.pbl_ptr[i] = cpu_to_le64(
2058 						wqe->frmr.page_list[i] |
2059 						PTU_PTE_VALID);
2060 		ext_sqe->pblptr = cpu_to_le64(wqe->frmr.pbl_dma_ptr);
2061 		ext_sqe->va = cpu_to_le64(wqe->frmr.va);
2062 		msn_update = false;
2063 
2064 		break;
2065 	}
2066 	case BNXT_QPLIB_SWQE_TYPE_BIND_MW:
2067 	{
2068 		struct sq_bind_ext_hdr *ext_sqe = ext_hdr;
2069 		struct sq_bind_hdr *sqe = base_hdr;
2070 
2071 		sqe->wqe_type = wqe->type;
2072 		sqe->flags = wqe->flags;
2073 		sqe->access_cntl = wqe->bind.access_cntl;
2074 		sqe->mw_type_zero_based = wqe->bind.mw_type |
2075 			(wqe->bind.zero_based ? SQ_BIND_ZERO_BASED : 0);
2076 		sqe->parent_l_key = cpu_to_le32(wqe->bind.parent_l_key);
2077 		sqe->l_key = cpu_to_le32(wqe->bind.r_key);
2078 		ext_sqe->va = cpu_to_le64(wqe->bind.va);
2079 		ext_sqe->length_lo = cpu_to_le32(wqe->bind.length);
2080 		msn_update = false;
2081 		break;
2082 	}
2083 	default:
2084 		/* Bad wqe, return error */
2085 		rc = -EINVAL;
2086 		goto done;
2087 	}
2088 	if (!qp->is_host_msn_tbl || msn_update) {
2089 		swq->next_psn = sq->psn & BTH_PSN_MASK;
2090 		bnxt_qplib_fill_psn_search(qp, wqe, swq);
2091 	}
2092 queue_err:
2093 	bnxt_qplib_swq_mod_start(sq, wqe_idx);
2094 	bnxt_qplib_hwq_incr_prod(&sq->dbinfo, hwq, swq->slots);
2095 	qp->wqe_cnt++;
2096 done:
2097 	if (sch_handler) {
2098 		nq_work = kzalloc_obj(*nq_work, GFP_ATOMIC);
2099 		if (nq_work) {
2100 			nq_work->cq = qp->scq;
2101 			nq_work->nq = qp->scq->nq;
2102 			INIT_WORK(&nq_work->work, bnxt_qpn_cqn_sched_task);
2103 			queue_work(qp->scq->nq->cqn_wq, &nq_work->work);
2104 		} else {
2105 			dev_err(&hwq->pdev->dev,
2106 				"FP: Failed to allocate SQ nq_work!\n");
2107 			rc = -ENOMEM;
2108 		}
2109 	}
2110 	return rc;
2111 }
2112 
bnxt_qplib_post_recv_db(struct bnxt_qplib_qp * qp)2113 void bnxt_qplib_post_recv_db(struct bnxt_qplib_qp *qp)
2114 {
2115 	struct bnxt_qplib_q *rq = &qp->rq;
2116 
2117 	bnxt_qplib_ring_prod_db(&rq->dbinfo, DBC_DBC_TYPE_RQ);
2118 }
2119 
bnxt_qplib_post_recv(struct bnxt_qplib_qp * qp,struct bnxt_qplib_swqe * wqe)2120 int bnxt_qplib_post_recv(struct bnxt_qplib_qp *qp,
2121 			 struct bnxt_qplib_swqe *wqe)
2122 {
2123 	struct bnxt_qplib_nq_work *nq_work = NULL;
2124 	struct bnxt_qplib_q *rq = &qp->rq;
2125 	struct rq_wqe_hdr *base_hdr;
2126 	struct rq_ext_hdr *ext_hdr;
2127 	struct bnxt_qplib_hwq *hwq;
2128 	struct bnxt_qplib_swq *swq;
2129 	bool sch_handler = false;
2130 	u32 wqe_idx, idx;
2131 	u16 wqe_sz;
2132 	int rc = 0;
2133 
2134 	hwq = &rq->hwq;
2135 	if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_RESET) {
2136 		dev_err(&hwq->pdev->dev,
2137 			"QPLIB: FP: QP (0x%x) is in the 0x%x state",
2138 			qp->id, qp->state);
2139 		rc = -EINVAL;
2140 		goto done;
2141 	}
2142 
2143 	if (bnxt_qplib_queue_full(rq, rq->dbinfo.max_slot)) {
2144 		dev_err(&hwq->pdev->dev,
2145 			"FP: QP (0x%x) RQ is full!\n", qp->id);
2146 		rc = -EINVAL;
2147 		goto done;
2148 	}
2149 
2150 	swq = bnxt_qplib_get_swqe(rq, &wqe_idx);
2151 	swq->wr_id = wqe->wr_id;
2152 	swq->slots = rq->dbinfo.max_slot;
2153 
2154 	if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_ERR) {
2155 		sch_handler = true;
2156 		dev_dbg(&hwq->pdev->dev,
2157 			"%s: Error QP. Scheduling for poll_cq\n", __func__);
2158 		goto queue_err;
2159 	}
2160 
2161 	idx = 0;
2162 	base_hdr = bnxt_qplib_get_prod_qe(hwq, idx++);
2163 	ext_hdr = bnxt_qplib_get_prod_qe(hwq, idx++);
2164 	memset(base_hdr, 0, sizeof(struct sq_sge));
2165 	memset(ext_hdr, 0, sizeof(struct sq_sge));
2166 	wqe_sz = (sizeof(struct rq_wqe_hdr) +
2167 	wqe->num_sge * sizeof(struct sq_sge)) >> 4;
2168 	bnxt_qplib_put_sges(hwq, wqe->sg_list, wqe->num_sge, &idx);
2169 	if (!wqe->num_sge) {
2170 		struct sq_sge *sge;
2171 
2172 		sge = bnxt_qplib_get_prod_qe(hwq, idx++);
2173 		sge->size = 0;
2174 		wqe_sz++;
2175 	}
2176 	base_hdr->wqe_type = wqe->type;
2177 	base_hdr->flags = wqe->flags;
2178 	base_hdr->wqe_size = wqe_sz;
2179 	base_hdr->wr_id[0] = cpu_to_le32(wqe_idx);
2180 queue_err:
2181 	bnxt_qplib_swq_mod_start(rq, wqe_idx);
2182 	bnxt_qplib_hwq_incr_prod(&rq->dbinfo, hwq, swq->slots);
2183 done:
2184 	if (sch_handler) {
2185 		nq_work = kzalloc_obj(*nq_work, GFP_ATOMIC);
2186 		if (nq_work) {
2187 			nq_work->cq = qp->rcq;
2188 			nq_work->nq = qp->rcq->nq;
2189 			INIT_WORK(&nq_work->work, bnxt_qpn_cqn_sched_task);
2190 			queue_work(qp->rcq->nq->cqn_wq, &nq_work->work);
2191 		} else {
2192 			dev_err(&hwq->pdev->dev,
2193 				"FP: Failed to allocate RQ nq_work!\n");
2194 			rc = -ENOMEM;
2195 		}
2196 	}
2197 
2198 	return rc;
2199 }
2200 
2201 /* CQ */
bnxt_qplib_create_cq(struct bnxt_qplib_res * res,struct bnxt_qplib_cq * cq)2202 int bnxt_qplib_create_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq)
2203 {
2204 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
2205 	struct bnxt_qplib_hwq_attr hwq_attr = {};
2206 	struct creq_create_cq_resp resp = {};
2207 	struct bnxt_qplib_cmdqmsg msg = {};
2208 	struct cmdq_create_cq req = {};
2209 	struct bnxt_qplib_pbl *pbl;
2210 	u32 coalescing = 0;
2211 	u32 pg_sz_lvl;
2212 	int rc;
2213 
2214 	if (!cq->dpi) {
2215 		dev_err(&rcfw->pdev->dev,
2216 			"FP: CREATE_CQ failed due to NULL DPI\n");
2217 		return -EINVAL;
2218 	}
2219 
2220 	cq->dbinfo.flags = 0;
2221 	hwq_attr.res = res;
2222 	hwq_attr.depth = cq->max_wqe;
2223 	hwq_attr.stride = sizeof(struct cq_base);
2224 	hwq_attr.type = HWQ_TYPE_QUEUE;
2225 	hwq_attr.sginfo = &cq->sg_info;
2226 	rc = bnxt_qplib_alloc_init_hwq(&cq->hwq, &hwq_attr);
2227 	if (rc)
2228 		return rc;
2229 
2230 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
2231 				 CMDQ_BASE_OPCODE_CREATE_CQ,
2232 				 sizeof(req));
2233 
2234 	req.dpi = cpu_to_le32(cq->dpi->dpi);
2235 	req.cq_handle = cpu_to_le64(cq->cq_handle);
2236 	req.cq_size = cpu_to_le32(cq->max_wqe);
2237 
2238 	if (_is_cq_coalescing_supported(res->dattr->dev_cap_flags2) &&
2239 	    cq->coalescing->enable) {
2240 		req.flags |= cpu_to_le16(CMDQ_CREATE_CQ_FLAGS_COALESCING_VALID);
2241 		coalescing |= ((cq->coalescing->buf_maxtime <<
2242 				CMDQ_CREATE_CQ_BUF_MAXTIME_SFT) &
2243 			       CMDQ_CREATE_CQ_BUF_MAXTIME_MASK);
2244 		coalescing |= ((cq->coalescing->normal_maxbuf <<
2245 				CMDQ_CREATE_CQ_NORMAL_MAXBUF_SFT) &
2246 			       CMDQ_CREATE_CQ_NORMAL_MAXBUF_MASK);
2247 		coalescing |= ((cq->coalescing->during_maxbuf <<
2248 				CMDQ_CREATE_CQ_DURING_MAXBUF_SFT) &
2249 			       CMDQ_CREATE_CQ_DURING_MAXBUF_MASK);
2250 		if (cq->coalescing->en_ring_idle_mode)
2251 			coalescing |= CMDQ_CREATE_CQ_ENABLE_RING_IDLE_MODE;
2252 		else
2253 			coalescing &= ~CMDQ_CREATE_CQ_ENABLE_RING_IDLE_MODE;
2254 		req.coalescing = cpu_to_le32(coalescing);
2255 	}
2256 
2257 	pbl = &cq->hwq.pbl[PBL_LVL_0];
2258 	pg_sz_lvl = (bnxt_qplib_base_pg_size(&cq->hwq) <<
2259 		     CMDQ_CREATE_CQ_PG_SIZE_SFT);
2260 	pg_sz_lvl |= (cq->hwq.level & CMDQ_CREATE_CQ_LVL_MASK);
2261 	req.pg_size_lvl = cpu_to_le32(pg_sz_lvl);
2262 	req.pbl = cpu_to_le64(pbl->pg_map_arr[0]);
2263 	req.cq_fco_cnq_id = cpu_to_le32(
2264 			(cq->cnq_hw_ring_id & CMDQ_CREATE_CQ_CNQ_ID_MASK) <<
2265 			 CMDQ_CREATE_CQ_CNQ_ID_SFT);
2266 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),
2267 				sizeof(resp), 0);
2268 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
2269 	if (rc)
2270 		goto fail;
2271 
2272 	cq->id = le32_to_cpu(resp.xid);
2273 	cq->period = BNXT_QPLIB_QUEUE_START_PERIOD;
2274 	init_waitqueue_head(&cq->waitq);
2275 	INIT_LIST_HEAD(&cq->sqf_head);
2276 	INIT_LIST_HEAD(&cq->rqf_head);
2277 	spin_lock_init(&cq->compl_lock);
2278 	spin_lock_init(&cq->flush_lock);
2279 
2280 	cq->dbinfo.hwq = &cq->hwq;
2281 	cq->dbinfo.xid = cq->id;
2282 	cq->dbinfo.db = cq->dpi->dbr;
2283 	cq->dbinfo.priv_db = res->dpi_tbl.priv_db;
2284 	cq->dbinfo.flags = 0;
2285 	cq->dbinfo.toggle = 0;
2286 
2287 	bnxt_qplib_armen_db(&cq->dbinfo, DBC_DBC_TYPE_CQ_ARMENA);
2288 
2289 	return 0;
2290 
2291 fail:
2292 	bnxt_qplib_free_hwq(res, &cq->hwq);
2293 	return rc;
2294 }
2295 
bnxt_qplib_resize_cq_complete(struct bnxt_qplib_res * res,struct bnxt_qplib_cq * cq)2296 void bnxt_qplib_resize_cq_complete(struct bnxt_qplib_res *res,
2297 				   struct bnxt_qplib_cq *cq)
2298 {
2299 	bnxt_qplib_free_hwq(res, &cq->hwq);
2300 	memcpy(&cq->hwq, &cq->resize_hwq, sizeof(cq->hwq));
2301        /* Reset only the cons bit in the flags */
2302 	cq->dbinfo.flags &= ~(1UL << BNXT_QPLIB_FLAG_EPOCH_CONS_SHIFT);
2303 }
2304 
bnxt_qplib_resize_cq(struct bnxt_qplib_res * res,struct bnxt_qplib_cq * cq,int new_cqes)2305 int bnxt_qplib_resize_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq,
2306 			 int new_cqes)
2307 {
2308 	struct bnxt_qplib_hwq_attr hwq_attr = {};
2309 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
2310 	struct creq_resize_cq_resp resp = {};
2311 	struct bnxt_qplib_cmdqmsg msg = {};
2312 	struct cmdq_resize_cq req = {};
2313 	struct bnxt_qplib_pbl *pbl;
2314 	u32 pg_sz, lvl, new_sz;
2315 	int rc;
2316 
2317 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
2318 				 CMDQ_BASE_OPCODE_RESIZE_CQ,
2319 				 sizeof(req));
2320 	hwq_attr.sginfo = &cq->sg_info;
2321 	hwq_attr.res = res;
2322 	hwq_attr.depth = new_cqes;
2323 	hwq_attr.stride = sizeof(struct cq_base);
2324 	hwq_attr.type = HWQ_TYPE_QUEUE;
2325 	rc = bnxt_qplib_alloc_init_hwq(&cq->resize_hwq, &hwq_attr);
2326 	if (rc)
2327 		return rc;
2328 
2329 	req.cq_cid = cpu_to_le32(cq->id);
2330 	pbl = &cq->resize_hwq.pbl[PBL_LVL_0];
2331 	pg_sz = bnxt_qplib_base_pg_size(&cq->resize_hwq);
2332 	lvl = (cq->resize_hwq.level << CMDQ_RESIZE_CQ_LVL_SFT) &
2333 				       CMDQ_RESIZE_CQ_LVL_MASK;
2334 	new_sz = (new_cqes << CMDQ_RESIZE_CQ_NEW_CQ_SIZE_SFT) &
2335 		  CMDQ_RESIZE_CQ_NEW_CQ_SIZE_MASK;
2336 	req.new_cq_size_pg_size_lvl = cpu_to_le32(new_sz | pg_sz | lvl);
2337 	req.new_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
2338 
2339 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),
2340 				sizeof(resp), 0);
2341 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
2342 	return rc;
2343 }
2344 
bnxt_qplib_destroy_cq(struct bnxt_qplib_res * res,struct bnxt_qplib_cq * cq)2345 int bnxt_qplib_destroy_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq)
2346 {
2347 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
2348 	struct creq_destroy_cq_resp resp = {};
2349 	struct bnxt_qplib_cmdqmsg msg = {};
2350 	struct cmdq_destroy_cq req = {};
2351 	u16 total_cnq_events;
2352 	int rc;
2353 
2354 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
2355 				 CMDQ_BASE_OPCODE_DESTROY_CQ,
2356 				 sizeof(req));
2357 
2358 	req.cq_cid = cpu_to_le32(cq->id);
2359 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),
2360 				sizeof(resp), 0);
2361 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
2362 	if (rc)
2363 		return rc;
2364 	total_cnq_events = le16_to_cpu(resp.total_cnq_events);
2365 	__wait_for_all_nqes(cq, total_cnq_events);
2366 	bnxt_qplib_free_hwq(res, &cq->hwq);
2367 	return 0;
2368 }
2369 
__flush_sq(struct bnxt_qplib_q * sq,struct bnxt_qplib_qp * qp,struct bnxt_qplib_cqe ** pcqe,int * budget)2370 static int __flush_sq(struct bnxt_qplib_q *sq, struct bnxt_qplib_qp *qp,
2371 		      struct bnxt_qplib_cqe **pcqe, int *budget)
2372 {
2373 	struct bnxt_qplib_cqe *cqe;
2374 	u32 start, last;
2375 	int rc = 0;
2376 
2377 	/* Now complete all outstanding SQEs with FLUSHED_ERR */
2378 	start = sq->swq_start;
2379 	cqe = *pcqe;
2380 	while (*budget) {
2381 		last = sq->swq_last;
2382 		if (start == last)
2383 			break;
2384 		/* Skip the FENCE WQE completions */
2385 		if (sq->swq[last].wr_id == BNXT_QPLIB_FENCE_WRID) {
2386 			bnxt_qplib_cancel_phantom_processing(qp);
2387 			goto skip_compl;
2388 		}
2389 		memset(cqe, 0, sizeof(*cqe));
2390 		cqe->status = CQ_REQ_STATUS_WORK_REQUEST_FLUSHED_ERR;
2391 		cqe->opcode = CQ_BASE_CQE_TYPE_REQ;
2392 		cqe->qp_handle = (u64)(unsigned long)qp;
2393 		cqe->wr_id = sq->swq[last].wr_id;
2394 		cqe->src_qp = qp->id;
2395 		cqe->type = sq->swq[last].type;
2396 		cqe++;
2397 		(*budget)--;
2398 skip_compl:
2399 		bnxt_qplib_hwq_incr_cons(sq->hwq.max_elements, &sq->hwq.cons,
2400 					 sq->swq[last].slots, &sq->dbinfo.flags);
2401 		sq->swq_last = sq->swq[last].next_idx;
2402 	}
2403 	*pcqe = cqe;
2404 	if (!(*budget) && sq->swq_last != start)
2405 		/* Out of budget */
2406 		rc = -EAGAIN;
2407 
2408 	return rc;
2409 }
2410 
__flush_rq(struct bnxt_qplib_q * rq,struct bnxt_qplib_qp * qp,struct bnxt_qplib_cqe ** pcqe,int * budget)2411 static int __flush_rq(struct bnxt_qplib_q *rq, struct bnxt_qplib_qp *qp,
2412 		      struct bnxt_qplib_cqe **pcqe, int *budget)
2413 {
2414 	struct bnxt_qplib_cqe *cqe;
2415 	u32 start, last;
2416 	int opcode = 0;
2417 	int rc = 0;
2418 
2419 	switch (qp->type) {
2420 	case CMDQ_CREATE_QP1_TYPE_GSI:
2421 		opcode = CQ_BASE_CQE_TYPE_RES_RAWETH_QP1;
2422 		break;
2423 	case CMDQ_CREATE_QP_TYPE_RC:
2424 		opcode = CQ_BASE_CQE_TYPE_RES_RC;
2425 		break;
2426 	case CMDQ_CREATE_QP_TYPE_UD:
2427 	case CMDQ_CREATE_QP_TYPE_GSI:
2428 		opcode = CQ_BASE_CQE_TYPE_RES_UD;
2429 		break;
2430 	}
2431 
2432 	/* Flush the rest of the RQ */
2433 	start = rq->swq_start;
2434 	cqe = *pcqe;
2435 	while (*budget) {
2436 		last = rq->swq_last;
2437 		if (last == start)
2438 			break;
2439 		memset(cqe, 0, sizeof(*cqe));
2440 		cqe->status =
2441 		    CQ_RES_RC_STATUS_WORK_REQUEST_FLUSHED_ERR;
2442 		cqe->opcode = opcode;
2443 		cqe->qp_handle = (unsigned long)qp;
2444 		cqe->wr_id = rq->swq[last].wr_id;
2445 		cqe++;
2446 		(*budget)--;
2447 		bnxt_qplib_hwq_incr_cons(rq->hwq.max_elements, &rq->hwq.cons,
2448 					 rq->swq[last].slots, &rq->dbinfo.flags);
2449 		rq->swq_last = rq->swq[last].next_idx;
2450 	}
2451 	*pcqe = cqe;
2452 	if (!*budget && rq->swq_last != start)
2453 		/* Out of budget */
2454 		rc = -EAGAIN;
2455 
2456 	return rc;
2457 }
2458 
bnxt_qplib_mark_qp_error(void * qp_handle)2459 void bnxt_qplib_mark_qp_error(void *qp_handle)
2460 {
2461 	struct bnxt_qplib_qp *qp = qp_handle;
2462 
2463 	if (!qp)
2464 		return;
2465 
2466 	/* Must block new posting of SQ and RQ */
2467 	qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
2468 	bnxt_qplib_cancel_phantom_processing(qp);
2469 }
2470 
2471 /* Note: SQE is valid from sw_sq_cons up to cqe_sq_cons (exclusive)
2472  *       CQE is track from sw_cq_cons to max_element but valid only if VALID=1
2473  */
do_wa9060(struct bnxt_qplib_qp * qp,struct bnxt_qplib_cq * cq,u32 cq_cons,u32 swq_last,u32 cqe_sq_cons)2474 static int do_wa9060(struct bnxt_qplib_qp *qp, struct bnxt_qplib_cq *cq,
2475 		     u32 cq_cons, u32 swq_last, u32 cqe_sq_cons)
2476 {
2477 	u32 peek_sw_cq_cons, peek_sq_cons_idx, peek_flags;
2478 	struct bnxt_qplib_q *sq = &qp->sq;
2479 	struct cq_req *peek_req_hwcqe;
2480 	struct bnxt_qplib_qp *peek_qp;
2481 	struct bnxt_qplib_q *peek_sq;
2482 	struct bnxt_qplib_swq *swq;
2483 	struct cq_base *peek_hwcqe;
2484 	int i, rc = 0;
2485 
2486 	/* Normal mode */
2487 	/* Check for the psn_search marking before completing */
2488 	swq = &sq->swq[swq_last];
2489 	if (swq->psn_search &&
2490 	    le32_to_cpu(swq->psn_search->flags_next_psn) & 0x80000000) {
2491 		/* Unmark */
2492 		swq->psn_search->flags_next_psn = cpu_to_le32
2493 			(le32_to_cpu(swq->psn_search->flags_next_psn)
2494 				     & ~0x80000000);
2495 		dev_dbg(&cq->hwq.pdev->dev,
2496 			"FP: Process Req cq_cons=0x%x qp=0x%x sq cons sw=0x%x cqe=0x%x marked!\n",
2497 			cq_cons, qp->id, swq_last, cqe_sq_cons);
2498 		sq->condition = true;
2499 		sq->send_phantom = true;
2500 
2501 		/* TODO: Only ARM if the previous SQE is ARMALL */
2502 		bnxt_qplib_ring_db(&cq->dbinfo, DBC_DBC_TYPE_CQ_ARMALL);
2503 		rc = -EAGAIN;
2504 		goto out;
2505 	}
2506 	if (sq->condition) {
2507 		/* Peek at the completions */
2508 		peek_flags = cq->dbinfo.flags;
2509 		peek_sw_cq_cons = cq_cons;
2510 		i = cq->hwq.max_elements;
2511 		while (i--) {
2512 			peek_hwcqe = bnxt_qplib_get_qe(&cq->hwq,
2513 						       peek_sw_cq_cons, NULL);
2514 			/* If the next hwcqe is VALID */
2515 			if (CQE_CMP_VALID(peek_hwcqe, peek_flags)) {
2516 			/*
2517 			 * The valid test of the entry must be done first before
2518 			 * reading any further.
2519 			 */
2520 				dma_rmb();
2521 				/* If the next hwcqe is a REQ */
2522 				if ((peek_hwcqe->cqe_type_toggle &
2523 				    CQ_BASE_CQE_TYPE_MASK) ==
2524 				    CQ_BASE_CQE_TYPE_REQ) {
2525 					peek_req_hwcqe = (struct cq_req *)
2526 							 peek_hwcqe;
2527 					peek_qp = (struct bnxt_qplib_qp *)
2528 						((unsigned long)
2529 						 le64_to_cpu
2530 						 (peek_req_hwcqe->qp_handle));
2531 					peek_sq = &peek_qp->sq;
2532 					peek_sq_cons_idx =
2533 						((le16_to_cpu(
2534 						  peek_req_hwcqe->sq_cons_idx)
2535 						  - 1) % sq->max_wqe);
2536 					/* If the hwcqe's sq's wr_id matches */
2537 					if (peek_sq == sq &&
2538 					    sq->swq[peek_sq_cons_idx].wr_id ==
2539 					    BNXT_QPLIB_FENCE_WRID) {
2540 						/*
2541 						 *  Unbreak only if the phantom
2542 						 *  comes back
2543 						 */
2544 						dev_dbg(&cq->hwq.pdev->dev,
2545 							"FP: Got Phantom CQE\n");
2546 						sq->condition = false;
2547 						sq->single = true;
2548 						rc = 0;
2549 						goto out;
2550 					}
2551 				}
2552 				/* Valid but not the phantom, so keep looping */
2553 			} else {
2554 				/* Not valid yet, just exit and wait */
2555 				rc = -EINVAL;
2556 				goto out;
2557 			}
2558 			bnxt_qplib_hwq_incr_cons(cq->hwq.max_elements,
2559 						 &peek_sw_cq_cons,
2560 						 1, &peek_flags);
2561 		}
2562 		dev_err(&cq->hwq.pdev->dev,
2563 			"Should not have come here! cq_cons=0x%x qp=0x%x sq cons sw=0x%x hw=0x%x\n",
2564 			cq_cons, qp->id, swq_last, cqe_sq_cons);
2565 		rc = -EINVAL;
2566 	}
2567 out:
2568 	return rc;
2569 }
2570 
bnxt_qplib_get_cqe_sq_cons(struct bnxt_qplib_q * sq,u32 cqe_slot)2571 static int bnxt_qplib_get_cqe_sq_cons(struct bnxt_qplib_q *sq, u32 cqe_slot)
2572 {
2573 	struct bnxt_qplib_hwq *sq_hwq;
2574 	struct bnxt_qplib_swq *swq;
2575 	int cqe_sq_cons = -1;
2576 	u32 start, last;
2577 
2578 	sq_hwq = &sq->hwq;
2579 
2580 	start = sq->swq_start;
2581 	last = sq->swq_last;
2582 
2583 	while (last != start) {
2584 		swq = &sq->swq[last];
2585 		if (swq->slot_idx  == cqe_slot) {
2586 			cqe_sq_cons = swq->next_idx;
2587 			dev_err(&sq_hwq->pdev->dev, "%s: Found cons wqe = %d slot = %d\n",
2588 				__func__, cqe_sq_cons, cqe_slot);
2589 			break;
2590 		}
2591 
2592 		last = swq->next_idx;
2593 	}
2594 	return cqe_sq_cons;
2595 }
2596 
bnxt_qplib_cq_process_req(struct bnxt_qplib_cq * cq,struct cq_req * hwcqe,struct bnxt_qplib_cqe ** pcqe,int * budget,u32 cq_cons,struct bnxt_qplib_qp ** lib_qp)2597 static int bnxt_qplib_cq_process_req(struct bnxt_qplib_cq *cq,
2598 				     struct cq_req *hwcqe,
2599 				     struct bnxt_qplib_cqe **pcqe, int *budget,
2600 				     u32 cq_cons, struct bnxt_qplib_qp **lib_qp)
2601 {
2602 	struct bnxt_qplib_swq *swq;
2603 	struct bnxt_qplib_cqe *cqe;
2604 	u32 cqe_sq_cons, slot_num;
2605 	struct bnxt_qplib_qp *qp;
2606 	struct bnxt_qplib_q *sq;
2607 	int cqe_cons;
2608 	int rc = 0;
2609 
2610 	qp = (struct bnxt_qplib_qp *)((unsigned long)
2611 				      le64_to_cpu(hwcqe->qp_handle));
2612 	if (!qp) {
2613 		dev_err(&cq->hwq.pdev->dev,
2614 			"FP: Process Req qp is NULL\n");
2615 		return -EINVAL;
2616 	}
2617 	sq = &qp->sq;
2618 
2619 	cqe_sq_cons = le16_to_cpu(hwcqe->sq_cons_idx) % sq->max_sw_wqe;
2620 	if (qp->sq.flushed) {
2621 		dev_dbg(&cq->hwq.pdev->dev,
2622 			"%s: QP in Flush QP = %p\n", __func__, qp);
2623 		goto done;
2624 	}
2625 
2626 	if (__is_err_cqe_for_var_wqe(qp, hwcqe->status)) {
2627 		slot_num = le16_to_cpu(hwcqe->sq_cons_idx);
2628 		cqe_cons = bnxt_qplib_get_cqe_sq_cons(sq, slot_num);
2629 		if (cqe_cons < 0) {
2630 			dev_err(&cq->hwq.pdev->dev, "%s: Wrong SQ cons cqe_slot_indx = %d\n",
2631 				__func__, slot_num);
2632 			goto done;
2633 		}
2634 		cqe_sq_cons = cqe_cons;
2635 		dev_err(&cq->hwq.pdev->dev, "%s: cqe_sq_cons = %d swq_last = %d swq_start = %d\n",
2636 			__func__, cqe_sq_cons, sq->swq_last, sq->swq_start);
2637 	}
2638 
2639 	/* Require to walk the sq's swq to fabricate CQEs for all previously
2640 	 * signaled SWQEs due to CQE aggregation from the current sq cons
2641 	 * to the cqe_sq_cons
2642 	 */
2643 	cqe = *pcqe;
2644 	while (*budget) {
2645 		if (sq->swq_last == cqe_sq_cons)
2646 			/* Done */
2647 			break;
2648 
2649 		swq = &sq->swq[sq->swq_last];
2650 		memset(cqe, 0, sizeof(*cqe));
2651 		cqe->opcode = CQ_BASE_CQE_TYPE_REQ;
2652 		cqe->qp_handle = (u64)(unsigned long)qp;
2653 		cqe->src_qp = qp->id;
2654 		cqe->wr_id = swq->wr_id;
2655 		if (cqe->wr_id == BNXT_QPLIB_FENCE_WRID)
2656 			goto skip;
2657 		cqe->type = swq->type;
2658 
2659 		/* For the last CQE, check for status.  For errors, regardless
2660 		 * of the request being signaled or not, it must complete with
2661 		 * the hwcqe error status
2662 		 */
2663 		if (swq->next_idx == cqe_sq_cons &&
2664 		    hwcqe->status != CQ_REQ_STATUS_OK) {
2665 			cqe->status = hwcqe->status;
2666 			dev_err(&cq->hwq.pdev->dev,
2667 				"FP: CQ Processed Req wr_id[%d] = 0x%llx with status 0x%x\n",
2668 				sq->swq_last, cqe->wr_id, cqe->status);
2669 			cqe++;
2670 			(*budget)--;
2671 			bnxt_qplib_mark_qp_error(qp);
2672 			/* Add qp to flush list of the CQ */
2673 			bnxt_qplib_add_flush_qp(qp);
2674 		} else {
2675 			/* Before we complete, do WA 9060 */
2676 			if (!bnxt_qplib_is_chip_gen_p5_p7(qp->cctx)) {
2677 				if (do_wa9060(qp, cq, cq_cons, sq->swq_last,
2678 					      cqe_sq_cons)) {
2679 					*lib_qp = qp;
2680 					goto out;
2681 				}
2682 			}
2683 			if (swq->flags & SQ_SEND_FLAGS_SIGNAL_COMP) {
2684 				cqe->status = CQ_REQ_STATUS_OK;
2685 				cqe++;
2686 				(*budget)--;
2687 			}
2688 		}
2689 skip:
2690 		bnxt_qplib_hwq_incr_cons(sq->hwq.max_elements, &sq->hwq.cons,
2691 					 swq->slots, &sq->dbinfo.flags);
2692 		sq->swq_last = swq->next_idx;
2693 		if (sq->single)
2694 			break;
2695 	}
2696 out:
2697 	*pcqe = cqe;
2698 	if (sq->swq_last != cqe_sq_cons) {
2699 		/* Out of budget */
2700 		rc = -EAGAIN;
2701 		goto done;
2702 	}
2703 	/*
2704 	 * Back to normal completion mode only after it has completed all of
2705 	 * the WC for this CQE
2706 	 */
2707 	sq->single = false;
2708 done:
2709 	return rc;
2710 }
2711 
bnxt_qplib_release_srqe(struct bnxt_qplib_srq * srq,u32 tag)2712 static void bnxt_qplib_release_srqe(struct bnxt_qplib_srq *srq, u32 tag)
2713 {
2714 	spin_lock(&srq->hwq.lock);
2715 	srq->swq[srq->last_idx].next_idx = (int)tag;
2716 	srq->last_idx = (int)tag;
2717 	srq->swq[srq->last_idx].next_idx = -1;
2718 	bnxt_qplib_hwq_incr_cons(srq->hwq.max_elements, &srq->hwq.cons,
2719 				 srq->dbinfo.max_slot, &srq->dbinfo.flags);
2720 	spin_unlock(&srq->hwq.lock);
2721 }
2722 
bnxt_qplib_cq_process_res_rc(struct bnxt_qplib_cq * cq,struct cq_res_rc * hwcqe,struct bnxt_qplib_cqe ** pcqe,int * budget)2723 static int bnxt_qplib_cq_process_res_rc(struct bnxt_qplib_cq *cq,
2724 					struct cq_res_rc *hwcqe,
2725 					struct bnxt_qplib_cqe **pcqe,
2726 					int *budget)
2727 {
2728 	struct bnxt_qplib_srq *srq;
2729 	struct bnxt_qplib_cqe *cqe;
2730 	struct bnxt_qplib_qp *qp;
2731 	struct bnxt_qplib_q *rq;
2732 	u32 wr_id_idx;
2733 
2734 	qp = (struct bnxt_qplib_qp *)((unsigned long)
2735 				      le64_to_cpu(hwcqe->qp_handle));
2736 	if (!qp) {
2737 		dev_err(&cq->hwq.pdev->dev, "process_cq RC qp is NULL\n");
2738 		return -EINVAL;
2739 	}
2740 	if (qp->rq.flushed) {
2741 		dev_dbg(&cq->hwq.pdev->dev,
2742 			"%s: QP in Flush QP = %p\n", __func__, qp);
2743 		return 0;
2744 	}
2745 
2746 	cqe = *pcqe;
2747 	cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK;
2748 	cqe->length = le32_to_cpu(hwcqe->length);
2749 	cqe->invrkey = le32_to_cpu(hwcqe->imm_data_or_inv_r_key);
2750 	cqe->mr_handle = le64_to_cpu(hwcqe->mr_handle);
2751 	cqe->flags = le16_to_cpu(hwcqe->flags);
2752 	cqe->status = hwcqe->status;
2753 	cqe->qp_handle = (u64)(unsigned long)qp;
2754 
2755 	wr_id_idx = le32_to_cpu(hwcqe->srq_or_rq_wr_id) &
2756 				CQ_RES_RC_SRQ_OR_RQ_WR_ID_MASK;
2757 	if (cqe->flags & CQ_RES_RC_FLAGS_SRQ_SRQ) {
2758 		srq = qp->srq;
2759 		if (!srq)
2760 			return -EINVAL;
2761 		if (wr_id_idx >= srq->hwq.max_elements) {
2762 			dev_err(&cq->hwq.pdev->dev,
2763 				"FP: CQ Process RC wr_id idx 0x%x exceeded SRQ max 0x%x\n",
2764 				wr_id_idx, srq->hwq.max_elements);
2765 			return -EINVAL;
2766 		}
2767 		cqe->wr_id = srq->swq[wr_id_idx].wr_id;
2768 		bnxt_qplib_release_srqe(srq, wr_id_idx);
2769 		cqe++;
2770 		(*budget)--;
2771 		*pcqe = cqe;
2772 	} else {
2773 		struct bnxt_qplib_swq *swq;
2774 
2775 		rq = &qp->rq;
2776 		if (wr_id_idx > (rq->max_wqe - 1)) {
2777 			dev_err(&cq->hwq.pdev->dev,
2778 				"FP: CQ Process RC wr_id idx 0x%x exceeded RQ max 0x%x\n",
2779 				wr_id_idx, rq->max_wqe);
2780 			return -EINVAL;
2781 		}
2782 		if (wr_id_idx != rq->swq_last)
2783 			return -EINVAL;
2784 		swq = &rq->swq[rq->swq_last];
2785 		cqe->wr_id = swq->wr_id;
2786 		cqe++;
2787 		(*budget)--;
2788 		bnxt_qplib_hwq_incr_cons(rq->hwq.max_elements, &rq->hwq.cons,
2789 					 swq->slots, &rq->dbinfo.flags);
2790 		rq->swq_last = swq->next_idx;
2791 		*pcqe = cqe;
2792 
2793 		if (hwcqe->status != CQ_RES_RC_STATUS_OK) {
2794 			qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
2795 			/* Add qp to flush list of the CQ */
2796 			bnxt_qplib_add_flush_qp(qp);
2797 		}
2798 	}
2799 
2800 	return 0;
2801 }
2802 
bnxt_qplib_cq_process_res_ud(struct bnxt_qplib_cq * cq,struct cq_res_ud * hwcqe,struct bnxt_qplib_cqe ** pcqe,int * budget)2803 static int bnxt_qplib_cq_process_res_ud(struct bnxt_qplib_cq *cq,
2804 					struct cq_res_ud *hwcqe,
2805 					struct bnxt_qplib_cqe **pcqe,
2806 					int *budget)
2807 {
2808 	struct bnxt_qplib_srq *srq;
2809 	struct bnxt_qplib_cqe *cqe;
2810 	struct bnxt_qplib_qp *qp;
2811 	struct bnxt_qplib_q *rq;
2812 	u32 wr_id_idx;
2813 
2814 	qp = (struct bnxt_qplib_qp *)((unsigned long)
2815 				      le64_to_cpu(hwcqe->qp_handle));
2816 	if (!qp) {
2817 		dev_err(&cq->hwq.pdev->dev, "process_cq UD qp is NULL\n");
2818 		return -EINVAL;
2819 	}
2820 	if (qp->rq.flushed) {
2821 		dev_dbg(&cq->hwq.pdev->dev,
2822 			"%s: QP in Flush QP = %p\n", __func__, qp);
2823 		return 0;
2824 	}
2825 	cqe = *pcqe;
2826 	cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK;
2827 	cqe->length = le16_to_cpu(hwcqe->length) & CQ_RES_UD_LENGTH_MASK;
2828 	cqe->cfa_meta = le16_to_cpu(hwcqe->cfa_metadata);
2829 	cqe->invrkey = le32_to_cpu(hwcqe->imm_data);
2830 	cqe->flags = le16_to_cpu(hwcqe->flags);
2831 	cqe->status = hwcqe->status;
2832 	cqe->qp_handle = (u64)(unsigned long)qp;
2833 	/*FIXME: Endianness fix needed for smace */
2834 	memcpy(cqe->smac, hwcqe->src_mac, ETH_ALEN);
2835 	wr_id_idx = le32_to_cpu(hwcqe->src_qp_high_srq_or_rq_wr_id)
2836 				& CQ_RES_UD_SRQ_OR_RQ_WR_ID_MASK;
2837 	cqe->src_qp = le16_to_cpu(hwcqe->src_qp_low) |
2838 				  ((le32_to_cpu(
2839 				  hwcqe->src_qp_high_srq_or_rq_wr_id) &
2840 				 CQ_RES_UD_SRC_QP_HIGH_MASK) >> 8);
2841 
2842 	if (cqe->flags & CQ_RES_RC_FLAGS_SRQ_SRQ) {
2843 		srq = qp->srq;
2844 		if (!srq)
2845 			return -EINVAL;
2846 
2847 		if (wr_id_idx >= srq->hwq.max_elements) {
2848 			dev_err(&cq->hwq.pdev->dev,
2849 				"FP: CQ Process UD wr_id idx 0x%x exceeded SRQ max 0x%x\n",
2850 				wr_id_idx, srq->hwq.max_elements);
2851 			return -EINVAL;
2852 		}
2853 		cqe->wr_id = srq->swq[wr_id_idx].wr_id;
2854 		bnxt_qplib_release_srqe(srq, wr_id_idx);
2855 		cqe++;
2856 		(*budget)--;
2857 		*pcqe = cqe;
2858 	} else {
2859 		struct bnxt_qplib_swq *swq;
2860 
2861 		rq = &qp->rq;
2862 		if (wr_id_idx > (rq->max_wqe - 1)) {
2863 			dev_err(&cq->hwq.pdev->dev,
2864 				"FP: CQ Process UD wr_id idx 0x%x exceeded RQ max 0x%x\n",
2865 				wr_id_idx, rq->max_wqe);
2866 			return -EINVAL;
2867 		}
2868 
2869 		if (rq->swq_last != wr_id_idx)
2870 			return -EINVAL;
2871 		swq = &rq->swq[rq->swq_last];
2872 		cqe->wr_id = swq->wr_id;
2873 		cqe++;
2874 		(*budget)--;
2875 		bnxt_qplib_hwq_incr_cons(rq->hwq.max_elements, &rq->hwq.cons,
2876 					 swq->slots, &rq->dbinfo.flags);
2877 		rq->swq_last = swq->next_idx;
2878 		*pcqe = cqe;
2879 
2880 		if (hwcqe->status != CQ_RES_RC_STATUS_OK) {
2881 			qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
2882 			/* Add qp to flush list of the CQ */
2883 			bnxt_qplib_add_flush_qp(qp);
2884 		}
2885 	}
2886 
2887 	return 0;
2888 }
2889 
bnxt_qplib_is_cq_empty(struct bnxt_qplib_cq * cq)2890 bool bnxt_qplib_is_cq_empty(struct bnxt_qplib_cq *cq)
2891 {
2892 	struct cq_base *hw_cqe;
2893 	bool rc = true;
2894 
2895 	hw_cqe = bnxt_qplib_get_qe(&cq->hwq, cq->hwq.cons, NULL);
2896 	 /* Check for Valid bit. If the CQE is valid, return false */
2897 	rc = !CQE_CMP_VALID(hw_cqe, cq->dbinfo.flags);
2898 	return rc;
2899 }
2900 
bnxt_qplib_cq_process_res_raweth_qp1(struct bnxt_qplib_cq * cq,struct cq_res_raweth_qp1 * hwcqe,struct bnxt_qplib_cqe ** pcqe,int * budget)2901 static int bnxt_qplib_cq_process_res_raweth_qp1(struct bnxt_qplib_cq *cq,
2902 						struct cq_res_raweth_qp1 *hwcqe,
2903 						struct bnxt_qplib_cqe **pcqe,
2904 						int *budget)
2905 {
2906 	struct bnxt_qplib_qp *qp;
2907 	struct bnxt_qplib_q *rq;
2908 	struct bnxt_qplib_srq *srq;
2909 	struct bnxt_qplib_cqe *cqe;
2910 	u32 wr_id_idx;
2911 
2912 	qp = (struct bnxt_qplib_qp *)((unsigned long)
2913 				      le64_to_cpu(hwcqe->qp_handle));
2914 	if (!qp) {
2915 		dev_err(&cq->hwq.pdev->dev, "process_cq Raw/QP1 qp is NULL\n");
2916 		return -EINVAL;
2917 	}
2918 	if (qp->rq.flushed) {
2919 		dev_dbg(&cq->hwq.pdev->dev,
2920 			"%s: QP in Flush QP = %p\n", __func__, qp);
2921 		return 0;
2922 	}
2923 	cqe = *pcqe;
2924 	cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK;
2925 	cqe->flags = le16_to_cpu(hwcqe->flags);
2926 	cqe->qp_handle = (u64)(unsigned long)qp;
2927 
2928 	wr_id_idx =
2929 		le32_to_cpu(hwcqe->raweth_qp1_payload_offset_srq_or_rq_wr_id)
2930 				& CQ_RES_RAWETH_QP1_SRQ_OR_RQ_WR_ID_MASK;
2931 	cqe->src_qp = qp->id;
2932 	if (qp->id == 1 && !cqe->length) {
2933 		/* Add workaround for the length misdetection */
2934 		cqe->length = 296;
2935 	} else {
2936 		cqe->length = le16_to_cpu(hwcqe->length);
2937 	}
2938 	cqe->pkey_index = qp->pkey_index;
2939 	memcpy(cqe->smac, qp->smac, 6);
2940 
2941 	cqe->raweth_qp1_flags = le16_to_cpu(hwcqe->raweth_qp1_flags);
2942 	cqe->raweth_qp1_flags2 = le32_to_cpu(hwcqe->raweth_qp1_flags2);
2943 	cqe->raweth_qp1_metadata = le32_to_cpu(hwcqe->raweth_qp1_metadata);
2944 
2945 	if (cqe->flags & CQ_RES_RAWETH_QP1_FLAGS_SRQ_SRQ) {
2946 		srq = qp->srq;
2947 		if (!srq) {
2948 			dev_err(&cq->hwq.pdev->dev,
2949 				"FP: SRQ used but not defined??\n");
2950 			return -EINVAL;
2951 		}
2952 		if (wr_id_idx >= srq->hwq.max_elements) {
2953 			dev_err(&cq->hwq.pdev->dev,
2954 				"FP: CQ Process Raw/QP1 wr_id idx 0x%x exceeded SRQ max 0x%x\n",
2955 				wr_id_idx, srq->hwq.max_elements);
2956 			return -EINVAL;
2957 		}
2958 		cqe->wr_id = srq->swq[wr_id_idx].wr_id;
2959 		bnxt_qplib_release_srqe(srq, wr_id_idx);
2960 		cqe++;
2961 		(*budget)--;
2962 		*pcqe = cqe;
2963 	} else {
2964 		struct bnxt_qplib_swq *swq;
2965 
2966 		rq = &qp->rq;
2967 		if (wr_id_idx > (rq->max_wqe - 1)) {
2968 			dev_err(&cq->hwq.pdev->dev,
2969 				"FP: CQ Process Raw/QP1 RQ wr_id idx 0x%x exceeded RQ max 0x%x\n",
2970 				wr_id_idx, rq->max_wqe);
2971 			return -EINVAL;
2972 		}
2973 		if (rq->swq_last != wr_id_idx)
2974 			return -EINVAL;
2975 		swq = &rq->swq[rq->swq_last];
2976 		cqe->wr_id = swq->wr_id;
2977 		cqe++;
2978 		(*budget)--;
2979 		bnxt_qplib_hwq_incr_cons(rq->hwq.max_elements, &rq->hwq.cons,
2980 					 swq->slots, &rq->dbinfo.flags);
2981 		rq->swq_last = swq->next_idx;
2982 		*pcqe = cqe;
2983 
2984 		if (hwcqe->status != CQ_RES_RC_STATUS_OK) {
2985 			qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
2986 			/* Add qp to flush list of the CQ */
2987 			bnxt_qplib_add_flush_qp(qp);
2988 		}
2989 	}
2990 
2991 	return 0;
2992 }
2993 
bnxt_qplib_cq_process_terminal(struct bnxt_qplib_cq * cq,struct cq_terminal * hwcqe,struct bnxt_qplib_cqe ** pcqe,int * budget)2994 static int bnxt_qplib_cq_process_terminal(struct bnxt_qplib_cq *cq,
2995 					  struct cq_terminal *hwcqe,
2996 					  struct bnxt_qplib_cqe **pcqe,
2997 					  int *budget)
2998 {
2999 	struct bnxt_qplib_qp *qp;
3000 	struct bnxt_qplib_q *sq, *rq;
3001 	struct bnxt_qplib_cqe *cqe;
3002 	u32 swq_last = 0, cqe_cons;
3003 	int rc = 0;
3004 
3005 	/* Check the Status */
3006 	if (hwcqe->status != CQ_TERMINAL_STATUS_OK)
3007 		dev_warn(&cq->hwq.pdev->dev,
3008 			 "FP: CQ Process Terminal Error status = 0x%x\n",
3009 			 hwcqe->status);
3010 
3011 	qp = (struct bnxt_qplib_qp *)((unsigned long)
3012 				      le64_to_cpu(hwcqe->qp_handle));
3013 	if (!qp)
3014 		return -EINVAL;
3015 
3016 	/* Must block new posting of SQ and RQ */
3017 	qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
3018 
3019 	sq = &qp->sq;
3020 	rq = &qp->rq;
3021 
3022 	cqe_cons = le16_to_cpu(hwcqe->sq_cons_idx);
3023 	if (cqe_cons == 0xFFFF)
3024 		goto do_rq;
3025 	cqe_cons %= sq->max_sw_wqe;
3026 
3027 	if (qp->sq.flushed) {
3028 		dev_dbg(&cq->hwq.pdev->dev,
3029 			"%s: QP in Flush QP = %p\n", __func__, qp);
3030 		goto sq_done;
3031 	}
3032 
3033 	/* Terminal CQE can also include aggregated successful CQEs prior.
3034 	 * So we must complete all CQEs from the current sq's cons to the
3035 	 * cq_cons with status OK
3036 	 */
3037 	cqe = *pcqe;
3038 	while (*budget) {
3039 		swq_last = sq->swq_last;
3040 		if (swq_last == cqe_cons)
3041 			break;
3042 		if (sq->swq[swq_last].flags & SQ_SEND_FLAGS_SIGNAL_COMP) {
3043 			memset(cqe, 0, sizeof(*cqe));
3044 			cqe->status = CQ_REQ_STATUS_OK;
3045 			cqe->opcode = CQ_BASE_CQE_TYPE_REQ;
3046 			cqe->qp_handle = (u64)(unsigned long)qp;
3047 			cqe->src_qp = qp->id;
3048 			cqe->wr_id = sq->swq[swq_last].wr_id;
3049 			cqe->type = sq->swq[swq_last].type;
3050 			cqe++;
3051 			(*budget)--;
3052 		}
3053 		bnxt_qplib_hwq_incr_cons(sq->hwq.max_elements, &sq->hwq.cons,
3054 					 sq->swq[swq_last].slots, &sq->dbinfo.flags);
3055 		sq->swq_last = sq->swq[swq_last].next_idx;
3056 	}
3057 	*pcqe = cqe;
3058 	if (!(*budget) && swq_last != cqe_cons) {
3059 		/* Out of budget */
3060 		rc = -EAGAIN;
3061 		goto sq_done;
3062 	}
3063 sq_done:
3064 	if (rc)
3065 		return rc;
3066 do_rq:
3067 	cqe_cons = le16_to_cpu(hwcqe->rq_cons_idx);
3068 	if (cqe_cons == 0xFFFF) {
3069 		goto done;
3070 	} else if (cqe_cons > rq->max_wqe - 1) {
3071 		dev_err(&cq->hwq.pdev->dev,
3072 			"FP: CQ Processed terminal reported rq_cons_idx 0x%x exceeds max 0x%x\n",
3073 			cqe_cons, rq->max_wqe);
3074 		rc = -EINVAL;
3075 		goto done;
3076 	}
3077 
3078 	if (qp->rq.flushed) {
3079 		dev_dbg(&cq->hwq.pdev->dev,
3080 			"%s: QP in Flush QP = %p\n", __func__, qp);
3081 		rc = 0;
3082 		goto done;
3083 	}
3084 
3085 	/* Terminal CQE requires all posted RQEs to complete with FLUSHED_ERR
3086 	 * from the current rq->cons to the rq->prod regardless what the
3087 	 * rq->cons the terminal CQE indicates
3088 	 */
3089 
3090 	/* Add qp to flush list of the CQ */
3091 	bnxt_qplib_add_flush_qp(qp);
3092 done:
3093 	return rc;
3094 }
3095 
bnxt_qplib_cq_process_cutoff(struct bnxt_qplib_cq * cq,struct cq_cutoff * hwcqe)3096 static int bnxt_qplib_cq_process_cutoff(struct bnxt_qplib_cq *cq,
3097 					struct cq_cutoff *hwcqe)
3098 {
3099 	/* Check the Status */
3100 	if (hwcqe->status != CQ_CUTOFF_STATUS_OK) {
3101 		dev_err(&cq->hwq.pdev->dev,
3102 			"FP: CQ Process Cutoff Error status = 0x%x\n",
3103 			hwcqe->status);
3104 		return -EINVAL;
3105 	}
3106 	clear_bit(CQ_FLAGS_RESIZE_IN_PROG, &cq->flags);
3107 	wake_up_interruptible(&cq->waitq);
3108 
3109 	return 0;
3110 }
3111 
bnxt_qplib_process_flush_list(struct bnxt_qplib_cq * cq,struct bnxt_qplib_cqe * cqe,int num_cqes)3112 int bnxt_qplib_process_flush_list(struct bnxt_qplib_cq *cq,
3113 				  struct bnxt_qplib_cqe *cqe,
3114 				  int num_cqes)
3115 {
3116 	struct bnxt_qplib_qp *qp = NULL;
3117 	u32 budget = num_cqes;
3118 	unsigned long flags;
3119 
3120 	spin_lock_irqsave(&cq->flush_lock, flags);
3121 	list_for_each_entry(qp, &cq->sqf_head, sq_flush) {
3122 		dev_dbg(&cq->hwq.pdev->dev, "FP: Flushing SQ QP= %p\n", qp);
3123 		__flush_sq(&qp->sq, qp, &cqe, &budget);
3124 	}
3125 
3126 	list_for_each_entry(qp, &cq->rqf_head, rq_flush) {
3127 		dev_dbg(&cq->hwq.pdev->dev, "FP: Flushing RQ QP= %p\n", qp);
3128 		__flush_rq(&qp->rq, qp, &cqe, &budget);
3129 	}
3130 	spin_unlock_irqrestore(&cq->flush_lock, flags);
3131 
3132 	return num_cqes - budget;
3133 }
3134 
bnxt_qplib_poll_cq(struct bnxt_qplib_cq * cq,struct bnxt_qplib_cqe * cqe,int num_cqes,struct bnxt_qplib_qp ** lib_qp)3135 int bnxt_qplib_poll_cq(struct bnxt_qplib_cq *cq, struct bnxt_qplib_cqe *cqe,
3136 		       int num_cqes, struct bnxt_qplib_qp **lib_qp)
3137 {
3138 	struct cq_base *hw_cqe;
3139 	int budget, rc = 0;
3140 	u32 hw_polled = 0;
3141 	u8 type;
3142 
3143 	budget = num_cqes;
3144 
3145 	while (budget) {
3146 		hw_cqe = bnxt_qplib_get_qe(&cq->hwq, cq->hwq.cons, NULL);
3147 
3148 		/* Check for Valid bit */
3149 		if (!CQE_CMP_VALID(hw_cqe, cq->dbinfo.flags))
3150 			break;
3151 
3152 		/*
3153 		 * The valid test of the entry must be done first before
3154 		 * reading any further.
3155 		 */
3156 		dma_rmb();
3157 		/* From the device's respective CQE format to qplib_wc*/
3158 		type = hw_cqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK;
3159 		switch (type) {
3160 		case CQ_BASE_CQE_TYPE_REQ:
3161 			rc = bnxt_qplib_cq_process_req(cq,
3162 						       (struct cq_req *)hw_cqe,
3163 						       &cqe, &budget,
3164 						       cq->hwq.cons, lib_qp);
3165 			break;
3166 		case CQ_BASE_CQE_TYPE_RES_RC:
3167 			rc = bnxt_qplib_cq_process_res_rc(cq,
3168 							  (struct cq_res_rc *)
3169 							  hw_cqe, &cqe,
3170 							  &budget);
3171 			break;
3172 		case CQ_BASE_CQE_TYPE_RES_UD:
3173 			rc = bnxt_qplib_cq_process_res_ud
3174 					(cq, (struct cq_res_ud *)hw_cqe, &cqe,
3175 					 &budget);
3176 			break;
3177 		case CQ_BASE_CQE_TYPE_RES_RAWETH_QP1:
3178 			rc = bnxt_qplib_cq_process_res_raweth_qp1
3179 					(cq, (struct cq_res_raweth_qp1 *)
3180 					 hw_cqe, &cqe, &budget);
3181 			break;
3182 		case CQ_BASE_CQE_TYPE_TERMINAL:
3183 			rc = bnxt_qplib_cq_process_terminal
3184 					(cq, (struct cq_terminal *)hw_cqe,
3185 					 &cqe, &budget);
3186 			break;
3187 		case CQ_BASE_CQE_TYPE_CUT_OFF:
3188 			bnxt_qplib_cq_process_cutoff
3189 					(cq, (struct cq_cutoff *)hw_cqe);
3190 			/* Done processing this CQ */
3191 			goto exit;
3192 		default:
3193 			dev_err(&cq->hwq.pdev->dev,
3194 				"process_cq unknown type 0x%lx\n",
3195 				hw_cqe->cqe_type_toggle &
3196 				CQ_BASE_CQE_TYPE_MASK);
3197 			rc = -EINVAL;
3198 			break;
3199 		}
3200 		if (rc < 0) {
3201 			if (rc == -EAGAIN)
3202 				break;
3203 			/* Error while processing the CQE, just skip to the
3204 			 * next one
3205 			 */
3206 			if (type != CQ_BASE_CQE_TYPE_TERMINAL)
3207 				dev_err(&cq->hwq.pdev->dev,
3208 					"process_cqe error rc = 0x%x\n", rc);
3209 		}
3210 		hw_polled++;
3211 		bnxt_qplib_hwq_incr_cons(cq->hwq.max_elements, &cq->hwq.cons,
3212 					 1, &cq->dbinfo.flags);
3213 
3214 	}
3215 	if (hw_polled)
3216 		bnxt_qplib_ring_db(&cq->dbinfo, DBC_DBC_TYPE_CQ);
3217 exit:
3218 	return num_cqes - budget;
3219 }
3220 
bnxt_qplib_req_notify_cq(struct bnxt_qplib_cq * cq,u32 arm_type)3221 void bnxt_qplib_req_notify_cq(struct bnxt_qplib_cq *cq, u32 arm_type)
3222 {
3223 	cq->dbinfo.toggle = cq->toggle;
3224 	if (arm_type)
3225 		bnxt_qplib_ring_db(&cq->dbinfo, arm_type);
3226 	/* Using cq->arm_state variable to track whether to issue cq handler */
3227 	atomic_set(&cq->arm_state, 1);
3228 }
3229 
bnxt_qplib_flush_cqn_wq(struct bnxt_qplib_qp * qp)3230 void bnxt_qplib_flush_cqn_wq(struct bnxt_qplib_qp *qp)
3231 {
3232 	flush_workqueue(qp->scq->nq->cqn_wq);
3233 	if (qp->scq != qp->rcq)
3234 		flush_workqueue(qp->rcq->nq->cqn_wq);
3235 }
3236