1 /*-
2 * Copyright (c) 2015 Semihalf
3 * Copyright (c) 2015 Stormshield
4 * Copyright (c) 2018-2019, Rubicon Communications, LLC (Netgate)
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 #include "opt_platform.h"
31
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/errno.h>
35 #include <sys/kernel.h>
36 #include <sys/kthread.h>
37 #include <sys/module.h>
38 #include <sys/taskqueue.h>
39 #include <sys/socket.h>
40 #include <sys/sockio.h>
41
42 #include <net/if.h>
43 #include <net/if_media.h>
44 #include <net/if_types.h>
45
46 #include <dev/etherswitch/etherswitch.h>
47 #include <dev/mii/mii.h>
48 #include <dev/mii/miivar.h>
49
50 #ifdef FDT
51 #include <dev/ofw/ofw_bus.h>
52 #include <dev/ofw/ofw_bus_subr.h>
53 #else
54 #include <sys/stdarg.h>
55 #endif
56
57 #include "e6000swreg.h"
58 #include "etherswitch_if.h"
59 #include "miibus_if.h"
60 #include "mdio_if.h"
61
62 MALLOC_DECLARE(M_E6000SW);
63 MALLOC_DEFINE(M_E6000SW, "e6000sw", "e6000sw switch");
64
65 #define E6000SW_LOCK(_sc) sx_xlock(&(_sc)->sx)
66 #define E6000SW_UNLOCK(_sc) sx_unlock(&(_sc)->sx)
67 #define E6000SW_LOCK_ASSERT(_sc, _what) sx_assert(&(_sc)->sx, (_what))
68 #define E6000SW_TRYLOCK(_sc) sx_tryxlock(&(_sc)->sx)
69 #define E6000SW_LOCKED(_sc) sx_xlocked(&(_sc)->sx)
70 #define E6000SW_WAITREADY(_sc, _reg, _bit) \
71 e6000sw_waitready((_sc), REG_GLOBAL, (_reg), (_bit))
72 #define E6000SW_WAITREADY2(_sc, _reg, _bit) \
73 e6000sw_waitready((_sc), REG_GLOBAL2, (_reg), (_bit))
74 #define MDIO_READ(dev, addr, reg) \
75 MDIO_READREG(device_get_parent(dev), (addr), (reg))
76 #define MDIO_WRITE(dev, addr, reg, val) \
77 MDIO_WRITEREG(device_get_parent(dev), (addr), (reg), (val))
78
79
80 typedef struct e6000sw_softc {
81 device_t dev;
82 #ifdef FDT
83 phandle_t node;
84 #endif
85
86 struct sx sx;
87 if_t ifp[E6000SW_MAX_PORTS];
88 char *ifname[E6000SW_MAX_PORTS];
89 device_t miibus[E6000SW_MAX_PORTS];
90 struct taskqueue *sc_tq;
91 struct timeout_task sc_tt;
92 bool is_shutdown;
93
94 int vlans[E6000SW_NUM_VLANS];
95 uint32_t swid;
96 uint32_t vlan_mode;
97 uint32_t cpuports_mask;
98 uint32_t fixed_mask;
99 uint32_t fixed25_mask;
100 uint32_t ports_mask;
101 int phy_base;
102 int sw_addr;
103 int num_ports;
104 } e6000sw_softc_t;
105
106 static etherswitch_info_t etherswitch_info = {
107 .es_nports = 0,
108 .es_nvlangroups = 0,
109 .es_vlan_caps = ETHERSWITCH_VLAN_PORT | ETHERSWITCH_VLAN_DOT1Q,
110 .es_name = "Marvell 6000 series switch"
111 };
112
113 static void e6000sw_identify(driver_t *, device_t);
114 static int e6000sw_probe(device_t);
115 #ifdef FDT
116 static int e6000sw_parse_fixed_link(e6000sw_softc_t *, phandle_t, uint32_t);
117 static int e6000sw_parse_ethernet(e6000sw_softc_t *, phandle_t, uint32_t);
118 #endif
119 static int e6000sw_attach(device_t);
120 static int e6000sw_detach(device_t);
121 static int e6000sw_read_xmdio(device_t, int, int, int);
122 static int e6000sw_write_xmdio(device_t, int, int, int, int);
123 static int e6000sw_readphy(device_t, int, int);
124 static int e6000sw_writephy(device_t, int, int, int);
125 static int e6000sw_readphy_locked(device_t, int, int);
126 static int e6000sw_writephy_locked(device_t, int, int, int);
127 static etherswitch_info_t* e6000sw_getinfo(device_t);
128 static int e6000sw_getconf(device_t, etherswitch_conf_t *);
129 static int e6000sw_setconf(device_t, etherswitch_conf_t *);
130 static void e6000sw_lock(device_t);
131 static void e6000sw_unlock(device_t);
132 static int e6000sw_getport(device_t, etherswitch_port_t *);
133 static int e6000sw_setport(device_t, etherswitch_port_t *);
134 static int e6000sw_set_vlan_mode(e6000sw_softc_t *, uint32_t);
135 static int e6000sw_readreg_wrapper(device_t, int);
136 static int e6000sw_writereg_wrapper(device_t, int, int);
137 static int e6000sw_getvgroup_wrapper(device_t, etherswitch_vlangroup_t *);
138 static int e6000sw_setvgroup_wrapper(device_t, etherswitch_vlangroup_t *);
139 static int e6000sw_setvgroup(device_t, etherswitch_vlangroup_t *);
140 static int e6000sw_getvgroup(device_t, etherswitch_vlangroup_t *);
141 static void e6000sw_setup(device_t, e6000sw_softc_t *);
142 static void e6000sw_tick(void *, int);
143 static void e6000sw_set_atustat(device_t, e6000sw_softc_t *, int, int);
144 static int e6000sw_atu_flush(device_t, e6000sw_softc_t *, int);
145 static int e6000sw_vtu_flush(e6000sw_softc_t *);
146 static int e6000sw_vtu_update(e6000sw_softc_t *, int, int, int, int, int);
147 static __inline void e6000sw_writereg(e6000sw_softc_t *, int, int, int);
148 static __inline uint32_t e6000sw_readreg(e6000sw_softc_t *, int, int);
149 static int e6000sw_ifmedia_upd(if_t);
150 static void e6000sw_ifmedia_sts(if_t, struct ifmediareq *);
151 static int e6000sw_atu_mac_table(device_t, e6000sw_softc_t *, struct atu_opt *,
152 int);
153 static int e6000sw_get_pvid(e6000sw_softc_t *, int, int *);
154 static void e6000sw_set_pvid(e6000sw_softc_t *, int, int);
155 static __inline bool e6000sw_is_cpuport(e6000sw_softc_t *, int);
156 static __inline bool e6000sw_is_fixedport(e6000sw_softc_t *, int);
157 static __inline bool e6000sw_is_fixed25port(e6000sw_softc_t *, int);
158 static __inline bool e6000sw_is_phyport(e6000sw_softc_t *, int);
159 static __inline bool e6000sw_is_portenabled(e6000sw_softc_t *, int);
160 static __inline struct mii_data *e6000sw_miiforphy(e6000sw_softc_t *,
161 unsigned int);
162
163 static device_method_t e6000sw_methods[] = {
164 /* device interface */
165 DEVMETHOD(device_identify, e6000sw_identify),
166 DEVMETHOD(device_probe, e6000sw_probe),
167 DEVMETHOD(device_attach, e6000sw_attach),
168 DEVMETHOD(device_detach, e6000sw_detach),
169
170 /* bus interface */
171 DEVMETHOD(bus_add_child, device_add_child_ordered),
172
173 /* mii interface */
174 DEVMETHOD(miibus_readreg, e6000sw_readphy),
175 DEVMETHOD(miibus_writereg, e6000sw_writephy),
176
177 /* etherswitch interface */
178 DEVMETHOD(etherswitch_getinfo, e6000sw_getinfo),
179 DEVMETHOD(etherswitch_getconf, e6000sw_getconf),
180 DEVMETHOD(etherswitch_setconf, e6000sw_setconf),
181 DEVMETHOD(etherswitch_lock, e6000sw_lock),
182 DEVMETHOD(etherswitch_unlock, e6000sw_unlock),
183 DEVMETHOD(etherswitch_getport, e6000sw_getport),
184 DEVMETHOD(etherswitch_setport, e6000sw_setport),
185 DEVMETHOD(etherswitch_readreg, e6000sw_readreg_wrapper),
186 DEVMETHOD(etherswitch_writereg, e6000sw_writereg_wrapper),
187 DEVMETHOD(etherswitch_readphyreg, e6000sw_readphy),
188 DEVMETHOD(etherswitch_writephyreg, e6000sw_writephy),
189 DEVMETHOD(etherswitch_setvgroup, e6000sw_setvgroup_wrapper),
190 DEVMETHOD(etherswitch_getvgroup, e6000sw_getvgroup_wrapper),
191
192 DEVMETHOD_END
193 };
194
195 DEFINE_CLASS_0(e6000sw, e6000sw_driver, e6000sw_methods,
196 sizeof(e6000sw_softc_t));
197
198 DRIVER_MODULE(e6000sw, mdio, e6000sw_driver, 0, 0);
199 DRIVER_MODULE(miibus, e6000sw, miibus_driver, 0, 0);
200 DRIVER_MODULE_ORDERED(etherswitch, e6000sw, etherswitch_driver, 0, 0, SI_ORDER_ANY);
201 MODULE_DEPEND(e6000sw, mdio, 1, 1, 1);
202 MODULE_DEPEND(e6000sw, etherswitch, 1, 1, 1);
203
204 static void
e6000sw_identify(driver_t * driver,device_t parent)205 e6000sw_identify(driver_t *driver, device_t parent)
206 {
207
208 if (device_find_child(parent, "e6000sw", DEVICE_UNIT_ANY) == NULL)
209 BUS_ADD_CHILD(parent, 0, "e6000sw", DEVICE_UNIT_ANY);
210 }
211
212 static int
e6000sw_probe(device_t dev)213 e6000sw_probe(device_t dev)
214 {
215 e6000sw_softc_t *sc;
216 const char *description;
217 #ifdef FDT
218 phandle_t switch_node;
219 #else
220 int is_6190 = 0;
221 int is_6190x = 0;
222 #endif
223
224 sc = device_get_softc(dev);
225 sc->dev = dev;
226
227 #ifdef FDT
228 switch_node = ofw_bus_find_compatible(OF_finddevice("/"),
229 "marvell,mv88e6085");
230 if (switch_node == 0) {
231 switch_node = ofw_bus_find_compatible(OF_finddevice("/"),
232 "marvell,mv88e6190");
233
234 if (switch_node == 0)
235 return (ENXIO);
236
237 /*
238 * Trust DTS and fix the port register offset for the MV88E6190
239 * detection bellow.
240 */
241 sc->swid = MV88E6190;
242 }
243
244 if (bootverbose)
245 device_printf(dev, "Found switch_node: 0x%x\n", switch_node);
246
247 sc->node = switch_node;
248
249 if (OF_getencprop(sc->node, "reg", &sc->sw_addr,
250 sizeof(sc->sw_addr)) < 0)
251 return (ENXIO);
252 #else
253 if (resource_int_value(device_get_name(sc->dev),
254 device_get_unit(sc->dev), "addr", &sc->sw_addr) != 0)
255 return (ENXIO);
256 if (resource_int_value(device_get_name(sc->dev),
257 device_get_unit(sc->dev), "is6190", &is_6190) != 0) {
258 /*
259 * Check "is8190" to keep backward compatibility with
260 * older setups.
261 */
262 resource_int_value(device_get_name(sc->dev),
263 device_get_unit(sc->dev), "is8190", &is_6190);
264 }
265 resource_int_value(device_get_name(sc->dev),
266 device_get_unit(sc->dev), "is6190x", &is_6190x);
267 if (is_6190 != 0 && is_6190x != 0) {
268 device_printf(dev,
269 "Cannot configure conflicting variants (6190 / 6190x)\n");
270 return (ENXIO);
271 }
272 if (is_6190 != 0)
273 sc->swid = MV88E6190;
274 else if (is_6190x != 0)
275 sc->swid = MV88E6190X;
276 #endif
277 if (sc->sw_addr < 0 || sc->sw_addr > 32)
278 return (ENXIO);
279
280 /*
281 * Create temporary lock, just to satisfy assertions,
282 * when obtaining the switch ID. Destroy immediately afterwards.
283 */
284 sx_init(&sc->sx, "e6000sw_tmp");
285 E6000SW_LOCK(sc);
286 sc->swid = e6000sw_readreg(sc, REG_PORT(sc, 0), SWITCH_ID) & 0xfff0;
287 E6000SW_UNLOCK(sc);
288 sx_destroy(&sc->sx);
289
290 switch (sc->swid) {
291 case MV88E6141:
292 description = "Marvell 88E6141";
293 sc->phy_base = 0x10;
294 sc->num_ports = 6;
295 break;
296 case MV88E6341:
297 description = "Marvell 88E6341";
298 sc->phy_base = 0x10;
299 sc->num_ports = 6;
300 break;
301 case MV88E6352:
302 description = "Marvell 88E6352";
303 sc->num_ports = 7;
304 break;
305 case MV88E6171:
306 description = "Marvell 88E6171";
307 sc->num_ports = 7;
308 break;
309 case MV88E6172:
310 description = "Marvell 88E6172";
311 sc->num_ports = 7;
312 break;
313 case MV88E6176:
314 description = "Marvell 88E6176";
315 sc->num_ports = 7;
316 break;
317 case MV88E6190:
318 description = "Marvell 88E6190";
319 sc->num_ports = 11;
320 break;
321 case MV88E6190X:
322 description = "Marvell 88E6190X";
323 sc->num_ports = 11;
324 break;
325 default:
326 device_printf(dev, "Unrecognized device, id 0x%x.\n", sc->swid);
327 return (ENXIO);
328 }
329
330 device_set_desc(dev, description);
331
332 return (BUS_PROBE_DEFAULT);
333 }
334
335 #ifdef FDT
336 static int
e6000sw_parse_fixed_link(e6000sw_softc_t * sc,phandle_t node,uint32_t port)337 e6000sw_parse_fixed_link(e6000sw_softc_t *sc, phandle_t node, uint32_t port)
338 {
339 int speed;
340 phandle_t fixed_link;
341
342 fixed_link = ofw_bus_find_child(node, "fixed-link");
343
344 if (fixed_link != 0) {
345 sc->fixed_mask |= (1 << port);
346
347 if (OF_getencprop(fixed_link,
348 "speed", &speed, sizeof(speed)) < 0) {
349 device_printf(sc->dev,
350 "Port %d has a fixed-link node without a speed "
351 "property\n", port);
352 return (ENXIO);
353 }
354 if (speed == 2500 && (MVSWITCH(sc, MV88E6141) ||
355 MVSWITCH(sc, MV88E6341) || MVSWITCH(sc, MV88E6190) || MVSWITCH(sc, MV88E6190X)))
356 sc->fixed25_mask |= (1 << port);
357 }
358
359 return (0);
360 }
361
362 static int
e6000sw_parse_ethernet(e6000sw_softc_t * sc,phandle_t port_handle,uint32_t port)363 e6000sw_parse_ethernet(e6000sw_softc_t *sc, phandle_t port_handle, uint32_t port) {
364 phandle_t switch_eth, switch_eth_handle;
365
366 if (OF_getencprop(port_handle, "ethernet", (void*)&switch_eth_handle,
367 sizeof(switch_eth_handle)) > 0) {
368 if (switch_eth_handle > 0) {
369 switch_eth = OF_node_from_xref(switch_eth_handle);
370
371 device_printf(sc->dev, "CPU port at %d\n", port);
372 sc->cpuports_mask |= (1 << port);
373
374 return (e6000sw_parse_fixed_link(sc, switch_eth, port));
375 } else
376 device_printf(sc->dev,
377 "Port %d has ethernet property but it points "
378 "to an invalid location\n", port);
379 }
380
381 return (0);
382 }
383
384 static int
e6000sw_parse_child_fdt(e6000sw_softc_t * sc,phandle_t child,int * pport)385 e6000sw_parse_child_fdt(e6000sw_softc_t *sc, phandle_t child, int *pport)
386 {
387 uint32_t port;
388
389 if (pport == NULL)
390 return (ENXIO);
391
392 if (OF_getencprop(child, "reg", (void *)&port, sizeof(port)) < 0)
393 return (ENXIO);
394 if (port >= sc->num_ports)
395 return (ENXIO);
396 *pport = port;
397
398 if (e6000sw_parse_fixed_link(sc, child, port) != 0)
399 return (ENXIO);
400
401 if (e6000sw_parse_ethernet(sc, child, port) != 0)
402 return (ENXIO);
403
404 if ((sc->fixed_mask & (1 << port)) != 0)
405 device_printf(sc->dev, "fixed port at %d\n", port);
406 else
407 device_printf(sc->dev, "PHY at port %d\n", port);
408
409 return (0);
410 }
411 #else
412
413 static int
e6000sw_check_hint_val(device_t dev,int * val,char * fmt,...)414 e6000sw_check_hint_val(device_t dev, int *val, char *fmt, ...)
415 {
416 char *resname;
417 int err, len;
418 va_list ap;
419
420 len = min(strlen(fmt) * 2, 128);
421 if (len == 0)
422 return (-1);
423 resname = malloc(len, M_E6000SW, M_WAITOK);
424 memset(resname, 0, len);
425 va_start(ap, fmt);
426 vsnprintf(resname, len - 1, fmt, ap);
427 va_end(ap);
428 err = resource_int_value(device_get_name(dev), device_get_unit(dev),
429 resname, val);
430 free(resname, M_E6000SW);
431
432 return (err);
433 }
434
435 static int
e6000sw_parse_hinted_port(e6000sw_softc_t * sc,int port)436 e6000sw_parse_hinted_port(e6000sw_softc_t *sc, int port)
437 {
438 int err, val;
439
440 err = e6000sw_check_hint_val(sc->dev, &val, "port%ddisabled", port);
441 if (err == 0 && val != 0)
442 return (1);
443
444 err = e6000sw_check_hint_val(sc->dev, &val, "port%dcpu", port);
445 if (err == 0 && val != 0) {
446 sc->cpuports_mask |= (1 << port);
447 sc->fixed_mask |= (1 << port);
448 if (bootverbose)
449 device_printf(sc->dev, "CPU port at %d\n", port);
450 }
451 err = e6000sw_check_hint_val(sc->dev, &val, "port%dspeed", port);
452 if (err == 0 && val != 0) {
453 sc->fixed_mask |= (1 << port);
454 if (val == 2500)
455 sc->fixed25_mask |= (1 << port);
456 }
457
458 if (bootverbose) {
459 if ((sc->fixed_mask & (1 << port)) != 0)
460 device_printf(sc->dev, "fixed port at %d\n", port);
461 else
462 device_printf(sc->dev, "PHY at port %d\n", port);
463 }
464
465 return (0);
466 }
467 #endif
468
469 static int
e6000sw_init_interface(e6000sw_softc_t * sc,int port)470 e6000sw_init_interface(e6000sw_softc_t *sc, int port)
471 {
472 char name[IFNAMSIZ];
473
474 snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(sc->dev));
475
476 sc->ifp[port] = if_alloc(IFT_ETHER);
477 if_setsoftc(sc->ifp[port], sc);
478 if_setflagbits(sc->ifp[port], IFF_UP | IFF_BROADCAST |
479 IFF_DRV_RUNNING | IFF_SIMPLEX, 0);
480 sc->ifname[port] = malloc(strlen(name) + 1, M_E6000SW, M_NOWAIT);
481 if (sc->ifname[port] == NULL) {
482 if_free(sc->ifp[port]);
483 return (ENOMEM);
484 }
485 memcpy(sc->ifname[port], name, strlen(name) + 1);
486 if_initname(sc->ifp[port], sc->ifname[port], port);
487
488 return (0);
489 }
490
491 static int
e6000sw_attach_miibus(e6000sw_softc_t * sc,int port)492 e6000sw_attach_miibus(e6000sw_softc_t *sc, int port)
493 {
494 int err;
495
496 err = mii_attach(sc->dev, &sc->miibus[port], sc->ifp[port],
497 e6000sw_ifmedia_upd, e6000sw_ifmedia_sts, BMSR_DEFCAPMASK,
498 port + sc->phy_base, MII_OFFSET_ANY, 0);
499 if (err != 0)
500 return (err);
501
502 return (0);
503 }
504
505 static void
e6000sw_serdes_power(device_t dev,int port,bool sgmii)506 e6000sw_serdes_power(device_t dev, int port, bool sgmii)
507 {
508 uint32_t reg;
509
510 /* SGMII */
511 reg = e6000sw_read_xmdio(dev, port, E6000SW_SERDES_DEV,
512 E6000SW_SERDES_SGMII_CTL);
513 if (sgmii)
514 reg &= ~E6000SW_SERDES_PDOWN;
515 else
516 reg |= E6000SW_SERDES_PDOWN;
517 e6000sw_write_xmdio(dev, port, E6000SW_SERDES_DEV,
518 E6000SW_SERDES_SGMII_CTL, reg);
519
520 /* 10GBASE-R/10GBASE-X4/X2 */
521 reg = e6000sw_read_xmdio(dev, port, E6000SW_SERDES_DEV,
522 E6000SW_SERDES_PCS_CTL1);
523 if (sgmii)
524 reg |= E6000SW_SERDES_PDOWN;
525 else
526 reg &= ~E6000SW_SERDES_PDOWN;
527 e6000sw_write_xmdio(dev, port, E6000SW_SERDES_DEV,
528 E6000SW_SERDES_PCS_CTL1, reg);
529 }
530
531 static int
e6000sw_attach(device_t dev)532 e6000sw_attach(device_t dev)
533 {
534 bool sgmii;
535 e6000sw_softc_t *sc;
536 #ifdef FDT
537 phandle_t child, ports;
538 #endif
539 int err, port;
540 uint32_t reg;
541
542 err = 0;
543 sc = device_get_softc(dev);
544
545 /*
546 * According to the Linux source code, all of the Switch IDs we support
547 * are multi_chip capable, and should go into multi-chip mode if the
548 * sw_addr != 0.
549 */
550 if (MVSWITCH_MULTICHIP(sc))
551 device_printf(dev, "multi-chip addressing mode (%#x)\n",
552 sc->sw_addr);
553 else
554 device_printf(dev, "single-chip addressing mode\n");
555
556 sx_init(&sc->sx, "e6000sw");
557
558 E6000SW_LOCK(sc);
559 e6000sw_setup(dev, sc);
560
561 sc->sc_tq = taskqueue_create("e6000sw_taskq", M_NOWAIT,
562 taskqueue_thread_enqueue, &sc->sc_tq);
563
564 TIMEOUT_TASK_INIT(sc->sc_tq, &sc->sc_tt, 0, e6000sw_tick, sc);
565 taskqueue_start_threads(&sc->sc_tq, 1, PI_NET, "%s taskq",
566 device_get_nameunit(dev));
567
568 #ifdef FDT
569 ports = ofw_bus_find_child(sc->node, "ports");
570 if (ports == 0) {
571 device_printf(dev, "failed to parse DTS: no ports found for "
572 "switch\n");
573 E6000SW_UNLOCK(sc);
574 return (ENXIO);
575 }
576
577 for (child = OF_child(ports); child != 0; child = OF_peer(child)) {
578 if (!ofw_bus_node_status_okay(child))
579 continue;
580 err = e6000sw_parse_child_fdt(sc, child, &port);
581 if (err != 0) {
582 device_printf(sc->dev, "failed to parse DTS\n");
583 goto out_fail;
584 }
585 #else
586 for (port = 0; port < sc->num_ports; port++) {
587 err = e6000sw_parse_hinted_port(sc, port);
588 if (err != 0)
589 continue;
590 #endif
591
592 /* Port is in use. */
593 sc->ports_mask |= (1 << port);
594
595 err = e6000sw_init_interface(sc, port);
596 if (err != 0) {
597 device_printf(sc->dev, "failed to init interface\n");
598 goto out_fail;
599 }
600
601 if (e6000sw_is_fixedport(sc, port)) {
602 /* Link must be down to change speed force value. */
603 reg = e6000sw_readreg(sc, REG_PORT(sc, port),
604 PSC_CONTROL);
605 reg &= ~PSC_CONTROL_LINK_UP;
606 reg |= PSC_CONTROL_FORCED_LINK;
607 e6000sw_writereg(sc, REG_PORT(sc, port), PSC_CONTROL,
608 reg);
609
610 /*
611 * Force speed, full-duplex, EEE off and flow-control
612 * on.
613 */
614 reg &= ~(PSC_CONTROL_SPD2500 | PSC_CONTROL_ALT_SPD |
615 PSC_CONTROL_FORCED_FC | PSC_CONTROL_FC_ON |
616 PSC_CONTROL_FORCED_EEE);
617 if (e6000sw_is_fixed25port(sc, port))
618 reg |= PSC_CONTROL_SPD2500;
619 else
620 reg |= PSC_CONTROL_SPD1000;
621 if ((MVSWITCH(sc, MV88E6190) ||
622 MVSWITCH(sc, MV88E6190X)) &&
623 e6000sw_is_fixed25port(sc, port))
624 reg |= PSC_CONTROL_ALT_SPD;
625 reg |= PSC_CONTROL_FORCED_DPX | PSC_CONTROL_FULLDPX |
626 PSC_CONTROL_FORCED_LINK | PSC_CONTROL_LINK_UP |
627 PSC_CONTROL_FORCED_SPD;
628 if (!MVSWITCH(sc, MV88E6190) &&
629 !MVSWITCH(sc, MV88E6190X))
630 reg |= PSC_CONTROL_FORCED_FC | PSC_CONTROL_FC_ON;
631 if (MVSWITCH(sc, MV88E6141) ||
632 MVSWITCH(sc, MV88E6341) ||
633 MVSWITCH(sc, MV88E6190) ||
634 MVSWITCH(sc, MV88E6190X))
635 reg |= PSC_CONTROL_FORCED_EEE;
636 e6000sw_writereg(sc, REG_PORT(sc, port), PSC_CONTROL,
637 reg);
638 /* Power on the SERDES interfaces. */
639 if ((MVSWITCH(sc, MV88E6190) ||
640 MVSWITCH(sc, MV88E6190X)) &&
641 (port == 9 || port == 10)) {
642 if (e6000sw_is_fixed25port(sc, port))
643 sgmii = false;
644 else
645 sgmii = true;
646 e6000sw_serdes_power(sc->dev, port, sgmii);
647 }
648 }
649
650 /* Don't attach miibus at CPU/fixed ports */
651 if (!e6000sw_is_phyport(sc, port))
652 continue;
653
654 err = e6000sw_attach_miibus(sc, port);
655 if (err != 0) {
656 device_printf(sc->dev, "failed to attach miibus\n");
657 goto out_fail;
658 }
659 }
660
661 etherswitch_info.es_nports = sc->num_ports;
662
663 /* Default to port vlan. */
664 e6000sw_set_vlan_mode(sc, ETHERSWITCH_VLAN_PORT);
665
666 reg = e6000sw_readreg(sc, REG_GLOBAL, SWITCH_GLOBAL_STATUS);
667 if (reg & SWITCH_GLOBAL_STATUS_IR)
668 device_printf(dev, "switch is ready.\n");
669 E6000SW_UNLOCK(sc);
670
671 bus_identify_children(dev);
672 bus_attach_children(dev);
673
674 taskqueue_enqueue_timeout(sc->sc_tq, &sc->sc_tt, hz);
675
676 return (0);
677
678 out_fail:
679 E6000SW_UNLOCK(sc);
680 e6000sw_detach(dev);
681
682 return (err);
683 }
684
685 static int
686 e6000sw_waitready(e6000sw_softc_t *sc, uint32_t phy, uint32_t reg,
687 uint32_t busybit)
688 {
689 int i;
690
691 for (i = 0; i < E6000SW_RETRIES; i++) {
692 if ((e6000sw_readreg(sc, phy, reg) & busybit) == 0)
693 return (0);
694 DELAY(1);
695 }
696
697 return (1);
698 }
699
700 /* XMDIO/Clause 45 access. */
701 static int
702 e6000sw_read_xmdio(device_t dev, int phy, int devaddr, int devreg)
703 {
704 e6000sw_softc_t *sc;
705 uint32_t reg;
706
707 sc = device_get_softc(dev);
708 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
709 if (E6000SW_WAITREADY2(sc, SMI_PHY_CMD_REG, SMI_CMD_BUSY)) {
710 device_printf(dev, "Timeout while waiting for switch\n");
711 return (ETIMEDOUT);
712 }
713
714 reg = devaddr & SMI_CMD_REG_ADDR_MASK;
715 reg |= (phy << SMI_CMD_DEV_ADDR) & SMI_CMD_DEV_ADDR_MASK;
716
717 /* Load C45 register address. */
718 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG, devreg);
719 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG,
720 reg | SMI_CMD_OP_C45_ADDR);
721 if (E6000SW_WAITREADY2(sc, SMI_PHY_CMD_REG, SMI_CMD_BUSY)) {
722 device_printf(dev, "Timeout while waiting for switch\n");
723 return (ETIMEDOUT);
724 }
725
726 /* Start C45 read operation. */
727 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG,
728 reg | SMI_CMD_OP_C45_READ);
729 if (E6000SW_WAITREADY2(sc, SMI_PHY_CMD_REG, SMI_CMD_BUSY)) {
730 device_printf(dev, "Timeout while waiting for switch\n");
731 return (ETIMEDOUT);
732 }
733
734 /* Read C45 data. */
735 reg = e6000sw_readreg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG);
736
737 return (reg & PHY_DATA_MASK);
738 }
739
740 static int
741 e6000sw_write_xmdio(device_t dev, int phy, int devaddr, int devreg, int val)
742 {
743 e6000sw_softc_t *sc;
744 uint32_t reg;
745
746 sc = device_get_softc(dev);
747 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
748 if (E6000SW_WAITREADY2(sc, SMI_PHY_CMD_REG, SMI_CMD_BUSY)) {
749 device_printf(dev, "Timeout while waiting for switch\n");
750 return (ETIMEDOUT);
751 }
752
753 reg = devaddr & SMI_CMD_REG_ADDR_MASK;
754 reg |= (phy << SMI_CMD_DEV_ADDR) & SMI_CMD_DEV_ADDR_MASK;
755
756 /* Load C45 register address. */
757 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG, devreg);
758 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG,
759 reg | SMI_CMD_OP_C45_ADDR);
760 if (E6000SW_WAITREADY2(sc, SMI_PHY_CMD_REG, SMI_CMD_BUSY)) {
761 device_printf(dev, "Timeout while waiting for switch\n");
762 return (ETIMEDOUT);
763 }
764
765 /* Load data and start the C45 write operation. */
766 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG, devreg);
767 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG,
768 reg | SMI_CMD_OP_C45_WRITE);
769
770 return (0);
771 }
772
773 static int
774 e6000sw_readphy(device_t dev, int phy, int reg)
775 {
776 e6000sw_softc_t *sc;
777 int locked, ret;
778
779 sc = device_get_softc(dev);
780
781 locked = E6000SW_LOCKED(sc);
782 if (!locked)
783 E6000SW_LOCK(sc);
784 ret = e6000sw_readphy_locked(dev, phy, reg);
785 if (!locked)
786 E6000SW_UNLOCK(sc);
787
788 return (ret);
789 }
790
791 /*
792 * PHY registers are paged. Put page index in reg 22 (accessible from every
793 * page), then access specific register.
794 */
795 static int
796 e6000sw_readphy_locked(device_t dev, int phy, int reg)
797 {
798 e6000sw_softc_t *sc;
799 uint32_t val;
800
801 sc = device_get_softc(dev);
802 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
803
804 if (!e6000sw_is_phyport(sc, phy) || reg >= E6000SW_NUM_PHY_REGS) {
805 device_printf(dev, "Wrong register address.\n");
806 return (EINVAL);
807 }
808
809 if (E6000SW_WAITREADY2(sc, SMI_PHY_CMD_REG, SMI_CMD_BUSY)) {
810 device_printf(dev, "Timeout while waiting for switch\n");
811 return (ETIMEDOUT);
812 }
813
814 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG,
815 SMI_CMD_OP_C22_READ | (reg & SMI_CMD_REG_ADDR_MASK) |
816 ((phy << SMI_CMD_DEV_ADDR) & SMI_CMD_DEV_ADDR_MASK));
817 if (E6000SW_WAITREADY2(sc, SMI_PHY_CMD_REG, SMI_CMD_BUSY)) {
818 device_printf(dev, "Timeout while waiting for switch\n");
819 return (ETIMEDOUT);
820 }
821
822 val = e6000sw_readreg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG);
823
824 return (val & PHY_DATA_MASK);
825 }
826
827 static int
828 e6000sw_writephy(device_t dev, int phy, int reg, int data)
829 {
830 e6000sw_softc_t *sc;
831 int locked, ret;
832
833 sc = device_get_softc(dev);
834
835 locked = E6000SW_LOCKED(sc);
836 if (!locked)
837 E6000SW_LOCK(sc);
838 ret = e6000sw_writephy_locked(dev, phy, reg, data);
839 if (!locked)
840 E6000SW_UNLOCK(sc);
841
842 return (ret);
843 }
844
845 static int
846 e6000sw_writephy_locked(device_t dev, int phy, int reg, int data)
847 {
848 e6000sw_softc_t *sc;
849
850 sc = device_get_softc(dev);
851 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
852
853 if (!e6000sw_is_phyport(sc, phy) || reg >= E6000SW_NUM_PHY_REGS) {
854 device_printf(dev, "Wrong register address.\n");
855 return (EINVAL);
856 }
857
858 if (E6000SW_WAITREADY2(sc, SMI_PHY_CMD_REG, SMI_CMD_BUSY)) {
859 device_printf(dev, "Timeout while waiting for switch\n");
860 return (ETIMEDOUT);
861 }
862
863 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_DATA_REG,
864 data & PHY_DATA_MASK);
865 e6000sw_writereg(sc, REG_GLOBAL2, SMI_PHY_CMD_REG,
866 SMI_CMD_OP_C22_WRITE | (reg & SMI_CMD_REG_ADDR_MASK) |
867 ((phy << SMI_CMD_DEV_ADDR) & SMI_CMD_DEV_ADDR_MASK));
868
869 return (0);
870 }
871
872 static int
873 e6000sw_detach(device_t dev)
874 {
875 int error, phy;
876 e6000sw_softc_t *sc;
877
878 sc = device_get_softc(dev);
879
880 E6000SW_LOCK(sc);
881 sc->is_shutdown = true;
882 if (sc->sc_tq != NULL) {
883 while (taskqueue_cancel_timeout(sc->sc_tq, &sc->sc_tt, NULL) != 0)
884 taskqueue_drain_timeout(sc->sc_tq, &sc->sc_tt);
885 }
886 E6000SW_UNLOCK(sc);
887
888 error = bus_generic_detach(dev);
889 if (error != 0)
890 return (error);
891
892 if (sc->sc_tq != NULL)
893 taskqueue_free(sc->sc_tq);
894
895 sx_destroy(&sc->sx);
896 for (phy = 0; phy < sc->num_ports; phy++) {
897 if (sc->ifp[phy] != NULL)
898 if_free(sc->ifp[phy]);
899 if (sc->ifname[phy] != NULL)
900 free(sc->ifname[phy], M_E6000SW);
901 }
902
903 return (0);
904 }
905
906 static etherswitch_info_t*
907 e6000sw_getinfo(device_t dev)
908 {
909
910 return (ðerswitch_info);
911 }
912
913 static int
914 e6000sw_getconf(device_t dev, etherswitch_conf_t *conf)
915 {
916 struct e6000sw_softc *sc;
917
918 /* Return the VLAN mode. */
919 sc = device_get_softc(dev);
920 conf->cmd = ETHERSWITCH_CONF_VLAN_MODE;
921 conf->vlan_mode = sc->vlan_mode;
922
923 return (0);
924 }
925
926 static int
927 e6000sw_setconf(device_t dev, etherswitch_conf_t *conf)
928 {
929 struct e6000sw_softc *sc;
930
931 /* Set the VLAN mode. */
932 sc = device_get_softc(dev);
933 if (conf->cmd & ETHERSWITCH_CONF_VLAN_MODE) {
934 E6000SW_LOCK(sc);
935 e6000sw_set_vlan_mode(sc, conf->vlan_mode);
936 E6000SW_UNLOCK(sc);
937 }
938
939 return (0);
940 }
941
942 static void
943 e6000sw_lock(device_t dev)
944 {
945 struct e6000sw_softc *sc;
946
947 sc = device_get_softc(dev);
948
949 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
950 E6000SW_LOCK(sc);
951 }
952
953 static void
954 e6000sw_unlock(device_t dev)
955 {
956 struct e6000sw_softc *sc;
957
958 sc = device_get_softc(dev);
959
960 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
961 E6000SW_UNLOCK(sc);
962 }
963
964 static int
965 e6000sw_getport(device_t dev, etherswitch_port_t *p)
966 {
967 struct mii_data *mii;
968 int err;
969 struct ifmediareq *ifmr;
970 uint32_t reg;
971
972 e6000sw_softc_t *sc = device_get_softc(dev);
973 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
974
975 if (p->es_port >= sc->num_ports || p->es_port < 0)
976 return (EINVAL);
977 if (!e6000sw_is_portenabled(sc, p->es_port))
978 return (0);
979
980 E6000SW_LOCK(sc);
981 e6000sw_get_pvid(sc, p->es_port, &p->es_pvid);
982
983 /* Port flags. */
984 reg = e6000sw_readreg(sc, REG_PORT(sc, p->es_port), PORT_CONTROL2);
985 if (reg & PORT_CONTROL2_DISC_TAGGED)
986 p->es_flags |= ETHERSWITCH_PORT_DROPTAGGED;
987 if (reg & PORT_CONTROL2_DISC_UNTAGGED)
988 p->es_flags |= ETHERSWITCH_PORT_DROPUNTAGGED;
989
990 err = 0;
991 if (e6000sw_is_fixedport(sc, p->es_port)) {
992 if (e6000sw_is_cpuport(sc, p->es_port))
993 p->es_flags |= ETHERSWITCH_PORT_CPU;
994 ifmr = &p->es_ifmr;
995 ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID;
996 ifmr->ifm_count = 0;
997 if (e6000sw_is_fixed25port(sc, p->es_port))
998 ifmr->ifm_active = IFM_2500_T;
999 else
1000 ifmr->ifm_active = IFM_1000_T;
1001 ifmr->ifm_active |= IFM_ETHER | IFM_FDX;
1002 ifmr->ifm_current = ifmr->ifm_active;
1003 ifmr->ifm_mask = 0;
1004 } else {
1005 mii = e6000sw_miiforphy(sc, p->es_port);
1006 err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr,
1007 &mii->mii_media, SIOCGIFMEDIA);
1008 }
1009 E6000SW_UNLOCK(sc);
1010
1011 return (err);
1012 }
1013
1014 static int
1015 e6000sw_setport(device_t dev, etherswitch_port_t *p)
1016 {
1017 e6000sw_softc_t *sc;
1018 int err;
1019 struct mii_data *mii;
1020 uint32_t reg;
1021
1022 sc = device_get_softc(dev);
1023 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
1024
1025 if (p->es_port >= sc->num_ports || p->es_port < 0)
1026 return (EINVAL);
1027 if (!e6000sw_is_portenabled(sc, p->es_port))
1028 return (0);
1029
1030 E6000SW_LOCK(sc);
1031
1032 /* Port flags. */
1033 reg = e6000sw_readreg(sc, REG_PORT(sc, p->es_port), PORT_CONTROL2);
1034 if (p->es_flags & ETHERSWITCH_PORT_DROPTAGGED)
1035 reg |= PORT_CONTROL2_DISC_TAGGED;
1036 else
1037 reg &= ~PORT_CONTROL2_DISC_TAGGED;
1038 if (p->es_flags & ETHERSWITCH_PORT_DROPUNTAGGED)
1039 reg |= PORT_CONTROL2_DISC_UNTAGGED;
1040 else
1041 reg &= ~PORT_CONTROL2_DISC_UNTAGGED;
1042 e6000sw_writereg(sc, REG_PORT(sc, p->es_port), PORT_CONTROL2, reg);
1043
1044 err = 0;
1045 if (p->es_pvid != 0)
1046 e6000sw_set_pvid(sc, p->es_port, p->es_pvid);
1047 if (e6000sw_is_phyport(sc, p->es_port)) {
1048 mii = e6000sw_miiforphy(sc, p->es_port);
1049 err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr, &mii->mii_media,
1050 SIOCSIFMEDIA);
1051 }
1052 E6000SW_UNLOCK(sc);
1053
1054 return (err);
1055 }
1056
1057 static __inline void
1058 e6000sw_port_vlan_assign(e6000sw_softc_t *sc, int port, uint32_t fid,
1059 uint32_t members)
1060 {
1061 uint32_t reg;
1062
1063 reg = e6000sw_readreg(sc, REG_PORT(sc, port), PORT_VLAN_MAP);
1064 reg &= ~(PORT_MASK(sc) | PORT_VLAN_MAP_FID_MASK);
1065 reg |= members & PORT_MASK(sc) & ~(1 << port);
1066 reg |= (fid << PORT_VLAN_MAP_FID) & PORT_VLAN_MAP_FID_MASK;
1067 e6000sw_writereg(sc, REG_PORT(sc, port), PORT_VLAN_MAP, reg);
1068 reg = e6000sw_readreg(sc, REG_PORT(sc, port), PORT_CONTROL1);
1069 reg &= ~PORT_CONTROL1_FID_MASK;
1070 reg |= (fid >> 4) & PORT_CONTROL1_FID_MASK;
1071 e6000sw_writereg(sc, REG_PORT(sc, port), PORT_CONTROL1, reg);
1072 }
1073
1074 static int
1075 e6000sw_init_vlan(struct e6000sw_softc *sc)
1076 {
1077 int i, port, ret;
1078 uint32_t members;
1079
1080 /* Disable all ports */
1081 for (port = 0; port < sc->num_ports; port++) {
1082 ret = e6000sw_readreg(sc, REG_PORT(sc, port), PORT_CONTROL);
1083 e6000sw_writereg(sc, REG_PORT(sc, port), PORT_CONTROL,
1084 (ret & ~PORT_CONTROL_ENABLE));
1085 }
1086
1087 /* Flush VTU. */
1088 e6000sw_vtu_flush(sc);
1089
1090 for (port = 0; port < sc->num_ports; port++) {
1091 /* Reset the egress and frame mode. */
1092 ret = e6000sw_readreg(sc, REG_PORT(sc, port), PORT_CONTROL);
1093 ret &= ~(PORT_CONTROL_EGRESS | PORT_CONTROL_FRAME);
1094 e6000sw_writereg(sc, REG_PORT(sc, port), PORT_CONTROL, ret);
1095
1096 /* Set the 802.1q mode. */
1097 ret = e6000sw_readreg(sc, REG_PORT(sc, port), PORT_CONTROL2);
1098 ret &= ~PORT_CONTROL2_DOT1Q;
1099 if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q)
1100 ret |= PORT_CONTROL2_DOT1Q;
1101 e6000sw_writereg(sc, REG_PORT(sc, port), PORT_CONTROL2, ret);
1102 }
1103
1104 for (port = 0; port < sc->num_ports; port++) {
1105 if (!e6000sw_is_portenabled(sc, port))
1106 continue;
1107
1108 ret = e6000sw_readreg(sc, REG_PORT(sc, port), PORT_VID);
1109
1110 /* Set port priority */
1111 ret &= ~PORT_VID_PRIORITY_MASK;
1112
1113 /* Set VID map */
1114 ret &= ~PORT_VID_DEF_VID_MASK;
1115 if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q)
1116 ret |= 1;
1117 else
1118 ret |= (port + 1);
1119 e6000sw_writereg(sc, REG_PORT(sc, port), PORT_VID, ret);
1120 }
1121
1122 /* Assign the member ports to each origin port. */
1123 for (port = 0; port < sc->num_ports; port++) {
1124 members = 0;
1125 if (e6000sw_is_portenabled(sc, port)) {
1126 for (i = 0; i < sc->num_ports; i++) {
1127 if (i == port || !e6000sw_is_portenabled(sc, i))
1128 continue;
1129 members |= (1 << i);
1130 }
1131 }
1132 /* Default to FID 0. */
1133 e6000sw_port_vlan_assign(sc, port, 0, members);
1134 }
1135
1136 /* Reset internal VLAN table. */
1137 for (i = 0; i < nitems(sc->vlans); i++)
1138 sc->vlans[i] = 0;
1139
1140 /* Create default VLAN (1). */
1141 if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) {
1142 sc->vlans[0] = 1;
1143 e6000sw_vtu_update(sc, 0, sc->vlans[0], 1, 0, sc->ports_mask);
1144 }
1145
1146 /* Enable all ports */
1147 for (port = 0; port < sc->num_ports; port++) {
1148 if (!e6000sw_is_portenabled(sc, port))
1149 continue;
1150 ret = e6000sw_readreg(sc, REG_PORT(sc, port), PORT_CONTROL);
1151 e6000sw_writereg(sc, REG_PORT(sc, port), PORT_CONTROL,
1152 (ret | PORT_CONTROL_ENABLE));
1153 }
1154
1155 return (0);
1156 }
1157
1158 static int
1159 e6000sw_set_vlan_mode(struct e6000sw_softc *sc, uint32_t mode)
1160 {
1161
1162 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
1163 switch (mode) {
1164 case ETHERSWITCH_VLAN_PORT:
1165 sc->vlan_mode = ETHERSWITCH_VLAN_PORT;
1166 etherswitch_info.es_nvlangroups = sc->num_ports;
1167 return (e6000sw_init_vlan(sc));
1168 break;
1169 case ETHERSWITCH_VLAN_DOT1Q:
1170 sc->vlan_mode = ETHERSWITCH_VLAN_DOT1Q;
1171 etherswitch_info.es_nvlangroups = E6000SW_NUM_VLANS;
1172 return (e6000sw_init_vlan(sc));
1173 break;
1174 default:
1175 return (EINVAL);
1176 }
1177 }
1178
1179 /*
1180 * Registers in this switch are divided into sections, specified in
1181 * documentation. So as to access any of them, section index and reg index
1182 * is necessary. etherswitchcfg uses only one variable, so indexes were
1183 * compressed into addr_reg: 32 * section_index + reg_index.
1184 */
1185 static int
1186 e6000sw_readreg_wrapper(device_t dev, int addr_reg)
1187 {
1188 e6000sw_softc_t *sc;
1189
1190 sc = device_get_softc(dev);
1191 if ((addr_reg > (REG_GLOBAL2 * 32 + REG_NUM_MAX)) ||
1192 (addr_reg < (REG_PORT(sc, 0) * 32))) {
1193 device_printf(dev, "Wrong register address.\n");
1194 return (EINVAL);
1195 }
1196
1197 return (e6000sw_readreg(device_get_softc(dev), addr_reg / 32,
1198 addr_reg % 32));
1199 }
1200
1201 static int
1202 e6000sw_writereg_wrapper(device_t dev, int addr_reg, int val)
1203 {
1204 e6000sw_softc_t *sc;
1205
1206 sc = device_get_softc(dev);
1207 if ((addr_reg > (REG_GLOBAL2 * 32 + REG_NUM_MAX)) ||
1208 (addr_reg < (REG_PORT(sc, 0) * 32))) {
1209 device_printf(dev, "Wrong register address.\n");
1210 return (EINVAL);
1211 }
1212 e6000sw_writereg(device_get_softc(dev), addr_reg / 32,
1213 addr_reg % 32, val);
1214
1215 return (0);
1216 }
1217
1218 /*
1219 * setvgroup/getvgroup called from etherswitchfcg need to be locked,
1220 * while internal calls do not.
1221 */
1222 static int
1223 e6000sw_setvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg)
1224 {
1225 e6000sw_softc_t *sc;
1226 int ret;
1227
1228 sc = device_get_softc(dev);
1229 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
1230
1231 E6000SW_LOCK(sc);
1232 ret = e6000sw_setvgroup(dev, vg);
1233 E6000SW_UNLOCK(sc);
1234
1235 return (ret);
1236 }
1237
1238 static int
1239 e6000sw_getvgroup_wrapper(device_t dev, etherswitch_vlangroup_t *vg)
1240 {
1241 e6000sw_softc_t *sc;
1242 int ret;
1243
1244 sc = device_get_softc(dev);
1245 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
1246
1247 E6000SW_LOCK(sc);
1248 ret = e6000sw_getvgroup(dev, vg);
1249 E6000SW_UNLOCK(sc);
1250
1251 return (ret);
1252 }
1253
1254 static int
1255 e6000sw_set_port_vlan(e6000sw_softc_t *sc, etherswitch_vlangroup_t *vg)
1256 {
1257 uint32_t port;
1258
1259 port = vg->es_vlangroup;
1260 if (port > sc->num_ports)
1261 return (EINVAL);
1262
1263 if (vg->es_member_ports != vg->es_untagged_ports) {
1264 device_printf(sc->dev, "Tagged ports not supported.\n");
1265 return (EINVAL);
1266 }
1267
1268 e6000sw_port_vlan_assign(sc, port, 0, vg->es_untagged_ports);
1269 vg->es_vid = port | ETHERSWITCH_VID_VALID;
1270
1271 return (0);
1272 }
1273
1274 static int
1275 e6000sw_set_dot1q_vlan(e6000sw_softc_t *sc, etherswitch_vlangroup_t *vg)
1276 {
1277 int i, vlan;
1278
1279 vlan = vg->es_vid & ETHERSWITCH_VID_MASK;
1280
1281 /* Set VLAN to '0' removes it from table. */
1282 if (vlan == 0) {
1283 e6000sw_vtu_update(sc, VTU_PURGE,
1284 sc->vlans[vg->es_vlangroup], 0, 0, 0);
1285 sc->vlans[vg->es_vlangroup] = 0;
1286 return (0);
1287 }
1288
1289 /* Is this VLAN already in table ? */
1290 for (i = 0; i < etherswitch_info.es_nvlangroups; i++)
1291 if (i != vg->es_vlangroup && vlan == sc->vlans[i])
1292 return (EINVAL);
1293
1294 sc->vlans[vg->es_vlangroup] = vlan;
1295 e6000sw_vtu_update(sc, 0, vlan, vg->es_vlangroup + 1,
1296 vg->es_member_ports & sc->ports_mask,
1297 vg->es_untagged_ports & sc->ports_mask);
1298
1299 return (0);
1300 }
1301
1302 static int
1303 e6000sw_setvgroup(device_t dev, etherswitch_vlangroup_t *vg)
1304 {
1305 e6000sw_softc_t *sc;
1306
1307 sc = device_get_softc(dev);
1308 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
1309
1310 if (sc->vlan_mode == ETHERSWITCH_VLAN_PORT)
1311 return (e6000sw_set_port_vlan(sc, vg));
1312 else if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q)
1313 return (e6000sw_set_dot1q_vlan(sc, vg));
1314
1315 return (EINVAL);
1316 }
1317
1318 static int
1319 e6000sw_get_port_vlan(e6000sw_softc_t *sc, etherswitch_vlangroup_t *vg)
1320 {
1321 uint32_t port, reg;
1322
1323 port = vg->es_vlangroup;
1324 if (port > sc->num_ports)
1325 return (EINVAL);
1326
1327 if (!e6000sw_is_portenabled(sc, port)) {
1328 vg->es_vid = port;
1329 return (0);
1330 }
1331
1332 reg = e6000sw_readreg(sc, REG_PORT(sc, port), PORT_VLAN_MAP);
1333 vg->es_untagged_ports = vg->es_member_ports = reg & PORT_MASK(sc);
1334 vg->es_vid = port | ETHERSWITCH_VID_VALID;
1335 vg->es_fid = (reg & PORT_VLAN_MAP_FID_MASK) >> PORT_VLAN_MAP_FID;
1336 reg = e6000sw_readreg(sc, REG_PORT(sc, port), PORT_CONTROL1);
1337 vg->es_fid |= (reg & PORT_CONTROL1_FID_MASK) << 4;
1338
1339 return (0);
1340 }
1341
1342 static int
1343 e6000sw_get_dot1q_vlan(e6000sw_softc_t *sc, etherswitch_vlangroup_t *vg)
1344 {
1345 int i, port;
1346 uint32_t reg;
1347
1348 vg->es_fid = 0;
1349 vg->es_vid = sc->vlans[vg->es_vlangroup];
1350 vg->es_untagged_ports = vg->es_member_ports = 0;
1351 if (vg->es_vid == 0)
1352 return (0);
1353
1354 if (E6000SW_WAITREADY(sc, VTU_OPERATION, VTU_BUSY)) {
1355 device_printf(sc->dev, "VTU unit is busy, cannot access\n");
1356 return (EBUSY);
1357 }
1358
1359 e6000sw_writereg(sc, REG_GLOBAL, VTU_VID, vg->es_vid - 1);
1360
1361 reg = e6000sw_readreg(sc, REG_GLOBAL, VTU_OPERATION);
1362 reg &= ~VTU_OP_MASK;
1363 reg |= VTU_GET_NEXT | VTU_BUSY;
1364 e6000sw_writereg(sc, REG_GLOBAL, VTU_OPERATION, reg);
1365 if (E6000SW_WAITREADY(sc, VTU_OPERATION, VTU_BUSY)) {
1366 device_printf(sc->dev, "Timeout while reading\n");
1367 return (EBUSY);
1368 }
1369
1370 reg = e6000sw_readreg(sc, REG_GLOBAL, VTU_VID);
1371 if (reg == VTU_VID_MASK || (reg & VTU_VID_VALID) == 0)
1372 return (EINVAL);
1373 if ((reg & VTU_VID_MASK) != vg->es_vid)
1374 return (EINVAL);
1375
1376 vg->es_vid |= ETHERSWITCH_VID_VALID;
1377 reg = e6000sw_readreg(sc, REG_GLOBAL, VTU_DATA);
1378 for (i = 0; i < sc->num_ports; i++) {
1379 if (i == VTU_PPREG(sc))
1380 reg = e6000sw_readreg(sc, REG_GLOBAL, VTU_DATA2);
1381 port = (reg >> VTU_PORT(sc, i)) & VTU_PORT_MASK;
1382 if (port == VTU_PORT_UNTAGGED) {
1383 vg->es_untagged_ports |= (1 << i);
1384 vg->es_member_ports |= (1 << i);
1385 } else if (port == VTU_PORT_TAGGED)
1386 vg->es_member_ports |= (1 << i);
1387 }
1388
1389 return (0);
1390 }
1391
1392 static int
1393 e6000sw_getvgroup(device_t dev, etherswitch_vlangroup_t *vg)
1394 {
1395 e6000sw_softc_t *sc;
1396
1397 sc = device_get_softc(dev);
1398 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
1399
1400 if (sc->vlan_mode == ETHERSWITCH_VLAN_PORT)
1401 return (e6000sw_get_port_vlan(sc, vg));
1402 else if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q)
1403 return (e6000sw_get_dot1q_vlan(sc, vg));
1404
1405 return (EINVAL);
1406 }
1407
1408 static __inline struct mii_data*
1409 e6000sw_miiforphy(e6000sw_softc_t *sc, unsigned int phy)
1410 {
1411 device_t mii_dev;
1412
1413 if (!e6000sw_is_phyport(sc, phy))
1414 return (NULL);
1415 mii_dev = sc->miibus[phy];
1416 if (mii_dev == NULL)
1417 return (NULL);
1418 if (device_get_state(mii_dev) != DS_ATTACHED)
1419 return (NULL);
1420
1421 return (device_get_softc(mii_dev));
1422 }
1423
1424 static int
1425 e6000sw_ifmedia_upd(if_t ifp)
1426 {
1427 e6000sw_softc_t *sc;
1428 struct mii_data *mii;
1429
1430 sc = if_getsoftc(ifp);
1431 mii = e6000sw_miiforphy(sc, if_getdunit(ifp));
1432 if (mii == NULL)
1433 return (ENXIO);
1434 mii_mediachg(mii);
1435
1436 return (0);
1437 }
1438
1439 static void
1440 e6000sw_ifmedia_sts(if_t ifp, struct ifmediareq *ifmr)
1441 {
1442 e6000sw_softc_t *sc;
1443 struct mii_data *mii;
1444
1445 sc = if_getsoftc(ifp);
1446 mii = e6000sw_miiforphy(sc, if_getdunit(ifp));
1447
1448 if (mii == NULL)
1449 return;
1450
1451 mii_pollstat(mii);
1452 ifmr->ifm_active = mii->mii_media_active;
1453 ifmr->ifm_status = mii->mii_media_status;
1454 }
1455
1456 static int
1457 e6000sw_smi_waitready(e6000sw_softc_t *sc, int phy)
1458 {
1459 int i;
1460
1461 for (i = 0; i < E6000SW_SMI_TIMEOUT; i++) {
1462 if ((MDIO_READ(sc->dev, phy, SMI_CMD) & SMI_CMD_BUSY) == 0)
1463 return (0);
1464 DELAY(1);
1465 }
1466
1467 return (1);
1468 }
1469
1470 static __inline uint32_t
1471 e6000sw_readreg(e6000sw_softc_t *sc, int addr, int reg)
1472 {
1473
1474 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
1475
1476 if (!MVSWITCH_MULTICHIP(sc))
1477 return (MDIO_READ(sc->dev, addr, reg) & 0xffff);
1478
1479 if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
1480 printf("e6000sw: readreg timeout\n");
1481 return (0xffff);
1482 }
1483 MDIO_WRITE(sc->dev, sc->sw_addr, SMI_CMD,
1484 SMI_CMD_OP_C22_READ | (reg & SMI_CMD_REG_ADDR_MASK) |
1485 ((addr << SMI_CMD_DEV_ADDR) & SMI_CMD_DEV_ADDR_MASK));
1486 if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
1487 printf("e6000sw: readreg timeout\n");
1488 return (0xffff);
1489 }
1490
1491 return (MDIO_READ(sc->dev, sc->sw_addr, SMI_DATA) & 0xffff);
1492 }
1493
1494 static __inline void
1495 e6000sw_writereg(e6000sw_softc_t *sc, int addr, int reg, int val)
1496 {
1497
1498 E6000SW_LOCK_ASSERT(sc, SA_XLOCKED);
1499
1500 if (!MVSWITCH_MULTICHIP(sc)) {
1501 MDIO_WRITE(sc->dev, addr, reg, val);
1502 return;
1503 }
1504
1505 if (e6000sw_smi_waitready(sc, sc->sw_addr)) {
1506 printf("e6000sw: readreg timeout\n");
1507 return;
1508 }
1509 MDIO_WRITE(sc->dev, sc->sw_addr, SMI_DATA, val);
1510 MDIO_WRITE(sc->dev, sc->sw_addr, SMI_CMD,
1511 SMI_CMD_OP_C22_WRITE | (reg & SMI_CMD_REG_ADDR_MASK) |
1512 ((addr << SMI_CMD_DEV_ADDR) & SMI_CMD_DEV_ADDR_MASK));
1513 }
1514
1515 static __inline bool
1516 e6000sw_is_cpuport(e6000sw_softc_t *sc, int port)
1517 {
1518
1519 return ((sc->cpuports_mask & (1 << port)) ? true : false);
1520 }
1521
1522 static __inline bool
1523 e6000sw_is_fixedport(e6000sw_softc_t *sc, int port)
1524 {
1525
1526 return ((sc->fixed_mask & (1 << port)) ? true : false);
1527 }
1528
1529 static __inline bool
1530 e6000sw_is_fixed25port(e6000sw_softc_t *sc, int port)
1531 {
1532
1533 return ((sc->fixed25_mask & (1 << port)) ? true : false);
1534 }
1535
1536 static __inline bool
1537 e6000sw_is_phyport(e6000sw_softc_t *sc, int port)
1538 {
1539 uint32_t phy_mask;
1540 phy_mask = ~(sc->fixed_mask | sc->cpuports_mask);
1541
1542 return ((phy_mask & (1 << port)) ? true : false);
1543 }
1544
1545 static __inline bool
1546 e6000sw_is_portenabled(e6000sw_softc_t *sc, int port)
1547 {
1548
1549 return ((sc->ports_mask & (1 << port)) ? true : false);
1550 }
1551
1552 static __inline void
1553 e6000sw_set_pvid(e6000sw_softc_t *sc, int port, int pvid)
1554 {
1555 uint32_t reg;
1556
1557 reg = e6000sw_readreg(sc, REG_PORT(sc, port), PORT_VID);
1558 reg &= ~PORT_VID_DEF_VID_MASK;
1559 reg |= (pvid & PORT_VID_DEF_VID_MASK);
1560 e6000sw_writereg(sc, REG_PORT(sc, port), PORT_VID, reg);
1561 }
1562
1563 static __inline int
1564 e6000sw_get_pvid(e6000sw_softc_t *sc, int port, int *pvid)
1565 {
1566
1567 if (pvid == NULL)
1568 return (ENXIO);
1569
1570 *pvid = e6000sw_readreg(sc, REG_PORT(sc, port), PORT_VID) &
1571 PORT_VID_DEF_VID_MASK;
1572
1573 return (0);
1574 }
1575
1576 /*
1577 * Convert port status to ifmedia.
1578 */
1579 static void
1580 e6000sw_update_ifmedia(uint16_t portstatus, u_int *media_status, u_int *media_active)
1581 {
1582 *media_active = IFM_ETHER;
1583 *media_status = IFM_AVALID;
1584
1585 if ((portstatus & PORT_STATUS_LINK_MASK) != 0)
1586 *media_status |= IFM_ACTIVE;
1587 else {
1588 *media_active |= IFM_NONE;
1589 return;
1590 }
1591
1592 switch (portstatus & PORT_STATUS_SPEED_MASK) {
1593 case PORT_STATUS_SPEED_10:
1594 *media_active |= IFM_10_T;
1595 break;
1596 case PORT_STATUS_SPEED_100:
1597 *media_active |= IFM_100_TX;
1598 break;
1599 case PORT_STATUS_SPEED_1000:
1600 *media_active |= IFM_1000_T;
1601 break;
1602 }
1603
1604 if ((portstatus & PORT_STATUS_DUPLEX_MASK) == 0)
1605 *media_active |= IFM_FDX;
1606 else
1607 *media_active |= IFM_HDX;
1608 }
1609
1610 static void
1611 e6000sw_tick(void *arg, int p __unused)
1612 {
1613 e6000sw_softc_t *sc;
1614 struct mii_data *mii;
1615 struct mii_softc *miisc;
1616 uint16_t portstatus;
1617 int port;
1618
1619 sc = arg;
1620
1621 E6000SW_LOCK_ASSERT(sc, SA_UNLOCKED);
1622
1623 E6000SW_LOCK(sc);
1624
1625 if (sc->is_shutdown) {
1626 E6000SW_UNLOCK(sc);
1627 return;
1628 }
1629
1630 for (port = 0; port < sc->num_ports; port++) {
1631 /* Tick only on PHY ports */
1632 if (!e6000sw_is_portenabled(sc, port) ||
1633 !e6000sw_is_phyport(sc, port))
1634 continue;
1635
1636 mii = e6000sw_miiforphy(sc, port);
1637 if (mii == NULL)
1638 continue;
1639
1640 portstatus = e6000sw_readreg(sc, REG_PORT(sc, port),
1641 PORT_STATUS);
1642
1643 e6000sw_update_ifmedia(portstatus,
1644 &mii->mii_media_status, &mii->mii_media_active);
1645
1646 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) {
1647 /*
1648 * Note: this is sometimes NULL during PHY
1649 * enumeration, although that shouldn't be
1650 * happening /after/ tick runs. To work
1651 * around this whilst the problem is being
1652 * debugged, just do a NULL check here and
1653 * continue.
1654 */
1655 if (mii->mii_media.ifm_cur == NULL)
1656 continue;
1657
1658 if (IFM_INST(mii->mii_media.ifm_cur->ifm_media)
1659 != miisc->mii_inst)
1660 continue;
1661 mii_phy_update(miisc, MII_POLLSTAT);
1662 }
1663 }
1664 E6000SW_UNLOCK(sc);
1665 taskqueue_enqueue_timeout(sc->sc_tq, &sc->sc_tt, hz);
1666 }
1667
1668 static void
1669 e6000sw_setup(device_t dev, e6000sw_softc_t *sc)
1670 {
1671 uint32_t atu_ctrl;
1672
1673 /* Set aging time. */
1674 atu_ctrl = e6000sw_readreg(sc, REG_GLOBAL, ATU_CONTROL);
1675 atu_ctrl &= ~ATU_CONTROL_AGETIME_MASK;
1676 atu_ctrl |= E6000SW_DEFAULT_AGETIME << ATU_CONTROL_AGETIME;
1677 e6000sw_writereg(sc, REG_GLOBAL, ATU_CONTROL, atu_ctrl);
1678
1679 /* Send all with specific mac address to cpu port */
1680 e6000sw_writereg(sc, REG_GLOBAL2, MGMT_EN_2x, MGMT_EN_ALL);
1681 e6000sw_writereg(sc, REG_GLOBAL2, MGMT_EN_0x, MGMT_EN_ALL);
1682
1683 /* Disable Remote Management */
1684 e6000sw_writereg(sc, REG_GLOBAL, SWITCH_GLOBAL_CONTROL2, 0);
1685
1686 /* Disable loopback filter and flow control messages */
1687 e6000sw_writereg(sc, REG_GLOBAL2, SWITCH_MGMT,
1688 SWITCH_MGMT_PRI_MASK |
1689 (1 << SWITCH_MGMT_RSVD2CPU) |
1690 SWITCH_MGMT_FC_PRI_MASK |
1691 (1 << SWITCH_MGMT_FORCEFLOW));
1692
1693 e6000sw_atu_flush(dev, sc, NO_OPERATION);
1694 e6000sw_atu_mac_table(dev, sc, NULL, NO_OPERATION);
1695 e6000sw_set_atustat(dev, sc, 0, COUNT_ALL);
1696 }
1697
1698 static void
1699 e6000sw_set_atustat(device_t dev, e6000sw_softc_t *sc, int bin, int flag)
1700 {
1701
1702 e6000sw_readreg(sc, REG_GLOBAL2, ATU_STATS);
1703 e6000sw_writereg(sc, REG_GLOBAL2, ATU_STATS, (bin << ATU_STATS_BIN ) |
1704 (flag << ATU_STATS_FLAG));
1705 }
1706
1707 static int
1708 e6000sw_atu_mac_table(device_t dev, e6000sw_softc_t *sc, struct atu_opt *atu,
1709 int flag)
1710 {
1711 uint16_t ret_opt;
1712 uint16_t ret_data;
1713
1714 if (flag == NO_OPERATION)
1715 return (0);
1716 else if ((flag & (LOAD_FROM_FIB | PURGE_FROM_FIB | GET_NEXT_IN_FIB |
1717 GET_VIOLATION_DATA | CLEAR_VIOLATION_DATA)) == 0) {
1718 device_printf(dev, "Wrong Opcode for ATU operation\n");
1719 return (EINVAL);
1720 }
1721
1722 if (E6000SW_WAITREADY(sc, ATU_OPERATION, ATU_UNIT_BUSY)) {
1723 device_printf(dev, "ATU unit is busy, cannot access\n");
1724 return (EBUSY);
1725 }
1726
1727 ret_opt = e6000sw_readreg(sc, REG_GLOBAL, ATU_OPERATION);
1728 if (flag & LOAD_FROM_FIB) {
1729 ret_data = e6000sw_readreg(sc, REG_GLOBAL, ATU_DATA);
1730 e6000sw_writereg(sc, REG_GLOBAL2, ATU_DATA, (ret_data &
1731 ~ENTRY_STATE));
1732 }
1733 e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR01, atu->mac_01);
1734 e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR23, atu->mac_23);
1735 e6000sw_writereg(sc, REG_GLOBAL, ATU_MAC_ADDR45, atu->mac_45);
1736 e6000sw_writereg(sc, REG_GLOBAL, ATU_FID, atu->fid);
1737
1738 e6000sw_writereg(sc, REG_GLOBAL, ATU_OPERATION,
1739 (ret_opt | ATU_UNIT_BUSY | flag));
1740
1741 if (E6000SW_WAITREADY(sc, ATU_OPERATION, ATU_UNIT_BUSY))
1742 device_printf(dev, "Timeout while waiting ATU\n");
1743 else if (flag & GET_NEXT_IN_FIB) {
1744 atu->mac_01 = e6000sw_readreg(sc, REG_GLOBAL,
1745 ATU_MAC_ADDR01);
1746 atu->mac_23 = e6000sw_readreg(sc, REG_GLOBAL,
1747 ATU_MAC_ADDR23);
1748 atu->mac_45 = e6000sw_readreg(sc, REG_GLOBAL,
1749 ATU_MAC_ADDR45);
1750 }
1751
1752 return (0);
1753 }
1754
1755 static int
1756 e6000sw_atu_flush(device_t dev, e6000sw_softc_t *sc, int flag)
1757 {
1758 uint32_t reg;
1759
1760 if (flag == NO_OPERATION)
1761 return (0);
1762
1763 if (E6000SW_WAITREADY(sc, ATU_OPERATION, ATU_UNIT_BUSY)) {
1764 device_printf(dev, "ATU unit is busy, cannot access\n");
1765 return (EBUSY);
1766 }
1767 reg = e6000sw_readreg(sc, REG_GLOBAL, ATU_OPERATION);
1768 e6000sw_writereg(sc, REG_GLOBAL, ATU_OPERATION,
1769 (reg | ATU_UNIT_BUSY | flag));
1770 if (E6000SW_WAITREADY(sc, ATU_OPERATION, ATU_UNIT_BUSY))
1771 device_printf(dev, "Timeout while flushing ATU\n");
1772
1773 return (0);
1774 }
1775
1776 static int
1777 e6000sw_vtu_flush(e6000sw_softc_t *sc)
1778 {
1779
1780 if (E6000SW_WAITREADY(sc, VTU_OPERATION, VTU_BUSY)) {
1781 device_printf(sc->dev, "VTU unit is busy, cannot access\n");
1782 return (EBUSY);
1783 }
1784
1785 e6000sw_writereg(sc, REG_GLOBAL, VTU_OPERATION, VTU_FLUSH | VTU_BUSY);
1786 if (E6000SW_WAITREADY(sc, VTU_OPERATION, VTU_BUSY)) {
1787 device_printf(sc->dev, "Timeout while flushing VTU\n");
1788 return (ETIMEDOUT);
1789 }
1790
1791 return (0);
1792 }
1793
1794 static int
1795 e6000sw_vtu_update(e6000sw_softc_t *sc, int purge, int vid, int fid,
1796 int members, int untagged)
1797 {
1798 int i, op;
1799 uint32_t data[2];
1800
1801 if (E6000SW_WAITREADY(sc, VTU_OPERATION, VTU_BUSY)) {
1802 device_printf(sc->dev, "VTU unit is busy, cannot access\n");
1803 return (EBUSY);
1804 }
1805
1806 *data = (vid & VTU_VID_MASK);
1807 if (purge == 0)
1808 *data |= VTU_VID_VALID;
1809 e6000sw_writereg(sc, REG_GLOBAL, VTU_VID, *data);
1810
1811 if (purge == 0) {
1812 data[0] = 0;
1813 data[1] = 0;
1814 for (i = 0; i < sc->num_ports; i++) {
1815 if ((untagged & (1 << i)) != 0)
1816 data[i / VTU_PPREG(sc)] |=
1817 VTU_PORT_UNTAGGED << VTU_PORT(sc, i);
1818 else if ((members & (1 << i)) != 0)
1819 data[i / VTU_PPREG(sc)] |=
1820 VTU_PORT_TAGGED << VTU_PORT(sc, i);
1821 else
1822 data[i / VTU_PPREG(sc)] |=
1823 VTU_PORT_DISCARD << VTU_PORT(sc, i);
1824 }
1825 e6000sw_writereg(sc, REG_GLOBAL, VTU_DATA, data[0]);
1826 e6000sw_writereg(sc, REG_GLOBAL, VTU_DATA2, data[1]);
1827 e6000sw_writereg(sc, REG_GLOBAL, VTU_FID,
1828 fid & VTU_FID_MASK(sc));
1829 op = VTU_LOAD;
1830 } else
1831 op = VTU_PURGE;
1832
1833 e6000sw_writereg(sc, REG_GLOBAL, VTU_OPERATION, op | VTU_BUSY);
1834 if (E6000SW_WAITREADY(sc, VTU_OPERATION, VTU_BUSY)) {
1835 device_printf(sc->dev, "Timeout while flushing VTU\n");
1836 return (ETIMEDOUT);
1837 }
1838
1839 return (0);
1840 }
1841