1 // SPDX-License-Identifier: BSD-3-Clause-Clear
2 /*
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
5 */
6 #include <linux/skbuff.h>
7 #include <linux/ctype.h>
8 #include <net/mac80211.h>
9 #include <net/cfg80211.h>
10 #include <linux/completion.h>
11 #include <linux/if_ether.h>
12 #include <linux/types.h>
13 #include <linux/pci.h>
14 #include <linux/uuid.h>
15 #include <linux/time.h>
16 #include <linux/of.h>
17 #include <linux/cleanup.h>
18 #include "core.h"
19 #include "debugfs.h"
20 #include "debug.h"
21 #include "mac.h"
22 #include "hw.h"
23 #include "peer.h"
24 #include "p2p.h"
25 #include "testmode.h"
26
27 struct ath12k_wmi_svc_ready_parse {
28 bool wmi_svc_bitmap_done;
29 };
30
31 struct wmi_tlv_fw_stats_parse {
32 const struct wmi_stats_event *ev;
33 struct ath12k_fw_stats *stats;
34 const struct wmi_per_chain_rssi_stat_params *rssi;
35 int rssi_num;
36 bool chain_rssi_done;
37 };
38
39 struct ath12k_wmi_dma_ring_caps_parse {
40 struct ath12k_wmi_dma_ring_caps_params *dma_ring_caps;
41 u32 n_dma_ring_caps;
42 };
43
44 struct ath12k_wmi_service_ext_arg {
45 u32 default_conc_scan_config_bits;
46 u32 default_fw_config_bits;
47 struct ath12k_wmi_ppe_threshold_arg ppet;
48 u32 he_cap_info;
49 u32 mpdu_density;
50 u32 max_bssid_rx_filters;
51 u32 num_hw_modes;
52 u32 num_phy;
53 };
54
55 struct ath12k_wmi_svc_rdy_ext_parse {
56 struct ath12k_wmi_service_ext_arg arg;
57 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps;
58 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps;
59 u32 n_hw_mode_caps;
60 u32 tot_phy_id;
61 struct ath12k_wmi_hw_mode_cap_params pref_hw_mode_caps;
62 struct ath12k_wmi_mac_phy_caps_params *mac_phy_caps;
63 u32 n_mac_phy_caps;
64 const struct ath12k_wmi_soc_hal_reg_caps_params *soc_hal_reg_caps;
65 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_hal_reg_caps;
66 u32 n_ext_hal_reg_caps;
67 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse;
68 bool hw_mode_done;
69 bool mac_phy_done;
70 bool ext_hal_reg_done;
71 bool mac_phy_chainmask_combo_done;
72 bool mac_phy_chainmask_cap_done;
73 bool oem_dma_ring_cap_done;
74 bool dma_ring_cap_done;
75 };
76
77 struct ath12k_wmi_svc_rdy_ext2_arg {
78 u32 reg_db_version;
79 u32 hw_min_max_tx_power_2ghz;
80 u32 hw_min_max_tx_power_5ghz;
81 u32 chwidth_num_peer_caps;
82 u32 preamble_puncture_bw;
83 u32 max_user_per_ppdu_ofdma;
84 u32 max_user_per_ppdu_mumimo;
85 u32 target_cap_flags;
86 u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE];
87 u32 max_num_linkview_peers;
88 u32 max_num_msduq_supported_per_tid;
89 u32 default_num_msduq_supported_per_tid;
90 };
91
92 struct ath12k_wmi_svc_rdy_ext2_parse {
93 struct ath12k_wmi_svc_rdy_ext2_arg arg;
94 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse;
95 bool dma_ring_cap_done;
96 bool spectral_bin_scaling_done;
97 bool mac_phy_caps_ext_done;
98 bool hal_reg_caps_ext2_done;
99 bool scan_radio_caps_ext2_done;
100 bool twt_caps_done;
101 bool htt_msdu_idx_to_qtype_map_done;
102 bool dbs_or_sbs_cap_ext_done;
103 };
104
105 struct ath12k_wmi_rdy_parse {
106 u32 num_extra_mac_addr;
107 };
108
109 struct ath12k_wmi_dma_buf_release_arg {
110 struct ath12k_wmi_dma_buf_release_fixed_params fixed;
111 const struct ath12k_wmi_dma_buf_release_entry_params *buf_entry;
112 const struct ath12k_wmi_dma_buf_release_meta_data_params *meta_data;
113 u32 num_buf_entry;
114 u32 num_meta;
115 bool buf_entry_done;
116 bool meta_data_done;
117 };
118
119 struct ath12k_wmi_tlv_policy {
120 size_t min_len;
121 };
122
123 struct wmi_tlv_mgmt_rx_parse {
124 const struct ath12k_wmi_mgmt_rx_params *fixed;
125 const u8 *frame_buf;
126 bool frame_buf_done;
127 };
128
129 struct wmi_pdev_set_obss_bitmap_arg {
130 u32 tlv_tag;
131 u32 pdev_id;
132 u32 cmd_id;
133 const u32 *bitmap;
134 const char *label;
135 };
136
137 static const struct ath12k_wmi_tlv_policy ath12k_wmi_tlv_policies[] = {
138 [WMI_TAG_ARRAY_BYTE] = { .min_len = 0 },
139 [WMI_TAG_ARRAY_UINT32] = { .min_len = 0 },
140 [WMI_TAG_SERVICE_READY_EVENT] = {
141 .min_len = sizeof(struct wmi_service_ready_event) },
142 [WMI_TAG_SERVICE_READY_EXT_EVENT] = {
143 .min_len = sizeof(struct wmi_service_ready_ext_event) },
144 [WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS] = {
145 .min_len = sizeof(struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params) },
146 [WMI_TAG_SOC_HAL_REG_CAPABILITIES] = {
147 .min_len = sizeof(struct ath12k_wmi_soc_hal_reg_caps_params) },
148 [WMI_TAG_VDEV_START_RESPONSE_EVENT] = {
149 .min_len = sizeof(struct wmi_vdev_start_resp_event) },
150 [WMI_TAG_PEER_DELETE_RESP_EVENT] = {
151 .min_len = sizeof(struct wmi_peer_delete_resp_event) },
152 [WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT] = {
153 .min_len = sizeof(struct wmi_bcn_tx_status_event) },
154 [WMI_TAG_VDEV_STOPPED_EVENT] = {
155 .min_len = sizeof(struct wmi_vdev_stopped_event) },
156 [WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT] = {
157 .min_len = sizeof(struct wmi_reg_chan_list_cc_ext_event) },
158 [WMI_TAG_MGMT_RX_HDR] = {
159 .min_len = sizeof(struct ath12k_wmi_mgmt_rx_params) },
160 [WMI_TAG_MGMT_TX_COMPL_EVENT] = {
161 .min_len = sizeof(struct wmi_mgmt_tx_compl_event) },
162 [WMI_TAG_SCAN_EVENT] = {
163 .min_len = sizeof(struct wmi_scan_event) },
164 [WMI_TAG_PEER_STA_KICKOUT_EVENT] = {
165 .min_len = sizeof(struct wmi_peer_sta_kickout_event) },
166 [WMI_TAG_ROAM_EVENT] = {
167 .min_len = sizeof(struct wmi_roam_event) },
168 [WMI_TAG_CHAN_INFO_EVENT] = {
169 .min_len = sizeof(struct wmi_chan_info_event) },
170 [WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT] = {
171 .min_len = sizeof(struct wmi_pdev_bss_chan_info_event) },
172 [WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT] = {
173 .min_len = sizeof(struct wmi_vdev_install_key_compl_event) },
174 [WMI_TAG_READY_EVENT] = {
175 .min_len = sizeof(struct ath12k_wmi_ready_event_min_params) },
176 [WMI_TAG_SERVICE_AVAILABLE_EVENT] = {
177 .min_len = sizeof(struct wmi_service_available_event) },
178 [WMI_TAG_PEER_ASSOC_CONF_EVENT] = {
179 .min_len = sizeof(struct wmi_peer_assoc_conf_event) },
180 [WMI_TAG_RFKILL_EVENT] = {
181 .min_len = sizeof(struct wmi_rfkill_state_change_event) },
182 [WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT] = {
183 .min_len = sizeof(struct wmi_pdev_ctl_failsafe_chk_event) },
184 [WMI_TAG_HOST_SWFDA_EVENT] = {
185 .min_len = sizeof(struct wmi_fils_discovery_event) },
186 [WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT] = {
187 .min_len = sizeof(struct wmi_probe_resp_tx_status_event) },
188 [WMI_TAG_VDEV_DELETE_RESP_EVENT] = {
189 .min_len = sizeof(struct wmi_vdev_delete_resp_event) },
190 [WMI_TAG_TWT_ENABLE_COMPLETE_EVENT] = {
191 .min_len = sizeof(struct wmi_twt_enable_event) },
192 [WMI_TAG_TWT_DISABLE_COMPLETE_EVENT] = {
193 .min_len = sizeof(struct wmi_twt_disable_event) },
194 [WMI_TAG_P2P_NOA_INFO] = {
195 .min_len = sizeof(struct ath12k_wmi_p2p_noa_info) },
196 [WMI_TAG_P2P_NOA_EVENT] = {
197 .min_len = sizeof(struct wmi_p2p_noa_event) },
198 [WMI_TAG_11D_NEW_COUNTRY_EVENT] = {
199 .min_len = sizeof(struct wmi_11d_new_cc_event) },
200 [WMI_TAG_PER_CHAIN_RSSI_STATS] = {
201 .min_len = sizeof(struct wmi_per_chain_rssi_stat_params) },
202 [WMI_TAG_OBSS_COLOR_COLLISION_EVT] = {
203 .min_len = sizeof(struct wmi_obss_color_collision_event) },
204 };
205
ath12k_wmi_tlv_hdr(u32 cmd,u32 len)206 __le32 ath12k_wmi_tlv_hdr(u32 cmd, u32 len)
207 {
208 return le32_encode_bits(cmd, WMI_TLV_TAG) |
209 le32_encode_bits(len, WMI_TLV_LEN);
210 }
211
ath12k_wmi_tlv_cmd_hdr(u32 cmd,u32 len)212 static __le32 ath12k_wmi_tlv_cmd_hdr(u32 cmd, u32 len)
213 {
214 return ath12k_wmi_tlv_hdr(cmd, len - TLV_HDR_SIZE);
215 }
216
217 #define PRIMAP(_hw_mode_) \
218 [_hw_mode_] = _hw_mode_##_PRI
219
220 static const int ath12k_hw_mode_pri_map[] = {
221 PRIMAP(WMI_HOST_HW_MODE_SINGLE),
222 PRIMAP(WMI_HOST_HW_MODE_DBS),
223 PRIMAP(WMI_HOST_HW_MODE_SBS_PASSIVE),
224 PRIMAP(WMI_HOST_HW_MODE_SBS),
225 PRIMAP(WMI_HOST_HW_MODE_DBS_SBS),
226 PRIMAP(WMI_HOST_HW_MODE_DBS_OR_SBS),
227 /* keep last */
228 PRIMAP(WMI_HOST_HW_MODE_MAX),
229 };
230
231 static int
232 #if defined(__linux__)
ath12k_wmi_tlv_iter(struct ath12k_base * ab,const void * ptr,size_t len,int (* iter)(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data),void * data)233 ath12k_wmi_tlv_iter(struct ath12k_base *ab, const void *ptr, size_t len,
234 #elif defined(__FreeBSD__)
235 ath12k_wmi_tlv_iter(struct ath12k_base *ab, const u8 *ptr, size_t len,
236 #endif
237 int (*iter)(struct ath12k_base *ab, u16 tag, u16 len,
238 const void *ptr, void *data),
239 void *data)
240 {
241 #if defined(__linux__)
242 const void *begin = ptr;
243 #elif defined(__FreeBSD__)
244 const u8 *begin = ptr;
245 #endif
246 const struct wmi_tlv *tlv;
247 u16 tlv_tag, tlv_len;
248 int ret;
249
250 while (len > 0) {
251 if (len < sizeof(*tlv)) {
252 ath12k_err(ab, "wmi tlv parse failure at byte %zd (%zu bytes left, %zu expected)\n",
253 ptr - begin, len, sizeof(*tlv));
254 return -EINVAL;
255 }
256
257 #if defined(__linux__)
258 tlv = ptr;
259 #elif defined(__FreeBSD__)
260 tlv = (const void *)ptr;
261 #endif
262 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG);
263 tlv_len = le32_get_bits(tlv->header, WMI_TLV_LEN);
264 ptr += sizeof(*tlv);
265 len -= sizeof(*tlv);
266
267 if (tlv_len > len) {
268 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%zu bytes left, %u expected)\n",
269 tlv_tag, ptr - begin, len, tlv_len);
270 return -EINVAL;
271 }
272
273 if (tlv_tag < ARRAY_SIZE(ath12k_wmi_tlv_policies) &&
274 ath12k_wmi_tlv_policies[tlv_tag].min_len &&
275 ath12k_wmi_tlv_policies[tlv_tag].min_len > tlv_len) {
276 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%u bytes is less than min length %zu)\n",
277 tlv_tag, ptr - begin, tlv_len,
278 ath12k_wmi_tlv_policies[tlv_tag].min_len);
279 return -EINVAL;
280 }
281
282 ret = iter(ab, tlv_tag, tlv_len, ptr, data);
283 if (ret)
284 return ret;
285
286 ptr += tlv_len;
287 len -= tlv_len;
288 }
289
290 return 0;
291 }
292
ath12k_wmi_tlv_iter_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)293 static int ath12k_wmi_tlv_iter_parse(struct ath12k_base *ab, u16 tag, u16 len,
294 const void *ptr, void *data)
295 {
296 const void **tb = data;
297
298 if (tag < WMI_TAG_MAX)
299 tb[tag] = ptr;
300
301 return 0;
302 }
303
ath12k_wmi_tlv_parse(struct ath12k_base * ar,const void ** tb,const void * ptr,size_t len)304 static int ath12k_wmi_tlv_parse(struct ath12k_base *ar, const void **tb,
305 const void *ptr, size_t len)
306 {
307 return ath12k_wmi_tlv_iter(ar, ptr, len, ath12k_wmi_tlv_iter_parse,
308 (void *)tb);
309 }
310
311 static const void **
ath12k_wmi_tlv_parse_alloc(struct ath12k_base * ab,struct sk_buff * skb,gfp_t gfp)312 ath12k_wmi_tlv_parse_alloc(struct ath12k_base *ab,
313 struct sk_buff *skb, gfp_t gfp)
314 {
315 const void **tb;
316 int ret;
317
318 tb = kzalloc_objs(*tb, WMI_TAG_MAX, gfp);
319 if (!tb)
320 return ERR_PTR(-ENOMEM);
321
322 ret = ath12k_wmi_tlv_parse(ab, tb, skb->data, skb->len);
323 if (ret) {
324 kfree(tb);
325 return ERR_PTR(ret);
326 }
327
328 return tb;
329 }
330
ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev * wmi,struct sk_buff * skb,u32 cmd_id)331 static int ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb,
332 u32 cmd_id)
333 {
334 struct ath12k_skb_cb *skb_cb = ATH12K_SKB_CB(skb);
335 struct ath12k_base *ab = wmi->wmi_ab->ab;
336 struct wmi_cmd_hdr *cmd_hdr;
337 int ret;
338
339 if (!skb_push(skb, sizeof(struct wmi_cmd_hdr)))
340 return -ENOMEM;
341
342 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
343 cmd_hdr->cmd_id = le32_encode_bits(cmd_id, WMI_CMD_HDR_CMD_ID);
344
345 memset(skb_cb, 0, sizeof(*skb_cb));
346 ret = ath12k_htc_send(&ab->htc, wmi->eid, skb);
347
348 if (ret)
349 goto err_pull;
350
351 return 0;
352
353 err_pull:
354 skb_pull(skb, sizeof(struct wmi_cmd_hdr));
355 return ret;
356 }
357
ath12k_wmi_cmd_send(struct ath12k_wmi_pdev * wmi,struct sk_buff * skb,u32 cmd_id)358 int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb,
359 u32 cmd_id)
360 {
361 struct ath12k_wmi_base *wmi_ab = wmi->wmi_ab;
362 int ret = -EOPNOTSUPP;
363
364 might_sleep();
365
366 wait_event_timeout(wmi_ab->tx_credits_wq, ({
367 ret = ath12k_wmi_cmd_send_nowait(wmi, skb, cmd_id);
368
369 if (ret && test_bit(ATH12K_FLAG_CRASH_FLUSH, &wmi_ab->ab->dev_flags))
370 ret = -ESHUTDOWN;
371
372 (ret != -EAGAIN);
373 }), WMI_SEND_TIMEOUT_HZ);
374
375 if (ret == -EAGAIN)
376 ath12k_warn(wmi_ab->ab, "wmi command %d timeout\n", cmd_id);
377
378 return ret;
379 }
380
ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev * wmi_handle,const void * ptr,struct ath12k_wmi_service_ext_arg * arg)381 static int ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle,
382 const void *ptr,
383 struct ath12k_wmi_service_ext_arg *arg)
384 {
385 const struct wmi_service_ready_ext_event *ev = ptr;
386 int i;
387
388 if (!ev)
389 return -EINVAL;
390
391 /* Move this to host based bitmap */
392 arg->default_conc_scan_config_bits =
393 le32_to_cpu(ev->default_conc_scan_config_bits);
394 arg->default_fw_config_bits = le32_to_cpu(ev->default_fw_config_bits);
395 arg->he_cap_info = le32_to_cpu(ev->he_cap_info);
396 arg->mpdu_density = le32_to_cpu(ev->mpdu_density);
397 arg->max_bssid_rx_filters = le32_to_cpu(ev->max_bssid_rx_filters);
398 arg->ppet.numss_m1 = le32_to_cpu(ev->ppet.numss_m1);
399 arg->ppet.ru_bit_mask = le32_to_cpu(ev->ppet.ru_info);
400
401 for (i = 0; i < WMI_MAX_NUM_SS; i++)
402 arg->ppet.ppet16_ppet8_ru3_ru0[i] =
403 le32_to_cpu(ev->ppet.ppet16_ppet8_ru3_ru0[i]);
404
405 return 0;
406 }
407
408 static int
ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev * wmi_handle,struct ath12k_wmi_svc_rdy_ext_parse * svc,u8 hw_mode_id,u8 phy_id,struct ath12k_pdev * pdev)409 ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle,
410 struct ath12k_wmi_svc_rdy_ext_parse *svc,
411 u8 hw_mode_id, u8 phy_id,
412 struct ath12k_pdev *pdev)
413 {
414 const struct ath12k_wmi_mac_phy_caps_params *mac_caps;
415 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps = svc->hw_caps;
416 const struct ath12k_wmi_hw_mode_cap_params *wmi_hw_mode_caps = svc->hw_mode_caps;
417 const struct ath12k_wmi_mac_phy_caps_params *wmi_mac_phy_caps = svc->mac_phy_caps;
418 struct ath12k_base *ab = wmi_handle->wmi_ab->ab;
419 struct ath12k_band_cap *cap_band;
420 struct ath12k_pdev_cap *pdev_cap = &pdev->cap;
421 struct ath12k_fw_pdev *fw_pdev;
422 u32 supported_bands;
423 u32 phy_map;
424 u32 hw_idx, phy_idx = 0;
425 int i;
426
427 if (!hw_caps || !wmi_hw_mode_caps || !svc->soc_hal_reg_caps)
428 return -EINVAL;
429
430 for (hw_idx = 0; hw_idx < le32_to_cpu(hw_caps->num_hw_modes); hw_idx++) {
431 if (hw_mode_id == le32_to_cpu(wmi_hw_mode_caps[hw_idx].hw_mode_id))
432 break;
433
434 phy_map = le32_to_cpu(wmi_hw_mode_caps[hw_idx].phy_id_map);
435 phy_idx = fls(phy_map);
436 }
437
438 if (hw_idx == le32_to_cpu(hw_caps->num_hw_modes))
439 return -EINVAL;
440
441 phy_idx += phy_id;
442 if (phy_id >= le32_to_cpu(svc->soc_hal_reg_caps->num_phy))
443 return -EINVAL;
444
445 mac_caps = wmi_mac_phy_caps + phy_idx;
446 supported_bands = le32_to_cpu(mac_caps->supported_bands);
447
448 if (!(supported_bands & WMI_HOST_WLAN_2GHZ_CAP) &&
449 !(supported_bands & WMI_HOST_WLAN_5GHZ_CAP))
450 return -EINVAL;
451
452 pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps);
453 pdev->hw_link_id = ath12k_wmi_mac_phy_get_hw_link_id(mac_caps);
454 pdev_cap->supported_bands |= supported_bands;
455 pdev_cap->ampdu_density = le32_to_cpu(mac_caps->ampdu_density);
456
457 fw_pdev = &ab->fw_pdev[ab->fw_pdev_count];
458 fw_pdev->supported_bands = supported_bands;
459 fw_pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps);
460 fw_pdev->phy_id = le32_to_cpu(mac_caps->phy_id);
461 ab->fw_pdev_count++;
462
463 /* Take non-zero tx/rx chainmask. If tx/rx chainmask differs from
464 * band to band for a single radio, need to see how this should be
465 * handled.
466 */
467 if (supported_bands & WMI_HOST_WLAN_2GHZ_CAP) {
468 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_2g);
469 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_2g);
470 }
471
472 if (supported_bands & WMI_HOST_WLAN_5GHZ_CAP) {
473 pdev_cap->vht_cap = le32_to_cpu(mac_caps->vht_cap_info_5g);
474 pdev_cap->vht_mcs = le32_to_cpu(mac_caps->vht_supp_mcs_5g);
475 pdev_cap->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
476 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_5g);
477 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_5g);
478 pdev_cap->nss_ratio_enabled =
479 WMI_NSS_RATIO_EN_DIS_GET(mac_caps->nss_ratio);
480 pdev_cap->nss_ratio_info =
481 WMI_NSS_RATIO_INFO_GET(mac_caps->nss_ratio);
482 }
483
484 /* tx/rx chainmask reported from fw depends on the actual hw chains used,
485 * For example, for 4x4 capable macphys, first 4 chains can be used for first
486 * mac and the remaining 4 chains can be used for the second mac or vice-versa.
487 * In this case, tx/rx chainmask 0xf will be advertised for first mac and 0xf0
488 * will be advertised for second mac or vice-versa. Compute the shift value
489 * for tx/rx chainmask which will be used to advertise supported ht/vht rates to
490 * mac80211.
491 */
492 pdev_cap->tx_chain_mask_shift =
493 find_first_bit((unsigned long *)&pdev_cap->tx_chain_mask, 32);
494 pdev_cap->rx_chain_mask_shift =
495 find_first_bit((unsigned long *)&pdev_cap->rx_chain_mask, 32);
496
497 if (supported_bands & WMI_HOST_WLAN_2GHZ_CAP) {
498 cap_band = &pdev_cap->band[NL80211_BAND_2GHZ];
499 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id);
500 cap_band->max_bw_supported = le32_to_cpu(mac_caps->max_bw_supported_2g);
501 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_2g);
502 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_2g);
503 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_2g_ext);
504 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_2g);
505 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
506 cap_band->he_cap_phy_info[i] =
507 le32_to_cpu(mac_caps->he_cap_phy_info_2g[i]);
508
509 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet2g.numss_m1);
510 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet2g.ru_info);
511
512 for (i = 0; i < WMI_MAX_NUM_SS; i++)
513 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
514 le32_to_cpu(mac_caps->he_ppet2g.ppet16_ppet8_ru3_ru0[i]);
515 }
516
517 if (supported_bands & WMI_HOST_WLAN_5GHZ_CAP) {
518 cap_band = &pdev_cap->band[NL80211_BAND_5GHZ];
519 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id);
520 cap_band->max_bw_supported =
521 le32_to_cpu(mac_caps->max_bw_supported_5g);
522 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g);
523 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g);
524 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext);
525 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
526 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
527 cap_band->he_cap_phy_info[i] =
528 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]);
529
530 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1);
531 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info);
532
533 for (i = 0; i < WMI_MAX_NUM_SS; i++)
534 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
535 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]);
536
537 cap_band = &pdev_cap->band[NL80211_BAND_6GHZ];
538 cap_band->max_bw_supported =
539 le32_to_cpu(mac_caps->max_bw_supported_5g);
540 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g);
541 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g);
542 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext);
543 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
544 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
545 cap_band->he_cap_phy_info[i] =
546 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]);
547
548 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1);
549 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info);
550
551 for (i = 0; i < WMI_MAX_NUM_SS; i++)
552 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
553 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]);
554 }
555
556 return 0;
557 }
558
559 static int
ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev * wmi_handle,const struct ath12k_wmi_soc_hal_reg_caps_params * reg_caps,const struct ath12k_wmi_hal_reg_caps_ext_params * ext_caps,u8 phy_idx,struct ath12k_wmi_hal_reg_capabilities_ext_arg * param)560 ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev *wmi_handle,
561 const struct ath12k_wmi_soc_hal_reg_caps_params *reg_caps,
562 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_caps,
563 u8 phy_idx,
564 struct ath12k_wmi_hal_reg_capabilities_ext_arg *param)
565 {
566 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_reg_cap;
567
568 if (!reg_caps || !ext_caps)
569 return -EINVAL;
570
571 if (phy_idx >= le32_to_cpu(reg_caps->num_phy))
572 return -EINVAL;
573
574 ext_reg_cap = &ext_caps[phy_idx];
575
576 param->phy_id = le32_to_cpu(ext_reg_cap->phy_id);
577 param->eeprom_reg_domain = le32_to_cpu(ext_reg_cap->eeprom_reg_domain);
578 param->eeprom_reg_domain_ext =
579 le32_to_cpu(ext_reg_cap->eeprom_reg_domain_ext);
580 param->regcap1 = le32_to_cpu(ext_reg_cap->regcap1);
581 param->regcap2 = le32_to_cpu(ext_reg_cap->regcap2);
582 /* check if param->wireless_mode is needed */
583 param->low_2ghz_chan = le32_to_cpu(ext_reg_cap->low_2ghz_chan);
584 param->high_2ghz_chan = le32_to_cpu(ext_reg_cap->high_2ghz_chan);
585 param->low_5ghz_chan = le32_to_cpu(ext_reg_cap->low_5ghz_chan);
586 param->high_5ghz_chan = le32_to_cpu(ext_reg_cap->high_5ghz_chan);
587
588 return 0;
589 }
590
ath12k_pull_service_ready_tlv(struct ath12k_base * ab,const void * evt_buf,struct ath12k_wmi_target_cap_arg * cap)591 static int ath12k_pull_service_ready_tlv(struct ath12k_base *ab,
592 const void *evt_buf,
593 struct ath12k_wmi_target_cap_arg *cap)
594 {
595 const struct wmi_service_ready_event *ev = evt_buf;
596
597 if (!ev) {
598 ath12k_err(ab, "%s: failed by NULL param\n",
599 __func__);
600 return -EINVAL;
601 }
602
603 cap->phy_capability = le32_to_cpu(ev->phy_capability);
604 cap->max_frag_entry = le32_to_cpu(ev->max_frag_entry);
605 cap->num_rf_chains = le32_to_cpu(ev->num_rf_chains);
606 cap->ht_cap_info = le32_to_cpu(ev->ht_cap_info);
607 cap->vht_cap_info = le32_to_cpu(ev->vht_cap_info);
608 cap->vht_supp_mcs = le32_to_cpu(ev->vht_supp_mcs);
609 cap->hw_min_tx_power = le32_to_cpu(ev->hw_min_tx_power);
610 cap->hw_max_tx_power = le32_to_cpu(ev->hw_max_tx_power);
611 cap->sys_cap_info = le32_to_cpu(ev->sys_cap_info);
612 cap->min_pkt_size_enable = le32_to_cpu(ev->min_pkt_size_enable);
613 cap->max_bcn_ie_size = le32_to_cpu(ev->max_bcn_ie_size);
614 cap->max_num_scan_channels = le32_to_cpu(ev->max_num_scan_channels);
615 cap->max_supported_macs = le32_to_cpu(ev->max_supported_macs);
616 cap->wmi_fw_sub_feat_caps = le32_to_cpu(ev->wmi_fw_sub_feat_caps);
617 cap->txrx_chainmask = le32_to_cpu(ev->txrx_chainmask);
618 cap->default_dbs_hw_mode_index = le32_to_cpu(ev->default_dbs_hw_mode_index);
619 cap->num_msdu_desc = le32_to_cpu(ev->num_msdu_desc);
620
621 return 0;
622 }
623
624 /* Save the wmi_service_bitmap into a linear bitmap. The wmi_services in
625 * wmi_service ready event are advertised in b0-b3 (LSB 4-bits) of each
626 * 4-byte word.
627 */
ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev * wmi,const u32 * wmi_svc_bm)628 static void ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev *wmi,
629 const u32 *wmi_svc_bm)
630 {
631 int i, j;
632
633 for (i = 0, j = 0; i < WMI_SERVICE_BM_SIZE && j < WMI_MAX_SERVICE; i++) {
634 do {
635 if (wmi_svc_bm[i] & BIT(j % WMI_SERVICE_BITS_IN_SIZE32))
636 set_bit(j, wmi->wmi_ab->svc_map);
637 } while (++j % WMI_SERVICE_BITS_IN_SIZE32);
638 }
639 }
640
ath12k_wmi_svc_rdy_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)641 static int ath12k_wmi_svc_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len,
642 const void *ptr, void *data)
643 {
644 struct ath12k_wmi_svc_ready_parse *svc_ready = data;
645 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
646 u16 expect_len;
647
648 switch (tag) {
649 case WMI_TAG_SERVICE_READY_EVENT:
650 if (ath12k_pull_service_ready_tlv(ab, ptr, &ab->target_caps))
651 return -EINVAL;
652 break;
653
654 case WMI_TAG_ARRAY_UINT32:
655 if (!svc_ready->wmi_svc_bitmap_done) {
656 expect_len = WMI_SERVICE_BM_SIZE * sizeof(u32);
657 if (len < expect_len) {
658 ath12k_warn(ab, "invalid len %d for the tag 0x%x\n",
659 len, tag);
660 return -EINVAL;
661 }
662
663 ath12k_wmi_service_bitmap_copy(wmi_handle, ptr);
664
665 svc_ready->wmi_svc_bitmap_done = true;
666 }
667 break;
668 default:
669 break;
670 }
671
672 return 0;
673 }
674
ath12k_service_ready_event(struct ath12k_base * ab,struct sk_buff * skb)675 static int ath12k_service_ready_event(struct ath12k_base *ab, struct sk_buff *skb)
676 {
677 struct ath12k_wmi_svc_ready_parse svc_ready = { };
678 int ret;
679
680 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
681 ath12k_wmi_svc_rdy_parse,
682 &svc_ready);
683 if (ret) {
684 ath12k_warn(ab, "failed to parse tlv %d\n", ret);
685 return ret;
686 }
687
688 return 0;
689 }
690
ath12k_wmi_mgmt_get_freq(struct ath12k * ar,struct ieee80211_tx_info * info)691 static u32 ath12k_wmi_mgmt_get_freq(struct ath12k *ar,
692 struct ieee80211_tx_info *info)
693 {
694 struct ath12k_base *ab = ar->ab;
695 u32 freq = 0;
696
697 if (ab->hw_params->single_pdev_only &&
698 ar->scan.is_roc &&
699 (info->flags & IEEE80211_TX_CTL_TX_OFFCHAN))
700 freq = ar->scan.roc_freq;
701
702 return freq;
703 }
704
ath12k_wmi_alloc_skb(struct ath12k_wmi_base * wmi_ab,u32 len)705 struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_ab, u32 len)
706 {
707 struct sk_buff *skb;
708 struct ath12k_base *ab = wmi_ab->ab;
709 u32 round_len = roundup(len, 4);
710
711 skb = ath12k_htc_alloc_skb(ab, WMI_SKB_HEADROOM + round_len);
712 if (!skb)
713 return NULL;
714
715 skb_reserve(skb, WMI_SKB_HEADROOM);
716 if (!IS_ALIGNED((unsigned long)skb->data, 4))
717 ath12k_warn(ab, "unaligned WMI skb data\n");
718
719 skb_put(skb, round_len);
720 memset(skb->data, 0, round_len);
721
722 return skb;
723 }
724
ath12k_wmi_mgmt_send(struct ath12k_link_vif * arvif,u32 buf_id,struct sk_buff * frame)725 int ath12k_wmi_mgmt_send(struct ath12k_link_vif *arvif, u32 buf_id,
726 struct sk_buff *frame)
727 {
728 struct ath12k *ar = arvif->ar;
729 struct ath12k_wmi_pdev *wmi = ar->wmi;
730 struct wmi_mgmt_send_cmd *cmd;
731 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(frame);
732 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)frame->data;
733 struct ieee80211_vif *vif = ath12k_ahvif_to_vif(arvif->ahvif);
734 int cmd_len = sizeof(struct ath12k_wmi_mgmt_send_tx_params);
735 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)hdr;
736 struct ath12k_wmi_mlo_mgmt_send_params *ml_params;
737 struct ath12k_base *ab = ar->ab;
738 struct wmi_tlv *frame_tlv, *tlv;
739 struct ath12k_skb_cb *skb_cb;
740 u32 buf_len, buf_len_aligned;
741 u32 vdev_id = arvif->vdev_id;
742 bool link_agnostic = false;
743 struct sk_buff *skb;
744 int ret, len;
745 void *ptr;
746
747 buf_len = min_t(int, frame->len, WMI_MGMT_SEND_DOWNLD_LEN);
748
749 buf_len_aligned = roundup(buf_len, sizeof(u32));
750
751 len = sizeof(*cmd) + sizeof(*frame_tlv) + buf_len_aligned;
752
753 if (ieee80211_vif_is_mld(vif)) {
754 skb_cb = ATH12K_SKB_CB(frame);
755 if ((skb_cb->flags & ATH12K_SKB_MLO_STA) &&
756 ab->hw_params->hw_ops->is_frame_link_agnostic &&
757 ab->hw_params->hw_ops->is_frame_link_agnostic(arvif, mgmt)) {
758 len += cmd_len + TLV_HDR_SIZE + sizeof(*ml_params);
759 ath12k_generic_dbg(ATH12K_DBG_MGMT,
760 "Sending Mgmt Frame fc 0x%0x as link agnostic",
761 mgmt->frame_control);
762 link_agnostic = true;
763 }
764 }
765
766 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
767 if (!skb)
768 return -ENOMEM;
769
770 cmd = (struct wmi_mgmt_send_cmd *)skb->data;
771 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MGMT_TX_SEND_CMD,
772 sizeof(*cmd));
773 cmd->vdev_id = cpu_to_le32(vdev_id);
774 cmd->desc_id = cpu_to_le32(buf_id);
775 cmd->chanfreq = cpu_to_le32(ath12k_wmi_mgmt_get_freq(ar, info));
776 cmd->paddr_lo = cpu_to_le32(lower_32_bits(ATH12K_SKB_CB(frame)->paddr));
777 cmd->paddr_hi = cpu_to_le32(upper_32_bits(ATH12K_SKB_CB(frame)->paddr));
778 cmd->frame_len = cpu_to_le32(frame->len);
779 cmd->buf_len = cpu_to_le32(buf_len);
780 cmd->tx_params_valid = 0;
781
782 frame_tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd));
783 frame_tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, buf_len_aligned);
784
785 memcpy(frame_tlv->value, frame->data, buf_len);
786
787 if (!link_agnostic)
788 goto send;
789
790 ptr = skb->data + sizeof(*cmd) + sizeof(*frame_tlv) + buf_len_aligned;
791
792 tlv = ptr;
793
794 /* Tx params not used currently */
795 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TX_SEND_PARAMS, cmd_len);
796 ptr += cmd_len;
797
798 tlv = ptr;
799 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, sizeof(*ml_params));
800 ptr += TLV_HDR_SIZE;
801
802 ml_params = ptr;
803 ml_params->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_TX_SEND_PARAMS,
804 sizeof(*ml_params));
805
806 ml_params->hw_link_id = cpu_to_le32(WMI_MGMT_LINK_AGNOSTIC_ID);
807
808 send:
809 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MGMT_TX_SEND_CMDID);
810 if (ret) {
811 ath12k_warn(ar->ab,
812 "failed to submit WMI_MGMT_TX_SEND_CMDID cmd\n");
813 dev_kfree_skb(skb);
814 }
815
816 return ret;
817 }
818
ath12k_wmi_send_stats_request_cmd(struct ath12k * ar,u32 stats_id,u32 vdev_id,u32 pdev_id)819 int ath12k_wmi_send_stats_request_cmd(struct ath12k *ar, u32 stats_id,
820 u32 vdev_id, u32 pdev_id)
821 {
822 struct ath12k_wmi_pdev *wmi = ar->wmi;
823 struct wmi_request_stats_cmd *cmd;
824 struct sk_buff *skb;
825 int ret;
826
827 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
828 if (!skb)
829 return -ENOMEM;
830
831 cmd = (struct wmi_request_stats_cmd *)skb->data;
832 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REQUEST_STATS_CMD,
833 sizeof(*cmd));
834
835 cmd->stats_id = cpu_to_le32(stats_id);
836 cmd->vdev_id = cpu_to_le32(vdev_id);
837 cmd->pdev_id = cpu_to_le32(pdev_id);
838
839 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_REQUEST_STATS_CMDID);
840 if (ret) {
841 ath12k_warn(ar->ab, "failed to send WMI_REQUEST_STATS cmd\n");
842 dev_kfree_skb(skb);
843 }
844
845 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
846 "WMI request stats 0x%x vdev id %d pdev id %d\n",
847 stats_id, vdev_id, pdev_id);
848
849 return ret;
850 }
851
ath12k_wmi_vdev_create(struct ath12k * ar,u8 * macaddr,struct ath12k_wmi_vdev_create_arg * args)852 int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr,
853 struct ath12k_wmi_vdev_create_arg *args)
854 {
855 struct ath12k_wmi_pdev *wmi = ar->wmi;
856 struct wmi_vdev_create_cmd *cmd;
857 struct sk_buff *skb;
858 struct ath12k_wmi_vdev_txrx_streams_params *txrx_streams;
859 bool is_ml_vdev = is_valid_ether_addr(args->mld_addr);
860 struct wmi_vdev_create_mlo_params *ml_params;
861 struct wmi_tlv *tlv;
862 int ret, len;
863 #if defined(__linux__)
864 void *ptr;
865 #elif defined(__FreeBSD__)
866 u8 *ptr;
867 #endif
868
869 /* It can be optimized my sending tx/rx chain configuration
870 * only for supported bands instead of always sending it for
871 * both the bands.
872 */
873 len = sizeof(*cmd) + TLV_HDR_SIZE +
874 (WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams)) +
875 (is_ml_vdev ? TLV_HDR_SIZE + sizeof(*ml_params) : 0);
876
877 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
878 if (!skb)
879 return -ENOMEM;
880
881 cmd = (struct wmi_vdev_create_cmd *)skb->data;
882 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CREATE_CMD,
883 sizeof(*cmd));
884
885 cmd->vdev_id = cpu_to_le32(args->if_id);
886 cmd->vdev_type = cpu_to_le32(args->type);
887 cmd->vdev_subtype = cpu_to_le32(args->subtype);
888 cmd->num_cfg_txrx_streams = cpu_to_le32(WMI_NUM_SUPPORTED_BAND_MAX);
889 cmd->pdev_id = cpu_to_le32(args->pdev_id);
890 cmd->mbssid_flags = cpu_to_le32(args->mbssid_flags);
891 cmd->mbssid_tx_vdev_id = cpu_to_le32(args->mbssid_tx_vdev_id);
892 cmd->vdev_stats_id = cpu_to_le32(args->if_stats_id);
893 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
894
895 if (args->if_stats_id != ATH12K_INVAL_VDEV_STATS_ID)
896 cmd->vdev_stats_id_valid = cpu_to_le32(BIT(0));
897
898 ptr = skb->data + sizeof(*cmd);
899 len = WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams);
900
901 #if defined(__linux__)
902 tlv = ptr;
903 #elif defined(__FreeBSD__)
904 tlv = (void *)ptr;
905 #endif
906 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
907
908 ptr += TLV_HDR_SIZE;
909 #if defined(__linux__)
910 txrx_streams = ptr;
911 #elif defined(__FreeBSD__)
912 txrx_streams = (void *)ptr;
913 #endif
914 len = sizeof(*txrx_streams);
915 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS,
916 len);
917 txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_2G);
918 txrx_streams->supported_tx_streams =
919 cpu_to_le32(args->chains[NL80211_BAND_2GHZ].tx);
920 txrx_streams->supported_rx_streams =
921 cpu_to_le32(args->chains[NL80211_BAND_2GHZ].rx);
922
923 txrx_streams++;
924 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS,
925 len);
926 txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_5G);
927 txrx_streams->supported_tx_streams =
928 cpu_to_le32(args->chains[NL80211_BAND_5GHZ].tx);
929 txrx_streams->supported_rx_streams =
930 cpu_to_le32(args->chains[NL80211_BAND_5GHZ].rx);
931
932 ptr += WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams);
933
934 if (is_ml_vdev) {
935 tlv = ptr;
936 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
937 sizeof(*ml_params));
938 ptr += TLV_HDR_SIZE;
939 ml_params = ptr;
940
941 ml_params->tlv_header =
942 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_VDEV_CREATE_PARAMS,
943 sizeof(*ml_params));
944 ether_addr_copy(ml_params->mld_macaddr.addr, args->mld_addr);
945 }
946
947 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
948 "WMI vdev create: id %d type %d subtype %d macaddr %pM pdevid %d\n",
949 args->if_id, args->type, args->subtype,
950 macaddr, args->pdev_id);
951
952 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_CREATE_CMDID);
953 if (ret) {
954 ath12k_warn(ar->ab,
955 "failed to submit WMI_VDEV_CREATE_CMDID\n");
956 dev_kfree_skb(skb);
957 }
958
959 return ret;
960 }
961
ath12k_wmi_vdev_delete(struct ath12k * ar,u8 vdev_id)962 int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id)
963 {
964 struct ath12k_wmi_pdev *wmi = ar->wmi;
965 struct wmi_vdev_delete_cmd *cmd;
966 struct sk_buff *skb;
967 int ret;
968
969 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
970 if (!skb)
971 return -ENOMEM;
972
973 cmd = (struct wmi_vdev_delete_cmd *)skb->data;
974 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DELETE_CMD,
975 sizeof(*cmd));
976 cmd->vdev_id = cpu_to_le32(vdev_id);
977
978 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev delete id %d\n", vdev_id);
979
980 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DELETE_CMDID);
981 if (ret) {
982 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DELETE_CMDID\n");
983 dev_kfree_skb(skb);
984 }
985
986 return ret;
987 }
988
ath12k_wmi_vdev_stop(struct ath12k * ar,u8 vdev_id)989 int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id)
990 {
991 struct ath12k_wmi_pdev *wmi = ar->wmi;
992 struct wmi_vdev_stop_cmd *cmd;
993 struct sk_buff *skb;
994 int ret;
995
996 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
997 if (!skb)
998 return -ENOMEM;
999
1000 cmd = (struct wmi_vdev_stop_cmd *)skb->data;
1001
1002 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_STOP_CMD,
1003 sizeof(*cmd));
1004 cmd->vdev_id = cpu_to_le32(vdev_id);
1005
1006 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev stop id 0x%x\n", vdev_id);
1007
1008 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_STOP_CMDID);
1009 if (ret) {
1010 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_STOP cmd\n");
1011 dev_kfree_skb(skb);
1012 }
1013
1014 return ret;
1015 }
1016
ath12k_wmi_vdev_down(struct ath12k * ar,u8 vdev_id)1017 int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id)
1018 {
1019 struct ath12k_wmi_pdev *wmi = ar->wmi;
1020 struct wmi_vdev_down_cmd *cmd;
1021 struct sk_buff *skb;
1022 int ret;
1023
1024 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1025 if (!skb)
1026 return -ENOMEM;
1027
1028 cmd = (struct wmi_vdev_down_cmd *)skb->data;
1029
1030 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DOWN_CMD,
1031 sizeof(*cmd));
1032 cmd->vdev_id = cpu_to_le32(vdev_id);
1033
1034 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev down id 0x%x\n", vdev_id);
1035
1036 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DOWN_CMDID);
1037 if (ret) {
1038 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DOWN cmd\n");
1039 dev_kfree_skb(skb);
1040 }
1041
1042 return ret;
1043 }
1044
ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params * chan,struct wmi_vdev_start_req_arg * arg)1045 static void ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params *chan,
1046 struct wmi_vdev_start_req_arg *arg)
1047 {
1048 u32 center_freq1 = arg->band_center_freq1;
1049
1050 memset(chan, 0, sizeof(*chan));
1051
1052 chan->mhz = cpu_to_le32(arg->freq);
1053 chan->band_center_freq1 = cpu_to_le32(center_freq1);
1054 if (arg->mode == MODE_11BE_EHT320) {
1055 if (arg->freq > center_freq1)
1056 chan->band_center_freq1 = cpu_to_le32(center_freq1 + 80);
1057 else
1058 chan->band_center_freq1 = cpu_to_le32(center_freq1 - 80);
1059
1060 chan->band_center_freq2 = cpu_to_le32(center_freq1);
1061
1062 } else if (arg->mode == MODE_11BE_EHT160 ||
1063 arg->mode == MODE_11AX_HE160) {
1064 if (arg->freq > center_freq1)
1065 chan->band_center_freq1 = cpu_to_le32(center_freq1 + 40);
1066 else
1067 chan->band_center_freq1 = cpu_to_le32(center_freq1 - 40);
1068
1069 chan->band_center_freq2 = cpu_to_le32(center_freq1);
1070 } else {
1071 chan->band_center_freq2 = 0;
1072 }
1073
1074 chan->info |= le32_encode_bits(arg->mode, WMI_CHAN_INFO_MODE);
1075 if (arg->passive)
1076 chan->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE);
1077 if (arg->allow_ibss)
1078 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ADHOC_ALLOWED);
1079 if (arg->allow_ht)
1080 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT);
1081 if (arg->allow_vht)
1082 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT);
1083 if (arg->allow_he)
1084 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE);
1085 if (arg->ht40plus)
1086 chan->info |= cpu_to_le32(WMI_CHAN_INFO_HT40_PLUS);
1087 if (arg->chan_radar)
1088 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS);
1089 if (arg->freq2_radar)
1090 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS_FREQ2);
1091
1092 chan->reg_info_1 = le32_encode_bits(arg->max_power,
1093 WMI_CHAN_REG_INFO1_MAX_PWR) |
1094 le32_encode_bits(arg->max_reg_power,
1095 WMI_CHAN_REG_INFO1_MAX_REG_PWR);
1096
1097 chan->reg_info_2 = le32_encode_bits(arg->max_antenna_gain,
1098 WMI_CHAN_REG_INFO2_ANT_MAX) |
1099 le32_encode_bits(arg->max_power, WMI_CHAN_REG_INFO2_MAX_TX_PWR);
1100 }
1101
ath12k_wmi_vdev_start(struct ath12k * ar,struct wmi_vdev_start_req_arg * arg,bool restart)1102 int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg,
1103 bool restart)
1104 {
1105 struct wmi_vdev_start_mlo_params *ml_params;
1106 struct wmi_partner_link_info *partner_info;
1107 struct ath12k_wmi_pdev *wmi = ar->wmi;
1108 struct wmi_vdev_start_request_cmd *cmd;
1109 struct sk_buff *skb;
1110 struct ath12k_wmi_channel_params *chan;
1111 struct wmi_tlv *tlv;
1112 #if defined(__linux__)
1113 void *ptr;
1114 #elif defined(__FreeBSD__)
1115 u8 *ptr;
1116 #endif
1117 int ret, len, i, ml_arg_size = 0;
1118
1119 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
1120 return -EINVAL;
1121
1122 len = sizeof(*cmd) + sizeof(*chan) + TLV_HDR_SIZE;
1123
1124 if (!restart && arg->ml.enabled) {
1125 ml_arg_size = TLV_HDR_SIZE + sizeof(*ml_params) +
1126 TLV_HDR_SIZE + (arg->ml.num_partner_links *
1127 sizeof(*partner_info));
1128 len += ml_arg_size;
1129 }
1130 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1131 if (!skb)
1132 return -ENOMEM;
1133
1134 cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
1135 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_START_REQUEST_CMD,
1136 sizeof(*cmd));
1137 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1138 cmd->beacon_interval = cpu_to_le32(arg->bcn_intval);
1139 cmd->bcn_tx_rate = cpu_to_le32(arg->bcn_tx_rate);
1140 cmd->dtim_period = cpu_to_le32(arg->dtim_period);
1141 cmd->num_noa_descriptors = cpu_to_le32(arg->num_noa_descriptors);
1142 cmd->preferred_rx_streams = cpu_to_le32(arg->pref_rx_streams);
1143 cmd->preferred_tx_streams = cpu_to_le32(arg->pref_tx_streams);
1144 cmd->cac_duration_ms = cpu_to_le32(arg->cac_duration_ms);
1145 cmd->regdomain = cpu_to_le32(arg->regdomain);
1146 cmd->he_ops = cpu_to_le32(arg->he_ops);
1147 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap);
1148 cmd->mbssid_flags = cpu_to_le32(arg->mbssid_flags);
1149 cmd->mbssid_tx_vdev_id = cpu_to_le32(arg->mbssid_tx_vdev_id);
1150
1151 if (!restart) {
1152 if (arg->ssid) {
1153 cmd->ssid.ssid_len = cpu_to_le32(arg->ssid_len);
1154 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
1155 }
1156 if (arg->hidden_ssid)
1157 cmd->flags |= cpu_to_le32(WMI_VDEV_START_HIDDEN_SSID);
1158 if (arg->pmf_enabled)
1159 cmd->flags |= cpu_to_le32(WMI_VDEV_START_PMF_ENABLED);
1160 }
1161
1162 cmd->flags |= cpu_to_le32(WMI_VDEV_START_LDPC_RX_ENABLED);
1163
1164 ptr = skb->data + sizeof(*cmd);
1165 #if defined(__linux__)
1166 chan = ptr;
1167 #elif defined(__FreeBSD__)
1168 chan = (void *)ptr;
1169 #endif
1170
1171 ath12k_wmi_put_wmi_channel(chan, arg);
1172
1173 chan->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL,
1174 sizeof(*chan));
1175 ptr += sizeof(*chan);
1176
1177 #if defined(__linux__)
1178 tlv = ptr;
1179 #elif defined(__FreeBSD__)
1180 tlv = (void *)ptr;
1181 #endif
1182 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
1183
1184 /* Note: This is a nested TLV containing:
1185 * [wmi_tlv][ath12k_wmi_p2p_noa_descriptor][wmi_tlv]..
1186 */
1187
1188 ptr += sizeof(*tlv);
1189
1190 if (ml_arg_size) {
1191 tlv = ptr;
1192 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
1193 sizeof(*ml_params));
1194 ptr += TLV_HDR_SIZE;
1195
1196 ml_params = ptr;
1197
1198 ml_params->tlv_header =
1199 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_VDEV_START_PARAMS,
1200 sizeof(*ml_params));
1201
1202 ml_params->flags = le32_encode_bits(arg->ml.enabled,
1203 ATH12K_WMI_FLAG_MLO_ENABLED) |
1204 le32_encode_bits(arg->ml.assoc_link,
1205 ATH12K_WMI_FLAG_MLO_ASSOC_LINK) |
1206 le32_encode_bits(arg->ml.mcast_link,
1207 ATH12K_WMI_FLAG_MLO_MCAST_VDEV) |
1208 le32_encode_bits(arg->ml.link_add,
1209 ATH12K_WMI_FLAG_MLO_LINK_ADD);
1210
1211 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %d start ml flags 0x%x\n",
1212 arg->vdev_id, ml_params->flags);
1213
1214 ptr += sizeof(*ml_params);
1215
1216 tlv = ptr;
1217 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
1218 arg->ml.num_partner_links *
1219 sizeof(*partner_info));
1220 ptr += TLV_HDR_SIZE;
1221
1222 partner_info = ptr;
1223
1224 for (i = 0; i < arg->ml.num_partner_links; i++) {
1225 partner_info->tlv_header =
1226 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PARTNER_LINK_PARAMS,
1227 sizeof(*partner_info));
1228 partner_info->vdev_id =
1229 cpu_to_le32(arg->ml.partner_info[i].vdev_id);
1230 partner_info->hw_link_id =
1231 cpu_to_le32(arg->ml.partner_info[i].hw_link_id);
1232 ether_addr_copy(partner_info->vdev_addr.addr,
1233 arg->ml.partner_info[i].addr);
1234
1235 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "partner vdev %d hw_link_id %d macaddr%pM\n",
1236 partner_info->vdev_id, partner_info->hw_link_id,
1237 partner_info->vdev_addr.addr);
1238
1239 partner_info++;
1240 }
1241
1242 ptr = partner_info;
1243 }
1244
1245 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %s id 0x%x freq 0x%x mode 0x%x\n",
1246 restart ? "restart" : "start", arg->vdev_id,
1247 arg->freq, arg->mode);
1248
1249 if (restart)
1250 ret = ath12k_wmi_cmd_send(wmi, skb,
1251 WMI_VDEV_RESTART_REQUEST_CMDID);
1252 else
1253 ret = ath12k_wmi_cmd_send(wmi, skb,
1254 WMI_VDEV_START_REQUEST_CMDID);
1255 if (ret) {
1256 ath12k_warn(ar->ab, "failed to submit vdev_%s cmd\n",
1257 restart ? "restart" : "start");
1258 dev_kfree_skb(skb);
1259 }
1260
1261 return ret;
1262 }
1263
ath12k_wmi_vdev_up(struct ath12k * ar,struct ath12k_wmi_vdev_up_params * params)1264 int ath12k_wmi_vdev_up(struct ath12k *ar, struct ath12k_wmi_vdev_up_params *params)
1265 {
1266 struct ath12k_wmi_pdev *wmi = ar->wmi;
1267 struct wmi_vdev_up_cmd *cmd;
1268 struct sk_buff *skb;
1269 int ret;
1270
1271 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1272 if (!skb)
1273 return -ENOMEM;
1274
1275 cmd = (struct wmi_vdev_up_cmd *)skb->data;
1276
1277 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_UP_CMD,
1278 sizeof(*cmd));
1279 cmd->vdev_id = cpu_to_le32(params->vdev_id);
1280 cmd->vdev_assoc_id = cpu_to_le32(params->aid);
1281
1282 ether_addr_copy(cmd->vdev_bssid.addr, params->bssid);
1283
1284 if (params->tx_bssid) {
1285 ether_addr_copy(cmd->tx_vdev_bssid.addr, params->tx_bssid);
1286 cmd->nontx_profile_idx = cpu_to_le32(params->nontx_profile_idx);
1287 cmd->nontx_profile_cnt = cpu_to_le32(params->nontx_profile_cnt);
1288 }
1289
1290 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1291 "WMI mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
1292 params->vdev_id, params->aid, params->bssid);
1293
1294 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_UP_CMDID);
1295 if (ret) {
1296 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_UP cmd\n");
1297 dev_kfree_skb(skb);
1298 }
1299
1300 return ret;
1301 }
1302
ath12k_wmi_send_peer_create_cmd(struct ath12k * ar,struct ath12k_wmi_peer_create_arg * arg)1303 int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar,
1304 struct ath12k_wmi_peer_create_arg *arg)
1305 {
1306 struct ath12k_wmi_pdev *wmi = ar->wmi;
1307 struct wmi_peer_create_cmd *cmd;
1308 struct sk_buff *skb;
1309 int ret, len;
1310 struct wmi_peer_create_mlo_params *ml_param;
1311 void *ptr;
1312 struct wmi_tlv *tlv;
1313
1314 len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*ml_param);
1315
1316 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1317 if (!skb)
1318 return -ENOMEM;
1319
1320 cmd = (struct wmi_peer_create_cmd *)skb->data;
1321 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_CREATE_CMD,
1322 sizeof(*cmd));
1323
1324 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_addr);
1325 cmd->peer_type = cpu_to_le32(arg->peer_type);
1326 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1327
1328 ptr = skb->data + sizeof(*cmd);
1329 tlv = ptr;
1330 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
1331 sizeof(*ml_param));
1332 ptr += TLV_HDR_SIZE;
1333 ml_param = ptr;
1334 ml_param->tlv_header =
1335 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PEER_CREATE_PARAMS,
1336 sizeof(*ml_param));
1337 if (arg->ml_enabled)
1338 ml_param->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED);
1339
1340 ptr += sizeof(*ml_param);
1341
1342 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1343 "WMI peer create vdev_id %d peer_addr %pM ml_flags 0x%x\n",
1344 arg->vdev_id, arg->peer_addr, ml_param->flags);
1345
1346 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_CREATE_CMDID);
1347 if (ret) {
1348 ath12k_warn(ar->ab, "failed to submit WMI_PEER_CREATE cmd\n");
1349 dev_kfree_skb(skb);
1350 }
1351
1352 return ret;
1353 }
1354
ath12k_wmi_send_peer_delete_cmd(struct ath12k * ar,const u8 * peer_addr,u8 vdev_id)1355 int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar,
1356 const u8 *peer_addr, u8 vdev_id)
1357 {
1358 struct ath12k_wmi_pdev *wmi = ar->wmi;
1359 struct wmi_peer_delete_cmd *cmd;
1360 struct sk_buff *skb;
1361 int ret;
1362
1363 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1364 if (!skb)
1365 return -ENOMEM;
1366
1367 cmd = (struct wmi_peer_delete_cmd *)skb->data;
1368 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_DELETE_CMD,
1369 sizeof(*cmd));
1370
1371 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1372 cmd->vdev_id = cpu_to_le32(vdev_id);
1373
1374 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1375 "WMI peer delete vdev_id %d peer_addr %pM\n",
1376 vdev_id, peer_addr);
1377
1378 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_DELETE_CMDID);
1379 if (ret) {
1380 ath12k_warn(ar->ab, "failed to send WMI_PEER_DELETE cmd\n");
1381 dev_kfree_skb(skb);
1382 }
1383
1384 return ret;
1385 }
1386
ath12k_wmi_send_pdev_set_regdomain(struct ath12k * ar,struct ath12k_wmi_pdev_set_regdomain_arg * arg)1387 int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar,
1388 struct ath12k_wmi_pdev_set_regdomain_arg *arg)
1389 {
1390 struct ath12k_wmi_pdev *wmi = ar->wmi;
1391 struct wmi_pdev_set_regdomain_cmd *cmd;
1392 struct sk_buff *skb;
1393 int ret;
1394
1395 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1396 if (!skb)
1397 return -ENOMEM;
1398
1399 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
1400 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_REGDOMAIN_CMD,
1401 sizeof(*cmd));
1402
1403 cmd->reg_domain = cpu_to_le32(arg->current_rd_in_use);
1404 cmd->reg_domain_2g = cpu_to_le32(arg->current_rd_2g);
1405 cmd->reg_domain_5g = cpu_to_le32(arg->current_rd_5g);
1406 cmd->conformance_test_limit_2g = cpu_to_le32(arg->ctl_2g);
1407 cmd->conformance_test_limit_5g = cpu_to_le32(arg->ctl_5g);
1408 cmd->dfs_domain = cpu_to_le32(arg->dfs_domain);
1409 cmd->pdev_id = cpu_to_le32(arg->pdev_id);
1410
1411 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1412 "WMI pdev regd rd %d rd2g %d rd5g %d domain %d pdev id %d\n",
1413 arg->current_rd_in_use, arg->current_rd_2g,
1414 arg->current_rd_5g, arg->dfs_domain, arg->pdev_id);
1415
1416 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_REGDOMAIN_CMDID);
1417 if (ret) {
1418 ath12k_warn(ar->ab,
1419 "failed to send WMI_PDEV_SET_REGDOMAIN cmd\n");
1420 dev_kfree_skb(skb);
1421 }
1422
1423 return ret;
1424 }
1425
ath12k_wmi_set_peer_param(struct ath12k * ar,const u8 * peer_addr,u32 vdev_id,u32 param_id,u32 param_val)1426 int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr,
1427 u32 vdev_id, u32 param_id, u32 param_val)
1428 {
1429 struct ath12k_wmi_pdev *wmi = ar->wmi;
1430 struct wmi_peer_set_param_cmd *cmd;
1431 struct sk_buff *skb;
1432 int ret;
1433
1434 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1435 if (!skb)
1436 return -ENOMEM;
1437
1438 cmd = (struct wmi_peer_set_param_cmd *)skb->data;
1439 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_SET_PARAM_CMD,
1440 sizeof(*cmd));
1441 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1442 cmd->vdev_id = cpu_to_le32(vdev_id);
1443 cmd->param_id = cpu_to_le32(param_id);
1444 cmd->param_value = cpu_to_le32(param_val);
1445
1446 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1447 "WMI vdev %d peer 0x%pM set param %d value %d\n",
1448 vdev_id, peer_addr, param_id, param_val);
1449
1450 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_SET_PARAM_CMDID);
1451 if (ret) {
1452 ath12k_warn(ar->ab, "failed to send WMI_PEER_SET_PARAM cmd\n");
1453 dev_kfree_skb(skb);
1454 }
1455
1456 return ret;
1457 }
1458
ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k * ar,u8 peer_addr[ETH_ALEN],u32 peer_tid_bitmap,u8 vdev_id)1459 int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar,
1460 u8 peer_addr[ETH_ALEN],
1461 u32 peer_tid_bitmap,
1462 u8 vdev_id)
1463 {
1464 struct ath12k_wmi_pdev *wmi = ar->wmi;
1465 struct wmi_peer_flush_tids_cmd *cmd;
1466 struct sk_buff *skb;
1467 int ret;
1468
1469 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1470 if (!skb)
1471 return -ENOMEM;
1472
1473 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
1474 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_FLUSH_TIDS_CMD,
1475 sizeof(*cmd));
1476
1477 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1478 cmd->peer_tid_bitmap = cpu_to_le32(peer_tid_bitmap);
1479 cmd->vdev_id = cpu_to_le32(vdev_id);
1480
1481 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1482 "WMI peer flush vdev_id %d peer_addr %pM tids %08x\n",
1483 vdev_id, peer_addr, peer_tid_bitmap);
1484
1485 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_FLUSH_TIDS_CMDID);
1486 if (ret) {
1487 ath12k_warn(ar->ab,
1488 "failed to send WMI_PEER_FLUSH_TIDS cmd\n");
1489 dev_kfree_skb(skb);
1490 }
1491
1492 return ret;
1493 }
1494
ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k * ar,int vdev_id,const u8 * addr,dma_addr_t paddr,u8 tid,u8 ba_window_size_valid,u32 ba_window_size)1495 int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar,
1496 int vdev_id, const u8 *addr,
1497 dma_addr_t paddr, u8 tid,
1498 u8 ba_window_size_valid,
1499 u32 ba_window_size)
1500 {
1501 struct wmi_peer_reorder_queue_setup_cmd *cmd;
1502 struct sk_buff *skb;
1503 int ret;
1504
1505 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
1506 if (!skb)
1507 return -ENOMEM;
1508
1509 cmd = (struct wmi_peer_reorder_queue_setup_cmd *)skb->data;
1510 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_SETUP_CMD,
1511 sizeof(*cmd));
1512
1513 ether_addr_copy(cmd->peer_macaddr.addr, addr);
1514 cmd->vdev_id = cpu_to_le32(vdev_id);
1515 cmd->tid = cpu_to_le32(tid);
1516 cmd->queue_ptr_lo = cpu_to_le32(lower_32_bits(paddr));
1517 cmd->queue_ptr_hi = cpu_to_le32(upper_32_bits(paddr));
1518 cmd->queue_no = cpu_to_le32(tid);
1519 cmd->ba_window_size_valid = cpu_to_le32(ba_window_size_valid);
1520 cmd->ba_window_size = cpu_to_le32(ba_window_size);
1521
1522 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1523 "wmi rx reorder queue setup addr %pM vdev_id %d tid %d\n",
1524 addr, vdev_id, tid);
1525
1526 ret = ath12k_wmi_cmd_send(ar->wmi, skb,
1527 WMI_PEER_REORDER_QUEUE_SETUP_CMDID);
1528 if (ret) {
1529 ath12k_warn(ar->ab,
1530 "failed to send WMI_PEER_REORDER_QUEUE_SETUP\n");
1531 dev_kfree_skb(skb);
1532 }
1533
1534 return ret;
1535 }
1536
1537 int
ath12k_wmi_rx_reord_queue_remove(struct ath12k * ar,struct ath12k_wmi_rx_reorder_queue_remove_arg * arg)1538 ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar,
1539 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg)
1540 {
1541 struct ath12k_wmi_pdev *wmi = ar->wmi;
1542 struct wmi_peer_reorder_queue_remove_cmd *cmd;
1543 struct sk_buff *skb;
1544 int ret;
1545
1546 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1547 if (!skb)
1548 return -ENOMEM;
1549
1550 cmd = (struct wmi_peer_reorder_queue_remove_cmd *)skb->data;
1551 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_REMOVE_CMD,
1552 sizeof(*cmd));
1553
1554 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_macaddr);
1555 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1556 cmd->tid_mask = cpu_to_le32(arg->peer_tid_bitmap);
1557
1558 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1559 "%s: peer_macaddr %pM vdev_id %d, tid_map %d", __func__,
1560 arg->peer_macaddr, arg->vdev_id, arg->peer_tid_bitmap);
1561
1562 ret = ath12k_wmi_cmd_send(wmi, skb,
1563 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID);
1564 if (ret) {
1565 ath12k_warn(ar->ab,
1566 "failed to send WMI_PEER_REORDER_QUEUE_REMOVE_CMDID");
1567 dev_kfree_skb(skb);
1568 }
1569
1570 return ret;
1571 }
1572
ath12k_wmi_pdev_set_param(struct ath12k * ar,u32 param_id,u32 param_value,u8 pdev_id)1573 int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id,
1574 u32 param_value, u8 pdev_id)
1575 {
1576 struct ath12k_wmi_pdev *wmi = ar->wmi;
1577 struct wmi_pdev_set_param_cmd *cmd;
1578 struct sk_buff *skb;
1579 int ret;
1580
1581 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1582 if (!skb)
1583 return -ENOMEM;
1584
1585 cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
1586 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_PARAM_CMD,
1587 sizeof(*cmd));
1588 cmd->pdev_id = cpu_to_le32(pdev_id);
1589 cmd->param_id = cpu_to_le32(param_id);
1590 cmd->param_value = cpu_to_le32(param_value);
1591
1592 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1593 "WMI pdev set param %d pdev id %d value %d\n",
1594 param_id, pdev_id, param_value);
1595
1596 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_PARAM_CMDID);
1597 if (ret) {
1598 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n");
1599 dev_kfree_skb(skb);
1600 }
1601
1602 return ret;
1603 }
1604
ath12k_wmi_pdev_set_ps_mode(struct ath12k * ar,int vdev_id,u32 enable)1605 int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable)
1606 {
1607 struct ath12k_wmi_pdev *wmi = ar->wmi;
1608 struct wmi_pdev_set_ps_mode_cmd *cmd;
1609 struct sk_buff *skb;
1610 int ret;
1611
1612 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1613 if (!skb)
1614 return -ENOMEM;
1615
1616 cmd = (struct wmi_pdev_set_ps_mode_cmd *)skb->data;
1617 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_MODE_CMD,
1618 sizeof(*cmd));
1619 cmd->vdev_id = cpu_to_le32(vdev_id);
1620 cmd->sta_ps_mode = cpu_to_le32(enable);
1621
1622 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1623 "WMI vdev set psmode %d vdev id %d\n",
1624 enable, vdev_id);
1625
1626 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_MODE_CMDID);
1627 if (ret) {
1628 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n");
1629 dev_kfree_skb(skb);
1630 }
1631
1632 return ret;
1633 }
1634
ath12k_wmi_pdev_suspend(struct ath12k * ar,u32 suspend_opt,u32 pdev_id)1635 int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt,
1636 u32 pdev_id)
1637 {
1638 struct ath12k_wmi_pdev *wmi = ar->wmi;
1639 struct wmi_pdev_suspend_cmd *cmd;
1640 struct sk_buff *skb;
1641 int ret;
1642
1643 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1644 if (!skb)
1645 return -ENOMEM;
1646
1647 cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
1648
1649 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SUSPEND_CMD,
1650 sizeof(*cmd));
1651
1652 cmd->suspend_opt = cpu_to_le32(suspend_opt);
1653 cmd->pdev_id = cpu_to_le32(pdev_id);
1654
1655 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1656 "WMI pdev suspend pdev_id %d\n", pdev_id);
1657
1658 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SUSPEND_CMDID);
1659 if (ret) {
1660 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SUSPEND cmd\n");
1661 dev_kfree_skb(skb);
1662 }
1663
1664 return ret;
1665 }
1666
ath12k_wmi_pdev_resume(struct ath12k * ar,u32 pdev_id)1667 int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id)
1668 {
1669 struct ath12k_wmi_pdev *wmi = ar->wmi;
1670 struct wmi_pdev_resume_cmd *cmd;
1671 struct sk_buff *skb;
1672 int ret;
1673
1674 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1675 if (!skb)
1676 return -ENOMEM;
1677
1678 cmd = (struct wmi_pdev_resume_cmd *)skb->data;
1679
1680 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_RESUME_CMD,
1681 sizeof(*cmd));
1682 cmd->pdev_id = cpu_to_le32(pdev_id);
1683
1684 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1685 "WMI pdev resume pdev id %d\n", pdev_id);
1686
1687 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_RESUME_CMDID);
1688 if (ret) {
1689 ath12k_warn(ar->ab, "failed to send WMI_PDEV_RESUME cmd\n");
1690 dev_kfree_skb(skb);
1691 }
1692
1693 return ret;
1694 }
1695
1696 /* TODO FW Support for the cmd is not available yet.
1697 * Can be tested once the command and corresponding
1698 * event is implemented in FW
1699 */
ath12k_wmi_pdev_bss_chan_info_request(struct ath12k * ar,enum wmi_bss_chan_info_req_type type)1700 int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar,
1701 enum wmi_bss_chan_info_req_type type)
1702 {
1703 struct ath12k_wmi_pdev *wmi = ar->wmi;
1704 struct wmi_pdev_bss_chan_info_req_cmd *cmd;
1705 struct sk_buff *skb;
1706 int ret;
1707
1708 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1709 if (!skb)
1710 return -ENOMEM;
1711
1712 cmd = (struct wmi_pdev_bss_chan_info_req_cmd *)skb->data;
1713
1714 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST,
1715 sizeof(*cmd));
1716 cmd->req_type = cpu_to_le32(type);
1717 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
1718
1719 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1720 "WMI bss chan info req type %d\n", type);
1721
1722 ret = ath12k_wmi_cmd_send(wmi, skb,
1723 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID);
1724 if (ret) {
1725 ath12k_warn(ar->ab,
1726 "failed to send WMI_PDEV_BSS_CHAN_INFO_REQUEST cmd\n");
1727 dev_kfree_skb(skb);
1728 }
1729
1730 return ret;
1731 }
1732
ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k * ar,u8 * peer_addr,struct ath12k_wmi_ap_ps_arg * arg)1733 int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr,
1734 struct ath12k_wmi_ap_ps_arg *arg)
1735 {
1736 struct ath12k_wmi_pdev *wmi = ar->wmi;
1737 struct wmi_ap_ps_peer_cmd *cmd;
1738 struct sk_buff *skb;
1739 int ret;
1740
1741 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1742 if (!skb)
1743 return -ENOMEM;
1744
1745 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
1746 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_AP_PS_PEER_CMD,
1747 sizeof(*cmd));
1748
1749 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1750 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1751 cmd->param = cpu_to_le32(arg->param);
1752 cmd->value = cpu_to_le32(arg->value);
1753
1754 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1755 "WMI set ap ps vdev id %d peer %pM param %d value %d\n",
1756 arg->vdev_id, peer_addr, arg->param, arg->value);
1757
1758 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_AP_PS_PEER_PARAM_CMDID);
1759 if (ret) {
1760 ath12k_warn(ar->ab,
1761 "failed to send WMI_AP_PS_PEER_PARAM_CMDID\n");
1762 dev_kfree_skb(skb);
1763 }
1764
1765 return ret;
1766 }
1767
ath12k_wmi_set_sta_ps_param(struct ath12k * ar,u32 vdev_id,u32 param,u32 param_value)1768 int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id,
1769 u32 param, u32 param_value)
1770 {
1771 struct ath12k_wmi_pdev *wmi = ar->wmi;
1772 struct wmi_sta_powersave_param_cmd *cmd;
1773 struct sk_buff *skb;
1774 int ret;
1775
1776 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1777 if (!skb)
1778 return -ENOMEM;
1779
1780 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
1781 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_PARAM_CMD,
1782 sizeof(*cmd));
1783
1784 cmd->vdev_id = cpu_to_le32(vdev_id);
1785 cmd->param = cpu_to_le32(param);
1786 cmd->value = cpu_to_le32(param_value);
1787
1788 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1789 "WMI set sta ps vdev_id %d param %d value %d\n",
1790 vdev_id, param, param_value);
1791
1792 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_PARAM_CMDID);
1793 if (ret) {
1794 ath12k_warn(ar->ab, "failed to send WMI_STA_POWERSAVE_PARAM_CMDID");
1795 dev_kfree_skb(skb);
1796 }
1797
1798 return ret;
1799 }
1800
ath12k_wmi_force_fw_hang_cmd(struct ath12k * ar,u32 type,u32 delay_time_ms)1801 int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms)
1802 {
1803 struct ath12k_wmi_pdev *wmi = ar->wmi;
1804 struct wmi_force_fw_hang_cmd *cmd;
1805 struct sk_buff *skb;
1806 int ret, len;
1807
1808 len = sizeof(*cmd);
1809
1810 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1811 if (!skb)
1812 return -ENOMEM;
1813
1814 cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
1815 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FORCE_FW_HANG_CMD,
1816 len);
1817
1818 cmd->type = cpu_to_le32(type);
1819 cmd->delay_time_ms = cpu_to_le32(delay_time_ms);
1820
1821 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_FORCE_FW_HANG_CMDID);
1822
1823 if (ret) {
1824 ath12k_warn(ar->ab, "Failed to send WMI_FORCE_FW_HANG_CMDID");
1825 dev_kfree_skb(skb);
1826 }
1827 return ret;
1828 }
1829
ath12k_wmi_vdev_set_param_cmd(struct ath12k * ar,u32 vdev_id,u32 param_id,u32 param_value)1830 int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id,
1831 u32 param_id, u32 param_value)
1832 {
1833 struct ath12k_wmi_pdev *wmi = ar->wmi;
1834 struct wmi_vdev_set_param_cmd *cmd;
1835 struct sk_buff *skb;
1836 int ret;
1837
1838 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1839 if (!skb)
1840 return -ENOMEM;
1841
1842 cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
1843 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_PARAM_CMD,
1844 sizeof(*cmd));
1845
1846 cmd->vdev_id = cpu_to_le32(vdev_id);
1847 cmd->param_id = cpu_to_le32(param_id);
1848 cmd->param_value = cpu_to_le32(param_value);
1849
1850 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1851 "WMI vdev id 0x%x set param %d value %d\n",
1852 vdev_id, param_id, param_value);
1853
1854 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_PARAM_CMDID);
1855 if (ret) {
1856 ath12k_warn(ar->ab,
1857 "failed to send WMI_VDEV_SET_PARAM_CMDID\n");
1858 dev_kfree_skb(skb);
1859 }
1860
1861 return ret;
1862 }
1863
ath12k_wmi_send_pdev_temperature_cmd(struct ath12k * ar)1864 int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar)
1865 {
1866 struct ath12k_wmi_pdev *wmi = ar->wmi;
1867 struct wmi_get_pdev_temperature_cmd *cmd;
1868 struct sk_buff *skb;
1869 int ret;
1870
1871 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1872 if (!skb)
1873 return -ENOMEM;
1874
1875 cmd = (struct wmi_get_pdev_temperature_cmd *)skb->data;
1876 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_GET_TEMPERATURE_CMD,
1877 sizeof(*cmd));
1878 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
1879
1880 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1881 "WMI pdev get temperature for pdev_id %d\n", ar->pdev->pdev_id);
1882
1883 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_GET_TEMPERATURE_CMDID);
1884 if (ret) {
1885 ath12k_warn(ar->ab, "failed to send WMI_PDEV_GET_TEMPERATURE cmd\n");
1886 dev_kfree_skb(skb);
1887 }
1888
1889 return ret;
1890 }
1891
ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k * ar,u32 vdev_id,u32 bcn_ctrl_op)1892 int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar,
1893 u32 vdev_id, u32 bcn_ctrl_op)
1894 {
1895 struct ath12k_wmi_pdev *wmi = ar->wmi;
1896 struct wmi_bcn_offload_ctrl_cmd *cmd;
1897 struct sk_buff *skb;
1898 int ret;
1899
1900 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1901 if (!skb)
1902 return -ENOMEM;
1903
1904 cmd = (struct wmi_bcn_offload_ctrl_cmd *)skb->data;
1905 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_OFFLOAD_CTRL_CMD,
1906 sizeof(*cmd));
1907
1908 cmd->vdev_id = cpu_to_le32(vdev_id);
1909 cmd->bcn_ctrl_op = cpu_to_le32(bcn_ctrl_op);
1910
1911 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1912 "WMI bcn ctrl offload vdev id %d ctrl_op %d\n",
1913 vdev_id, bcn_ctrl_op);
1914
1915 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_OFFLOAD_CTRL_CMDID);
1916 if (ret) {
1917 ath12k_warn(ar->ab,
1918 "failed to send WMI_BCN_OFFLOAD_CTRL_CMDID\n");
1919 dev_kfree_skb(skb);
1920 }
1921
1922 return ret;
1923 }
1924
ath12k_wmi_p2p_go_bcn_ie(struct ath12k * ar,u32 vdev_id,const u8 * p2p_ie)1925 int ath12k_wmi_p2p_go_bcn_ie(struct ath12k *ar, u32 vdev_id,
1926 const u8 *p2p_ie)
1927 {
1928 struct ath12k_wmi_pdev *wmi = ar->wmi;
1929 struct wmi_p2p_go_set_beacon_ie_cmd *cmd;
1930 size_t p2p_ie_len, aligned_len;
1931 struct wmi_tlv *tlv;
1932 struct sk_buff *skb;
1933 #if defined(__linux__)
1934 void *ptr;
1935 #elif defined(__FreeBSD__)
1936 u8 *ptr;
1937 #endif
1938 int ret, len;
1939
1940 p2p_ie_len = p2p_ie[1] + 2;
1941 aligned_len = roundup(p2p_ie_len, sizeof(u32));
1942
1943 len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len;
1944
1945 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1946 if (!skb)
1947 return -ENOMEM;
1948
1949 ptr = skb->data;
1950 cmd = ptr;
1951 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_P2P_GO_SET_BEACON_IE,
1952 sizeof(*cmd));
1953 cmd->vdev_id = cpu_to_le32(vdev_id);
1954 cmd->ie_buf_len = cpu_to_le32(p2p_ie_len);
1955
1956 ptr += sizeof(*cmd);
1957 tlv = ptr;
1958 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_BYTE,
1959 aligned_len);
1960 memcpy(tlv->value, p2p_ie, p2p_ie_len);
1961
1962 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_P2P_GO_SET_BEACON_IE);
1963 if (ret) {
1964 ath12k_warn(ar->ab, "failed to send WMI_P2P_GO_SET_BEACON_IE\n");
1965 dev_kfree_skb(skb);
1966 }
1967
1968 return ret;
1969 }
1970
ath12k_wmi_bcn_tmpl(struct ath12k_link_vif * arvif,struct ieee80211_mutable_offsets * offs,struct sk_buff * bcn,struct ath12k_wmi_bcn_tmpl_ema_arg * ema_args)1971 int ath12k_wmi_bcn_tmpl(struct ath12k_link_vif *arvif,
1972 struct ieee80211_mutable_offsets *offs,
1973 struct sk_buff *bcn,
1974 struct ath12k_wmi_bcn_tmpl_ema_arg *ema_args)
1975 {
1976 struct ath12k *ar = arvif->ar;
1977 struct ath12k_wmi_pdev *wmi = ar->wmi;
1978 struct ath12k_base *ab = ar->ab;
1979 struct wmi_bcn_tmpl_cmd *cmd;
1980 struct ath12k_wmi_bcn_prb_info_params *bcn_prb_info;
1981 struct ath12k_vif *ahvif = arvif->ahvif;
1982 struct ieee80211_bss_conf *conf;
1983 u32 vdev_id = arvif->vdev_id;
1984 struct wmi_tlv *tlv;
1985 struct sk_buff *skb;
1986 u32 ema_params = 0;
1987 void *ptr;
1988 int ret, len;
1989 size_t aligned_len = roundup(bcn->len, 4);
1990
1991 conf = ath12k_mac_get_link_bss_conf(arvif);
1992 if (!conf) {
1993 ath12k_warn(ab,
1994 "unable to access bss link conf in beacon template command for vif %pM link %u\n",
1995 ahvif->vif->addr, arvif->link_id);
1996 return -EINVAL;
1997 }
1998
1999 len = sizeof(*cmd) + sizeof(*bcn_prb_info) + TLV_HDR_SIZE + aligned_len;
2000
2001 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2002 if (!skb)
2003 return -ENOMEM;
2004
2005 cmd = (struct wmi_bcn_tmpl_cmd *)skb->data;
2006 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_TMPL_CMD,
2007 sizeof(*cmd));
2008 cmd->vdev_id = cpu_to_le32(vdev_id);
2009 cmd->tim_ie_offset = cpu_to_le32(offs->tim_offset);
2010
2011 if (conf->csa_active) {
2012 cmd->csa_switch_count_offset =
2013 cpu_to_le32(offs->cntdwn_counter_offs[0]);
2014 cmd->ext_csa_switch_count_offset =
2015 cpu_to_le32(offs->cntdwn_counter_offs[1]);
2016 cmd->csa_event_bitmap = cpu_to_le32(0xFFFFFFFF);
2017 arvif->current_cntdown_counter = bcn->data[offs->cntdwn_counter_offs[0]];
2018 }
2019
2020 cmd->buf_len = cpu_to_le32(bcn->len);
2021 cmd->mbssid_ie_offset = cpu_to_le32(offs->mbssid_off);
2022 if (ema_args) {
2023 u32p_replace_bits(&ema_params, ema_args->bcn_cnt, WMI_EMA_BEACON_CNT);
2024 u32p_replace_bits(&ema_params, ema_args->bcn_index, WMI_EMA_BEACON_IDX);
2025 if (ema_args->bcn_index == 0)
2026 u32p_replace_bits(&ema_params, 1, WMI_EMA_BEACON_FIRST);
2027 if (ema_args->bcn_index + 1 == ema_args->bcn_cnt)
2028 u32p_replace_bits(&ema_params, 1, WMI_EMA_BEACON_LAST);
2029 cmd->ema_params = cpu_to_le32(ema_params);
2030 }
2031 cmd->feature_enable_bitmap =
2032 cpu_to_le32(u32_encode_bits(arvif->beacon_prot,
2033 WMI_BEACON_PROTECTION_EN_BIT));
2034
2035 ptr = skb->data + sizeof(*cmd);
2036
2037 #if defined(__linux__)
2038 bcn_prb_info = ptr;
2039 #elif defined(__FreeBSD__)
2040 bcn_prb_info = (void *)ptr;
2041 #endif
2042 len = sizeof(*bcn_prb_info);
2043 bcn_prb_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO,
2044 len);
2045 bcn_prb_info->caps = 0;
2046 bcn_prb_info->erp = 0;
2047
2048 ptr += sizeof(*bcn_prb_info);
2049
2050 #if defined(__linux__)
2051 tlv = ptr;
2052 #elif defined(__FreeBSD__)
2053 tlv = (void *)ptr;
2054 #endif
2055 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
2056 memcpy(tlv->value, bcn->data, bcn->len);
2057
2058 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_TMPL_CMDID);
2059 if (ret) {
2060 ath12k_warn(ab, "failed to send WMI_BCN_TMPL_CMDID\n");
2061 dev_kfree_skb(skb);
2062 }
2063
2064 return ret;
2065 }
2066
ath12k_wmi_vdev_install_key(struct ath12k * ar,struct wmi_vdev_install_key_arg * arg)2067 int ath12k_wmi_vdev_install_key(struct ath12k *ar,
2068 struct wmi_vdev_install_key_arg *arg)
2069 {
2070 struct ath12k_wmi_pdev *wmi = ar->wmi;
2071 struct wmi_vdev_install_key_cmd *cmd;
2072 struct wmi_tlv *tlv;
2073 struct sk_buff *skb;
2074 int ret, len, key_len_aligned;
2075
2076 /* WMI_TAG_ARRAY_BYTE needs to be aligned with 4, the actual key
2077 * length is specified in cmd->key_len.
2078 */
2079 key_len_aligned = roundup(arg->key_len, 4);
2080
2081 len = sizeof(*cmd) + TLV_HDR_SIZE + key_len_aligned;
2082
2083 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2084 if (!skb)
2085 return -ENOMEM;
2086
2087 cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
2088 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_INSTALL_KEY_CMD,
2089 sizeof(*cmd));
2090 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2091 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
2092 cmd->key_idx = cpu_to_le32(arg->key_idx);
2093 cmd->key_flags = cpu_to_le32(arg->key_flags);
2094 cmd->key_cipher = cpu_to_le32(arg->key_cipher);
2095 cmd->key_len = cpu_to_le32(arg->key_len);
2096 cmd->key_txmic_len = cpu_to_le32(arg->key_txmic_len);
2097 cmd->key_rxmic_len = cpu_to_le32(arg->key_rxmic_len);
2098
2099 if (arg->key_rsc_counter)
2100 cmd->key_rsc_counter = cpu_to_le64(arg->key_rsc_counter);
2101
2102 tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd));
2103 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, key_len_aligned);
2104 memcpy(tlv->value, arg->key_data, arg->key_len);
2105
2106 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2107 "WMI vdev install key idx %d cipher %d len %d\n",
2108 arg->key_idx, arg->key_cipher, arg->key_len);
2109
2110 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_INSTALL_KEY_CMDID);
2111 if (ret) {
2112 ath12k_warn(ar->ab,
2113 "failed to send WMI_VDEV_INSTALL_KEY cmd\n");
2114 dev_kfree_skb(skb);
2115 }
2116
2117 return ret;
2118 }
2119
ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd * cmd,struct ath12k_wmi_peer_assoc_arg * arg,bool hw_crypto_disabled)2120 static void ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd *cmd,
2121 struct ath12k_wmi_peer_assoc_arg *arg,
2122 bool hw_crypto_disabled)
2123 {
2124 cmd->peer_flags = 0;
2125 cmd->peer_flags_ext = 0;
2126
2127 if (arg->is_wme_set) {
2128 if (arg->qos_flag)
2129 cmd->peer_flags |= cpu_to_le32(WMI_PEER_QOS);
2130 if (arg->apsd_flag)
2131 cmd->peer_flags |= cpu_to_le32(WMI_PEER_APSD);
2132 if (arg->ht_flag)
2133 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HT);
2134 if (arg->bw_40)
2135 cmd->peer_flags |= cpu_to_le32(WMI_PEER_40MHZ);
2136 if (arg->bw_80)
2137 cmd->peer_flags |= cpu_to_le32(WMI_PEER_80MHZ);
2138 if (arg->bw_160)
2139 cmd->peer_flags |= cpu_to_le32(WMI_PEER_160MHZ);
2140 if (arg->bw_320)
2141 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_320MHZ);
2142
2143 /* Typically if STBC is enabled for VHT it should be enabled
2144 * for HT as well
2145 **/
2146 if (arg->stbc_flag)
2147 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STBC);
2148
2149 /* Typically if LDPC is enabled for VHT it should be enabled
2150 * for HT as well
2151 **/
2152 if (arg->ldpc_flag)
2153 cmd->peer_flags |= cpu_to_le32(WMI_PEER_LDPC);
2154
2155 if (arg->static_mimops_flag)
2156 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STATIC_MIMOPS);
2157 if (arg->dynamic_mimops_flag)
2158 cmd->peer_flags |= cpu_to_le32(WMI_PEER_DYN_MIMOPS);
2159 if (arg->spatial_mux_flag)
2160 cmd->peer_flags |= cpu_to_le32(WMI_PEER_SPATIAL_MUX);
2161 if (arg->vht_flag)
2162 cmd->peer_flags |= cpu_to_le32(WMI_PEER_VHT);
2163 if (arg->he_flag)
2164 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HE);
2165 if (arg->twt_requester)
2166 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_REQ);
2167 if (arg->twt_responder)
2168 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_RESP);
2169 if (arg->eht_flag)
2170 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_EHT);
2171 }
2172
2173 /* Suppress authorization for all AUTH modes that need 4-way handshake
2174 * (during re-association).
2175 * Authorization will be done for these modes on key installation.
2176 */
2177 if (arg->auth_flag)
2178 cmd->peer_flags |= cpu_to_le32(WMI_PEER_AUTH);
2179 if (arg->need_ptk_4_way) {
2180 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_PTK_4_WAY);
2181 if (!hw_crypto_disabled && arg->is_assoc)
2182 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_AUTH);
2183 }
2184 if (arg->need_gtk_2_way)
2185 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_GTK_2_WAY);
2186 /* safe mode bypass the 4-way handshake */
2187 if (arg->safe_mode_enabled)
2188 cmd->peer_flags &= cpu_to_le32(~(WMI_PEER_NEED_PTK_4_WAY |
2189 WMI_PEER_NEED_GTK_2_WAY));
2190
2191 if (arg->is_pmf_enabled)
2192 cmd->peer_flags |= cpu_to_le32(WMI_PEER_PMF);
2193
2194 /* Disable AMSDU for station transmit, if user configures it */
2195 /* Disable AMSDU for AP transmit to 11n Stations, if user configures
2196 * it
2197 * if (arg->amsdu_disable) Add after FW support
2198 **/
2199
2200 /* Target asserts if node is marked HT and all MCS is set to 0.
2201 * Mark the node as non-HT if all the mcs rates are disabled through
2202 * iwpriv
2203 **/
2204 if (arg->peer_ht_rates.num_rates == 0)
2205 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_HT);
2206 }
2207
ath12k_wmi_send_peer_assoc_cmd(struct ath12k * ar,struct ath12k_wmi_peer_assoc_arg * arg)2208 int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar,
2209 struct ath12k_wmi_peer_assoc_arg *arg)
2210 {
2211 struct ath12k_wmi_pdev *wmi = ar->wmi;
2212 struct wmi_peer_assoc_complete_cmd *cmd;
2213 struct ath12k_wmi_vht_rate_set_params *mcs;
2214 struct ath12k_wmi_he_rate_set_params *he_mcs;
2215 struct ath12k_wmi_eht_rate_set_params *eht_mcs;
2216 struct wmi_peer_assoc_mlo_params *ml_params;
2217 struct wmi_peer_assoc_mlo_partner_info_params *partner_info;
2218 struct sk_buff *skb;
2219 struct wmi_tlv *tlv;
2220 #if defined(__linux__)
2221 void *ptr;
2222 #elif defined(__FreeBSD__)
2223 u8 *ptr;
2224 #endif
2225 u32 peer_legacy_rates_align, eml_pad_delay, eml_trans_delay;
2226 u32 peer_ht_rates_align, eml_trans_timeout;
2227 int i, ret, len;
2228 u16 eml_cap;
2229 __le32 v;
2230
2231 peer_legacy_rates_align = roundup(arg->peer_legacy_rates.num_rates,
2232 sizeof(u32));
2233 peer_ht_rates_align = roundup(arg->peer_ht_rates.num_rates,
2234 sizeof(u32));
2235
2236 len = sizeof(*cmd) +
2237 TLV_HDR_SIZE + (peer_legacy_rates_align * sizeof(u8)) +
2238 TLV_HDR_SIZE + (peer_ht_rates_align * sizeof(u8)) +
2239 sizeof(*mcs) + TLV_HDR_SIZE +
2240 (sizeof(*he_mcs) * arg->peer_he_mcs_count) +
2241 TLV_HDR_SIZE + (sizeof(*eht_mcs) * arg->peer_eht_mcs_count);
2242
2243 if (arg->ml.enabled)
2244 len += TLV_HDR_SIZE + sizeof(*ml_params) +
2245 TLV_HDR_SIZE + (arg->ml.num_partner_links * sizeof(*partner_info));
2246 else
2247 len += (2 * TLV_HDR_SIZE);
2248
2249 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2250 if (!skb)
2251 return -ENOMEM;
2252
2253 ptr = skb->data;
2254
2255 #if defined(__linux__)
2256 cmd = ptr;
2257 #elif defined(__FreeBSD__)
2258 cmd = (void *)ptr;
2259 #endif
2260 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_ASSOC_COMPLETE_CMD,
2261 sizeof(*cmd));
2262
2263 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2264
2265 cmd->peer_new_assoc = cpu_to_le32(arg->peer_new_assoc);
2266 cmd->peer_associd = cpu_to_le32(arg->peer_associd);
2267 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap);
2268
2269 ath12k_wmi_copy_peer_flags(cmd, arg,
2270 test_bit(ATH12K_FLAG_HW_CRYPTO_DISABLED,
2271 &ar->ab->dev_flags));
2272
2273 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_mac);
2274
2275 cmd->peer_rate_caps = cpu_to_le32(arg->peer_rate_caps);
2276 cmd->peer_caps = cpu_to_le32(arg->peer_caps);
2277 cmd->peer_listen_intval = cpu_to_le32(arg->peer_listen_intval);
2278 cmd->peer_ht_caps = cpu_to_le32(arg->peer_ht_caps);
2279 cmd->peer_max_mpdu = cpu_to_le32(arg->peer_max_mpdu);
2280 cmd->peer_mpdu_density = cpu_to_le32(arg->peer_mpdu_density);
2281 cmd->peer_vht_caps = cpu_to_le32(arg->peer_vht_caps);
2282 cmd->peer_phymode = cpu_to_le32(arg->peer_phymode);
2283
2284 /* Update 11ax capabilities */
2285 cmd->peer_he_cap_info = cpu_to_le32(arg->peer_he_cap_macinfo[0]);
2286 cmd->peer_he_cap_info_ext = cpu_to_le32(arg->peer_he_cap_macinfo[1]);
2287 cmd->peer_he_cap_info_internal = cpu_to_le32(arg->peer_he_cap_macinfo_internal);
2288 cmd->peer_he_caps_6ghz = cpu_to_le32(arg->peer_he_caps_6ghz);
2289 cmd->peer_he_ops = cpu_to_le32(arg->peer_he_ops);
2290 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
2291 cmd->peer_he_cap_phy[i] =
2292 cpu_to_le32(arg->peer_he_cap_phyinfo[i]);
2293 cmd->peer_ppet.numss_m1 = cpu_to_le32(arg->peer_ppet.numss_m1);
2294 cmd->peer_ppet.ru_info = cpu_to_le32(arg->peer_ppet.ru_bit_mask);
2295 for (i = 0; i < WMI_MAX_NUM_SS; i++)
2296 cmd->peer_ppet.ppet16_ppet8_ru3_ru0[i] =
2297 cpu_to_le32(arg->peer_ppet.ppet16_ppet8_ru3_ru0[i]);
2298
2299 /* Update 11be capabilities */
2300 memcpy_and_pad(cmd->peer_eht_cap_mac, sizeof(cmd->peer_eht_cap_mac),
2301 arg->peer_eht_cap_mac, sizeof(arg->peer_eht_cap_mac),
2302 0);
2303 memcpy_and_pad(cmd->peer_eht_cap_phy, sizeof(cmd->peer_eht_cap_phy),
2304 arg->peer_eht_cap_phy, sizeof(arg->peer_eht_cap_phy),
2305 0);
2306 memcpy_and_pad(&cmd->peer_eht_ppet, sizeof(cmd->peer_eht_ppet),
2307 &arg->peer_eht_ppet, sizeof(arg->peer_eht_ppet), 0);
2308
2309 /* Update peer legacy rate information */
2310 ptr += sizeof(*cmd);
2311
2312 #if defined(__linux__)
2313 tlv = ptr;
2314 #elif defined(__FreeBSD__)
2315 tlv = (void *)ptr;
2316 #endif
2317 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_legacy_rates_align);
2318
2319 ptr += TLV_HDR_SIZE;
2320
2321 cmd->num_peer_legacy_rates = cpu_to_le32(arg->peer_legacy_rates.num_rates);
2322 memcpy(ptr, arg->peer_legacy_rates.rates,
2323 arg->peer_legacy_rates.num_rates);
2324
2325 /* Update peer HT rate information */
2326 ptr += peer_legacy_rates_align;
2327
2328 #if defined(__linux__)
2329 tlv = ptr;
2330 #elif defined(__FreeBSD__)
2331 tlv = (void *)ptr;
2332 #endif
2333 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_ht_rates_align);
2334 ptr += TLV_HDR_SIZE;
2335 cmd->num_peer_ht_rates = cpu_to_le32(arg->peer_ht_rates.num_rates);
2336 memcpy(ptr, arg->peer_ht_rates.rates,
2337 arg->peer_ht_rates.num_rates);
2338
2339 /* VHT Rates */
2340 ptr += peer_ht_rates_align;
2341
2342 #if defined(__linux__)
2343 mcs = ptr;
2344 #elif defined(__FreeBSD__)
2345 mcs = (void *)ptr;
2346 #endif
2347
2348 mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VHT_RATE_SET,
2349 sizeof(*mcs));
2350
2351 cmd->peer_nss = cpu_to_le32(arg->peer_nss);
2352
2353 /* Update bandwidth-NSS mapping */
2354 cmd->peer_bw_rxnss_override = 0;
2355 cmd->peer_bw_rxnss_override |= cpu_to_le32(arg->peer_bw_rxnss_override);
2356
2357 if (arg->vht_capable) {
2358 /* Firmware interprets mcs->tx_mcs_set field as peer's
2359 * RX capability
2360 */
2361 mcs->rx_max_rate = cpu_to_le32(arg->tx_max_rate);
2362 mcs->rx_mcs_set = cpu_to_le32(arg->tx_mcs_set);
2363 mcs->tx_max_rate = cpu_to_le32(arg->rx_max_rate);
2364 mcs->tx_mcs_set = cpu_to_le32(arg->rx_mcs_set);
2365 }
2366
2367 /* HE Rates */
2368 cmd->peer_he_mcs = cpu_to_le32(arg->peer_he_mcs_count);
2369 cmd->min_data_rate = cpu_to_le32(arg->min_data_rate);
2370
2371 ptr += sizeof(*mcs);
2372
2373 len = arg->peer_he_mcs_count * sizeof(*he_mcs);
2374
2375 #if defined(__linux__)
2376 tlv = ptr;
2377 #elif defined(__FreeBSD__)
2378 tlv = (void *)ptr;
2379 #endif
2380 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2381 ptr += TLV_HDR_SIZE;
2382
2383 /* Loop through the HE rate set */
2384 for (i = 0; i < arg->peer_he_mcs_count; i++) {
2385 #if defined(__linux__)
2386 he_mcs = ptr;
2387 #elif defined(__FreeBSD__)
2388 he_mcs = (void *)ptr;
2389 #endif
2390 he_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET,
2391 sizeof(*he_mcs));
2392
2393 he_mcs->rx_mcs_set = cpu_to_le32(arg->peer_he_rx_mcs_set[i]);
2394 he_mcs->tx_mcs_set = cpu_to_le32(arg->peer_he_tx_mcs_set[i]);
2395 ptr += sizeof(*he_mcs);
2396 }
2397
2398 #if defined(__linux__)
2399 tlv = ptr;
2400 #elif defined(__FreeBSD__)
2401 tlv = (void *)ptr;
2402 #endif
2403 len = arg->ml.enabled ? sizeof(*ml_params) : 0;
2404 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2405 ptr += TLV_HDR_SIZE;
2406 if (!len)
2407 goto skip_ml_params;
2408
2409 ml_params = ptr;
2410 ml_params->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PEER_ASSOC_PARAMS,
2411 len);
2412 ml_params->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED);
2413
2414 if (arg->ml.assoc_link)
2415 ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_ASSOC_LINK);
2416
2417 if (arg->ml.primary_umac)
2418 ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC);
2419
2420 if (arg->ml.logical_link_idx_valid)
2421 ml_params->flags |=
2422 cpu_to_le32(ATH12K_WMI_FLAG_MLO_LOGICAL_LINK_IDX_VALID);
2423
2424 if (arg->ml.peer_id_valid)
2425 ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_PEER_ID_VALID);
2426
2427 ether_addr_copy(ml_params->mld_addr.addr, arg->ml.mld_addr);
2428 ml_params->logical_link_idx = cpu_to_le32(arg->ml.logical_link_idx);
2429 ml_params->ml_peer_id = cpu_to_le32(arg->ml.ml_peer_id);
2430 ml_params->ieee_link_id = cpu_to_le32(arg->ml.ieee_link_id);
2431
2432 eml_cap = arg->ml.eml_cap;
2433 if (u16_get_bits(eml_cap, IEEE80211_EML_CAP_EMLSR_SUPP)) {
2434 ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_EMLSR_SUPPORT);
2435 /* Padding delay */
2436 eml_pad_delay = ieee80211_emlsr_pad_delay_in_us(eml_cap);
2437 ml_params->emlsr_padding_delay_us = cpu_to_le32(eml_pad_delay);
2438 /* Transition delay */
2439 eml_trans_delay = ieee80211_emlsr_trans_delay_in_us(eml_cap);
2440 ml_params->emlsr_trans_delay_us = cpu_to_le32(eml_trans_delay);
2441 /* Transition timeout */
2442 eml_trans_timeout = ieee80211_eml_trans_timeout_in_us(eml_cap);
2443 ml_params->emlsr_trans_timeout_us =
2444 cpu_to_le32(eml_trans_timeout);
2445 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi peer %pM emlsr padding delay %u, trans delay %u trans timeout %u",
2446 arg->peer_mac, eml_pad_delay, eml_trans_delay,
2447 eml_trans_timeout);
2448 }
2449
2450 ptr += sizeof(*ml_params);
2451
2452 skip_ml_params:
2453 /* Loop through the EHT rate set */
2454 len = arg->peer_eht_mcs_count * sizeof(*eht_mcs);
2455 #if defined(__linux__)
2456 tlv = ptr;
2457 #elif defined(__FreeBSD__)
2458 tlv = (void *)ptr;
2459 #endif
2460 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2461 ptr += TLV_HDR_SIZE;
2462
2463 for (i = 0; i < arg->peer_eht_mcs_count; i++) {
2464 #if defined(__linux__)
2465 eht_mcs = ptr;
2466 #elif defined(__FreeBSD__)
2467 eht_mcs = (void *)ptr;
2468 #endif
2469 eht_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_EHT_RATE_SET,
2470 sizeof(*eht_mcs));
2471
2472 eht_mcs->rx_mcs_set = cpu_to_le32(arg->peer_eht_rx_mcs_set[i]);
2473 eht_mcs->tx_mcs_set = cpu_to_le32(arg->peer_eht_tx_mcs_set[i]);
2474 ptr += sizeof(*eht_mcs);
2475 }
2476
2477 /* Update MCS15 capability */
2478 if (arg->eht_disable_mcs15)
2479 cmd->peer_eht_ops = cpu_to_le32(IEEE80211_EHT_OPER_MCS15_DISABLE);
2480
2481 #if defined(__linux__)
2482 tlv = ptr;
2483 #elif defined(__FreeBSD__)
2484 tlv = (void *)ptr;
2485 #endif
2486 len = arg->ml.enabled ? arg->ml.num_partner_links * sizeof(*partner_info) : 0;
2487 /* fill ML Partner links */
2488 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2489 ptr += TLV_HDR_SIZE;
2490
2491 if (len == 0)
2492 goto send;
2493
2494 for (i = 0; i < arg->ml.num_partner_links; i++) {
2495 u32 cmd = WMI_TAG_MLO_PARTNER_LINK_PARAMS_PEER_ASSOC;
2496
2497 partner_info = ptr;
2498 partner_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(cmd,
2499 sizeof(*partner_info));
2500 partner_info->vdev_id = cpu_to_le32(arg->ml.partner_info[i].vdev_id);
2501 partner_info->hw_link_id =
2502 cpu_to_le32(arg->ml.partner_info[i].hw_link_id);
2503 partner_info->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED);
2504
2505 if (arg->ml.partner_info[i].assoc_link)
2506 partner_info->flags |=
2507 cpu_to_le32(ATH12K_WMI_FLAG_MLO_ASSOC_LINK);
2508
2509 if (arg->ml.partner_info[i].primary_umac)
2510 partner_info->flags |=
2511 cpu_to_le32(ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC);
2512
2513 if (arg->ml.partner_info[i].logical_link_idx_valid) {
2514 v = cpu_to_le32(ATH12K_WMI_FLAG_MLO_LINK_ID_VALID);
2515 partner_info->flags |= v;
2516 }
2517
2518 partner_info->logical_link_idx =
2519 cpu_to_le32(arg->ml.partner_info[i].logical_link_idx);
2520 ptr += sizeof(*partner_info);
2521 }
2522
2523 send:
2524 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2525 "wmi peer assoc vdev id %d assoc id %d peer mac %pM peer_flags %x rate_caps %x peer_caps %x listen_intval %d ht_caps %x max_mpdu %d nss %d phymode %d peer_mpdu_density %d vht_caps %x he cap_info %x he ops %x he cap_info_ext %x he phy %x %x %x peer_bw_rxnss_override %x peer_flags_ext %x eht mac_cap %x %x eht phy_cap %x %x %x peer_eht_ops %x\n",
2526 cmd->vdev_id, cmd->peer_associd, arg->peer_mac,
2527 cmd->peer_flags, cmd->peer_rate_caps, cmd->peer_caps,
2528 cmd->peer_listen_intval, cmd->peer_ht_caps,
2529 cmd->peer_max_mpdu, cmd->peer_nss, cmd->peer_phymode,
2530 cmd->peer_mpdu_density,
2531 cmd->peer_vht_caps, cmd->peer_he_cap_info,
2532 cmd->peer_he_ops, cmd->peer_he_cap_info_ext,
2533 cmd->peer_he_cap_phy[0], cmd->peer_he_cap_phy[1],
2534 cmd->peer_he_cap_phy[2],
2535 cmd->peer_bw_rxnss_override, cmd->peer_flags_ext,
2536 cmd->peer_eht_cap_mac[0], cmd->peer_eht_cap_mac[1],
2537 cmd->peer_eht_cap_phy[0], cmd->peer_eht_cap_phy[1],
2538 cmd->peer_eht_cap_phy[2], cmd->peer_eht_ops);
2539
2540 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_ASSOC_CMDID);
2541 if (ret) {
2542 ath12k_warn(ar->ab,
2543 "failed to send WMI_PEER_ASSOC_CMDID\n");
2544 dev_kfree_skb(skb);
2545 }
2546
2547 return ret;
2548 }
2549
ath12k_wmi_start_scan_init(struct ath12k * ar,struct ath12k_wmi_scan_req_arg * arg)2550 void ath12k_wmi_start_scan_init(struct ath12k *ar,
2551 struct ath12k_wmi_scan_req_arg *arg)
2552 {
2553 /* setup commonly used values */
2554 arg->scan_req_id = 1;
2555 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
2556 arg->dwell_time_active = 50;
2557 arg->dwell_time_active_2g = 0;
2558 arg->dwell_time_passive = 150;
2559 arg->dwell_time_active_6g = 70;
2560 arg->dwell_time_passive_6g = 70;
2561 arg->min_rest_time = 50;
2562 arg->max_rest_time = 500;
2563 arg->repeat_probe_time = 0;
2564 arg->probe_spacing_time = 0;
2565 arg->idle_time = 0;
2566 arg->max_scan_time = 20000;
2567 arg->probe_delay = 5;
2568 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED |
2569 WMI_SCAN_EVENT_COMPLETED |
2570 WMI_SCAN_EVENT_BSS_CHANNEL |
2571 WMI_SCAN_EVENT_FOREIGN_CHAN |
2572 WMI_SCAN_EVENT_DEQUEUED;
2573 arg->scan_f_chan_stat_evnt = 1;
2574 arg->num_bssid = 1;
2575
2576 /* fill bssid_list[0] with 0xff, otherwise bssid and RA will be
2577 * ZEROs in probe request
2578 */
2579 eth_broadcast_addr(arg->bssid_list[0].addr);
2580 }
2581
ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd * cmd,struct ath12k_wmi_scan_req_arg * arg)2582 static void ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd *cmd,
2583 struct ath12k_wmi_scan_req_arg *arg)
2584 {
2585 /* Scan events subscription */
2586 if (arg->scan_ev_started)
2587 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_STARTED);
2588 if (arg->scan_ev_completed)
2589 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_COMPLETED);
2590 if (arg->scan_ev_bss_chan)
2591 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_BSS_CHANNEL);
2592 if (arg->scan_ev_foreign_chan)
2593 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN);
2594 if (arg->scan_ev_dequeued)
2595 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_DEQUEUED);
2596 if (arg->scan_ev_preempted)
2597 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_PREEMPTED);
2598 if (arg->scan_ev_start_failed)
2599 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_START_FAILED);
2600 if (arg->scan_ev_restarted)
2601 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESTARTED);
2602 if (arg->scan_ev_foreign_chn_exit)
2603 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT);
2604 if (arg->scan_ev_suspended)
2605 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_SUSPENDED);
2606 if (arg->scan_ev_resumed)
2607 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESUMED);
2608
2609 /** Set scan control flags */
2610 cmd->scan_ctrl_flags = 0;
2611 if (arg->scan_f_passive)
2612 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_PASSIVE);
2613 if (arg->scan_f_strict_passive_pch)
2614 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN);
2615 if (arg->scan_f_promisc_mode)
2616 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROMISCUOS);
2617 if (arg->scan_f_capture_phy_err)
2618 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CAPTURE_PHY_ERROR);
2619 if (arg->scan_f_half_rate)
2620 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_HALF_RATE_SUPPORT);
2621 if (arg->scan_f_quarter_rate)
2622 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT);
2623 if (arg->scan_f_cck_rates)
2624 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_CCK_RATES);
2625 if (arg->scan_f_ofdm_rates)
2626 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_OFDM_RATES);
2627 if (arg->scan_f_chan_stat_evnt)
2628 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CHAN_STAT_EVENT);
2629 if (arg->scan_f_filter_prb_req)
2630 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROBE_REQ);
2631 if (arg->scan_f_bcast_probe)
2632 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_BCAST_PROBE_REQ);
2633 if (arg->scan_f_offchan_mgmt_tx)
2634 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_MGMT_TX);
2635 if (arg->scan_f_offchan_data_tx)
2636 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_DATA_TX);
2637 if (arg->scan_f_force_active_dfs_chn)
2638 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS);
2639 if (arg->scan_f_add_tpc_ie_in_probe)
2640 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ);
2641 if (arg->scan_f_add_ds_ie_in_probe)
2642 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ);
2643 if (arg->scan_f_add_spoofed_mac_in_probe)
2644 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ);
2645 if (arg->scan_f_add_rand_seq_in_probe)
2646 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ);
2647 if (arg->scan_f_en_ie_whitelist_in_probe)
2648 cmd->scan_ctrl_flags |=
2649 cpu_to_le32(WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ);
2650
2651 cmd->scan_ctrl_flags |= le32_encode_bits(arg->adaptive_dwell_time_mode,
2652 WMI_SCAN_DWELL_MODE_MASK);
2653 }
2654
ath12k_wmi_send_scan_start_cmd(struct ath12k * ar,struct ath12k_wmi_scan_req_arg * arg)2655 int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar,
2656 struct ath12k_wmi_scan_req_arg *arg)
2657 {
2658 struct ath12k_wmi_pdev *wmi = ar->wmi;
2659 struct wmi_start_scan_cmd *cmd;
2660 struct ath12k_wmi_ssid_params *ssid = NULL;
2661 struct ath12k_wmi_mac_addr_params *bssid;
2662 struct sk_buff *skb;
2663 struct wmi_tlv *tlv;
2664 #if defined(__linux__)
2665 void *ptr;
2666 #elif defined(__FreeBSD__)
2667 u8 *ptr;
2668 #endif
2669 int i, ret, len;
2670 u32 *tmp_ptr, extraie_len_with_pad = 0;
2671 struct ath12k_wmi_hint_short_ssid_arg *s_ssid = NULL;
2672 struct ath12k_wmi_hint_bssid_arg *hint_bssid = NULL;
2673
2674 len = sizeof(*cmd);
2675
2676 len += TLV_HDR_SIZE;
2677 if (arg->num_chan)
2678 len += arg->num_chan * sizeof(u32);
2679
2680 len += TLV_HDR_SIZE;
2681 if (arg->num_ssids)
2682 len += arg->num_ssids * sizeof(*ssid);
2683
2684 len += TLV_HDR_SIZE;
2685 if (arg->num_bssid)
2686 len += sizeof(*bssid) * arg->num_bssid;
2687
2688 if (arg->num_hint_bssid)
2689 len += TLV_HDR_SIZE +
2690 arg->num_hint_bssid * sizeof(*hint_bssid);
2691
2692 if (arg->num_hint_s_ssid)
2693 len += TLV_HDR_SIZE +
2694 arg->num_hint_s_ssid * sizeof(*s_ssid);
2695
2696 len += TLV_HDR_SIZE;
2697 if (arg->extraie.len)
2698 extraie_len_with_pad =
2699 roundup(arg->extraie.len, sizeof(u32));
2700 if (extraie_len_with_pad <= (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len)) {
2701 len += extraie_len_with_pad;
2702 } else {
2703 ath12k_warn(ar->ab, "discard large size %d bytes extraie for scan start\n",
2704 arg->extraie.len);
2705 extraie_len_with_pad = 0;
2706 }
2707
2708 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2709 if (!skb)
2710 return -ENOMEM;
2711
2712 ptr = skb->data;
2713
2714 #if defined(__linux__)
2715 cmd = ptr;
2716 #elif defined(__FreeBSD__)
2717 cmd = (void *)ptr;
2718 #endif
2719 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_START_SCAN_CMD,
2720 sizeof(*cmd));
2721
2722 cmd->scan_id = cpu_to_le32(arg->scan_id);
2723 cmd->scan_req_id = cpu_to_le32(arg->scan_req_id);
2724 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2725 if (ar->state_11d == ATH12K_11D_PREPARING)
2726 arg->scan_priority = WMI_SCAN_PRIORITY_MEDIUM;
2727 else
2728 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
2729 cmd->notify_scan_events = cpu_to_le32(arg->notify_scan_events);
2730
2731 ath12k_wmi_copy_scan_event_cntrl_flags(cmd, arg);
2732
2733 cmd->dwell_time_active = cpu_to_le32(arg->dwell_time_active);
2734 cmd->dwell_time_active_2g = cpu_to_le32(arg->dwell_time_active_2g);
2735 cmd->dwell_time_passive = cpu_to_le32(arg->dwell_time_passive);
2736 cmd->dwell_time_active_6g = cpu_to_le32(arg->dwell_time_active_6g);
2737 cmd->dwell_time_passive_6g = cpu_to_le32(arg->dwell_time_passive_6g);
2738 cmd->min_rest_time = cpu_to_le32(arg->min_rest_time);
2739 cmd->max_rest_time = cpu_to_le32(arg->max_rest_time);
2740 cmd->repeat_probe_time = cpu_to_le32(arg->repeat_probe_time);
2741 cmd->probe_spacing_time = cpu_to_le32(arg->probe_spacing_time);
2742 cmd->idle_time = cpu_to_le32(arg->idle_time);
2743 cmd->max_scan_time = cpu_to_le32(arg->max_scan_time);
2744 cmd->probe_delay = cpu_to_le32(arg->probe_delay);
2745 cmd->burst_duration = cpu_to_le32(arg->burst_duration);
2746 cmd->num_chan = cpu_to_le32(arg->num_chan);
2747 cmd->num_bssid = cpu_to_le32(arg->num_bssid);
2748 cmd->num_ssids = cpu_to_le32(arg->num_ssids);
2749 cmd->ie_len = cpu_to_le32(arg->extraie.len);
2750 cmd->n_probes = cpu_to_le32(arg->n_probes);
2751
2752 ptr += sizeof(*cmd);
2753
2754 len = arg->num_chan * sizeof(u32);
2755
2756 #if defined(__linux__)
2757 tlv = ptr;
2758 #elif defined(__FreeBSD__)
2759 tlv = (void *)ptr;
2760 #endif
2761 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, len);
2762 ptr += TLV_HDR_SIZE;
2763 tmp_ptr = (u32 *)ptr;
2764
2765 memcpy(tmp_ptr, arg->chan_list, arg->num_chan * 4);
2766
2767 ptr += len;
2768
2769 len = arg->num_ssids * sizeof(*ssid);
2770 #if defined(__linux__)
2771 tlv = ptr;
2772 #elif defined(__FreeBSD__)
2773 tlv = (void *)ptr;
2774 #endif
2775 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2776
2777 ptr += TLV_HDR_SIZE;
2778
2779 if (arg->num_ssids) {
2780 #if defined(__linux__)
2781 ssid = ptr;
2782 #elif defined(__FreeBSD__)
2783 ssid = (void *)ptr;
2784 #endif
2785 for (i = 0; i < arg->num_ssids; ++i) {
2786 ssid->ssid_len = cpu_to_le32(arg->ssid[i].ssid_len);
2787 memcpy(ssid->ssid, arg->ssid[i].ssid,
2788 arg->ssid[i].ssid_len);
2789 ssid++;
2790 }
2791 }
2792
2793 ptr += (arg->num_ssids * sizeof(*ssid));
2794 len = arg->num_bssid * sizeof(*bssid);
2795 #if defined(__linux__)
2796 tlv = ptr;
2797 #elif defined(__FreeBSD__)
2798 tlv = (void *)ptr;
2799 #endif
2800 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2801
2802 ptr += TLV_HDR_SIZE;
2803 #if defined(__linux__)
2804 bssid = ptr;
2805 #elif defined(__FreeBSD__)
2806 bssid = (void *)ptr;
2807 #endif
2808
2809 if (arg->num_bssid) {
2810 for (i = 0; i < arg->num_bssid; ++i) {
2811 ether_addr_copy(bssid->addr,
2812 arg->bssid_list[i].addr);
2813 bssid++;
2814 }
2815 }
2816
2817 ptr += arg->num_bssid * sizeof(*bssid);
2818
2819 len = extraie_len_with_pad;
2820 #if defined(__linux__)
2821 tlv = ptr;
2822 #elif defined(__FreeBSD__)
2823 tlv = (void *)ptr;
2824 #endif
2825 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len);
2826 ptr += TLV_HDR_SIZE;
2827
2828 if (extraie_len_with_pad)
2829 memcpy(ptr, arg->extraie.ptr,
2830 arg->extraie.len);
2831
2832 ptr += extraie_len_with_pad;
2833
2834 if (arg->num_hint_s_ssid) {
2835 len = arg->num_hint_s_ssid * sizeof(*s_ssid);
2836 #if defined(__linux__)
2837 tlv = ptr;
2838 #elif defined(__FreeBSD__)
2839 tlv = (void *)ptr;
2840 #endif
2841 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2842 ptr += TLV_HDR_SIZE;
2843 #if defined(__linux__)
2844 s_ssid = ptr;
2845 #elif defined(__FreeBSD__)
2846 s_ssid = (void *)ptr;
2847 #endif
2848 for (i = 0; i < arg->num_hint_s_ssid; ++i) {
2849 s_ssid->freq_flags = arg->hint_s_ssid[i].freq_flags;
2850 s_ssid->short_ssid = arg->hint_s_ssid[i].short_ssid;
2851 s_ssid++;
2852 }
2853 ptr += len;
2854 }
2855
2856 if (arg->num_hint_bssid) {
2857 len = arg->num_hint_bssid * sizeof(struct ath12k_wmi_hint_bssid_arg);
2858 #if defined(__linux__)
2859 tlv = ptr;
2860 #elif defined(__FreeBSD__)
2861 tlv = (void *)ptr;
2862 #endif
2863 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2864 ptr += TLV_HDR_SIZE;
2865 #if defined(__linux__)
2866 hint_bssid = ptr;
2867 #elif defined(__FreeBSD__)
2868 hint_bssid = (void *)ptr;
2869 #endif
2870 for (i = 0; i < arg->num_hint_bssid; ++i) {
2871 hint_bssid->freq_flags =
2872 arg->hint_bssid[i].freq_flags;
2873 ether_addr_copy(&arg->hint_bssid[i].bssid.addr[0],
2874 &hint_bssid->bssid.addr[0]);
2875 hint_bssid++;
2876 }
2877 }
2878
2879 ret = ath12k_wmi_cmd_send(wmi, skb,
2880 WMI_START_SCAN_CMDID);
2881 if (ret) {
2882 ath12k_warn(ar->ab, "failed to send WMI_START_SCAN_CMDID\n");
2883 dev_kfree_skb(skb);
2884 }
2885
2886 return ret;
2887 }
2888
ath12k_wmi_send_scan_stop_cmd(struct ath12k * ar,struct ath12k_wmi_scan_cancel_arg * arg)2889 int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar,
2890 struct ath12k_wmi_scan_cancel_arg *arg)
2891 {
2892 struct ath12k_wmi_pdev *wmi = ar->wmi;
2893 struct wmi_stop_scan_cmd *cmd;
2894 struct sk_buff *skb;
2895 int ret;
2896
2897 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2898 if (!skb)
2899 return -ENOMEM;
2900
2901 cmd = (struct wmi_stop_scan_cmd *)skb->data;
2902
2903 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STOP_SCAN_CMD,
2904 sizeof(*cmd));
2905
2906 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2907 cmd->requestor = cpu_to_le32(arg->requester);
2908 cmd->scan_id = cpu_to_le32(arg->scan_id);
2909 cmd->pdev_id = cpu_to_le32(arg->pdev_id);
2910 /* stop the scan with the corresponding scan_id */
2911 if (arg->req_type == WLAN_SCAN_CANCEL_PDEV_ALL) {
2912 /* Cancelling all scans */
2913 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_ALL);
2914 } else if (arg->req_type == WLAN_SCAN_CANCEL_VDEV_ALL) {
2915 /* Cancelling VAP scans */
2916 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_VAP_ALL);
2917 } else if (arg->req_type == WLAN_SCAN_CANCEL_SINGLE) {
2918 /* Cancelling specific scan */
2919 cmd->req_type = WMI_SCAN_STOP_ONE;
2920 } else {
2921 ath12k_warn(ar->ab, "invalid scan cancel req_type %d",
2922 arg->req_type);
2923 dev_kfree_skb(skb);
2924 return -EINVAL;
2925 }
2926
2927 ret = ath12k_wmi_cmd_send(wmi, skb,
2928 WMI_STOP_SCAN_CMDID);
2929 if (ret) {
2930 ath12k_warn(ar->ab, "failed to send WMI_STOP_SCAN_CMDID\n");
2931 dev_kfree_skb(skb);
2932 }
2933
2934 return ret;
2935 }
2936
ath12k_wmi_send_scan_chan_list_cmd(struct ath12k * ar,struct ath12k_wmi_scan_chan_list_arg * arg)2937 int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar,
2938 struct ath12k_wmi_scan_chan_list_arg *arg)
2939 {
2940 struct ath12k_wmi_pdev *wmi = ar->wmi;
2941 struct wmi_scan_chan_list_cmd *cmd;
2942 struct sk_buff *skb;
2943 struct ath12k_wmi_channel_params *chan_info;
2944 struct ath12k_wmi_channel_arg *channel_arg;
2945 struct wmi_tlv *tlv;
2946 #if defined(__linux__)
2947 void *ptr;
2948 #elif defined(__FreeBSD__)
2949 u8 *ptr;
2950 #endif
2951 int i, ret, len;
2952 u16 num_send_chans, num_sends = 0, max_chan_limit = 0;
2953 __le32 *reg1, *reg2;
2954
2955 channel_arg = &arg->channel[0];
2956 while (arg->nallchans) {
2957 len = sizeof(*cmd) + TLV_HDR_SIZE;
2958 max_chan_limit = (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len) /
2959 sizeof(*chan_info);
2960
2961 num_send_chans = min3(arg->nallchans, max_chan_limit,
2962 ATH12K_WMI_MAX_NUM_CHAN_PER_CMD);
2963
2964 arg->nallchans -= num_send_chans;
2965 len += sizeof(*chan_info) * num_send_chans;
2966
2967 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2968 if (!skb)
2969 return -ENOMEM;
2970
2971 cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
2972 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SCAN_CHAN_LIST_CMD,
2973 sizeof(*cmd));
2974 cmd->pdev_id = cpu_to_le32(arg->pdev_id);
2975 cmd->num_scan_chans = cpu_to_le32(num_send_chans);
2976 if (num_sends)
2977 cmd->flags |= cpu_to_le32(WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG);
2978
2979 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2980 "WMI no.of chan = %d len = %d pdev_id = %d num_sends = %d\n",
2981 num_send_chans, len, cmd->pdev_id, num_sends);
2982
2983 ptr = skb->data + sizeof(*cmd);
2984
2985 len = sizeof(*chan_info) * num_send_chans;
2986 #if defined(__linux__)
2987 tlv = ptr;
2988 #elif defined(__FreeBSD__)
2989 tlv = (void *)ptr;
2990 #endif
2991 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_STRUCT,
2992 len);
2993 ptr += TLV_HDR_SIZE;
2994
2995 for (i = 0; i < num_send_chans; ++i) {
2996 #if defined(__linux__)
2997 chan_info = ptr;
2998 #elif defined(__FreeBSD__)
2999 chan_info = (void *)ptr;
3000 #endif
3001 memset(chan_info, 0, sizeof(*chan_info));
3002 len = sizeof(*chan_info);
3003 chan_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL,
3004 len);
3005
3006 reg1 = &chan_info->reg_info_1;
3007 reg2 = &chan_info->reg_info_2;
3008 chan_info->mhz = cpu_to_le32(channel_arg->mhz);
3009 chan_info->band_center_freq1 = cpu_to_le32(channel_arg->cfreq1);
3010 chan_info->band_center_freq2 = cpu_to_le32(channel_arg->cfreq2);
3011
3012 if (channel_arg->is_chan_passive)
3013 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE);
3014 if (channel_arg->allow_he)
3015 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE);
3016 else if (channel_arg->allow_vht)
3017 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT);
3018 else if (channel_arg->allow_ht)
3019 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT);
3020 if (channel_arg->half_rate)
3021 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_HALF_RATE);
3022 if (channel_arg->quarter_rate)
3023 chan_info->info |=
3024 cpu_to_le32(WMI_CHAN_INFO_QUARTER_RATE);
3025
3026 if (channel_arg->psc_channel)
3027 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PSC);
3028
3029 if (channel_arg->dfs_set)
3030 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_DFS);
3031
3032 chan_info->info |= le32_encode_bits(channel_arg->phy_mode,
3033 WMI_CHAN_INFO_MODE);
3034 *reg1 |= le32_encode_bits(channel_arg->minpower,
3035 WMI_CHAN_REG_INFO1_MIN_PWR);
3036 *reg1 |= le32_encode_bits(channel_arg->maxpower,
3037 WMI_CHAN_REG_INFO1_MAX_PWR);
3038 *reg1 |= le32_encode_bits(channel_arg->maxregpower,
3039 WMI_CHAN_REG_INFO1_MAX_REG_PWR);
3040 *reg1 |= le32_encode_bits(channel_arg->reg_class_id,
3041 WMI_CHAN_REG_INFO1_REG_CLS);
3042 *reg2 |= le32_encode_bits(channel_arg->antennamax,
3043 WMI_CHAN_REG_INFO2_ANT_MAX);
3044 *reg2 |= le32_encode_bits(channel_arg->maxregpower,
3045 WMI_CHAN_REG_INFO2_MAX_TX_PWR);
3046
3047 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3048 "WMI chan scan list chan[%d] = %u, chan_info->info %8x\n",
3049 i, chan_info->mhz, chan_info->info);
3050
3051 ptr += sizeof(*chan_info);
3052
3053 channel_arg++;
3054 }
3055
3056 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SCAN_CHAN_LIST_CMDID);
3057 if (ret) {
3058 ath12k_warn(ar->ab, "failed to send WMI_SCAN_CHAN_LIST cmd\n");
3059 dev_kfree_skb(skb);
3060 return ret;
3061 }
3062
3063 num_sends++;
3064 }
3065
3066 return 0;
3067 }
3068
ath12k_wmi_send_wmm_update_cmd(struct ath12k * ar,u32 vdev_id,struct wmi_wmm_params_all_arg * param)3069 int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id,
3070 struct wmi_wmm_params_all_arg *param)
3071 {
3072 struct ath12k_wmi_pdev *wmi = ar->wmi;
3073 struct wmi_vdev_set_wmm_params_cmd *cmd;
3074 struct wmi_wmm_params *wmm_param;
3075 struct wmi_wmm_params_arg *wmi_wmm_arg;
3076 struct sk_buff *skb;
3077 int ret, ac;
3078
3079 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3080 if (!skb)
3081 return -ENOMEM;
3082
3083 cmd = (struct wmi_vdev_set_wmm_params_cmd *)skb->data;
3084 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
3085 sizeof(*cmd));
3086
3087 cmd->vdev_id = cpu_to_le32(vdev_id);
3088 cmd->wmm_param_type = 0;
3089
3090 for (ac = 0; ac < WME_NUM_AC; ac++) {
3091 switch (ac) {
3092 case WME_AC_BE:
3093 wmi_wmm_arg = ¶m->ac_be;
3094 break;
3095 case WME_AC_BK:
3096 wmi_wmm_arg = ¶m->ac_bk;
3097 break;
3098 case WME_AC_VI:
3099 wmi_wmm_arg = ¶m->ac_vi;
3100 break;
3101 case WME_AC_VO:
3102 wmi_wmm_arg = ¶m->ac_vo;
3103 break;
3104 }
3105
3106 wmm_param = (struct wmi_wmm_params *)&cmd->wmm_params[ac];
3107 wmm_param->tlv_header =
3108 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
3109 sizeof(*wmm_param));
3110
3111 wmm_param->aifs = cpu_to_le32(wmi_wmm_arg->aifs);
3112 wmm_param->cwmin = cpu_to_le32(wmi_wmm_arg->cwmin);
3113 wmm_param->cwmax = cpu_to_le32(wmi_wmm_arg->cwmax);
3114 wmm_param->txoplimit = cpu_to_le32(wmi_wmm_arg->txop);
3115 wmm_param->acm = cpu_to_le32(wmi_wmm_arg->acm);
3116 wmm_param->no_ack = cpu_to_le32(wmi_wmm_arg->no_ack);
3117
3118 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3119 "wmi wmm set ac %d aifs %d cwmin %d cwmax %d txop %d acm %d no_ack %d\n",
3120 ac, wmm_param->aifs, wmm_param->cwmin,
3121 wmm_param->cwmax, wmm_param->txoplimit,
3122 wmm_param->acm, wmm_param->no_ack);
3123 }
3124 ret = ath12k_wmi_cmd_send(wmi, skb,
3125 WMI_VDEV_SET_WMM_PARAMS_CMDID);
3126 if (ret) {
3127 ath12k_warn(ar->ab,
3128 "failed to send WMI_VDEV_SET_WMM_PARAMS_CMDID");
3129 dev_kfree_skb(skb);
3130 }
3131
3132 return ret;
3133 }
3134
ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k * ar,u32 pdev_id)3135 int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar,
3136 u32 pdev_id)
3137 {
3138 struct ath12k_wmi_pdev *wmi = ar->wmi;
3139 struct wmi_dfs_phyerr_offload_cmd *cmd;
3140 struct sk_buff *skb;
3141 int ret;
3142
3143 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3144 if (!skb)
3145 return -ENOMEM;
3146
3147 cmd = (struct wmi_dfs_phyerr_offload_cmd *)skb->data;
3148 cmd->tlv_header =
3149 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD,
3150 sizeof(*cmd));
3151
3152 cmd->pdev_id = cpu_to_le32(pdev_id);
3153
3154 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3155 "WMI dfs phy err offload enable pdev id %d\n", pdev_id);
3156
3157 ret = ath12k_wmi_cmd_send(wmi, skb,
3158 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID);
3159 if (ret) {
3160 ath12k_warn(ar->ab,
3161 "failed to send WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE cmd\n");
3162 dev_kfree_skb(skb);
3163 }
3164
3165 return ret;
3166 }
3167
ath12k_wmi_set_bios_cmd(struct ath12k_base * ab,u32 param_id,const u8 * buf,size_t buf_len)3168 int ath12k_wmi_set_bios_cmd(struct ath12k_base *ab, u32 param_id,
3169 const u8 *buf, size_t buf_len)
3170 {
3171 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
3172 struct wmi_pdev_set_bios_interface_cmd *cmd;
3173 struct wmi_tlv *tlv;
3174 struct sk_buff *skb;
3175 u8 *ptr;
3176 u32 len, len_aligned;
3177 int ret;
3178
3179 len_aligned = roundup(buf_len, sizeof(u32));
3180 len = sizeof(*cmd) + TLV_HDR_SIZE + len_aligned;
3181
3182 skb = ath12k_wmi_alloc_skb(wmi_ab, len);
3183 if (!skb)
3184 return -ENOMEM;
3185
3186 cmd = (struct wmi_pdev_set_bios_interface_cmd *)skb->data;
3187 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_INTERFACE_CMD,
3188 sizeof(*cmd));
3189 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC);
3190 cmd->param_type_id = cpu_to_le32(param_id);
3191 cmd->length = cpu_to_le32(buf_len);
3192
3193 ptr = skb->data + sizeof(*cmd);
3194 tlv = (struct wmi_tlv *)ptr;
3195 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len_aligned);
3196 ptr += TLV_HDR_SIZE;
3197 memcpy(ptr, buf, buf_len);
3198
3199 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0],
3200 skb,
3201 WMI_PDEV_SET_BIOS_INTERFACE_CMDID);
3202 if (ret) {
3203 ath12k_warn(ab,
3204 "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID parameter id %d: %d\n",
3205 param_id, ret);
3206 dev_kfree_skb(skb);
3207 }
3208
3209 return 0;
3210 }
3211
ath12k_wmi_set_bios_sar_cmd(struct ath12k_base * ab,const u8 * psar_table)3212 int ath12k_wmi_set_bios_sar_cmd(struct ath12k_base *ab, const u8 *psar_table)
3213 {
3214 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
3215 struct wmi_pdev_set_bios_sar_table_cmd *cmd;
3216 struct wmi_tlv *tlv;
3217 struct sk_buff *skb;
3218 int ret;
3219 u8 *buf_ptr;
3220 u32 len, sar_table_len_aligned, sar_dbs_backoff_len_aligned;
3221 const u8 *psar_value = psar_table + ATH12K_ACPI_POWER_LIMIT_DATA_OFFSET;
3222 const u8 *pdbs_value = psar_table + ATH12K_ACPI_DBS_BACKOFF_DATA_OFFSET;
3223
3224 sar_table_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_TABLE_LEN, sizeof(u32));
3225 sar_dbs_backoff_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN,
3226 sizeof(u32));
3227 len = sizeof(*cmd) + TLV_HDR_SIZE + sar_table_len_aligned +
3228 TLV_HDR_SIZE + sar_dbs_backoff_len_aligned;
3229
3230 skb = ath12k_wmi_alloc_skb(wmi_ab, len);
3231 if (!skb)
3232 return -ENOMEM;
3233
3234 cmd = (struct wmi_pdev_set_bios_sar_table_cmd *)skb->data;
3235 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD,
3236 sizeof(*cmd));
3237 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC);
3238 cmd->sar_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_TABLE_LEN);
3239 cmd->dbs_backoff_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN);
3240
3241 buf_ptr = skb->data + sizeof(*cmd);
3242 tlv = (struct wmi_tlv *)buf_ptr;
3243 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE,
3244 sar_table_len_aligned);
3245 buf_ptr += TLV_HDR_SIZE;
3246 memcpy(buf_ptr, psar_value, ATH12K_ACPI_BIOS_SAR_TABLE_LEN);
3247
3248 buf_ptr += sar_table_len_aligned;
3249 tlv = (struct wmi_tlv *)buf_ptr;
3250 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE,
3251 sar_dbs_backoff_len_aligned);
3252 buf_ptr += TLV_HDR_SIZE;
3253 memcpy(buf_ptr, pdbs_value, ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN);
3254
3255 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0],
3256 skb,
3257 WMI_PDEV_SET_BIOS_SAR_TABLE_CMDID);
3258 if (ret) {
3259 ath12k_warn(ab,
3260 "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID %d\n",
3261 ret);
3262 dev_kfree_skb(skb);
3263 }
3264
3265 return ret;
3266 }
3267
ath12k_wmi_set_bios_geo_cmd(struct ath12k_base * ab,const u8 * pgeo_table)3268 int ath12k_wmi_set_bios_geo_cmd(struct ath12k_base *ab, const u8 *pgeo_table)
3269 {
3270 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
3271 struct wmi_pdev_set_bios_geo_table_cmd *cmd;
3272 struct wmi_tlv *tlv;
3273 struct sk_buff *skb;
3274 int ret;
3275 u8 *buf_ptr;
3276 u32 len, sar_geo_len_aligned;
3277 const u8 *pgeo_value = pgeo_table + ATH12K_ACPI_GEO_OFFSET_DATA_OFFSET;
3278
3279 sar_geo_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN, sizeof(u32));
3280 len = sizeof(*cmd) + TLV_HDR_SIZE + sar_geo_len_aligned;
3281
3282 skb = ath12k_wmi_alloc_skb(wmi_ab, len);
3283 if (!skb)
3284 return -ENOMEM;
3285
3286 cmd = (struct wmi_pdev_set_bios_geo_table_cmd *)skb->data;
3287 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD,
3288 sizeof(*cmd));
3289 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC);
3290 cmd->geo_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN);
3291
3292 buf_ptr = skb->data + sizeof(*cmd);
3293 tlv = (struct wmi_tlv *)buf_ptr;
3294 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, sar_geo_len_aligned);
3295 buf_ptr += TLV_HDR_SIZE;
3296 memcpy(buf_ptr, pgeo_value, ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN);
3297
3298 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0],
3299 skb,
3300 WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID);
3301 if (ret) {
3302 ath12k_warn(ab,
3303 "failed to send WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID %d\n",
3304 ret);
3305 dev_kfree_skb(skb);
3306 }
3307
3308 return ret;
3309 }
3310
ath12k_wmi_delba_send(struct ath12k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 initiator,u32 reason)3311 int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac,
3312 u32 tid, u32 initiator, u32 reason)
3313 {
3314 struct ath12k_wmi_pdev *wmi = ar->wmi;
3315 struct wmi_delba_send_cmd *cmd;
3316 struct sk_buff *skb;
3317 int ret;
3318
3319 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3320 if (!skb)
3321 return -ENOMEM;
3322
3323 cmd = (struct wmi_delba_send_cmd *)skb->data;
3324 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DELBA_SEND_CMD,
3325 sizeof(*cmd));
3326 cmd->vdev_id = cpu_to_le32(vdev_id);
3327 ether_addr_copy(cmd->peer_macaddr.addr, mac);
3328 cmd->tid = cpu_to_le32(tid);
3329 cmd->initiator = cpu_to_le32(initiator);
3330 cmd->reasoncode = cpu_to_le32(reason);
3331
3332 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3333 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
3334 vdev_id, mac, tid, initiator, reason);
3335
3336 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_DELBA_SEND_CMDID);
3337
3338 if (ret) {
3339 ath12k_warn(ar->ab,
3340 "failed to send WMI_DELBA_SEND_CMDID cmd\n");
3341 dev_kfree_skb(skb);
3342 }
3343
3344 return ret;
3345 }
3346
ath12k_wmi_addba_set_resp(struct ath12k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 status)3347 int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac,
3348 u32 tid, u32 status)
3349 {
3350 struct ath12k_wmi_pdev *wmi = ar->wmi;
3351 struct wmi_addba_setresponse_cmd *cmd;
3352 struct sk_buff *skb;
3353 int ret;
3354
3355 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3356 if (!skb)
3357 return -ENOMEM;
3358
3359 cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
3360 cmd->tlv_header =
3361 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SETRESPONSE_CMD,
3362 sizeof(*cmd));
3363 cmd->vdev_id = cpu_to_le32(vdev_id);
3364 ether_addr_copy(cmd->peer_macaddr.addr, mac);
3365 cmd->tid = cpu_to_le32(tid);
3366 cmd->statuscode = cpu_to_le32(status);
3367
3368 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3369 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
3370 vdev_id, mac, tid, status);
3371
3372 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SET_RESP_CMDID);
3373
3374 if (ret) {
3375 ath12k_warn(ar->ab,
3376 "failed to send WMI_ADDBA_SET_RESP_CMDID cmd\n");
3377 dev_kfree_skb(skb);
3378 }
3379
3380 return ret;
3381 }
3382
ath12k_wmi_addba_send(struct ath12k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 buf_size)3383 int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac,
3384 u32 tid, u32 buf_size)
3385 {
3386 struct ath12k_wmi_pdev *wmi = ar->wmi;
3387 struct wmi_addba_send_cmd *cmd;
3388 struct sk_buff *skb;
3389 int ret;
3390
3391 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3392 if (!skb)
3393 return -ENOMEM;
3394
3395 cmd = (struct wmi_addba_send_cmd *)skb->data;
3396 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SEND_CMD,
3397 sizeof(*cmd));
3398 cmd->vdev_id = cpu_to_le32(vdev_id);
3399 ether_addr_copy(cmd->peer_macaddr.addr, mac);
3400 cmd->tid = cpu_to_le32(tid);
3401 cmd->buffersize = cpu_to_le32(buf_size);
3402
3403 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3404 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
3405 vdev_id, mac, tid, buf_size);
3406
3407 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SEND_CMDID);
3408
3409 if (ret) {
3410 ath12k_warn(ar->ab,
3411 "failed to send WMI_ADDBA_SEND_CMDID cmd\n");
3412 dev_kfree_skb(skb);
3413 }
3414
3415 return ret;
3416 }
3417
ath12k_wmi_addba_clear_resp(struct ath12k * ar,u32 vdev_id,const u8 * mac)3418 int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac)
3419 {
3420 struct ath12k_wmi_pdev *wmi = ar->wmi;
3421 struct wmi_addba_clear_resp_cmd *cmd;
3422 struct sk_buff *skb;
3423 int ret;
3424
3425 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3426 if (!skb)
3427 return -ENOMEM;
3428
3429 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
3430 cmd->tlv_header =
3431 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_CLEAR_RESP_CMD,
3432 sizeof(*cmd));
3433 cmd->vdev_id = cpu_to_le32(vdev_id);
3434 ether_addr_copy(cmd->peer_macaddr.addr, mac);
3435
3436 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3437 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
3438 vdev_id, mac);
3439
3440 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_CLEAR_RESP_CMDID);
3441
3442 if (ret) {
3443 ath12k_warn(ar->ab,
3444 "failed to send WMI_ADDBA_CLEAR_RESP_CMDID cmd\n");
3445 dev_kfree_skb(skb);
3446 }
3447
3448 return ret;
3449 }
3450
ath12k_wmi_send_init_country_cmd(struct ath12k * ar,struct ath12k_wmi_init_country_arg * arg)3451 int ath12k_wmi_send_init_country_cmd(struct ath12k *ar,
3452 struct ath12k_wmi_init_country_arg *arg)
3453 {
3454 struct ath12k_wmi_pdev *wmi = ar->wmi;
3455 struct wmi_init_country_cmd *cmd;
3456 struct sk_buff *skb;
3457 int ret;
3458
3459 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3460 if (!skb)
3461 return -ENOMEM;
3462
3463 cmd = (struct wmi_init_country_cmd *)skb->data;
3464 cmd->tlv_header =
3465 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_INIT_COUNTRY_CMD,
3466 sizeof(*cmd));
3467
3468 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
3469
3470 switch (arg->flags) {
3471 case ALPHA_IS_SET:
3472 cmd->init_cc_type = WMI_COUNTRY_INFO_TYPE_ALPHA;
3473 memcpy(&cmd->cc_info.alpha2, arg->cc_info.alpha2, 3);
3474 break;
3475 case CC_IS_SET:
3476 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE);
3477 cmd->cc_info.country_code =
3478 cpu_to_le32(arg->cc_info.country_code);
3479 break;
3480 case REGDMN_IS_SET:
3481 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_REGDOMAIN);
3482 cmd->cc_info.regdom_id = cpu_to_le32(arg->cc_info.regdom_id);
3483 break;
3484 default:
3485 ret = -EINVAL;
3486 goto out;
3487 }
3488
3489 ret = ath12k_wmi_cmd_send(wmi, skb,
3490 WMI_SET_INIT_COUNTRY_CMDID);
3491
3492 out:
3493 if (ret) {
3494 ath12k_warn(ar->ab,
3495 "failed to send WMI_SET_INIT_COUNTRY CMD :%d\n",
3496 ret);
3497 dev_kfree_skb(skb);
3498 }
3499
3500 return ret;
3501 }
3502
ath12k_wmi_send_set_current_country_cmd(struct ath12k * ar,struct wmi_set_current_country_arg * arg)3503 int ath12k_wmi_send_set_current_country_cmd(struct ath12k *ar,
3504 struct wmi_set_current_country_arg *arg)
3505 {
3506 struct ath12k_wmi_pdev *wmi = ar->wmi;
3507 struct wmi_set_current_country_cmd *cmd;
3508 struct sk_buff *skb;
3509 int ret;
3510
3511 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3512 if (!skb)
3513 return -ENOMEM;
3514
3515 cmd = (struct wmi_set_current_country_cmd *)skb->data;
3516 cmd->tlv_header =
3517 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_CURRENT_COUNTRY_CMD,
3518 sizeof(*cmd));
3519
3520 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
3521 memcpy(&cmd->new_alpha2, &arg->alpha2, sizeof(arg->alpha2));
3522 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SET_CURRENT_COUNTRY_CMDID);
3523
3524 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3525 "set current country pdev id %d alpha2 %c%c\n",
3526 ar->pdev->pdev_id,
3527 arg->alpha2[0],
3528 arg->alpha2[1]);
3529
3530 if (ret) {
3531 ath12k_warn(ar->ab,
3532 "failed to send WMI_SET_CURRENT_COUNTRY_CMDID: %d\n", ret);
3533 dev_kfree_skb(skb);
3534 }
3535
3536 return ret;
3537 }
3538
ath12k_wmi_send_11d_scan_start_cmd(struct ath12k * ar,struct wmi_11d_scan_start_arg * arg)3539 int ath12k_wmi_send_11d_scan_start_cmd(struct ath12k *ar,
3540 struct wmi_11d_scan_start_arg *arg)
3541 {
3542 struct ath12k_wmi_pdev *wmi = ar->wmi;
3543 struct wmi_11d_scan_start_cmd *cmd;
3544 struct sk_buff *skb;
3545 int ret;
3546
3547 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3548 if (!skb)
3549 return -ENOMEM;
3550
3551 cmd = (struct wmi_11d_scan_start_cmd *)skb->data;
3552 cmd->tlv_header =
3553 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_11D_SCAN_START_CMD,
3554 sizeof(*cmd));
3555
3556 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
3557 cmd->scan_period_msec = cpu_to_le32(arg->scan_period_msec);
3558 cmd->start_interval_msec = cpu_to_le32(arg->start_interval_msec);
3559 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_11D_SCAN_START_CMDID);
3560
3561 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3562 "send 11d scan start vdev id %d period %d ms internal %d ms\n",
3563 arg->vdev_id, arg->scan_period_msec,
3564 arg->start_interval_msec);
3565
3566 if (ret) {
3567 ath12k_warn(ar->ab,
3568 "failed to send WMI_11D_SCAN_START_CMDID: %d\n", ret);
3569 dev_kfree_skb(skb);
3570 }
3571
3572 return ret;
3573 }
3574
ath12k_wmi_send_11d_scan_stop_cmd(struct ath12k * ar,u32 vdev_id)3575 int ath12k_wmi_send_11d_scan_stop_cmd(struct ath12k *ar, u32 vdev_id)
3576 {
3577 struct ath12k_wmi_pdev *wmi = ar->wmi;
3578 struct wmi_11d_scan_stop_cmd *cmd;
3579 struct sk_buff *skb;
3580 int ret;
3581
3582 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3583 if (!skb)
3584 return -ENOMEM;
3585
3586 cmd = (struct wmi_11d_scan_stop_cmd *)skb->data;
3587 cmd->tlv_header =
3588 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_11D_SCAN_STOP_CMD,
3589 sizeof(*cmd));
3590
3591 cmd->vdev_id = cpu_to_le32(vdev_id);
3592 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_11D_SCAN_STOP_CMDID);
3593
3594 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3595 "send 11d scan stop vdev id %d\n",
3596 cmd->vdev_id);
3597
3598 if (ret) {
3599 ath12k_warn(ar->ab,
3600 "failed to send WMI_11D_SCAN_STOP_CMDID: %d\n", ret);
3601 dev_kfree_skb(skb);
3602 }
3603
3604 return ret;
3605 }
3606
3607 int
ath12k_wmi_send_twt_enable_cmd(struct ath12k * ar,u32 pdev_id)3608 ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id)
3609 {
3610 struct ath12k_wmi_pdev *wmi = ar->wmi;
3611 struct ath12k_base *ab = wmi->wmi_ab->ab;
3612 struct wmi_twt_enable_params_cmd *cmd;
3613 struct sk_buff *skb;
3614 int ret, len;
3615
3616 len = sizeof(*cmd);
3617
3618 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3619 if (!skb)
3620 return -ENOMEM;
3621
3622 cmd = (struct wmi_twt_enable_params_cmd *)skb->data;
3623 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_ENABLE_CMD,
3624 len);
3625 cmd->pdev_id = cpu_to_le32(pdev_id);
3626 cmd->sta_cong_timer_ms = cpu_to_le32(ATH12K_TWT_DEF_STA_CONG_TIMER_MS);
3627 cmd->default_slot_size = cpu_to_le32(ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE);
3628 cmd->congestion_thresh_setup =
3629 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP);
3630 cmd->congestion_thresh_teardown =
3631 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN);
3632 cmd->congestion_thresh_critical =
3633 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL);
3634 cmd->interference_thresh_teardown =
3635 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN);
3636 cmd->interference_thresh_setup =
3637 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP);
3638 cmd->min_no_sta_setup = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_SETUP);
3639 cmd->min_no_sta_teardown = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN);
3640 cmd->no_of_bcast_mcast_slots =
3641 cpu_to_le32(ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS);
3642 cmd->min_no_twt_slots = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS);
3643 cmd->max_no_sta_twt = cpu_to_le32(ATH12K_TWT_DEF_MAX_NO_STA_TWT);
3644 cmd->mode_check_interval = cpu_to_le32(ATH12K_TWT_DEF_MODE_CHECK_INTERVAL);
3645 cmd->add_sta_slot_interval = cpu_to_le32(ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL);
3646 cmd->remove_sta_slot_interval =
3647 cpu_to_le32(ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL);
3648 /* TODO add MBSSID support */
3649 cmd->mbss_support = 0;
3650
3651 ret = ath12k_wmi_cmd_send(wmi, skb,
3652 WMI_TWT_ENABLE_CMDID);
3653 if (ret) {
3654 ath12k_warn(ab, "Failed to send WMI_TWT_ENABLE_CMDID");
3655 dev_kfree_skb(skb);
3656 }
3657 return ret;
3658 }
3659
3660 int
ath12k_wmi_send_twt_disable_cmd(struct ath12k * ar,u32 pdev_id)3661 ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id)
3662 {
3663 struct ath12k_wmi_pdev *wmi = ar->wmi;
3664 struct ath12k_base *ab = wmi->wmi_ab->ab;
3665 struct wmi_twt_disable_params_cmd *cmd;
3666 struct sk_buff *skb;
3667 int ret, len;
3668
3669 len = sizeof(*cmd);
3670
3671 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3672 if (!skb)
3673 return -ENOMEM;
3674
3675 cmd = (struct wmi_twt_disable_params_cmd *)skb->data;
3676 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_DISABLE_CMD,
3677 len);
3678 cmd->pdev_id = cpu_to_le32(pdev_id);
3679
3680 ret = ath12k_wmi_cmd_send(wmi, skb,
3681 WMI_TWT_DISABLE_CMDID);
3682 if (ret) {
3683 ath12k_warn(ab, "Failed to send WMI_TWT_DISABLE_CMDID");
3684 dev_kfree_skb(skb);
3685 }
3686 return ret;
3687 }
3688
3689 int
ath12k_wmi_send_obss_spr_cmd(struct ath12k * ar,u32 vdev_id,struct ieee80211_he_obss_pd * he_obss_pd)3690 ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id,
3691 struct ieee80211_he_obss_pd *he_obss_pd)
3692 {
3693 struct ath12k_wmi_pdev *wmi = ar->wmi;
3694 struct ath12k_base *ab = wmi->wmi_ab->ab;
3695 struct wmi_obss_spatial_reuse_params_cmd *cmd;
3696 struct sk_buff *skb;
3697 int ret, len;
3698
3699 len = sizeof(*cmd);
3700
3701 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3702 if (!skb)
3703 return -ENOMEM;
3704
3705 cmd = (struct wmi_obss_spatial_reuse_params_cmd *)skb->data;
3706 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD,
3707 len);
3708 cmd->vdev_id = cpu_to_le32(vdev_id);
3709 cmd->enable = cpu_to_le32(he_obss_pd->enable);
3710 cmd->obss_min = a_cpu_to_sle32(he_obss_pd->min_offset);
3711 cmd->obss_max = a_cpu_to_sle32(he_obss_pd->max_offset);
3712
3713 ret = ath12k_wmi_cmd_send(wmi, skb,
3714 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID);
3715 if (ret) {
3716 ath12k_warn(ab,
3717 "Failed to send WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID");
3718 dev_kfree_skb(skb);
3719 }
3720 return ret;
3721 }
3722
ath12k_wmi_build_obss_pd(const struct ath12k_wmi_obss_pd_arg * arg)3723 u32 ath12k_wmi_build_obss_pd(const struct ath12k_wmi_obss_pd_arg *arg)
3724 {
3725 u32 param_val = 0;
3726
3727 param_val |= u32_encode_bits((u8)arg->srg_th, GENMASK(15, 8));
3728 param_val |= u32_encode_bits((u8)arg->non_srg_th, GENMASK(7, 0));
3729
3730 if (arg->srp_support)
3731 param_val |= ATH12K_OBSS_PD_THRESHOLD_IN_DBM;
3732
3733 if (arg->srg_enabled && arg->srp_support)
3734 param_val |= ATH12K_OBSS_PD_SRG_EN;
3735
3736 if (arg->non_srg_enabled)
3737 param_val |= ATH12K_OBSS_PD_NON_SRG_EN;
3738
3739 return param_val;
3740 }
3741
ath12k_wmi_pdev_set_obss_bitmap(struct ath12k * ar,const struct wmi_pdev_set_obss_bitmap_arg * arg)3742 static int ath12k_wmi_pdev_set_obss_bitmap(struct ath12k *ar,
3743 const struct wmi_pdev_set_obss_bitmap_arg *arg)
3744 {
3745 struct wmi_pdev_obss_pd_bitmap_cmd *cmd;
3746 struct ath12k_wmi_pdev *wmi = ar->wmi;
3747 const int len = sizeof(*cmd);
3748 struct sk_buff *skb;
3749 int ret;
3750
3751 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3752 if (!skb)
3753 return -ENOMEM;
3754
3755 cmd = (struct wmi_pdev_obss_pd_bitmap_cmd *)skb->data;
3756 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(arg->tlv_tag, len);
3757 cmd->pdev_id = cpu_to_le32(arg->pdev_id);
3758 memcpy(cmd->bitmap, arg->bitmap, sizeof(cmd->bitmap));
3759
3760 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3761 "wmi set pdev %u %s %08x %08x\n",
3762 arg->pdev_id, arg->label, arg->bitmap[0], arg->bitmap[1]);
3763
3764 ret = ath12k_wmi_cmd_send(wmi, skb, arg->cmd_id);
3765 if (ret) {
3766 ath12k_warn(ar->ab, "failed to send %s: %d\n", arg->label, ret);
3767 dev_kfree_skb(skb);
3768 }
3769
3770 return ret;
3771 }
3772
ath12k_wmi_pdev_set_srg_bss_color_bitmap(struct ath12k * ar,u32 pdev_id,const u32 * bitmap)3773 int ath12k_wmi_pdev_set_srg_bss_color_bitmap(struct ath12k *ar,
3774 u32 pdev_id, const u32 *bitmap)
3775 {
3776 struct wmi_pdev_set_obss_bitmap_arg arg = {
3777 .tlv_tag = WMI_TAG_PDEV_SRG_BSS_COLOR_BITMAP_CMD,
3778 .pdev_id = pdev_id,
3779 .cmd_id = WMI_PDEV_SET_SRG_BSS_COLOR_BITMAP_CMDID,
3780 .bitmap = bitmap,
3781 .label = "SRG bss color bitmap",
3782 };
3783
3784 return ath12k_wmi_pdev_set_obss_bitmap(ar, &arg);
3785 }
3786
ath12k_wmi_pdev_set_srg_partial_bssid_bitmap(struct ath12k * ar,u32 pdev_id,const u32 * bitmap)3787 int ath12k_wmi_pdev_set_srg_partial_bssid_bitmap(struct ath12k *ar,
3788 u32 pdev_id, const u32 *bitmap)
3789 {
3790 struct wmi_pdev_set_obss_bitmap_arg arg = {
3791 .tlv_tag = WMI_TAG_PDEV_SRG_PARTIAL_BSSID_BITMAP_CMD,
3792 .pdev_id = pdev_id,
3793 .cmd_id = WMI_PDEV_SET_SRG_PARTIAL_BSSID_BITMAP_CMDID,
3794 .bitmap = bitmap,
3795 .label = "SRG partial bssid bitmap",
3796 };
3797
3798 return ath12k_wmi_pdev_set_obss_bitmap(ar, &arg);
3799 }
3800
ath12k_wmi_pdev_srg_obss_color_enable_bitmap(struct ath12k * ar,u32 pdev_id,const u32 * bitmap)3801 int ath12k_wmi_pdev_srg_obss_color_enable_bitmap(struct ath12k *ar,
3802 u32 pdev_id, const u32 *bitmap)
3803 {
3804 struct wmi_pdev_set_obss_bitmap_arg arg = {
3805 .tlv_tag = WMI_TAG_PDEV_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD,
3806 .pdev_id = pdev_id,
3807 .cmd_id = WMI_PDEV_SET_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID,
3808 .bitmap = bitmap,
3809 .label = "SRG obss color enable bitmap",
3810 };
3811
3812 return ath12k_wmi_pdev_set_obss_bitmap(ar, &arg);
3813 }
3814
ath12k_wmi_pdev_srg_obss_bssid_enable_bitmap(struct ath12k * ar,u32 pdev_id,const u32 * bitmap)3815 int ath12k_wmi_pdev_srg_obss_bssid_enable_bitmap(struct ath12k *ar,
3816 u32 pdev_id, const u32 *bitmap)
3817 {
3818 struct wmi_pdev_set_obss_bitmap_arg arg = {
3819 .tlv_tag = WMI_TAG_PDEV_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD,
3820 .pdev_id = pdev_id,
3821 .cmd_id = WMI_PDEV_SET_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID,
3822 .bitmap = bitmap,
3823 .label = "SRG obss bssid enable bitmap",
3824 };
3825
3826 return ath12k_wmi_pdev_set_obss_bitmap(ar, &arg);
3827 }
3828
ath12k_wmi_pdev_non_srg_obss_color_enable_bitmap(struct ath12k * ar,u32 pdev_id,const u32 * bitmap)3829 int ath12k_wmi_pdev_non_srg_obss_color_enable_bitmap(struct ath12k *ar,
3830 u32 pdev_id, const u32 *bitmap)
3831 {
3832 struct wmi_pdev_set_obss_bitmap_arg arg = {
3833 .tlv_tag = WMI_TAG_PDEV_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD,
3834 .pdev_id = pdev_id,
3835 .cmd_id = WMI_PDEV_SET_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID,
3836 .bitmap = bitmap,
3837 .label = "non SRG obss color enable bitmap",
3838 };
3839
3840 return ath12k_wmi_pdev_set_obss_bitmap(ar, &arg);
3841 }
3842
ath12k_wmi_pdev_non_srg_obss_bssid_enable_bitmap(struct ath12k * ar,u32 pdev_id,const u32 * bitmap)3843 int ath12k_wmi_pdev_non_srg_obss_bssid_enable_bitmap(struct ath12k *ar,
3844 u32 pdev_id, const u32 *bitmap)
3845 {
3846 struct wmi_pdev_set_obss_bitmap_arg arg = {
3847 .tlv_tag = WMI_TAG_PDEV_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD,
3848 .pdev_id = pdev_id,
3849 .cmd_id = WMI_PDEV_SET_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID,
3850 .bitmap = bitmap,
3851 .label = "non SRG obss bssid enable bitmap",
3852 };
3853
3854 return ath12k_wmi_pdev_set_obss_bitmap(ar, &arg);
3855 }
3856
ath12k_wmi_obss_color_cfg_cmd(struct ath12k * ar,u32 vdev_id,u8 bss_color,u32 period,bool enable)3857 int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id,
3858 u8 bss_color, u32 period,
3859 bool enable)
3860 {
3861 struct ath12k_wmi_pdev *wmi = ar->wmi;
3862 struct ath12k_base *ab = wmi->wmi_ab->ab;
3863 struct wmi_obss_color_collision_cfg_params_cmd *cmd;
3864 struct sk_buff *skb;
3865 int ret, len;
3866
3867 len = sizeof(*cmd);
3868
3869 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3870 if (!skb)
3871 return -ENOMEM;
3872
3873 cmd = (struct wmi_obss_color_collision_cfg_params_cmd *)skb->data;
3874 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG,
3875 len);
3876 cmd->vdev_id = cpu_to_le32(vdev_id);
3877 cmd->evt_type = enable ? cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION) :
3878 cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE);
3879 cmd->current_bss_color = cpu_to_le32(bss_color);
3880 cmd->detection_period_ms = cpu_to_le32(period);
3881 cmd->scan_period_ms = cpu_to_le32(ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS);
3882 cmd->free_slot_expiry_time_ms = 0;
3883 cmd->flags = 0;
3884
3885 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3886 "wmi_send_obss_color_collision_cfg id %d type %d bss_color %d detect_period %d scan_period %d\n",
3887 cmd->vdev_id, cmd->evt_type, cmd->current_bss_color,
3888 cmd->detection_period_ms, cmd->scan_period_ms);
3889
3890 ret = ath12k_wmi_cmd_send(wmi, skb,
3891 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID);
3892 if (ret) {
3893 ath12k_warn(ab, "Failed to send WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID");
3894 dev_kfree_skb(skb);
3895 }
3896 return ret;
3897 }
3898
ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k * ar,u32 vdev_id,bool enable)3899 int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id,
3900 bool enable)
3901 {
3902 struct ath12k_wmi_pdev *wmi = ar->wmi;
3903 struct ath12k_base *ab = wmi->wmi_ab->ab;
3904 struct wmi_bss_color_change_enable_params_cmd *cmd;
3905 struct sk_buff *skb;
3906 int ret, len;
3907
3908 len = sizeof(*cmd);
3909
3910 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3911 if (!skb)
3912 return -ENOMEM;
3913
3914 cmd = (struct wmi_bss_color_change_enable_params_cmd *)skb->data;
3915 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BSS_COLOR_CHANGE_ENABLE,
3916 len);
3917 cmd->vdev_id = cpu_to_le32(vdev_id);
3918 cmd->enable = enable ? cpu_to_le32(1) : 0;
3919
3920 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3921 "wmi_send_bss_color_change_enable id %d enable %d\n",
3922 cmd->vdev_id, cmd->enable);
3923
3924 ret = ath12k_wmi_cmd_send(wmi, skb,
3925 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID);
3926 if (ret) {
3927 ath12k_warn(ab, "Failed to send WMI_BSS_COLOR_CHANGE_ENABLE_CMDID");
3928 dev_kfree_skb(skb);
3929 }
3930 return ret;
3931 }
3932
ath12k_wmi_fils_discovery_tmpl(struct ath12k * ar,u32 vdev_id,struct sk_buff * tmpl)3933 int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id,
3934 struct sk_buff *tmpl)
3935 {
3936 struct wmi_tlv *tlv;
3937 struct sk_buff *skb;
3938 void *ptr;
3939 int ret, len;
3940 size_t aligned_len;
3941 struct wmi_fils_discovery_tmpl_cmd *cmd;
3942
3943 aligned_len = roundup(tmpl->len, 4);
3944 len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len;
3945
3946 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3947 "WMI vdev %i set FILS discovery template\n", vdev_id);
3948
3949 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
3950 if (!skb)
3951 return -ENOMEM;
3952
3953 cmd = (struct wmi_fils_discovery_tmpl_cmd *)skb->data;
3954 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FILS_DISCOVERY_TMPL_CMD,
3955 sizeof(*cmd));
3956 cmd->vdev_id = cpu_to_le32(vdev_id);
3957 cmd->buf_len = cpu_to_le32(tmpl->len);
3958 ptr = skb->data + sizeof(*cmd);
3959
3960 tlv = ptr;
3961 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
3962 memcpy(tlv->value, tmpl->data, tmpl->len);
3963
3964 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_FILS_DISCOVERY_TMPL_CMDID);
3965 if (ret) {
3966 ath12k_warn(ar->ab,
3967 "WMI vdev %i failed to send FILS discovery template command\n",
3968 vdev_id);
3969 dev_kfree_skb(skb);
3970 }
3971 return ret;
3972 }
3973
ath12k_wmi_probe_resp_tmpl(struct ath12k * ar,u32 vdev_id,struct sk_buff * tmpl)3974 int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id,
3975 struct sk_buff *tmpl)
3976 {
3977 struct wmi_probe_tmpl_cmd *cmd;
3978 struct ath12k_wmi_bcn_prb_info_params *probe_info;
3979 struct wmi_tlv *tlv;
3980 struct sk_buff *skb;
3981 #if defined(__linux__)
3982 void *ptr;
3983 #elif defined(__FreeBSD__)
3984 u8 *ptr;
3985 #endif
3986 int ret, len;
3987 size_t aligned_len = roundup(tmpl->len, 4);
3988
3989 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3990 "WMI vdev %i set probe response template\n", vdev_id);
3991
3992 len = sizeof(*cmd) + sizeof(*probe_info) + TLV_HDR_SIZE + aligned_len;
3993
3994 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
3995 if (!skb)
3996 return -ENOMEM;
3997
3998 cmd = (struct wmi_probe_tmpl_cmd *)skb->data;
3999 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PRB_TMPL_CMD,
4000 sizeof(*cmd));
4001 cmd->vdev_id = cpu_to_le32(vdev_id);
4002 cmd->buf_len = cpu_to_le32(tmpl->len);
4003
4004 ptr = skb->data + sizeof(*cmd);
4005
4006 #if defined(__linux__)
4007 probe_info = ptr;
4008 #elif defined(__FreeBSD__)
4009 probe_info = (void *)ptr;
4010 #endif
4011 len = sizeof(*probe_info);
4012 probe_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO,
4013 len);
4014 probe_info->caps = 0;
4015 probe_info->erp = 0;
4016
4017 ptr += sizeof(*probe_info);
4018
4019 #if defined(__linux__)
4020 tlv = ptr;
4021 #elif defined(__FreeBSD__)
4022 tlv = (void *)ptr;
4023 #endif
4024 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
4025 memcpy(tlv->value, tmpl->data, tmpl->len);
4026
4027 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_PRB_TMPL_CMDID);
4028 if (ret) {
4029 ath12k_warn(ar->ab,
4030 "WMI vdev %i failed to send probe response template command\n",
4031 vdev_id);
4032 dev_kfree_skb(skb);
4033 }
4034 return ret;
4035 }
4036
ath12k_wmi_fils_discovery(struct ath12k * ar,u32 vdev_id,u32 interval,bool unsol_bcast_probe_resp_enabled)4037 int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval,
4038 bool unsol_bcast_probe_resp_enabled)
4039 {
4040 struct sk_buff *skb;
4041 int ret, len;
4042 struct wmi_fils_discovery_cmd *cmd;
4043
4044 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
4045 "WMI vdev %i set %s interval to %u TU\n",
4046 vdev_id, unsol_bcast_probe_resp_enabled ?
4047 "unsolicited broadcast probe response" : "FILS discovery",
4048 interval);
4049
4050 len = sizeof(*cmd);
4051 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
4052 if (!skb)
4053 return -ENOMEM;
4054
4055 cmd = (struct wmi_fils_discovery_cmd *)skb->data;
4056 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ENABLE_FILS_CMD,
4057 len);
4058 cmd->vdev_id = cpu_to_le32(vdev_id);
4059 cmd->interval = cpu_to_le32(interval);
4060 cmd->config = cpu_to_le32(unsol_bcast_probe_resp_enabled);
4061
4062 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_ENABLE_FILS_CMDID);
4063 if (ret) {
4064 ath12k_warn(ar->ab,
4065 "WMI vdev %i failed to send FILS discovery enable/disable command\n",
4066 vdev_id);
4067 dev_kfree_skb(skb);
4068 }
4069 return ret;
4070 }
4071
4072 static void
ath12k_wmi_obss_color_collision_event(struct ath12k_base * ab,struct sk_buff * skb)4073 ath12k_wmi_obss_color_collision_event(struct ath12k_base *ab, struct sk_buff *skb)
4074 {
4075 const struct wmi_obss_color_collision_event *ev;
4076 struct ath12k_link_vif *arvif;
4077 u32 vdev_id, evt_type;
4078 u64 bitmap;
4079
4080 const void **tb __free(kfree) = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
4081 if (IS_ERR(tb)) {
4082 ath12k_warn(ab, "failed to parse OBSS color collision tlv %ld\n",
4083 PTR_ERR(tb));
4084 return;
4085 }
4086
4087 ev = tb[WMI_TAG_OBSS_COLOR_COLLISION_EVT];
4088 if (!ev) {
4089 ath12k_warn(ab, "failed to fetch OBSS color collision event\n");
4090 return;
4091 }
4092
4093 vdev_id = le32_to_cpu(ev->vdev_id);
4094 evt_type = le32_to_cpu(ev->evt_type);
4095 bitmap = le64_to_cpu(ev->obss_color_bitmap);
4096
4097 guard(rcu)();
4098
4099 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_id);
4100 if (!arvif) {
4101 ath12k_warn(ab, "no arvif found for vdev %u in OBSS color collision event\n",
4102 vdev_id);
4103 return;
4104 }
4105
4106 switch (evt_type) {
4107 case WMI_BSS_COLOR_COLLISION_DETECTION:
4108 ieee80211_obss_color_collision_notify(arvif->ahvif->vif,
4109 bitmap,
4110 arvif->link_id);
4111 ath12k_dbg(ab, ATH12K_DBG_WMI,
4112 "obss color collision detected vdev %u event %d bitmap %016llx\n",
4113 vdev_id, evt_type, bitmap);
4114 break;
4115 case WMI_BSS_COLOR_COLLISION_DISABLE:
4116 case WMI_BSS_COLOR_FREE_SLOT_TIMER_EXPIRY:
4117 case WMI_BSS_COLOR_FREE_SLOT_AVAILABLE:
4118 break;
4119 default:
4120 ath12k_warn(ab, "unknown OBSS color collision event type %d\n", evt_type);
4121 }
4122 }
4123
4124 static void
ath12k_fill_band_to_mac_param(struct ath12k_base * soc,struct ath12k_wmi_pdev_band_arg * arg)4125 ath12k_fill_band_to_mac_param(struct ath12k_base *soc,
4126 struct ath12k_wmi_pdev_band_arg *arg)
4127 {
4128 u8 i;
4129 struct ath12k_wmi_hal_reg_capabilities_ext_arg *hal_reg_cap;
4130 struct ath12k_pdev *pdev;
4131
4132 for (i = 0; i < soc->num_radios; i++) {
4133 pdev = &soc->pdevs[i];
4134 hal_reg_cap = &soc->hal_reg_cap[i];
4135 arg[i].pdev_id = pdev->pdev_id;
4136
4137 switch (pdev->cap.supported_bands) {
4138 case WMI_HOST_WLAN_2GHZ_5GHZ_CAP:
4139 arg[i].start_freq = hal_reg_cap->low_2ghz_chan;
4140 arg[i].end_freq = hal_reg_cap->high_5ghz_chan;
4141 break;
4142 case WMI_HOST_WLAN_2GHZ_CAP:
4143 arg[i].start_freq = hal_reg_cap->low_2ghz_chan;
4144 arg[i].end_freq = hal_reg_cap->high_2ghz_chan;
4145 break;
4146 case WMI_HOST_WLAN_5GHZ_CAP:
4147 arg[i].start_freq = hal_reg_cap->low_5ghz_chan;
4148 arg[i].end_freq = hal_reg_cap->high_5ghz_chan;
4149 break;
4150 default:
4151 break;
4152 }
4153 }
4154 }
4155
4156 static void
ath12k_wmi_copy_resource_config(struct ath12k_base * ab,struct ath12k_wmi_resource_config_params * wmi_cfg,struct ath12k_wmi_resource_config_arg * tg_cfg)4157 ath12k_wmi_copy_resource_config(struct ath12k_base *ab,
4158 struct ath12k_wmi_resource_config_params *wmi_cfg,
4159 struct ath12k_wmi_resource_config_arg *tg_cfg)
4160 {
4161 wmi_cfg->num_vdevs = cpu_to_le32(tg_cfg->num_vdevs);
4162 wmi_cfg->num_peers = cpu_to_le32(tg_cfg->num_peers);
4163 wmi_cfg->num_offload_peers = cpu_to_le32(tg_cfg->num_offload_peers);
4164 wmi_cfg->num_offload_reorder_buffs =
4165 cpu_to_le32(tg_cfg->num_offload_reorder_buffs);
4166 wmi_cfg->num_peer_keys = cpu_to_le32(tg_cfg->num_peer_keys);
4167 wmi_cfg->num_tids = cpu_to_le32(tg_cfg->num_tids);
4168 wmi_cfg->ast_skid_limit = cpu_to_le32(tg_cfg->ast_skid_limit);
4169 wmi_cfg->tx_chain_mask = cpu_to_le32(tg_cfg->tx_chain_mask);
4170 wmi_cfg->rx_chain_mask = cpu_to_le32(tg_cfg->rx_chain_mask);
4171 wmi_cfg->rx_timeout_pri[0] = cpu_to_le32(tg_cfg->rx_timeout_pri[0]);
4172 wmi_cfg->rx_timeout_pri[1] = cpu_to_le32(tg_cfg->rx_timeout_pri[1]);
4173 wmi_cfg->rx_timeout_pri[2] = cpu_to_le32(tg_cfg->rx_timeout_pri[2]);
4174 wmi_cfg->rx_timeout_pri[3] = cpu_to_le32(tg_cfg->rx_timeout_pri[3]);
4175 wmi_cfg->rx_decap_mode = cpu_to_le32(tg_cfg->rx_decap_mode);
4176 wmi_cfg->scan_max_pending_req = cpu_to_le32(tg_cfg->scan_max_pending_req);
4177 wmi_cfg->bmiss_offload_max_vdev = cpu_to_le32(tg_cfg->bmiss_offload_max_vdev);
4178 wmi_cfg->roam_offload_max_vdev = cpu_to_le32(tg_cfg->roam_offload_max_vdev);
4179 wmi_cfg->roam_offload_max_ap_profiles =
4180 cpu_to_le32(tg_cfg->roam_offload_max_ap_profiles);
4181 wmi_cfg->num_mcast_groups = cpu_to_le32(tg_cfg->num_mcast_groups);
4182 wmi_cfg->num_mcast_table_elems = cpu_to_le32(tg_cfg->num_mcast_table_elems);
4183 wmi_cfg->mcast2ucast_mode = cpu_to_le32(tg_cfg->mcast2ucast_mode);
4184 wmi_cfg->tx_dbg_log_size = cpu_to_le32(tg_cfg->tx_dbg_log_size);
4185 wmi_cfg->num_wds_entries = cpu_to_le32(tg_cfg->num_wds_entries);
4186 wmi_cfg->dma_burst_size = cpu_to_le32(tg_cfg->dma_burst_size);
4187 wmi_cfg->mac_aggr_delim = cpu_to_le32(tg_cfg->mac_aggr_delim);
4188 wmi_cfg->rx_skip_defrag_timeout_dup_detection_check =
4189 cpu_to_le32(tg_cfg->rx_skip_defrag_timeout_dup_detection_check);
4190 wmi_cfg->vow_config = cpu_to_le32(tg_cfg->vow_config);
4191 wmi_cfg->gtk_offload_max_vdev = cpu_to_le32(tg_cfg->gtk_offload_max_vdev);
4192 wmi_cfg->num_msdu_desc = cpu_to_le32(tg_cfg->num_msdu_desc);
4193 wmi_cfg->max_frag_entries = cpu_to_le32(tg_cfg->max_frag_entries);
4194 wmi_cfg->num_tdls_vdevs = cpu_to_le32(tg_cfg->num_tdls_vdevs);
4195 wmi_cfg->num_tdls_conn_table_entries =
4196 cpu_to_le32(tg_cfg->num_tdls_conn_table_entries);
4197 wmi_cfg->beacon_tx_offload_max_vdev =
4198 cpu_to_le32(tg_cfg->beacon_tx_offload_max_vdev);
4199 wmi_cfg->num_multicast_filter_entries =
4200 cpu_to_le32(tg_cfg->num_multicast_filter_entries);
4201 wmi_cfg->num_wow_filters = cpu_to_le32(tg_cfg->num_wow_filters);
4202 wmi_cfg->num_keep_alive_pattern = cpu_to_le32(tg_cfg->num_keep_alive_pattern);
4203 wmi_cfg->keep_alive_pattern_size = cpu_to_le32(tg_cfg->keep_alive_pattern_size);
4204 wmi_cfg->max_tdls_concurrent_sleep_sta =
4205 cpu_to_le32(tg_cfg->max_tdls_concurrent_sleep_sta);
4206 wmi_cfg->max_tdls_concurrent_buffer_sta =
4207 cpu_to_le32(tg_cfg->max_tdls_concurrent_buffer_sta);
4208 wmi_cfg->wmi_send_separate = cpu_to_le32(tg_cfg->wmi_send_separate);
4209 wmi_cfg->num_ocb_vdevs = cpu_to_le32(tg_cfg->num_ocb_vdevs);
4210 wmi_cfg->num_ocb_channels = cpu_to_le32(tg_cfg->num_ocb_channels);
4211 wmi_cfg->num_ocb_schedules = cpu_to_le32(tg_cfg->num_ocb_schedules);
4212 wmi_cfg->bpf_instruction_size = cpu_to_le32(tg_cfg->bpf_instruction_size);
4213 wmi_cfg->max_bssid_rx_filters = cpu_to_le32(tg_cfg->max_bssid_rx_filters);
4214 wmi_cfg->use_pdev_id = cpu_to_le32(tg_cfg->use_pdev_id);
4215 wmi_cfg->flag1 = cpu_to_le32(tg_cfg->atf_config |
4216 WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 |
4217 WMI_RSRC_CFG_FLAG1_ACK_RSSI);
4218 wmi_cfg->peer_map_unmap_version = cpu_to_le32(tg_cfg->peer_map_unmap_version);
4219 wmi_cfg->sched_params = cpu_to_le32(tg_cfg->sched_params);
4220 wmi_cfg->twt_ap_pdev_count = cpu_to_le32(tg_cfg->twt_ap_pdev_count);
4221 wmi_cfg->twt_ap_sta_count = cpu_to_le32(tg_cfg->twt_ap_sta_count);
4222 wmi_cfg->flags2 = le32_encode_bits(tg_cfg->peer_metadata_ver,
4223 WMI_RSRC_CFG_FLAGS2_RX_PEER_METADATA_VERSION);
4224 wmi_cfg->host_service_flags = cpu_to_le32(tg_cfg->is_reg_cc_ext_event_supported <<
4225 WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT);
4226 if (ab->hw_params->reoq_lut_support)
4227 wmi_cfg->host_service_flags |=
4228 cpu_to_le32(1 << WMI_RSRC_CFG_HOST_SVC_FLAG_REO_QREF_SUPPORT_BIT);
4229 wmi_cfg->ema_max_vap_cnt = cpu_to_le32(tg_cfg->ema_max_vap_cnt);
4230 wmi_cfg->ema_max_profile_period = cpu_to_le32(tg_cfg->ema_max_profile_period);
4231 wmi_cfg->flags2 |= cpu_to_le32(WMI_RSRC_CFG_FLAGS2_CALC_NEXT_DTIM_COUNT_SET);
4232 }
4233
ath12k_init_cmd_send(struct ath12k_wmi_pdev * wmi,struct ath12k_wmi_init_cmd_arg * arg)4234 static int ath12k_init_cmd_send(struct ath12k_wmi_pdev *wmi,
4235 struct ath12k_wmi_init_cmd_arg *arg)
4236 {
4237 struct ath12k_base *ab = wmi->wmi_ab->ab;
4238 struct sk_buff *skb;
4239 struct wmi_init_cmd *cmd;
4240 struct ath12k_wmi_resource_config_params *cfg;
4241 struct ath12k_wmi_pdev_set_hw_mode_cmd *hw_mode;
4242 struct ath12k_wmi_pdev_band_to_mac_params *band_to_mac;
4243 struct ath12k_wmi_host_mem_chunk_params *host_mem_chunks;
4244 struct wmi_tlv *tlv;
4245 size_t ret, len;
4246 #if defined(__linux__)
4247 void *ptr;
4248 #elif defined(__FreeBSD__)
4249 u8 *ptr;
4250 #endif
4251 u32 hw_mode_len = 0;
4252 u16 idx;
4253
4254 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX)
4255 hw_mode_len = sizeof(*hw_mode) + TLV_HDR_SIZE +
4256 (arg->num_band_to_mac * sizeof(*band_to_mac));
4257
4258 len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*cfg) + hw_mode_len +
4259 (arg->num_mem_chunks ? (sizeof(*host_mem_chunks) * WMI_MAX_MEM_REQS) : 0);
4260
4261 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
4262 if (!skb)
4263 return -ENOMEM;
4264
4265 cmd = (struct wmi_init_cmd *)skb->data;
4266
4267 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_INIT_CMD,
4268 sizeof(*cmd));
4269
4270 ptr = skb->data + sizeof(*cmd);
4271 #if defined(__linux__)
4272 cfg = ptr;
4273 #elif defined(__FreeBSD__)
4274 cfg = (void *)ptr;
4275 #endif
4276
4277 ath12k_wmi_copy_resource_config(ab, cfg, &arg->res_cfg);
4278
4279 cfg->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_RESOURCE_CONFIG,
4280 sizeof(*cfg));
4281
4282 ptr += sizeof(*cfg);
4283 #if defined(__linux__)
4284 host_mem_chunks = ptr + TLV_HDR_SIZE;
4285 #elif defined(__FreeBSD__)
4286 host_mem_chunks = (void *)(ptr + TLV_HDR_SIZE);
4287 #endif
4288 len = sizeof(struct ath12k_wmi_host_mem_chunk_params);
4289
4290 for (idx = 0; idx < arg->num_mem_chunks; ++idx) {
4291 host_mem_chunks[idx].tlv_header =
4292 ath12k_wmi_tlv_hdr(WMI_TAG_WLAN_HOST_MEMORY_CHUNK,
4293 len);
4294
4295 host_mem_chunks[idx].ptr = cpu_to_le32(arg->mem_chunks[idx].paddr);
4296 host_mem_chunks[idx].size = cpu_to_le32(arg->mem_chunks[idx].len);
4297 host_mem_chunks[idx].req_id = cpu_to_le32(arg->mem_chunks[idx].req_id);
4298
4299 ath12k_dbg(ab, ATH12K_DBG_WMI,
4300 #if defined(__linux__)
4301 "WMI host mem chunk req_id %d paddr 0x%llx len %d\n",
4302 #elif defined(__FreeBSD__)
4303 "WMI host mem chunk req_id %d paddr 0x%jx len %d\n",
4304 #endif
4305 arg->mem_chunks[idx].req_id,
4306 #if defined(__linux__)
4307 (u64)arg->mem_chunks[idx].paddr,
4308 #elif defined(__FreeBSD__)
4309 (uintmax_t)arg->mem_chunks[idx].paddr,
4310 #endif
4311 arg->mem_chunks[idx].len);
4312 }
4313 cmd->num_host_mem_chunks = cpu_to_le32(arg->num_mem_chunks);
4314 len = sizeof(struct ath12k_wmi_host_mem_chunk_params) * arg->num_mem_chunks;
4315
4316 /* num_mem_chunks is zero */
4317 #if defined(__linux__)
4318 tlv = ptr;
4319 #elif defined(__FreeBSD__)
4320 tlv = (void *)ptr;
4321 #endif
4322 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
4323 ptr += TLV_HDR_SIZE + len;
4324
4325 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) {
4326 hw_mode = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)ptr;
4327 hw_mode->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD,
4328 sizeof(*hw_mode));
4329
4330 hw_mode->hw_mode_index = cpu_to_le32(arg->hw_mode_id);
4331 hw_mode->num_band_to_mac = cpu_to_le32(arg->num_band_to_mac);
4332
4333 ptr += sizeof(*hw_mode);
4334
4335 len = arg->num_band_to_mac * sizeof(*band_to_mac);
4336 #if defined(__linux__)
4337 tlv = ptr;
4338 #elif defined(__FreeBSD__)
4339 tlv = (void *)ptr;
4340 #endif
4341 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
4342
4343 ptr += TLV_HDR_SIZE;
4344 len = sizeof(*band_to_mac);
4345
4346 for (idx = 0; idx < arg->num_band_to_mac; idx++) {
4347 band_to_mac = (void *)ptr;
4348
4349 band_to_mac->tlv_header =
4350 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BAND_TO_MAC,
4351 len);
4352 band_to_mac->pdev_id = cpu_to_le32(arg->band_to_mac[idx].pdev_id);
4353 band_to_mac->start_freq =
4354 cpu_to_le32(arg->band_to_mac[idx].start_freq);
4355 band_to_mac->end_freq =
4356 cpu_to_le32(arg->band_to_mac[idx].end_freq);
4357 ptr += sizeof(*band_to_mac);
4358 }
4359 }
4360
4361 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_INIT_CMDID);
4362 if (ret) {
4363 ath12k_warn(ab, "failed to send WMI_INIT_CMDID\n");
4364 dev_kfree_skb(skb);
4365 }
4366
4367 return ret;
4368 }
4369
ath12k_wmi_pdev_lro_cfg(struct ath12k * ar,int pdev_id)4370 int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar,
4371 int pdev_id)
4372 {
4373 struct ath12k_wmi_pdev_lro_config_cmd *cmd;
4374 struct sk_buff *skb;
4375 int ret;
4376
4377 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
4378 if (!skb)
4379 return -ENOMEM;
4380
4381 cmd = (struct ath12k_wmi_pdev_lro_config_cmd *)skb->data;
4382 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_LRO_INFO_CMD,
4383 sizeof(*cmd));
4384
4385 get_random_bytes(cmd->th_4, sizeof(cmd->th_4));
4386 get_random_bytes(cmd->th_6, sizeof(cmd->th_6));
4387
4388 cmd->pdev_id = cpu_to_le32(pdev_id);
4389
4390 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
4391 "WMI lro cfg cmd pdev_id 0x%x\n", pdev_id);
4392
4393 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_LRO_CONFIG_CMDID);
4394 if (ret) {
4395 ath12k_warn(ar->ab,
4396 "failed to send lro cfg req wmi cmd\n");
4397 goto err;
4398 }
4399
4400 return 0;
4401 err:
4402 dev_kfree_skb(skb);
4403 return ret;
4404 }
4405
ath12k_wmi_wait_for_service_ready(struct ath12k_base * ab)4406 int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab)
4407 {
4408 unsigned long time_left;
4409
4410 time_left = wait_for_completion_timeout(&ab->wmi_ab.service_ready,
4411 WMI_SERVICE_READY_TIMEOUT_HZ);
4412 if (!time_left)
4413 return -ETIMEDOUT;
4414
4415 return 0;
4416 }
4417
ath12k_wmi_wait_for_unified_ready(struct ath12k_base * ab)4418 int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab)
4419 {
4420 unsigned long time_left;
4421
4422 time_left = wait_for_completion_timeout(&ab->wmi_ab.unified_ready,
4423 WMI_SERVICE_READY_TIMEOUT_HZ);
4424 if (!time_left)
4425 return -ETIMEDOUT;
4426
4427 return 0;
4428 }
4429
ath12k_wmi_set_hw_mode(struct ath12k_base * ab,enum wmi_host_hw_mode_config_type mode)4430 int ath12k_wmi_set_hw_mode(struct ath12k_base *ab,
4431 enum wmi_host_hw_mode_config_type mode)
4432 {
4433 struct ath12k_wmi_pdev_set_hw_mode_cmd *cmd;
4434 struct sk_buff *skb;
4435 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
4436 int len;
4437 int ret;
4438
4439 len = sizeof(*cmd);
4440
4441 skb = ath12k_wmi_alloc_skb(wmi_ab, len);
4442 if (!skb)
4443 return -ENOMEM;
4444
4445 cmd = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)skb->data;
4446
4447 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD,
4448 sizeof(*cmd));
4449
4450 cmd->pdev_id = WMI_PDEV_ID_SOC;
4451 cmd->hw_mode_index = cpu_to_le32(mode);
4452
4453 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_PDEV_SET_HW_MODE_CMDID);
4454 if (ret) {
4455 ath12k_warn(ab, "failed to send WMI_PDEV_SET_HW_MODE_CMDID\n");
4456 dev_kfree_skb(skb);
4457 }
4458
4459 return ret;
4460 }
4461
ath12k_wmi_cmd_init(struct ath12k_base * ab)4462 int ath12k_wmi_cmd_init(struct ath12k_base *ab)
4463 {
4464 struct ath12k_dp *dp = ath12k_ab_to_dp(ab);
4465 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
4466 struct ath12k_wmi_init_cmd_arg arg = {};
4467
4468 if (test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT,
4469 ab->wmi_ab.svc_map))
4470 arg.res_cfg.is_reg_cc_ext_event_supported = true;
4471
4472 ab->hw_params->wmi_init(ab, &arg.res_cfg);
4473 ab->wow.wmi_conf_rx_decap_mode = arg.res_cfg.rx_decap_mode;
4474
4475 arg.num_mem_chunks = wmi_ab->num_mem_chunks;
4476 arg.hw_mode_id = wmi_ab->preferred_hw_mode;
4477 arg.mem_chunks = wmi_ab->mem_chunks;
4478
4479 if (ab->hw_params->single_pdev_only)
4480 arg.hw_mode_id = WMI_HOST_HW_MODE_MAX;
4481
4482 arg.num_band_to_mac = ab->num_radios;
4483 ath12k_fill_band_to_mac_param(ab, arg.band_to_mac);
4484
4485 dp->peer_metadata_ver = arg.res_cfg.peer_metadata_ver;
4486
4487 return ath12k_init_cmd_send(&wmi_ab->wmi[0], &arg);
4488 }
4489
ath12k_wmi_vdev_spectral_conf(struct ath12k * ar,struct ath12k_wmi_vdev_spectral_conf_arg * arg)4490 int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar,
4491 struct ath12k_wmi_vdev_spectral_conf_arg *arg)
4492 {
4493 struct ath12k_wmi_vdev_spectral_conf_cmd *cmd;
4494 struct sk_buff *skb;
4495 int ret;
4496
4497 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
4498 if (!skb)
4499 return -ENOMEM;
4500
4501 cmd = (struct ath12k_wmi_vdev_spectral_conf_cmd *)skb->data;
4502 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD,
4503 sizeof(*cmd));
4504 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
4505 cmd->scan_count = cpu_to_le32(arg->scan_count);
4506 cmd->scan_period = cpu_to_le32(arg->scan_period);
4507 cmd->scan_priority = cpu_to_le32(arg->scan_priority);
4508 cmd->scan_fft_size = cpu_to_le32(arg->scan_fft_size);
4509 cmd->scan_gc_ena = cpu_to_le32(arg->scan_gc_ena);
4510 cmd->scan_restart_ena = cpu_to_le32(arg->scan_restart_ena);
4511 cmd->scan_noise_floor_ref = cpu_to_le32(arg->scan_noise_floor_ref);
4512 cmd->scan_init_delay = cpu_to_le32(arg->scan_init_delay);
4513 cmd->scan_nb_tone_thr = cpu_to_le32(arg->scan_nb_tone_thr);
4514 cmd->scan_str_bin_thr = cpu_to_le32(arg->scan_str_bin_thr);
4515 cmd->scan_wb_rpt_mode = cpu_to_le32(arg->scan_wb_rpt_mode);
4516 cmd->scan_rssi_rpt_mode = cpu_to_le32(arg->scan_rssi_rpt_mode);
4517 cmd->scan_rssi_thr = cpu_to_le32(arg->scan_rssi_thr);
4518 cmd->scan_pwr_format = cpu_to_le32(arg->scan_pwr_format);
4519 cmd->scan_rpt_mode = cpu_to_le32(arg->scan_rpt_mode);
4520 cmd->scan_bin_scale = cpu_to_le32(arg->scan_bin_scale);
4521 cmd->scan_dbm_adj = cpu_to_le32(arg->scan_dbm_adj);
4522 cmd->scan_chn_mask = cpu_to_le32(arg->scan_chn_mask);
4523
4524 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
4525 "WMI spectral scan config cmd vdev_id 0x%x\n",
4526 arg->vdev_id);
4527
4528 ret = ath12k_wmi_cmd_send(ar->wmi, skb,
4529 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID);
4530 if (ret) {
4531 ath12k_warn(ar->ab,
4532 "failed to send spectral scan config wmi cmd\n");
4533 goto err;
4534 }
4535
4536 return 0;
4537 err:
4538 dev_kfree_skb(skb);
4539 return ret;
4540 }
4541
ath12k_wmi_vdev_spectral_enable(struct ath12k * ar,u32 vdev_id,u32 trigger,u32 enable)4542 int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id,
4543 u32 trigger, u32 enable)
4544 {
4545 struct ath12k_wmi_vdev_spectral_enable_cmd *cmd;
4546 struct sk_buff *skb;
4547 int ret;
4548
4549 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
4550 if (!skb)
4551 return -ENOMEM;
4552
4553 cmd = (struct ath12k_wmi_vdev_spectral_enable_cmd *)skb->data;
4554 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD,
4555 sizeof(*cmd));
4556
4557 cmd->vdev_id = cpu_to_le32(vdev_id);
4558 cmd->trigger_cmd = cpu_to_le32(trigger);
4559 cmd->enable_cmd = cpu_to_le32(enable);
4560
4561 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
4562 "WMI spectral enable cmd vdev id 0x%x\n",
4563 vdev_id);
4564
4565 ret = ath12k_wmi_cmd_send(ar->wmi, skb,
4566 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID);
4567 if (ret) {
4568 ath12k_warn(ar->ab,
4569 "failed to send spectral enable wmi cmd\n");
4570 goto err;
4571 }
4572
4573 return 0;
4574 err:
4575 dev_kfree_skb(skb);
4576 return ret;
4577 }
4578
ath12k_wmi_pdev_dma_ring_cfg(struct ath12k * ar,struct ath12k_wmi_pdev_dma_ring_cfg_arg * arg)4579 int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar,
4580 struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg)
4581 {
4582 struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *cmd;
4583 struct sk_buff *skb;
4584 int ret;
4585
4586 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
4587 if (!skb)
4588 return -ENOMEM;
4589
4590 cmd = (struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *)skb->data;
4591 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DMA_RING_CFG_REQ,
4592 sizeof(*cmd));
4593
4594 cmd->pdev_id = cpu_to_le32(arg->pdev_id);
4595 cmd->module_id = cpu_to_le32(arg->module_id);
4596 cmd->base_paddr_lo = cpu_to_le32(arg->base_paddr_lo);
4597 cmd->base_paddr_hi = cpu_to_le32(arg->base_paddr_hi);
4598 cmd->head_idx_paddr_lo = cpu_to_le32(arg->head_idx_paddr_lo);
4599 cmd->head_idx_paddr_hi = cpu_to_le32(arg->head_idx_paddr_hi);
4600 cmd->tail_idx_paddr_lo = cpu_to_le32(arg->tail_idx_paddr_lo);
4601 cmd->tail_idx_paddr_hi = cpu_to_le32(arg->tail_idx_paddr_hi);
4602 cmd->num_elems = cpu_to_le32(arg->num_elems);
4603 cmd->buf_size = cpu_to_le32(arg->buf_size);
4604 cmd->num_resp_per_event = cpu_to_le32(arg->num_resp_per_event);
4605 cmd->event_timeout_ms = cpu_to_le32(arg->event_timeout_ms);
4606
4607 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
4608 "WMI DMA ring cfg req cmd pdev_id 0x%x\n",
4609 arg->pdev_id);
4610
4611 ret = ath12k_wmi_cmd_send(ar->wmi, skb,
4612 WMI_PDEV_DMA_RING_CFG_REQ_CMDID);
4613 if (ret) {
4614 ath12k_warn(ar->ab,
4615 "failed to send dma ring cfg req wmi cmd\n");
4616 goto err;
4617 }
4618
4619 return 0;
4620 err:
4621 dev_kfree_skb(skb);
4622 return ret;
4623 }
4624
ath12k_wmi_dma_buf_entry_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4625 static int ath12k_wmi_dma_buf_entry_parse(struct ath12k_base *soc,
4626 u16 tag, u16 len,
4627 const void *ptr, void *data)
4628 {
4629 struct ath12k_wmi_dma_buf_release_arg *arg = data;
4630
4631 if (tag != WMI_TAG_DMA_BUF_RELEASE_ENTRY)
4632 return -EPROTO;
4633
4634 if (arg->num_buf_entry >= le32_to_cpu(arg->fixed.num_buf_release_entry))
4635 return -ENOBUFS;
4636
4637 arg->num_buf_entry++;
4638 return 0;
4639 }
4640
ath12k_wmi_dma_buf_meta_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4641 static int ath12k_wmi_dma_buf_meta_parse(struct ath12k_base *soc,
4642 u16 tag, u16 len,
4643 const void *ptr, void *data)
4644 {
4645 struct ath12k_wmi_dma_buf_release_arg *arg = data;
4646
4647 if (tag != WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA)
4648 return -EPROTO;
4649
4650 if (arg->num_meta >= le32_to_cpu(arg->fixed.num_meta_data_entry))
4651 return -ENOBUFS;
4652
4653 arg->num_meta++;
4654
4655 return 0;
4656 }
4657
ath12k_wmi_dma_buf_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)4658 static int ath12k_wmi_dma_buf_parse(struct ath12k_base *ab,
4659 u16 tag, u16 len,
4660 const void *ptr, void *data)
4661 {
4662 struct ath12k_wmi_dma_buf_release_arg *arg = data;
4663 const struct ath12k_wmi_dma_buf_release_fixed_params *fixed;
4664 u32 pdev_id;
4665 int ret;
4666
4667 switch (tag) {
4668 case WMI_TAG_DMA_BUF_RELEASE:
4669 fixed = ptr;
4670 arg->fixed = *fixed;
4671 pdev_id = DP_HW2SW_MACID(le32_to_cpu(fixed->pdev_id));
4672 arg->fixed.pdev_id = cpu_to_le32(pdev_id);
4673 break;
4674 case WMI_TAG_ARRAY_STRUCT:
4675 if (!arg->buf_entry_done) {
4676 arg->num_buf_entry = 0;
4677 arg->buf_entry = ptr;
4678
4679 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4680 ath12k_wmi_dma_buf_entry_parse,
4681 arg);
4682 if (ret) {
4683 ath12k_warn(ab, "failed to parse dma buf entry tlv %d\n",
4684 ret);
4685 return ret;
4686 }
4687
4688 arg->buf_entry_done = true;
4689 } else if (!arg->meta_data_done) {
4690 arg->num_meta = 0;
4691 arg->meta_data = ptr;
4692
4693 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4694 ath12k_wmi_dma_buf_meta_parse,
4695 arg);
4696 if (ret) {
4697 ath12k_warn(ab, "failed to parse dma buf meta tlv %d\n",
4698 ret);
4699 return ret;
4700 }
4701
4702 arg->meta_data_done = true;
4703 }
4704 break;
4705 default:
4706 break;
4707 }
4708 return 0;
4709 }
4710
ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base * ab,struct sk_buff * skb)4711 static void ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base *ab,
4712 struct sk_buff *skb)
4713 {
4714 struct ath12k_wmi_dma_buf_release_arg arg = {};
4715 struct ath12k_dbring_buf_release_event param;
4716 int ret;
4717
4718 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
4719 ath12k_wmi_dma_buf_parse,
4720 &arg);
4721 if (ret) {
4722 ath12k_warn(ab, "failed to parse dma buf release tlv %d\n", ret);
4723 return;
4724 }
4725
4726 param.fixed = arg.fixed;
4727 param.buf_entry = arg.buf_entry;
4728 param.num_buf_entry = arg.num_buf_entry;
4729 param.meta_data = arg.meta_data;
4730 param.num_meta = arg.num_meta;
4731
4732 ret = ath12k_dbring_buffer_release_event(ab, ¶m);
4733 if (ret) {
4734 ath12k_warn(ab, "failed to handle dma buf release event %d\n", ret);
4735 return;
4736 }
4737 }
4738
ath12k_wmi_hw_mode_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4739 static int ath12k_wmi_hw_mode_caps_parse(struct ath12k_base *soc,
4740 u16 tag, u16 len,
4741 const void *ptr, void *data)
4742 {
4743 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4744 struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap;
4745 u32 phy_map = 0;
4746
4747 if (tag != WMI_TAG_HW_MODE_CAPABILITIES)
4748 return -EPROTO;
4749
4750 if (svc_rdy_ext->n_hw_mode_caps >= svc_rdy_ext->arg.num_hw_modes)
4751 return -ENOBUFS;
4752
4753 hw_mode_cap = container_of(ptr, struct ath12k_wmi_hw_mode_cap_params,
4754 hw_mode_id);
4755 svc_rdy_ext->n_hw_mode_caps++;
4756
4757 phy_map = le32_to_cpu(hw_mode_cap->phy_id_map);
4758 svc_rdy_ext->tot_phy_id += fls(phy_map);
4759
4760 return 0;
4761 }
4762
ath12k_wmi_hw_mode_caps(struct ath12k_base * soc,u16 len,const void * ptr,void * data)4763 static int ath12k_wmi_hw_mode_caps(struct ath12k_base *soc,
4764 u16 len, const void *ptr, void *data)
4765 {
4766 struct ath12k_svc_ext_info *svc_ext_info = &soc->wmi_ab.svc_ext_info;
4767 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4768 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps;
4769 enum wmi_host_hw_mode_config_type mode, pref;
4770 u32 i;
4771 int ret;
4772
4773 svc_rdy_ext->n_hw_mode_caps = 0;
4774 svc_rdy_ext->hw_mode_caps = ptr;
4775
4776 ret = ath12k_wmi_tlv_iter(soc, ptr, len,
4777 ath12k_wmi_hw_mode_caps_parse,
4778 svc_rdy_ext);
4779 if (ret) {
4780 ath12k_warn(soc, "failed to parse tlv %d\n", ret);
4781 return ret;
4782 }
4783
4784 for (i = 0 ; i < svc_rdy_ext->n_hw_mode_caps; i++) {
4785 hw_mode_caps = &svc_rdy_ext->hw_mode_caps[i];
4786 mode = le32_to_cpu(hw_mode_caps->hw_mode_id);
4787
4788 if (mode >= WMI_HOST_HW_MODE_MAX)
4789 continue;
4790
4791 pref = soc->wmi_ab.preferred_hw_mode;
4792
4793 if (ath12k_hw_mode_pri_map[mode] <= ath12k_hw_mode_pri_map[pref]) {
4794 svc_rdy_ext->pref_hw_mode_caps = *hw_mode_caps;
4795 soc->wmi_ab.preferred_hw_mode = mode;
4796 }
4797 }
4798
4799 svc_ext_info->num_hw_modes = svc_rdy_ext->n_hw_mode_caps;
4800
4801 ath12k_dbg(soc, ATH12K_DBG_WMI, "num hw modes %u preferred_hw_mode %d\n",
4802 svc_ext_info->num_hw_modes, soc->wmi_ab.preferred_hw_mode);
4803
4804 if (soc->wmi_ab.preferred_hw_mode == WMI_HOST_HW_MODE_MAX)
4805 return -EINVAL;
4806
4807 return 0;
4808 }
4809
ath12k_wmi_mac_phy_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4810 static int ath12k_wmi_mac_phy_caps_parse(struct ath12k_base *soc,
4811 u16 tag, u16 len,
4812 const void *ptr, void *data)
4813 {
4814 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4815
4816 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES)
4817 return -EPROTO;
4818
4819 if (svc_rdy_ext->n_mac_phy_caps >= svc_rdy_ext->tot_phy_id)
4820 return -ENOBUFS;
4821
4822 len = min_t(u16, len, sizeof(struct ath12k_wmi_mac_phy_caps_params));
4823 if (!svc_rdy_ext->n_mac_phy_caps) {
4824 svc_rdy_ext->mac_phy_caps = kzalloc((svc_rdy_ext->tot_phy_id) * len,
4825 GFP_ATOMIC);
4826 if (!svc_rdy_ext->mac_phy_caps)
4827 return -ENOMEM;
4828 }
4829
4830 memcpy(svc_rdy_ext->mac_phy_caps + svc_rdy_ext->n_mac_phy_caps, ptr, len);
4831 svc_rdy_ext->n_mac_phy_caps++;
4832 return 0;
4833 }
4834
ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4835 static int ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base *soc,
4836 u16 tag, u16 len,
4837 const void *ptr, void *data)
4838 {
4839 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4840
4841 if (tag != WMI_TAG_HAL_REG_CAPABILITIES_EXT)
4842 return -EPROTO;
4843
4844 if (svc_rdy_ext->n_ext_hal_reg_caps >= svc_rdy_ext->arg.num_phy)
4845 return -ENOBUFS;
4846
4847 svc_rdy_ext->n_ext_hal_reg_caps++;
4848 return 0;
4849 }
4850
ath12k_wmi_ext_hal_reg_caps(struct ath12k_base * soc,u16 len,const void * ptr,void * data)4851 static int ath12k_wmi_ext_hal_reg_caps(struct ath12k_base *soc,
4852 u16 len, const void *ptr, void *data)
4853 {
4854 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0];
4855 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4856 struct ath12k_wmi_hal_reg_capabilities_ext_arg reg_cap;
4857 int ret;
4858 u32 i;
4859
4860 svc_rdy_ext->n_ext_hal_reg_caps = 0;
4861 svc_rdy_ext->ext_hal_reg_caps = ptr;
4862 ret = ath12k_wmi_tlv_iter(soc, ptr, len,
4863 ath12k_wmi_ext_hal_reg_caps_parse,
4864 svc_rdy_ext);
4865 if (ret) {
4866 ath12k_warn(soc, "failed to parse tlv %d\n", ret);
4867 return ret;
4868 }
4869
4870 for (i = 0; i < svc_rdy_ext->arg.num_phy; i++) {
4871 ret = ath12k_pull_reg_cap_svc_rdy_ext(wmi_handle,
4872 svc_rdy_ext->soc_hal_reg_caps,
4873 svc_rdy_ext->ext_hal_reg_caps, i,
4874 ®_cap);
4875 if (ret) {
4876 ath12k_warn(soc, "failed to extract reg cap %d\n", i);
4877 return ret;
4878 }
4879
4880 if (reg_cap.phy_id >= MAX_RADIOS) {
4881 ath12k_warn(soc, "unexpected phy id %u\n", reg_cap.phy_id);
4882 return -EINVAL;
4883 }
4884
4885 soc->hal_reg_cap[reg_cap.phy_id] = reg_cap;
4886 }
4887 return 0;
4888 }
4889
ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base * soc,u16 len,const void * ptr,void * data)4890 static int ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base *soc,
4891 u16 len, const void *ptr,
4892 void *data)
4893 {
4894 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0];
4895 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4896 u8 hw_mode_id = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.hw_mode_id);
4897 u32 phy_id_map;
4898 int pdev_index = 0;
4899 int ret;
4900
4901 svc_rdy_ext->soc_hal_reg_caps = ptr;
4902 svc_rdy_ext->arg.num_phy = le32_to_cpu(svc_rdy_ext->soc_hal_reg_caps->num_phy);
4903
4904 soc->num_radios = 0;
4905 phy_id_map = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.phy_id_map);
4906 soc->fw_pdev_count = 0;
4907
4908 while (phy_id_map && soc->num_radios < MAX_RADIOS) {
4909 ret = ath12k_pull_mac_phy_cap_svc_ready_ext(wmi_handle,
4910 svc_rdy_ext,
4911 hw_mode_id, soc->num_radios,
4912 &soc->pdevs[pdev_index]);
4913 if (ret) {
4914 ath12k_warn(soc, "failed to extract mac caps, idx :%d\n",
4915 soc->num_radios);
4916 return ret;
4917 }
4918
4919 soc->num_radios++;
4920
4921 /* For single_pdev_only targets,
4922 * save mac_phy capability in the same pdev
4923 */
4924 if (soc->hw_params->single_pdev_only)
4925 pdev_index = 0;
4926 else
4927 pdev_index = soc->num_radios;
4928
4929 /* TODO: mac_phy_cap prints */
4930 phy_id_map >>= 1;
4931 }
4932
4933 if (soc->hw_params->single_pdev_only) {
4934 soc->num_radios = 1;
4935 soc->pdevs[0].pdev_id = 0;
4936 }
4937
4938 return 0;
4939 }
4940
ath12k_wmi_dma_ring_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4941 static int ath12k_wmi_dma_ring_caps_parse(struct ath12k_base *soc,
4942 u16 tag, u16 len,
4943 const void *ptr, void *data)
4944 {
4945 struct ath12k_wmi_dma_ring_caps_parse *parse = data;
4946
4947 if (tag != WMI_TAG_DMA_RING_CAPABILITIES)
4948 return -EPROTO;
4949
4950 parse->n_dma_ring_caps++;
4951 return 0;
4952 }
4953
ath12k_wmi_alloc_dbring_caps(struct ath12k_base * ab,u32 num_cap)4954 static int ath12k_wmi_alloc_dbring_caps(struct ath12k_base *ab,
4955 u32 num_cap)
4956 {
4957 size_t sz;
4958 void *ptr;
4959
4960 sz = num_cap * sizeof(struct ath12k_dbring_cap);
4961 ptr = kzalloc(sz, GFP_ATOMIC);
4962 if (!ptr)
4963 return -ENOMEM;
4964
4965 ab->db_caps = ptr;
4966 ab->num_db_cap = num_cap;
4967
4968 return 0;
4969 }
4970
ath12k_wmi_free_dbring_caps(struct ath12k_base * ab)4971 static void ath12k_wmi_free_dbring_caps(struct ath12k_base *ab)
4972 {
4973 kfree(ab->db_caps);
4974 ab->db_caps = NULL;
4975 ab->num_db_cap = 0;
4976 }
4977
ath12k_wmi_dma_ring_caps(struct ath12k_base * ab,u16 len,const void * ptr,void * data)4978 static int ath12k_wmi_dma_ring_caps(struct ath12k_base *ab,
4979 u16 len, const void *ptr, void *data)
4980 {
4981 struct ath12k_wmi_dma_ring_caps_parse *dma_caps_parse = data;
4982 #if defined(__linux__)
4983 struct ath12k_wmi_dma_ring_caps_params *dma_caps;
4984 #elif defined(__FreeBSD__)
4985 const struct ath12k_wmi_dma_ring_caps_params *dma_caps;
4986 #endif
4987 struct ath12k_dbring_cap *dir_buff_caps;
4988 int ret;
4989 u32 i;
4990
4991 dma_caps_parse->n_dma_ring_caps = 0;
4992 #if defined(__linux__)
4993 dma_caps = (struct ath12k_wmi_dma_ring_caps_params *)ptr;
4994 #elif defined(__FreeBSD__)
4995 dma_caps = (const struct ath12k_wmi_dma_ring_caps_params *)ptr;
4996 #endif
4997 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4998 ath12k_wmi_dma_ring_caps_parse,
4999 dma_caps_parse);
5000 if (ret) {
5001 ath12k_warn(ab, "failed to parse dma ring caps tlv %d\n", ret);
5002 return ret;
5003 }
5004
5005 if (!dma_caps_parse->n_dma_ring_caps)
5006 return 0;
5007
5008 if (ab->num_db_cap) {
5009 ath12k_warn(ab, "Already processed, so ignoring dma ring caps\n");
5010 return 0;
5011 }
5012
5013 ret = ath12k_wmi_alloc_dbring_caps(ab, dma_caps_parse->n_dma_ring_caps);
5014 if (ret)
5015 return ret;
5016
5017 dir_buff_caps = ab->db_caps;
5018 for (i = 0; i < dma_caps_parse->n_dma_ring_caps; i++) {
5019 if (le32_to_cpu(dma_caps[i].module_id) >= WMI_DIRECT_BUF_MAX) {
5020 ath12k_warn(ab, "Invalid module id %d\n",
5021 le32_to_cpu(dma_caps[i].module_id));
5022 ret = -EINVAL;
5023 goto free_dir_buff;
5024 }
5025
5026 dir_buff_caps[i].id = le32_to_cpu(dma_caps[i].module_id);
5027 dir_buff_caps[i].pdev_id =
5028 DP_HW2SW_MACID(le32_to_cpu(dma_caps[i].pdev_id));
5029 dir_buff_caps[i].min_elem = le32_to_cpu(dma_caps[i].min_elem);
5030 dir_buff_caps[i].min_buf_sz = le32_to_cpu(dma_caps[i].min_buf_sz);
5031 dir_buff_caps[i].min_buf_align = le32_to_cpu(dma_caps[i].min_buf_align);
5032 }
5033
5034 return 0;
5035
5036 free_dir_buff:
5037 ath12k_wmi_free_dbring_caps(ab);
5038 return ret;
5039 }
5040
5041 static void
ath12k_wmi_save_mac_phy_info(struct ath12k_base * ab,const struct ath12k_wmi_mac_phy_caps_params * mac_phy_cap,struct ath12k_svc_ext_mac_phy_info * mac_phy_info)5042 ath12k_wmi_save_mac_phy_info(struct ath12k_base *ab,
5043 const struct ath12k_wmi_mac_phy_caps_params *mac_phy_cap,
5044 struct ath12k_svc_ext_mac_phy_info *mac_phy_info)
5045 {
5046 mac_phy_info->phy_id = __le32_to_cpu(mac_phy_cap->phy_id);
5047 mac_phy_info->supported_bands = __le32_to_cpu(mac_phy_cap->supported_bands);
5048 mac_phy_info->hw_freq_range.low_2ghz_freq =
5049 __le32_to_cpu(mac_phy_cap->low_2ghz_chan_freq);
5050 mac_phy_info->hw_freq_range.high_2ghz_freq =
5051 __le32_to_cpu(mac_phy_cap->high_2ghz_chan_freq);
5052 mac_phy_info->hw_freq_range.low_5ghz_freq =
5053 __le32_to_cpu(mac_phy_cap->low_5ghz_chan_freq);
5054 mac_phy_info->hw_freq_range.high_5ghz_freq =
5055 __le32_to_cpu(mac_phy_cap->high_5ghz_chan_freq);
5056 }
5057
5058 static void
ath12k_wmi_save_all_mac_phy_info(struct ath12k_base * ab,struct ath12k_wmi_svc_rdy_ext_parse * svc_rdy_ext)5059 ath12k_wmi_save_all_mac_phy_info(struct ath12k_base *ab,
5060 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext)
5061 {
5062 struct ath12k_svc_ext_info *svc_ext_info = &ab->wmi_ab.svc_ext_info;
5063 const struct ath12k_wmi_mac_phy_caps_params *mac_phy_cap;
5064 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap;
5065 struct ath12k_svc_ext_mac_phy_info *mac_phy_info;
5066 u32 hw_mode_id, phy_bit_map;
5067 u8 hw_idx;
5068
5069 mac_phy_info = &svc_ext_info->mac_phy_info[0];
5070 mac_phy_cap = svc_rdy_ext->mac_phy_caps;
5071
5072 for (hw_idx = 0; hw_idx < svc_ext_info->num_hw_modes; hw_idx++) {
5073 hw_mode_cap = &svc_rdy_ext->hw_mode_caps[hw_idx];
5074 hw_mode_id = __le32_to_cpu(hw_mode_cap->hw_mode_id);
5075 phy_bit_map = __le32_to_cpu(hw_mode_cap->phy_id_map);
5076
5077 while (phy_bit_map) {
5078 ath12k_wmi_save_mac_phy_info(ab, mac_phy_cap, mac_phy_info);
5079 mac_phy_info->hw_mode_config_type =
5080 le32_get_bits(hw_mode_cap->hw_mode_config_type,
5081 WMI_HW_MODE_CAP_CFG_TYPE);
5082 ath12k_dbg(ab, ATH12K_DBG_WMI,
5083 "hw_idx %u hw_mode_id %u hw_mode_config_type %u supported_bands %u phy_id %u 2 GHz [%u - %u] 5 GHz [%u - %u]\n",
5084 hw_idx, hw_mode_id,
5085 mac_phy_info->hw_mode_config_type,
5086 mac_phy_info->supported_bands, mac_phy_info->phy_id,
5087 mac_phy_info->hw_freq_range.low_2ghz_freq,
5088 mac_phy_info->hw_freq_range.high_2ghz_freq,
5089 mac_phy_info->hw_freq_range.low_5ghz_freq,
5090 mac_phy_info->hw_freq_range.high_5ghz_freq);
5091
5092 mac_phy_cap++;
5093 mac_phy_info++;
5094
5095 phy_bit_map >>= 1;
5096 }
5097 }
5098 }
5099
ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)5100 static int ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base *ab,
5101 u16 tag, u16 len,
5102 const void *ptr, void *data)
5103 {
5104 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
5105 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
5106 int ret;
5107
5108 switch (tag) {
5109 case WMI_TAG_SERVICE_READY_EXT_EVENT:
5110 ret = ath12k_pull_svc_ready_ext(wmi_handle, ptr,
5111 &svc_rdy_ext->arg);
5112 if (ret) {
5113 ath12k_warn(ab, "unable to extract ext params\n");
5114 return ret;
5115 }
5116 break;
5117
5118 case WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS:
5119 svc_rdy_ext->hw_caps = ptr;
5120 svc_rdy_ext->arg.num_hw_modes =
5121 le32_to_cpu(svc_rdy_ext->hw_caps->num_hw_modes);
5122 break;
5123
5124 case WMI_TAG_SOC_HAL_REG_CAPABILITIES:
5125 ret = ath12k_wmi_ext_soc_hal_reg_caps_parse(ab, len, ptr,
5126 svc_rdy_ext);
5127 if (ret)
5128 return ret;
5129 break;
5130
5131 case WMI_TAG_ARRAY_STRUCT:
5132 if (!svc_rdy_ext->hw_mode_done) {
5133 ret = ath12k_wmi_hw_mode_caps(ab, len, ptr, svc_rdy_ext);
5134 if (ret)
5135 return ret;
5136
5137 svc_rdy_ext->hw_mode_done = true;
5138 } else if (!svc_rdy_ext->mac_phy_done) {
5139 svc_rdy_ext->n_mac_phy_caps = 0;
5140 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
5141 ath12k_wmi_mac_phy_caps_parse,
5142 svc_rdy_ext);
5143 if (ret) {
5144 ath12k_warn(ab, "failed to parse tlv %d\n", ret);
5145 return ret;
5146 }
5147
5148 ath12k_wmi_save_all_mac_phy_info(ab, svc_rdy_ext);
5149
5150 svc_rdy_ext->mac_phy_done = true;
5151 } else if (!svc_rdy_ext->ext_hal_reg_done) {
5152 ret = ath12k_wmi_ext_hal_reg_caps(ab, len, ptr, svc_rdy_ext);
5153 if (ret)
5154 return ret;
5155
5156 svc_rdy_ext->ext_hal_reg_done = true;
5157 } else if (!svc_rdy_ext->mac_phy_chainmask_combo_done) {
5158 svc_rdy_ext->mac_phy_chainmask_combo_done = true;
5159 } else if (!svc_rdy_ext->mac_phy_chainmask_cap_done) {
5160 svc_rdy_ext->mac_phy_chainmask_cap_done = true;
5161 } else if (!svc_rdy_ext->oem_dma_ring_cap_done) {
5162 svc_rdy_ext->oem_dma_ring_cap_done = true;
5163 } else if (!svc_rdy_ext->dma_ring_cap_done) {
5164 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr,
5165 &svc_rdy_ext->dma_caps_parse);
5166 if (ret)
5167 return ret;
5168
5169 svc_rdy_ext->dma_ring_cap_done = true;
5170 }
5171 break;
5172
5173 default:
5174 break;
5175 }
5176 return 0;
5177 }
5178
ath12k_service_ready_ext_event(struct ath12k_base * ab,struct sk_buff * skb)5179 static int ath12k_service_ready_ext_event(struct ath12k_base *ab,
5180 struct sk_buff *skb)
5181 {
5182 struct ath12k_wmi_svc_rdy_ext_parse svc_rdy_ext = { };
5183 int ret;
5184
5185 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
5186 ath12k_wmi_svc_rdy_ext_parse,
5187 &svc_rdy_ext);
5188 if (ret) {
5189 ath12k_warn(ab, "failed to parse tlv %d\n", ret);
5190 goto err;
5191 }
5192
5193 if (!test_bit(WMI_TLV_SERVICE_EXT2_MSG, ab->wmi_ab.svc_map))
5194 complete(&ab->wmi_ab.service_ready);
5195
5196 kfree(svc_rdy_ext.mac_phy_caps);
5197 return 0;
5198
5199 err:
5200 kfree(svc_rdy_ext.mac_phy_caps);
5201 ath12k_wmi_free_dbring_caps(ab);
5202 return ret;
5203 }
5204
ath12k_pull_svc_ready_ext2(struct ath12k_wmi_pdev * wmi_handle,const void * ptr,struct ath12k_wmi_svc_rdy_ext2_arg * arg)5205 static int ath12k_pull_svc_ready_ext2(struct ath12k_wmi_pdev *wmi_handle,
5206 const void *ptr,
5207 struct ath12k_wmi_svc_rdy_ext2_arg *arg)
5208 {
5209 const struct wmi_service_ready_ext2_event *ev = ptr;
5210
5211 if (!ev)
5212 return -EINVAL;
5213
5214 arg->reg_db_version = le32_to_cpu(ev->reg_db_version);
5215 arg->hw_min_max_tx_power_2ghz = le32_to_cpu(ev->hw_min_max_tx_power_2ghz);
5216 arg->hw_min_max_tx_power_5ghz = le32_to_cpu(ev->hw_min_max_tx_power_5ghz);
5217 arg->chwidth_num_peer_caps = le32_to_cpu(ev->chwidth_num_peer_caps);
5218 arg->preamble_puncture_bw = le32_to_cpu(ev->preamble_puncture_bw);
5219 arg->max_user_per_ppdu_ofdma = le32_to_cpu(ev->max_user_per_ppdu_ofdma);
5220 arg->max_user_per_ppdu_mumimo = le32_to_cpu(ev->max_user_per_ppdu_mumimo);
5221 arg->target_cap_flags = le32_to_cpu(ev->target_cap_flags);
5222 return 0;
5223 }
5224
ath12k_wmi_eht_caps_parse(struct ath12k_pdev * pdev,u32 band,const __le32 cap_mac_info[],const __le32 cap_phy_info[],const __le32 supp_mcs[],const struct ath12k_wmi_ppe_threshold_params * ppet,__le32 cap_info_internal)5225 static void ath12k_wmi_eht_caps_parse(struct ath12k_pdev *pdev, u32 band,
5226 const __le32 cap_mac_info[],
5227 const __le32 cap_phy_info[],
5228 const __le32 supp_mcs[],
5229 const struct ath12k_wmi_ppe_threshold_params *ppet,
5230 __le32 cap_info_internal)
5231 {
5232 struct ath12k_band_cap *cap_band = &pdev->cap.band[band];
5233 u32 support_320mhz;
5234 u8 i;
5235
5236 if (band == NL80211_BAND_6GHZ)
5237 support_320mhz = cap_band->eht_cap_phy_info[0] &
5238 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ;
5239
5240 for (i = 0; i < WMI_MAX_EHTCAP_MAC_SIZE; i++)
5241 cap_band->eht_cap_mac_info[i] = le32_to_cpu(cap_mac_info[i]);
5242
5243 for (i = 0; i < WMI_MAX_EHTCAP_PHY_SIZE; i++)
5244 cap_band->eht_cap_phy_info[i] = le32_to_cpu(cap_phy_info[i]);
5245
5246 if (band == NL80211_BAND_6GHZ)
5247 cap_band->eht_cap_phy_info[0] |= support_320mhz;
5248
5249 cap_band->eht_mcs_20_only = le32_to_cpu(supp_mcs[0]);
5250 cap_band->eht_mcs_80 = le32_to_cpu(supp_mcs[1]);
5251 if (band != NL80211_BAND_2GHZ) {
5252 cap_band->eht_mcs_160 = le32_to_cpu(supp_mcs[2]);
5253 cap_band->eht_mcs_320 = le32_to_cpu(supp_mcs[3]);
5254 }
5255
5256 cap_band->eht_ppet.numss_m1 = le32_to_cpu(ppet->numss_m1);
5257 cap_band->eht_ppet.ru_bit_mask = le32_to_cpu(ppet->ru_info);
5258 for (i = 0; i < WMI_MAX_NUM_SS; i++)
5259 cap_band->eht_ppet.ppet16_ppet8_ru3_ru0[i] =
5260 le32_to_cpu(ppet->ppet16_ppet8_ru3_ru0[i]);
5261
5262 cap_band->eht_cap_info_internal = le32_to_cpu(cap_info_internal);
5263 }
5264
5265 static int
ath12k_wmi_tlv_mac_phy_caps_ext_parse(struct ath12k_base * ab,const struct ath12k_wmi_caps_ext_params * caps,struct ath12k_pdev * pdev)5266 ath12k_wmi_tlv_mac_phy_caps_ext_parse(struct ath12k_base *ab,
5267 const struct ath12k_wmi_caps_ext_params *caps,
5268 struct ath12k_pdev *pdev)
5269 {
5270 u32 bands;
5271 int i;
5272
5273 if (ab->hw_params->single_pdev_only) {
5274 for (i = 0; i < ab->fw_pdev_count; i++) {
5275 struct ath12k_fw_pdev *fw_pdev = &ab->fw_pdev[i];
5276
5277 if (fw_pdev->pdev_id == ath12k_wmi_caps_ext_get_pdev_id(caps) &&
5278 fw_pdev->phy_id == le32_to_cpu(caps->phy_id)) {
5279 bands = fw_pdev->supported_bands;
5280 break;
5281 }
5282 }
5283
5284 if (i == ab->fw_pdev_count)
5285 return -EINVAL;
5286 } else {
5287 bands = pdev->cap.supported_bands;
5288 }
5289
5290 if (bands & WMI_HOST_WLAN_2GHZ_CAP) {
5291 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_2GHZ,
5292 caps->eht_cap_mac_info_2ghz,
5293 caps->eht_cap_phy_info_2ghz,
5294 caps->eht_supp_mcs_ext_2ghz,
5295 &caps->eht_ppet_2ghz,
5296 caps->eht_cap_info_internal);
5297 }
5298
5299 if (bands & WMI_HOST_WLAN_5GHZ_CAP) {
5300 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_5GHZ,
5301 caps->eht_cap_mac_info_5ghz,
5302 caps->eht_cap_phy_info_5ghz,
5303 caps->eht_supp_mcs_ext_5ghz,
5304 &caps->eht_ppet_5ghz,
5305 caps->eht_cap_info_internal);
5306
5307 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_6GHZ,
5308 caps->eht_cap_mac_info_5ghz,
5309 caps->eht_cap_phy_info_5ghz,
5310 caps->eht_supp_mcs_ext_5ghz,
5311 &caps->eht_ppet_5ghz,
5312 caps->eht_cap_info_internal);
5313 }
5314
5315 pdev->cap.eml_cap = le32_to_cpu(caps->eml_capability);
5316 pdev->cap.mld_cap = le32_to_cpu(caps->mld_capability);
5317
5318 return 0;
5319 }
5320
ath12k_wmi_tlv_mac_phy_caps_ext(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)5321 static int ath12k_wmi_tlv_mac_phy_caps_ext(struct ath12k_base *ab, u16 tag,
5322 u16 len, const void *ptr,
5323 void *data)
5324 {
5325 const struct ath12k_wmi_caps_ext_params *caps = ptr;
5326 struct ath12k_band_cap *cap_band;
5327 u32 support_320mhz;
5328 int i = 0, ret;
5329
5330 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES_EXT)
5331 return -EPROTO;
5332
5333 if (ab->hw_params->single_pdev_only) {
5334 if (caps->hw_mode_id == WMI_HOST_HW_MODE_SINGLE) {
5335 support_320mhz = le32_to_cpu(caps->eht_cap_phy_info_5ghz[0]) &
5336 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ;
5337 cap_band = &ab->pdevs[0].cap.band[NL80211_BAND_6GHZ];
5338 cap_band->eht_cap_phy_info[0] |= support_320mhz;
5339 }
5340
5341 if (ab->wmi_ab.preferred_hw_mode != le32_to_cpu(caps->hw_mode_id))
5342 return 0;
5343 } else {
5344 for (i = 0; i < ab->num_radios; i++) {
5345 if (ab->pdevs[i].pdev_id ==
5346 ath12k_wmi_caps_ext_get_pdev_id(caps))
5347 break;
5348 }
5349
5350 if (i == ab->num_radios)
5351 return -EINVAL;
5352 }
5353
5354 ret = ath12k_wmi_tlv_mac_phy_caps_ext_parse(ab, caps, &ab->pdevs[i]);
5355 if (ret) {
5356 ath12k_warn(ab,
5357 "failed to parse extended MAC PHY capabilities for pdev %d: %d\n",
5358 ret, ab->pdevs[i].pdev_id);
5359 return ret;
5360 }
5361
5362 return 0;
5363 }
5364
5365 static void
ath12k_wmi_update_freq_info(struct ath12k_base * ab,struct ath12k_svc_ext_mac_phy_info * mac_cap,enum ath12k_hw_mode mode,u32 phy_id)5366 ath12k_wmi_update_freq_info(struct ath12k_base *ab,
5367 struct ath12k_svc_ext_mac_phy_info *mac_cap,
5368 enum ath12k_hw_mode mode,
5369 u32 phy_id)
5370 {
5371 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5372 struct ath12k_hw_mode_freq_range_arg *mac_range;
5373
5374 mac_range = &hw_mode_info->freq_range_caps[mode][phy_id];
5375
5376 if (mac_cap->supported_bands & WMI_HOST_WLAN_2GHZ_CAP) {
5377 mac_range->low_2ghz_freq = max_t(u32,
5378 mac_cap->hw_freq_range.low_2ghz_freq,
5379 ATH12K_MIN_2GHZ_FREQ);
5380 mac_range->high_2ghz_freq = mac_cap->hw_freq_range.high_2ghz_freq ?
5381 min_t(u32,
5382 mac_cap->hw_freq_range.high_2ghz_freq,
5383 ATH12K_MAX_2GHZ_FREQ) :
5384 ATH12K_MAX_2GHZ_FREQ;
5385 }
5386
5387 if (mac_cap->supported_bands & WMI_HOST_WLAN_5GHZ_CAP) {
5388 mac_range->low_5ghz_freq = max_t(u32,
5389 mac_cap->hw_freq_range.low_5ghz_freq,
5390 ATH12K_MIN_5GHZ_FREQ);
5391 mac_range->high_5ghz_freq = mac_cap->hw_freq_range.high_5ghz_freq ?
5392 min_t(u32,
5393 mac_cap->hw_freq_range.high_5ghz_freq,
5394 ATH12K_MAX_6GHZ_FREQ) :
5395 ATH12K_MAX_6GHZ_FREQ;
5396 }
5397 }
5398
5399 static bool
ath12k_wmi_all_phy_range_updated(struct ath12k_base * ab,enum ath12k_hw_mode hwmode)5400 ath12k_wmi_all_phy_range_updated(struct ath12k_base *ab,
5401 enum ath12k_hw_mode hwmode)
5402 {
5403 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5404 struct ath12k_hw_mode_freq_range_arg *mac_range;
5405 u8 phy_id;
5406
5407 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5408 mac_range = &hw_mode_info->freq_range_caps[hwmode][phy_id];
5409 /* modify SBS/DBS range only when both phy for DBS are filled */
5410 if (!mac_range->low_2ghz_freq && !mac_range->low_5ghz_freq)
5411 return false;
5412 }
5413
5414 return true;
5415 }
5416
ath12k_wmi_update_dbs_freq_info(struct ath12k_base * ab)5417 static void ath12k_wmi_update_dbs_freq_info(struct ath12k_base *ab)
5418 {
5419 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5420 struct ath12k_hw_mode_freq_range_arg *mac_range;
5421 u8 phy_id;
5422
5423 mac_range = hw_mode_info->freq_range_caps[ATH12K_HW_MODE_DBS];
5424 /* Reset 5 GHz range for shared mac for DBS */
5425 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5426 if (mac_range[phy_id].low_2ghz_freq &&
5427 mac_range[phy_id].low_5ghz_freq) {
5428 mac_range[phy_id].low_5ghz_freq = 0;
5429 mac_range[phy_id].high_5ghz_freq = 0;
5430 }
5431 }
5432 }
5433
5434 static u32
ath12k_wmi_get_highest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg * range)5435 ath12k_wmi_get_highest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg *range)
5436 {
5437 u32 highest_freq = 0;
5438 u8 phy_id;
5439
5440 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5441 if (range[phy_id].high_5ghz_freq > highest_freq)
5442 highest_freq = range[phy_id].high_5ghz_freq;
5443 }
5444
5445 return highest_freq ? highest_freq : ATH12K_MAX_6GHZ_FREQ;
5446 }
5447
5448 static u32
ath12k_wmi_get_lowest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg * range)5449 ath12k_wmi_get_lowest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg *range)
5450 {
5451 u32 lowest_freq = 0;
5452 u8 phy_id;
5453
5454 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5455 if ((!lowest_freq && range[phy_id].low_5ghz_freq) ||
5456 range[phy_id].low_5ghz_freq < lowest_freq)
5457 lowest_freq = range[phy_id].low_5ghz_freq;
5458 }
5459
5460 return lowest_freq ? lowest_freq : ATH12K_MIN_5GHZ_FREQ;
5461 }
5462
5463 static void
ath12k_wmi_fill_upper_share_sbs_freq(struct ath12k_base * ab,u16 sbs_range_sep,struct ath12k_hw_mode_freq_range_arg * ref_freq)5464 ath12k_wmi_fill_upper_share_sbs_freq(struct ath12k_base *ab,
5465 u16 sbs_range_sep,
5466 struct ath12k_hw_mode_freq_range_arg *ref_freq)
5467 {
5468 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5469 struct ath12k_hw_mode_freq_range_arg *upper_sbs_freq_range;
5470 u8 phy_id;
5471
5472 upper_sbs_freq_range =
5473 hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS_UPPER_SHARE];
5474
5475 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5476 upper_sbs_freq_range[phy_id].low_2ghz_freq =
5477 ref_freq[phy_id].low_2ghz_freq;
5478 upper_sbs_freq_range[phy_id].high_2ghz_freq =
5479 ref_freq[phy_id].high_2ghz_freq;
5480
5481 /* update for shared mac */
5482 if (upper_sbs_freq_range[phy_id].low_2ghz_freq) {
5483 upper_sbs_freq_range[phy_id].low_5ghz_freq = sbs_range_sep + 10;
5484 upper_sbs_freq_range[phy_id].high_5ghz_freq =
5485 ath12k_wmi_get_highest_5ghz_freq_from_range(ref_freq);
5486 } else {
5487 upper_sbs_freq_range[phy_id].low_5ghz_freq =
5488 ath12k_wmi_get_lowest_5ghz_freq_from_range(ref_freq);
5489 upper_sbs_freq_range[phy_id].high_5ghz_freq = sbs_range_sep;
5490 }
5491 }
5492 }
5493
5494 static void
ath12k_wmi_fill_lower_share_sbs_freq(struct ath12k_base * ab,u16 sbs_range_sep,struct ath12k_hw_mode_freq_range_arg * ref_freq)5495 ath12k_wmi_fill_lower_share_sbs_freq(struct ath12k_base *ab,
5496 u16 sbs_range_sep,
5497 struct ath12k_hw_mode_freq_range_arg *ref_freq)
5498 {
5499 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5500 struct ath12k_hw_mode_freq_range_arg *lower_sbs_freq_range;
5501 u8 phy_id;
5502
5503 lower_sbs_freq_range =
5504 hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS_LOWER_SHARE];
5505
5506 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5507 lower_sbs_freq_range[phy_id].low_2ghz_freq =
5508 ref_freq[phy_id].low_2ghz_freq;
5509 lower_sbs_freq_range[phy_id].high_2ghz_freq =
5510 ref_freq[phy_id].high_2ghz_freq;
5511
5512 /* update for shared mac */
5513 if (lower_sbs_freq_range[phy_id].low_2ghz_freq) {
5514 lower_sbs_freq_range[phy_id].low_5ghz_freq =
5515 ath12k_wmi_get_lowest_5ghz_freq_from_range(ref_freq);
5516 lower_sbs_freq_range[phy_id].high_5ghz_freq = sbs_range_sep;
5517 } else {
5518 lower_sbs_freq_range[phy_id].low_5ghz_freq = sbs_range_sep + 10;
5519 lower_sbs_freq_range[phy_id].high_5ghz_freq =
5520 ath12k_wmi_get_highest_5ghz_freq_from_range(ref_freq);
5521 }
5522 }
5523 }
5524
ath12k_wmi_hw_mode_to_str(enum ath12k_hw_mode hw_mode)5525 static const char *ath12k_wmi_hw_mode_to_str(enum ath12k_hw_mode hw_mode)
5526 {
5527 static const char * const mode_str[] = {
5528 [ATH12K_HW_MODE_SMM] = "SMM",
5529 [ATH12K_HW_MODE_DBS] = "DBS",
5530 [ATH12K_HW_MODE_SBS] = "SBS",
5531 [ATH12K_HW_MODE_SBS_UPPER_SHARE] = "SBS_UPPER_SHARE",
5532 [ATH12K_HW_MODE_SBS_LOWER_SHARE] = "SBS_LOWER_SHARE",
5533 };
5534
5535 if (hw_mode >= ARRAY_SIZE(mode_str))
5536 return "Unknown";
5537
5538 return mode_str[hw_mode];
5539 }
5540
5541 static void
ath12k_wmi_dump_freq_range_per_mac(struct ath12k_base * ab,struct ath12k_hw_mode_freq_range_arg * freq_range,enum ath12k_hw_mode hw_mode)5542 ath12k_wmi_dump_freq_range_per_mac(struct ath12k_base *ab,
5543 struct ath12k_hw_mode_freq_range_arg *freq_range,
5544 enum ath12k_hw_mode hw_mode)
5545 {
5546 u8 i;
5547
5548 for (i = 0; i < MAX_RADIOS; i++)
5549 if (freq_range[i].low_2ghz_freq || freq_range[i].low_5ghz_freq)
5550 ath12k_dbg(ab, ATH12K_DBG_WMI,
5551 "frequency range: %s(%d) mac %d 2 GHz [%d - %d] 5 GHz [%d - %d]",
5552 ath12k_wmi_hw_mode_to_str(hw_mode),
5553 hw_mode, i,
5554 freq_range[i].low_2ghz_freq,
5555 freq_range[i].high_2ghz_freq,
5556 freq_range[i].low_5ghz_freq,
5557 freq_range[i].high_5ghz_freq);
5558 }
5559
ath12k_wmi_dump_freq_range(struct ath12k_base * ab)5560 static void ath12k_wmi_dump_freq_range(struct ath12k_base *ab)
5561 {
5562 struct ath12k_hw_mode_freq_range_arg *freq_range;
5563 u8 i;
5564
5565 for (i = ATH12K_HW_MODE_SMM; i < ATH12K_HW_MODE_MAX; i++) {
5566 freq_range = ab->wmi_ab.hw_mode_info.freq_range_caps[i];
5567 ath12k_wmi_dump_freq_range_per_mac(ab, freq_range, i);
5568 }
5569 }
5570
ath12k_wmi_modify_sbs_freq(struct ath12k_base * ab,u8 phy_id)5571 static int ath12k_wmi_modify_sbs_freq(struct ath12k_base *ab, u8 phy_id)
5572 {
5573 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5574 struct ath12k_hw_mode_freq_range_arg *sbs_mac_range, *shared_mac_range;
5575 struct ath12k_hw_mode_freq_range_arg *non_shared_range;
5576 u8 shared_phy_id;
5577
5578 sbs_mac_range = &hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS][phy_id];
5579
5580 /* if SBS mac range has both 2.4 and 5 GHz ranges, i.e. shared phy_id
5581 * keep the range as it is in SBS
5582 */
5583 if (sbs_mac_range->low_2ghz_freq && sbs_mac_range->low_5ghz_freq)
5584 return 0;
5585
5586 if (sbs_mac_range->low_2ghz_freq && !sbs_mac_range->low_5ghz_freq) {
5587 ath12k_err(ab, "Invalid DBS/SBS mode with only 2.4Ghz");
5588 ath12k_wmi_dump_freq_range_per_mac(ab, sbs_mac_range, ATH12K_HW_MODE_SBS);
5589 return -EINVAL;
5590 }
5591
5592 non_shared_range = sbs_mac_range;
5593 /* if SBS mac range has only 5 GHz then it's the non-shared phy, so
5594 * modify the range as per the shared mac.
5595 */
5596 shared_phy_id = phy_id ? 0 : 1;
5597 shared_mac_range =
5598 &hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS][shared_phy_id];
5599
5600 if (shared_mac_range->low_5ghz_freq > non_shared_range->low_5ghz_freq) {
5601 ath12k_dbg(ab, ATH12K_DBG_WMI, "high 5 GHz shared");
5602 /* If the shared mac lower 5 GHz frequency is greater than
5603 * non-shared mac lower 5 GHz frequency then the shared mac has
5604 * high 5 GHz shared with 2.4 GHz. So non-shared mac's 5 GHz high
5605 * freq should be less than the shared mac's low 5 GHz freq.
5606 */
5607 if (non_shared_range->high_5ghz_freq >=
5608 shared_mac_range->low_5ghz_freq)
5609 non_shared_range->high_5ghz_freq =
5610 max_t(u32, shared_mac_range->low_5ghz_freq - 10,
5611 non_shared_range->low_5ghz_freq);
5612 } else if (shared_mac_range->high_5ghz_freq <
5613 non_shared_range->high_5ghz_freq) {
5614 ath12k_dbg(ab, ATH12K_DBG_WMI, "low 5 GHz shared");
5615 /* If the shared mac high 5 GHz frequency is less than
5616 * non-shared mac high 5 GHz frequency then the shared mac has
5617 * low 5 GHz shared with 2.4 GHz. So non-shared mac's 5 GHz low
5618 * freq should be greater than the shared mac's high 5 GHz freq.
5619 */
5620 if (shared_mac_range->high_5ghz_freq >=
5621 non_shared_range->low_5ghz_freq)
5622 non_shared_range->low_5ghz_freq =
5623 min_t(u32, shared_mac_range->high_5ghz_freq + 10,
5624 non_shared_range->high_5ghz_freq);
5625 } else {
5626 ath12k_warn(ab, "invalid SBS range with all 5 GHz shared");
5627 return -EINVAL;
5628 }
5629
5630 return 0;
5631 }
5632
ath12k_wmi_update_sbs_freq_info(struct ath12k_base * ab)5633 static void ath12k_wmi_update_sbs_freq_info(struct ath12k_base *ab)
5634 {
5635 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5636 struct ath12k_hw_mode_freq_range_arg *mac_range;
5637 u16 sbs_range_sep;
5638 u8 phy_id;
5639 int ret;
5640
5641 mac_range = hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS];
5642
5643 /* If sbs_lower_band_end_freq has a value, then the frequency range
5644 * will be split using that value.
5645 */
5646 sbs_range_sep = ab->wmi_ab.sbs_lower_band_end_freq;
5647 if (sbs_range_sep) {
5648 ath12k_wmi_fill_upper_share_sbs_freq(ab, sbs_range_sep,
5649 mac_range);
5650 ath12k_wmi_fill_lower_share_sbs_freq(ab, sbs_range_sep,
5651 mac_range);
5652 /* Hardware specifies the range boundary with sbs_range_sep,
5653 * (i.e. the boundary between 5 GHz high and 5 GHz low),
5654 * reset the original one to make sure it will not get used.
5655 */
5656 memset(mac_range, 0, sizeof(*mac_range) * MAX_RADIOS);
5657 return;
5658 }
5659
5660 /* If sbs_lower_band_end_freq is not set that means firmware will send one
5661 * shared mac range and one non-shared mac range. so update that freq.
5662 */
5663 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5664 ret = ath12k_wmi_modify_sbs_freq(ab, phy_id);
5665 if (ret) {
5666 memset(mac_range, 0, sizeof(*mac_range) * MAX_RADIOS);
5667 break;
5668 }
5669 }
5670 }
5671
5672 static void
ath12k_wmi_update_mac_freq_info(struct ath12k_base * ab,enum wmi_host_hw_mode_config_type hw_config_type,u32 phy_id,struct ath12k_svc_ext_mac_phy_info * mac_cap)5673 ath12k_wmi_update_mac_freq_info(struct ath12k_base *ab,
5674 enum wmi_host_hw_mode_config_type hw_config_type,
5675 u32 phy_id,
5676 struct ath12k_svc_ext_mac_phy_info *mac_cap)
5677 {
5678 if (phy_id >= MAX_RADIOS) {
5679 ath12k_err(ab, "mac more than two not supported: %d", phy_id);
5680 return;
5681 }
5682
5683 ath12k_dbg(ab, ATH12K_DBG_WMI,
5684 "hw_mode_cfg %d mac %d band 0x%x SBS cutoff freq %d 2 GHz [%d - %d] 5 GHz [%d - %d]",
5685 hw_config_type, phy_id, mac_cap->supported_bands,
5686 ab->wmi_ab.sbs_lower_band_end_freq,
5687 mac_cap->hw_freq_range.low_2ghz_freq,
5688 mac_cap->hw_freq_range.high_2ghz_freq,
5689 mac_cap->hw_freq_range.low_5ghz_freq,
5690 mac_cap->hw_freq_range.high_5ghz_freq);
5691
5692 switch (hw_config_type) {
5693 case WMI_HOST_HW_MODE_SINGLE:
5694 if (phy_id) {
5695 ath12k_dbg(ab, ATH12K_DBG_WMI, "mac phy 1 is not supported");
5696 break;
5697 }
5698 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_SMM, phy_id);
5699 break;
5700
5701 case WMI_HOST_HW_MODE_DBS:
5702 if (!ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_DBS))
5703 ath12k_wmi_update_freq_info(ab, mac_cap,
5704 ATH12K_HW_MODE_DBS, phy_id);
5705 break;
5706 case WMI_HOST_HW_MODE_DBS_SBS:
5707 case WMI_HOST_HW_MODE_DBS_OR_SBS:
5708 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_DBS, phy_id);
5709 if (ab->wmi_ab.sbs_lower_band_end_freq ||
5710 mac_cap->hw_freq_range.low_5ghz_freq ||
5711 mac_cap->hw_freq_range.low_2ghz_freq)
5712 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_SBS,
5713 phy_id);
5714
5715 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_DBS))
5716 ath12k_wmi_update_dbs_freq_info(ab);
5717 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS))
5718 ath12k_wmi_update_sbs_freq_info(ab);
5719 break;
5720 case WMI_HOST_HW_MODE_SBS:
5721 case WMI_HOST_HW_MODE_SBS_PASSIVE:
5722 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_SBS, phy_id);
5723 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS))
5724 ath12k_wmi_update_sbs_freq_info(ab);
5725
5726 break;
5727 default:
5728 break;
5729 }
5730 }
5731
ath12k_wmi_sbs_range_present(struct ath12k_base * ab)5732 static bool ath12k_wmi_sbs_range_present(struct ath12k_base *ab)
5733 {
5734 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS) ||
5735 (ab->wmi_ab.sbs_lower_band_end_freq &&
5736 ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS_LOWER_SHARE) &&
5737 ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS_UPPER_SHARE)))
5738 return true;
5739
5740 return false;
5741 }
5742
ath12k_wmi_update_hw_mode_list(struct ath12k_base * ab)5743 static int ath12k_wmi_update_hw_mode_list(struct ath12k_base *ab)
5744 {
5745 struct ath12k_svc_ext_info *svc_ext_info = &ab->wmi_ab.svc_ext_info;
5746 struct ath12k_hw_mode_info *info = &ab->wmi_ab.hw_mode_info;
5747 enum wmi_host_hw_mode_config_type hw_config_type;
5748 struct ath12k_svc_ext_mac_phy_info *tmp;
5749 bool dbs_mode = false, sbs_mode = false;
5750 u32 i, j = 0;
5751
5752 if (!svc_ext_info->num_hw_modes) {
5753 ath12k_err(ab, "invalid number of hw modes");
5754 return -EINVAL;
5755 }
5756
5757 ath12k_dbg(ab, ATH12K_DBG_WMI, "updated HW mode list: num modes %d",
5758 svc_ext_info->num_hw_modes);
5759
5760 memset(info->freq_range_caps, 0, sizeof(info->freq_range_caps));
5761
5762 for (i = 0; i < svc_ext_info->num_hw_modes; i++) {
5763 if (j >= ATH12K_MAX_MAC_PHY_CAP)
5764 return -EINVAL;
5765
5766 /* Update for MAC0 */
5767 tmp = &svc_ext_info->mac_phy_info[j++];
5768 hw_config_type = tmp->hw_mode_config_type;
5769 ath12k_wmi_update_mac_freq_info(ab, hw_config_type, tmp->phy_id, tmp);
5770
5771 /* SBS and DBS have dual MAC. Up to 2 MACs are considered. */
5772 if (hw_config_type == WMI_HOST_HW_MODE_DBS ||
5773 hw_config_type == WMI_HOST_HW_MODE_SBS_PASSIVE ||
5774 hw_config_type == WMI_HOST_HW_MODE_SBS ||
5775 hw_config_type == WMI_HOST_HW_MODE_DBS_OR_SBS) {
5776 if (j >= ATH12K_MAX_MAC_PHY_CAP)
5777 return -EINVAL;
5778 /* Update for MAC1 */
5779 tmp = &svc_ext_info->mac_phy_info[j++];
5780 ath12k_wmi_update_mac_freq_info(ab, hw_config_type,
5781 tmp->phy_id, tmp);
5782
5783 if (hw_config_type == WMI_HOST_HW_MODE_DBS ||
5784 hw_config_type == WMI_HOST_HW_MODE_DBS_OR_SBS)
5785 dbs_mode = true;
5786
5787 if (ath12k_wmi_sbs_range_present(ab) &&
5788 (hw_config_type == WMI_HOST_HW_MODE_SBS_PASSIVE ||
5789 hw_config_type == WMI_HOST_HW_MODE_SBS ||
5790 hw_config_type == WMI_HOST_HW_MODE_DBS_OR_SBS))
5791 sbs_mode = true;
5792 }
5793 }
5794
5795 info->support_dbs = dbs_mode;
5796 info->support_sbs = sbs_mode;
5797
5798 ath12k_wmi_dump_freq_range(ab);
5799
5800 return 0;
5801 }
5802
ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)5803 static int ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base *ab,
5804 u16 tag, u16 len,
5805 const void *ptr, void *data)
5806 {
5807 const struct ath12k_wmi_dbs_or_sbs_cap_params *dbs_or_sbs_caps;
5808 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
5809 struct ath12k_wmi_svc_rdy_ext2_parse *parse = data;
5810 int ret;
5811
5812 switch (tag) {
5813 case WMI_TAG_SERVICE_READY_EXT2_EVENT:
5814 ret = ath12k_pull_svc_ready_ext2(wmi_handle, ptr,
5815 &parse->arg);
5816 if (ret) {
5817 ath12k_warn(ab,
5818 "failed to extract wmi service ready ext2 parameters: %d\n",
5819 ret);
5820 return ret;
5821 }
5822
5823 ab->wmi_ab.dp_peer_meta_data_ver =
5824 u32_get_bits(parse->arg.target_cap_flags,
5825 WMI_TARGET_CAP_FLAGS_RX_PEER_METADATA_VERSION);
5826 break;
5827
5828 case WMI_TAG_ARRAY_STRUCT:
5829 if (!parse->dma_ring_cap_done) {
5830 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr,
5831 &parse->dma_caps_parse);
5832 if (ret)
5833 return ret;
5834
5835 parse->dma_ring_cap_done = true;
5836 } else if (!parse->spectral_bin_scaling_done) {
5837 /* TODO: This is a place-holder as WMI tag for
5838 * spectral scaling is before
5839 * WMI_TAG_MAC_PHY_CAPABILITIES_EXT
5840 */
5841 parse->spectral_bin_scaling_done = true;
5842 } else if (!parse->mac_phy_caps_ext_done) {
5843 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
5844 ath12k_wmi_tlv_mac_phy_caps_ext,
5845 parse);
5846 if (ret) {
5847 ath12k_warn(ab, "failed to parse extended MAC PHY capabilities WMI TLV: %d\n",
5848 ret);
5849 return ret;
5850 }
5851
5852 parse->mac_phy_caps_ext_done = true;
5853 } else if (!parse->hal_reg_caps_ext2_done) {
5854 parse->hal_reg_caps_ext2_done = true;
5855 } else if (!parse->scan_radio_caps_ext2_done) {
5856 parse->scan_radio_caps_ext2_done = true;
5857 } else if (!parse->twt_caps_done) {
5858 parse->twt_caps_done = true;
5859 } else if (!parse->htt_msdu_idx_to_qtype_map_done) {
5860 parse->htt_msdu_idx_to_qtype_map_done = true;
5861 } else if (!parse->dbs_or_sbs_cap_ext_done) {
5862 dbs_or_sbs_caps = ptr;
5863 ab->wmi_ab.sbs_lower_band_end_freq =
5864 __le32_to_cpu(dbs_or_sbs_caps->sbs_lower_band_end_freq);
5865
5866 ath12k_dbg(ab, ATH12K_DBG_WMI, "sbs_lower_band_end_freq %u\n",
5867 ab->wmi_ab.sbs_lower_band_end_freq);
5868
5869 ret = ath12k_wmi_update_hw_mode_list(ab);
5870 if (ret) {
5871 ath12k_warn(ab, "failed to update hw mode list: %d\n",
5872 ret);
5873 return ret;
5874 }
5875
5876 parse->dbs_or_sbs_cap_ext_done = true;
5877 }
5878
5879 break;
5880 default:
5881 break;
5882 }
5883
5884 return 0;
5885 }
5886
ath12k_service_ready_ext2_event(struct ath12k_base * ab,struct sk_buff * skb)5887 static int ath12k_service_ready_ext2_event(struct ath12k_base *ab,
5888 struct sk_buff *skb)
5889 {
5890 struct ath12k_wmi_svc_rdy_ext2_parse svc_rdy_ext2 = { };
5891 int ret;
5892
5893 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
5894 ath12k_wmi_svc_rdy_ext2_parse,
5895 &svc_rdy_ext2);
5896 if (ret) {
5897 ath12k_warn(ab, "failed to parse ext2 event tlv %d\n", ret);
5898 goto err;
5899 }
5900
5901 complete(&ab->wmi_ab.service_ready);
5902
5903 return 0;
5904
5905 err:
5906 ath12k_wmi_free_dbring_caps(ab);
5907 return ret;
5908 }
5909
ath12k_pull_vdev_start_resp_tlv(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_vdev_start_resp_event * vdev_rsp)5910 static int ath12k_pull_vdev_start_resp_tlv(struct ath12k_base *ab, struct sk_buff *skb,
5911 struct wmi_vdev_start_resp_event *vdev_rsp)
5912 {
5913 const void **tb;
5914 const struct wmi_vdev_start_resp_event *ev;
5915 int ret;
5916
5917 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
5918 if (IS_ERR(tb)) {
5919 ret = PTR_ERR(tb);
5920 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5921 return ret;
5922 }
5923
5924 ev = tb[WMI_TAG_VDEV_START_RESPONSE_EVENT];
5925 if (!ev) {
5926 ath12k_warn(ab, "failed to fetch vdev start resp ev");
5927 kfree(tb);
5928 return -EPROTO;
5929 }
5930
5931 *vdev_rsp = *ev;
5932
5933 kfree(tb);
5934 return 0;
5935 }
5936
5937 static struct ath12k_reg_rule
create_ext_reg_rules_from_wmi(u32 num_reg_rules,struct ath12k_wmi_reg_rule_ext_params * wmi_reg_rule)5938 *create_ext_reg_rules_from_wmi(u32 num_reg_rules,
5939 #if defined(__linux__)
5940 struct ath12k_wmi_reg_rule_ext_params *wmi_reg_rule)
5941 #elif defined(__FreeBSD__)
5942 const struct ath12k_wmi_reg_rule_ext_params *wmi_reg_rule)
5943 #endif
5944 {
5945 struct ath12k_reg_rule *reg_rule_ptr;
5946 u32 count;
5947
5948 reg_rule_ptr = kzalloc((num_reg_rules * sizeof(*reg_rule_ptr)),
5949 GFP_ATOMIC);
5950
5951 if (!reg_rule_ptr)
5952 return NULL;
5953
5954 for (count = 0; count < num_reg_rules; count++) {
5955 reg_rule_ptr[count].start_freq =
5956 le32_get_bits(wmi_reg_rule[count].freq_info,
5957 REG_RULE_START_FREQ);
5958 reg_rule_ptr[count].end_freq =
5959 le32_get_bits(wmi_reg_rule[count].freq_info,
5960 REG_RULE_END_FREQ);
5961 reg_rule_ptr[count].max_bw =
5962 le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
5963 REG_RULE_MAX_BW);
5964 reg_rule_ptr[count].reg_power =
5965 le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
5966 REG_RULE_REG_PWR);
5967 reg_rule_ptr[count].ant_gain =
5968 le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
5969 REG_RULE_ANT_GAIN);
5970 reg_rule_ptr[count].flags =
5971 le32_get_bits(wmi_reg_rule[count].flag_info,
5972 REG_RULE_FLAGS);
5973 reg_rule_ptr[count].psd_flag =
5974 le32_get_bits(wmi_reg_rule[count].psd_power_info,
5975 REG_RULE_PSD_INFO);
5976 reg_rule_ptr[count].psd_eirp =
5977 le32_get_bits(wmi_reg_rule[count].psd_power_info,
5978 REG_RULE_PSD_EIRP);
5979 }
5980
5981 return reg_rule_ptr;
5982 }
5983
ath12k_wmi_ignore_num_extra_rules(struct ath12k_wmi_reg_rule_ext_params * rule,u32 num_reg_rules)5984 static u8 ath12k_wmi_ignore_num_extra_rules(struct ath12k_wmi_reg_rule_ext_params *rule,
5985 u32 num_reg_rules)
5986 {
5987 u8 num_invalid_5ghz_rules = 0;
5988 u32 count, start_freq;
5989
5990 for (count = 0; count < num_reg_rules; count++) {
5991 start_freq = le32_get_bits(rule[count].freq_info, REG_RULE_START_FREQ);
5992
5993 if (start_freq >= ATH12K_MIN_6GHZ_FREQ)
5994 num_invalid_5ghz_rules++;
5995 }
5996
5997 return num_invalid_5ghz_rules;
5998 }
5999
ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base * ab,struct sk_buff * skb,struct ath12k_reg_info * reg_info)6000 static int ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base *ab,
6001 struct sk_buff *skb,
6002 struct ath12k_reg_info *reg_info)
6003 {
6004 const void **tb;
6005 const struct wmi_reg_chan_list_cc_ext_event *ev;
6006 #if defined(__linux__)
6007 struct ath12k_wmi_reg_rule_ext_params *ext_wmi_reg_rule;
6008 #elif defined(__FreeBSD__)
6009 const struct ath12k_wmi_reg_rule_ext_params *ext_wmi_reg_rule;
6010 #endif
6011 u32 num_2g_reg_rules, num_5g_reg_rules;
6012 u32 num_6g_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
6013 u32 num_6g_reg_rules_cl[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
6014 u8 num_invalid_5ghz_ext_rules;
6015 u32 total_reg_rules = 0;
6016 int ret, i, j;
6017
6018 ath12k_dbg(ab, ATH12K_DBG_WMI, "processing regulatory ext channel list\n");
6019
6020 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6021 if (IS_ERR(tb)) {
6022 ret = PTR_ERR(tb);
6023 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6024 return ret;
6025 }
6026
6027 ev = tb[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT];
6028 if (!ev) {
6029 ath12k_warn(ab, "failed to fetch reg chan list ext update ev\n");
6030 kfree(tb);
6031 return -EPROTO;
6032 }
6033
6034 reg_info->num_2g_reg_rules = le32_to_cpu(ev->num_2g_reg_rules);
6035 reg_info->num_5g_reg_rules = le32_to_cpu(ev->num_5g_reg_rules);
6036 reg_info->num_6g_reg_rules_ap[WMI_REG_INDOOR_AP] =
6037 le32_to_cpu(ev->num_6g_reg_rules_ap_lpi);
6038 reg_info->num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP] =
6039 le32_to_cpu(ev->num_6g_reg_rules_ap_sp);
6040 reg_info->num_6g_reg_rules_ap[WMI_REG_VLP_AP] =
6041 le32_to_cpu(ev->num_6g_reg_rules_ap_vlp);
6042
6043 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
6044 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] =
6045 le32_to_cpu(ev->num_6g_reg_rules_cl_lpi[i]);
6046 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] =
6047 le32_to_cpu(ev->num_6g_reg_rules_cl_sp[i]);
6048 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] =
6049 le32_to_cpu(ev->num_6g_reg_rules_cl_vlp[i]);
6050 }
6051
6052 num_2g_reg_rules = reg_info->num_2g_reg_rules;
6053 total_reg_rules += num_2g_reg_rules;
6054 num_5g_reg_rules = reg_info->num_5g_reg_rules;
6055 total_reg_rules += num_5g_reg_rules;
6056
6057 if (num_2g_reg_rules > MAX_REG_RULES || num_5g_reg_rules > MAX_REG_RULES) {
6058 ath12k_warn(ab, "Num reg rules for 2G/5G exceeds max limit (num_2g_reg_rules: %d num_5g_reg_rules: %d max_rules: %d)\n",
6059 num_2g_reg_rules, num_5g_reg_rules, MAX_REG_RULES);
6060 kfree(tb);
6061 return -EINVAL;
6062 }
6063
6064 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) {
6065 num_6g_reg_rules_ap[i] = reg_info->num_6g_reg_rules_ap[i];
6066
6067 if (num_6g_reg_rules_ap[i] > MAX_6GHZ_REG_RULES) {
6068 ath12k_warn(ab, "Num 6G reg rules for AP mode(%d) exceeds max limit (num_6g_reg_rules_ap: %d, max_rules: %d)\n",
6069 i, num_6g_reg_rules_ap[i], MAX_6GHZ_REG_RULES);
6070 kfree(tb);
6071 return -EINVAL;
6072 }
6073
6074 total_reg_rules += num_6g_reg_rules_ap[i];
6075 }
6076
6077 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
6078 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] =
6079 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i];
6080 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i];
6081
6082 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] =
6083 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i];
6084 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i];
6085
6086 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] =
6087 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i];
6088 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_VLP_AP][i];
6089
6090 if (num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] > MAX_6GHZ_REG_RULES ||
6091 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] > MAX_6GHZ_REG_RULES ||
6092 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] > MAX_6GHZ_REG_RULES) {
6093 ath12k_warn(ab, "Num 6g client reg rules exceeds max limit, for client(type: %d)\n",
6094 i);
6095 kfree(tb);
6096 return -EINVAL;
6097 }
6098 }
6099
6100 if (!total_reg_rules) {
6101 ath12k_warn(ab, "No reg rules available\n");
6102 kfree(tb);
6103 return -EINVAL;
6104 }
6105
6106 memcpy(reg_info->alpha2, &ev->alpha2, REG_ALPHA2_LEN);
6107
6108 reg_info->dfs_region = le32_to_cpu(ev->dfs_region);
6109 reg_info->phybitmap = le32_to_cpu(ev->phybitmap);
6110 reg_info->num_phy = le32_to_cpu(ev->num_phy);
6111 reg_info->phy_id = le32_to_cpu(ev->phy_id);
6112 reg_info->ctry_code = le32_to_cpu(ev->country_id);
6113 reg_info->reg_dmn_pair = le32_to_cpu(ev->domain_code);
6114
6115 switch (le32_to_cpu(ev->status_code)) {
6116 case WMI_REG_SET_CC_STATUS_PASS:
6117 reg_info->status_code = REG_SET_CC_STATUS_PASS;
6118 break;
6119 case WMI_REG_CURRENT_ALPHA2_NOT_FOUND:
6120 reg_info->status_code = REG_CURRENT_ALPHA2_NOT_FOUND;
6121 break;
6122 case WMI_REG_INIT_ALPHA2_NOT_FOUND:
6123 reg_info->status_code = REG_INIT_ALPHA2_NOT_FOUND;
6124 break;
6125 case WMI_REG_SET_CC_CHANGE_NOT_ALLOWED:
6126 reg_info->status_code = REG_SET_CC_CHANGE_NOT_ALLOWED;
6127 break;
6128 case WMI_REG_SET_CC_STATUS_NO_MEMORY:
6129 reg_info->status_code = REG_SET_CC_STATUS_NO_MEMORY;
6130 break;
6131 case WMI_REG_SET_CC_STATUS_FAIL:
6132 reg_info->status_code = REG_SET_CC_STATUS_FAIL;
6133 break;
6134 }
6135
6136 reg_info->is_ext_reg_event = true;
6137
6138 reg_info->min_bw_2g = le32_to_cpu(ev->min_bw_2g);
6139 reg_info->max_bw_2g = le32_to_cpu(ev->max_bw_2g);
6140 reg_info->min_bw_5g = le32_to_cpu(ev->min_bw_5g);
6141 reg_info->max_bw_5g = le32_to_cpu(ev->max_bw_5g);
6142 reg_info->min_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->min_bw_6g_ap_lpi);
6143 reg_info->max_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->max_bw_6g_ap_lpi);
6144 reg_info->min_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->min_bw_6g_ap_sp);
6145 reg_info->max_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->max_bw_6g_ap_sp);
6146 reg_info->min_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->min_bw_6g_ap_vlp);
6147 reg_info->max_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->max_bw_6g_ap_vlp);
6148
6149 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
6150 reg_info->min_bw_6g_client[WMI_REG_INDOOR_AP][i] =
6151 le32_to_cpu(ev->min_bw_6g_client_lpi[i]);
6152 reg_info->max_bw_6g_client[WMI_REG_INDOOR_AP][i] =
6153 le32_to_cpu(ev->max_bw_6g_client_lpi[i]);
6154 reg_info->min_bw_6g_client[WMI_REG_STD_POWER_AP][i] =
6155 le32_to_cpu(ev->min_bw_6g_client_sp[i]);
6156 reg_info->max_bw_6g_client[WMI_REG_STD_POWER_AP][i] =
6157 le32_to_cpu(ev->max_bw_6g_client_sp[i]);
6158 reg_info->min_bw_6g_client[WMI_REG_VLP_AP][i] =
6159 le32_to_cpu(ev->min_bw_6g_client_vlp[i]);
6160 reg_info->max_bw_6g_client[WMI_REG_VLP_AP][i] =
6161 le32_to_cpu(ev->max_bw_6g_client_vlp[i]);
6162 }
6163
6164 ath12k_dbg(ab, ATH12K_DBG_WMI,
6165 "%s:cc_ext %s dfs %d BW: min_2g %d max_2g %d min_5g %d max_5g %d phy_bitmap 0x%x",
6166 __func__, reg_info->alpha2, reg_info->dfs_region,
6167 reg_info->min_bw_2g, reg_info->max_bw_2g,
6168 reg_info->min_bw_5g, reg_info->max_bw_5g,
6169 reg_info->phybitmap);
6170
6171 ath12k_dbg(ab, ATH12K_DBG_WMI,
6172 "num_2g_reg_rules %d num_5g_reg_rules %d",
6173 num_2g_reg_rules, num_5g_reg_rules);
6174
6175 ath12k_dbg(ab, ATH12K_DBG_WMI,
6176 "num_6g_reg_rules_ap_lpi: %d num_6g_reg_rules_ap_sp: %d num_6g_reg_rules_ap_vlp: %d",
6177 num_6g_reg_rules_ap[WMI_REG_INDOOR_AP],
6178 num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP],
6179 num_6g_reg_rules_ap[WMI_REG_VLP_AP]);
6180
6181 ath12k_dbg(ab, ATH12K_DBG_WMI,
6182 "6g Regular client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d",
6183 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_DEFAULT_CLIENT],
6184 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_DEFAULT_CLIENT],
6185 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_DEFAULT_CLIENT]);
6186
6187 ath12k_dbg(ab, ATH12K_DBG_WMI,
6188 "6g Subordinate client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d",
6189 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_SUBORDINATE_CLIENT],
6190 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_SUBORDINATE_CLIENT],
6191 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_SUBORDINATE_CLIENT]);
6192
6193 ext_wmi_reg_rule =
6194 #if defined(__linux__)
6195 (struct ath12k_wmi_reg_rule_ext_params *)((u8 *)ev
6196 #elif defined(__FreeBSD__)
6197 (const struct ath12k_wmi_reg_rule_ext_params *)((const u8 *)ev
6198 #endif
6199 + sizeof(*ev)
6200 + sizeof(struct wmi_tlv));
6201
6202 if (num_2g_reg_rules) {
6203 reg_info->reg_rules_2g_ptr =
6204 create_ext_reg_rules_from_wmi(num_2g_reg_rules,
6205 ext_wmi_reg_rule);
6206
6207 if (!reg_info->reg_rules_2g_ptr) {
6208 kfree(tb);
6209 ath12k_warn(ab, "Unable to Allocate memory for 2g rules\n");
6210 return -ENOMEM;
6211 }
6212 }
6213
6214 ext_wmi_reg_rule += num_2g_reg_rules;
6215
6216 /* Firmware might include 6 GHz reg rule in 5 GHz rule list
6217 * for few countries along with separate 6 GHz rule.
6218 * Having same 6 GHz reg rule in 5 GHz and 6 GHz rules list
6219 * causes intersect check to be true, and same rules will be
6220 * shown multiple times in iw cmd.
6221 * Hence, avoid parsing 6 GHz rule from 5 GHz reg rule list
6222 */
6223 num_invalid_5ghz_ext_rules = ath12k_wmi_ignore_num_extra_rules(ext_wmi_reg_rule,
6224 num_5g_reg_rules);
6225
6226 if (num_invalid_5ghz_ext_rules) {
6227 ath12k_dbg(ab, ATH12K_DBG_WMI,
6228 "CC: %s 5 GHz reg rules number %d from fw, %d number of invalid 5 GHz rules",
6229 reg_info->alpha2, reg_info->num_5g_reg_rules,
6230 num_invalid_5ghz_ext_rules);
6231
6232 num_5g_reg_rules = num_5g_reg_rules - num_invalid_5ghz_ext_rules;
6233 reg_info->num_5g_reg_rules = num_5g_reg_rules;
6234 }
6235
6236 if (num_5g_reg_rules) {
6237 reg_info->reg_rules_5g_ptr =
6238 create_ext_reg_rules_from_wmi(num_5g_reg_rules,
6239 ext_wmi_reg_rule);
6240
6241 if (!reg_info->reg_rules_5g_ptr) {
6242 kfree(tb);
6243 ath12k_warn(ab, "Unable to Allocate memory for 5g rules\n");
6244 return -ENOMEM;
6245 }
6246 }
6247
6248 /* We have adjusted the number of 5 GHz reg rules above. But still those
6249 * many rules needs to be adjusted in ext_wmi_reg_rule.
6250 *
6251 * NOTE: num_invalid_5ghz_ext_rules will be 0 for rest other cases.
6252 */
6253 ext_wmi_reg_rule += (num_5g_reg_rules + num_invalid_5ghz_ext_rules);
6254
6255 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) {
6256 reg_info->reg_rules_6g_ap_ptr[i] =
6257 create_ext_reg_rules_from_wmi(num_6g_reg_rules_ap[i],
6258 ext_wmi_reg_rule);
6259
6260 if (!reg_info->reg_rules_6g_ap_ptr[i]) {
6261 kfree(tb);
6262 ath12k_warn(ab, "Unable to Allocate memory for 6g ap rules\n");
6263 return -ENOMEM;
6264 }
6265
6266 ext_wmi_reg_rule += num_6g_reg_rules_ap[i];
6267 }
6268
6269 for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) {
6270 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
6271 reg_info->reg_rules_6g_client_ptr[j][i] =
6272 create_ext_reg_rules_from_wmi(num_6g_reg_rules_cl[j][i],
6273 ext_wmi_reg_rule);
6274
6275 if (!reg_info->reg_rules_6g_client_ptr[j][i]) {
6276 kfree(tb);
6277 ath12k_warn(ab, "Unable to Allocate memory for 6g client rules\n");
6278 return -ENOMEM;
6279 }
6280
6281 ext_wmi_reg_rule += num_6g_reg_rules_cl[j][i];
6282 }
6283 }
6284
6285 reg_info->client_type = le32_to_cpu(ev->client_type);
6286 reg_info->rnr_tpe_usable = ev->rnr_tpe_usable;
6287 reg_info->unspecified_ap_usable = ev->unspecified_ap_usable;
6288 reg_info->domain_code_6g_ap[WMI_REG_INDOOR_AP] =
6289 le32_to_cpu(ev->domain_code_6g_ap_lpi);
6290 reg_info->domain_code_6g_ap[WMI_REG_STD_POWER_AP] =
6291 le32_to_cpu(ev->domain_code_6g_ap_sp);
6292 reg_info->domain_code_6g_ap[WMI_REG_VLP_AP] =
6293 le32_to_cpu(ev->domain_code_6g_ap_vlp);
6294
6295 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
6296 reg_info->domain_code_6g_client[WMI_REG_INDOOR_AP][i] =
6297 le32_to_cpu(ev->domain_code_6g_client_lpi[i]);
6298 reg_info->domain_code_6g_client[WMI_REG_STD_POWER_AP][i] =
6299 le32_to_cpu(ev->domain_code_6g_client_sp[i]);
6300 reg_info->domain_code_6g_client[WMI_REG_VLP_AP][i] =
6301 le32_to_cpu(ev->domain_code_6g_client_vlp[i]);
6302 }
6303
6304 reg_info->domain_code_6g_super_id = le32_to_cpu(ev->domain_code_6g_super_id);
6305
6306 ath12k_dbg(ab, ATH12K_DBG_WMI, "6g client_type: %d domain_code_6g_super_id: %d",
6307 reg_info->client_type, reg_info->domain_code_6g_super_id);
6308
6309 ath12k_dbg(ab, ATH12K_DBG_WMI, "processed regulatory ext channel list\n");
6310
6311 kfree(tb);
6312 return 0;
6313 }
6314
ath12k_pull_peer_del_resp_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_peer_delete_resp_event * peer_del_resp)6315 static int ath12k_pull_peer_del_resp_ev(struct ath12k_base *ab, struct sk_buff *skb,
6316 struct wmi_peer_delete_resp_event *peer_del_resp)
6317 {
6318 const void **tb;
6319 const struct wmi_peer_delete_resp_event *ev;
6320 int ret;
6321
6322 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6323 if (IS_ERR(tb)) {
6324 ret = PTR_ERR(tb);
6325 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6326 return ret;
6327 }
6328
6329 ev = tb[WMI_TAG_PEER_DELETE_RESP_EVENT];
6330 if (!ev) {
6331 ath12k_warn(ab, "failed to fetch peer delete resp ev");
6332 kfree(tb);
6333 return -EPROTO;
6334 }
6335
6336 memset(peer_del_resp, 0, sizeof(*peer_del_resp));
6337
6338 peer_del_resp->vdev_id = ev->vdev_id;
6339 ether_addr_copy(peer_del_resp->peer_macaddr.addr,
6340 ev->peer_macaddr.addr);
6341
6342 kfree(tb);
6343 return 0;
6344 }
6345
ath12k_pull_vdev_del_resp_ev(struct ath12k_base * ab,struct sk_buff * skb,u32 * vdev_id)6346 static int ath12k_pull_vdev_del_resp_ev(struct ath12k_base *ab,
6347 struct sk_buff *skb,
6348 u32 *vdev_id)
6349 {
6350 const void **tb;
6351 const struct wmi_vdev_delete_resp_event *ev;
6352 int ret;
6353
6354 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6355 if (IS_ERR(tb)) {
6356 ret = PTR_ERR(tb);
6357 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6358 return ret;
6359 }
6360
6361 ev = tb[WMI_TAG_VDEV_DELETE_RESP_EVENT];
6362 if (!ev) {
6363 ath12k_warn(ab, "failed to fetch vdev delete resp ev");
6364 kfree(tb);
6365 return -EPROTO;
6366 }
6367
6368 *vdev_id = le32_to_cpu(ev->vdev_id);
6369
6370 kfree(tb);
6371 return 0;
6372 }
6373
ath12k_pull_bcn_tx_status_ev(struct ath12k_base * ab,struct sk_buff * skb,u32 * vdev_id,u32 * tx_status)6374 static int ath12k_pull_bcn_tx_status_ev(struct ath12k_base *ab,
6375 struct sk_buff *skb,
6376 u32 *vdev_id, u32 *tx_status)
6377 {
6378 const void **tb;
6379 const struct wmi_bcn_tx_status_event *ev;
6380 int ret;
6381
6382 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6383 if (IS_ERR(tb)) {
6384 ret = PTR_ERR(tb);
6385 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6386 return ret;
6387 }
6388
6389 ev = tb[WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT];
6390 if (!ev) {
6391 ath12k_warn(ab, "failed to fetch bcn tx status ev");
6392 kfree(tb);
6393 return -EPROTO;
6394 }
6395
6396 *vdev_id = le32_to_cpu(ev->vdev_id);
6397 *tx_status = le32_to_cpu(ev->tx_status);
6398
6399 kfree(tb);
6400 return 0;
6401 }
6402
ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base * ab,struct sk_buff * skb,u32 * vdev_id)6403 static int ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base *ab, struct sk_buff *skb,
6404 u32 *vdev_id)
6405 {
6406 const void **tb;
6407 const struct wmi_vdev_stopped_event *ev;
6408 int ret;
6409
6410 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6411 if (IS_ERR(tb)) {
6412 ret = PTR_ERR(tb);
6413 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6414 return ret;
6415 }
6416
6417 ev = tb[WMI_TAG_VDEV_STOPPED_EVENT];
6418 if (!ev) {
6419 ath12k_warn(ab, "failed to fetch vdev stop ev");
6420 kfree(tb);
6421 return -EPROTO;
6422 }
6423
6424 *vdev_id = le32_to_cpu(ev->vdev_id);
6425
6426 kfree(tb);
6427 return 0;
6428 }
6429
ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)6430 static int ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base *ab,
6431 u16 tag, u16 len,
6432 const void *ptr, void *data)
6433 {
6434 struct wmi_tlv_mgmt_rx_parse *parse = data;
6435
6436 switch (tag) {
6437 case WMI_TAG_MGMT_RX_HDR:
6438 parse->fixed = ptr;
6439 break;
6440 case WMI_TAG_ARRAY_BYTE:
6441 if (!parse->frame_buf_done) {
6442 parse->frame_buf = ptr;
6443 parse->frame_buf_done = true;
6444 }
6445 break;
6446 }
6447 return 0;
6448 }
6449
ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base * ab,struct sk_buff * skb,struct ath12k_wmi_mgmt_rx_arg * hdr)6450 static int ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base *ab,
6451 struct sk_buff *skb,
6452 struct ath12k_wmi_mgmt_rx_arg *hdr)
6453 {
6454 struct wmi_tlv_mgmt_rx_parse parse = { };
6455 const struct ath12k_wmi_mgmt_rx_params *ev;
6456 const u8 *frame;
6457 int i, ret;
6458
6459 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
6460 ath12k_wmi_tlv_mgmt_rx_parse,
6461 &parse);
6462 if (ret) {
6463 ath12k_warn(ab, "failed to parse mgmt rx tlv %d\n", ret);
6464 return ret;
6465 }
6466
6467 ev = parse.fixed;
6468 frame = parse.frame_buf;
6469
6470 if (!ev || !frame) {
6471 ath12k_warn(ab, "failed to fetch mgmt rx hdr");
6472 return -EPROTO;
6473 }
6474
6475 hdr->pdev_id = le32_to_cpu(ev->pdev_id);
6476 hdr->chan_freq = le32_to_cpu(ev->chan_freq);
6477 hdr->channel = le32_to_cpu(ev->channel);
6478 hdr->snr = le32_to_cpu(ev->snr);
6479 hdr->rate = le32_to_cpu(ev->rate);
6480 hdr->phy_mode = le32_to_cpu(ev->phy_mode);
6481 hdr->buf_len = le32_to_cpu(ev->buf_len);
6482 hdr->status = le32_to_cpu(ev->status);
6483 hdr->flags = le32_to_cpu(ev->flags);
6484 hdr->rssi = a_sle32_to_cpu(ev->rssi);
6485 hdr->tsf_delta = le32_to_cpu(ev->tsf_delta);
6486
6487 for (i = 0; i < ATH_MAX_ANTENNA; i++)
6488 hdr->rssi_ctl[i] = le32_to_cpu(ev->rssi_ctl[i]);
6489
6490 if (skb->len < (frame - skb->data) + hdr->buf_len) {
6491 ath12k_warn(ab, "invalid length in mgmt rx hdr ev");
6492 return -EPROTO;
6493 }
6494
6495 /* shift the sk_buff to point to `frame` */
6496 skb_trim(skb, 0);
6497 skb_put(skb, frame - skb->data);
6498 skb_pull(skb, frame - skb->data);
6499 skb_put(skb, hdr->buf_len);
6500
6501 return 0;
6502 }
6503
wmi_process_mgmt_tx_comp(struct ath12k * ar,u32 desc_id,u32 status,u32 ack_rssi)6504 static int wmi_process_mgmt_tx_comp(struct ath12k *ar, u32 desc_id,
6505 u32 status, u32 ack_rssi)
6506 {
6507 struct sk_buff *msdu;
6508 struct ieee80211_tx_info *info;
6509 struct ath12k_skb_cb *skb_cb;
6510 int num_mgmt;
6511
6512 spin_lock_bh(&ar->txmgmt_idr_lock);
6513 msdu = idr_find(&ar->txmgmt_idr, desc_id);
6514
6515 if (!msdu) {
6516 ath12k_warn(ar->ab, "received mgmt tx compl for invalid msdu_id: %d\n",
6517 desc_id);
6518 spin_unlock_bh(&ar->txmgmt_idr_lock);
6519 return -ENOENT;
6520 }
6521
6522 idr_remove(&ar->txmgmt_idr, desc_id);
6523 spin_unlock_bh(&ar->txmgmt_idr_lock);
6524
6525 skb_cb = ATH12K_SKB_CB(msdu);
6526 dma_unmap_single(ar->ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
6527
6528 info = IEEE80211_SKB_CB(msdu);
6529 memset(&info->status, 0, sizeof(info->status));
6530
6531 /* skip tx rate update from ieee80211_status*/
6532 info->status.rates[0].idx = -1;
6533
6534 if ((!(info->flags & IEEE80211_TX_CTL_NO_ACK)) && !status) {
6535 info->flags |= IEEE80211_TX_STAT_ACK;
6536 info->status.ack_signal = ack_rssi;
6537 info->status.flags |= IEEE80211_TX_STATUS_ACK_SIGNAL_VALID;
6538 }
6539
6540 if ((info->flags & IEEE80211_TX_CTL_NO_ACK) && !status)
6541 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
6542
6543 ieee80211_tx_status_irqsafe(ath12k_ar_to_hw(ar), msdu);
6544
6545 num_mgmt = atomic_dec_if_positive(&ar->num_pending_mgmt_tx);
6546
6547 /* WARN when we received this event without doing any mgmt tx */
6548 if (num_mgmt < 0)
6549 WARN_ON_ONCE(1);
6550
6551 if (!num_mgmt)
6552 wake_up(&ar->txmgmt_empty_waitq);
6553
6554 return 0;
6555 }
6556
ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_mgmt_tx_compl_event * param)6557 static int ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base *ab,
6558 struct sk_buff *skb,
6559 struct wmi_mgmt_tx_compl_event *param)
6560 {
6561 const void **tb;
6562 const struct wmi_mgmt_tx_compl_event *ev;
6563 int ret;
6564
6565 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6566 if (IS_ERR(tb)) {
6567 ret = PTR_ERR(tb);
6568 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6569 return ret;
6570 }
6571
6572 ev = tb[WMI_TAG_MGMT_TX_COMPL_EVENT];
6573 if (!ev) {
6574 ath12k_warn(ab, "failed to fetch mgmt tx compl ev");
6575 kfree(tb);
6576 return -EPROTO;
6577 }
6578
6579 param->pdev_id = ev->pdev_id;
6580 param->desc_id = ev->desc_id;
6581 param->status = ev->status;
6582 param->ppdu_id = ev->ppdu_id;
6583 param->ack_rssi = ev->ack_rssi;
6584
6585 kfree(tb);
6586 return 0;
6587 }
6588
ath12k_wmi_event_scan_started(struct ath12k * ar)6589 static void ath12k_wmi_event_scan_started(struct ath12k *ar)
6590 {
6591 lockdep_assert_held(&ar->data_lock);
6592
6593 switch (ar->scan.state) {
6594 case ATH12K_SCAN_IDLE:
6595 case ATH12K_SCAN_RUNNING:
6596 case ATH12K_SCAN_ABORTING:
6597 ath12k_warn(ar->ab, "received scan started event in an invalid scan state: %s (%d)\n",
6598 ath12k_scan_state_str(ar->scan.state),
6599 ar->scan.state);
6600 break;
6601 case ATH12K_SCAN_STARTING:
6602 ar->scan.state = ATH12K_SCAN_RUNNING;
6603
6604 if (ar->scan.is_roc)
6605 ieee80211_ready_on_channel(ath12k_ar_to_hw(ar));
6606
6607 complete(&ar->scan.started);
6608 break;
6609 }
6610 }
6611
ath12k_wmi_event_scan_start_failed(struct ath12k * ar)6612 static void ath12k_wmi_event_scan_start_failed(struct ath12k *ar)
6613 {
6614 lockdep_assert_held(&ar->data_lock);
6615
6616 switch (ar->scan.state) {
6617 case ATH12K_SCAN_IDLE:
6618 case ATH12K_SCAN_RUNNING:
6619 case ATH12K_SCAN_ABORTING:
6620 ath12k_warn(ar->ab, "received scan start failed event in an invalid scan state: %s (%d)\n",
6621 ath12k_scan_state_str(ar->scan.state),
6622 ar->scan.state);
6623 break;
6624 case ATH12K_SCAN_STARTING:
6625 complete(&ar->scan.started);
6626 __ath12k_mac_scan_finish(ar);
6627 break;
6628 }
6629 }
6630
ath12k_wmi_event_scan_completed(struct ath12k * ar)6631 static void ath12k_wmi_event_scan_completed(struct ath12k *ar)
6632 {
6633 lockdep_assert_held(&ar->data_lock);
6634
6635 switch (ar->scan.state) {
6636 case ATH12K_SCAN_IDLE:
6637 case ATH12K_SCAN_STARTING:
6638 /* One suspected reason scan can be completed while starting is
6639 * if firmware fails to deliver all scan events to the host,
6640 * e.g. when transport pipe is full. This has been observed
6641 * with spectral scan phyerr events starving wmi transport
6642 * pipe. In such case the "scan completed" event should be (and
6643 * is) ignored by the host as it may be just firmware's scan
6644 * state machine recovering.
6645 */
6646 ath12k_warn(ar->ab, "received scan completed event in an invalid scan state: %s (%d)\n",
6647 ath12k_scan_state_str(ar->scan.state),
6648 ar->scan.state);
6649 break;
6650 case ATH12K_SCAN_RUNNING:
6651 case ATH12K_SCAN_ABORTING:
6652 __ath12k_mac_scan_finish(ar);
6653 break;
6654 }
6655 }
6656
ath12k_wmi_event_scan_bss_chan(struct ath12k * ar)6657 static void ath12k_wmi_event_scan_bss_chan(struct ath12k *ar)
6658 {
6659 lockdep_assert_held(&ar->data_lock);
6660
6661 switch (ar->scan.state) {
6662 case ATH12K_SCAN_IDLE:
6663 case ATH12K_SCAN_STARTING:
6664 ath12k_warn(ar->ab, "received scan bss chan event in an invalid scan state: %s (%d)\n",
6665 ath12k_scan_state_str(ar->scan.state),
6666 ar->scan.state);
6667 break;
6668 case ATH12K_SCAN_RUNNING:
6669 case ATH12K_SCAN_ABORTING:
6670 ar->scan_channel = NULL;
6671 break;
6672 }
6673 }
6674
ath12k_wmi_event_scan_foreign_chan(struct ath12k * ar,u32 freq)6675 static void ath12k_wmi_event_scan_foreign_chan(struct ath12k *ar, u32 freq)
6676 {
6677 struct ieee80211_hw *hw = ath12k_ar_to_hw(ar);
6678
6679 lockdep_assert_held(&ar->data_lock);
6680
6681 switch (ar->scan.state) {
6682 case ATH12K_SCAN_IDLE:
6683 case ATH12K_SCAN_STARTING:
6684 ath12k_warn(ar->ab, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
6685 ath12k_scan_state_str(ar->scan.state),
6686 ar->scan.state);
6687 break;
6688 case ATH12K_SCAN_RUNNING:
6689 case ATH12K_SCAN_ABORTING:
6690 ar->scan_channel = ieee80211_get_channel(hw->wiphy, freq);
6691
6692 if (ar->scan.is_roc && ar->scan.roc_freq == freq)
6693 complete(&ar->scan.on_channel);
6694
6695 break;
6696 }
6697 }
6698
6699 static const char *
ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type,enum wmi_scan_completion_reason reason)6700 ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
6701 enum wmi_scan_completion_reason reason)
6702 {
6703 switch (type) {
6704 case WMI_SCAN_EVENT_STARTED:
6705 return "started";
6706 case WMI_SCAN_EVENT_COMPLETED:
6707 switch (reason) {
6708 case WMI_SCAN_REASON_COMPLETED:
6709 return "completed";
6710 case WMI_SCAN_REASON_CANCELLED:
6711 return "completed [cancelled]";
6712 case WMI_SCAN_REASON_PREEMPTED:
6713 return "completed [preempted]";
6714 case WMI_SCAN_REASON_TIMEDOUT:
6715 return "completed [timedout]";
6716 case WMI_SCAN_REASON_INTERNAL_FAILURE:
6717 return "completed [internal err]";
6718 case WMI_SCAN_REASON_MAX:
6719 break;
6720 }
6721 return "completed [unknown]";
6722 case WMI_SCAN_EVENT_BSS_CHANNEL:
6723 return "bss channel";
6724 case WMI_SCAN_EVENT_FOREIGN_CHAN:
6725 return "foreign channel";
6726 case WMI_SCAN_EVENT_DEQUEUED:
6727 return "dequeued";
6728 case WMI_SCAN_EVENT_PREEMPTED:
6729 return "preempted";
6730 case WMI_SCAN_EVENT_START_FAILED:
6731 return "start failed";
6732 case WMI_SCAN_EVENT_RESTARTED:
6733 return "restarted";
6734 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT:
6735 return "foreign channel exit";
6736 default:
6737 return "unknown";
6738 }
6739 }
6740
ath12k_pull_scan_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_scan_event * scan_evt_param)6741 static int ath12k_pull_scan_ev(struct ath12k_base *ab, struct sk_buff *skb,
6742 struct wmi_scan_event *scan_evt_param)
6743 {
6744 const void **tb;
6745 const struct wmi_scan_event *ev;
6746 int ret;
6747
6748 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6749 if (IS_ERR(tb)) {
6750 ret = PTR_ERR(tb);
6751 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6752 return ret;
6753 }
6754
6755 ev = tb[WMI_TAG_SCAN_EVENT];
6756 if (!ev) {
6757 ath12k_warn(ab, "failed to fetch scan ev");
6758 kfree(tb);
6759 return -EPROTO;
6760 }
6761
6762 scan_evt_param->event_type = ev->event_type;
6763 scan_evt_param->reason = ev->reason;
6764 scan_evt_param->channel_freq = ev->channel_freq;
6765 scan_evt_param->scan_req_id = ev->scan_req_id;
6766 scan_evt_param->scan_id = ev->scan_id;
6767 scan_evt_param->vdev_id = ev->vdev_id;
6768 scan_evt_param->tsf_timestamp = ev->tsf_timestamp;
6769
6770 kfree(tb);
6771 return 0;
6772 }
6773
ath12k_pull_peer_sta_kickout_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_peer_sta_kickout_arg * arg)6774 static int ath12k_pull_peer_sta_kickout_ev(struct ath12k_base *ab, struct sk_buff *skb,
6775 struct wmi_peer_sta_kickout_arg *arg)
6776 {
6777 const void **tb;
6778 const struct wmi_peer_sta_kickout_event *ev;
6779 int ret;
6780
6781 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6782 if (IS_ERR(tb)) {
6783 ret = PTR_ERR(tb);
6784 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6785 return ret;
6786 }
6787
6788 ev = tb[WMI_TAG_PEER_STA_KICKOUT_EVENT];
6789 if (!ev) {
6790 ath12k_warn(ab, "failed to fetch peer sta kickout ev");
6791 kfree(tb);
6792 return -EPROTO;
6793 }
6794
6795 arg->mac_addr = ev->peer_macaddr.addr;
6796 arg->reason = le32_to_cpu(ev->reason);
6797 arg->rssi = le32_to_cpu(ev->rssi);
6798
6799 kfree(tb);
6800 return 0;
6801 }
6802
ath12k_pull_roam_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_roam_event * roam_ev)6803 static int ath12k_pull_roam_ev(struct ath12k_base *ab, struct sk_buff *skb,
6804 struct wmi_roam_event *roam_ev)
6805 {
6806 const void **tb;
6807 const struct wmi_roam_event *ev;
6808 int ret;
6809
6810 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6811 if (IS_ERR(tb)) {
6812 ret = PTR_ERR(tb);
6813 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6814 return ret;
6815 }
6816
6817 ev = tb[WMI_TAG_ROAM_EVENT];
6818 if (!ev) {
6819 ath12k_warn(ab, "failed to fetch roam ev");
6820 kfree(tb);
6821 return -EPROTO;
6822 }
6823
6824 roam_ev->vdev_id = ev->vdev_id;
6825 roam_ev->reason = ev->reason;
6826 roam_ev->rssi = ev->rssi;
6827
6828 kfree(tb);
6829 return 0;
6830 }
6831
freq_to_idx(struct ath12k * ar,int freq)6832 static int freq_to_idx(struct ath12k *ar, int freq)
6833 {
6834 struct ieee80211_supported_band *sband;
6835 struct ieee80211_hw *hw = ath12k_ar_to_hw(ar);
6836 int band, ch, idx = 0;
6837
6838 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
6839 if (!ar->mac.sbands[band].channels)
6840 continue;
6841
6842 sband = hw->wiphy->bands[band];
6843 if (!sband)
6844 continue;
6845
6846 for (ch = 0; ch < sband->n_channels; ch++, idx++)
6847 if (sband->channels[ch].center_freq == freq)
6848 goto exit;
6849 }
6850
6851 exit:
6852 return idx;
6853 }
6854
ath12k_pull_chan_info_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_chan_info_event * ch_info_ev)6855 static int ath12k_pull_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb,
6856 struct wmi_chan_info_event *ch_info_ev)
6857 {
6858 const void **tb;
6859 const struct wmi_chan_info_event *ev;
6860 int ret;
6861
6862 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6863 if (IS_ERR(tb)) {
6864 ret = PTR_ERR(tb);
6865 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6866 return ret;
6867 }
6868
6869 ev = tb[WMI_TAG_CHAN_INFO_EVENT];
6870 if (!ev) {
6871 ath12k_warn(ab, "failed to fetch chan info ev");
6872 kfree(tb);
6873 return -EPROTO;
6874 }
6875
6876 ch_info_ev->err_code = ev->err_code;
6877 ch_info_ev->freq = ev->freq;
6878 ch_info_ev->cmd_flags = ev->cmd_flags;
6879 ch_info_ev->noise_floor = ev->noise_floor;
6880 ch_info_ev->rx_clear_count = ev->rx_clear_count;
6881 ch_info_ev->cycle_count = ev->cycle_count;
6882 ch_info_ev->chan_tx_pwr_range = ev->chan_tx_pwr_range;
6883 ch_info_ev->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
6884 ch_info_ev->rx_frame_count = ev->rx_frame_count;
6885 ch_info_ev->tx_frame_cnt = ev->tx_frame_cnt;
6886 ch_info_ev->mac_clk_mhz = ev->mac_clk_mhz;
6887 ch_info_ev->vdev_id = ev->vdev_id;
6888
6889 kfree(tb);
6890 return 0;
6891 }
6892
6893 static int
ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_pdev_bss_chan_info_event * bss_ch_info_ev)6894 ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb,
6895 struct wmi_pdev_bss_chan_info_event *bss_ch_info_ev)
6896 {
6897 const void **tb;
6898 const struct wmi_pdev_bss_chan_info_event *ev;
6899 int ret;
6900
6901 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6902 if (IS_ERR(tb)) {
6903 ret = PTR_ERR(tb);
6904 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6905 return ret;
6906 }
6907
6908 ev = tb[WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT];
6909 if (!ev) {
6910 ath12k_warn(ab, "failed to fetch pdev bss chan info ev");
6911 kfree(tb);
6912 return -EPROTO;
6913 }
6914
6915 bss_ch_info_ev->pdev_id = ev->pdev_id;
6916 bss_ch_info_ev->freq = ev->freq;
6917 bss_ch_info_ev->noise_floor = ev->noise_floor;
6918 bss_ch_info_ev->rx_clear_count_low = ev->rx_clear_count_low;
6919 bss_ch_info_ev->rx_clear_count_high = ev->rx_clear_count_high;
6920 bss_ch_info_ev->cycle_count_low = ev->cycle_count_low;
6921 bss_ch_info_ev->cycle_count_high = ev->cycle_count_high;
6922 bss_ch_info_ev->tx_cycle_count_low = ev->tx_cycle_count_low;
6923 bss_ch_info_ev->tx_cycle_count_high = ev->tx_cycle_count_high;
6924 bss_ch_info_ev->rx_cycle_count_low = ev->rx_cycle_count_low;
6925 bss_ch_info_ev->rx_cycle_count_high = ev->rx_cycle_count_high;
6926 bss_ch_info_ev->rx_bss_cycle_count_low = ev->rx_bss_cycle_count_low;
6927 bss_ch_info_ev->rx_bss_cycle_count_high = ev->rx_bss_cycle_count_high;
6928
6929 kfree(tb);
6930 return 0;
6931 }
6932
6933 static int
ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_vdev_install_key_complete_arg * arg)6934 ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base *ab, struct sk_buff *skb,
6935 struct wmi_vdev_install_key_complete_arg *arg)
6936 {
6937 const void **tb;
6938 const struct wmi_vdev_install_key_compl_event *ev;
6939 int ret;
6940
6941 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6942 if (IS_ERR(tb)) {
6943 ret = PTR_ERR(tb);
6944 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6945 return ret;
6946 }
6947
6948 ev = tb[WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT];
6949 if (!ev) {
6950 ath12k_warn(ab, "failed to fetch vdev install key compl ev");
6951 kfree(tb);
6952 return -EPROTO;
6953 }
6954
6955 arg->vdev_id = le32_to_cpu(ev->vdev_id);
6956 arg->macaddr = ev->peer_macaddr.addr;
6957 arg->key_idx = le32_to_cpu(ev->key_idx);
6958 arg->key_flags = le32_to_cpu(ev->key_flags);
6959 arg->status = le32_to_cpu(ev->status);
6960
6961 kfree(tb);
6962 return 0;
6963 }
6964
ath12k_pull_peer_assoc_conf_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_peer_assoc_conf_arg * peer_assoc_conf)6965 static int ath12k_pull_peer_assoc_conf_ev(struct ath12k_base *ab, struct sk_buff *skb,
6966 struct wmi_peer_assoc_conf_arg *peer_assoc_conf)
6967 {
6968 const void **tb;
6969 const struct wmi_peer_assoc_conf_event *ev;
6970 int ret;
6971
6972 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
6973 if (IS_ERR(tb)) {
6974 ret = PTR_ERR(tb);
6975 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6976 return ret;
6977 }
6978
6979 ev = tb[WMI_TAG_PEER_ASSOC_CONF_EVENT];
6980 if (!ev) {
6981 ath12k_warn(ab, "failed to fetch peer assoc conf ev");
6982 kfree(tb);
6983 return -EPROTO;
6984 }
6985
6986 peer_assoc_conf->vdev_id = le32_to_cpu(ev->vdev_id);
6987 peer_assoc_conf->macaddr = ev->peer_macaddr.addr;
6988
6989 kfree(tb);
6990 return 0;
6991 }
6992
6993 static int
ath12k_pull_pdev_temp_ev(struct ath12k_base * ab,struct sk_buff * skb,const struct wmi_pdev_temperature_event * ev)6994 ath12k_pull_pdev_temp_ev(struct ath12k_base *ab, struct sk_buff *skb,
6995 const struct wmi_pdev_temperature_event *ev)
6996 {
6997 const void **tb;
6998 int ret;
6999
7000 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
7001 if (IS_ERR(tb)) {
7002 ret = PTR_ERR(tb);
7003 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
7004 return ret;
7005 }
7006
7007 ev = tb[WMI_TAG_PDEV_TEMPERATURE_EVENT];
7008 if (!ev) {
7009 ath12k_warn(ab, "failed to fetch pdev temp ev");
7010 kfree(tb);
7011 return -EPROTO;
7012 }
7013
7014 kfree(tb);
7015 return 0;
7016 }
7017
ath12k_wmi_op_ep_tx_credits(struct ath12k_base * ab)7018 static void ath12k_wmi_op_ep_tx_credits(struct ath12k_base *ab)
7019 {
7020 /* try to send pending beacons first. they take priority */
7021 wake_up(&ab->wmi_ab.tx_credits_wq);
7022 }
7023
ath12k_reg_11d_new_cc_event(struct ath12k_base * ab,struct sk_buff * skb)7024 static int ath12k_reg_11d_new_cc_event(struct ath12k_base *ab, struct sk_buff *skb)
7025 {
7026 const struct wmi_11d_new_cc_event *ev;
7027 struct ath12k *ar;
7028 struct ath12k_pdev *pdev;
7029 const void **tb;
7030 int ret, i;
7031
7032 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
7033 if (IS_ERR(tb)) {
7034 ret = PTR_ERR(tb);
7035 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
7036 return ret;
7037 }
7038
7039 ev = tb[WMI_TAG_11D_NEW_COUNTRY_EVENT];
7040 if (!ev) {
7041 kfree(tb);
7042 ath12k_warn(ab, "failed to fetch 11d new cc ev");
7043 return -EPROTO;
7044 }
7045
7046 spin_lock_bh(&ab->base_lock);
7047 memcpy(&ab->new_alpha2, &ev->new_alpha2, REG_ALPHA2_LEN);
7048 spin_unlock_bh(&ab->base_lock);
7049
7050 ath12k_dbg(ab, ATH12K_DBG_WMI, "wmi 11d new cc %c%c\n",
7051 ab->new_alpha2[0],
7052 ab->new_alpha2[1]);
7053
7054 kfree(tb);
7055
7056 for (i = 0; i < ab->num_radios; i++) {
7057 pdev = &ab->pdevs[i];
7058 ar = pdev->ar;
7059 ar->state_11d = ATH12K_11D_IDLE;
7060 ar->ah->regd_updated = false;
7061 complete(&ar->completed_11d_scan);
7062 }
7063
7064 queue_work(ab->workqueue, &ab->update_11d_work);
7065
7066 return 0;
7067 }
7068
ath12k_wmi_htc_tx_complete(struct ath12k_base * ab,struct sk_buff * skb)7069 static void ath12k_wmi_htc_tx_complete(struct ath12k_base *ab,
7070 struct sk_buff *skb)
7071 {
7072 dev_kfree_skb(skb);
7073 }
7074
ath12k_reg_chan_list_event(struct ath12k_base * ab,struct sk_buff * skb)7075 static int ath12k_reg_chan_list_event(struct ath12k_base *ab, struct sk_buff *skb)
7076 {
7077 struct ath12k_reg_info *reg_info;
7078 struct ath12k *ar = NULL;
7079 u8 pdev_idx = 255;
7080 int ret;
7081
7082 reg_info = kzalloc_obj(*reg_info, GFP_ATOMIC);
7083 if (!reg_info) {
7084 ret = -ENOMEM;
7085 goto fallback;
7086 }
7087
7088 ret = ath12k_pull_reg_chan_list_ext_update_ev(ab, skb, reg_info);
7089 if (ret) {
7090 ath12k_warn(ab, "failed to extract regulatory info from received event\n");
7091 goto mem_free;
7092 }
7093
7094 ret = ath12k_reg_validate_reg_info(ab, reg_info);
7095 if (ret == ATH12K_REG_STATUS_FALLBACK) {
7096 ath12k_warn(ab, "failed to validate reg info %d\n", ret);
7097 /* firmware has successfully switches to new regd but host can not
7098 * continue, so free reginfo and fallback to old regd
7099 */
7100 goto mem_free;
7101 } else if (ret == ATH12K_REG_STATUS_DROP) {
7102 /* reg info is valid but we will not store it and
7103 * not going to create new regd for it
7104 */
7105 ret = ATH12K_REG_STATUS_VALID;
7106 goto mem_free;
7107 }
7108
7109 /* free old reg_info if it exist */
7110 pdev_idx = reg_info->phy_id;
7111 if (ab->reg_info[pdev_idx]) {
7112 ath12k_reg_reset_reg_info(ab->reg_info[pdev_idx]);
7113 kfree(ab->reg_info[pdev_idx]);
7114 }
7115 /* reg_info is valid, we store it for later use
7116 * even below regd build failed
7117 */
7118 ab->reg_info[pdev_idx] = reg_info;
7119
7120 ret = ath12k_reg_handle_chan_list(ab, reg_info, WMI_VDEV_TYPE_UNSPEC,
7121 IEEE80211_REG_UNSET_AP);
7122 if (ret) {
7123 ath12k_warn(ab, "failed to handle chan list %d\n", ret);
7124 goto fallback;
7125 }
7126
7127 goto out;
7128
7129 mem_free:
7130 ath12k_reg_reset_reg_info(reg_info);
7131 kfree(reg_info);
7132
7133 if (ret == ATH12K_REG_STATUS_VALID)
7134 goto out;
7135
7136 fallback:
7137 /* Fallback to older reg (by sending previous country setting
7138 * again if fw has succeeded and we failed to process here.
7139 * The Regdomain should be uniform across driver and fw. Since the
7140 * FW has processed the command and sent a success status, we expect
7141 * this function to succeed as well. If it doesn't, CTRY needs to be
7142 * reverted at the fw and the old SCAN_CHAN_LIST cmd needs to be sent.
7143 */
7144 /* TODO: This is rare, but still should also be handled */
7145 WARN_ON(1);
7146
7147 out:
7148 /* In some error cases, even a valid pdev_idx might not be available */
7149 if (pdev_idx != 255)
7150 ar = ab->pdevs[pdev_idx].ar;
7151
7152 /* During the boot-time update, 'ar' might not be allocated,
7153 * so the completion cannot be marked at that point.
7154 * This boot-time update is handled in ath12k_mac_hw_register()
7155 * before registering the hardware.
7156 */
7157 if (ar)
7158 complete_all(&ar->regd_update_completed);
7159
7160 return ret;
7161 }
7162
ath12k_wmi_rdy_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)7163 static int ath12k_wmi_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len,
7164 const void *ptr, void *data)
7165 {
7166 struct ath12k_wmi_rdy_parse *rdy_parse = data;
7167 struct wmi_ready_event fixed_param;
7168 #if defined(__linux__)
7169 struct ath12k_wmi_mac_addr_params *addr_list;
7170 #elif defined(__FreeBSD__)
7171 const struct ath12k_wmi_mac_addr_params *addr_list;
7172 #endif
7173 struct ath12k_pdev *pdev;
7174 u32 num_mac_addr;
7175 int i;
7176
7177 switch (tag) {
7178 case WMI_TAG_READY_EVENT:
7179 memset(&fixed_param, 0, sizeof(fixed_param));
7180 #if defined(__linux__)
7181 memcpy(&fixed_param, (struct wmi_ready_event *)ptr,
7182 #elif defined(__FreeBSD__)
7183 memcpy(&fixed_param, (const struct wmi_ready_event *)ptr,
7184 #endif
7185 min_t(u16, sizeof(fixed_param), len));
7186 ab->wlan_init_status = le32_to_cpu(fixed_param.ready_event_min.status);
7187 rdy_parse->num_extra_mac_addr =
7188 le32_to_cpu(fixed_param.ready_event_min.num_extra_mac_addr);
7189
7190 ether_addr_copy(ab->mac_addr,
7191 fixed_param.ready_event_min.mac_addr.addr);
7192 ab->pktlog_defs_checksum = le32_to_cpu(fixed_param.pktlog_defs_checksum);
7193 ab->wmi_ready = true;
7194 break;
7195 case WMI_TAG_ARRAY_FIXED_STRUCT:
7196 #if defined(__linux__)
7197 addr_list = (struct ath12k_wmi_mac_addr_params *)ptr;
7198 #elif defined(__FreeBSD__)
7199 addr_list = (const struct ath12k_wmi_mac_addr_params *)ptr;
7200 #endif
7201 num_mac_addr = rdy_parse->num_extra_mac_addr;
7202
7203 if (!(ab->num_radios > 1 && num_mac_addr >= ab->num_radios))
7204 break;
7205
7206 for (i = 0; i < ab->num_radios; i++) {
7207 pdev = &ab->pdevs[i];
7208 ether_addr_copy(pdev->mac_addr, addr_list[i].addr);
7209 }
7210 ab->pdevs_macaddr_valid = true;
7211 break;
7212 default:
7213 break;
7214 }
7215
7216 return 0;
7217 }
7218
ath12k_ready_event(struct ath12k_base * ab,struct sk_buff * skb)7219 static int ath12k_ready_event(struct ath12k_base *ab, struct sk_buff *skb)
7220 {
7221 struct ath12k_wmi_rdy_parse rdy_parse = { };
7222 int ret;
7223
7224 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
7225 ath12k_wmi_rdy_parse, &rdy_parse);
7226 if (ret) {
7227 ath12k_warn(ab, "failed to parse tlv %d\n", ret);
7228 return ret;
7229 }
7230
7231 complete(&ab->wmi_ab.unified_ready);
7232 return 0;
7233 }
7234
ath12k_peer_delete_resp_event(struct ath12k_base * ab,struct sk_buff * skb)7235 static void ath12k_peer_delete_resp_event(struct ath12k_base *ab, struct sk_buff *skb)
7236 {
7237 struct wmi_peer_delete_resp_event peer_del_resp;
7238 struct ath12k *ar;
7239
7240 if (ath12k_pull_peer_del_resp_ev(ab, skb, &peer_del_resp) != 0) {
7241 ath12k_warn(ab, "failed to extract peer delete resp");
7242 return;
7243 }
7244
7245 rcu_read_lock();
7246 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(peer_del_resp.vdev_id));
7247 if (!ar) {
7248 ath12k_warn(ab, "invalid vdev id in peer delete resp ev %d",
7249 peer_del_resp.vdev_id);
7250 rcu_read_unlock();
7251 return;
7252 }
7253
7254 complete(&ar->peer_delete_done);
7255 rcu_read_unlock();
7256 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer delete resp for vdev id %d addr %pM\n",
7257 peer_del_resp.vdev_id, peer_del_resp.peer_macaddr.addr);
7258 }
7259
ath12k_vdev_delete_resp_event(struct ath12k_base * ab,struct sk_buff * skb)7260 static void ath12k_vdev_delete_resp_event(struct ath12k_base *ab,
7261 struct sk_buff *skb)
7262 {
7263 struct ath12k *ar;
7264 u32 vdev_id = 0;
7265
7266 if (ath12k_pull_vdev_del_resp_ev(ab, skb, &vdev_id) != 0) {
7267 ath12k_warn(ab, "failed to extract vdev delete resp");
7268 return;
7269 }
7270
7271 rcu_read_lock();
7272 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
7273 if (!ar) {
7274 ath12k_warn(ab, "invalid vdev id in vdev delete resp ev %d",
7275 vdev_id);
7276 rcu_read_unlock();
7277 return;
7278 }
7279
7280 complete(&ar->vdev_delete_done);
7281
7282 rcu_read_unlock();
7283
7284 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev delete resp for vdev id %d\n",
7285 vdev_id);
7286 }
7287
ath12k_wmi_vdev_resp_print(u32 vdev_resp_status)7288 static const char *ath12k_wmi_vdev_resp_print(u32 vdev_resp_status)
7289 {
7290 switch (vdev_resp_status) {
7291 case WMI_VDEV_START_RESPONSE_INVALID_VDEVID:
7292 return "invalid vdev id";
7293 case WMI_VDEV_START_RESPONSE_NOT_SUPPORTED:
7294 return "not supported";
7295 case WMI_VDEV_START_RESPONSE_DFS_VIOLATION:
7296 return "dfs violation";
7297 case WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN:
7298 return "invalid regdomain";
7299 default:
7300 return "unknown";
7301 }
7302 }
7303
ath12k_vdev_start_resp_event(struct ath12k_base * ab,struct sk_buff * skb)7304 static void ath12k_vdev_start_resp_event(struct ath12k_base *ab, struct sk_buff *skb)
7305 {
7306 struct wmi_vdev_start_resp_event vdev_start_resp;
7307 struct ath12k *ar;
7308 u32 status;
7309
7310 if (ath12k_pull_vdev_start_resp_tlv(ab, skb, &vdev_start_resp) != 0) {
7311 ath12k_warn(ab, "failed to extract vdev start resp");
7312 return;
7313 }
7314
7315 rcu_read_lock();
7316 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(vdev_start_resp.vdev_id));
7317 if (!ar) {
7318 ath12k_warn(ab, "invalid vdev id in vdev start resp ev %d",
7319 vdev_start_resp.vdev_id);
7320 rcu_read_unlock();
7321 return;
7322 }
7323
7324 ar->last_wmi_vdev_start_status = 0;
7325
7326 status = le32_to_cpu(vdev_start_resp.status);
7327 if (WARN_ON_ONCE(status)) {
7328 ath12k_warn(ab, "vdev start resp error status %d (%s)\n",
7329 status, ath12k_wmi_vdev_resp_print(status));
7330 ar->last_wmi_vdev_start_status = status;
7331 }
7332
7333 ar->max_allowed_tx_power = (s8)le32_to_cpu(vdev_start_resp.max_allowed_tx_power);
7334
7335 complete(&ar->vdev_setup_done);
7336
7337 rcu_read_unlock();
7338
7339 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev start resp for vdev id %d",
7340 vdev_start_resp.vdev_id);
7341 }
7342
ath12k_bcn_tx_status_event(struct ath12k_base * ab,struct sk_buff * skb)7343 static void ath12k_bcn_tx_status_event(struct ath12k_base *ab, struct sk_buff *skb)
7344 {
7345 struct ath12k_link_vif *arvif;
7346 struct ath12k *ar;
7347 u32 vdev_id, tx_status;
7348
7349 if (ath12k_pull_bcn_tx_status_ev(ab, skb, &vdev_id, &tx_status) != 0) {
7350 ath12k_warn(ab, "failed to extract bcn tx status");
7351 return;
7352 }
7353
7354 guard(rcu)();
7355
7356 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_id);
7357 if (!arvif) {
7358 ath12k_warn(ab, "invalid vdev %u in bcn tx status\n",
7359 vdev_id);
7360 return;
7361 }
7362
7363 ar = arvif->ar;
7364 wiphy_work_queue(ath12k_ar_to_hw(ar)->wiphy, &arvif->bcn_tx_work);
7365 }
7366
ath12k_vdev_stopped_event(struct ath12k_base * ab,struct sk_buff * skb)7367 static void ath12k_vdev_stopped_event(struct ath12k_base *ab, struct sk_buff *skb)
7368 {
7369 struct ath12k *ar;
7370 u32 vdev_id = 0;
7371
7372 if (ath12k_pull_vdev_stopped_param_tlv(ab, skb, &vdev_id) != 0) {
7373 ath12k_warn(ab, "failed to extract vdev stopped event");
7374 return;
7375 }
7376
7377 rcu_read_lock();
7378 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
7379 if (!ar) {
7380 ath12k_warn(ab, "invalid vdev id in vdev stopped ev %d",
7381 vdev_id);
7382 rcu_read_unlock();
7383 return;
7384 }
7385
7386 complete(&ar->vdev_setup_done);
7387
7388 rcu_read_unlock();
7389
7390 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev stopped for vdev id %d", vdev_id);
7391 }
7392
ath12k_mgmt_rx_event(struct ath12k_base * ab,struct sk_buff * skb)7393 static void ath12k_mgmt_rx_event(struct ath12k_base *ab, struct sk_buff *skb)
7394 {
7395 struct ath12k_wmi_mgmt_rx_arg rx_ev = {};
7396 struct ath12k *ar;
7397 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
7398 struct ieee80211_hdr *hdr;
7399 u16 fc;
7400 struct ieee80211_supported_band *sband;
7401 s32 noise_floor;
7402
7403 if (ath12k_pull_mgmt_rx_params_tlv(ab, skb, &rx_ev) != 0) {
7404 ath12k_warn(ab, "failed to extract mgmt rx event");
7405 dev_kfree_skb(skb);
7406 return;
7407 }
7408
7409 memset(status, 0, sizeof(*status));
7410
7411 ath12k_dbg(ab, ATH12K_DBG_MGMT, "mgmt rx event status %08x\n",
7412 rx_ev.status);
7413
7414 rcu_read_lock();
7415 ar = ath12k_mac_get_ar_by_pdev_id(ab, rx_ev.pdev_id);
7416
7417 if (!ar) {
7418 ath12k_warn(ab, "invalid pdev_id %d in mgmt_rx_event\n",
7419 rx_ev.pdev_id);
7420 dev_kfree_skb(skb);
7421 goto exit;
7422 }
7423
7424 if ((test_bit(ATH12K_FLAG_CAC_RUNNING, &ar->dev_flags)) ||
7425 (rx_ev.status & (WMI_RX_STATUS_ERR_DECRYPT |
7426 WMI_RX_STATUS_ERR_KEY_CACHE_MISS |
7427 WMI_RX_STATUS_ERR_CRC))) {
7428 dev_kfree_skb(skb);
7429 goto exit;
7430 }
7431
7432 if (rx_ev.status & WMI_RX_STATUS_ERR_MIC)
7433 status->flag |= RX_FLAG_MMIC_ERROR;
7434
7435 if (rx_ev.chan_freq >= ATH12K_MIN_6GHZ_FREQ &&
7436 rx_ev.chan_freq <= ATH12K_MAX_6GHZ_FREQ) {
7437 status->band = NL80211_BAND_6GHZ;
7438 status->freq = rx_ev.chan_freq;
7439 } else if (rx_ev.channel >= 1 && rx_ev.channel <= 14) {
7440 status->band = NL80211_BAND_2GHZ;
7441 } else if (rx_ev.channel >= 36 && rx_ev.channel <= ATH12K_MAX_5GHZ_CHAN) {
7442 status->band = NL80211_BAND_5GHZ;
7443 } else {
7444 /* Shouldn't happen unless list of advertised channels to
7445 * mac80211 has been changed.
7446 */
7447 WARN_ON_ONCE(1);
7448 dev_kfree_skb(skb);
7449 goto exit;
7450 }
7451
7452 if (rx_ev.phy_mode == MODE_11B &&
7453 (status->band == NL80211_BAND_5GHZ || status->band == NL80211_BAND_6GHZ))
7454 ath12k_dbg(ab, ATH12K_DBG_WMI,
7455 "wmi mgmt rx 11b (CCK) on 5/6GHz, band = %d\n", status->band);
7456
7457 sband = &ar->mac.sbands[status->band];
7458
7459 if (status->band != NL80211_BAND_6GHZ)
7460 status->freq = ieee80211_channel_to_frequency(rx_ev.channel,
7461 status->band);
7462
7463 spin_lock_bh(&ar->data_lock);
7464 noise_floor = ath12k_pdev_get_noise_floor(ar);
7465 spin_unlock_bh(&ar->data_lock);
7466
7467 status->signal = rx_ev.snr + noise_floor;
7468 status->rate_idx = ath12k_mac_bitrate_to_idx(sband, rx_ev.rate / 100);
7469
7470 hdr = (struct ieee80211_hdr *)skb->data;
7471 fc = le16_to_cpu(hdr->frame_control);
7472
7473 /* Firmware is guaranteed to report all essential management frames via
7474 * WMI while it can deliver some extra via HTT. Since there can be
7475 * duplicates split the reporting wrt monitor/sniffing.
7476 */
7477 status->flag |= RX_FLAG_SKIP_MONITOR;
7478
7479 /* In case of PMF, FW delivers decrypted frames with Protected Bit set
7480 * including group privacy action frames.
7481 */
7482 if (ieee80211_has_protected(hdr->frame_control)) {
7483 status->flag |= RX_FLAG_DECRYPTED;
7484
7485 if (!ieee80211_is_robust_mgmt_frame(skb)) {
7486 status->flag |= RX_FLAG_IV_STRIPPED |
7487 RX_FLAG_MMIC_STRIPPED;
7488 hdr->frame_control = __cpu_to_le16(fc &
7489 ~IEEE80211_FCTL_PROTECTED);
7490 }
7491 }
7492
7493 if (ieee80211_is_beacon(hdr->frame_control))
7494 ath12k_mac_handle_beacon(ar, skb);
7495
7496 ath12k_dbg(ab, ATH12K_DBG_MGMT,
7497 "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
7498 skb, skb->len,
7499 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
7500
7501 ath12k_dbg(ab, ATH12K_DBG_MGMT,
7502 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
7503 status->freq, status->band, status->signal,
7504 status->rate_idx);
7505
7506 ieee80211_rx_ni(ath12k_ar_to_hw(ar), skb);
7507
7508 exit:
7509 rcu_read_unlock();
7510 }
7511
ath12k_mgmt_tx_compl_event(struct ath12k_base * ab,struct sk_buff * skb)7512 static void ath12k_mgmt_tx_compl_event(struct ath12k_base *ab, struct sk_buff *skb)
7513 {
7514 struct wmi_mgmt_tx_compl_event tx_compl_param = {};
7515 struct ath12k *ar;
7516
7517 if (ath12k_pull_mgmt_tx_compl_param_tlv(ab, skb, &tx_compl_param) != 0) {
7518 ath12k_warn(ab, "failed to extract mgmt tx compl event");
7519 return;
7520 }
7521
7522 rcu_read_lock();
7523 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(tx_compl_param.pdev_id));
7524 if (!ar) {
7525 ath12k_warn(ab, "invalid pdev id %d in mgmt_tx_compl_event\n",
7526 tx_compl_param.pdev_id);
7527 goto exit;
7528 }
7529
7530 wmi_process_mgmt_tx_comp(ar, le32_to_cpu(tx_compl_param.desc_id),
7531 le32_to_cpu(tx_compl_param.status),
7532 le32_to_cpu(tx_compl_param.ack_rssi));
7533
7534 ath12k_dbg(ab, ATH12K_DBG_MGMT,
7535 "mgmt tx compl ev pdev_id %d, desc_id %d, status %d",
7536 tx_compl_param.pdev_id, tx_compl_param.desc_id,
7537 tx_compl_param.status);
7538
7539 exit:
7540 rcu_read_unlock();
7541 }
7542
ath12k_get_ar_on_scan_state(struct ath12k_base * ab,u32 vdev_id,enum ath12k_scan_state state)7543 static struct ath12k *ath12k_get_ar_on_scan_state(struct ath12k_base *ab,
7544 u32 vdev_id,
7545 enum ath12k_scan_state state)
7546 {
7547 int i;
7548 struct ath12k_pdev *pdev;
7549 struct ath12k *ar;
7550
7551 for (i = 0; i < ab->num_radios; i++) {
7552 pdev = rcu_dereference(ab->pdevs_active[i]);
7553 if (pdev && pdev->ar) {
7554 ar = pdev->ar;
7555
7556 spin_lock_bh(&ar->data_lock);
7557 if (ar->scan.state == state &&
7558 ar->scan.arvif &&
7559 ar->scan.arvif->vdev_id == vdev_id) {
7560 spin_unlock_bh(&ar->data_lock);
7561 return ar;
7562 }
7563 spin_unlock_bh(&ar->data_lock);
7564 }
7565 }
7566 return NULL;
7567 }
7568
ath12k_scan_event(struct ath12k_base * ab,struct sk_buff * skb)7569 static void ath12k_scan_event(struct ath12k_base *ab, struct sk_buff *skb)
7570 {
7571 struct ath12k *ar;
7572 struct wmi_scan_event scan_ev = {};
7573
7574 if (ath12k_pull_scan_ev(ab, skb, &scan_ev) != 0) {
7575 ath12k_warn(ab, "failed to extract scan event");
7576 return;
7577 }
7578
7579 rcu_read_lock();
7580
7581 /* In case the scan was cancelled, ex. during interface teardown,
7582 * the interface will not be found in active interfaces.
7583 * Rather, in such scenarios, iterate over the active pdev's to
7584 * search 'ar' if the corresponding 'ar' scan is ABORTING and the
7585 * aborting scan's vdev id matches this event info.
7586 */
7587 if (le32_to_cpu(scan_ev.event_type) == WMI_SCAN_EVENT_COMPLETED &&
7588 le32_to_cpu(scan_ev.reason) == WMI_SCAN_REASON_CANCELLED) {
7589 ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id),
7590 ATH12K_SCAN_ABORTING);
7591 if (!ar)
7592 ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id),
7593 ATH12K_SCAN_RUNNING);
7594 } else {
7595 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(scan_ev.vdev_id));
7596 }
7597
7598 if (!ar) {
7599 ath12k_warn(ab, "Received scan event for unknown vdev");
7600 rcu_read_unlock();
7601 return;
7602 }
7603
7604 spin_lock_bh(&ar->data_lock);
7605
7606 ath12k_dbg(ab, ATH12K_DBG_WMI,
7607 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
7608 ath12k_wmi_event_scan_type_str(le32_to_cpu(scan_ev.event_type),
7609 le32_to_cpu(scan_ev.reason)),
7610 le32_to_cpu(scan_ev.event_type),
7611 le32_to_cpu(scan_ev.reason),
7612 le32_to_cpu(scan_ev.channel_freq),
7613 le32_to_cpu(scan_ev.scan_req_id),
7614 le32_to_cpu(scan_ev.scan_id),
7615 le32_to_cpu(scan_ev.vdev_id),
7616 ath12k_scan_state_str(ar->scan.state), ar->scan.state);
7617
7618 switch (le32_to_cpu(scan_ev.event_type)) {
7619 case WMI_SCAN_EVENT_STARTED:
7620 ath12k_wmi_event_scan_started(ar);
7621 break;
7622 case WMI_SCAN_EVENT_COMPLETED:
7623 ath12k_wmi_event_scan_completed(ar);
7624 break;
7625 case WMI_SCAN_EVENT_BSS_CHANNEL:
7626 ath12k_wmi_event_scan_bss_chan(ar);
7627 break;
7628 case WMI_SCAN_EVENT_FOREIGN_CHAN:
7629 ath12k_wmi_event_scan_foreign_chan(ar, le32_to_cpu(scan_ev.channel_freq));
7630 break;
7631 case WMI_SCAN_EVENT_START_FAILED:
7632 ath12k_warn(ab, "received scan start failure event\n");
7633 ath12k_wmi_event_scan_start_failed(ar);
7634 break;
7635 case WMI_SCAN_EVENT_DEQUEUED:
7636 __ath12k_mac_scan_finish(ar);
7637 break;
7638 case WMI_SCAN_EVENT_PREEMPTED:
7639 case WMI_SCAN_EVENT_RESTARTED:
7640 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT:
7641 default:
7642 break;
7643 }
7644
7645 spin_unlock_bh(&ar->data_lock);
7646
7647 rcu_read_unlock();
7648 }
7649
ath12k_peer_sta_kickout_event(struct ath12k_base * ab,struct sk_buff * skb)7650 static void ath12k_peer_sta_kickout_event(struct ath12k_base *ab, struct sk_buff *skb)
7651 {
7652 struct wmi_peer_sta_kickout_arg arg = {};
7653 struct ath12k_link_vif *arvif;
7654 struct ieee80211_sta *sta;
7655 struct ath12k_sta *ahsta;
7656 struct ath12k_link_sta *arsta;
7657 struct ath12k *ar;
7658
7659 if (ath12k_pull_peer_sta_kickout_ev(ab, skb, &arg) != 0) {
7660 ath12k_warn(ab, "failed to extract peer sta kickout event");
7661 return;
7662 }
7663
7664 rcu_read_lock();
7665
7666 spin_lock_bh(&ab->base_lock);
7667
7668 arsta = ath12k_link_sta_find_by_addr(ab, arg.mac_addr);
7669
7670 if (!arsta) {
7671 ath12k_warn(ab, "arsta not found %pM\n",
7672 arg.mac_addr);
7673 goto exit;
7674 }
7675
7676 arvif = arsta->arvif;
7677 if (!arvif) {
7678 ath12k_warn(ab, "invalid arvif in peer sta kickout ev for STA %pM",
7679 arg.mac_addr);
7680 goto exit;
7681 }
7682
7683 ar = arvif->ar;
7684 ahsta = arsta->ahsta;
7685 sta = ath12k_ahsta_to_sta(ahsta);
7686
7687 ath12k_dbg(ab, ATH12K_DBG_WMI,
7688 "peer sta kickout event %pM reason: %d rssi: %d\n",
7689 arg.mac_addr, arg.reason, arg.rssi);
7690
7691 switch (arg.reason) {
7692 case WMI_PEER_STA_KICKOUT_REASON_INACTIVITY:
7693 if (arvif->ahvif->vif->type == NL80211_IFTYPE_STATION) {
7694 ath12k_mac_handle_beacon_miss(ar, arvif);
7695 break;
7696 }
7697 fallthrough;
7698 default:
7699 ieee80211_report_low_ack(sta, 10);
7700 }
7701
7702 exit:
7703 spin_unlock_bh(&ab->base_lock);
7704 rcu_read_unlock();
7705 }
7706
ath12k_roam_event(struct ath12k_base * ab,struct sk_buff * skb)7707 static void ath12k_roam_event(struct ath12k_base *ab, struct sk_buff *skb)
7708 {
7709 struct ath12k_link_vif *arvif;
7710 struct wmi_roam_event roam_ev = {};
7711 struct ath12k *ar;
7712 u32 vdev_id;
7713 u8 roam_reason;
7714
7715 if (ath12k_pull_roam_ev(ab, skb, &roam_ev) != 0) {
7716 ath12k_warn(ab, "failed to extract roam event");
7717 return;
7718 }
7719
7720 vdev_id = le32_to_cpu(roam_ev.vdev_id);
7721 roam_reason = u32_get_bits(le32_to_cpu(roam_ev.reason),
7722 WMI_ROAM_REASON_MASK);
7723
7724 ath12k_dbg(ab, ATH12K_DBG_WMI,
7725 "wmi roam event vdev %u reason %d rssi %d\n",
7726 vdev_id, roam_reason, roam_ev.rssi);
7727
7728 guard(rcu)();
7729 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_id);
7730 if (!arvif) {
7731 ath12k_warn(ab, "invalid vdev id in roam ev %d", vdev_id);
7732 return;
7733 }
7734
7735 ar = arvif->ar;
7736
7737 if (roam_reason >= WMI_ROAM_REASON_MAX)
7738 ath12k_warn(ab, "ignoring unknown roam event reason %d on vdev %i\n",
7739 roam_reason, vdev_id);
7740
7741 switch (roam_reason) {
7742 case WMI_ROAM_REASON_BEACON_MISS:
7743 ath12k_mac_handle_beacon_miss(ar, arvif);
7744 break;
7745 case WMI_ROAM_REASON_BETTER_AP:
7746 case WMI_ROAM_REASON_LOW_RSSI:
7747 case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
7748 case WMI_ROAM_REASON_HO_FAILED:
7749 ath12k_warn(ab, "ignoring not implemented roam event reason %d on vdev %i\n",
7750 roam_reason, vdev_id);
7751 break;
7752 }
7753 }
7754
ath12k_chan_info_event(struct ath12k_base * ab,struct sk_buff * skb)7755 static void ath12k_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb)
7756 {
7757 struct wmi_chan_info_event ch_info_ev = {};
7758 struct ath12k *ar;
7759 struct survey_info *survey;
7760 int idx;
7761 /* HW channel counters frequency value in hertz */
7762 u32 cc_freq_hz = ab->cc_freq_hz;
7763
7764 if (ath12k_pull_chan_info_ev(ab, skb, &ch_info_ev) != 0) {
7765 ath12k_warn(ab, "failed to extract chan info event");
7766 return;
7767 }
7768
7769 ath12k_dbg(ab, ATH12K_DBG_WMI,
7770 "chan info vdev_id %d err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d mac_clk_mhz %d\n",
7771 ch_info_ev.vdev_id, ch_info_ev.err_code, ch_info_ev.freq,
7772 ch_info_ev.cmd_flags, ch_info_ev.noise_floor,
7773 ch_info_ev.rx_clear_count, ch_info_ev.cycle_count,
7774 ch_info_ev.mac_clk_mhz);
7775
7776 if (le32_to_cpu(ch_info_ev.cmd_flags) == WMI_CHAN_INFO_END_RESP) {
7777 ath12k_dbg(ab, ATH12K_DBG_WMI, "chan info report completed\n");
7778 return;
7779 }
7780
7781 rcu_read_lock();
7782 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(ch_info_ev.vdev_id));
7783 if (!ar) {
7784 ath12k_warn(ab, "invalid vdev id in chan info ev %d",
7785 ch_info_ev.vdev_id);
7786 rcu_read_unlock();
7787 return;
7788 }
7789 spin_lock_bh(&ar->data_lock);
7790
7791 switch (ar->scan.state) {
7792 case ATH12K_SCAN_IDLE:
7793 case ATH12K_SCAN_STARTING:
7794 ath12k_warn(ab, "received chan info event without a scan request, ignoring\n");
7795 goto exit;
7796 case ATH12K_SCAN_RUNNING:
7797 case ATH12K_SCAN_ABORTING:
7798 break;
7799 }
7800
7801 idx = freq_to_idx(ar, le32_to_cpu(ch_info_ev.freq));
7802 if (idx >= ARRAY_SIZE(ar->survey)) {
7803 ath12k_warn(ab, "chan info: invalid frequency %d (idx %d out of bounds)\n",
7804 ch_info_ev.freq, idx);
7805 goto exit;
7806 }
7807
7808 /* If FW provides MAC clock frequency in Mhz, overriding the initialized
7809 * HW channel counters frequency value
7810 */
7811 if (ch_info_ev.mac_clk_mhz)
7812 cc_freq_hz = (le32_to_cpu(ch_info_ev.mac_clk_mhz) * 1000);
7813
7814 if (ch_info_ev.cmd_flags == WMI_CHAN_INFO_START_RESP) {
7815 survey = &ar->survey[idx];
7816 memset(survey, 0, sizeof(*survey));
7817 survey->noise = le32_to_cpu(ch_info_ev.noise_floor);
7818 survey->filled = SURVEY_INFO_NOISE_DBM | SURVEY_INFO_TIME |
7819 SURVEY_INFO_TIME_BUSY;
7820 survey->time = div_u64(le32_to_cpu(ch_info_ev.cycle_count), cc_freq_hz);
7821 survey->time_busy = div_u64(le32_to_cpu(ch_info_ev.rx_clear_count),
7822 cc_freq_hz);
7823 }
7824 exit:
7825 spin_unlock_bh(&ar->data_lock);
7826 rcu_read_unlock();
7827 }
7828
7829 static void
ath12k_pdev_bss_chan_info_event(struct ath12k_base * ab,struct sk_buff * skb)7830 ath12k_pdev_bss_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb)
7831 {
7832 struct wmi_pdev_bss_chan_info_event bss_ch_info_ev = {};
7833 struct survey_info *survey;
7834 struct ath12k *ar;
7835 u32 cc_freq_hz = ab->cc_freq_hz;
7836 u64 busy, total, tx, rx, rx_bss;
7837 int idx;
7838
7839 if (ath12k_pull_pdev_bss_chan_info_ev(ab, skb, &bss_ch_info_ev) != 0) {
7840 ath12k_warn(ab, "failed to extract pdev bss chan info event");
7841 return;
7842 }
7843
7844 busy = (u64)(le32_to_cpu(bss_ch_info_ev.rx_clear_count_high)) << 32 |
7845 le32_to_cpu(bss_ch_info_ev.rx_clear_count_low);
7846
7847 total = (u64)(le32_to_cpu(bss_ch_info_ev.cycle_count_high)) << 32 |
7848 le32_to_cpu(bss_ch_info_ev.cycle_count_low);
7849
7850 tx = (u64)(le32_to_cpu(bss_ch_info_ev.tx_cycle_count_high)) << 32 |
7851 le32_to_cpu(bss_ch_info_ev.tx_cycle_count_low);
7852
7853 rx = (u64)(le32_to_cpu(bss_ch_info_ev.rx_cycle_count_high)) << 32 |
7854 le32_to_cpu(bss_ch_info_ev.rx_cycle_count_low);
7855
7856 rx_bss = (u64)(le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_high)) << 32 |
7857 le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_low);
7858
7859 ath12k_dbg(ab, ATH12K_DBG_WMI,
7860 #if defined(__linux__)
7861 "pdev bss chan info:\n pdev_id: %d freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n",
7862 bss_ch_info_ev.pdev_id, bss_ch_info_ev.freq,
7863 bss_ch_info_ev.noise_floor, busy, total,
7864 tx, rx, rx_bss);
7865 #elif defined(__FreeBSD__)
7866 "pdev bss chan info:\n pdev_id: %d freq: %d noise: %d cycle: busy %ju total %ju tx %ju rx %ju rx_bss %ju\n",
7867 bss_ch_info_ev.pdev_id, bss_ch_info_ev.freq,
7868 bss_ch_info_ev.noise_floor, (uintmax_t)busy, (uintmax_t)total,
7869 (uintmax_t)tx, (uintmax_t)rx, (uintmax_t)rx_bss);
7870 #endif
7871
7872 rcu_read_lock();
7873 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(bss_ch_info_ev.pdev_id));
7874
7875 if (!ar) {
7876 ath12k_warn(ab, "invalid pdev id %d in bss_chan_info event\n",
7877 bss_ch_info_ev.pdev_id);
7878 rcu_read_unlock();
7879 return;
7880 }
7881
7882 spin_lock_bh(&ar->data_lock);
7883 idx = freq_to_idx(ar, le32_to_cpu(bss_ch_info_ev.freq));
7884 if (idx >= ARRAY_SIZE(ar->survey)) {
7885 ath12k_warn(ab, "bss chan info: invalid frequency %d (idx %d out of bounds)\n",
7886 bss_ch_info_ev.freq, idx);
7887 goto exit;
7888 }
7889
7890 survey = &ar->survey[idx];
7891
7892 survey->noise = le32_to_cpu(bss_ch_info_ev.noise_floor);
7893 survey->time = div_u64(total, cc_freq_hz);
7894 survey->time_busy = div_u64(busy, cc_freq_hz);
7895 survey->time_rx = div_u64(rx_bss, cc_freq_hz);
7896 survey->time_tx = div_u64(tx, cc_freq_hz);
7897 survey->filled |= (SURVEY_INFO_NOISE_DBM |
7898 SURVEY_INFO_TIME |
7899 SURVEY_INFO_TIME_BUSY |
7900 SURVEY_INFO_TIME_RX |
7901 SURVEY_INFO_TIME_TX);
7902 exit:
7903 spin_unlock_bh(&ar->data_lock);
7904 complete(&ar->bss_survey_done);
7905
7906 rcu_read_unlock();
7907 }
7908
ath12k_vdev_install_key_compl_event(struct ath12k_base * ab,struct sk_buff * skb)7909 static void ath12k_vdev_install_key_compl_event(struct ath12k_base *ab,
7910 struct sk_buff *skb)
7911 {
7912 struct wmi_vdev_install_key_complete_arg install_key_compl = {};
7913 struct ath12k *ar;
7914
7915 if (ath12k_pull_vdev_install_key_compl_ev(ab, skb, &install_key_compl) != 0) {
7916 ath12k_warn(ab, "failed to extract install key compl event");
7917 return;
7918 }
7919
7920 ath12k_dbg(ab, ATH12K_DBG_WMI,
7921 "vdev install key ev idx %d flags %08x macaddr %pM status %d\n",
7922 install_key_compl.key_idx, install_key_compl.key_flags,
7923 install_key_compl.macaddr, install_key_compl.status);
7924
7925 rcu_read_lock();
7926 ar = ath12k_mac_get_ar_by_vdev_id(ab, install_key_compl.vdev_id);
7927 if (!ar) {
7928 ath12k_warn(ab, "invalid vdev id in install key compl ev %d",
7929 install_key_compl.vdev_id);
7930 rcu_read_unlock();
7931 return;
7932 }
7933
7934 ar->install_key_status = 0;
7935
7936 if (install_key_compl.status != WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS) {
7937 ath12k_warn(ab, "install key failed for %pM status %d\n",
7938 install_key_compl.macaddr, install_key_compl.status);
7939 ar->install_key_status = install_key_compl.status;
7940 }
7941
7942 complete(&ar->install_key_done);
7943 rcu_read_unlock();
7944 }
7945
ath12k_wmi_tlv_services_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)7946 static int ath12k_wmi_tlv_services_parser(struct ath12k_base *ab,
7947 u16 tag, u16 len,
7948 const void *ptr,
7949 void *data)
7950 {
7951 const struct wmi_service_available_event *ev;
7952 u16 wmi_ext2_service_words;
7953 #if defined(__linux__)
7954 __le32 *wmi_ext2_service_bitmap;
7955 #elif defined(__FreeBSD__)
7956 const __le32 *wmi_ext2_service_bitmap;
7957 #endif
7958 int i, j;
7959 u16 expected_len;
7960
7961 expected_len = WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32);
7962 if (len < expected_len) {
7963 ath12k_warn(ab, "invalid length %d for the WMI services available tag 0x%x\n",
7964 len, tag);
7965 return -EINVAL;
7966 }
7967
7968 switch (tag) {
7969 case WMI_TAG_SERVICE_AVAILABLE_EVENT:
7970 #if defined(__linux__)
7971 ev = (struct wmi_service_available_event *)ptr;
7972 #elif defined(__FreeBSD__)
7973 ev = (const struct wmi_service_available_event *)ptr;
7974 #endif
7975 for (i = 0, j = WMI_MAX_SERVICE;
7976 i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT_SERVICE;
7977 i++) {
7978 do {
7979 if (le32_to_cpu(ev->wmi_service_segment_bitmap[i]) &
7980 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32))
7981 set_bit(j, ab->wmi_ab.svc_map);
7982 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32);
7983 }
7984
7985 ath12k_dbg(ab, ATH12K_DBG_WMI,
7986 "wmi_ext_service_bitmap 0x%x 0x%x 0x%x 0x%x",
7987 ev->wmi_service_segment_bitmap[0],
7988 ev->wmi_service_segment_bitmap[1],
7989 ev->wmi_service_segment_bitmap[2],
7990 ev->wmi_service_segment_bitmap[3]);
7991 break;
7992 case WMI_TAG_ARRAY_UINT32:
7993 #if defined(__linux__)
7994 wmi_ext2_service_bitmap = (__le32 *)ptr;
7995 #elif defined(__FreeBSD__)
7996 wmi_ext2_service_bitmap = (const __le32 *)ptr;
7997 #endif
7998 wmi_ext2_service_words = len / sizeof(u32);
7999 for (i = 0, j = WMI_MAX_EXT_SERVICE;
8000 i < wmi_ext2_service_words && j < WMI_MAX_EXT2_SERVICE;
8001 i++) {
8002 do {
8003 if (__le32_to_cpu(wmi_ext2_service_bitmap[i]) &
8004 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32))
8005 set_bit(j, ab->wmi_ab.svc_map);
8006 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32);
8007 ath12k_dbg(ab, ATH12K_DBG_WMI,
8008 "wmi_ext2_service bitmap 0x%08x\n",
8009 __le32_to_cpu(wmi_ext2_service_bitmap[i]));
8010 }
8011
8012 break;
8013 }
8014 return 0;
8015 }
8016
ath12k_service_available_event(struct ath12k_base * ab,struct sk_buff * skb)8017 static int ath12k_service_available_event(struct ath12k_base *ab, struct sk_buff *skb)
8018 {
8019 int ret;
8020
8021 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
8022 ath12k_wmi_tlv_services_parser,
8023 NULL);
8024 return ret;
8025 }
8026
ath12k_peer_assoc_conf_event(struct ath12k_base * ab,struct sk_buff * skb)8027 static void ath12k_peer_assoc_conf_event(struct ath12k_base *ab, struct sk_buff *skb)
8028 {
8029 struct wmi_peer_assoc_conf_arg peer_assoc_conf = {};
8030 struct ath12k *ar;
8031
8032 if (ath12k_pull_peer_assoc_conf_ev(ab, skb, &peer_assoc_conf) != 0) {
8033 ath12k_warn(ab, "failed to extract peer assoc conf event");
8034 return;
8035 }
8036
8037 ath12k_dbg(ab, ATH12K_DBG_WMI,
8038 "peer assoc conf ev vdev id %d macaddr %pM\n",
8039 peer_assoc_conf.vdev_id, peer_assoc_conf.macaddr);
8040
8041 rcu_read_lock();
8042 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer_assoc_conf.vdev_id);
8043
8044 if (!ar) {
8045 ath12k_warn(ab, "invalid vdev id in peer assoc conf ev %d",
8046 peer_assoc_conf.vdev_id);
8047 rcu_read_unlock();
8048 return;
8049 }
8050
8051 complete(&ar->peer_assoc_done);
8052 rcu_read_unlock();
8053 }
8054
8055 static void
ath12k_wmi_fw_vdev_stats_dump(struct ath12k * ar,struct ath12k_fw_stats * fw_stats,char * buf,u32 * length)8056 ath12k_wmi_fw_vdev_stats_dump(struct ath12k *ar,
8057 struct ath12k_fw_stats *fw_stats,
8058 char *buf, u32 *length)
8059 {
8060 const struct ath12k_fw_stats_vdev *vdev;
8061 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
8062 struct ath12k_link_vif *arvif;
8063 u32 len = *length;
8064 u8 *vif_macaddr;
8065 int i;
8066
8067 len += scnprintf(buf + len, buf_len - len, "\n");
8068 len += scnprintf(buf + len, buf_len - len, "%30s\n",
8069 "ath12k VDEV stats");
8070 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8071 "=================");
8072
8073 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
8074 arvif = ath12k_mac_get_arvif(ar, vdev->vdev_id);
8075 if (!arvif)
8076 continue;
8077 vif_macaddr = arvif->ahvif->vif->addr;
8078
8079 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8080 "VDEV ID", vdev->vdev_id);
8081 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
8082 "VDEV MAC address", vif_macaddr);
8083 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8084 "beacon snr", vdev->beacon_snr);
8085 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8086 "data snr", vdev->data_snr);
8087 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8088 "num rx frames", vdev->num_rx_frames);
8089 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8090 "num rts fail", vdev->num_rts_fail);
8091 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8092 "num rts success", vdev->num_rts_success);
8093 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8094 "num rx err", vdev->num_rx_err);
8095 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8096 "num rx discard", vdev->num_rx_discard);
8097 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8098 "num tx not acked", vdev->num_tx_not_acked);
8099
8100 for (i = 0 ; i < WLAN_MAX_AC; i++)
8101 len += scnprintf(buf + len, buf_len - len,
8102 "%25s [%02d] %u\n",
8103 "num tx frames", i,
8104 vdev->num_tx_frames[i]);
8105
8106 for (i = 0 ; i < WLAN_MAX_AC; i++)
8107 len += scnprintf(buf + len, buf_len - len,
8108 "%25s [%02d] %u\n",
8109 "num tx frames retries", i,
8110 vdev->num_tx_frames_retries[i]);
8111
8112 for (i = 0 ; i < WLAN_MAX_AC; i++)
8113 len += scnprintf(buf + len, buf_len - len,
8114 "%25s [%02d] %u\n",
8115 "num tx frames failures", i,
8116 vdev->num_tx_frames_failures[i]);
8117
8118 for (i = 0 ; i < MAX_TX_RATE_VALUES; i++)
8119 len += scnprintf(buf + len, buf_len - len,
8120 "%25s [%02d] 0x%08x\n",
8121 "tx rate history", i,
8122 vdev->tx_rate_history[i]);
8123 for (i = 0 ; i < MAX_TX_RATE_VALUES; i++)
8124 len += scnprintf(buf + len, buf_len - len,
8125 "%25s [%02d] %u\n",
8126 "beacon rssi history", i,
8127 vdev->beacon_rssi_history[i]);
8128
8129 len += scnprintf(buf + len, buf_len - len, "\n");
8130 *length = len;
8131 }
8132 }
8133
8134 static void
ath12k_wmi_fw_bcn_stats_dump(struct ath12k * ar,struct ath12k_fw_stats * fw_stats,char * buf,u32 * length)8135 ath12k_wmi_fw_bcn_stats_dump(struct ath12k *ar,
8136 struct ath12k_fw_stats *fw_stats,
8137 char *buf, u32 *length)
8138 {
8139 const struct ath12k_fw_stats_bcn *bcn;
8140 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
8141 struct ath12k_link_vif *arvif;
8142 u32 len = *length;
8143 size_t num_bcn;
8144
8145 num_bcn = list_count_nodes(&fw_stats->bcn);
8146
8147 len += scnprintf(buf + len, buf_len - len, "\n");
8148 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8149 "ath12k Beacon stats", num_bcn);
8150 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8151 "===================");
8152
8153 list_for_each_entry(bcn, &fw_stats->bcn, list) {
8154 arvif = ath12k_mac_get_arvif(ar, bcn->vdev_id);
8155 if (!arvif)
8156 continue;
8157 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8158 "VDEV ID", bcn->vdev_id);
8159 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
8160 "VDEV MAC address", arvif->ahvif->vif->addr);
8161 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8162 "================");
8163 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8164 "Num of beacon tx success", bcn->tx_bcn_succ_cnt);
8165 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8166 "Num of beacon tx failures", bcn->tx_bcn_outage_cnt);
8167
8168 len += scnprintf(buf + len, buf_len - len, "\n");
8169 *length = len;
8170 }
8171 }
8172
8173 static void
ath12k_wmi_fw_pdev_base_stats_dump(const struct ath12k_fw_stats_pdev * pdev,char * buf,u32 * length,u64 fw_soc_drop_cnt)8174 ath12k_wmi_fw_pdev_base_stats_dump(const struct ath12k_fw_stats_pdev *pdev,
8175 char *buf, u32 *length, u64 fw_soc_drop_cnt)
8176 {
8177 u32 len = *length;
8178 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
8179
8180 len = scnprintf(buf + len, buf_len - len, "\n");
8181 len += scnprintf(buf + len, buf_len - len, "%30s\n",
8182 "ath12k PDEV stats");
8183 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8184 "=================");
8185
8186 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8187 "Channel noise floor", pdev->ch_noise_floor);
8188 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8189 "Channel TX power", pdev->chan_tx_power);
8190 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8191 "TX frame count", pdev->tx_frame_count);
8192 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8193 "RX frame count", pdev->rx_frame_count);
8194 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8195 "RX clear count", pdev->rx_clear_count);
8196 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8197 "Cycle count", pdev->cycle_count);
8198 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8199 "PHY error count", pdev->phy_err_count);
8200 len += scnprintf(buf + len, buf_len - len, "%30s %10llu\n",
8201 "soc drop count", fw_soc_drop_cnt);
8202
8203 *length = len;
8204 }
8205
8206 static void
ath12k_wmi_fw_pdev_tx_stats_dump(const struct ath12k_fw_stats_pdev * pdev,char * buf,u32 * length)8207 ath12k_wmi_fw_pdev_tx_stats_dump(const struct ath12k_fw_stats_pdev *pdev,
8208 char *buf, u32 *length)
8209 {
8210 u32 len = *length;
8211 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
8212
8213 len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
8214 "ath12k PDEV TX stats");
8215 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8216 "====================");
8217
8218 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8219 "HTT cookies queued", pdev->comp_queued);
8220 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8221 "HTT cookies disp.", pdev->comp_delivered);
8222 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8223 "MSDU queued", pdev->msdu_enqued);
8224 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8225 "MPDU queued", pdev->mpdu_enqued);
8226 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8227 "MSDUs dropped", pdev->wmm_drop);
8228 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8229 "Local enqued", pdev->local_enqued);
8230 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8231 "Local freed", pdev->local_freed);
8232 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8233 "HW queued", pdev->hw_queued);
8234 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8235 "PPDUs reaped", pdev->hw_reaped);
8236 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8237 "Num underruns", pdev->underrun);
8238 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8239 "PPDUs cleaned", pdev->tx_abort);
8240 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8241 "MPDUs requeued", pdev->mpdus_requed);
8242 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8243 "Excessive retries", pdev->tx_ko);
8244 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8245 "HW rate", pdev->data_rc);
8246 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8247 "Sched self triggers", pdev->self_triggers);
8248 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8249 "Dropped due to SW retries",
8250 pdev->sw_retry_failure);
8251 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8252 "Illegal rate phy errors",
8253 pdev->illgl_rate_phy_err);
8254 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8255 "PDEV continuous xretry", pdev->pdev_cont_xretry);
8256 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8257 "TX timeout", pdev->pdev_tx_timeout);
8258 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8259 "PDEV resets", pdev->pdev_resets);
8260 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8261 "Stateless TIDs alloc failures",
8262 pdev->stateless_tid_alloc_failure);
8263 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8264 "PHY underrun", pdev->phy_underrun);
8265 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8266 "MPDU is more than txop limit", pdev->txop_ovf);
8267 *length = len;
8268 }
8269
8270 static void
ath12k_wmi_fw_pdev_rx_stats_dump(const struct ath12k_fw_stats_pdev * pdev,char * buf,u32 * length)8271 ath12k_wmi_fw_pdev_rx_stats_dump(const struct ath12k_fw_stats_pdev *pdev,
8272 char *buf, u32 *length)
8273 {
8274 u32 len = *length;
8275 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
8276
8277 len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
8278 "ath12k PDEV RX stats");
8279 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8280 "====================");
8281
8282 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8283 "Mid PPDU route change",
8284 pdev->mid_ppdu_route_change);
8285 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8286 "Tot. number of statuses", pdev->status_rcvd);
8287 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8288 "Extra frags on rings 0", pdev->r0_frags);
8289 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8290 "Extra frags on rings 1", pdev->r1_frags);
8291 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8292 "Extra frags on rings 2", pdev->r2_frags);
8293 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8294 "Extra frags on rings 3", pdev->r3_frags);
8295 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8296 "MSDUs delivered to HTT", pdev->htt_msdus);
8297 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8298 "MPDUs delivered to HTT", pdev->htt_mpdus);
8299 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8300 "MSDUs delivered to stack", pdev->loc_msdus);
8301 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8302 "MPDUs delivered to stack", pdev->loc_mpdus);
8303 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8304 "Oversized AMSUs", pdev->oversize_amsdu);
8305 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8306 "PHY errors", pdev->phy_errs);
8307 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8308 "PHY errors drops", pdev->phy_err_drop);
8309 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8310 "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs);
8311 *length = len;
8312 }
8313
8314 static void
ath12k_wmi_fw_pdev_stats_dump(struct ath12k * ar,struct ath12k_fw_stats * fw_stats,char * buf,u32 * length)8315 ath12k_wmi_fw_pdev_stats_dump(struct ath12k *ar,
8316 struct ath12k_fw_stats *fw_stats,
8317 char *buf, u32 *length)
8318 {
8319 const struct ath12k_fw_stats_pdev *pdev;
8320 u32 len = *length;
8321
8322 pdev = list_first_entry_or_null(&fw_stats->pdevs,
8323 struct ath12k_fw_stats_pdev, list);
8324 if (!pdev) {
8325 ath12k_warn(ar->ab, "failed to get pdev stats\n");
8326 return;
8327 }
8328
8329 ath12k_wmi_fw_pdev_base_stats_dump(pdev, buf, &len,
8330 ar->ab->fw_soc_drop_count);
8331 ath12k_wmi_fw_pdev_tx_stats_dump(pdev, buf, &len);
8332 ath12k_wmi_fw_pdev_rx_stats_dump(pdev, buf, &len);
8333
8334 *length = len;
8335 }
8336
ath12k_wmi_fw_stats_dump(struct ath12k * ar,struct ath12k_fw_stats * fw_stats,u32 stats_id,char * buf)8337 void ath12k_wmi_fw_stats_dump(struct ath12k *ar,
8338 struct ath12k_fw_stats *fw_stats,
8339 u32 stats_id, char *buf)
8340 {
8341 u32 len = 0;
8342 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
8343
8344 spin_lock_bh(&ar->data_lock);
8345
8346 switch (stats_id) {
8347 case WMI_REQUEST_VDEV_STAT:
8348 ath12k_wmi_fw_vdev_stats_dump(ar, fw_stats, buf, &len);
8349 break;
8350 case WMI_REQUEST_BCN_STAT:
8351 ath12k_wmi_fw_bcn_stats_dump(ar, fw_stats, buf, &len);
8352 break;
8353 case WMI_REQUEST_PDEV_STAT:
8354 ath12k_wmi_fw_pdev_stats_dump(ar, fw_stats, buf, &len);
8355 break;
8356 default:
8357 break;
8358 }
8359
8360 spin_unlock_bh(&ar->data_lock);
8361
8362 if (len >= buf_len)
8363 buf[len - 1] = 0;
8364 else
8365 buf[len] = 0;
8366 }
8367
8368 static void
ath12k_wmi_pull_vdev_stats(const struct wmi_vdev_stats_params * src,struct ath12k_fw_stats_vdev * dst)8369 ath12k_wmi_pull_vdev_stats(const struct wmi_vdev_stats_params *src,
8370 struct ath12k_fw_stats_vdev *dst)
8371 {
8372 int i;
8373
8374 dst->vdev_id = le32_to_cpu(src->vdev_id);
8375 dst->beacon_snr = le32_to_cpu(src->beacon_snr);
8376 dst->data_snr = le32_to_cpu(src->data_snr);
8377 dst->num_rx_frames = le32_to_cpu(src->num_rx_frames);
8378 dst->num_rts_fail = le32_to_cpu(src->num_rts_fail);
8379 dst->num_rts_success = le32_to_cpu(src->num_rts_success);
8380 dst->num_rx_err = le32_to_cpu(src->num_rx_err);
8381 dst->num_rx_discard = le32_to_cpu(src->num_rx_discard);
8382 dst->num_tx_not_acked = le32_to_cpu(src->num_tx_not_acked);
8383
8384 for (i = 0; i < WLAN_MAX_AC; i++)
8385 dst->num_tx_frames[i] =
8386 le32_to_cpu(src->num_tx_frames[i]);
8387
8388 for (i = 0; i < WLAN_MAX_AC; i++)
8389 dst->num_tx_frames_retries[i] =
8390 le32_to_cpu(src->num_tx_frames_retries[i]);
8391
8392 for (i = 0; i < WLAN_MAX_AC; i++)
8393 dst->num_tx_frames_failures[i] =
8394 le32_to_cpu(src->num_tx_frames_failures[i]);
8395
8396 for (i = 0; i < MAX_TX_RATE_VALUES; i++)
8397 dst->tx_rate_history[i] =
8398 le32_to_cpu(src->tx_rate_history[i]);
8399
8400 for (i = 0; i < MAX_TX_RATE_VALUES; i++)
8401 dst->beacon_rssi_history[i] =
8402 le32_to_cpu(src->beacon_rssi_history[i]);
8403 }
8404
8405 static void
ath12k_wmi_pull_bcn_stats(const struct ath12k_wmi_bcn_stats_params * src,struct ath12k_fw_stats_bcn * dst)8406 ath12k_wmi_pull_bcn_stats(const struct ath12k_wmi_bcn_stats_params *src,
8407 struct ath12k_fw_stats_bcn *dst)
8408 {
8409 dst->vdev_id = le32_to_cpu(src->vdev_id);
8410 dst->tx_bcn_succ_cnt = le32_to_cpu(src->tx_bcn_succ_cnt);
8411 dst->tx_bcn_outage_cnt = le32_to_cpu(src->tx_bcn_outage_cnt);
8412 }
8413
8414 static void
ath12k_wmi_pull_pdev_stats_base(const struct ath12k_wmi_pdev_base_stats_params * src,struct ath12k_fw_stats_pdev * dst)8415 ath12k_wmi_pull_pdev_stats_base(const struct ath12k_wmi_pdev_base_stats_params *src,
8416 struct ath12k_fw_stats_pdev *dst)
8417 {
8418 dst->ch_noise_floor = a_sle32_to_cpu(src->chan_nf);
8419 dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
8420 dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
8421 dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
8422 dst->cycle_count = __le32_to_cpu(src->cycle_count);
8423 dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
8424 dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
8425 }
8426
8427 static void
ath12k_wmi_pull_pdev_stats_tx(const struct ath12k_wmi_pdev_tx_stats_params * src,struct ath12k_fw_stats_pdev * dst)8428 ath12k_wmi_pull_pdev_stats_tx(const struct ath12k_wmi_pdev_tx_stats_params *src,
8429 struct ath12k_fw_stats_pdev *dst)
8430 {
8431 dst->comp_queued = a_sle32_to_cpu(src->comp_queued);
8432 dst->comp_delivered = a_sle32_to_cpu(src->comp_delivered);
8433 dst->msdu_enqued = a_sle32_to_cpu(src->msdu_enqued);
8434 dst->mpdu_enqued = a_sle32_to_cpu(src->mpdu_enqued);
8435 dst->wmm_drop = a_sle32_to_cpu(src->wmm_drop);
8436 dst->local_enqued = a_sle32_to_cpu(src->local_enqued);
8437 dst->local_freed = a_sle32_to_cpu(src->local_freed);
8438 dst->hw_queued = a_sle32_to_cpu(src->hw_queued);
8439 dst->hw_reaped = a_sle32_to_cpu(src->hw_reaped);
8440 dst->underrun = a_sle32_to_cpu(src->underrun);
8441 dst->tx_abort = a_sle32_to_cpu(src->tx_abort);
8442 dst->mpdus_requed = a_sle32_to_cpu(src->mpdus_requed);
8443 dst->tx_ko = __le32_to_cpu(src->tx_ko);
8444 dst->data_rc = __le32_to_cpu(src->data_rc);
8445 dst->self_triggers = __le32_to_cpu(src->self_triggers);
8446 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
8447 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
8448 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
8449 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
8450 dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
8451 dst->stateless_tid_alloc_failure =
8452 __le32_to_cpu(src->stateless_tid_alloc_failure);
8453 dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
8454 dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
8455 }
8456
8457 static void
ath12k_wmi_pull_pdev_stats_rx(const struct ath12k_wmi_pdev_rx_stats_params * src,struct ath12k_fw_stats_pdev * dst)8458 ath12k_wmi_pull_pdev_stats_rx(const struct ath12k_wmi_pdev_rx_stats_params *src,
8459 struct ath12k_fw_stats_pdev *dst)
8460 {
8461 dst->mid_ppdu_route_change =
8462 a_sle32_to_cpu(src->mid_ppdu_route_change);
8463 dst->status_rcvd = a_sle32_to_cpu(src->status_rcvd);
8464 dst->r0_frags = a_sle32_to_cpu(src->r0_frags);
8465 dst->r1_frags = a_sle32_to_cpu(src->r1_frags);
8466 dst->r2_frags = a_sle32_to_cpu(src->r2_frags);
8467 dst->r3_frags = a_sle32_to_cpu(src->r3_frags);
8468 dst->htt_msdus = a_sle32_to_cpu(src->htt_msdus);
8469 dst->htt_mpdus = a_sle32_to_cpu(src->htt_mpdus);
8470 dst->loc_msdus = a_sle32_to_cpu(src->loc_msdus);
8471 dst->loc_mpdus = a_sle32_to_cpu(src->loc_mpdus);
8472 dst->oversize_amsdu = a_sle32_to_cpu(src->oversize_amsdu);
8473 dst->phy_errs = a_sle32_to_cpu(src->phy_errs);
8474 dst->phy_err_drop = a_sle32_to_cpu(src->phy_err_drop);
8475 dst->mpdu_errs = a_sle32_to_cpu(src->mpdu_errs);
8476 }
8477
ath12k_wmi_tlv_fw_stats_data_parse(struct ath12k_base * ab,struct wmi_tlv_fw_stats_parse * parse,const void * ptr,u16 len)8478 static int ath12k_wmi_tlv_fw_stats_data_parse(struct ath12k_base *ab,
8479 struct wmi_tlv_fw_stats_parse *parse,
8480 const void *ptr,
8481 u16 len)
8482 {
8483 const struct wmi_stats_event *ev = parse->ev;
8484 struct ath12k_fw_stats *stats = parse->stats;
8485 struct ath12k *ar;
8486 struct ath12k_link_vif *arvif;
8487 struct ath12k_link_sta *arsta;
8488 int i, ret = 0;
8489 const void *data = ptr;
8490
8491 if (!ev) {
8492 ath12k_warn(ab, "failed to fetch update stats ev");
8493 return -EPROTO;
8494 }
8495
8496 if (!stats)
8497 return -EINVAL;
8498
8499 rcu_read_lock();
8500
8501 stats->pdev_id = le32_to_cpu(ev->pdev_id);
8502 ar = ath12k_mac_get_ar_by_pdev_id(ab, stats->pdev_id);
8503 if (!ar) {
8504 ath12k_warn(ab, "invalid pdev id %d in update stats event\n",
8505 le32_to_cpu(ev->pdev_id));
8506 ret = -EPROTO;
8507 goto exit;
8508 }
8509
8510 for (i = 0; i < le32_to_cpu(ev->num_vdev_stats); i++) {
8511 const struct wmi_vdev_stats_params *src;
8512 struct ath12k_fw_stats_vdev *dst;
8513
8514 src = data;
8515 if (len < sizeof(*src)) {
8516 ret = -EPROTO;
8517 goto exit;
8518 }
8519
8520 arvif = ath12k_mac_get_arvif(ar, le32_to_cpu(src->vdev_id));
8521 if (arvif) {
8522 spin_lock_bh(&ab->base_lock);
8523 arsta = ath12k_link_sta_find_by_addr(ab, arvif->bssid);
8524 if (arsta) {
8525 arsta->rssi_beacon = le32_to_cpu(src->beacon_snr);
8526 ath12k_dbg(ab, ATH12K_DBG_WMI,
8527 "wmi stats vdev id %d snr %d\n",
8528 src->vdev_id, src->beacon_snr);
8529 } else {
8530 ath12k_warn(ab,
8531 "not found link sta with bssid %pM for vdev stat\n",
8532 arvif->bssid);
8533 }
8534 spin_unlock_bh(&ab->base_lock);
8535 }
8536
8537 data += sizeof(*src);
8538 len -= sizeof(*src);
8539 dst = kzalloc_obj(*dst, GFP_ATOMIC);
8540 if (!dst)
8541 continue;
8542 ath12k_wmi_pull_vdev_stats(src, dst);
8543 stats->stats_id = WMI_REQUEST_VDEV_STAT;
8544 list_add_tail(&dst->list, &stats->vdevs);
8545 }
8546 for (i = 0; i < le32_to_cpu(ev->num_bcn_stats); i++) {
8547 const struct ath12k_wmi_bcn_stats_params *src;
8548 struct ath12k_fw_stats_bcn *dst;
8549
8550 src = data;
8551 if (len < sizeof(*src)) {
8552 ret = -EPROTO;
8553 goto exit;
8554 }
8555
8556 data += sizeof(*src);
8557 len -= sizeof(*src);
8558 dst = kzalloc_obj(*dst, GFP_ATOMIC);
8559 if (!dst)
8560 continue;
8561 ath12k_wmi_pull_bcn_stats(src, dst);
8562 stats->stats_id = WMI_REQUEST_BCN_STAT;
8563 list_add_tail(&dst->list, &stats->bcn);
8564 }
8565 for (i = 0; i < le32_to_cpu(ev->num_pdev_stats); i++) {
8566 const struct ath12k_wmi_pdev_stats_params *src;
8567 struct ath12k_fw_stats_pdev *dst;
8568
8569 src = data;
8570 if (len < sizeof(*src)) {
8571 ret = -EPROTO;
8572 goto exit;
8573 }
8574
8575 stats->stats_id = WMI_REQUEST_PDEV_STAT;
8576
8577 data += sizeof(*src);
8578 len -= sizeof(*src);
8579
8580 dst = kzalloc_obj(*dst, GFP_ATOMIC);
8581 if (!dst)
8582 continue;
8583
8584 ath12k_wmi_pull_pdev_stats_base(&src->base, dst);
8585 ath12k_wmi_pull_pdev_stats_tx(&src->tx, dst);
8586 ath12k_wmi_pull_pdev_stats_rx(&src->rx, dst);
8587 list_add_tail(&dst->list, &stats->pdevs);
8588 }
8589
8590 exit:
8591 rcu_read_unlock();
8592 return ret;
8593 }
8594
ath12k_wmi_tlv_rssi_chain_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)8595 static int ath12k_wmi_tlv_rssi_chain_parse(struct ath12k_base *ab,
8596 u16 tag, u16 len,
8597 const void *ptr, void *data)
8598 {
8599 const struct wmi_rssi_stat_params *stats_rssi = ptr;
8600 struct wmi_tlv_fw_stats_parse *parse = data;
8601 const struct wmi_stats_event *ev = parse->ev;
8602 struct ath12k_fw_stats *stats = parse->stats;
8603 struct ath12k_link_vif *arvif;
8604 struct ath12k_link_sta *arsta;
8605 struct ath12k *ar;
8606 int vdev_id;
8607 int j;
8608
8609 if (!ev) {
8610 ath12k_warn(ab, "failed to fetch update stats ev");
8611 return -EPROTO;
8612 }
8613
8614 if (tag != WMI_TAG_RSSI_STATS)
8615 return -EPROTO;
8616
8617 if (!stats)
8618 return -EINVAL;
8619
8620 stats->pdev_id = le32_to_cpu(ev->pdev_id);
8621 vdev_id = le32_to_cpu(stats_rssi->vdev_id);
8622 guard(rcu)();
8623 ar = ath12k_mac_get_ar_by_pdev_id(ab, stats->pdev_id);
8624 if (!ar) {
8625 ath12k_warn(ab, "invalid pdev id %d in rssi chain parse\n",
8626 stats->pdev_id);
8627 return -EPROTO;
8628 }
8629
8630 arvif = ath12k_mac_get_arvif(ar, vdev_id);
8631 if (!arvif) {
8632 ath12k_warn(ab, "not found vif for vdev id %d\n", vdev_id);
8633 return -EPROTO;
8634 }
8635
8636 ath12k_dbg(ab, ATH12K_DBG_WMI,
8637 "stats bssid %pM vif %p\n",
8638 arvif->bssid, arvif->ahvif->vif);
8639
8640 guard(spinlock_bh)(&ab->base_lock);
8641 arsta = ath12k_link_sta_find_by_addr(ab, arvif->bssid);
8642 if (!arsta) {
8643 ath12k_warn(ab,
8644 "not found link sta with bssid %pM for rssi chain\n",
8645 arvif->bssid);
8646 return -EPROTO;
8647 }
8648
8649 BUILD_BUG_ON(ARRAY_SIZE(arsta->chain_signal) >
8650 ARRAY_SIZE(stats_rssi->rssi_avg_beacon));
8651
8652 for (j = 0; j < ARRAY_SIZE(arsta->chain_signal); j++)
8653 arsta->chain_signal[j] = le32_to_cpu(stats_rssi->rssi_avg_beacon[j]);
8654
8655 stats->stats_id = WMI_REQUEST_RSSI_PER_CHAIN_STAT;
8656
8657 return 0;
8658 }
8659
ath12k_wmi_tlv_fw_stats_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)8660 static int ath12k_wmi_tlv_fw_stats_parse(struct ath12k_base *ab,
8661 u16 tag, u16 len,
8662 const void *ptr, void *data)
8663 {
8664 struct wmi_tlv_fw_stats_parse *parse = data;
8665 int ret = 0;
8666
8667 switch (tag) {
8668 case WMI_TAG_STATS_EVENT:
8669 parse->ev = ptr;
8670 break;
8671 case WMI_TAG_ARRAY_BYTE:
8672 ret = ath12k_wmi_tlv_fw_stats_data_parse(ab, parse, ptr, len);
8673 break;
8674 case WMI_TAG_PER_CHAIN_RSSI_STATS:
8675 parse->rssi = ptr;
8676 if (le32_to_cpu(parse->ev->stats_id) & WMI_REQUEST_RSSI_PER_CHAIN_STAT)
8677 parse->rssi_num = le32_to_cpu(parse->rssi->num_per_chain_rssi);
8678 break;
8679 case WMI_TAG_ARRAY_STRUCT:
8680 if (parse->rssi_num && !parse->chain_rssi_done) {
8681 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
8682 ath12k_wmi_tlv_rssi_chain_parse,
8683 parse);
8684 if (ret)
8685 return ret;
8686
8687 parse->chain_rssi_done = true;
8688 }
8689 break;
8690 default:
8691 break;
8692 }
8693 return ret;
8694 }
8695
ath12k_wmi_pull_fw_stats(struct ath12k_base * ab,struct sk_buff * skb,struct ath12k_fw_stats * stats)8696 static int ath12k_wmi_pull_fw_stats(struct ath12k_base *ab, struct sk_buff *skb,
8697 struct ath12k_fw_stats *stats)
8698 {
8699 struct wmi_tlv_fw_stats_parse parse = {};
8700
8701 stats->stats_id = 0;
8702 parse.stats = stats;
8703
8704 return ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
8705 ath12k_wmi_tlv_fw_stats_parse,
8706 &parse);
8707 }
8708
ath12k_wmi_fw_stats_process(struct ath12k * ar,struct ath12k_fw_stats * stats)8709 static void ath12k_wmi_fw_stats_process(struct ath12k *ar,
8710 struct ath12k_fw_stats *stats)
8711 {
8712 struct ath12k_base *ab = ar->ab;
8713 struct ath12k_pdev *pdev;
8714 bool is_end = true;
8715 size_t total_vdevs_started = 0;
8716 int i;
8717
8718 if (stats->stats_id == WMI_REQUEST_VDEV_STAT) {
8719 if (list_empty(&stats->vdevs)) {
8720 ath12k_warn(ab, "empty vdev stats");
8721 return;
8722 }
8723 /* FW sends all the active VDEV stats irrespective of PDEV,
8724 * hence limit until the count of all VDEVs started
8725 */
8726 rcu_read_lock();
8727 for (i = 0; i < ab->num_radios; i++) {
8728 pdev = rcu_dereference(ab->pdevs_active[i]);
8729 if (pdev && pdev->ar)
8730 total_vdevs_started += pdev->ar->num_started_vdevs;
8731 }
8732 rcu_read_unlock();
8733
8734 if (total_vdevs_started)
8735 is_end = ((++ar->fw_stats.num_vdev_recvd) ==
8736 total_vdevs_started);
8737
8738 list_splice_tail_init(&stats->vdevs,
8739 &ar->fw_stats.vdevs);
8740
8741 if (is_end)
8742 complete(&ar->fw_stats_done);
8743
8744 return;
8745 }
8746
8747 if (stats->stats_id == WMI_REQUEST_BCN_STAT) {
8748 if (list_empty(&stats->bcn)) {
8749 ath12k_warn(ab, "empty beacon stats");
8750 return;
8751 }
8752
8753 list_splice_tail_init(&stats->bcn,
8754 &ar->fw_stats.bcn);
8755 complete(&ar->fw_stats_done);
8756 }
8757 }
8758
ath12k_update_stats_event(struct ath12k_base * ab,struct sk_buff * skb)8759 static void ath12k_update_stats_event(struct ath12k_base *ab, struct sk_buff *skb)
8760 {
8761 struct ath12k_fw_stats stats = {};
8762 struct ath12k *ar;
8763 int ret;
8764
8765 INIT_LIST_HEAD(&stats.pdevs);
8766 INIT_LIST_HEAD(&stats.vdevs);
8767 INIT_LIST_HEAD(&stats.bcn);
8768
8769 ret = ath12k_wmi_pull_fw_stats(ab, skb, &stats);
8770 if (ret) {
8771 ath12k_warn(ab, "failed to pull fw stats: %d\n", ret);
8772 goto free;
8773 }
8774
8775 ath12k_dbg(ab, ATH12K_DBG_WMI, "event update stats");
8776
8777 rcu_read_lock();
8778 ar = ath12k_mac_get_ar_by_pdev_id(ab, stats.pdev_id);
8779 if (!ar) {
8780 rcu_read_unlock();
8781 ath12k_warn(ab, "failed to get ar for pdev_id %d: %d\n",
8782 stats.pdev_id, ret);
8783 goto free;
8784 }
8785
8786 spin_lock_bh(&ar->data_lock);
8787
8788 /* Handle WMI_REQUEST_PDEV_STAT status update */
8789 if (stats.stats_id == WMI_REQUEST_PDEV_STAT) {
8790 list_splice_tail_init(&stats.pdevs, &ar->fw_stats.pdevs);
8791 complete(&ar->fw_stats_done);
8792 goto complete;
8793 }
8794
8795 /* Handle WMI_REQUEST_RSSI_PER_CHAIN_STAT status update */
8796 if (stats.stats_id == WMI_REQUEST_RSSI_PER_CHAIN_STAT) {
8797 complete(&ar->fw_stats_done);
8798 goto complete;
8799 }
8800
8801 /* Handle WMI_REQUEST_VDEV_STAT and WMI_REQUEST_BCN_STAT updates. */
8802 ath12k_wmi_fw_stats_process(ar, &stats);
8803
8804 complete:
8805 complete(&ar->fw_stats_complete);
8806 spin_unlock_bh(&ar->data_lock);
8807 rcu_read_unlock();
8808
8809 /* Since the stats's pdev, vdev and beacon list are spliced and reinitialised
8810 * at this point, no need to free the individual list.
8811 */
8812 return;
8813
8814 free:
8815 ath12k_fw_stats_free(&stats);
8816 }
8817
8818 /* PDEV_CTL_FAILSAFE_CHECK_EVENT is received from FW when the frequency scanned
8819 * is not part of BDF CTL(Conformance test limits) table entries.
8820 */
ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base * ab,struct sk_buff * skb)8821 static void ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base *ab,
8822 struct sk_buff *skb)
8823 {
8824 const void **tb;
8825 const struct wmi_pdev_ctl_failsafe_chk_event *ev;
8826 int ret;
8827
8828 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8829 if (IS_ERR(tb)) {
8830 ret = PTR_ERR(tb);
8831 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
8832 return;
8833 }
8834
8835 ev = tb[WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT];
8836 if (!ev) {
8837 ath12k_warn(ab, "failed to fetch pdev ctl failsafe check ev");
8838 kfree(tb);
8839 return;
8840 }
8841
8842 ath12k_dbg(ab, ATH12K_DBG_WMI,
8843 "pdev ctl failsafe check ev status %d\n",
8844 ev->ctl_failsafe_status);
8845
8846 /* If ctl_failsafe_status is set to 1 FW will max out the Transmit power
8847 * to 10 dBm else the CTL power entry in the BDF would be picked up.
8848 */
8849 if (ev->ctl_failsafe_status != 0)
8850 ath12k_warn(ab, "pdev ctl failsafe failure status %d",
8851 ev->ctl_failsafe_status);
8852
8853 kfree(tb);
8854 }
8855
8856 static void
ath12k_wmi_process_csa_switch_count_event(struct ath12k_base * ab,const struct ath12k_wmi_pdev_csa_event * ev,const u32 * vdev_ids)8857 ath12k_wmi_process_csa_switch_count_event(struct ath12k_base *ab,
8858 const struct ath12k_wmi_pdev_csa_event *ev,
8859 const u32 *vdev_ids)
8860 {
8861 u32 current_switch_count = le32_to_cpu(ev->current_switch_count);
8862 u32 num_vdevs = le32_to_cpu(ev->num_vdevs);
8863 struct ieee80211_bss_conf *conf;
8864 struct ath12k_link_vif *arvif;
8865 struct ath12k_vif *ahvif;
8866 int i;
8867
8868 rcu_read_lock();
8869 for (i = 0; i < num_vdevs; i++) {
8870 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_ids[i]);
8871
8872 if (!arvif) {
8873 ath12k_warn(ab, "Recvd csa status for unknown vdev %d",
8874 vdev_ids[i]);
8875 continue;
8876 }
8877 ahvif = arvif->ahvif;
8878
8879 if (arvif->link_id >= IEEE80211_MLD_MAX_NUM_LINKS) {
8880 ath12k_warn(ab, "Invalid CSA switch count even link id: %d\n",
8881 arvif->link_id);
8882 continue;
8883 }
8884
8885 conf = rcu_dereference(ahvif->vif->link_conf[arvif->link_id]);
8886 if (!conf) {
8887 ath12k_warn(ab, "unable to access bss link conf in process csa for vif %pM link %u\n",
8888 ahvif->vif->addr, arvif->link_id);
8889 continue;
8890 }
8891
8892 if (!arvif->is_up || !conf->csa_active)
8893 continue;
8894
8895 /* Finish CSA when counter reaches zero */
8896 if (!current_switch_count) {
8897 ieee80211_csa_finish(ahvif->vif, arvif->link_id);
8898 arvif->current_cntdown_counter = 0;
8899 } else if (current_switch_count > 1) {
8900 /* If the count in event is not what we expect, don't update the
8901 * mac80211 count. Since during beacon Tx failure, count in the
8902 * firmware will not decrement and this event will come with the
8903 * previous count value again
8904 */
8905 if (current_switch_count != arvif->current_cntdown_counter)
8906 continue;
8907
8908 arvif->current_cntdown_counter =
8909 ieee80211_beacon_update_cntdwn(ahvif->vif,
8910 arvif->link_id);
8911 }
8912 }
8913 rcu_read_unlock();
8914 }
8915
8916 static void
ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base * ab,struct sk_buff * skb)8917 ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base *ab,
8918 struct sk_buff *skb)
8919 {
8920 const void **tb;
8921 const struct ath12k_wmi_pdev_csa_event *ev;
8922 const u32 *vdev_ids;
8923 int ret;
8924
8925 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8926 if (IS_ERR(tb)) {
8927 ret = PTR_ERR(tb);
8928 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
8929 return;
8930 }
8931
8932 ev = tb[WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT];
8933 vdev_ids = tb[WMI_TAG_ARRAY_UINT32];
8934
8935 if (!ev || !vdev_ids) {
8936 ath12k_warn(ab, "failed to fetch pdev csa switch count ev");
8937 kfree(tb);
8938 return;
8939 }
8940
8941 ath12k_dbg(ab, ATH12K_DBG_WMI,
8942 "pdev csa switch count %d for pdev %d, num_vdevs %d",
8943 ev->current_switch_count, ev->pdev_id,
8944 ev->num_vdevs);
8945
8946 ath12k_wmi_process_csa_switch_count_event(ab, ev, vdev_ids);
8947
8948 kfree(tb);
8949 }
8950
8951 static void
ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base * ab,struct sk_buff * skb)8952 ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base *ab, struct sk_buff *skb)
8953 {
8954 const void **tb;
8955 struct ath12k_mac_get_any_chanctx_conf_arg arg;
8956 const struct ath12k_wmi_pdev_radar_event *ev;
8957 struct ath12k *ar;
8958 int ret;
8959
8960 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
8961 if (IS_ERR(tb)) {
8962 ret = PTR_ERR(tb);
8963 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
8964 return;
8965 }
8966
8967 ev = tb[WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT];
8968
8969 if (!ev) {
8970 ath12k_warn(ab, "failed to fetch pdev dfs radar detected ev");
8971 kfree(tb);
8972 return;
8973 }
8974
8975 ath12k_dbg(ab, ATH12K_DBG_WMI,
8976 "pdev dfs radar detected on pdev %d, detection mode %d, chan freq %d, chan_width %d, detector id %d, seg id %d, timestamp %d, chirp %d, freq offset %d, sidx %d",
8977 ev->pdev_id, ev->detection_mode, ev->chan_freq, ev->chan_width,
8978 ev->detector_id, ev->segment_id, ev->timestamp, ev->is_chirp,
8979 ev->freq_offset, ev->sidx);
8980
8981 rcu_read_lock();
8982
8983 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev->pdev_id));
8984
8985 if (!ar) {
8986 ath12k_warn(ab, "radar detected in invalid pdev %d\n",
8987 ev->pdev_id);
8988 goto exit;
8989 }
8990
8991 arg.ar = ar;
8992 arg.chanctx_conf = NULL;
8993 ieee80211_iter_chan_contexts_atomic(ath12k_ar_to_hw(ar),
8994 ath12k_mac_get_any_chanctx_conf_iter, &arg);
8995 if (!arg.chanctx_conf) {
8996 ath12k_warn(ab, "failed to find valid chanctx_conf in radar detected event\n");
8997 goto exit;
8998 }
8999
9000 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "DFS Radar Detected in pdev %d\n",
9001 ev->pdev_id);
9002
9003 if (ar->dfs_block_radar_events)
9004 ath12k_info(ab, "DFS Radar detected, but ignored as requested\n");
9005 else
9006 ieee80211_radar_detected(ath12k_ar_to_hw(ar), arg.chanctx_conf);
9007
9008 exit:
9009 rcu_read_unlock();
9010
9011 kfree(tb);
9012 }
9013
ath12k_tm_wmi_event_segmented(struct ath12k_base * ab,u32 cmd_id,struct sk_buff * skb)9014 static void ath12k_tm_wmi_event_segmented(struct ath12k_base *ab, u32 cmd_id,
9015 struct sk_buff *skb)
9016 {
9017 const struct ath12k_wmi_ftm_event *ev;
9018 const void **tb;
9019 int ret;
9020 u16 length;
9021
9022 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
9023
9024 if (IS_ERR(tb)) {
9025 ret = PTR_ERR(tb);
9026 ath12k_warn(ab, "failed to parse ftm event tlv: %d\n", ret);
9027 return;
9028 }
9029
9030 ev = tb[WMI_TAG_ARRAY_BYTE];
9031 if (!ev) {
9032 ath12k_warn(ab, "failed to fetch ftm msg\n");
9033 kfree(tb);
9034 return;
9035 }
9036
9037 length = skb->len - TLV_HDR_SIZE;
9038 ath12k_tm_process_event(ab, cmd_id, ev, length);
9039 kfree(tb);
9040 tb = NULL;
9041 }
9042
9043 static void
ath12k_wmi_pdev_temperature_event(struct ath12k_base * ab,struct sk_buff * skb)9044 ath12k_wmi_pdev_temperature_event(struct ath12k_base *ab,
9045 struct sk_buff *skb)
9046 {
9047 struct ath12k *ar;
9048 struct wmi_pdev_temperature_event ev = {};
9049
9050 if (ath12k_pull_pdev_temp_ev(ab, skb, &ev) != 0) {
9051 ath12k_warn(ab, "failed to extract pdev temperature event");
9052 return;
9053 }
9054
9055 ath12k_dbg(ab, ATH12K_DBG_WMI,
9056 "pdev temperature ev temp %d pdev_id %d\n", ev.temp, ev.pdev_id);
9057
9058 rcu_read_lock();
9059
9060 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev.pdev_id));
9061 if (!ar) {
9062 ath12k_warn(ab, "invalid pdev id in pdev temperature ev %d", ev.pdev_id);
9063 goto exit;
9064 }
9065
9066 exit:
9067 rcu_read_unlock();
9068 }
9069
ath12k_fils_discovery_event(struct ath12k_base * ab,struct sk_buff * skb)9070 static void ath12k_fils_discovery_event(struct ath12k_base *ab,
9071 struct sk_buff *skb)
9072 {
9073 const void **tb;
9074 const struct wmi_fils_discovery_event *ev;
9075 int ret;
9076
9077 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
9078 if (IS_ERR(tb)) {
9079 ret = PTR_ERR(tb);
9080 ath12k_warn(ab,
9081 "failed to parse FILS discovery event tlv %d\n",
9082 ret);
9083 return;
9084 }
9085
9086 ev = tb[WMI_TAG_HOST_SWFDA_EVENT];
9087 if (!ev) {
9088 ath12k_warn(ab, "failed to fetch FILS discovery event\n");
9089 kfree(tb);
9090 return;
9091 }
9092
9093 ath12k_warn(ab,
9094 "FILS discovery frame expected from host for vdev_id: %u, transmission scheduled at %u, next TBTT: %u\n",
9095 ev->vdev_id, ev->fils_tt, ev->tbtt);
9096
9097 kfree(tb);
9098 }
9099
ath12k_probe_resp_tx_status_event(struct ath12k_base * ab,struct sk_buff * skb)9100 static void ath12k_probe_resp_tx_status_event(struct ath12k_base *ab,
9101 struct sk_buff *skb)
9102 {
9103 const void **tb;
9104 const struct wmi_probe_resp_tx_status_event *ev;
9105 int ret;
9106
9107 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
9108 if (IS_ERR(tb)) {
9109 ret = PTR_ERR(tb);
9110 ath12k_warn(ab,
9111 "failed to parse probe response transmission status event tlv: %d\n",
9112 ret);
9113 return;
9114 }
9115
9116 ev = tb[WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT];
9117 if (!ev) {
9118 ath12k_warn(ab,
9119 "failed to fetch probe response transmission status event");
9120 kfree(tb);
9121 return;
9122 }
9123
9124 if (ev->tx_status)
9125 ath12k_warn(ab,
9126 "Probe response transmission failed for vdev_id %u, status %u\n",
9127 ev->vdev_id, ev->tx_status);
9128
9129 kfree(tb);
9130 }
9131
ath12k_wmi_p2p_noa_event(struct ath12k_base * ab,struct sk_buff * skb)9132 static int ath12k_wmi_p2p_noa_event(struct ath12k_base *ab,
9133 struct sk_buff *skb)
9134 {
9135 const void **tb;
9136 const struct wmi_p2p_noa_event *ev;
9137 const struct ath12k_wmi_p2p_noa_info *noa;
9138 struct ath12k *ar;
9139 int ret, vdev_id;
9140
9141 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
9142 if (IS_ERR(tb)) {
9143 ret = PTR_ERR(tb);
9144 ath12k_warn(ab, "failed to parse P2P NoA TLV: %d\n", ret);
9145 return ret;
9146 }
9147
9148 ev = tb[WMI_TAG_P2P_NOA_EVENT];
9149 noa = tb[WMI_TAG_P2P_NOA_INFO];
9150
9151 if (!ev || !noa) {
9152 ret = -EPROTO;
9153 goto out;
9154 }
9155
9156 vdev_id = __le32_to_cpu(ev->vdev_id);
9157
9158 ath12k_dbg(ab, ATH12K_DBG_WMI,
9159 "wmi tlv p2p noa vdev_id %i descriptors %u\n",
9160 vdev_id, le32_get_bits(noa->noa_attr, WMI_P2P_NOA_INFO_DESC_NUM));
9161
9162 rcu_read_lock();
9163 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
9164 if (!ar) {
9165 ath12k_warn(ab, "invalid vdev id %d in P2P NoA event\n",
9166 vdev_id);
9167 ret = -EINVAL;
9168 goto unlock;
9169 }
9170
9171 ath12k_p2p_noa_update_by_vdev_id(ar, vdev_id, noa);
9172
9173 ret = 0;
9174
9175 unlock:
9176 rcu_read_unlock();
9177 out:
9178 kfree(tb);
9179 return ret;
9180 }
9181
ath12k_rfkill_state_change_event(struct ath12k_base * ab,struct sk_buff * skb)9182 static void ath12k_rfkill_state_change_event(struct ath12k_base *ab,
9183 struct sk_buff *skb)
9184 {
9185 const struct wmi_rfkill_state_change_event *ev;
9186 const void **tb;
9187 int ret;
9188
9189 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
9190 if (IS_ERR(tb)) {
9191 ret = PTR_ERR(tb);
9192 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
9193 return;
9194 }
9195
9196 ev = tb[WMI_TAG_RFKILL_EVENT];
9197 if (!ev) {
9198 kfree(tb);
9199 return;
9200 }
9201
9202 ath12k_dbg(ab, ATH12K_DBG_MAC,
9203 "wmi tlv rfkill state change gpio %d type %d radio_state %d\n",
9204 le32_to_cpu(ev->gpio_pin_num),
9205 le32_to_cpu(ev->int_type),
9206 le32_to_cpu(ev->radio_state));
9207
9208 spin_lock_bh(&ab->base_lock);
9209 ab->rfkill_radio_on = (ev->radio_state == cpu_to_le32(WMI_RFKILL_RADIO_STATE_ON));
9210 spin_unlock_bh(&ab->base_lock);
9211
9212 queue_work(ab->workqueue, &ab->rfkill_work);
9213 kfree(tb);
9214 }
9215
9216 static void
ath12k_wmi_diag_event(struct ath12k_base * ab,struct sk_buff * skb)9217 ath12k_wmi_diag_event(struct ath12k_base *ab, struct sk_buff *skb)
9218 {
9219 trace_ath12k_wmi_diag(ab, skb->data, skb->len);
9220 }
9221
ath12k_wmi_twt_enable_event(struct ath12k_base * ab,struct sk_buff * skb)9222 static void ath12k_wmi_twt_enable_event(struct ath12k_base *ab,
9223 struct sk_buff *skb)
9224 {
9225 const void **tb;
9226 const struct wmi_twt_enable_event *ev;
9227 int ret;
9228
9229 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
9230 if (IS_ERR(tb)) {
9231 ret = PTR_ERR(tb);
9232 ath12k_warn(ab, "failed to parse wmi twt enable status event tlv: %d\n",
9233 ret);
9234 return;
9235 }
9236
9237 ev = tb[WMI_TAG_TWT_ENABLE_COMPLETE_EVENT];
9238 if (!ev) {
9239 ath12k_warn(ab, "failed to fetch twt enable wmi event\n");
9240 goto exit;
9241 }
9242
9243 ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt enable event pdev id %u status %u\n",
9244 le32_to_cpu(ev->pdev_id),
9245 le32_to_cpu(ev->status));
9246
9247 exit:
9248 kfree(tb);
9249 }
9250
ath12k_wmi_twt_disable_event(struct ath12k_base * ab,struct sk_buff * skb)9251 static void ath12k_wmi_twt_disable_event(struct ath12k_base *ab,
9252 struct sk_buff *skb)
9253 {
9254 const void **tb;
9255 const struct wmi_twt_disable_event *ev;
9256 int ret;
9257
9258 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
9259 if (IS_ERR(tb)) {
9260 ret = PTR_ERR(tb);
9261 ath12k_warn(ab, "failed to parse wmi twt disable status event tlv: %d\n",
9262 ret);
9263 return;
9264 }
9265
9266 ev = tb[WMI_TAG_TWT_DISABLE_COMPLETE_EVENT];
9267 if (!ev) {
9268 ath12k_warn(ab, "failed to fetch twt disable wmi event\n");
9269 goto exit;
9270 }
9271
9272 ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt disable event pdev id %d status %u\n",
9273 le32_to_cpu(ev->pdev_id),
9274 le32_to_cpu(ev->status));
9275
9276 exit:
9277 kfree(tb);
9278 }
9279
ath12k_wmi_wow_wakeup_host_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)9280 static int ath12k_wmi_wow_wakeup_host_parse(struct ath12k_base *ab,
9281 u16 tag, u16 len,
9282 const void *ptr, void *data)
9283 {
9284 const struct wmi_wow_ev_pg_fault_param *pf_param;
9285 const struct wmi_wow_ev_param *param;
9286 struct wmi_wow_ev_arg *arg = data;
9287 int pf_len;
9288
9289 switch (tag) {
9290 case WMI_TAG_WOW_EVENT_INFO:
9291 param = ptr;
9292 arg->wake_reason = le32_to_cpu(param->wake_reason);
9293 ath12k_dbg(ab, ATH12K_DBG_WMI, "wow wakeup host reason %d %s\n",
9294 arg->wake_reason, wow_reason(arg->wake_reason));
9295 break;
9296
9297 case WMI_TAG_ARRAY_BYTE:
9298 if (arg && arg->wake_reason == WOW_REASON_PAGE_FAULT) {
9299 pf_param = ptr;
9300 pf_len = le32_to_cpu(pf_param->len);
9301 if (pf_len > len - sizeof(pf_len) ||
9302 pf_len < 0) {
9303 ath12k_warn(ab, "invalid wo reason page fault buffer len %d\n",
9304 pf_len);
9305 return -EINVAL;
9306 }
9307 ath12k_dbg(ab, ATH12K_DBG_WMI, "wow_reason_page_fault len %d\n",
9308 pf_len);
9309 ath12k_dbg_dump(ab, ATH12K_DBG_WMI,
9310 "wow_reason_page_fault packet present",
9311 "wow_pg_fault ",
9312 pf_param->data,
9313 pf_len);
9314 }
9315 break;
9316 default:
9317 break;
9318 }
9319
9320 return 0;
9321 }
9322
ath12k_wmi_event_wow_wakeup_host(struct ath12k_base * ab,struct sk_buff * skb)9323 static void ath12k_wmi_event_wow_wakeup_host(struct ath12k_base *ab, struct sk_buff *skb)
9324 {
9325 struct wmi_wow_ev_arg arg = { };
9326 int ret;
9327
9328 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
9329 ath12k_wmi_wow_wakeup_host_parse,
9330 &arg);
9331 if (ret) {
9332 ath12k_warn(ab, "failed to parse wmi wow wakeup host event tlv: %d\n",
9333 ret);
9334 return;
9335 }
9336
9337 complete(&ab->wow.wakeup_completed);
9338 }
9339
ath12k_wmi_gtk_offload_status_event(struct ath12k_base * ab,struct sk_buff * skb)9340 static void ath12k_wmi_gtk_offload_status_event(struct ath12k_base *ab,
9341 struct sk_buff *skb)
9342 {
9343 const struct wmi_gtk_offload_status_event *ev;
9344 struct ath12k_link_vif *arvif;
9345 __be64 replay_ctr_be;
9346 u64 replay_ctr;
9347 const void **tb;
9348 int ret;
9349
9350 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
9351 if (IS_ERR(tb)) {
9352 ret = PTR_ERR(tb);
9353 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
9354 return;
9355 }
9356
9357 ev = tb[WMI_TAG_GTK_OFFLOAD_STATUS_EVENT];
9358 if (!ev) {
9359 ath12k_warn(ab, "failed to fetch gtk offload status ev");
9360 kfree(tb);
9361 return;
9362 }
9363
9364 rcu_read_lock();
9365 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, le32_to_cpu(ev->vdev_id));
9366 if (!arvif) {
9367 rcu_read_unlock();
9368 ath12k_warn(ab, "failed to get arvif for vdev_id:%d\n",
9369 le32_to_cpu(ev->vdev_id));
9370 kfree(tb);
9371 return;
9372 }
9373
9374 replay_ctr = le64_to_cpu(ev->replay_ctr);
9375 arvif->rekey_data.replay_ctr = replay_ctr;
9376 ath12k_dbg(ab, ATH12K_DBG_WMI, "wmi gtk offload event refresh_cnt %d replay_ctr %llu\n",
9377 le32_to_cpu(ev->refresh_cnt), replay_ctr);
9378
9379 /* supplicant expects big-endian replay counter */
9380 replay_ctr_be = cpu_to_be64(replay_ctr);
9381
9382 ieee80211_gtk_rekey_notify(arvif->ahvif->vif, arvif->bssid,
9383 (void *)&replay_ctr_be, GFP_ATOMIC);
9384
9385 rcu_read_unlock();
9386
9387 kfree(tb);
9388 }
9389
ath12k_wmi_event_mlo_setup_complete(struct ath12k_base * ab,struct sk_buff * skb)9390 static void ath12k_wmi_event_mlo_setup_complete(struct ath12k_base *ab,
9391 struct sk_buff *skb)
9392 {
9393 const struct wmi_mlo_setup_complete_event *ev;
9394 struct ath12k *ar = NULL;
9395 struct ath12k_pdev *pdev;
9396 const void **tb;
9397 int ret, i;
9398
9399 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
9400 if (IS_ERR(tb)) {
9401 ret = PTR_ERR(tb);
9402 ath12k_warn(ab, "failed to parse mlo setup complete event tlv: %d\n",
9403 ret);
9404 return;
9405 }
9406
9407 ev = tb[WMI_TAG_MLO_SETUP_COMPLETE_EVENT];
9408 if (!ev) {
9409 ath12k_warn(ab, "failed to fetch mlo setup complete event\n");
9410 kfree(tb);
9411 return;
9412 }
9413
9414 if (le32_to_cpu(ev->pdev_id) > ab->num_radios)
9415 goto skip_lookup;
9416
9417 for (i = 0; i < ab->num_radios; i++) {
9418 pdev = &ab->pdevs[i];
9419 if (pdev && pdev->pdev_id == le32_to_cpu(ev->pdev_id)) {
9420 ar = pdev->ar;
9421 break;
9422 }
9423 }
9424
9425 skip_lookup:
9426 if (!ar) {
9427 ath12k_warn(ab, "invalid pdev_id %d status %u in setup complete event\n",
9428 ev->pdev_id, ev->status);
9429 goto out;
9430 }
9431
9432 ar->mlo_setup_status = le32_to_cpu(ev->status);
9433 complete(&ar->mlo_setup_done);
9434
9435 out:
9436 kfree(tb);
9437 }
9438
ath12k_wmi_event_teardown_complete(struct ath12k_base * ab,struct sk_buff * skb)9439 static void ath12k_wmi_event_teardown_complete(struct ath12k_base *ab,
9440 struct sk_buff *skb)
9441 {
9442 const struct wmi_mlo_teardown_complete_event *ev;
9443 const void **tb;
9444 int ret;
9445
9446 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC);
9447 if (IS_ERR(tb)) {
9448 ret = PTR_ERR(tb);
9449 ath12k_warn(ab, "failed to parse teardown complete event tlv: %d\n", ret);
9450 return;
9451 }
9452
9453 ev = tb[WMI_TAG_MLO_TEARDOWN_COMPLETE];
9454 if (!ev) {
9455 ath12k_warn(ab, "failed to fetch teardown complete event\n");
9456 kfree(tb);
9457 return;
9458 }
9459
9460 kfree(tb);
9461 }
9462
9463 #ifdef CONFIG_ATH12K_DEBUGFS
ath12k_wmi_tpc_stats_copy_buffer(struct ath12k_base * ab,const void * ptr,u16 tag,u16 len,struct wmi_tpc_stats_arg * tpc_stats)9464 static int ath12k_wmi_tpc_stats_copy_buffer(struct ath12k_base *ab,
9465 const void *ptr, u16 tag, u16 len,
9466 struct wmi_tpc_stats_arg *tpc_stats)
9467 {
9468 u32 len1, len2, len3, len4;
9469 s16 *dst_ptr;
9470 s8 *dst_ptr_ctl;
9471
9472 len1 = le32_to_cpu(tpc_stats->max_reg_allowed_power.tpc_reg_pwr.reg_array_len);
9473 len2 = le32_to_cpu(tpc_stats->rates_array1.tpc_rates_array.rate_array_len);
9474 len3 = le32_to_cpu(tpc_stats->rates_array2.tpc_rates_array.rate_array_len);
9475 len4 = le32_to_cpu(tpc_stats->ctl_array.tpc_ctl_pwr.ctl_array_len);
9476
9477 switch (tpc_stats->event_count) {
9478 case ATH12K_TPC_STATS_CONFIG_REG_PWR_EVENT:
9479 if (len1 > len)
9480 return -ENOBUFS;
9481
9482 if (tpc_stats->tlvs_rcvd & WMI_TPC_REG_PWR_ALLOWED) {
9483 dst_ptr = tpc_stats->max_reg_allowed_power.reg_pwr_array;
9484 memcpy(dst_ptr, ptr, len1);
9485 }
9486 break;
9487 case ATH12K_TPC_STATS_RATES_EVENT1:
9488 if (len2 > len)
9489 return -ENOBUFS;
9490
9491 if (tpc_stats->tlvs_rcvd & WMI_TPC_RATES_ARRAY1) {
9492 dst_ptr = tpc_stats->rates_array1.rate_array;
9493 memcpy(dst_ptr, ptr, len2);
9494 }
9495 break;
9496 case ATH12K_TPC_STATS_RATES_EVENT2:
9497 if (len3 > len)
9498 return -ENOBUFS;
9499
9500 if (tpc_stats->tlvs_rcvd & WMI_TPC_RATES_ARRAY2) {
9501 dst_ptr = tpc_stats->rates_array2.rate_array;
9502 memcpy(dst_ptr, ptr, len3);
9503 }
9504 break;
9505 case ATH12K_TPC_STATS_CTL_TABLE_EVENT:
9506 if (len4 > len)
9507 return -ENOBUFS;
9508
9509 if (tpc_stats->tlvs_rcvd & WMI_TPC_CTL_PWR_ARRAY) {
9510 dst_ptr_ctl = tpc_stats->ctl_array.ctl_pwr_table;
9511 memcpy(dst_ptr_ctl, ptr, len4);
9512 }
9513 break;
9514 }
9515 return 0;
9516 }
9517
ath12k_tpc_get_reg_pwr(struct ath12k_base * ab,struct wmi_tpc_stats_arg * tpc_stats,struct wmi_max_reg_power_fixed_params * ev)9518 static int ath12k_tpc_get_reg_pwr(struct ath12k_base *ab,
9519 struct wmi_tpc_stats_arg *tpc_stats,
9520 struct wmi_max_reg_power_fixed_params *ev)
9521 {
9522 struct wmi_max_reg_power_allowed_arg *reg_pwr;
9523 u32 total_size;
9524
9525 ath12k_dbg(ab, ATH12K_DBG_WMI,
9526 "Received reg power array type %d length %d for tpc stats\n",
9527 ev->reg_power_type, ev->reg_array_len);
9528
9529 switch (le32_to_cpu(ev->reg_power_type)) {
9530 case TPC_STATS_REG_PWR_ALLOWED_TYPE:
9531 reg_pwr = &tpc_stats->max_reg_allowed_power;
9532 break;
9533 default:
9534 return -EINVAL;
9535 }
9536
9537 /* Each entry is 2 byte hence multiplying the indices with 2 */
9538 total_size = le32_to_cpu(ev->d1) * le32_to_cpu(ev->d2) *
9539 le32_to_cpu(ev->d3) * le32_to_cpu(ev->d4) * 2;
9540 if (le32_to_cpu(ev->reg_array_len) != total_size) {
9541 ath12k_warn(ab,
9542 "Total size and reg_array_len doesn't match for tpc stats\n");
9543 return -EINVAL;
9544 }
9545
9546 memcpy(®_pwr->tpc_reg_pwr, ev, sizeof(struct wmi_max_reg_power_fixed_params));
9547
9548 reg_pwr->reg_pwr_array = kzalloc(le32_to_cpu(reg_pwr->tpc_reg_pwr.reg_array_len),
9549 GFP_ATOMIC);
9550 if (!reg_pwr->reg_pwr_array)
9551 return -ENOMEM;
9552
9553 tpc_stats->tlvs_rcvd |= WMI_TPC_REG_PWR_ALLOWED;
9554
9555 return 0;
9556 }
9557
ath12k_tpc_get_rate_array(struct ath12k_base * ab,struct wmi_tpc_stats_arg * tpc_stats,struct wmi_tpc_rates_array_fixed_params * ev)9558 static int ath12k_tpc_get_rate_array(struct ath12k_base *ab,
9559 struct wmi_tpc_stats_arg *tpc_stats,
9560 struct wmi_tpc_rates_array_fixed_params *ev)
9561 {
9562 struct wmi_tpc_rates_array_arg *rates_array;
9563 u32 flag = 0, rate_array_len;
9564
9565 ath12k_dbg(ab, ATH12K_DBG_WMI,
9566 "Received rates array type %d length %d for tpc stats\n",
9567 ev->rate_array_type, ev->rate_array_len);
9568
9569 switch (le32_to_cpu(ev->rate_array_type)) {
9570 case ATH12K_TPC_STATS_RATES_ARRAY1:
9571 rates_array = &tpc_stats->rates_array1;
9572 flag = WMI_TPC_RATES_ARRAY1;
9573 break;
9574 case ATH12K_TPC_STATS_RATES_ARRAY2:
9575 rates_array = &tpc_stats->rates_array2;
9576 flag = WMI_TPC_RATES_ARRAY2;
9577 break;
9578 default:
9579 ath12k_warn(ab,
9580 "Received invalid type of rates array for tpc stats\n");
9581 return -EINVAL;
9582 }
9583 memcpy(&rates_array->tpc_rates_array, ev,
9584 sizeof(struct wmi_tpc_rates_array_fixed_params));
9585 rate_array_len = le32_to_cpu(rates_array->tpc_rates_array.rate_array_len);
9586 rates_array->rate_array = kzalloc(rate_array_len, GFP_ATOMIC);
9587 if (!rates_array->rate_array)
9588 return -ENOMEM;
9589
9590 tpc_stats->tlvs_rcvd |= flag;
9591 return 0;
9592 }
9593
ath12k_tpc_get_ctl_pwr_tbl(struct ath12k_base * ab,struct wmi_tpc_stats_arg * tpc_stats,struct wmi_tpc_ctl_pwr_fixed_params * ev)9594 static int ath12k_tpc_get_ctl_pwr_tbl(struct ath12k_base *ab,
9595 struct wmi_tpc_stats_arg *tpc_stats,
9596 struct wmi_tpc_ctl_pwr_fixed_params *ev)
9597 {
9598 struct wmi_tpc_ctl_pwr_table_arg *ctl_array;
9599 u32 total_size, ctl_array_len, flag = 0;
9600
9601 ath12k_dbg(ab, ATH12K_DBG_WMI,
9602 "Received ctl array type %d length %d for tpc stats\n",
9603 ev->ctl_array_type, ev->ctl_array_len);
9604
9605 switch (le32_to_cpu(ev->ctl_array_type)) {
9606 case ATH12K_TPC_STATS_CTL_ARRAY:
9607 ctl_array = &tpc_stats->ctl_array;
9608 flag = WMI_TPC_CTL_PWR_ARRAY;
9609 break;
9610 default:
9611 ath12k_warn(ab,
9612 "Received invalid type of ctl pwr table for tpc stats\n");
9613 return -EINVAL;
9614 }
9615
9616 total_size = le32_to_cpu(ev->d1) * le32_to_cpu(ev->d2) *
9617 le32_to_cpu(ev->d3) * le32_to_cpu(ev->d4);
9618 if (le32_to_cpu(ev->ctl_array_len) != total_size) {
9619 ath12k_warn(ab,
9620 "Total size and ctl_array_len doesn't match for tpc stats\n");
9621 return -EINVAL;
9622 }
9623
9624 memcpy(&ctl_array->tpc_ctl_pwr, ev, sizeof(struct wmi_tpc_ctl_pwr_fixed_params));
9625 ctl_array_len = le32_to_cpu(ctl_array->tpc_ctl_pwr.ctl_array_len);
9626 ctl_array->ctl_pwr_table = kzalloc(ctl_array_len, GFP_ATOMIC);
9627 if (!ctl_array->ctl_pwr_table)
9628 return -ENOMEM;
9629
9630 tpc_stats->tlvs_rcvd |= flag;
9631 return 0;
9632 }
9633
ath12k_wmi_tpc_stats_subtlv_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)9634 static int ath12k_wmi_tpc_stats_subtlv_parser(struct ath12k_base *ab,
9635 u16 tag, u16 len,
9636 const void *ptr, void *data)
9637 {
9638 struct wmi_tpc_rates_array_fixed_params *tpc_rates_array;
9639 struct wmi_max_reg_power_fixed_params *tpc_reg_pwr;
9640 struct wmi_tpc_ctl_pwr_fixed_params *tpc_ctl_pwr;
9641 struct wmi_tpc_stats_arg *tpc_stats = data;
9642 struct wmi_tpc_config_params *tpc_config;
9643 int ret = 0;
9644
9645 if (!tpc_stats) {
9646 ath12k_warn(ab, "tpc stats memory unavailable\n");
9647 return -EINVAL;
9648 }
9649
9650 switch (tag) {
9651 case WMI_TAG_TPC_STATS_CONFIG_EVENT:
9652 tpc_config = (struct wmi_tpc_config_params *)ptr;
9653 memcpy(&tpc_stats->tpc_config, tpc_config,
9654 sizeof(struct wmi_tpc_config_params));
9655 break;
9656 case WMI_TAG_TPC_STATS_REG_PWR_ALLOWED:
9657 tpc_reg_pwr = (struct wmi_max_reg_power_fixed_params *)ptr;
9658 ret = ath12k_tpc_get_reg_pwr(ab, tpc_stats, tpc_reg_pwr);
9659 break;
9660 case WMI_TAG_TPC_STATS_RATES_ARRAY:
9661 tpc_rates_array = (struct wmi_tpc_rates_array_fixed_params *)ptr;
9662 ret = ath12k_tpc_get_rate_array(ab, tpc_stats, tpc_rates_array);
9663 break;
9664 case WMI_TAG_TPC_STATS_CTL_PWR_TABLE_EVENT:
9665 tpc_ctl_pwr = (struct wmi_tpc_ctl_pwr_fixed_params *)ptr;
9666 ret = ath12k_tpc_get_ctl_pwr_tbl(ab, tpc_stats, tpc_ctl_pwr);
9667 break;
9668 default:
9669 ath12k_warn(ab,
9670 "Received invalid tag for tpc stats in subtlvs\n");
9671 return -EINVAL;
9672 }
9673 return ret;
9674 }
9675
ath12k_wmi_tpc_stats_event_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)9676 static int ath12k_wmi_tpc_stats_event_parser(struct ath12k_base *ab,
9677 u16 tag, u16 len,
9678 const void *ptr, void *data)
9679 {
9680 struct wmi_tpc_stats_arg *tpc_stats = (struct wmi_tpc_stats_arg *)data;
9681 int ret;
9682
9683 switch (tag) {
9684 case WMI_TAG_HALPHY_CTRL_PATH_EVENT_FIXED_PARAM:
9685 ret = 0;
9686 /* Fixed param is already processed*/
9687 break;
9688 case WMI_TAG_ARRAY_STRUCT:
9689 /* len 0 is expected for array of struct when there
9690 * is no content of that type to pack inside that tlv
9691 */
9692 if (len == 0)
9693 return 0;
9694 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
9695 ath12k_wmi_tpc_stats_subtlv_parser,
9696 tpc_stats);
9697 break;
9698 case WMI_TAG_ARRAY_INT16:
9699 if (len == 0)
9700 return 0;
9701 ret = ath12k_wmi_tpc_stats_copy_buffer(ab, ptr,
9702 WMI_TAG_ARRAY_INT16,
9703 len, tpc_stats);
9704 break;
9705 case WMI_TAG_ARRAY_BYTE:
9706 if (len == 0)
9707 return 0;
9708 ret = ath12k_wmi_tpc_stats_copy_buffer(ab, ptr,
9709 WMI_TAG_ARRAY_BYTE,
9710 len, tpc_stats);
9711 break;
9712 default:
9713 ath12k_warn(ab, "Received invalid tag for tpc stats\n");
9714 ret = -EINVAL;
9715 break;
9716 }
9717 return ret;
9718 }
9719
ath12k_wmi_free_tpc_stats_mem(struct ath12k * ar)9720 void ath12k_wmi_free_tpc_stats_mem(struct ath12k *ar)
9721 {
9722 struct wmi_tpc_stats_arg *tpc_stats = ar->debug.tpc_stats;
9723
9724 lockdep_assert_held(&ar->data_lock);
9725 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "tpc stats mem free\n");
9726 if (tpc_stats) {
9727 kfree(tpc_stats->max_reg_allowed_power.reg_pwr_array);
9728 kfree(tpc_stats->rates_array1.rate_array);
9729 kfree(tpc_stats->rates_array2.rate_array);
9730 kfree(tpc_stats->ctl_array.ctl_pwr_table);
9731 kfree(tpc_stats);
9732 ar->debug.tpc_stats = NULL;
9733 }
9734 }
9735
ath12k_wmi_process_tpc_stats(struct ath12k_base * ab,struct sk_buff * skb)9736 static void ath12k_wmi_process_tpc_stats(struct ath12k_base *ab,
9737 struct sk_buff *skb)
9738 {
9739 struct ath12k_wmi_pdev_tpc_stats_event_fixed_params *fixed_param;
9740 struct wmi_tpc_stats_arg *tpc_stats;
9741 const struct wmi_tlv *tlv;
9742 void *ptr = skb->data;
9743 struct ath12k *ar;
9744 u16 tlv_tag;
9745 u32 event_count;
9746 int ret;
9747
9748 if (!skb->data) {
9749 ath12k_warn(ab, "No data present in tpc stats event\n");
9750 return;
9751 }
9752
9753 if (skb->len < (sizeof(*fixed_param) + TLV_HDR_SIZE)) {
9754 ath12k_warn(ab, "TPC stats event size invalid\n");
9755 return;
9756 }
9757
9758 tlv = (struct wmi_tlv *)ptr;
9759 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG);
9760 ptr += sizeof(*tlv);
9761
9762 if (tlv_tag != WMI_TAG_HALPHY_CTRL_PATH_EVENT_FIXED_PARAM) {
9763 ath12k_warn(ab, "TPC stats without fixed param tlv at start\n");
9764 return;
9765 }
9766
9767 fixed_param = (struct ath12k_wmi_pdev_tpc_stats_event_fixed_params *)ptr;
9768 rcu_read_lock();
9769 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(fixed_param->pdev_id) + 1);
9770 if (!ar) {
9771 ath12k_warn(ab, "Failed to get ar for tpc stats\n");
9772 rcu_read_unlock();
9773 return;
9774 }
9775 spin_lock_bh(&ar->data_lock);
9776 if (!ar->debug.tpc_request) {
9777 /* Event is received either without request or the
9778 * timeout, if memory is already allocated free it
9779 */
9780 if (ar->debug.tpc_stats) {
9781 ath12k_warn(ab, "Freeing memory for tpc_stats\n");
9782 ath12k_wmi_free_tpc_stats_mem(ar);
9783 }
9784 goto unlock;
9785 }
9786
9787 event_count = le32_to_cpu(fixed_param->event_count);
9788 if (event_count == 0) {
9789 if (ar->debug.tpc_stats) {
9790 ath12k_warn(ab,
9791 "Invalid tpc memory present\n");
9792 goto unlock;
9793 }
9794 ar->debug.tpc_stats =
9795 kzalloc_obj(struct wmi_tpc_stats_arg, GFP_ATOMIC);
9796 if (!ar->debug.tpc_stats) {
9797 ath12k_warn(ab,
9798 "Failed to allocate memory for tpc stats\n");
9799 goto unlock;
9800 }
9801 }
9802
9803 tpc_stats = ar->debug.tpc_stats;
9804 if (!tpc_stats) {
9805 ath12k_warn(ab, "tpc stats memory unavailable\n");
9806 goto unlock;
9807 }
9808
9809 if (!(event_count == 0)) {
9810 if (event_count != tpc_stats->event_count + 1) {
9811 ath12k_warn(ab,
9812 "Invalid tpc event received\n");
9813 goto unlock;
9814 }
9815 }
9816 tpc_stats->pdev_id = le32_to_cpu(fixed_param->pdev_id);
9817 tpc_stats->end_of_event = le32_to_cpu(fixed_param->end_of_event);
9818 tpc_stats->event_count = le32_to_cpu(fixed_param->event_count);
9819 ath12k_dbg(ab, ATH12K_DBG_WMI,
9820 "tpc stats event_count %d\n",
9821 tpc_stats->event_count);
9822 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
9823 ath12k_wmi_tpc_stats_event_parser,
9824 tpc_stats);
9825 if (ret) {
9826 ath12k_wmi_free_tpc_stats_mem(ar);
9827 ath12k_warn(ab, "failed to parse tpc_stats tlv: %d\n", ret);
9828 goto unlock;
9829 }
9830
9831 if (tpc_stats->end_of_event)
9832 complete(&ar->debug.tpc_complete);
9833
9834 unlock:
9835 spin_unlock_bh(&ar->data_lock);
9836 rcu_read_unlock();
9837 }
9838 #else
ath12k_wmi_process_tpc_stats(struct ath12k_base * ab,struct sk_buff * skb)9839 static void ath12k_wmi_process_tpc_stats(struct ath12k_base *ab,
9840 struct sk_buff *skb)
9841 {
9842 }
9843 #endif
9844
9845 static int
ath12k_wmi_rssi_dbm_conv_info_evt_subtlv_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)9846 ath12k_wmi_rssi_dbm_conv_info_evt_subtlv_parser(struct ath12k_base *ab,
9847 u16 tag, u16 len,
9848 const void *ptr, void *data)
9849 {
9850 const struct ath12k_wmi_rssi_dbm_conv_temp_info_params *temp_info;
9851 const struct ath12k_wmi_rssi_dbm_conv_info_params *param_info;
9852 struct ath12k_wmi_rssi_dbm_conv_info_arg *rssi_info = data;
9853 struct ath12k_wmi_rssi_dbm_conv_param_arg param_arg;
9854 s32 nf_hw_dbm[ATH12K_MAX_NUM_NF_HW_DBM];
9855 u8 num_20mhz_segments;
9856 s8 min_nf, *nf_ptr;
9857 int i, j;
9858
9859 switch (tag) {
9860 case WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO:
9861 if (len < sizeof(*param_info)) {
9862 ath12k_warn(ab,
9863 "RSSI dbm conv subtlv 0x%x invalid len %d rcvd",
9864 tag, len);
9865 return -EINVAL;
9866 }
9867
9868 param_info = ptr;
9869
9870 param_arg.curr_bw = le32_to_cpu(param_info->curr_bw);
9871 param_arg.curr_rx_chainmask = le32_to_cpu(param_info->curr_rx_chainmask);
9872
9873 /* The received array is actually a 2D byte-array for per chain,
9874 * per 20MHz subband. Convert to 2D byte-array
9875 */
9876 nf_ptr = ¶m_arg.nf_hw_dbm[0][0];
9877
9878 for (i = 0; i < ATH12K_MAX_NUM_NF_HW_DBM; i++) {
9879 nf_hw_dbm[i] = a_sle32_to_cpu(param_info->nf_hw_dbm[i]);
9880
9881 for (j = 0; j < 4; j++) {
9882 *nf_ptr = (nf_hw_dbm[i] >> (j * 8)) & 0xFF;
9883 nf_ptr++;
9884 }
9885 }
9886
9887 switch (param_arg.curr_bw) {
9888 case WMI_CHAN_WIDTH_20:
9889 num_20mhz_segments = 1;
9890 break;
9891 case WMI_CHAN_WIDTH_40:
9892 num_20mhz_segments = 2;
9893 break;
9894 case WMI_CHAN_WIDTH_80:
9895 num_20mhz_segments = 4;
9896 break;
9897 case WMI_CHAN_WIDTH_160:
9898 num_20mhz_segments = 8;
9899 break;
9900 case WMI_CHAN_WIDTH_320:
9901 num_20mhz_segments = 16;
9902 break;
9903 default:
9904 ath12k_warn(ab, "Invalid current bandwidth %d in RSSI dbm event",
9905 param_arg.curr_bw);
9906 /* In error case, still consider the primary 20 MHz segment since
9907 * that would be much better than instead of dropping the whole
9908 * event
9909 */
9910 num_20mhz_segments = 1;
9911 }
9912
9913 min_nf = ATH12K_DEFAULT_NOISE_FLOOR;
9914
9915 for (i = 0; i < ATH12K_MAX_NUM_ANTENNA; i++) {
9916 if (!(param_arg.curr_rx_chainmask & BIT(i)))
9917 continue;
9918
9919 for (j = 0; j < num_20mhz_segments; j++) {
9920 if (param_arg.nf_hw_dbm[i][j] < min_nf)
9921 min_nf = param_arg.nf_hw_dbm[i][j];
9922 }
9923 }
9924
9925 rssi_info->min_nf_dbm = min_nf;
9926 rssi_info->nf_dbm_present = true;
9927 break;
9928 case WMI_TAG_RSSI_DBM_CONVERSION_TEMP_OFFSET_INFO:
9929 if (len < sizeof(*temp_info)) {
9930 ath12k_warn(ab,
9931 "RSSI dbm conv subtlv 0x%x invalid len %d rcvd",
9932 tag, len);
9933 return -EINVAL;
9934 }
9935
9936 temp_info = ptr;
9937 rssi_info->temp_offset = a_sle32_to_cpu(temp_info->offset);
9938 rssi_info->temp_offset_present = true;
9939 break;
9940 default:
9941 ath12k_dbg(ab, ATH12K_DBG_WMI,
9942 "Unknown subtlv 0x%x in RSSI dbm conversion event\n", tag);
9943 }
9944
9945 return 0;
9946 }
9947
9948 static int
ath12k_wmi_rssi_dbm_conv_info_event_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)9949 ath12k_wmi_rssi_dbm_conv_info_event_parser(struct ath12k_base *ab,
9950 u16 tag, u16 len,
9951 const void *ptr, void *data)
9952 {
9953 int ret = 0;
9954
9955 switch (tag) {
9956 case WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO_FIXED_PARAM:
9957 /* Fixed param is already processed*/
9958 break;
9959 case WMI_TAG_ARRAY_STRUCT:
9960 /* len 0 is expected for array of struct when there
9961 * is no content of that type inside that tlv
9962 */
9963 if (len == 0)
9964 return 0;
9965
9966 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
9967 ath12k_wmi_rssi_dbm_conv_info_evt_subtlv_parser,
9968 data);
9969 break;
9970 default:
9971 ath12k_dbg(ab, ATH12K_DBG_WMI,
9972 "Received invalid tag 0x%x for RSSI dbm conv info event\n",
9973 tag);
9974 break;
9975 }
9976
9977 return ret;
9978 }
9979
9980 static int
ath12k_wmi_rssi_dbm_conv_info_process_fixed_param(struct ath12k_base * ab,u8 * ptr,size_t len,int * pdev_id)9981 ath12k_wmi_rssi_dbm_conv_info_process_fixed_param(struct ath12k_base *ab, u8 *ptr,
9982 size_t len, int *pdev_id)
9983 {
9984 struct ath12k_wmi_rssi_dbm_conv_info_fixed_params *fixed_param;
9985 const struct wmi_tlv *tlv;
9986 u16 tlv_tag;
9987
9988 if (len < (sizeof(*fixed_param) + TLV_HDR_SIZE)) {
9989 ath12k_warn(ab, "invalid RSSI dbm conv event size %zu\n", len);
9990 return -EINVAL;
9991 }
9992
9993 tlv = (struct wmi_tlv *)ptr;
9994 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG);
9995 ptr += sizeof(*tlv);
9996
9997 if (tlv_tag != WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO_FIXED_PARAM) {
9998 ath12k_warn(ab, "RSSI dbm conv event received without fixed param tlv\n");
9999 return -EINVAL;
10000 }
10001
10002 fixed_param = (struct ath12k_wmi_rssi_dbm_conv_info_fixed_params *)ptr;
10003 *pdev_id = le32_to_cpu(fixed_param->pdev_id);
10004
10005 return 0;
10006 }
10007
10008 static void
ath12k_wmi_update_rssi_offsets(struct ath12k * ar,struct ath12k_wmi_rssi_dbm_conv_info_arg * rssi_info)10009 ath12k_wmi_update_rssi_offsets(struct ath12k *ar,
10010 struct ath12k_wmi_rssi_dbm_conv_info_arg *rssi_info)
10011 {
10012 struct ath12k_pdev_rssi_offsets *info = &ar->rssi_info;
10013
10014 lockdep_assert_held(&ar->data_lock);
10015
10016 if (rssi_info->temp_offset_present)
10017 info->temp_offset = rssi_info->temp_offset;
10018
10019 if (rssi_info->nf_dbm_present)
10020 info->min_nf_dbm = rssi_info->min_nf_dbm;
10021
10022 info->noise_floor = info->min_nf_dbm + info->temp_offset;
10023 }
10024
10025 static void
ath12k_wmi_rssi_dbm_conversion_params_info_event(struct ath12k_base * ab,struct sk_buff * skb)10026 ath12k_wmi_rssi_dbm_conversion_params_info_event(struct ath12k_base *ab,
10027 struct sk_buff *skb)
10028 {
10029 struct ath12k_wmi_rssi_dbm_conv_info_arg rssi_info;
10030 struct ath12k *ar;
10031 s32 noise_floor;
10032 u32 pdev_id;
10033 int ret;
10034
10035 ret = ath12k_wmi_rssi_dbm_conv_info_process_fixed_param(ab, skb->data, skb->len,
10036 &pdev_id);
10037 if (ret) {
10038 ath12k_warn(ab, "failed to parse fixed param in RSSI dbm conv event: %d\n",
10039 ret);
10040 return;
10041 }
10042
10043 rcu_read_lock();
10044 ar = ath12k_mac_get_ar_by_pdev_id(ab, pdev_id);
10045 /* If pdev is not active, ignore the event */
10046 if (!ar)
10047 goto out_unlock;
10048
10049 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
10050 ath12k_wmi_rssi_dbm_conv_info_event_parser,
10051 &rssi_info);
10052 if (ret) {
10053 ath12k_warn(ab, "unable to parse RSSI dbm conversion event\n");
10054 goto out_unlock;
10055 }
10056
10057 spin_lock_bh(&ar->data_lock);
10058 ath12k_wmi_update_rssi_offsets(ar, &rssi_info);
10059 noise_floor = ath12k_pdev_get_noise_floor(ar);
10060 spin_unlock_bh(&ar->data_lock);
10061
10062 ath12k_dbg(ab, ATH12K_DBG_WMI,
10063 "RSSI noise floor updated, new value is %d dbm\n", noise_floor);
10064 out_unlock:
10065 rcu_read_unlock();
10066 }
10067
ath12k_wmi_op_rx(struct ath12k_base * ab,struct sk_buff * skb)10068 static void ath12k_wmi_op_rx(struct ath12k_base *ab, struct sk_buff *skb)
10069 {
10070 struct wmi_cmd_hdr *cmd_hdr;
10071 enum wmi_tlv_event_id id;
10072
10073 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
10074 id = le32_get_bits(cmd_hdr->cmd_id, WMI_CMD_HDR_CMD_ID);
10075
10076 if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
10077 goto out;
10078
10079 switch (id) {
10080 /* Process all the WMI events here */
10081 case WMI_SERVICE_READY_EVENTID:
10082 ath12k_service_ready_event(ab, skb);
10083 break;
10084 case WMI_SERVICE_READY_EXT_EVENTID:
10085 ath12k_service_ready_ext_event(ab, skb);
10086 break;
10087 case WMI_SERVICE_READY_EXT2_EVENTID:
10088 ath12k_service_ready_ext2_event(ab, skb);
10089 break;
10090 case WMI_REG_CHAN_LIST_CC_EXT_EVENTID:
10091 ath12k_reg_chan_list_event(ab, skb);
10092 break;
10093 case WMI_READY_EVENTID:
10094 ath12k_ready_event(ab, skb);
10095 break;
10096 case WMI_PEER_DELETE_RESP_EVENTID:
10097 ath12k_peer_delete_resp_event(ab, skb);
10098 break;
10099 case WMI_VDEV_START_RESP_EVENTID:
10100 ath12k_vdev_start_resp_event(ab, skb);
10101 break;
10102 case WMI_OFFLOAD_BCN_TX_STATUS_EVENTID:
10103 ath12k_bcn_tx_status_event(ab, skb);
10104 break;
10105 case WMI_VDEV_STOPPED_EVENTID:
10106 ath12k_vdev_stopped_event(ab, skb);
10107 break;
10108 case WMI_MGMT_RX_EVENTID:
10109 ath12k_mgmt_rx_event(ab, skb);
10110 /* mgmt_rx_event() owns the skb now! */
10111 return;
10112 case WMI_MGMT_TX_COMPLETION_EVENTID:
10113 ath12k_mgmt_tx_compl_event(ab, skb);
10114 break;
10115 case WMI_SCAN_EVENTID:
10116 ath12k_scan_event(ab, skb);
10117 break;
10118 case WMI_PEER_STA_KICKOUT_EVENTID:
10119 ath12k_peer_sta_kickout_event(ab, skb);
10120 break;
10121 case WMI_ROAM_EVENTID:
10122 ath12k_roam_event(ab, skb);
10123 break;
10124 case WMI_CHAN_INFO_EVENTID:
10125 ath12k_chan_info_event(ab, skb);
10126 break;
10127 case WMI_PDEV_BSS_CHAN_INFO_EVENTID:
10128 ath12k_pdev_bss_chan_info_event(ab, skb);
10129 break;
10130 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
10131 ath12k_vdev_install_key_compl_event(ab, skb);
10132 break;
10133 case WMI_SERVICE_AVAILABLE_EVENTID:
10134 ath12k_service_available_event(ab, skb);
10135 break;
10136 case WMI_PEER_ASSOC_CONF_EVENTID:
10137 ath12k_peer_assoc_conf_event(ab, skb);
10138 break;
10139 case WMI_UPDATE_STATS_EVENTID:
10140 ath12k_update_stats_event(ab, skb);
10141 break;
10142 case WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID:
10143 ath12k_pdev_ctl_failsafe_check_event(ab, skb);
10144 break;
10145 case WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID:
10146 ath12k_wmi_pdev_csa_switch_count_status_event(ab, skb);
10147 break;
10148 case WMI_PDEV_TEMPERATURE_EVENTID:
10149 ath12k_wmi_pdev_temperature_event(ab, skb);
10150 break;
10151 case WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID:
10152 ath12k_wmi_pdev_dma_ring_buf_release_event(ab, skb);
10153 break;
10154 case WMI_HOST_FILS_DISCOVERY_EVENTID:
10155 ath12k_fils_discovery_event(ab, skb);
10156 break;
10157 case WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID:
10158 ath12k_probe_resp_tx_status_event(ab, skb);
10159 break;
10160 case WMI_RFKILL_STATE_CHANGE_EVENTID:
10161 ath12k_rfkill_state_change_event(ab, skb);
10162 break;
10163 case WMI_TWT_ENABLE_EVENTID:
10164 ath12k_wmi_twt_enable_event(ab, skb);
10165 break;
10166 case WMI_TWT_DISABLE_EVENTID:
10167 ath12k_wmi_twt_disable_event(ab, skb);
10168 break;
10169 case WMI_P2P_NOA_EVENTID:
10170 ath12k_wmi_p2p_noa_event(ab, skb);
10171 break;
10172 case WMI_PDEV_DFS_RADAR_DETECTION_EVENTID:
10173 ath12k_wmi_pdev_dfs_radar_detected_event(ab, skb);
10174 break;
10175 case WMI_VDEV_DELETE_RESP_EVENTID:
10176 ath12k_vdev_delete_resp_event(ab, skb);
10177 break;
10178 case WMI_DIAG_EVENTID:
10179 ath12k_wmi_diag_event(ab, skb);
10180 break;
10181 case WMI_WOW_WAKEUP_HOST_EVENTID:
10182 ath12k_wmi_event_wow_wakeup_host(ab, skb);
10183 break;
10184 case WMI_GTK_OFFLOAD_STATUS_EVENTID:
10185 ath12k_wmi_gtk_offload_status_event(ab, skb);
10186 break;
10187 case WMI_MLO_SETUP_COMPLETE_EVENTID:
10188 ath12k_wmi_event_mlo_setup_complete(ab, skb);
10189 break;
10190 case WMI_MLO_TEARDOWN_COMPLETE_EVENTID:
10191 ath12k_wmi_event_teardown_complete(ab, skb);
10192 break;
10193 case WMI_HALPHY_STATS_CTRL_PATH_EVENTID:
10194 ath12k_wmi_process_tpc_stats(ab, skb);
10195 break;
10196 case WMI_11D_NEW_COUNTRY_EVENTID:
10197 ath12k_reg_11d_new_cc_event(ab, skb);
10198 break;
10199 case WMI_PDEV_RSSI_DBM_CONVERSION_PARAMS_INFO_EVENTID:
10200 ath12k_wmi_rssi_dbm_conversion_params_info_event(ab, skb);
10201 break;
10202 case WMI_OBSS_COLOR_COLLISION_DETECTION_EVENTID:
10203 ath12k_wmi_obss_color_collision_event(ab, skb);
10204 break;
10205 /* add Unsupported events (rare) here */
10206 case WMI_TBTTOFFSET_EXT_UPDATE_EVENTID:
10207 case WMI_PEER_OPER_MODE_CHANGE_EVENTID:
10208 case WMI_PDEV_DMA_RING_CFG_RSP_EVENTID:
10209 ath12k_dbg(ab, ATH12K_DBG_WMI,
10210 "ignoring unsupported event 0x%x\n", id);
10211 break;
10212 /* add Unsupported events (frequent) here */
10213 case WMI_PDEV_GET_HALPHY_CAL_STATUS_EVENTID:
10214 case WMI_MGMT_RX_FW_CONSUMED_EVENTID:
10215 /* debug might flood hence silently ignore (no-op) */
10216 break;
10217 case WMI_PDEV_UTF_EVENTID:
10218 if (test_bit(ATH12K_FLAG_FTM_SEGMENTED, &ab->dev_flags))
10219 ath12k_tm_wmi_event_segmented(ab, id, skb);
10220 else
10221 ath12k_tm_wmi_event_unsegmented(ab, id, skb);
10222 break;
10223 default:
10224 ath12k_dbg(ab, ATH12K_DBG_WMI, "Unknown eventid: 0x%x\n", id);
10225 break;
10226 }
10227
10228 out:
10229 dev_kfree_skb(skb);
10230 }
10231
ath12k_connect_pdev_htc_service(struct ath12k_base * ab,u32 pdev_idx)10232 static int ath12k_connect_pdev_htc_service(struct ath12k_base *ab,
10233 u32 pdev_idx)
10234 {
10235 int status;
10236 static const u32 svc_id[] = {
10237 ATH12K_HTC_SVC_ID_WMI_CONTROL,
10238 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC1,
10239 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC2
10240 };
10241 struct ath12k_htc_svc_conn_req conn_req = {};
10242 struct ath12k_htc_svc_conn_resp conn_resp = {};
10243
10244 /* these fields are the same for all service endpoints */
10245 conn_req.ep_ops.ep_tx_complete = ath12k_wmi_htc_tx_complete;
10246 conn_req.ep_ops.ep_rx_complete = ath12k_wmi_op_rx;
10247 conn_req.ep_ops.ep_tx_credits = ath12k_wmi_op_ep_tx_credits;
10248
10249 /* connect to control service */
10250 conn_req.service_id = svc_id[pdev_idx];
10251
10252 status = ath12k_htc_connect_service(&ab->htc, &conn_req, &conn_resp);
10253 if (status) {
10254 ath12k_warn(ab, "failed to connect to WMI CONTROL service status: %d\n",
10255 status);
10256 return status;
10257 }
10258
10259 ab->wmi_ab.wmi_endpoint_id[pdev_idx] = conn_resp.eid;
10260 ab->wmi_ab.wmi[pdev_idx].eid = conn_resp.eid;
10261 ab->wmi_ab.max_msg_len[pdev_idx] = conn_resp.max_msg_len;
10262
10263 return 0;
10264 }
10265
10266 static int
ath12k_wmi_send_unit_test_cmd(struct ath12k * ar,struct wmi_unit_test_cmd ut_cmd,u32 * test_args)10267 ath12k_wmi_send_unit_test_cmd(struct ath12k *ar,
10268 struct wmi_unit_test_cmd ut_cmd,
10269 u32 *test_args)
10270 {
10271 struct ath12k_wmi_pdev *wmi = ar->wmi;
10272 struct wmi_unit_test_cmd *cmd;
10273 struct sk_buff *skb;
10274 struct wmi_tlv *tlv;
10275 #if defined(__linux__)
10276 void *ptr;
10277 #elif defined(__FreeBSD__)
10278 u8 *ptr;
10279 #endif
10280 u32 *ut_cmd_args;
10281 int buf_len, arg_len;
10282 int ret;
10283 int i;
10284
10285 arg_len = sizeof(u32) * le32_to_cpu(ut_cmd.num_args);
10286 buf_len = sizeof(ut_cmd) + arg_len + TLV_HDR_SIZE;
10287
10288 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len);
10289 if (!skb)
10290 return -ENOMEM;
10291
10292 cmd = (struct wmi_unit_test_cmd *)skb->data;
10293 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_UNIT_TEST_CMD,
10294 sizeof(ut_cmd));
10295
10296 cmd->vdev_id = ut_cmd.vdev_id;
10297 cmd->module_id = ut_cmd.module_id;
10298 cmd->num_args = ut_cmd.num_args;
10299 cmd->diag_token = ut_cmd.diag_token;
10300
10301 ptr = skb->data + sizeof(ut_cmd);
10302
10303 #if defined(__linux__)
10304 tlv = ptr;
10305 #elif defined(__FreeBSD__)
10306 tlv = (void *)ptr;
10307 #endif
10308 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len);
10309
10310 ptr += TLV_HDR_SIZE;
10311
10312 #if defined(__linux__)
10313 ut_cmd_args = ptr;
10314 #elif defined(__FreeBSD__)
10315 ut_cmd_args = (void *)ptr;
10316 #endif
10317 for (i = 0; i < le32_to_cpu(ut_cmd.num_args); i++)
10318 ut_cmd_args[i] = test_args[i];
10319
10320 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
10321 "WMI unit test : module %d vdev %d n_args %d token %d\n",
10322 cmd->module_id, cmd->vdev_id, cmd->num_args,
10323 cmd->diag_token);
10324
10325 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_UNIT_TEST_CMDID);
10326
10327 if (ret) {
10328 ath12k_warn(ar->ab, "failed to send WMI_UNIT_TEST CMD :%d\n",
10329 ret);
10330 dev_kfree_skb(skb);
10331 }
10332
10333 return ret;
10334 }
10335
ath12k_wmi_simulate_radar(struct ath12k * ar)10336 int ath12k_wmi_simulate_radar(struct ath12k *ar)
10337 {
10338 struct ath12k_link_vif *arvif;
10339 u32 dfs_args[DFS_MAX_TEST_ARGS];
10340 struct wmi_unit_test_cmd wmi_ut;
10341 bool arvif_found = false;
10342
10343 list_for_each_entry(arvif, &ar->arvifs, list) {
10344 if (arvif->is_started && arvif->ahvif->vdev_type == WMI_VDEV_TYPE_AP) {
10345 arvif_found = true;
10346 break;
10347 }
10348 }
10349
10350 if (!arvif_found)
10351 return -EINVAL;
10352
10353 dfs_args[DFS_TEST_CMDID] = 0;
10354 dfs_args[DFS_TEST_PDEV_ID] = ar->pdev->pdev_id;
10355 /* Currently we could pass segment_id(b0 - b1), chirp(b2)
10356 * freq offset (b3 - b10) to unit test. For simulation
10357 * purpose this can be set to 0 which is valid.
10358 */
10359 dfs_args[DFS_TEST_RADAR_PARAM] = 0;
10360
10361 wmi_ut.vdev_id = cpu_to_le32(arvif->vdev_id);
10362 wmi_ut.module_id = cpu_to_le32(DFS_UNIT_TEST_MODULE);
10363 wmi_ut.num_args = cpu_to_le32(DFS_MAX_TEST_ARGS);
10364 wmi_ut.diag_token = cpu_to_le32(DFS_UNIT_TEST_TOKEN);
10365
10366 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "Triggering Radar Simulation\n");
10367
10368 return ath12k_wmi_send_unit_test_cmd(ar, wmi_ut, dfs_args);
10369 }
10370
ath12k_wmi_send_tpc_stats_request(struct ath12k * ar,enum wmi_halphy_ctrl_path_stats_id tpc_stats_type)10371 int ath12k_wmi_send_tpc_stats_request(struct ath12k *ar,
10372 enum wmi_halphy_ctrl_path_stats_id tpc_stats_type)
10373 {
10374 struct wmi_request_halphy_ctrl_path_stats_cmd_fixed_params *cmd;
10375 struct ath12k_wmi_pdev *wmi = ar->wmi;
10376 struct sk_buff *skb;
10377 struct wmi_tlv *tlv;
10378 __le32 *pdev_id;
10379 u32 buf_len;
10380 void *ptr;
10381 int ret;
10382
10383 buf_len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(u32) + TLV_HDR_SIZE + TLV_HDR_SIZE;
10384
10385 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len);
10386 if (!skb)
10387 return -ENOMEM;
10388 cmd = (struct wmi_request_halphy_ctrl_path_stats_cmd_fixed_params *)skb->data;
10389 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HALPHY_CTRL_PATH_CMD_FIXED_PARAM,
10390 sizeof(*cmd));
10391
10392 cmd->stats_id_mask = cpu_to_le32(WMI_REQ_CTRL_PATH_PDEV_TX_STAT);
10393 cmd->action = cpu_to_le32(WMI_REQUEST_CTRL_PATH_STAT_GET);
10394 cmd->subid = cpu_to_le32(tpc_stats_type);
10395
10396 ptr = skb->data + sizeof(*cmd);
10397
10398 /* The below TLV arrays optionally follow this fixed param TLV structure
10399 * 1. ARRAY_UINT32 pdev_ids[]
10400 * If this array is present and non-zero length, stats should only
10401 * be provided from the pdevs identified in the array.
10402 * 2. ARRAY_UNIT32 vdev_ids[]
10403 * If this array is present and non-zero length, stats should only
10404 * be provided from the vdevs identified in the array.
10405 * 3. ath12k_wmi_mac_addr_params peer_macaddr[];
10406 * If this array is present and non-zero length, stats should only
10407 * be provided from the peers with the MAC addresses specified
10408 * in the array
10409 */
10410 tlv = ptr;
10411 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, sizeof(u32));
10412 ptr += TLV_HDR_SIZE;
10413
10414 pdev_id = ptr;
10415 *pdev_id = cpu_to_le32(ath12k_mac_get_target_pdev_id(ar));
10416 ptr += sizeof(*pdev_id);
10417
10418 tlv = ptr;
10419 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
10420 ptr += TLV_HDR_SIZE;
10421
10422 tlv = ptr;
10423 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, 0);
10424 ptr += TLV_HDR_SIZE;
10425
10426 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_REQUEST_HALPHY_CTRL_PATH_STATS_CMDID);
10427 if (ret) {
10428 ath12k_warn(ar->ab,
10429 "failed to submit WMI_REQUEST_STATS_CTRL_PATH_CMDID\n");
10430 dev_kfree_skb(skb);
10431 return ret;
10432 }
10433 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI get TPC STATS sent on pdev %d\n",
10434 ar->pdev->pdev_id);
10435
10436 return ret;
10437 }
10438
ath12k_wmi_connect(struct ath12k_base * ab)10439 int ath12k_wmi_connect(struct ath12k_base *ab)
10440 {
10441 u32 i;
10442 u8 wmi_ep_count;
10443
10444 wmi_ep_count = ab->htc.wmi_ep_count;
10445 if (wmi_ep_count > ab->hw_params->max_radios)
10446 return -1;
10447
10448 for (i = 0; i < wmi_ep_count; i++)
10449 ath12k_connect_pdev_htc_service(ab, i);
10450
10451 return 0;
10452 }
10453
ath12k_wmi_pdev_detach(struct ath12k_base * ab,u8 pdev_id)10454 static void ath12k_wmi_pdev_detach(struct ath12k_base *ab, u8 pdev_id)
10455 {
10456 if (WARN_ON(pdev_id >= MAX_RADIOS))
10457 return;
10458
10459 /* TODO: Deinit any pdev specific wmi resource */
10460 }
10461
ath12k_wmi_pdev_attach(struct ath12k_base * ab,u8 pdev_id)10462 int ath12k_wmi_pdev_attach(struct ath12k_base *ab,
10463 u8 pdev_id)
10464 {
10465 struct ath12k_wmi_pdev *wmi_handle;
10466
10467 if (pdev_id >= ab->hw_params->max_radios)
10468 return -EINVAL;
10469
10470 wmi_handle = &ab->wmi_ab.wmi[pdev_id];
10471
10472 wmi_handle->wmi_ab = &ab->wmi_ab;
10473
10474 ab->wmi_ab.ab = ab;
10475 /* TODO: Init remaining resource specific to pdev */
10476
10477 return 0;
10478 }
10479
ath12k_wmi_attach(struct ath12k_base * ab)10480 int ath12k_wmi_attach(struct ath12k_base *ab)
10481 {
10482 int ret;
10483
10484 ret = ath12k_wmi_pdev_attach(ab, 0);
10485 if (ret)
10486 return ret;
10487
10488 ab->wmi_ab.ab = ab;
10489 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_MAX;
10490
10491 /* It's overwritten when service_ext_ready is handled */
10492 if (ab->hw_params->single_pdev_only)
10493 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_SINGLE;
10494
10495 /* TODO: Init remaining wmi soc resources required */
10496 init_completion(&ab->wmi_ab.service_ready);
10497 init_completion(&ab->wmi_ab.unified_ready);
10498
10499 return 0;
10500 }
10501
ath12k_wmi_detach(struct ath12k_base * ab)10502 void ath12k_wmi_detach(struct ath12k_base *ab)
10503 {
10504 int i;
10505
10506 /* TODO: Deinit wmi resource specific to SOC as required */
10507
10508 for (i = 0; i < ab->htc.wmi_ep_count; i++)
10509 ath12k_wmi_pdev_detach(ab, i);
10510
10511 ath12k_wmi_free_dbring_caps(ab);
10512 }
10513
ath12k_wmi_hw_data_filter_cmd(struct ath12k * ar,struct wmi_hw_data_filter_arg * arg)10514 int ath12k_wmi_hw_data_filter_cmd(struct ath12k *ar, struct wmi_hw_data_filter_arg *arg)
10515 {
10516 struct wmi_hw_data_filter_cmd *cmd;
10517 struct sk_buff *skb;
10518 int len;
10519
10520 len = sizeof(*cmd);
10521 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10522
10523 if (!skb)
10524 return -ENOMEM;
10525
10526 cmd = (struct wmi_hw_data_filter_cmd *)skb->data;
10527 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HW_DATA_FILTER_CMD,
10528 sizeof(*cmd));
10529 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
10530 cmd->enable = cpu_to_le32(arg->enable ? 1 : 0);
10531
10532 /* Set all modes in case of disable */
10533 if (arg->enable)
10534 cmd->hw_filter_bitmap = cpu_to_le32(arg->hw_filter_bitmap);
10535 else
10536 cmd->hw_filter_bitmap = cpu_to_le32((u32)~0U);
10537
10538 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
10539 "wmi hw data filter enable %d filter_bitmap 0x%x\n",
10540 arg->enable, arg->hw_filter_bitmap);
10541
10542 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_HW_DATA_FILTER_CMDID);
10543 }
10544
ath12k_wmi_wow_host_wakeup_ind(struct ath12k * ar)10545 int ath12k_wmi_wow_host_wakeup_ind(struct ath12k *ar)
10546 {
10547 struct wmi_wow_host_wakeup_cmd *cmd;
10548 struct sk_buff *skb;
10549 size_t len;
10550
10551 len = sizeof(*cmd);
10552 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10553 if (!skb)
10554 return -ENOMEM;
10555
10556 cmd = (struct wmi_wow_host_wakeup_cmd *)skb->data;
10557 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD,
10558 sizeof(*cmd));
10559
10560 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow host wakeup ind\n");
10561
10562 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID);
10563 }
10564
ath12k_wmi_wow_enable(struct ath12k * ar)10565 int ath12k_wmi_wow_enable(struct ath12k *ar)
10566 {
10567 struct wmi_wow_enable_cmd *cmd;
10568 struct sk_buff *skb;
10569 int len;
10570
10571 len = sizeof(*cmd);
10572 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10573 if (!skb)
10574 return -ENOMEM;
10575
10576 cmd = (struct wmi_wow_enable_cmd *)skb->data;
10577 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ENABLE_CMD,
10578 sizeof(*cmd));
10579
10580 cmd->enable = cpu_to_le32(1);
10581 cmd->pause_iface_config = cpu_to_le32(WOW_IFACE_PAUSE_ENABLED);
10582 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow enable\n");
10583
10584 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ENABLE_CMDID);
10585 }
10586
ath12k_wmi_wow_add_wakeup_event(struct ath12k * ar,u32 vdev_id,enum wmi_wow_wakeup_event event,u32 enable)10587 int ath12k_wmi_wow_add_wakeup_event(struct ath12k *ar, u32 vdev_id,
10588 enum wmi_wow_wakeup_event event,
10589 u32 enable)
10590 {
10591 struct wmi_wow_add_del_event_cmd *cmd;
10592 struct sk_buff *skb;
10593 size_t len;
10594
10595 len = sizeof(*cmd);
10596 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10597 if (!skb)
10598 return -ENOMEM;
10599
10600 cmd = (struct wmi_wow_add_del_event_cmd *)skb->data;
10601 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ADD_DEL_EVT_CMD,
10602 sizeof(*cmd));
10603 cmd->vdev_id = cpu_to_le32(vdev_id);
10604 cmd->is_add = cpu_to_le32(enable);
10605 cmd->event_bitmap = cpu_to_le32((1 << event));
10606
10607 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow add wakeup event %s enable %d vdev_id %d\n",
10608 wow_wakeup_event(event), enable, vdev_id);
10609
10610 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID);
10611 }
10612
ath12k_wmi_wow_add_pattern(struct ath12k * ar,u32 vdev_id,u32 pattern_id,const u8 * pattern,const u8 * mask,int pattern_len,int pattern_offset)10613 int ath12k_wmi_wow_add_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id,
10614 const u8 *pattern, const u8 *mask,
10615 int pattern_len, int pattern_offset)
10616 {
10617 struct wmi_wow_add_pattern_cmd *cmd;
10618 struct wmi_wow_bitmap_pattern_params *bitmap;
10619 struct wmi_tlv *tlv;
10620 struct sk_buff *skb;
10621 void *ptr;
10622 size_t len;
10623
10624 len = sizeof(*cmd) +
10625 sizeof(*tlv) + /* array struct */
10626 sizeof(*bitmap) + /* bitmap */
10627 sizeof(*tlv) + /* empty ipv4 sync */
10628 sizeof(*tlv) + /* empty ipv6 sync */
10629 sizeof(*tlv) + /* empty magic */
10630 sizeof(*tlv) + /* empty info timeout */
10631 sizeof(*tlv) + sizeof(u32); /* ratelimit interval */
10632
10633 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10634 if (!skb)
10635 return -ENOMEM;
10636
10637 /* cmd */
10638 ptr = skb->data;
10639 cmd = ptr;
10640 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ADD_PATTERN_CMD,
10641 sizeof(*cmd));
10642 cmd->vdev_id = cpu_to_le32(vdev_id);
10643 cmd->pattern_id = cpu_to_le32(pattern_id);
10644 cmd->pattern_type = cpu_to_le32(WOW_BITMAP_PATTERN);
10645
10646 ptr += sizeof(*cmd);
10647
10648 /* bitmap */
10649 tlv = ptr;
10650 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, sizeof(*bitmap));
10651
10652 ptr += sizeof(*tlv);
10653
10654 bitmap = ptr;
10655 bitmap->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_BITMAP_PATTERN_T,
10656 sizeof(*bitmap));
10657 memcpy(bitmap->patternbuf, pattern, pattern_len);
10658 memcpy(bitmap->bitmaskbuf, mask, pattern_len);
10659 bitmap->pattern_offset = cpu_to_le32(pattern_offset);
10660 bitmap->pattern_len = cpu_to_le32(pattern_len);
10661 bitmap->bitmask_len = cpu_to_le32(pattern_len);
10662 bitmap->pattern_id = cpu_to_le32(pattern_id);
10663
10664 ptr += sizeof(*bitmap);
10665
10666 /* ipv4 sync */
10667 tlv = ptr;
10668 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
10669
10670 ptr += sizeof(*tlv);
10671
10672 /* ipv6 sync */
10673 tlv = ptr;
10674 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
10675
10676 ptr += sizeof(*tlv);
10677
10678 /* magic */
10679 tlv = ptr;
10680 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
10681
10682 ptr += sizeof(*tlv);
10683
10684 /* pattern info timeout */
10685 tlv = ptr;
10686 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
10687
10688 ptr += sizeof(*tlv);
10689
10690 /* ratelimit interval */
10691 tlv = ptr;
10692 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, sizeof(u32));
10693
10694 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow add pattern vdev_id %d pattern_id %d pattern_offset %d pattern_len %d\n",
10695 vdev_id, pattern_id, pattern_offset, pattern_len);
10696
10697 ath12k_dbg_dump(ar->ab, ATH12K_DBG_WMI, NULL, "wow pattern: ",
10698 bitmap->patternbuf, pattern_len);
10699 ath12k_dbg_dump(ar->ab, ATH12K_DBG_WMI, NULL, "wow bitmask: ",
10700 bitmap->bitmaskbuf, pattern_len);
10701
10702 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ADD_WAKE_PATTERN_CMDID);
10703 }
10704
ath12k_wmi_wow_del_pattern(struct ath12k * ar,u32 vdev_id,u32 pattern_id)10705 int ath12k_wmi_wow_del_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id)
10706 {
10707 struct wmi_wow_del_pattern_cmd *cmd;
10708 struct sk_buff *skb;
10709 size_t len;
10710
10711 len = sizeof(*cmd);
10712 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10713 if (!skb)
10714 return -ENOMEM;
10715
10716 cmd = (struct wmi_wow_del_pattern_cmd *)skb->data;
10717 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_DEL_PATTERN_CMD,
10718 sizeof(*cmd));
10719 cmd->vdev_id = cpu_to_le32(vdev_id);
10720 cmd->pattern_id = cpu_to_le32(pattern_id);
10721 cmd->pattern_type = cpu_to_le32(WOW_BITMAP_PATTERN);
10722
10723 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow del pattern vdev_id %d pattern_id %d\n",
10724 vdev_id, pattern_id);
10725
10726 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_DEL_WAKE_PATTERN_CMDID);
10727 }
10728
10729 static struct sk_buff *
ath12k_wmi_op_gen_config_pno_start(struct ath12k * ar,u32 vdev_id,struct wmi_pno_scan_req_arg * pno)10730 ath12k_wmi_op_gen_config_pno_start(struct ath12k *ar, u32 vdev_id,
10731 struct wmi_pno_scan_req_arg *pno)
10732 {
10733 struct nlo_configured_params *nlo_list;
10734 size_t len, nlo_list_len, channel_list_len;
10735 struct wmi_wow_nlo_config_cmd *cmd;
10736 __le32 *channel_list;
10737 struct wmi_tlv *tlv;
10738 struct sk_buff *skb;
10739 void *ptr;
10740 u32 i;
10741
10742 len = sizeof(*cmd) +
10743 sizeof(*tlv) +
10744 /* TLV place holder for array of structures
10745 * nlo_configured_params(nlo_list)
10746 */
10747 sizeof(*tlv);
10748 /* TLV place holder for array of uint32 channel_list */
10749
10750 channel_list_len = sizeof(u32) * pno->a_networks[0].channel_count;
10751 len += channel_list_len;
10752
10753 nlo_list_len = sizeof(*nlo_list) * pno->uc_networks_count;
10754 len += nlo_list_len;
10755
10756 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10757 if (!skb)
10758 return ERR_PTR(-ENOMEM);
10759
10760 ptr = skb->data;
10761 cmd = ptr;
10762 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NLO_CONFIG_CMD, sizeof(*cmd));
10763
10764 cmd->vdev_id = cpu_to_le32(pno->vdev_id);
10765 cmd->flags = cpu_to_le32(WMI_NLO_CONFIG_START | WMI_NLO_CONFIG_SSID_HIDE_EN);
10766
10767 /* current FW does not support min-max range for dwell time */
10768 cmd->active_dwell_time = cpu_to_le32(pno->active_max_time);
10769 cmd->passive_dwell_time = cpu_to_le32(pno->passive_max_time);
10770
10771 if (pno->do_passive_scan)
10772 cmd->flags |= cpu_to_le32(WMI_NLO_CONFIG_SCAN_PASSIVE);
10773
10774 cmd->fast_scan_period = cpu_to_le32(pno->fast_scan_period);
10775 cmd->slow_scan_period = cpu_to_le32(pno->slow_scan_period);
10776 cmd->fast_scan_max_cycles = cpu_to_le32(pno->fast_scan_max_cycles);
10777 cmd->delay_start_time = cpu_to_le32(pno->delay_start_time);
10778
10779 if (pno->enable_pno_scan_randomization) {
10780 cmd->flags |= cpu_to_le32(WMI_NLO_CONFIG_SPOOFED_MAC_IN_PROBE_REQ |
10781 WMI_NLO_CONFIG_RANDOM_SEQ_NO_IN_PROBE_REQ);
10782 ether_addr_copy(cmd->mac_addr.addr, pno->mac_addr);
10783 ether_addr_copy(cmd->mac_mask.addr, pno->mac_addr_mask);
10784 }
10785
10786 ptr += sizeof(*cmd);
10787
10788 /* nlo_configured_params(nlo_list) */
10789 cmd->no_of_ssids = cpu_to_le32(pno->uc_networks_count);
10790 tlv = ptr;
10791 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, nlo_list_len);
10792
10793 ptr += sizeof(*tlv);
10794 nlo_list = ptr;
10795 for (i = 0; i < pno->uc_networks_count; i++) {
10796 tlv = (struct wmi_tlv *)(&nlo_list[i].tlv_header);
10797 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_BYTE,
10798 sizeof(*nlo_list));
10799
10800 nlo_list[i].ssid.valid = cpu_to_le32(1);
10801 nlo_list[i].ssid.ssid.ssid_len =
10802 cpu_to_le32(pno->a_networks[i].ssid.ssid_len);
10803 memcpy(nlo_list[i].ssid.ssid.ssid,
10804 pno->a_networks[i].ssid.ssid,
10805 le32_to_cpu(nlo_list[i].ssid.ssid.ssid_len));
10806
10807 if (pno->a_networks[i].rssi_threshold &&
10808 pno->a_networks[i].rssi_threshold > -300) {
10809 nlo_list[i].rssi_cond.valid = cpu_to_le32(1);
10810 nlo_list[i].rssi_cond.rssi =
10811 cpu_to_le32(pno->a_networks[i].rssi_threshold);
10812 }
10813
10814 nlo_list[i].bcast_nw_type.valid = cpu_to_le32(1);
10815 nlo_list[i].bcast_nw_type.bcast_nw_type =
10816 cpu_to_le32(pno->a_networks[i].bcast_nw_type);
10817 }
10818
10819 ptr += nlo_list_len;
10820 cmd->num_of_channels = cpu_to_le32(pno->a_networks[0].channel_count);
10821 tlv = ptr;
10822 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, channel_list_len);
10823 ptr += sizeof(*tlv);
10824 channel_list = ptr;
10825
10826 for (i = 0; i < pno->a_networks[0].channel_count; i++)
10827 channel_list[i] = cpu_to_le32(pno->a_networks[0].channels[i]);
10828
10829 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv start pno config vdev_id %d\n",
10830 vdev_id);
10831
10832 return skb;
10833 }
10834
ath12k_wmi_op_gen_config_pno_stop(struct ath12k * ar,u32 vdev_id)10835 static struct sk_buff *ath12k_wmi_op_gen_config_pno_stop(struct ath12k *ar,
10836 u32 vdev_id)
10837 {
10838 struct wmi_wow_nlo_config_cmd *cmd;
10839 struct sk_buff *skb;
10840 size_t len;
10841
10842 len = sizeof(*cmd);
10843 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10844 if (!skb)
10845 return ERR_PTR(-ENOMEM);
10846
10847 cmd = (struct wmi_wow_nlo_config_cmd *)skb->data;
10848 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NLO_CONFIG_CMD, len);
10849
10850 cmd->vdev_id = cpu_to_le32(vdev_id);
10851 cmd->flags = cpu_to_le32(WMI_NLO_CONFIG_STOP);
10852
10853 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
10854 "wmi tlv stop pno config vdev_id %d\n", vdev_id);
10855 return skb;
10856 }
10857
ath12k_wmi_wow_config_pno(struct ath12k * ar,u32 vdev_id,struct wmi_pno_scan_req_arg * pno_scan)10858 int ath12k_wmi_wow_config_pno(struct ath12k *ar, u32 vdev_id,
10859 struct wmi_pno_scan_req_arg *pno_scan)
10860 {
10861 struct sk_buff *skb;
10862
10863 if (pno_scan->enable)
10864 skb = ath12k_wmi_op_gen_config_pno_start(ar, vdev_id, pno_scan);
10865 else
10866 skb = ath12k_wmi_op_gen_config_pno_stop(ar, vdev_id);
10867
10868 if (IS_ERR_OR_NULL(skb))
10869 return -ENOMEM;
10870
10871 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID);
10872 }
10873
ath12k_wmi_fill_ns_offload(struct ath12k * ar,struct wmi_arp_ns_offload_arg * offload,void ** ptr,bool enable,bool ext)10874 static void ath12k_wmi_fill_ns_offload(struct ath12k *ar,
10875 struct wmi_arp_ns_offload_arg *offload,
10876 void **ptr,
10877 bool enable,
10878 bool ext)
10879 {
10880 struct wmi_ns_offload_params *ns;
10881 struct wmi_tlv *tlv;
10882 void *buf_ptr = *ptr;
10883 u32 ns_cnt, ns_ext_tuples;
10884 int i, max_offloads;
10885
10886 ns_cnt = offload->ipv6_count;
10887
10888 tlv = buf_ptr;
10889
10890 if (ext) {
10891 ns_ext_tuples = offload->ipv6_count - WMI_MAX_NS_OFFLOADS;
10892 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
10893 ns_ext_tuples * sizeof(*ns));
10894 i = WMI_MAX_NS_OFFLOADS;
10895 max_offloads = offload->ipv6_count;
10896 } else {
10897 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
10898 WMI_MAX_NS_OFFLOADS * sizeof(*ns));
10899 i = 0;
10900 max_offloads = WMI_MAX_NS_OFFLOADS;
10901 }
10902
10903 buf_ptr += sizeof(*tlv);
10904
10905 for (; i < max_offloads; i++) {
10906 ns = buf_ptr;
10907 ns->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NS_OFFLOAD_TUPLE,
10908 sizeof(*ns));
10909
10910 if (enable) {
10911 if (i < ns_cnt)
10912 ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_VALID);
10913
10914 memcpy(ns->target_ipaddr[0], offload->ipv6_addr[i], 16);
10915 memcpy(ns->solicitation_ipaddr, offload->self_ipv6_addr[i], 16);
10916
10917 if (offload->ipv6_type[i])
10918 ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_IS_IPV6_ANYCAST);
10919
10920 memcpy(ns->target_mac.addr, offload->mac_addr, ETH_ALEN);
10921
10922 if (!is_zero_ether_addr(ns->target_mac.addr))
10923 ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_MAC_VALID);
10924
10925 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
10926 "wmi index %d ns_solicited %pI6 target %pI6",
10927 i, ns->solicitation_ipaddr,
10928 ns->target_ipaddr[0]);
10929 }
10930
10931 buf_ptr += sizeof(*ns);
10932 }
10933
10934 *ptr = buf_ptr;
10935 }
10936
ath12k_wmi_fill_arp_offload(struct ath12k * ar,struct wmi_arp_ns_offload_arg * offload,void ** ptr,bool enable)10937 static void ath12k_wmi_fill_arp_offload(struct ath12k *ar,
10938 struct wmi_arp_ns_offload_arg *offload,
10939 void **ptr,
10940 bool enable)
10941 {
10942 struct wmi_arp_offload_params *arp;
10943 struct wmi_tlv *tlv;
10944 void *buf_ptr = *ptr;
10945 int i;
10946
10947 /* fill arp tuple */
10948 tlv = buf_ptr;
10949 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
10950 WMI_MAX_ARP_OFFLOADS * sizeof(*arp));
10951 buf_ptr += sizeof(*tlv);
10952
10953 for (i = 0; i < WMI_MAX_ARP_OFFLOADS; i++) {
10954 arp = buf_ptr;
10955 arp->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARP_OFFLOAD_TUPLE,
10956 sizeof(*arp));
10957
10958 if (enable && i < offload->ipv4_count) {
10959 /* Copy the target ip addr and flags */
10960 arp->flags = cpu_to_le32(WMI_ARPOL_FLAGS_VALID);
10961 memcpy(arp->target_ipaddr, offload->ipv4_addr[i], 4);
10962
10963 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi arp offload address %pI4",
10964 arp->target_ipaddr);
10965 }
10966
10967 buf_ptr += sizeof(*arp);
10968 }
10969
10970 *ptr = buf_ptr;
10971 }
10972
ath12k_wmi_arp_ns_offload(struct ath12k * ar,struct ath12k_link_vif * arvif,struct wmi_arp_ns_offload_arg * offload,bool enable)10973 int ath12k_wmi_arp_ns_offload(struct ath12k *ar,
10974 struct ath12k_link_vif *arvif,
10975 struct wmi_arp_ns_offload_arg *offload,
10976 bool enable)
10977 {
10978 struct wmi_set_arp_ns_offload_cmd *cmd;
10979 struct wmi_tlv *tlv;
10980 struct sk_buff *skb;
10981 void *buf_ptr;
10982 size_t len;
10983 u8 ns_cnt, ns_ext_tuples = 0;
10984
10985 ns_cnt = offload->ipv6_count;
10986
10987 len = sizeof(*cmd) +
10988 sizeof(*tlv) +
10989 WMI_MAX_NS_OFFLOADS * sizeof(struct wmi_ns_offload_params) +
10990 sizeof(*tlv) +
10991 WMI_MAX_ARP_OFFLOADS * sizeof(struct wmi_arp_offload_params);
10992
10993 if (ns_cnt > WMI_MAX_NS_OFFLOADS) {
10994 ns_ext_tuples = ns_cnt - WMI_MAX_NS_OFFLOADS;
10995 len += sizeof(*tlv) +
10996 ns_ext_tuples * sizeof(struct wmi_ns_offload_params);
10997 }
10998
10999 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
11000 if (!skb)
11001 return -ENOMEM;
11002
11003 buf_ptr = skb->data;
11004 cmd = buf_ptr;
11005 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_ARP_NS_OFFLOAD_CMD,
11006 sizeof(*cmd));
11007 cmd->flags = cpu_to_le32(0);
11008 cmd->vdev_id = cpu_to_le32(arvif->vdev_id);
11009 cmd->num_ns_ext_tuples = cpu_to_le32(ns_ext_tuples);
11010
11011 buf_ptr += sizeof(*cmd);
11012
11013 ath12k_wmi_fill_ns_offload(ar, offload, &buf_ptr, enable, 0);
11014 ath12k_wmi_fill_arp_offload(ar, offload, &buf_ptr, enable);
11015
11016 if (ns_ext_tuples)
11017 ath12k_wmi_fill_ns_offload(ar, offload, &buf_ptr, enable, 1);
11018
11019 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_SET_ARP_NS_OFFLOAD_CMDID);
11020 }
11021
ath12k_wmi_gtk_rekey_offload(struct ath12k * ar,struct ath12k_link_vif * arvif,bool enable)11022 int ath12k_wmi_gtk_rekey_offload(struct ath12k *ar,
11023 struct ath12k_link_vif *arvif, bool enable)
11024 {
11025 struct ath12k_rekey_data *rekey_data = &arvif->rekey_data;
11026 struct wmi_gtk_rekey_offload_cmd *cmd;
11027 struct sk_buff *skb;
11028 __le64 replay_ctr;
11029 int len;
11030
11031 len = sizeof(*cmd);
11032 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
11033 if (!skb)
11034 return -ENOMEM;
11035
11036 cmd = (struct wmi_gtk_rekey_offload_cmd *)skb->data;
11037 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_GTK_OFFLOAD_CMD, sizeof(*cmd));
11038 cmd->vdev_id = cpu_to_le32(arvif->vdev_id);
11039
11040 if (enable) {
11041 cmd->flags = cpu_to_le32(GTK_OFFLOAD_ENABLE_OPCODE);
11042
11043 /* the length in rekey_data and cmd is equal */
11044 memcpy(cmd->kck, rekey_data->kck, sizeof(cmd->kck));
11045 memcpy(cmd->kek, rekey_data->kek, sizeof(cmd->kek));
11046
11047 replay_ctr = cpu_to_le64(rekey_data->replay_ctr);
11048 memcpy(cmd->replay_ctr, &replay_ctr,
11049 sizeof(replay_ctr));
11050 } else {
11051 cmd->flags = cpu_to_le32(GTK_OFFLOAD_DISABLE_OPCODE);
11052 }
11053
11054 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "offload gtk rekey vdev: %d %d\n",
11055 arvif->vdev_id, enable);
11056 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_GTK_OFFLOAD_CMDID);
11057 }
11058
ath12k_wmi_gtk_rekey_getinfo(struct ath12k * ar,struct ath12k_link_vif * arvif)11059 int ath12k_wmi_gtk_rekey_getinfo(struct ath12k *ar,
11060 struct ath12k_link_vif *arvif)
11061 {
11062 struct wmi_gtk_rekey_offload_cmd *cmd;
11063 struct sk_buff *skb;
11064 int len;
11065
11066 len = sizeof(*cmd);
11067 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
11068 if (!skb)
11069 return -ENOMEM;
11070
11071 cmd = (struct wmi_gtk_rekey_offload_cmd *)skb->data;
11072 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_GTK_OFFLOAD_CMD, sizeof(*cmd));
11073 cmd->vdev_id = cpu_to_le32(arvif->vdev_id);
11074 cmd->flags = cpu_to_le32(GTK_OFFLOAD_REQUEST_STATUS_OPCODE);
11075
11076 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "get gtk rekey vdev_id: %d\n",
11077 arvif->vdev_id);
11078 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_GTK_OFFLOAD_CMDID);
11079 }
11080
ath12k_wmi_sta_keepalive(struct ath12k * ar,const struct wmi_sta_keepalive_arg * arg)11081 int ath12k_wmi_sta_keepalive(struct ath12k *ar,
11082 const struct wmi_sta_keepalive_arg *arg)
11083 {
11084 struct wmi_sta_keepalive_arp_resp_params *arp;
11085 struct ath12k_wmi_pdev *wmi = ar->wmi;
11086 struct wmi_sta_keepalive_cmd *cmd;
11087 struct sk_buff *skb;
11088 size_t len;
11089
11090 len = sizeof(*cmd) + sizeof(*arp);
11091 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
11092 if (!skb)
11093 return -ENOMEM;
11094
11095 cmd = (struct wmi_sta_keepalive_cmd *)skb->data;
11096 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_KEEPALIVE_CMD, sizeof(*cmd));
11097 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
11098 cmd->enabled = cpu_to_le32(arg->enabled);
11099 cmd->interval = cpu_to_le32(arg->interval);
11100 cmd->method = cpu_to_le32(arg->method);
11101
11102 arp = (struct wmi_sta_keepalive_arp_resp_params *)(cmd + 1);
11103 arp->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_KEEPALVE_ARP_RESPONSE,
11104 sizeof(*arp));
11105 if (arg->method == WMI_STA_KEEPALIVE_METHOD_UNSOLICITED_ARP_RESPONSE ||
11106 arg->method == WMI_STA_KEEPALIVE_METHOD_GRATUITOUS_ARP_REQUEST) {
11107 arp->src_ip4_addr = cpu_to_le32(arg->src_ip4_addr);
11108 arp->dest_ip4_addr = cpu_to_le32(arg->dest_ip4_addr);
11109 ether_addr_copy(arp->dest_mac_addr.addr, arg->dest_mac_addr);
11110 }
11111
11112 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
11113 "wmi sta keepalive vdev %d enabled %d method %d interval %d\n",
11114 arg->vdev_id, arg->enabled, arg->method, arg->interval);
11115
11116 return ath12k_wmi_cmd_send(wmi, skb, WMI_STA_KEEPALIVE_CMDID);
11117 }
11118
ath12k_wmi_mlo_setup(struct ath12k * ar,struct wmi_mlo_setup_arg * mlo_params)11119 int ath12k_wmi_mlo_setup(struct ath12k *ar, struct wmi_mlo_setup_arg *mlo_params)
11120 {
11121 struct wmi_mlo_setup_cmd *cmd;
11122 struct ath12k_wmi_pdev *wmi = ar->wmi;
11123 u32 *partner_links, num_links;
11124 int i, ret, buf_len, arg_len;
11125 struct sk_buff *skb;
11126 struct wmi_tlv *tlv;
11127 void *ptr;
11128
11129 num_links = mlo_params->num_partner_links;
11130 arg_len = num_links * sizeof(u32);
11131 buf_len = sizeof(*cmd) + TLV_HDR_SIZE + arg_len;
11132
11133 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len);
11134 if (!skb)
11135 return -ENOMEM;
11136
11137 cmd = (struct wmi_mlo_setup_cmd *)skb->data;
11138 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_SETUP_CMD,
11139 sizeof(*cmd));
11140 cmd->mld_group_id = mlo_params->group_id;
11141 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
11142 ptr = skb->data + sizeof(*cmd);
11143
11144 tlv = ptr;
11145 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len);
11146 ptr += TLV_HDR_SIZE;
11147
11148 partner_links = ptr;
11149 for (i = 0; i < num_links; i++)
11150 partner_links[i] = mlo_params->partner_link_id[i];
11151
11152 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_SETUP_CMDID);
11153 if (ret) {
11154 ath12k_warn(ar->ab, "failed to submit WMI_MLO_SETUP_CMDID command: %d\n",
11155 ret);
11156 dev_kfree_skb(skb);
11157 return ret;
11158 }
11159
11160 return 0;
11161 }
11162
ath12k_wmi_mlo_ready(struct ath12k * ar)11163 int ath12k_wmi_mlo_ready(struct ath12k *ar)
11164 {
11165 struct wmi_mlo_ready_cmd *cmd;
11166 struct ath12k_wmi_pdev *wmi = ar->wmi;
11167 struct sk_buff *skb;
11168 int ret, len;
11169
11170 len = sizeof(*cmd);
11171 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
11172 if (!skb)
11173 return -ENOMEM;
11174
11175 cmd = (struct wmi_mlo_ready_cmd *)skb->data;
11176 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_READY_CMD,
11177 sizeof(*cmd));
11178 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
11179
11180 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_READY_CMDID);
11181 if (ret) {
11182 ath12k_warn(ar->ab, "failed to submit WMI_MLO_READY_CMDID command: %d\n",
11183 ret);
11184 dev_kfree_skb(skb);
11185 return ret;
11186 }
11187
11188 return 0;
11189 }
11190
ath12k_wmi_mlo_teardown(struct ath12k * ar)11191 int ath12k_wmi_mlo_teardown(struct ath12k *ar)
11192 {
11193 struct wmi_mlo_teardown_cmd *cmd;
11194 struct ath12k_wmi_pdev *wmi = ar->wmi;
11195 struct sk_buff *skb;
11196 int ret, len;
11197
11198 len = sizeof(*cmd);
11199 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
11200 if (!skb)
11201 return -ENOMEM;
11202
11203 cmd = (struct wmi_mlo_teardown_cmd *)skb->data;
11204 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_TEARDOWN_CMD,
11205 sizeof(*cmd));
11206 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
11207 cmd->reason_code = WMI_MLO_TEARDOWN_SSR_REASON;
11208
11209 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_TEARDOWN_CMDID);
11210 if (ret) {
11211 ath12k_warn(ar->ab, "failed to submit WMI MLO teardown command: %d\n",
11212 ret);
11213 dev_kfree_skb(skb);
11214 return ret;
11215 }
11216
11217 return 0;
11218 }
11219
ath12k_wmi_supports_6ghz_cc_ext(struct ath12k * ar)11220 bool ath12k_wmi_supports_6ghz_cc_ext(struct ath12k *ar)
11221 {
11222 return test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT,
11223 ar->ab->wmi_ab.svc_map) && ar->supports_6ghz;
11224 }
11225
ath12k_wmi_send_vdev_set_tpc_power(struct ath12k * ar,u32 vdev_id,struct ath12k_reg_tpc_power_info * param)11226 int ath12k_wmi_send_vdev_set_tpc_power(struct ath12k *ar,
11227 u32 vdev_id,
11228 struct ath12k_reg_tpc_power_info *param)
11229 {
11230 struct wmi_vdev_set_tpc_power_cmd *cmd;
11231 struct ath12k_wmi_pdev *wmi = ar->wmi;
11232 struct wmi_vdev_ch_power_params *ch;
11233 int i, ret, len, array_len;
11234 struct sk_buff *skb;
11235 struct wmi_tlv *tlv;
11236 u8 *ptr;
11237
11238 array_len = sizeof(*ch) * param->num_pwr_levels;
11239 len = sizeof(*cmd) + TLV_HDR_SIZE + array_len;
11240
11241 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
11242 if (!skb)
11243 return -ENOMEM;
11244
11245 ptr = skb->data;
11246
11247 cmd = (struct wmi_vdev_set_tpc_power_cmd *)ptr;
11248 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_TPC_POWER_CMD,
11249 sizeof(*cmd));
11250 cmd->vdev_id = cpu_to_le32(vdev_id);
11251 cmd->psd_power = cpu_to_le32(param->is_psd_power);
11252 cmd->eirp_power = cpu_to_le32(param->eirp_power);
11253 cmd->power_type_6ghz = cpu_to_le32(param->ap_power_type);
11254
11255 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
11256 "tpc vdev id %d is psd power %d eirp power %d 6 ghz power type %d\n",
11257 vdev_id, param->is_psd_power, param->eirp_power, param->ap_power_type);
11258
11259 ptr += sizeof(*cmd);
11260 tlv = (struct wmi_tlv *)ptr;
11261 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, array_len);
11262
11263 ptr += TLV_HDR_SIZE;
11264 ch = (struct wmi_vdev_ch_power_params *)ptr;
11265
11266 for (i = 0; i < param->num_pwr_levels; i++, ch++) {
11267 ch->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CH_POWER_INFO,
11268 sizeof(*ch));
11269 ch->chan_cfreq = cpu_to_le32(param->chan_power_info[i].chan_cfreq);
11270 ch->tx_power = cpu_to_le32(param->chan_power_info[i].tx_power);
11271
11272 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "tpc chan freq %d TX power %d\n",
11273 ch->chan_cfreq, ch->tx_power);
11274 }
11275
11276 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_TPC_POWER_CMDID);
11277 if (ret) {
11278 ath12k_warn(ar->ab, "failed to send WMI_VDEV_SET_TPC_POWER_CMDID\n");
11279 dev_kfree_skb(skb);
11280 return ret;
11281 }
11282
11283 return 0;
11284 }
11285
11286 static int
ath12k_wmi_fill_disallowed_bmap(struct ath12k_base * ab,struct wmi_disallowed_mlo_mode_bitmap_params * dislw_bmap,struct wmi_mlo_link_set_active_arg * arg)11287 ath12k_wmi_fill_disallowed_bmap(struct ath12k_base *ab,
11288 struct wmi_disallowed_mlo_mode_bitmap_params *dislw_bmap,
11289 struct wmi_mlo_link_set_active_arg *arg)
11290 {
11291 struct wmi_ml_disallow_mode_bmap_arg *dislw_bmap_arg;
11292 u8 i;
11293
11294 if (arg->num_disallow_mode_comb >
11295 ARRAY_SIZE(arg->disallow_bmap)) {
11296 ath12k_warn(ab, "invalid num_disallow_mode_comb: %d",
11297 arg->num_disallow_mode_comb);
11298 return -EINVAL;
11299 }
11300
11301 dislw_bmap_arg = &arg->disallow_bmap[0];
11302 for (i = 0; i < arg->num_disallow_mode_comb; i++) {
11303 dislw_bmap->tlv_header =
11304 ath12k_wmi_tlv_cmd_hdr(0, sizeof(*dislw_bmap));
11305 dislw_bmap->disallowed_mode_bitmap =
11306 cpu_to_le32(dislw_bmap_arg->disallowed_mode);
11307 dislw_bmap->ieee_link_id_comb =
11308 le32_encode_bits(dislw_bmap_arg->ieee_link_id[0],
11309 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_1) |
11310 le32_encode_bits(dislw_bmap_arg->ieee_link_id[1],
11311 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_2) |
11312 le32_encode_bits(dislw_bmap_arg->ieee_link_id[2],
11313 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_3) |
11314 le32_encode_bits(dislw_bmap_arg->ieee_link_id[3],
11315 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_4);
11316
11317 ath12k_dbg(ab, ATH12K_DBG_WMI,
11318 "entry %d disallowed_mode %d ieee_link_id_comb 0x%x",
11319 i, dislw_bmap_arg->disallowed_mode,
11320 dislw_bmap_arg->ieee_link_id_comb);
11321 dislw_bmap++;
11322 dislw_bmap_arg++;
11323 }
11324
11325 return 0;
11326 }
11327
ath12k_wmi_send_mlo_link_set_active_cmd(struct ath12k_base * ab,struct wmi_mlo_link_set_active_arg * arg)11328 int ath12k_wmi_send_mlo_link_set_active_cmd(struct ath12k_base *ab,
11329 struct wmi_mlo_link_set_active_arg *arg)
11330 {
11331 struct wmi_disallowed_mlo_mode_bitmap_params *disallowed_mode_bmap;
11332 struct wmi_mlo_set_active_link_number_params *link_num_param;
11333 u32 num_link_num_param = 0, num_vdev_bitmap = 0;
11334 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
11335 struct wmi_mlo_link_set_active_cmd *cmd;
11336 u32 num_inactive_vdev_bitmap = 0;
11337 u32 num_disallow_mode_comb = 0;
11338 struct wmi_tlv *tlv;
11339 struct sk_buff *skb;
11340 __le32 *vdev_bitmap;
11341 void *buf_ptr;
11342 int i, ret;
11343 u32 len;
11344
11345 if (!arg->num_vdev_bitmap && !arg->num_link_entry) {
11346 ath12k_warn(ab, "Invalid num_vdev_bitmap and num_link_entry");
11347 return -EINVAL;
11348 }
11349
11350 switch (arg->force_mode) {
11351 case WMI_MLO_LINK_FORCE_MODE_ACTIVE_LINK_NUM:
11352 case WMI_MLO_LINK_FORCE_MODE_INACTIVE_LINK_NUM:
11353 num_link_num_param = arg->num_link_entry;
11354 fallthrough;
11355 case WMI_MLO_LINK_FORCE_MODE_ACTIVE:
11356 case WMI_MLO_LINK_FORCE_MODE_INACTIVE:
11357 case WMI_MLO_LINK_FORCE_MODE_NO_FORCE:
11358 num_vdev_bitmap = arg->num_vdev_bitmap;
11359 break;
11360 case WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE:
11361 num_vdev_bitmap = arg->num_vdev_bitmap;
11362 num_inactive_vdev_bitmap = arg->num_inactive_vdev_bitmap;
11363 break;
11364 default:
11365 ath12k_warn(ab, "Invalid force mode: %u", arg->force_mode);
11366 return -EINVAL;
11367 }
11368
11369 num_disallow_mode_comb = arg->num_disallow_mode_comb;
11370 len = sizeof(*cmd) +
11371 TLV_HDR_SIZE + sizeof(*link_num_param) * num_link_num_param +
11372 TLV_HDR_SIZE + sizeof(*vdev_bitmap) * num_vdev_bitmap +
11373 TLV_HDR_SIZE + TLV_HDR_SIZE + TLV_HDR_SIZE +
11374 TLV_HDR_SIZE + sizeof(*disallowed_mode_bmap) * num_disallow_mode_comb;
11375 if (arg->force_mode == WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE)
11376 len += sizeof(*vdev_bitmap) * num_inactive_vdev_bitmap;
11377
11378 skb = ath12k_wmi_alloc_skb(wmi_ab, len);
11379 if (!skb)
11380 return -ENOMEM;
11381
11382 cmd = (struct wmi_mlo_link_set_active_cmd *)skb->data;
11383 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_LINK_SET_ACTIVE_CMD,
11384 sizeof(*cmd));
11385 cmd->force_mode = cpu_to_le32(arg->force_mode);
11386 cmd->reason = cpu_to_le32(arg->reason);
11387 ath12k_dbg(ab, ATH12K_DBG_WMI,
11388 "mode %d reason %d num_link_num_param %d num_vdev_bitmap %d inactive %d num_disallow_mode_comb %d",
11389 arg->force_mode, arg->reason, num_link_num_param,
11390 num_vdev_bitmap, num_inactive_vdev_bitmap,
11391 num_disallow_mode_comb);
11392
11393 buf_ptr = skb->data + sizeof(*cmd);
11394 tlv = buf_ptr;
11395 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
11396 sizeof(*link_num_param) * num_link_num_param);
11397 buf_ptr += TLV_HDR_SIZE;
11398
11399 if (num_link_num_param) {
11400 cmd->ctrl_flags =
11401 le32_encode_bits(arg->ctrl_flags.dync_force_link_num ? 1 : 0,
11402 CRTL_F_DYNC_FORCE_LINK_NUM);
11403
11404 link_num_param = buf_ptr;
11405 for (i = 0; i < num_link_num_param; i++) {
11406 link_num_param->tlv_header =
11407 ath12k_wmi_tlv_cmd_hdr(0, sizeof(*link_num_param));
11408 link_num_param->num_of_link =
11409 cpu_to_le32(arg->link_num[i].num_of_link);
11410 link_num_param->vdev_type =
11411 cpu_to_le32(arg->link_num[i].vdev_type);
11412 link_num_param->vdev_subtype =
11413 cpu_to_le32(arg->link_num[i].vdev_subtype);
11414 link_num_param->home_freq =
11415 cpu_to_le32(arg->link_num[i].home_freq);
11416 ath12k_dbg(ab, ATH12K_DBG_WMI,
11417 "entry %d num_of_link %d vdev type %d subtype %d freq %d control_flags %d",
11418 i, arg->link_num[i].num_of_link,
11419 arg->link_num[i].vdev_type,
11420 arg->link_num[i].vdev_subtype,
11421 arg->link_num[i].home_freq,
11422 __le32_to_cpu(cmd->ctrl_flags));
11423 link_num_param++;
11424 }
11425
11426 buf_ptr += sizeof(*link_num_param) * num_link_num_param;
11427 }
11428
11429 tlv = buf_ptr;
11430 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32,
11431 sizeof(*vdev_bitmap) * num_vdev_bitmap);
11432 buf_ptr += TLV_HDR_SIZE;
11433
11434 if (num_vdev_bitmap) {
11435 vdev_bitmap = buf_ptr;
11436 for (i = 0; i < num_vdev_bitmap; i++) {
11437 vdev_bitmap[i] = cpu_to_le32(arg->vdev_bitmap[i]);
11438 ath12k_dbg(ab, ATH12K_DBG_WMI, "entry %d vdev_id_bitmap 0x%x",
11439 i, arg->vdev_bitmap[i]);
11440 }
11441
11442 buf_ptr += sizeof(*vdev_bitmap) * num_vdev_bitmap;
11443 }
11444
11445 if (arg->force_mode == WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE) {
11446 tlv = buf_ptr;
11447 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32,
11448 sizeof(*vdev_bitmap) *
11449 num_inactive_vdev_bitmap);
11450 buf_ptr += TLV_HDR_SIZE;
11451
11452 if (num_inactive_vdev_bitmap) {
11453 vdev_bitmap = buf_ptr;
11454 for (i = 0; i < num_inactive_vdev_bitmap; i++) {
11455 vdev_bitmap[i] =
11456 cpu_to_le32(arg->inactive_vdev_bitmap[i]);
11457 ath12k_dbg(ab, ATH12K_DBG_WMI,
11458 "entry %d inactive_vdev_id_bitmap 0x%x",
11459 i, arg->inactive_vdev_bitmap[i]);
11460 }
11461
11462 buf_ptr += sizeof(*vdev_bitmap) * num_inactive_vdev_bitmap;
11463 }
11464 } else {
11465 /* add empty vdev bitmap2 tlv */
11466 tlv = buf_ptr;
11467 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
11468 buf_ptr += TLV_HDR_SIZE;
11469 }
11470
11471 /* add empty ieee_link_id_bitmap tlv */
11472 tlv = buf_ptr;
11473 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
11474 buf_ptr += TLV_HDR_SIZE;
11475
11476 /* add empty ieee_link_id_bitmap2 tlv */
11477 tlv = buf_ptr;
11478 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
11479 buf_ptr += TLV_HDR_SIZE;
11480
11481 tlv = buf_ptr;
11482 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
11483 sizeof(*disallowed_mode_bmap) *
11484 arg->num_disallow_mode_comb);
11485 buf_ptr += TLV_HDR_SIZE;
11486
11487 ret = ath12k_wmi_fill_disallowed_bmap(ab, buf_ptr, arg);
11488 if (ret)
11489 goto free_skb;
11490
11491 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_MLO_LINK_SET_ACTIVE_CMDID);
11492 if (ret) {
11493 ath12k_warn(ab,
11494 "failed to send WMI_MLO_LINK_SET_ACTIVE_CMDID: %d\n", ret);
11495 goto free_skb;
11496 }
11497
11498 ath12k_dbg(ab, ATH12K_DBG_WMI, "WMI mlo link set active cmd");
11499
11500 return ret;
11501
11502 free_skb:
11503 dev_kfree_skb(skb);
11504 return ret;
11505 }
11506