1 /*-
2 * Copyright (c) 2018-2020, Mellanox Technologies. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 */
25
26 #include "opt_rss.h"
27 #include "opt_ratelimit.h"
28
29 #include <rdma/ib_user_verbs.h>
30 #include <rdma/ib_verbs.h>
31 #include <rdma/uverbs_types.h>
32 #include <rdma/uverbs_ioctl.h>
33 #include <rdma/mlx5_user_ioctl_cmds.h>
34 #include <rdma/mlx5_user_ioctl_verbs.h>
35 #include <rdma/ib_umem.h>
36 #include <rdma/uverbs_std_types.h>
37 #include <dev/mlx5/driver.h>
38 #include <dev/mlx5/fs.h>
39 #include <dev/mlx5/mlx5_ib/mlx5_ib.h>
40
41 #include <sys/priv.h>
42
43 #include <linux/xarray.h>
44 #include <linux/rculist.h>
45 #include <linux/srcu.h>
46 #include <linux/file.h>
47 #include <linux/eventfd.h>
48 #include <linux/poll.h>
49 #include <linux/wait.h>
50
51 #define UVERBS_MODULE_NAME mlx5_ib
52 #include <rdma/uverbs_named_ioctl.h>
53
54 static void dispatch_event_fd(struct list_head *fd_list, const void *data);
55
56 enum devx_obj_flags {
57 DEVX_OBJ_FLAGS_DCT = 1 << 1,
58 DEVX_OBJ_FLAGS_CQ = 1 << 2,
59 };
60
61 struct devx_async_data {
62 struct mlx5_ib_dev *mdev;
63 struct list_head list;
64 struct devx_async_cmd_event_file *ev_file;
65 struct mlx5_async_work cb_work;
66 u16 cmd_out_len;
67 /* must be last field in this structure */
68 struct mlx5_ib_uapi_devx_async_cmd_hdr hdr;
69 };
70
71 struct devx_async_event_data {
72 struct list_head list; /* headed in ev_file->event_list */
73 struct mlx5_ib_uapi_devx_async_event_hdr hdr;
74 };
75
76 /* first level XA value data structure */
77 struct devx_event {
78 struct xarray object_ids; /* second XA level, Key = object id */
79 struct list_head unaffiliated_list;
80 };
81
82 /* second level XA value data structure */
83 struct devx_obj_event {
84 struct rcu_head rcu;
85 struct list_head obj_sub_list;
86 };
87
88 struct devx_event_subscription {
89 struct list_head file_list; /* headed in ev_file->
90 * subscribed_events_list
91 */
92 struct list_head xa_list; /* headed in devx_event->unaffiliated_list or
93 * devx_obj_event->obj_sub_list
94 */
95 struct list_head obj_list; /* headed in devx_object */
96 struct list_head event_list; /* headed in ev_file->event_list or in
97 * temp list via subscription
98 */
99
100 u8 is_cleaned:1;
101 u32 xa_key_level1;
102 u32 xa_key_level2;
103 struct rcu_head rcu;
104 u64 cookie;
105 struct devx_async_event_file *ev_file;
106 struct eventfd_ctx *eventfd;
107 };
108
109 struct devx_async_event_file {
110 struct ib_uobject uobj;
111 /* Head of events that are subscribed to this FD */
112 struct list_head subscribed_events_list;
113 spinlock_t lock;
114 wait_queue_head_t poll_wait;
115 struct list_head event_list;
116 struct mlx5_ib_dev *dev;
117 u8 omit_data:1;
118 u8 is_overflow_err:1;
119 u8 is_destroyed:1;
120 };
121
122 #define MLX5_MAX_DESTROY_INBOX_SIZE_DW MLX5_ST_SZ_DW(delete_fte_in)
123 struct devx_obj {
124 struct mlx5_ib_dev *ib_dev;
125 u64 obj_id;
126 u32 dinlen; /* destroy inbox length */
127 u32 dinbox[MLX5_MAX_DESTROY_INBOX_SIZE_DW];
128 u32 flags;
129 union {
130 struct mlx5_ib_devx_mr devx_mr;
131 struct mlx5_core_dct core_dct;
132 struct mlx5_core_cq core_cq;
133 u32 flow_counter_bulk_size;
134 };
135 struct list_head event_sub; /* holds devx_event_subscription entries */
136 };
137
138 struct devx_umem {
139 struct mlx5_core_dev *mdev;
140 struct ib_umem *umem;
141 u32 page_offset;
142 int page_shift;
143 int ncont;
144 u32 dinlen;
145 u32 dinbox[MLX5_ST_SZ_DW(general_obj_in_cmd_hdr)];
146 };
147
148 struct devx_umem_reg_cmd {
149 void *in;
150 u32 inlen;
151 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
152 };
153
154 static struct mlx5_ib_ucontext *
devx_ufile2uctx(const struct uverbs_attr_bundle * attrs)155 devx_ufile2uctx(const struct uverbs_attr_bundle *attrs)
156 {
157 return to_mucontext(ib_uverbs_get_ucontext(attrs));
158 }
159
mlx5_ib_devx_create(struct mlx5_ib_dev * dev,bool is_user)160 int mlx5_ib_devx_create(struct mlx5_ib_dev *dev, bool is_user)
161 {
162 u32 in[MLX5_ST_SZ_DW(create_uctx_in)] = {0};
163 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)] = {0};
164 void *uctx;
165 int err;
166 u16 uid;
167 u32 cap = 0;
168
169 /* 0 means not supported */
170 if (!MLX5_CAP_GEN(dev->mdev, log_max_uctx))
171 return -EINVAL;
172
173 uctx = MLX5_ADDR_OF(create_uctx_in, in, uctx);
174 if (is_user && priv_check(curthread, PRIV_NET_RAW) == 0 &&
175 (MLX5_CAP_GEN(dev->mdev, uctx_cap) & MLX5_UCTX_CAP_RAW_TX))
176 cap |= MLX5_UCTX_CAP_RAW_TX;
177 if (is_user && priv_check(curthread, PRIV_DRIVER) == 0 &&
178 (MLX5_CAP_GEN(dev->mdev, uctx_cap) &
179 MLX5_UCTX_CAP_INTERNAL_DEV_RES))
180 cap |= MLX5_UCTX_CAP_INTERNAL_DEV_RES;
181
182 MLX5_SET(create_uctx_in, in, opcode, MLX5_CMD_OP_CREATE_UCTX);
183 MLX5_SET(uctx, uctx, cap, cap);
184
185 err = mlx5_cmd_exec(dev->mdev, in, sizeof(in), out, sizeof(out));
186 if (err)
187 return err;
188
189 uid = MLX5_GET(general_obj_out_cmd_hdr, out, obj_id);
190 return uid;
191 }
192
mlx5_ib_devx_destroy(struct mlx5_ib_dev * dev,u16 uid)193 void mlx5_ib_devx_destroy(struct mlx5_ib_dev *dev, u16 uid)
194 {
195 u32 in[MLX5_ST_SZ_DW(destroy_uctx_in)] = {0};
196 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)] = {0};
197
198 MLX5_SET(destroy_uctx_in, in, opcode, MLX5_CMD_OP_DESTROY_UCTX);
199 MLX5_SET(destroy_uctx_in, in, uid, uid);
200
201 mlx5_cmd_exec(dev->mdev, in, sizeof(in), out, sizeof(out));
202 }
203
mlx5_ib_devx_is_flow_dest(void * obj,int * dest_id,int * dest_type)204 bool mlx5_ib_devx_is_flow_dest(void *obj, int *dest_id, int *dest_type)
205 {
206 struct devx_obj *devx_obj = obj;
207 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, devx_obj->dinbox, opcode);
208
209 switch (opcode) {
210 case MLX5_CMD_OP_DESTROY_TIR:
211 *dest_type = MLX5_FLOW_DESTINATION_TYPE_TIR;
212 *dest_id = MLX5_GET(general_obj_in_cmd_hdr, devx_obj->dinbox,
213 obj_id);
214 return true;
215
216 case MLX5_CMD_OP_DESTROY_FLOW_TABLE:
217 *dest_type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
218 *dest_id = MLX5_GET(destroy_flow_table_in, devx_obj->dinbox,
219 table_id);
220 return true;
221 default:
222 return false;
223 }
224 }
225
mlx5_ib_devx_is_flow_counter(void * obj,u32 offset,u32 * counter_id)226 bool mlx5_ib_devx_is_flow_counter(void *obj, u32 offset, u32 *counter_id)
227 {
228 struct devx_obj *devx_obj = obj;
229 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, devx_obj->dinbox, opcode);
230
231 if (opcode == MLX5_CMD_OP_DEALLOC_FLOW_COUNTER) {
232
233 if (offset && offset >= devx_obj->flow_counter_bulk_size)
234 return false;
235
236 *counter_id = MLX5_GET(dealloc_flow_counter_in,
237 devx_obj->dinbox,
238 flow_counter_id);
239 *counter_id += offset;
240 return true;
241 }
242
243 return false;
244 }
245
is_legacy_unaffiliated_event_num(u16 event_num)246 static bool is_legacy_unaffiliated_event_num(u16 event_num)
247 {
248 switch (event_num) {
249 case MLX5_EVENT_TYPE_PORT_CHANGE:
250 return true;
251 default:
252 return false;
253 }
254 }
255
is_legacy_obj_event_num(u16 event_num)256 static bool is_legacy_obj_event_num(u16 event_num)
257 {
258 switch (event_num) {
259 case MLX5_EVENT_TYPE_PATH_MIG:
260 case MLX5_EVENT_TYPE_COMM_EST:
261 case MLX5_EVENT_TYPE_SQ_DRAINED:
262 case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
263 case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
264 case MLX5_EVENT_TYPE_CQ_ERROR:
265 case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
266 case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
267 case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
268 case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
269 case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
270 case MLX5_EVENT_TYPE_DCT_DRAINED:
271 case MLX5_EVENT_TYPE_COMP:
272 case MLX5_EVENT_TYPE_DCT_KEY_VIOLATION:
273 case MLX5_EVENT_TYPE_XRQ_ERROR:
274 return true;
275 default:
276 return false;
277 }
278 }
279
get_legacy_obj_type(u16 opcode)280 static u16 get_legacy_obj_type(u16 opcode)
281 {
282 switch (opcode) {
283 case MLX5_CMD_OP_CREATE_RQ:
284 return MLX5_EVENT_QUEUE_TYPE_RQ;
285 case MLX5_CMD_OP_CREATE_QP:
286 return MLX5_EVENT_QUEUE_TYPE_QP;
287 case MLX5_CMD_OP_CREATE_SQ:
288 return MLX5_EVENT_QUEUE_TYPE_SQ;
289 case MLX5_CMD_OP_CREATE_DCT:
290 return MLX5_EVENT_QUEUE_TYPE_DCT;
291 default:
292 return 0;
293 }
294 }
295
get_dec_obj_type(struct devx_obj * obj,u16 event_num)296 static u16 get_dec_obj_type(struct devx_obj *obj, u16 event_num)
297 {
298 u16 opcode;
299
300 opcode = (obj->obj_id >> 32) & 0xffff;
301
302 if (is_legacy_obj_event_num(event_num))
303 return get_legacy_obj_type(opcode);
304
305 switch (opcode) {
306 case MLX5_CMD_OP_CREATE_GENERAL_OBJ:
307 return (obj->obj_id >> 48);
308 case MLX5_CMD_OP_CREATE_RQ:
309 return MLX5_OBJ_TYPE_RQ;
310 case MLX5_CMD_OP_CREATE_QP:
311 return MLX5_OBJ_TYPE_QP;
312 case MLX5_CMD_OP_CREATE_SQ:
313 return MLX5_OBJ_TYPE_SQ;
314 case MLX5_CMD_OP_CREATE_DCT:
315 return MLX5_OBJ_TYPE_DCT;
316 case MLX5_CMD_OP_CREATE_TIR:
317 return MLX5_OBJ_TYPE_TIR;
318 case MLX5_CMD_OP_CREATE_TIS:
319 return MLX5_OBJ_TYPE_TIS;
320 case MLX5_CMD_OP_CREATE_PSV:
321 return MLX5_OBJ_TYPE_PSV;
322 case MLX5_OBJ_TYPE_MKEY:
323 return MLX5_OBJ_TYPE_MKEY;
324 case MLX5_CMD_OP_CREATE_RMP:
325 return MLX5_OBJ_TYPE_RMP;
326 case MLX5_CMD_OP_CREATE_XRC_SRQ:
327 return MLX5_OBJ_TYPE_XRC_SRQ;
328 case MLX5_CMD_OP_CREATE_XRQ:
329 return MLX5_OBJ_TYPE_XRQ;
330 case MLX5_CMD_OP_CREATE_RQT:
331 return MLX5_OBJ_TYPE_RQT;
332 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
333 return MLX5_OBJ_TYPE_FLOW_COUNTER;
334 case MLX5_CMD_OP_CREATE_CQ:
335 return MLX5_OBJ_TYPE_CQ;
336 default:
337 return 0;
338 }
339 }
340
get_event_obj_type(unsigned long event_type,struct mlx5_eqe * eqe)341 static u16 get_event_obj_type(unsigned long event_type, struct mlx5_eqe *eqe)
342 {
343 switch (event_type) {
344 case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
345 case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
346 case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
347 case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
348 case MLX5_EVENT_TYPE_PATH_MIG:
349 case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
350 case MLX5_EVENT_TYPE_COMM_EST:
351 case MLX5_EVENT_TYPE_SQ_DRAINED:
352 case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
353 case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
354 return eqe->data.qp_srq.type;
355 case MLX5_EVENT_TYPE_CQ_ERROR:
356 case MLX5_EVENT_TYPE_XRQ_ERROR:
357 return 0;
358 case MLX5_EVENT_TYPE_DCT_DRAINED:
359 case MLX5_EVENT_TYPE_DCT_KEY_VIOLATION:
360 return MLX5_EVENT_QUEUE_TYPE_DCT;
361 default:
362 return MLX5_GET(affiliated_event_header, &eqe->data, obj_type);
363 }
364 }
365
get_dec_obj_id(u64 obj_id)366 static u32 get_dec_obj_id(u64 obj_id)
367 {
368 return (obj_id & 0xffffffff);
369 }
370
371 /*
372 * As the obj_id in the firmware is not globally unique the object type
373 * must be considered upon checking for a valid object id.
374 * For that the opcode of the creator command is encoded as part of the obj_id.
375 */
get_enc_obj_id(u32 opcode,u32 obj_id)376 static u64 get_enc_obj_id(u32 opcode, u32 obj_id)
377 {
378 return ((u64)opcode << 32) | obj_id;
379 }
380
devx_get_obj_id(const void * in)381 static u64 devx_get_obj_id(const void *in)
382 {
383 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
384 u64 obj_id;
385
386 switch (opcode) {
387 case MLX5_CMD_OP_MODIFY_GENERAL_OBJ:
388 case MLX5_CMD_OP_QUERY_GENERAL_OBJ:
389 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_GENERAL_OBJ |
390 MLX5_GET(general_obj_in_cmd_hdr, in,
391 obj_type) << 16,
392 MLX5_GET(general_obj_in_cmd_hdr, in,
393 obj_id));
394 break;
395 case MLX5_CMD_OP_QUERY_MKEY:
396 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_MKEY,
397 MLX5_GET(query_mkey_in, in,
398 mkey_index));
399 break;
400 case MLX5_CMD_OP_QUERY_CQ:
401 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
402 MLX5_GET(query_cq_in, in, cqn));
403 break;
404 case MLX5_CMD_OP_MODIFY_CQ:
405 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
406 MLX5_GET(modify_cq_in, in, cqn));
407 break;
408 case MLX5_CMD_OP_QUERY_SQ:
409 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
410 MLX5_GET(query_sq_in, in, sqn));
411 break;
412 case MLX5_CMD_OP_MODIFY_SQ:
413 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
414 MLX5_GET(modify_sq_in, in, sqn));
415 break;
416 case MLX5_CMD_OP_QUERY_RQ:
417 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
418 MLX5_GET(query_rq_in, in, rqn));
419 break;
420 case MLX5_CMD_OP_MODIFY_RQ:
421 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
422 MLX5_GET(modify_rq_in, in, rqn));
423 break;
424 case MLX5_CMD_OP_QUERY_RMP:
425 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RMP,
426 MLX5_GET(query_rmp_in, in, rmpn));
427 break;
428 case MLX5_CMD_OP_MODIFY_RMP:
429 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RMP,
430 MLX5_GET(modify_rmp_in, in, rmpn));
431 break;
432 case MLX5_CMD_OP_QUERY_RQT:
433 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
434 MLX5_GET(query_rqt_in, in, rqtn));
435 break;
436 case MLX5_CMD_OP_MODIFY_RQT:
437 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
438 MLX5_GET(modify_rqt_in, in, rqtn));
439 break;
440 case MLX5_CMD_OP_QUERY_TIR:
441 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
442 MLX5_GET(query_tir_in, in, tirn));
443 break;
444 case MLX5_CMD_OP_MODIFY_TIR:
445 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
446 MLX5_GET(modify_tir_in, in, tirn));
447 break;
448 case MLX5_CMD_OP_QUERY_TIS:
449 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
450 MLX5_GET(query_tis_in, in, tisn));
451 break;
452 case MLX5_CMD_OP_MODIFY_TIS:
453 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
454 MLX5_GET(modify_tis_in, in, tisn));
455 break;
456 case MLX5_CMD_OP_QUERY_FLOW_TABLE:
457 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_TABLE,
458 MLX5_GET(query_flow_table_in, in,
459 table_id));
460 break;
461 case MLX5_CMD_OP_MODIFY_FLOW_TABLE:
462 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_TABLE,
463 MLX5_GET(modify_flow_table_in, in,
464 table_id));
465 break;
466 case MLX5_CMD_OP_QUERY_FLOW_GROUP:
467 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_GROUP,
468 MLX5_GET(query_flow_group_in, in,
469 group_id));
470 break;
471 case MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY:
472 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY,
473 MLX5_GET(query_fte_in, in,
474 flow_index));
475 break;
476 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
477 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY,
478 MLX5_GET(set_fte_in, in, flow_index));
479 break;
480 case MLX5_CMD_OP_QUERY_Q_COUNTER:
481 obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_Q_COUNTER,
482 MLX5_GET(query_q_counter_in, in,
483 counter_set_id));
484 break;
485 case MLX5_CMD_OP_QUERY_FLOW_COUNTER:
486 obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_FLOW_COUNTER,
487 MLX5_GET(query_flow_counter_in, in,
488 flow_counter_id));
489 break;
490 case MLX5_CMD_OP_QUERY_MODIFY_HEADER_CONTEXT:
491 obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT,
492 MLX5_GET(general_obj_in_cmd_hdr, in,
493 obj_id));
494 break;
495 case MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT:
496 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT,
497 MLX5_GET(query_scheduling_element_in,
498 in, scheduling_element_id));
499 break;
500 case MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT:
501 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT,
502 MLX5_GET(modify_scheduling_element_in,
503 in, scheduling_element_id));
504 break;
505 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
506 obj_id = get_enc_obj_id(MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT,
507 MLX5_GET(add_vxlan_udp_dport_in, in,
508 vxlan_udp_port));
509 break;
510 case MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY:
511 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_L2_TABLE_ENTRY,
512 MLX5_GET(query_l2_table_entry_in, in,
513 table_index));
514 break;
515 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
516 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_L2_TABLE_ENTRY,
517 MLX5_GET(set_l2_table_entry_in, in,
518 table_index));
519 break;
520 case MLX5_CMD_OP_QUERY_QP:
521 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
522 MLX5_GET(query_qp_in, in, qpn));
523 break;
524 case MLX5_CMD_OP_RST2INIT_QP:
525 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
526 MLX5_GET(rst2init_qp_in, in, qpn));
527 break;
528 case MLX5_CMD_OP_INIT2RTR_QP:
529 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
530 MLX5_GET(init2rtr_qp_in, in, qpn));
531 break;
532 case MLX5_CMD_OP_RTR2RTS_QP:
533 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
534 MLX5_GET(rtr2rts_qp_in, in, qpn));
535 break;
536 case MLX5_CMD_OP_RTS2RTS_QP:
537 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
538 MLX5_GET(rts2rts_qp_in, in, qpn));
539 break;
540 case MLX5_CMD_OP_SQERR2RTS_QP:
541 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
542 MLX5_GET(sqerr2rts_qp_in, in, qpn));
543 break;
544 case MLX5_CMD_OP_2ERR_QP:
545 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
546 MLX5_GET(qp_2err_in, in, qpn));
547 break;
548 case MLX5_CMD_OP_2RST_QP:
549 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
550 MLX5_GET(qp_2rst_in, in, qpn));
551 break;
552 case MLX5_CMD_OP_QUERY_DCT:
553 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
554 MLX5_GET(query_dct_in, in, dctn));
555 break;
556 case MLX5_CMD_OP_QUERY_XRQ:
557 case MLX5_CMD_OP_QUERY_XRQ_DC_PARAMS_ENTRY:
558 case MLX5_CMD_OP_QUERY_XRQ_ERROR_PARAMS:
559 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRQ,
560 MLX5_GET(query_xrq_in, in, xrqn));
561 break;
562 case MLX5_CMD_OP_QUERY_XRC_SRQ:
563 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRC_SRQ,
564 MLX5_GET(query_xrc_srq_in, in,
565 xrc_srqn));
566 break;
567 case MLX5_CMD_OP_ARM_XRC_SRQ:
568 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRC_SRQ,
569 MLX5_GET(arm_xrc_srq_in, in, xrc_srqn));
570 break;
571 case MLX5_CMD_OP_QUERY_SRQ:
572 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SRQ,
573 MLX5_GET(query_srq_in, in, srqn));
574 break;
575 case MLX5_CMD_OP_ARM_RQ:
576 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
577 MLX5_GET(arm_rq_in, in, srq_number));
578 break;
579 case MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION:
580 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
581 MLX5_GET(drain_dct_in, in, dctn));
582 break;
583 case MLX5_CMD_OP_ARM_XRQ:
584 case MLX5_CMD_OP_SET_XRQ_DC_PARAMS_ENTRY:
585 case MLX5_CMD_OP_RELEASE_XRQ_ERROR:
586 case MLX5_CMD_OP_MODIFY_XRQ:
587 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRQ,
588 MLX5_GET(arm_xrq_in, in, xrqn));
589 break;
590 case MLX5_CMD_OP_QUERY_PACKET_REFORMAT_CONTEXT:
591 obj_id = get_enc_obj_id
592 (MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT,
593 MLX5_GET(query_packet_reformat_context_in,
594 in, packet_reformat_id));
595 break;
596 default:
597 obj_id = 0;
598 }
599
600 return obj_id;
601 }
602
devx_is_valid_obj_id(struct uverbs_attr_bundle * attrs,struct ib_uobject * uobj,const void * in)603 static bool devx_is_valid_obj_id(struct uverbs_attr_bundle *attrs,
604 struct ib_uobject *uobj, const void *in)
605 {
606 struct mlx5_ib_dev *dev = mlx5_udata_to_mdev(&attrs->driver_udata);
607 u64 obj_id = devx_get_obj_id(in);
608
609 if (!obj_id)
610 return false;
611
612 switch (uobj_get_object_id(uobj)) {
613 case UVERBS_OBJECT_CQ:
614 return get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
615 to_mcq(uobj->object)->mcq.cqn) ==
616 obj_id;
617
618 case UVERBS_OBJECT_SRQ:
619 {
620 struct mlx5_core_srq *srq = &(to_msrq(uobj->object)->msrq);
621 u16 opcode;
622
623 switch (srq->common.res) {
624 case MLX5_RES_XSRQ:
625 opcode = MLX5_CMD_OP_CREATE_XRC_SRQ;
626 break;
627 case MLX5_RES_XRQ:
628 opcode = MLX5_CMD_OP_CREATE_XRQ;
629 break;
630 default:
631 if (!dev->mdev->issi)
632 opcode = MLX5_CMD_OP_CREATE_SRQ;
633 else
634 opcode = MLX5_CMD_OP_CREATE_RMP;
635 }
636
637 return get_enc_obj_id(opcode,
638 to_msrq(uobj->object)->msrq.srqn) ==
639 obj_id;
640 }
641
642 case UVERBS_OBJECT_QP:
643 {
644 struct mlx5_ib_qp *qp = to_mqp(uobj->object);
645 enum ib_qp_type qp_type = qp->ibqp.qp_type;
646
647 if (qp_type == IB_QPT_RAW_PACKET ||
648 (qp->flags & MLX5_IB_QP_UNDERLAY)) {
649 struct mlx5_ib_raw_packet_qp *raw_packet_qp =
650 &qp->raw_packet_qp;
651 struct mlx5_ib_rq *rq = &raw_packet_qp->rq;
652 struct mlx5_ib_sq *sq = &raw_packet_qp->sq;
653
654 return (get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
655 rq->base.mqp.qpn) == obj_id ||
656 get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
657 sq->base.mqp.qpn) == obj_id ||
658 get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
659 rq->tirn) == obj_id ||
660 get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
661 sq->tisn) == obj_id);
662 }
663
664 if (qp_type == MLX5_IB_QPT_DCT)
665 return get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
666 qp->dct.mdct.dctn) == obj_id;
667
668 return get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
669 qp->ibqp.qp_num) == obj_id;
670 }
671
672 case UVERBS_OBJECT_WQ:
673 return get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
674 to_mrwq(uobj->object)->core_qp.qpn) ==
675 obj_id;
676
677 case UVERBS_OBJECT_RWQ_IND_TBL:
678 return get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
679 to_mrwq_ind_table(uobj->object)->rqtn) ==
680 obj_id;
681
682 case MLX5_IB_OBJECT_DEVX_OBJ:
683 return ((struct devx_obj *)uobj->object)->obj_id == obj_id;
684
685 default:
686 return false;
687 }
688 }
689
devx_set_umem_valid(const void * in)690 static void devx_set_umem_valid(const void *in)
691 {
692 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
693
694 switch (opcode) {
695 case MLX5_CMD_OP_CREATE_MKEY:
696 MLX5_SET(create_mkey_in, in, mkey_umem_valid, 1);
697 break;
698 case MLX5_CMD_OP_CREATE_CQ:
699 {
700 void *cqc;
701
702 MLX5_SET(create_cq_in, in, cq_umem_valid, 1);
703 cqc = MLX5_ADDR_OF(create_cq_in, in, cq_context);
704 MLX5_SET(cqc, cqc, dbr_umem_valid, 1);
705 break;
706 }
707 case MLX5_CMD_OP_CREATE_QP:
708 {
709 void *qpc;
710
711 qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);
712 MLX5_SET(qpc, qpc, dbr_umem_valid, 1);
713 MLX5_SET(create_qp_in, in, wq_umem_valid, 1);
714 break;
715 }
716
717 case MLX5_CMD_OP_CREATE_RQ:
718 {
719 void *rqc, *wq;
720
721 rqc = MLX5_ADDR_OF(create_rq_in, in, ctx);
722 wq = MLX5_ADDR_OF(rqc, rqc, wq);
723 MLX5_SET(wq, wq, dbr_umem_valid, 1);
724 MLX5_SET(wq, wq, wq_umem_valid, 1);
725 break;
726 }
727
728 case MLX5_CMD_OP_CREATE_SQ:
729 {
730 void *sqc, *wq;
731
732 sqc = MLX5_ADDR_OF(create_sq_in, in, ctx);
733 wq = MLX5_ADDR_OF(sqc, sqc, wq);
734 MLX5_SET(wq, wq, dbr_umem_valid, 1);
735 MLX5_SET(wq, wq, wq_umem_valid, 1);
736 break;
737 }
738
739 case MLX5_CMD_OP_MODIFY_CQ:
740 MLX5_SET(modify_cq_in, in, cq_umem_valid, 1);
741 break;
742
743 case MLX5_CMD_OP_CREATE_RMP:
744 {
745 void *rmpc, *wq;
746
747 rmpc = MLX5_ADDR_OF(create_rmp_in, in, ctx);
748 wq = MLX5_ADDR_OF(rmpc, rmpc, wq);
749 MLX5_SET(wq, wq, dbr_umem_valid, 1);
750 MLX5_SET(wq, wq, wq_umem_valid, 1);
751 break;
752 }
753
754 case MLX5_CMD_OP_CREATE_XRQ:
755 {
756 void *xrqc, *wq;
757
758 xrqc = MLX5_ADDR_OF(create_xrq_in, in, xrq_context);
759 wq = MLX5_ADDR_OF(xrqc, xrqc, wq);
760 MLX5_SET(wq, wq, dbr_umem_valid, 1);
761 MLX5_SET(wq, wq, wq_umem_valid, 1);
762 break;
763 }
764
765 case MLX5_CMD_OP_CREATE_XRC_SRQ:
766 {
767 void *xrc_srqc;
768
769 MLX5_SET(create_xrc_srq_in, in, xrc_srq_umem_valid, 1);
770 xrc_srqc = MLX5_ADDR_OF(create_xrc_srq_in, in,
771 xrc_srq_context_entry);
772 MLX5_SET(xrc_srqc, xrc_srqc, dbr_umem_valid, 1);
773 break;
774 }
775
776 default:
777 return;
778 }
779 }
780
devx_is_obj_create_cmd(const void * in,u16 * opcode)781 static bool devx_is_obj_create_cmd(const void *in, u16 *opcode)
782 {
783 *opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
784
785 switch (*opcode) {
786 case MLX5_CMD_OP_CREATE_GENERAL_OBJ:
787 case MLX5_CMD_OP_CREATE_MKEY:
788 case MLX5_CMD_OP_CREATE_CQ:
789 case MLX5_CMD_OP_ALLOC_PD:
790 case MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN:
791 case MLX5_CMD_OP_CREATE_RMP:
792 case MLX5_CMD_OP_CREATE_SQ:
793 case MLX5_CMD_OP_CREATE_RQ:
794 case MLX5_CMD_OP_CREATE_RQT:
795 case MLX5_CMD_OP_CREATE_TIR:
796 case MLX5_CMD_OP_CREATE_TIS:
797 case MLX5_CMD_OP_ALLOC_Q_COUNTER:
798 case MLX5_CMD_OP_CREATE_FLOW_TABLE:
799 case MLX5_CMD_OP_CREATE_FLOW_GROUP:
800 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
801 case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
802 case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
803 case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:
804 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
805 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
806 case MLX5_CMD_OP_CREATE_QP:
807 case MLX5_CMD_OP_CREATE_SRQ:
808 case MLX5_CMD_OP_CREATE_XRC_SRQ:
809 case MLX5_CMD_OP_CREATE_DCT:
810 case MLX5_CMD_OP_CREATE_XRQ:
811 case MLX5_CMD_OP_ATTACH_TO_MCG:
812 case MLX5_CMD_OP_ALLOC_XRCD:
813 return true;
814 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
815 {
816 u16 op_mod = MLX5_GET(set_fte_in, in, op_mod);
817 if (op_mod == 0)
818 return true;
819 return false;
820 }
821 case MLX5_CMD_OP_CREATE_PSV:
822 {
823 u8 num_psv = MLX5_GET(create_psv_in, in, num_psv);
824
825 if (num_psv == 1)
826 return true;
827 return false;
828 }
829 default:
830 return false;
831 }
832 }
833
devx_is_obj_modify_cmd(const void * in)834 static bool devx_is_obj_modify_cmd(const void *in)
835 {
836 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
837
838 switch (opcode) {
839 case MLX5_CMD_OP_MODIFY_GENERAL_OBJ:
840 case MLX5_CMD_OP_MODIFY_CQ:
841 case MLX5_CMD_OP_MODIFY_RMP:
842 case MLX5_CMD_OP_MODIFY_SQ:
843 case MLX5_CMD_OP_MODIFY_RQ:
844 case MLX5_CMD_OP_MODIFY_RQT:
845 case MLX5_CMD_OP_MODIFY_TIR:
846 case MLX5_CMD_OP_MODIFY_TIS:
847 case MLX5_CMD_OP_MODIFY_FLOW_TABLE:
848 case MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT:
849 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
850 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
851 case MLX5_CMD_OP_RST2INIT_QP:
852 case MLX5_CMD_OP_INIT2RTR_QP:
853 case MLX5_CMD_OP_RTR2RTS_QP:
854 case MLX5_CMD_OP_RTS2RTS_QP:
855 case MLX5_CMD_OP_SQERR2RTS_QP:
856 case MLX5_CMD_OP_2ERR_QP:
857 case MLX5_CMD_OP_2RST_QP:
858 case MLX5_CMD_OP_ARM_XRC_SRQ:
859 case MLX5_CMD_OP_ARM_RQ:
860 case MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION:
861 case MLX5_CMD_OP_ARM_XRQ:
862 case MLX5_CMD_OP_SET_XRQ_DC_PARAMS_ENTRY:
863 case MLX5_CMD_OP_RELEASE_XRQ_ERROR:
864 case MLX5_CMD_OP_MODIFY_XRQ:
865 return true;
866 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
867 {
868 u16 op_mod = MLX5_GET(set_fte_in, in, op_mod);
869
870 if (op_mod == 1)
871 return true;
872 return false;
873 }
874 default:
875 return false;
876 }
877 }
878
devx_is_obj_query_cmd(const void * in)879 static bool devx_is_obj_query_cmd(const void *in)
880 {
881 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
882
883 switch (opcode) {
884 case MLX5_CMD_OP_QUERY_GENERAL_OBJ:
885 case MLX5_CMD_OP_QUERY_MKEY:
886 case MLX5_CMD_OP_QUERY_CQ:
887 case MLX5_CMD_OP_QUERY_RMP:
888 case MLX5_CMD_OP_QUERY_SQ:
889 case MLX5_CMD_OP_QUERY_RQ:
890 case MLX5_CMD_OP_QUERY_RQT:
891 case MLX5_CMD_OP_QUERY_TIR:
892 case MLX5_CMD_OP_QUERY_TIS:
893 case MLX5_CMD_OP_QUERY_Q_COUNTER:
894 case MLX5_CMD_OP_QUERY_FLOW_TABLE:
895 case MLX5_CMD_OP_QUERY_FLOW_GROUP:
896 case MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY:
897 case MLX5_CMD_OP_QUERY_FLOW_COUNTER:
898 case MLX5_CMD_OP_QUERY_MODIFY_HEADER_CONTEXT:
899 case MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT:
900 case MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY:
901 case MLX5_CMD_OP_QUERY_QP:
902 case MLX5_CMD_OP_QUERY_SRQ:
903 case MLX5_CMD_OP_QUERY_XRC_SRQ:
904 case MLX5_CMD_OP_QUERY_DCT:
905 case MLX5_CMD_OP_QUERY_XRQ:
906 case MLX5_CMD_OP_QUERY_XRQ_DC_PARAMS_ENTRY:
907 case MLX5_CMD_OP_QUERY_XRQ_ERROR_PARAMS:
908 case MLX5_CMD_OP_QUERY_PACKET_REFORMAT_CONTEXT:
909 return true;
910 default:
911 return false;
912 }
913 }
914
devx_is_whitelist_cmd(void * in)915 static bool devx_is_whitelist_cmd(void *in)
916 {
917 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
918
919 switch (opcode) {
920 case MLX5_CMD_OP_QUERY_HCA_CAP:
921 case MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT:
922 case MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT:
923 return true;
924 default:
925 return false;
926 }
927 }
928
devx_get_uid(struct mlx5_ib_ucontext * c,void * cmd_in)929 static int devx_get_uid(struct mlx5_ib_ucontext *c, void *cmd_in)
930 {
931 if (devx_is_whitelist_cmd(cmd_in)) {
932 if (c->devx_uid)
933 return c->devx_uid;
934
935 return -EOPNOTSUPP;
936 }
937
938 if (!c->devx_uid)
939 return -EINVAL;
940
941 return c->devx_uid;
942 }
943
devx_is_general_cmd(void * in,struct mlx5_ib_dev * dev)944 static bool devx_is_general_cmd(void *in, struct mlx5_ib_dev *dev)
945 {
946 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
947
948 /* Pass all cmds for vhca_tunnel as general, tracking is done in FW */
949 if ((MLX5_CAP_GEN_64(dev->mdev, vhca_tunnel_commands) &&
950 MLX5_GET(general_obj_in_cmd_hdr, in, vhca_tunnel_id)) ||
951 (opcode >= MLX5_CMD_OP_GENERAL_START &&
952 opcode < MLX5_CMD_OP_GENERAL_END))
953 return true;
954
955 switch (opcode) {
956 case MLX5_CMD_OP_QUERY_HCA_CAP:
957 case MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT:
958 case MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT:
959 case MLX5_CMD_OP_QUERY_VPORT_STATE:
960 case MLX5_CMD_OP_QUERY_ADAPTER:
961 case MLX5_CMD_OP_QUERY_ISSI:
962 case MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT:
963 case MLX5_CMD_OP_QUERY_ROCE_ADDRESS:
964 case MLX5_CMD_OP_QUERY_VNIC_ENV:
965 case MLX5_CMD_OP_QUERY_VPORT_COUNTER:
966 case MLX5_CMD_OP_GET_DROPPED_PACKET_LOG:
967 case MLX5_CMD_OP_NOP:
968 case MLX5_CMD_OP_QUERY_CONG_STATUS:
969 case MLX5_CMD_OP_QUERY_CONG_PARAMS:
970 case MLX5_CMD_OP_QUERY_CONG_STATISTICS:
971 case MLX5_CMD_OP_QUERY_LAG:
972 return true;
973 default:
974 return false;
975 }
976 }
977
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_EQN)978 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_EQN)(
979 struct uverbs_attr_bundle *attrs)
980 {
981 struct mlx5_ib_ucontext *c;
982 struct mlx5_ib_dev *dev;
983 int user_vector;
984 int dev_eqn;
985 unsigned int irqn;
986 int err;
987
988 if (uverbs_copy_from(&user_vector, attrs,
989 MLX5_IB_ATTR_DEVX_QUERY_EQN_USER_VEC))
990 return -EFAULT;
991
992 c = devx_ufile2uctx(attrs);
993 if (IS_ERR(c))
994 return PTR_ERR(c);
995 dev = to_mdev(c->ibucontext.device);
996
997 err = mlx5_vector2eqn(dev->mdev, user_vector, &dev_eqn, &irqn);
998 if (err < 0)
999 return err;
1000
1001 if (uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_QUERY_EQN_DEV_EQN,
1002 &dev_eqn, sizeof(dev_eqn)))
1003 return -EFAULT;
1004
1005 return 0;
1006 }
1007
1008 /*
1009 *Security note:
1010 * The hardware protection mechanism works like this: Each device object that
1011 * is subject to UAR doorbells (QP/SQ/CQ) gets a UAR ID (called uar_page in
1012 * the device specification manual) upon its creation. Then upon doorbell,
1013 * hardware fetches the object context for which the doorbell was rang, and
1014 * validates that the UAR through which the DB was rang matches the UAR ID
1015 * of the object.
1016 * If no match the doorbell is silently ignored by the hardware. Of course,
1017 * the user cannot ring a doorbell on a UAR that was not mapped to it.
1018 * Now in devx, as the devx kernel does not manipulate the QP/SQ/CQ command
1019 * mailboxes (except tagging them with UID), we expose to the user its UAR
1020 * ID, so it can embed it in these objects in the expected specification
1021 * format. So the only thing the user can do is hurt itself by creating a
1022 * QP/SQ/CQ with a UAR ID other than his, and then in this case other users
1023 * may ring a doorbell on its objects.
1024 * The consequence of that will be that another user can schedule a QP/SQ
1025 * of the buggy user for execution (just insert it to the hardware schedule
1026 * queue or arm its CQ for event generation), no further harm is expected.
1027 */
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_UAR)1028 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_UAR)(
1029 struct uverbs_attr_bundle *attrs)
1030 {
1031 struct mlx5_ib_ucontext *c;
1032 struct mlx5_ib_dev *dev;
1033 u32 user_idx;
1034 s32 dev_idx;
1035
1036 c = devx_ufile2uctx(attrs);
1037 if (IS_ERR(c))
1038 return PTR_ERR(c);
1039 dev = to_mdev(c->ibucontext.device);
1040
1041 if (uverbs_copy_from(&user_idx, attrs,
1042 MLX5_IB_ATTR_DEVX_QUERY_UAR_USER_IDX))
1043 return -EFAULT;
1044
1045 dev_idx = bfregn_to_uar_index(dev, &c->bfregi, user_idx, true);
1046 if (dev_idx < 0)
1047 return dev_idx;
1048
1049 if (uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_QUERY_UAR_DEV_IDX,
1050 &dev_idx, sizeof(dev_idx)))
1051 return -EFAULT;
1052
1053 return 0;
1054 }
1055
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OTHER)1056 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OTHER)(
1057 struct uverbs_attr_bundle *attrs)
1058 {
1059 struct mlx5_ib_ucontext *c;
1060 struct mlx5_ib_dev *dev;
1061 void *cmd_in = uverbs_attr_get_alloced_ptr(
1062 attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_IN);
1063 int cmd_out_len = uverbs_attr_get_len(attrs,
1064 MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT);
1065 void *cmd_out;
1066 int err;
1067 int uid;
1068
1069 c = devx_ufile2uctx(attrs);
1070 if (IS_ERR(c))
1071 return PTR_ERR(c);
1072 dev = to_mdev(c->ibucontext.device);
1073
1074 uid = devx_get_uid(c, cmd_in);
1075 if (uid < 0)
1076 return uid;
1077
1078 /* Only white list of some general HCA commands are allowed for this method. */
1079 if (!devx_is_general_cmd(cmd_in, dev))
1080 return -EINVAL;
1081
1082 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1083 if (IS_ERR(cmd_out))
1084 return PTR_ERR(cmd_out);
1085
1086 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1087 err = mlx5_cmd_exec(dev->mdev, cmd_in,
1088 uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_IN),
1089 cmd_out, cmd_out_len);
1090 if (err)
1091 return err;
1092
1093 return uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT, cmd_out,
1094 cmd_out_len);
1095 }
1096
devx_obj_build_destroy_cmd(void * in,void * out,void * din,u32 * dinlen,u32 * obj_id)1097 static void devx_obj_build_destroy_cmd(void *in, void *out, void *din,
1098 u32 *dinlen,
1099 u32 *obj_id)
1100 {
1101 u16 obj_type = MLX5_GET(general_obj_in_cmd_hdr, in, obj_type);
1102 u16 uid = MLX5_GET(general_obj_in_cmd_hdr, in, uid);
1103
1104 *obj_id = MLX5_GET(general_obj_out_cmd_hdr, out, obj_id);
1105 *dinlen = MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr);
1106
1107 MLX5_SET(general_obj_in_cmd_hdr, din, obj_id, *obj_id);
1108 MLX5_SET(general_obj_in_cmd_hdr, din, uid, uid);
1109
1110 switch (MLX5_GET(general_obj_in_cmd_hdr, in, opcode)) {
1111 case MLX5_CMD_OP_CREATE_GENERAL_OBJ:
1112 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_GENERAL_OBJ);
1113 MLX5_SET(general_obj_in_cmd_hdr, din, obj_type, obj_type);
1114 break;
1115
1116 case MLX5_CMD_OP_CREATE_UMEM:
1117 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1118 MLX5_CMD_OP_DESTROY_UMEM);
1119 break;
1120 case MLX5_CMD_OP_CREATE_MKEY:
1121 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_MKEY);
1122 break;
1123 case MLX5_CMD_OP_CREATE_CQ:
1124 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_CQ);
1125 break;
1126 case MLX5_CMD_OP_ALLOC_PD:
1127 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DEALLOC_PD);
1128 break;
1129 case MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN:
1130 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1131 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN);
1132 break;
1133 case MLX5_CMD_OP_CREATE_RMP:
1134 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_RMP);
1135 break;
1136 case MLX5_CMD_OP_CREATE_SQ:
1137 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_SQ);
1138 break;
1139 case MLX5_CMD_OP_CREATE_RQ:
1140 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_RQ);
1141 break;
1142 case MLX5_CMD_OP_CREATE_RQT:
1143 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_RQT);
1144 break;
1145 case MLX5_CMD_OP_CREATE_TIR:
1146 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_TIR);
1147 break;
1148 case MLX5_CMD_OP_CREATE_TIS:
1149 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_TIS);
1150 break;
1151 case MLX5_CMD_OP_ALLOC_Q_COUNTER:
1152 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1153 MLX5_CMD_OP_DEALLOC_Q_COUNTER);
1154 break;
1155 case MLX5_CMD_OP_CREATE_FLOW_TABLE:
1156 *dinlen = MLX5_ST_SZ_BYTES(destroy_flow_table_in);
1157 *obj_id = MLX5_GET(create_flow_table_out, out, table_id);
1158 MLX5_SET(destroy_flow_table_in, din, other_vport,
1159 MLX5_GET(create_flow_table_in, in, other_vport));
1160 MLX5_SET(destroy_flow_table_in, din, vport_number,
1161 MLX5_GET(create_flow_table_in, in, vport_number));
1162 MLX5_SET(destroy_flow_table_in, din, table_type,
1163 MLX5_GET(create_flow_table_in, in, table_type));
1164 MLX5_SET(destroy_flow_table_in, din, table_id, *obj_id);
1165 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1166 MLX5_CMD_OP_DESTROY_FLOW_TABLE);
1167 break;
1168 case MLX5_CMD_OP_CREATE_FLOW_GROUP:
1169 *dinlen = MLX5_ST_SZ_BYTES(destroy_flow_group_in);
1170 *obj_id = MLX5_GET(create_flow_group_out, out, group_id);
1171 MLX5_SET(destroy_flow_group_in, din, other_vport,
1172 MLX5_GET(create_flow_group_in, in, other_vport));
1173 MLX5_SET(destroy_flow_group_in, din, vport_number,
1174 MLX5_GET(create_flow_group_in, in, vport_number));
1175 MLX5_SET(destroy_flow_group_in, din, table_type,
1176 MLX5_GET(create_flow_group_in, in, table_type));
1177 MLX5_SET(destroy_flow_group_in, din, table_id,
1178 MLX5_GET(create_flow_group_in, in, table_id));
1179 MLX5_SET(destroy_flow_group_in, din, group_id, *obj_id);
1180 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1181 MLX5_CMD_OP_DESTROY_FLOW_GROUP);
1182 break;
1183 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
1184 *dinlen = MLX5_ST_SZ_BYTES(delete_fte_in);
1185 *obj_id = MLX5_GET(set_fte_in, in, flow_index);
1186 MLX5_SET(delete_fte_in, din, other_vport,
1187 MLX5_GET(set_fte_in, in, other_vport));
1188 MLX5_SET(delete_fte_in, din, vport_number,
1189 MLX5_GET(set_fte_in, in, vport_number));
1190 MLX5_SET(delete_fte_in, din, table_type,
1191 MLX5_GET(set_fte_in, in, table_type));
1192 MLX5_SET(delete_fte_in, din, table_id,
1193 MLX5_GET(set_fte_in, in, table_id));
1194 MLX5_SET(delete_fte_in, din, flow_index, *obj_id);
1195 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1196 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY);
1197 break;
1198 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
1199 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1200 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER);
1201 break;
1202 case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
1203 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1204 MLX5_CMD_OP_DEALLOC_PACKET_REFORMAT_CONTEXT);
1205 break;
1206 case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
1207 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1208 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT);
1209 break;
1210 case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:
1211 *dinlen = MLX5_ST_SZ_BYTES(destroy_scheduling_element_in);
1212 *obj_id = MLX5_GET(create_scheduling_element_out, out,
1213 scheduling_element_id);
1214 MLX5_SET(destroy_scheduling_element_in, din,
1215 scheduling_hierarchy,
1216 MLX5_GET(create_scheduling_element_in, in,
1217 scheduling_hierarchy));
1218 MLX5_SET(destroy_scheduling_element_in, din,
1219 scheduling_element_id, *obj_id);
1220 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1221 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT);
1222 break;
1223 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
1224 *dinlen = MLX5_ST_SZ_BYTES(delete_vxlan_udp_dport_in);
1225 *obj_id = MLX5_GET(add_vxlan_udp_dport_in, in, vxlan_udp_port);
1226 MLX5_SET(delete_vxlan_udp_dport_in, din, vxlan_udp_port, *obj_id);
1227 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1228 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT);
1229 break;
1230 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
1231 *dinlen = MLX5_ST_SZ_BYTES(delete_l2_table_entry_in);
1232 *obj_id = MLX5_GET(set_l2_table_entry_in, in, table_index);
1233 MLX5_SET(delete_l2_table_entry_in, din, table_index, *obj_id);
1234 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1235 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY);
1236 break;
1237 case MLX5_CMD_OP_CREATE_QP:
1238 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_QP);
1239 break;
1240 case MLX5_CMD_OP_CREATE_SRQ:
1241 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_SRQ);
1242 break;
1243 case MLX5_CMD_OP_CREATE_XRC_SRQ:
1244 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1245 MLX5_CMD_OP_DESTROY_XRC_SRQ);
1246 break;
1247 case MLX5_CMD_OP_CREATE_DCT:
1248 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_DCT);
1249 break;
1250 case MLX5_CMD_OP_CREATE_XRQ:
1251 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_XRQ);
1252 break;
1253 case MLX5_CMD_OP_ATTACH_TO_MCG:
1254 *dinlen = MLX5_ST_SZ_BYTES(detach_from_mcg_in);
1255 MLX5_SET(detach_from_mcg_in, din, qpn,
1256 MLX5_GET(attach_to_mcg_in, in, qpn));
1257 memcpy(MLX5_ADDR_OF(detach_from_mcg_in, din, multicast_gid),
1258 MLX5_ADDR_OF(attach_to_mcg_in, in, multicast_gid),
1259 MLX5_FLD_SZ_BYTES(attach_to_mcg_in, multicast_gid));
1260 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DETACH_FROM_MCG);
1261 break;
1262 case MLX5_CMD_OP_ALLOC_XRCD:
1263 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DEALLOC_XRCD);
1264 break;
1265 case MLX5_CMD_OP_CREATE_PSV:
1266 MLX5_SET(general_obj_in_cmd_hdr, din, opcode,
1267 MLX5_CMD_OP_DESTROY_PSV);
1268 MLX5_SET(destroy_psv_in, din, psvn,
1269 MLX5_GET(create_psv_out, out, psv0_index));
1270 break;
1271 default:
1272 /* The entry must match to one of the devx_is_obj_create_cmd */
1273 WARN_ON(true);
1274 break;
1275 }
1276 }
1277
devx_handle_mkey_create(struct mlx5_ib_dev * dev,struct devx_obj * obj,void * in,int in_len)1278 static int devx_handle_mkey_create(struct mlx5_ib_dev *dev,
1279 struct devx_obj *obj,
1280 void *in, int in_len)
1281 {
1282 int min_len = MLX5_BYTE_OFF(create_mkey_in, memory_key_mkey_entry) +
1283 MLX5_FLD_SZ_BYTES(create_mkey_in,
1284 memory_key_mkey_entry);
1285 void *mkc;
1286 u8 access_mode;
1287
1288 if (in_len < min_len)
1289 return -EINVAL;
1290
1291 mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
1292
1293 access_mode = MLX5_GET(mkc, mkc, access_mode);
1294 access_mode |= MLX5_GET(mkc, mkc, access_mode_4_2) << 2;
1295
1296 if (access_mode == MLX5_ACCESS_MODE_KLM ||
1297 access_mode == MLX5_ACCESS_MODE_KSM) {
1298 return 0;
1299 }
1300
1301 MLX5_SET(create_mkey_in, in, mkey_umem_valid, 1);
1302 return 0;
1303 }
1304
devx_cleanup_subscription(struct mlx5_ib_dev * dev,struct devx_event_subscription * sub)1305 static void devx_cleanup_subscription(struct mlx5_ib_dev *dev,
1306 struct devx_event_subscription *sub)
1307 {
1308 struct devx_event *event;
1309 struct devx_obj_event *xa_val_level2;
1310
1311 if (sub->is_cleaned)
1312 return;
1313
1314 sub->is_cleaned = 1;
1315 list_del_rcu(&sub->xa_list);
1316
1317 if (list_empty(&sub->obj_list))
1318 return;
1319
1320 list_del_rcu(&sub->obj_list);
1321 /* check whether key level 1 for this obj_sub_list is empty */
1322 event = xa_load(&dev->devx_event_table.event_xa,
1323 sub->xa_key_level1);
1324 WARN_ON(!event);
1325
1326 xa_val_level2 = xa_load(&event->object_ids, sub->xa_key_level2);
1327 if (list_empty(&xa_val_level2->obj_sub_list)) {
1328 xa_erase(&event->object_ids,
1329 sub->xa_key_level2);
1330 kfree_rcu(xa_val_level2, rcu);
1331 }
1332 }
1333
devx_obj_cleanup(struct ib_uobject * uobject,enum rdma_remove_reason why,struct uverbs_attr_bundle * attrs)1334 static int devx_obj_cleanup(struct ib_uobject *uobject,
1335 enum rdma_remove_reason why,
1336 struct uverbs_attr_bundle *attrs)
1337 {
1338 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
1339 struct mlx5_devx_event_table *devx_event_table;
1340 struct devx_obj *obj = uobject->object;
1341 struct devx_event_subscription *sub_entry, *tmp;
1342 struct mlx5_ib_dev *dev;
1343 int ret;
1344
1345 dev = mlx5_udata_to_mdev(&attrs->driver_udata);
1346 if (obj->flags & DEVX_OBJ_FLAGS_DCT)
1347 ret = mlx5_core_destroy_dct(obj->ib_dev->mdev, &obj->core_dct);
1348 else if (obj->flags & DEVX_OBJ_FLAGS_CQ)
1349 ret = mlx5_core_destroy_cq(obj->ib_dev->mdev, &obj->core_cq);
1350 else
1351 ret = mlx5_cmd_exec(obj->ib_dev->mdev, obj->dinbox,
1352 obj->dinlen, out, sizeof(out));
1353 if (ib_is_destroy_retryable(ret, why, uobject))
1354 return ret;
1355
1356 devx_event_table = &dev->devx_event_table;
1357
1358 mutex_lock(&devx_event_table->event_xa_lock);
1359 list_for_each_entry_safe(sub_entry, tmp, &obj->event_sub, obj_list)
1360 devx_cleanup_subscription(dev, sub_entry);
1361 mutex_unlock(&devx_event_table->event_xa_lock);
1362
1363 kfree(obj);
1364 return ret;
1365 }
1366
devx_cq_comp(struct mlx5_core_cq * mcq,struct mlx5_eqe * eqe)1367 static void devx_cq_comp(struct mlx5_core_cq *mcq, struct mlx5_eqe *eqe)
1368 {
1369 struct devx_obj *obj = container_of(mcq, struct devx_obj, core_cq);
1370 struct mlx5_devx_event_table *table;
1371 struct devx_event *event;
1372 struct devx_obj_event *obj_event;
1373 u32 obj_id = mcq->cqn;
1374
1375 table = &obj->ib_dev->devx_event_table;
1376 rcu_read_lock();
1377 event = xa_load(&table->event_xa, MLX5_EVENT_TYPE_COMP);
1378 if (!event)
1379 goto out;
1380
1381 obj_event = xa_load(&event->object_ids, obj_id);
1382 if (!obj_event)
1383 goto out;
1384
1385 dispatch_event_fd(&obj_event->obj_sub_list, eqe);
1386 out:
1387 rcu_read_unlock();
1388 }
1389
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_CREATE)1390 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_CREATE)(
1391 struct uverbs_attr_bundle *attrs)
1392 {
1393 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN);
1394 int cmd_out_len = uverbs_attr_get_len(attrs,
1395 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT);
1396 int cmd_in_len = uverbs_attr_get_len(attrs,
1397 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN);
1398 void *cmd_out;
1399 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1400 attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_HANDLE);
1401 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1402 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1403 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
1404 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
1405 struct devx_obj *obj;
1406 u16 obj_type = 0;
1407 int err;
1408 int uid;
1409 u32 obj_id;
1410 u16 opcode;
1411
1412 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1413 return -EINVAL;
1414
1415 uid = devx_get_uid(c, cmd_in);
1416 if (uid < 0)
1417 return uid;
1418
1419 if (!devx_is_obj_create_cmd(cmd_in, &opcode))
1420 return -EINVAL;
1421
1422 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1423 if (IS_ERR(cmd_out))
1424 return PTR_ERR(cmd_out);
1425
1426 obj = kzalloc(sizeof(struct devx_obj), GFP_KERNEL);
1427 if (!obj)
1428 return -ENOMEM;
1429
1430 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1431 if (opcode == MLX5_CMD_OP_CREATE_MKEY) {
1432 err = devx_handle_mkey_create(dev, obj, cmd_in, cmd_in_len);
1433 if (err)
1434 goto obj_free;
1435 } else {
1436 devx_set_umem_valid(cmd_in);
1437 }
1438
1439 if (opcode == MLX5_CMD_OP_CREATE_DCT) {
1440 obj->flags |= DEVX_OBJ_FLAGS_DCT;
1441 err = mlx5_core_create_dct(dev->mdev, &obj->core_dct,
1442 cmd_in, cmd_in_len,
1443 cmd_out, cmd_out_len);
1444 } else if (opcode == MLX5_CMD_OP_CREATE_CQ) {
1445 obj->flags |= DEVX_OBJ_FLAGS_CQ;
1446 obj->core_cq.comp = devx_cq_comp;
1447 err = mlx5_core_create_cq(dev->mdev, &obj->core_cq,
1448 cmd_in, cmd_in_len, cmd_out,
1449 cmd_out_len);
1450 } else {
1451 err = mlx5_cmd_exec(dev->mdev, cmd_in,
1452 cmd_in_len,
1453 cmd_out, cmd_out_len);
1454 }
1455
1456 if (err)
1457 goto obj_free;
1458
1459 if (opcode == MLX5_CMD_OP_ALLOC_FLOW_COUNTER) {
1460 u8 bulk = MLX5_GET(alloc_flow_counter_in,
1461 cmd_in,
1462 flow_counter_bulk);
1463 obj->flow_counter_bulk_size = 128UL * bulk;
1464 }
1465
1466 uobj->object = obj;
1467 INIT_LIST_HEAD(&obj->event_sub);
1468 obj->ib_dev = dev;
1469 devx_obj_build_destroy_cmd(cmd_in, cmd_out, obj->dinbox, &obj->dinlen,
1470 &obj_id);
1471 WARN_ON(obj->dinlen > MLX5_MAX_DESTROY_INBOX_SIZE_DW * sizeof(u32));
1472
1473 err = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT, cmd_out, cmd_out_len);
1474 if (err)
1475 goto obj_destroy;
1476
1477 if (opcode == MLX5_CMD_OP_CREATE_GENERAL_OBJ)
1478 obj_type = MLX5_GET(general_obj_in_cmd_hdr, cmd_in, obj_type);
1479 obj->obj_id = get_enc_obj_id(opcode | obj_type << 16, obj_id);
1480
1481 return 0;
1482
1483 obj_destroy:
1484 if (obj->flags & DEVX_OBJ_FLAGS_DCT)
1485 mlx5_core_destroy_dct(obj->ib_dev->mdev, &obj->core_dct);
1486 else if (obj->flags & DEVX_OBJ_FLAGS_CQ)
1487 mlx5_core_destroy_cq(obj->ib_dev->mdev, &obj->core_cq);
1488 else
1489 mlx5_cmd_exec(obj->ib_dev->mdev, obj->dinbox, obj->dinlen, out,
1490 sizeof(out));
1491 obj_free:
1492 kfree(obj);
1493 return err;
1494 }
1495
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_MODIFY)1496 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_MODIFY)(
1497 struct uverbs_attr_bundle *attrs)
1498 {
1499 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN);
1500 int cmd_out_len = uverbs_attr_get_len(attrs,
1501 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT);
1502 struct ib_uobject *uobj = uverbs_attr_get_uobject(attrs,
1503 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_HANDLE);
1504 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1505 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1506 struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1507 void *cmd_out;
1508 int err;
1509 int uid;
1510
1511 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1512 return -EINVAL;
1513
1514 uid = devx_get_uid(c, cmd_in);
1515 if (uid < 0)
1516 return uid;
1517
1518 if (!devx_is_obj_modify_cmd(cmd_in))
1519 return -EINVAL;
1520
1521 if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1522 return -EINVAL;
1523
1524 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1525 if (IS_ERR(cmd_out))
1526 return PTR_ERR(cmd_out);
1527
1528 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1529 devx_set_umem_valid(cmd_in);
1530
1531 err = mlx5_cmd_exec(mdev->mdev, cmd_in,
1532 uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN),
1533 cmd_out, cmd_out_len);
1534 if (err)
1535 return err;
1536
1537 return uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT,
1538 cmd_out, cmd_out_len);
1539 }
1540
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_QUERY)1541 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_QUERY)(
1542 struct uverbs_attr_bundle *attrs)
1543 {
1544 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN);
1545 int cmd_out_len = uverbs_attr_get_len(attrs,
1546 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT);
1547 struct ib_uobject *uobj = uverbs_attr_get_uobject(attrs,
1548 MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE);
1549 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1550 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1551 void *cmd_out;
1552 int err;
1553 int uid;
1554 struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1555
1556 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1557 return -EINVAL;
1558
1559 uid = devx_get_uid(c, cmd_in);
1560 if (uid < 0)
1561 return uid;
1562
1563 if (!devx_is_obj_query_cmd(cmd_in))
1564 return -EINVAL;
1565
1566 if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1567 return -EINVAL;
1568
1569 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1570 if (IS_ERR(cmd_out))
1571 return PTR_ERR(cmd_out);
1572
1573 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1574 err = mlx5_cmd_exec(mdev->mdev, cmd_in,
1575 uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN),
1576 cmd_out, cmd_out_len);
1577 if (err)
1578 return err;
1579
1580 return uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT,
1581 cmd_out, cmd_out_len);
1582 }
1583
1584 struct devx_async_event_queue {
1585 spinlock_t lock;
1586 wait_queue_head_t poll_wait;
1587 struct list_head event_list;
1588 atomic_t bytes_in_use;
1589 u8 is_destroyed:1;
1590 };
1591
1592 struct devx_async_cmd_event_file {
1593 struct ib_uobject uobj;
1594 struct devx_async_event_queue ev_queue;
1595 struct mlx5_async_ctx async_ctx;
1596 };
1597
devx_init_event_queue(struct devx_async_event_queue * ev_queue)1598 static void devx_init_event_queue(struct devx_async_event_queue *ev_queue)
1599 {
1600 spin_lock_init(&ev_queue->lock);
1601 INIT_LIST_HEAD(&ev_queue->event_list);
1602 init_waitqueue_head(&ev_queue->poll_wait);
1603 atomic_set(&ev_queue->bytes_in_use, 0);
1604 ev_queue->is_destroyed = 0;
1605 }
1606
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC)1607 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC)(
1608 struct uverbs_attr_bundle *attrs)
1609 {
1610 struct devx_async_cmd_event_file *ev_file;
1611
1612 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1613 attrs, MLX5_IB_ATTR_DEVX_ASYNC_CMD_FD_ALLOC_HANDLE);
1614 struct mlx5_ib_dev *mdev = mlx5_udata_to_mdev(&attrs->driver_udata);
1615
1616 ev_file = container_of(uobj, struct devx_async_cmd_event_file,
1617 uobj);
1618 devx_init_event_queue(&ev_file->ev_queue);
1619 mlx5_cmd_init_async_ctx(mdev->mdev, &ev_file->async_ctx);
1620 return 0;
1621 }
1622
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC)1623 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC)(
1624 struct uverbs_attr_bundle *attrs)
1625 {
1626 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1627 attrs, MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_HANDLE);
1628 struct devx_async_event_file *ev_file;
1629 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1630 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1631 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
1632 u32 flags;
1633 int err;
1634
1635 err = uverbs_get_flags32(&flags, attrs,
1636 MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_FLAGS,
1637 MLX5_IB_UAPI_DEVX_CR_EV_CH_FLAGS_OMIT_DATA);
1638
1639 if (err)
1640 return err;
1641
1642 ev_file = container_of(uobj, struct devx_async_event_file,
1643 uobj);
1644 spin_lock_init(&ev_file->lock);
1645 INIT_LIST_HEAD(&ev_file->event_list);
1646 init_waitqueue_head(&ev_file->poll_wait);
1647 if (flags & MLX5_IB_UAPI_DEVX_CR_EV_CH_FLAGS_OMIT_DATA)
1648 ev_file->omit_data = 1;
1649 INIT_LIST_HEAD(&ev_file->subscribed_events_list);
1650 ev_file->dev = dev;
1651 get_device(&dev->ib_dev.dev);
1652 return 0;
1653 }
1654
devx_query_callback(int status,struct mlx5_async_work * context)1655 static void devx_query_callback(int status, struct mlx5_async_work *context)
1656 {
1657 struct devx_async_data *async_data =
1658 container_of(context, struct devx_async_data, cb_work);
1659 struct devx_async_cmd_event_file *ev_file = async_data->ev_file;
1660 struct devx_async_event_queue *ev_queue = &ev_file->ev_queue;
1661 unsigned long flags;
1662
1663 /*
1664 * Note that if the struct devx_async_cmd_event_file uobj begins to be
1665 * destroyed it will block at mlx5_cmd_cleanup_async_ctx() until this
1666 * routine returns, ensuring that it always remains valid here.
1667 */
1668 spin_lock_irqsave(&ev_queue->lock, flags);
1669 list_add_tail(&async_data->list, &ev_queue->event_list);
1670 spin_unlock_irqrestore(&ev_queue->lock, flags);
1671
1672 wake_up_interruptible(&ev_queue->poll_wait);
1673 }
1674
1675 #define MAX_ASYNC_BYTES_IN_USE (1024 * 1024) /* 1MB */
1676
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY)1677 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY)(
1678 struct uverbs_attr_bundle *attrs)
1679 {
1680 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs,
1681 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_CMD_IN);
1682 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1683 attrs,
1684 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_HANDLE);
1685 u16 cmd_out_len;
1686 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1687 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1688 struct ib_uobject *fd_uobj;
1689 int err;
1690 int uid;
1691 struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1692 struct devx_async_cmd_event_file *ev_file;
1693 struct devx_async_data *async_data;
1694
1695 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1696 return -EINVAL;
1697
1698 uid = devx_get_uid(c, cmd_in);
1699 if (uid < 0)
1700 return uid;
1701
1702 if (!devx_is_obj_query_cmd(cmd_in))
1703 return -EINVAL;
1704
1705 err = uverbs_get_const(&cmd_out_len, attrs,
1706 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_OUT_LEN);
1707 if (err)
1708 return err;
1709
1710 if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1711 return -EINVAL;
1712
1713 fd_uobj = uverbs_attr_get_uobject(attrs,
1714 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_FD);
1715 if (IS_ERR(fd_uobj))
1716 return PTR_ERR(fd_uobj);
1717
1718 ev_file = container_of(fd_uobj, struct devx_async_cmd_event_file,
1719 uobj);
1720
1721 if (atomic_add_return(cmd_out_len, &ev_file->ev_queue.bytes_in_use) >
1722 MAX_ASYNC_BYTES_IN_USE) {
1723 atomic_sub(cmd_out_len, &ev_file->ev_queue.bytes_in_use);
1724 return -EAGAIN;
1725 }
1726
1727 async_data = kvzalloc(struct_size(async_data, hdr.out_data,
1728 cmd_out_len), GFP_KERNEL);
1729 if (!async_data) {
1730 err = -ENOMEM;
1731 goto sub_bytes;
1732 }
1733
1734 err = uverbs_copy_from(&async_data->hdr.wr_id, attrs,
1735 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_WR_ID);
1736 if (err)
1737 goto free_async;
1738
1739 async_data->cmd_out_len = cmd_out_len;
1740 async_data->mdev = mdev;
1741 async_data->ev_file = ev_file;
1742
1743 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1744 err = mlx5_cmd_exec_cb(&ev_file->async_ctx, cmd_in,
1745 uverbs_attr_get_len(attrs,
1746 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_CMD_IN),
1747 async_data->hdr.out_data,
1748 async_data->cmd_out_len,
1749 devx_query_callback, &async_data->cb_work);
1750
1751 if (err)
1752 goto free_async;
1753
1754 return 0;
1755
1756 free_async:
1757 kvfree(async_data);
1758 sub_bytes:
1759 atomic_sub(cmd_out_len, &ev_file->ev_queue.bytes_in_use);
1760 return err;
1761 }
1762
1763 static void
subscribe_event_xa_dealloc(struct mlx5_devx_event_table * devx_event_table,u32 key_level1,bool is_level2,u32 key_level2)1764 subscribe_event_xa_dealloc(struct mlx5_devx_event_table *devx_event_table,
1765 u32 key_level1,
1766 bool is_level2,
1767 u32 key_level2)
1768 {
1769 struct devx_event *event;
1770 struct devx_obj_event *xa_val_level2;
1771
1772 /* Level 1 is valid for future use, no need to free */
1773 if (!is_level2)
1774 return;
1775
1776 event = xa_load(&devx_event_table->event_xa, key_level1);
1777 WARN_ON(!event);
1778
1779 xa_val_level2 = xa_load(&event->object_ids,
1780 key_level2);
1781 if (list_empty(&xa_val_level2->obj_sub_list)) {
1782 xa_erase(&event->object_ids,
1783 key_level2);
1784 kfree_rcu(xa_val_level2, rcu);
1785 }
1786 }
1787
1788 static int
subscribe_event_xa_alloc(struct mlx5_devx_event_table * devx_event_table,u32 key_level1,bool is_level2,u32 key_level2)1789 subscribe_event_xa_alloc(struct mlx5_devx_event_table *devx_event_table,
1790 u32 key_level1,
1791 bool is_level2,
1792 u32 key_level2)
1793 {
1794 struct devx_obj_event *obj_event;
1795 struct devx_event *event;
1796 int err;
1797
1798 event = xa_load(&devx_event_table->event_xa, key_level1);
1799 if (!event) {
1800 event = kzalloc(sizeof(*event), GFP_KERNEL);
1801 if (!event)
1802 return -ENOMEM;
1803
1804 INIT_LIST_HEAD(&event->unaffiliated_list);
1805 xa_init_flags(&event->object_ids, 0);
1806
1807 err = xa_insert(&devx_event_table->event_xa,
1808 key_level1,
1809 event,
1810 GFP_KERNEL);
1811 if (err) {
1812 kfree(event);
1813 return err;
1814 }
1815 }
1816
1817 if (!is_level2)
1818 return 0;
1819
1820 obj_event = xa_load(&event->object_ids, key_level2);
1821 if (!obj_event) {
1822 obj_event = kzalloc(sizeof(*obj_event), GFP_KERNEL);
1823 if (!obj_event)
1824 /* Level1 is valid for future use, no need to free */
1825 return -ENOMEM;
1826
1827 err = xa_insert(&event->object_ids,
1828 key_level2,
1829 obj_event,
1830 GFP_KERNEL);
1831 if (err)
1832 return err;
1833 INIT_LIST_HEAD(&obj_event->obj_sub_list);
1834 }
1835
1836 return 0;
1837 }
1838
is_valid_events_legacy(int num_events,u16 * event_type_num_list,struct devx_obj * obj)1839 static bool is_valid_events_legacy(int num_events, u16 *event_type_num_list,
1840 struct devx_obj *obj)
1841 {
1842 int i;
1843
1844 for (i = 0; i < num_events; i++) {
1845 if (obj) {
1846 if (!is_legacy_obj_event_num(event_type_num_list[i]))
1847 return false;
1848 } else if (!is_legacy_unaffiliated_event_num(
1849 event_type_num_list[i])) {
1850 return false;
1851 }
1852 }
1853
1854 return true;
1855 }
1856
1857 #define MAX_SUPP_EVENT_NUM 255
is_valid_events(struct mlx5_core_dev * dev,int num_events,u16 * event_type_num_list,struct devx_obj * obj)1858 static bool is_valid_events(struct mlx5_core_dev *dev,
1859 int num_events, u16 *event_type_num_list,
1860 struct devx_obj *obj)
1861 {
1862 __be64 *aff_events;
1863 __be64 *unaff_events;
1864 int mask_entry;
1865 int mask_bit;
1866 int i;
1867
1868 if (MLX5_CAP_GEN(dev, event_cap)) {
1869 aff_events = (__be64 *)MLX5_CAP_DEV_EVENT(dev,
1870 user_affiliated_events);
1871 unaff_events = (__be64 *)MLX5_CAP_DEV_EVENT(dev,
1872 user_unaffiliated_events);
1873 } else {
1874 return is_valid_events_legacy(num_events, event_type_num_list,
1875 obj);
1876 }
1877
1878 for (i = 0; i < num_events; i++) {
1879 if (event_type_num_list[i] > MAX_SUPP_EVENT_NUM)
1880 return false;
1881
1882 mask_entry = event_type_num_list[i] / 64;
1883 mask_bit = event_type_num_list[i] % 64;
1884
1885 if (obj) {
1886 /* CQ completion */
1887 if (event_type_num_list[i] == 0)
1888 continue;
1889
1890 if (!(be64_to_cpu(aff_events[mask_entry]) &
1891 (1ull << mask_bit)))
1892 return false;
1893
1894 continue;
1895 }
1896
1897 if (!(be64_to_cpu(unaff_events[mask_entry]) &
1898 (1ull << mask_bit)))
1899 return false;
1900 }
1901
1902 return true;
1903 }
1904
1905 #define MAX_NUM_EVENTS 16
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT)1906 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT)(
1907 struct uverbs_attr_bundle *attrs)
1908 {
1909 struct ib_uobject *devx_uobj = uverbs_attr_get_uobject(
1910 attrs,
1911 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_OBJ_HANDLE);
1912 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1913 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1914 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
1915 struct ib_uobject *fd_uobj;
1916 struct devx_obj *obj = NULL;
1917 struct devx_async_event_file *ev_file;
1918 struct mlx5_devx_event_table *devx_event_table = &dev->devx_event_table;
1919 u16 *event_type_num_list;
1920 struct devx_event_subscription *event_sub, *tmp_sub;
1921 struct list_head sub_list;
1922 int redirect_fd;
1923 bool use_eventfd = false;
1924 int num_events;
1925 u16 obj_type = 0;
1926 u64 cookie = 0;
1927 u32 obj_id = 0;
1928 int err;
1929 int i;
1930
1931 if (!c->devx_uid)
1932 return -EINVAL;
1933
1934 if (!IS_ERR(devx_uobj)) {
1935 obj = (struct devx_obj *)devx_uobj->object;
1936 if (obj)
1937 obj_id = get_dec_obj_id(obj->obj_id);
1938 }
1939
1940 fd_uobj = uverbs_attr_get_uobject(attrs,
1941 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_HANDLE);
1942 if (IS_ERR(fd_uobj))
1943 return PTR_ERR(fd_uobj);
1944
1945 ev_file = container_of(fd_uobj, struct devx_async_event_file,
1946 uobj);
1947
1948 if (uverbs_attr_is_valid(attrs,
1949 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM)) {
1950 err = uverbs_copy_from(&redirect_fd, attrs,
1951 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM);
1952 if (err)
1953 return err;
1954
1955 use_eventfd = true;
1956 }
1957
1958 if (uverbs_attr_is_valid(attrs,
1959 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE)) {
1960 if (use_eventfd)
1961 return -EINVAL;
1962
1963 err = uverbs_copy_from(&cookie, attrs,
1964 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE);
1965 if (err)
1966 return err;
1967 }
1968
1969 num_events = uverbs_attr_ptr_get_array_size(
1970 attrs, MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST,
1971 sizeof(u16));
1972
1973 if (num_events < 0)
1974 return num_events;
1975
1976 if (num_events > MAX_NUM_EVENTS)
1977 return -EINVAL;
1978
1979 event_type_num_list = uverbs_attr_get_alloced_ptr(attrs,
1980 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST);
1981
1982 if (!is_valid_events(dev->mdev, num_events, event_type_num_list, obj))
1983 return -EINVAL;
1984
1985 INIT_LIST_HEAD(&sub_list);
1986
1987 /* Protect from concurrent subscriptions to same XA entries to allow
1988 * both to succeed
1989 */
1990 mutex_lock(&devx_event_table->event_xa_lock);
1991 for (i = 0; i < num_events; i++) {
1992 u32 key_level1;
1993
1994 if (obj)
1995 obj_type = get_dec_obj_type(obj,
1996 event_type_num_list[i]);
1997 key_level1 = event_type_num_list[i] | obj_type << 16;
1998
1999 err = subscribe_event_xa_alloc(devx_event_table,
2000 key_level1,
2001 obj,
2002 obj_id);
2003 if (err)
2004 goto err;
2005
2006 event_sub = kzalloc(sizeof(*event_sub), GFP_KERNEL);
2007 if (!event_sub)
2008 goto err;
2009
2010 event_sub->cookie = cookie;
2011 event_sub->ev_file = ev_file;
2012 event_sub->xa_key_level1 = key_level1;
2013 event_sub->xa_key_level2 = obj_id;
2014 INIT_LIST_HEAD(&event_sub->obj_list);
2015
2016 list_add_tail(&event_sub->event_list, &sub_list);
2017 uverbs_uobject_get(&ev_file->uobj);
2018 if (use_eventfd) {
2019 event_sub->eventfd =
2020 eventfd_ctx_fdget(redirect_fd);
2021
2022 if (IS_ERR(event_sub->eventfd)) {
2023 err = PTR_ERR(event_sub->eventfd);
2024 event_sub->eventfd = NULL;
2025 goto err;
2026 }
2027 }
2028 }
2029
2030 /* Once all the allocations and the XA data insertions were done we
2031 * can go ahead and add all the subscriptions to the relevant lists
2032 * without concern of a failure.
2033 */
2034 list_for_each_entry_safe(event_sub, tmp_sub, &sub_list, event_list) {
2035 struct devx_event *event;
2036 struct devx_obj_event *obj_event;
2037
2038 list_del_init(&event_sub->event_list);
2039
2040 spin_lock_irq(&ev_file->lock);
2041 list_add_tail_rcu(&event_sub->file_list,
2042 &ev_file->subscribed_events_list);
2043 spin_unlock_irq(&ev_file->lock);
2044
2045 event = xa_load(&devx_event_table->event_xa,
2046 event_sub->xa_key_level1);
2047 WARN_ON(!event);
2048
2049 if (!obj) {
2050 list_add_tail_rcu(&event_sub->xa_list,
2051 &event->unaffiliated_list);
2052 continue;
2053 }
2054
2055 obj_event = xa_load(&event->object_ids, obj_id);
2056 WARN_ON(!obj_event);
2057 list_add_tail_rcu(&event_sub->xa_list,
2058 &obj_event->obj_sub_list);
2059 list_add_tail_rcu(&event_sub->obj_list,
2060 &obj->event_sub);
2061 }
2062
2063 mutex_unlock(&devx_event_table->event_xa_lock);
2064 return 0;
2065
2066 err:
2067 list_for_each_entry_safe(event_sub, tmp_sub, &sub_list, event_list) {
2068 list_del(&event_sub->event_list);
2069
2070 subscribe_event_xa_dealloc(devx_event_table,
2071 event_sub->xa_key_level1,
2072 obj,
2073 obj_id);
2074
2075 if (event_sub->eventfd)
2076 eventfd_ctx_put(event_sub->eventfd);
2077 uverbs_uobject_put(&event_sub->ev_file->uobj);
2078 kfree(event_sub);
2079 }
2080
2081 mutex_unlock(&devx_event_table->event_xa_lock);
2082 return err;
2083 }
2084
devx_umem_get(struct mlx5_ib_dev * dev,struct ib_ucontext * ucontext,struct uverbs_attr_bundle * attrs,struct devx_umem * obj)2085 static int devx_umem_get(struct mlx5_ib_dev *dev, struct ib_ucontext *ucontext,
2086 struct uverbs_attr_bundle *attrs,
2087 struct devx_umem *obj)
2088 {
2089 u64 addr;
2090 size_t size;
2091 u32 access;
2092 int npages;
2093 int err;
2094 u32 page_mask;
2095
2096 if (uverbs_copy_from(&addr, attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_ADDR) ||
2097 uverbs_copy_from(&size, attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_LEN))
2098 return -EFAULT;
2099
2100 err = uverbs_get_flags32(&access, attrs,
2101 MLX5_IB_ATTR_DEVX_UMEM_REG_ACCESS,
2102 IB_ACCESS_LOCAL_WRITE |
2103 IB_ACCESS_REMOTE_WRITE |
2104 IB_ACCESS_REMOTE_READ);
2105 if (err)
2106 return err;
2107
2108 err = ib_check_mr_access(access);
2109 if (err)
2110 return err;
2111
2112 obj->umem = ib_umem_get(ucontext, addr, size, access, 0);
2113 if (IS_ERR(obj->umem))
2114 return PTR_ERR(obj->umem);
2115
2116 mlx5_ib_cont_pages(obj->umem, obj->umem->address,
2117 MLX5_MKEY_PAGE_SHIFT_MASK, &npages,
2118 &obj->page_shift, &obj->ncont, NULL);
2119
2120 if (!npages) {
2121 ib_umem_release(obj->umem);
2122 return -EINVAL;
2123 }
2124
2125 page_mask = (1 << obj->page_shift) - 1;
2126 obj->page_offset = obj->umem->address & page_mask;
2127
2128 return 0;
2129 }
2130
devx_umem_reg_cmd_alloc(struct uverbs_attr_bundle * attrs,struct devx_umem * obj,struct devx_umem_reg_cmd * cmd)2131 static int devx_umem_reg_cmd_alloc(struct uverbs_attr_bundle *attrs,
2132 struct devx_umem *obj,
2133 struct devx_umem_reg_cmd *cmd)
2134 {
2135 cmd->inlen = MLX5_ST_SZ_BYTES(create_umem_in) +
2136 (MLX5_ST_SZ_BYTES(mtt) * obj->ncont);
2137 cmd->in = uverbs_zalloc(attrs, cmd->inlen);
2138 return PTR_ERR_OR_ZERO(cmd->in);
2139 }
2140
devx_umem_reg_cmd_build(struct mlx5_ib_dev * dev,struct devx_umem * obj,struct devx_umem_reg_cmd * cmd)2141 static void devx_umem_reg_cmd_build(struct mlx5_ib_dev *dev,
2142 struct devx_umem *obj,
2143 struct devx_umem_reg_cmd *cmd)
2144 {
2145 void *umem;
2146 __be64 *mtt;
2147
2148 umem = MLX5_ADDR_OF(create_umem_in, cmd->in, umem);
2149 mtt = (__be64 *)MLX5_ADDR_OF(umem, umem, mtt);
2150
2151 MLX5_SET(create_umem_in, cmd->in, opcode, MLX5_CMD_OP_CREATE_UMEM);
2152 MLX5_SET64(umem, umem, num_of_mtt, obj->ncont);
2153 MLX5_SET(umem, umem, log_page_size, obj->page_shift -
2154 MLX5_ADAPTER_PAGE_SHIFT);
2155 MLX5_SET(umem, umem, page_offset, obj->page_offset);
2156 mlx5_ib_populate_pas(dev, obj->umem, obj->page_shift, mtt,
2157 (obj->umem->writable ? MLX5_IB_MTT_WRITE : 0) |
2158 MLX5_IB_MTT_READ);
2159 }
2160
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_UMEM_REG)2161 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_UMEM_REG)(
2162 struct uverbs_attr_bundle *attrs)
2163 {
2164 struct devx_umem_reg_cmd cmd;
2165 struct devx_umem *obj;
2166 struct ib_uobject *uobj = uverbs_attr_get_uobject(
2167 attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_HANDLE);
2168 u32 obj_id;
2169 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
2170 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
2171 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
2172 int err;
2173
2174 if (!c->devx_uid)
2175 return -EINVAL;
2176
2177 obj = kzalloc(sizeof(struct devx_umem), GFP_KERNEL);
2178 if (!obj)
2179 return -ENOMEM;
2180
2181 err = devx_umem_get(dev, &c->ibucontext, attrs, obj);
2182 if (err)
2183 goto err_obj_free;
2184
2185 err = devx_umem_reg_cmd_alloc(attrs, obj, &cmd);
2186 if (err)
2187 goto err_umem_release;
2188
2189 devx_umem_reg_cmd_build(dev, obj, &cmd);
2190
2191 MLX5_SET(create_umem_in, cmd.in, uid, c->devx_uid);
2192 err = mlx5_cmd_exec(dev->mdev, cmd.in, cmd.inlen, cmd.out,
2193 sizeof(cmd.out));
2194 if (err)
2195 goto err_umem_release;
2196
2197 obj->mdev = dev->mdev;
2198 uobj->object = obj;
2199 devx_obj_build_destroy_cmd(cmd.in, cmd.out, obj->dinbox, &obj->dinlen, &obj_id);
2200 err = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_OUT_ID, &obj_id, sizeof(obj_id));
2201 if (err)
2202 goto err_umem_destroy;
2203
2204 return 0;
2205
2206 err_umem_destroy:
2207 mlx5_cmd_exec(obj->mdev, obj->dinbox, obj->dinlen, cmd.out, sizeof(cmd.out));
2208 err_umem_release:
2209 ib_umem_release(obj->umem);
2210 err_obj_free:
2211 kfree(obj);
2212 return err;
2213 }
2214
devx_umem_cleanup(struct ib_uobject * uobject,enum rdma_remove_reason why,struct uverbs_attr_bundle * attrs)2215 static int devx_umem_cleanup(struct ib_uobject *uobject,
2216 enum rdma_remove_reason why,
2217 struct uverbs_attr_bundle *attrs)
2218 {
2219 struct devx_umem *obj = uobject->object;
2220 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
2221 int err;
2222
2223 err = mlx5_cmd_exec(obj->mdev, obj->dinbox, obj->dinlen, out, sizeof(out));
2224 if (ib_is_destroy_retryable(err, why, uobject))
2225 return err;
2226
2227 ib_umem_release(obj->umem);
2228 kfree(obj);
2229 return 0;
2230 }
2231
is_unaffiliated_event(struct mlx5_core_dev * dev,unsigned long event_type)2232 static bool is_unaffiliated_event(struct mlx5_core_dev *dev,
2233 unsigned long event_type)
2234 {
2235 __be64 *unaff_events;
2236 int mask_entry;
2237 int mask_bit;
2238
2239 if (!MLX5_CAP_GEN(dev, event_cap))
2240 return is_legacy_unaffiliated_event_num(event_type);
2241
2242 unaff_events = (__be64 *)MLX5_CAP_DEV_EVENT(dev,
2243 user_unaffiliated_events);
2244 WARN_ON(event_type > MAX_SUPP_EVENT_NUM);
2245
2246 mask_entry = event_type / 64;
2247 mask_bit = event_type % 64;
2248
2249 if (!(be64_to_cpu(unaff_events[mask_entry]) & (1ull << mask_bit)))
2250 return false;
2251
2252 return true;
2253 }
2254
devx_get_obj_id_from_event(unsigned long event_type,void * data)2255 static u32 devx_get_obj_id_from_event(unsigned long event_type, void *data)
2256 {
2257 struct mlx5_eqe *eqe = data;
2258 u32 obj_id = 0;
2259
2260 switch (event_type) {
2261 case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
2262 case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
2263 case MLX5_EVENT_TYPE_PATH_MIG:
2264 case MLX5_EVENT_TYPE_COMM_EST:
2265 case MLX5_EVENT_TYPE_SQ_DRAINED:
2266 case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
2267 case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
2268 case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
2269 case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
2270 case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
2271 obj_id = be32_to_cpu(eqe->data.qp_srq.qp_srq_n) & 0xffffff;
2272 break;
2273 case MLX5_EVENT_TYPE_XRQ_ERROR:
2274 obj_id = be32_to_cpu(eqe->data.xrq_err.type_xrqn) & 0xffffff;
2275 break;
2276 case MLX5_EVENT_TYPE_DCT_DRAINED:
2277 case MLX5_EVENT_TYPE_DCT_KEY_VIOLATION:
2278 obj_id = be32_to_cpu(eqe->data.dct.dctn) & 0xffffff;
2279 break;
2280 case MLX5_EVENT_TYPE_CQ_ERROR:
2281 obj_id = be32_to_cpu(eqe->data.cq_err.cqn) & 0xffffff;
2282 break;
2283 default:
2284 obj_id = MLX5_GET(affiliated_event_header, &eqe->data, obj_id);
2285 break;
2286 }
2287
2288 return obj_id;
2289 }
2290
deliver_event(struct devx_event_subscription * event_sub,const void * data)2291 static int deliver_event(struct devx_event_subscription *event_sub,
2292 const void *data)
2293 {
2294 struct devx_async_event_file *ev_file;
2295 struct devx_async_event_data *event_data;
2296 unsigned long flags;
2297
2298 ev_file = event_sub->ev_file;
2299
2300 if (ev_file->omit_data) {
2301 spin_lock_irqsave(&ev_file->lock, flags);
2302 if (!list_empty(&event_sub->event_list) ||
2303 ev_file->is_destroyed) {
2304 spin_unlock_irqrestore(&ev_file->lock, flags);
2305 return 0;
2306 }
2307
2308 list_add_tail(&event_sub->event_list, &ev_file->event_list);
2309 spin_unlock_irqrestore(&ev_file->lock, flags);
2310 wake_up_interruptible(&ev_file->poll_wait);
2311 return 0;
2312 }
2313
2314 event_data = kzalloc(sizeof(*event_data) + sizeof(struct mlx5_eqe),
2315 GFP_ATOMIC);
2316 if (!event_data) {
2317 spin_lock_irqsave(&ev_file->lock, flags);
2318 ev_file->is_overflow_err = 1;
2319 spin_unlock_irqrestore(&ev_file->lock, flags);
2320 return -ENOMEM;
2321 }
2322
2323 event_data->hdr.cookie = event_sub->cookie;
2324 memcpy(event_data->hdr.out_data, data, sizeof(struct mlx5_eqe));
2325
2326 spin_lock_irqsave(&ev_file->lock, flags);
2327 if (!ev_file->is_destroyed)
2328 list_add_tail(&event_data->list, &ev_file->event_list);
2329 else
2330 kfree(event_data);
2331 spin_unlock_irqrestore(&ev_file->lock, flags);
2332 wake_up_interruptible(&ev_file->poll_wait);
2333
2334 return 0;
2335 }
2336
dispatch_event_fd(struct list_head * fd_list,const void * data)2337 static void dispatch_event_fd(struct list_head *fd_list,
2338 const void *data)
2339 {
2340 struct devx_event_subscription *item;
2341
2342 list_for_each_entry_rcu(item, fd_list, xa_list) {
2343 if (item->eventfd != NULL)
2344 eventfd_signal(item->eventfd);
2345 else
2346 deliver_event(item, data);
2347 }
2348 }
2349
mlx5_devx_event_notifier(struct mlx5_core_dev * mdev,uint8_t event_type,void * data)2350 static bool mlx5_devx_event_notifier(struct mlx5_core_dev *mdev,
2351 uint8_t event_type, void *data)
2352 {
2353 struct mlx5_ib_dev *dev;
2354 struct mlx5_devx_event_table *table;
2355 struct devx_event *event;
2356 struct devx_obj_event *obj_event;
2357 u16 obj_type = 0;
2358 bool is_unaffiliated;
2359 u32 obj_id;
2360
2361 /*
2362 * Command completions and page requests must be processed by the
2363 * mlx5_core default EQ handler. Returning true here tells
2364 * mlx5_eq_int() the event was consumed and skips core processing,
2365 * which stalls the firmware command interface and page supply and
2366 * wedges the device. Return false so the core handler runs for
2367 * these frequent kernel events.
2368 */
2369 if (event_type == MLX5_EVENT_TYPE_CMD ||
2370 event_type == MLX5_EVENT_TYPE_PAGE_REQUEST)
2371 return false;
2372
2373 dev = READ_ONCE(mdev->priv.eq_table.dev);
2374 if (dev == NULL)
2375 return false;
2376 table = &dev->devx_event_table;
2377 is_unaffiliated = is_unaffiliated_event(dev->mdev, event_type);
2378
2379 if (!is_unaffiliated)
2380 obj_type = get_event_obj_type(event_type, data);
2381
2382 rcu_read_lock();
2383 event = xa_load(&table->event_xa, event_type | (obj_type << 16));
2384 if (!event) {
2385 rcu_read_unlock();
2386 return false;
2387 }
2388
2389 if (is_unaffiliated) {
2390 dispatch_event_fd(&event->unaffiliated_list, data);
2391 rcu_read_unlock();
2392 return true;
2393 }
2394
2395 obj_id = devx_get_obj_id_from_event(event_type, data);
2396 obj_event = xa_load(&event->object_ids, obj_id);
2397 if (!obj_event) {
2398 rcu_read_unlock();
2399 return false;
2400 }
2401
2402 dispatch_event_fd(&obj_event->obj_sub_list, data);
2403
2404 rcu_read_unlock();
2405 return true;
2406 }
2407
mlx5_ib_devx_init_event_table(struct mlx5_ib_dev * dev)2408 void mlx5_ib_devx_init_event_table(struct mlx5_ib_dev *dev)
2409 {
2410 struct mlx5_devx_event_table *table = &dev->devx_event_table;
2411
2412 xa_init_flags(&table->event_xa, 0);
2413 mutex_init(&table->event_xa_lock);
2414 /*
2415 * Publish dev before cb. The EQ interrupt handler loads cb with
2416 * acquire semantics and the notifier then dereferences eq_table.dev,
2417 * so dev must be visible to that handler once cb is observed.
2418 */
2419 WRITE_ONCE(dev->mdev->priv.eq_table.dev, dev);
2420 smp_store_release(&dev->mdev->priv.eq_table.cb,
2421 mlx5_devx_event_notifier);
2422 }
2423
mlx5_ib_devx_cleanup_event_table(struct mlx5_ib_dev * dev)2424 void mlx5_ib_devx_cleanup_event_table(struct mlx5_ib_dev *dev)
2425 {
2426 struct mlx5_devx_event_table *table = &dev->devx_event_table;
2427 struct devx_event_subscription *sub, *tmp;
2428 struct devx_event *event;
2429 void *entry;
2430 unsigned long id;
2431
2432 /*
2433 * Stop new dispatch by clearing cb, then wait for any in-flight EQ
2434 * callback to finish its RCU read section before clearing dev and
2435 * tearing down the event table.
2436 */
2437 WRITE_ONCE(dev->mdev->priv.eq_table.cb, NULL);
2438 synchronize_rcu();
2439 WRITE_ONCE(dev->mdev->priv.eq_table.dev, NULL);
2440 mutex_lock(&dev->devx_event_table.event_xa_lock);
2441 xa_for_each(&table->event_xa, id, entry) {
2442 event = entry;
2443 list_for_each_entry_safe(sub, tmp, &event->unaffiliated_list,
2444 xa_list)
2445 devx_cleanup_subscription(dev, sub);
2446 kfree(entry);
2447 }
2448 mutex_unlock(&dev->devx_event_table.event_xa_lock);
2449 xa_destroy(&table->event_xa);
2450 }
2451
devx_async_cmd_event_read(struct file * filp,char __user * buf,size_t count,loff_t * pos)2452 static ssize_t devx_async_cmd_event_read(struct file *filp, char __user *buf,
2453 size_t count, loff_t *pos)
2454 {
2455 struct devx_async_cmd_event_file *comp_ev_file = filp->private_data;
2456 struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2457 struct devx_async_data *event;
2458 int ret = 0;
2459 size_t eventsz;
2460
2461 spin_lock_irq(&ev_queue->lock);
2462
2463 while (list_empty(&ev_queue->event_list)) {
2464 spin_unlock_irq(&ev_queue->lock);
2465
2466 if (filp->f_flags & O_NONBLOCK)
2467 return -EAGAIN;
2468
2469 if (wait_event_interruptible(
2470 ev_queue->poll_wait,
2471 (!list_empty(&ev_queue->event_list) ||
2472 ev_queue->is_destroyed))) {
2473 return -ERESTARTSYS;
2474 }
2475
2476 spin_lock_irq(&ev_queue->lock);
2477 if (ev_queue->is_destroyed) {
2478 spin_unlock_irq(&ev_queue->lock);
2479 return -EIO;
2480 }
2481 }
2482
2483 event = list_entry(ev_queue->event_list.next,
2484 struct devx_async_data, list);
2485 eventsz = event->cmd_out_len +
2486 sizeof(struct mlx5_ib_uapi_devx_async_cmd_hdr);
2487
2488 if (eventsz > count) {
2489 spin_unlock_irq(&ev_queue->lock);
2490 return -ENOSPC;
2491 }
2492
2493 list_del(ev_queue->event_list.next);
2494 spin_unlock_irq(&ev_queue->lock);
2495
2496 if (copy_to_user(buf, &event->hdr, eventsz))
2497 ret = -EFAULT;
2498 else
2499 ret = eventsz;
2500
2501 atomic_sub(event->cmd_out_len, &ev_queue->bytes_in_use);
2502 kvfree(event);
2503 return ret;
2504 }
2505
devx_async_cmd_event_poll(struct file * filp,struct poll_table_struct * wait)2506 static __poll_t devx_async_cmd_event_poll(struct file *filp,
2507 struct poll_table_struct *wait)
2508 {
2509 struct devx_async_cmd_event_file *comp_ev_file = filp->private_data;
2510 struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2511 __poll_t pollflags = 0;
2512
2513 poll_wait(filp, &ev_queue->poll_wait, wait);
2514
2515 spin_lock_irq(&ev_queue->lock);
2516 if (ev_queue->is_destroyed)
2517 pollflags = POLLIN | POLLRDNORM | POLLHUP;
2518 else if (!list_empty(&ev_queue->event_list))
2519 pollflags = POLLIN | POLLRDNORM;
2520 spin_unlock_irq(&ev_queue->lock);
2521
2522 return pollflags;
2523 }
2524
2525 static const struct file_operations devx_async_cmd_event_fops = {
2526 .owner = THIS_MODULE,
2527 .read = devx_async_cmd_event_read,
2528 .poll = devx_async_cmd_event_poll,
2529 .release = uverbs_uobject_fd_release,
2530 .llseek = no_llseek,
2531 };
2532
devx_async_event_read(struct file * filp,char __user * buf,size_t count,loff_t * pos)2533 static ssize_t devx_async_event_read(struct file *filp, char __user *buf,
2534 size_t count, loff_t *pos)
2535 {
2536 struct devx_async_event_file *ev_file = filp->private_data;
2537 struct devx_event_subscription *event_sub;
2538 struct devx_async_event_data *uninitialized_var(event);
2539 int ret = 0;
2540 size_t eventsz;
2541 bool omit_data;
2542 void *event_data;
2543
2544 omit_data = ev_file->omit_data;
2545
2546 spin_lock_irq(&ev_file->lock);
2547
2548 if (ev_file->is_overflow_err) {
2549 ev_file->is_overflow_err = 0;
2550 spin_unlock_irq(&ev_file->lock);
2551 return -EOVERFLOW;
2552 }
2553
2554
2555 while (list_empty(&ev_file->event_list)) {
2556 spin_unlock_irq(&ev_file->lock);
2557
2558 if (filp->f_flags & O_NONBLOCK)
2559 return -EAGAIN;
2560
2561 if (wait_event_interruptible(ev_file->poll_wait,
2562 (!list_empty(&ev_file->event_list) ||
2563 ev_file->is_destroyed))) {
2564 return -ERESTARTSYS;
2565 }
2566
2567 spin_lock_irq(&ev_file->lock);
2568 if (ev_file->is_destroyed) {
2569 spin_unlock_irq(&ev_file->lock);
2570 return -EIO;
2571 }
2572 }
2573
2574 if (omit_data) {
2575 event_sub = list_first_entry(&ev_file->event_list,
2576 struct devx_event_subscription,
2577 event_list);
2578 eventsz = sizeof(event_sub->cookie);
2579 event_data = &event_sub->cookie;
2580 } else {
2581 event = list_first_entry(&ev_file->event_list,
2582 struct devx_async_event_data, list);
2583 eventsz = sizeof(struct mlx5_eqe) +
2584 sizeof(struct mlx5_ib_uapi_devx_async_event_hdr);
2585 event_data = &event->hdr;
2586 }
2587
2588 if (eventsz > count) {
2589 spin_unlock_irq(&ev_file->lock);
2590 return -EINVAL;
2591 }
2592
2593 if (omit_data)
2594 list_del_init(&event_sub->event_list);
2595 else
2596 list_del(&event->list);
2597
2598 spin_unlock_irq(&ev_file->lock);
2599
2600 if (copy_to_user(buf, event_data, eventsz))
2601 /* This points to an application issue, not a kernel concern */
2602 ret = -EFAULT;
2603 else
2604 ret = eventsz;
2605
2606 if (!omit_data)
2607 kfree(event);
2608 return ret;
2609 }
2610
devx_async_event_poll(struct file * filp,struct poll_table_struct * wait)2611 static __poll_t devx_async_event_poll(struct file *filp,
2612 struct poll_table_struct *wait)
2613 {
2614 struct devx_async_event_file *ev_file = filp->private_data;
2615 __poll_t pollflags = 0;
2616
2617 poll_wait(filp, &ev_file->poll_wait, wait);
2618
2619 spin_lock_irq(&ev_file->lock);
2620 if (ev_file->is_destroyed)
2621 pollflags = POLLIN | POLLRDNORM | POLLHUP;
2622 else if (!list_empty(&ev_file->event_list))
2623 pollflags = POLLIN | POLLRDNORM;
2624 spin_unlock_irq(&ev_file->lock);
2625
2626 return pollflags;
2627 }
2628
devx_free_subscription(struct rcu_head * rcu)2629 static void devx_free_subscription(struct rcu_head *rcu)
2630 {
2631 struct devx_event_subscription *event_sub =
2632 container_of(rcu, struct devx_event_subscription, rcu);
2633
2634 if (event_sub->eventfd)
2635 eventfd_ctx_put(event_sub->eventfd);
2636 uverbs_uobject_put(&event_sub->ev_file->uobj);
2637 kfree(event_sub);
2638 }
2639
2640 static const struct file_operations devx_async_event_fops = {
2641 .owner = THIS_MODULE,
2642 .read = devx_async_event_read,
2643 .poll = devx_async_event_poll,
2644 .release = uverbs_uobject_fd_release,
2645 .llseek = no_llseek,
2646 };
2647
devx_async_cmd_event_destroy_uobj(struct ib_uobject * uobj,enum rdma_remove_reason why)2648 static int devx_async_cmd_event_destroy_uobj(struct ib_uobject *uobj,
2649 enum rdma_remove_reason why)
2650 {
2651 struct devx_async_cmd_event_file *comp_ev_file =
2652 container_of(uobj, struct devx_async_cmd_event_file,
2653 uobj);
2654 struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2655 struct devx_async_data *entry, *tmp;
2656
2657 spin_lock_irq(&ev_queue->lock);
2658 ev_queue->is_destroyed = 1;
2659 spin_unlock_irq(&ev_queue->lock);
2660 wake_up_interruptible(&ev_queue->poll_wait);
2661
2662 mlx5_cmd_cleanup_async_ctx(&comp_ev_file->async_ctx);
2663
2664 spin_lock_irq(&comp_ev_file->ev_queue.lock);
2665 list_for_each_entry_safe(entry, tmp,
2666 &comp_ev_file->ev_queue.event_list, list) {
2667 list_del(&entry->list);
2668 kvfree(entry);
2669 }
2670 spin_unlock_irq(&comp_ev_file->ev_queue.lock);
2671 return 0;
2672 };
2673
devx_async_event_destroy_uobj(struct ib_uobject * uobj,enum rdma_remove_reason why)2674 static int devx_async_event_destroy_uobj(struct ib_uobject *uobj,
2675 enum rdma_remove_reason why)
2676 {
2677 struct devx_async_event_file *ev_file =
2678 container_of(uobj, struct devx_async_event_file,
2679 uobj);
2680 struct devx_event_subscription *event_sub, *event_sub_tmp;
2681 struct mlx5_ib_dev *dev = ev_file->dev;
2682
2683 spin_lock_irq(&ev_file->lock);
2684 ev_file->is_destroyed = 1;
2685
2686 /* free the pending events allocation */
2687 if (ev_file->omit_data) {
2688 struct devx_event_subscription *event_sub, *tmp;
2689
2690 list_for_each_entry_safe(event_sub, tmp, &ev_file->event_list,
2691 event_list)
2692 list_del_init(&event_sub->event_list);
2693
2694 } else {
2695 struct devx_async_event_data *entry, *tmp;
2696
2697 list_for_each_entry_safe(entry, tmp, &ev_file->event_list,
2698 list) {
2699 list_del(&entry->list);
2700 kfree(entry);
2701 }
2702 }
2703
2704 spin_unlock_irq(&ev_file->lock);
2705 wake_up_interruptible(&ev_file->poll_wait);
2706
2707 mutex_lock(&dev->devx_event_table.event_xa_lock);
2708 /* delete the subscriptions which are related to this FD */
2709 list_for_each_entry_safe(event_sub, event_sub_tmp,
2710 &ev_file->subscribed_events_list, file_list) {
2711 devx_cleanup_subscription(dev, event_sub);
2712 list_del_rcu(&event_sub->file_list);
2713 /* subscription may not be used by the read API any more */
2714 call_rcu(&event_sub->rcu, devx_free_subscription);
2715 }
2716 mutex_unlock(&dev->devx_event_table.event_xa_lock);
2717
2718 put_device(&dev->ib_dev.dev);
2719 return 0;
2720 };
2721
2722 DECLARE_UVERBS_NAMED_METHOD(
2723 MLX5_IB_METHOD_DEVX_UMEM_REG,
2724 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_UMEM_REG_HANDLE,
2725 MLX5_IB_OBJECT_DEVX_UMEM,
2726 UVERBS_ACCESS_NEW,
2727 UA_MANDATORY),
2728 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_ADDR,
2729 UVERBS_ATTR_TYPE(u64),
2730 UA_MANDATORY),
2731 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_LEN,
2732 UVERBS_ATTR_TYPE(u64),
2733 UA_MANDATORY),
2734 UVERBS_ATTR_FLAGS_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_ACCESS,
2735 enum ib_access_flags),
2736 UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_UMEM_REG_OUT_ID,
2737 UVERBS_ATTR_TYPE(u32),
2738 UA_MANDATORY));
2739
2740 DECLARE_UVERBS_NAMED_METHOD_DESTROY(
2741 MLX5_IB_METHOD_DEVX_UMEM_DEREG,
2742 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_UMEM_DEREG_HANDLE,
2743 MLX5_IB_OBJECT_DEVX_UMEM,
2744 UVERBS_ACCESS_DESTROY,
2745 UA_MANDATORY));
2746
2747 DECLARE_UVERBS_NAMED_METHOD(
2748 MLX5_IB_METHOD_DEVX_QUERY_EQN,
2749 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_QUERY_EQN_USER_VEC,
2750 UVERBS_ATTR_TYPE(u32),
2751 UA_MANDATORY),
2752 UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_QUERY_EQN_DEV_EQN,
2753 UVERBS_ATTR_TYPE(u32),
2754 UA_MANDATORY));
2755
2756 DECLARE_UVERBS_NAMED_METHOD(
2757 MLX5_IB_METHOD_DEVX_QUERY_UAR,
2758 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_QUERY_UAR_USER_IDX,
2759 UVERBS_ATTR_TYPE(u32),
2760 UA_MANDATORY),
2761 UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_QUERY_UAR_DEV_IDX,
2762 UVERBS_ATTR_TYPE(u32),
2763 UA_MANDATORY));
2764
2765 DECLARE_UVERBS_NAMED_METHOD(
2766 MLX5_IB_METHOD_DEVX_OTHER,
2767 UVERBS_ATTR_PTR_IN(
2768 MLX5_IB_ATTR_DEVX_OTHER_CMD_IN,
2769 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2770 UA_MANDATORY,
2771 UA_ALLOC_AND_COPY),
2772 UVERBS_ATTR_PTR_OUT(
2773 MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT,
2774 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2775 UA_MANDATORY));
2776
2777 DECLARE_UVERBS_NAMED_METHOD(
2778 MLX5_IB_METHOD_DEVX_OBJ_CREATE,
2779 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_CREATE_HANDLE,
2780 MLX5_IB_OBJECT_DEVX_OBJ,
2781 UVERBS_ACCESS_NEW,
2782 UA_MANDATORY),
2783 UVERBS_ATTR_PTR_IN(
2784 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN,
2785 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2786 UA_MANDATORY,
2787 UA_ALLOC_AND_COPY),
2788 UVERBS_ATTR_PTR_OUT(
2789 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT,
2790 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2791 UA_MANDATORY));
2792
2793 DECLARE_UVERBS_NAMED_METHOD_DESTROY(
2794 MLX5_IB_METHOD_DEVX_OBJ_DESTROY,
2795 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_DESTROY_HANDLE,
2796 MLX5_IB_OBJECT_DEVX_OBJ,
2797 UVERBS_ACCESS_DESTROY,
2798 UA_MANDATORY));
2799
2800 DECLARE_UVERBS_NAMED_METHOD(
2801 MLX5_IB_METHOD_DEVX_OBJ_MODIFY,
2802 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_MODIFY_HANDLE,
2803 UVERBS_IDR_ANY_OBJECT,
2804 UVERBS_ACCESS_WRITE,
2805 UA_MANDATORY),
2806 UVERBS_ATTR_PTR_IN(
2807 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN,
2808 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2809 UA_MANDATORY,
2810 UA_ALLOC_AND_COPY),
2811 UVERBS_ATTR_PTR_OUT(
2812 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT,
2813 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2814 UA_MANDATORY));
2815
2816 DECLARE_UVERBS_NAMED_METHOD(
2817 MLX5_IB_METHOD_DEVX_OBJ_QUERY,
2818 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE,
2819 UVERBS_IDR_ANY_OBJECT,
2820 UVERBS_ACCESS_READ,
2821 UA_MANDATORY),
2822 UVERBS_ATTR_PTR_IN(
2823 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN,
2824 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2825 UA_MANDATORY,
2826 UA_ALLOC_AND_COPY),
2827 UVERBS_ATTR_PTR_OUT(
2828 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT,
2829 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2830 UA_MANDATORY));
2831
2832 DECLARE_UVERBS_NAMED_METHOD(
2833 MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY,
2834 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE,
2835 UVERBS_IDR_ANY_OBJECT,
2836 UVERBS_ACCESS_READ,
2837 UA_MANDATORY),
2838 UVERBS_ATTR_PTR_IN(
2839 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN,
2840 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2841 UA_MANDATORY,
2842 UA_ALLOC_AND_COPY),
2843 UVERBS_ATTR_CONST_IN(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_OUT_LEN,
2844 u16, UA_MANDATORY),
2845 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_FD,
2846 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
2847 UVERBS_ACCESS_READ,
2848 UA_MANDATORY),
2849 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_WR_ID,
2850 UVERBS_ATTR_TYPE(u64),
2851 UA_MANDATORY));
2852
2853 DECLARE_UVERBS_NAMED_METHOD(
2854 MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT,
2855 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_HANDLE,
2856 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
2857 UVERBS_ACCESS_READ,
2858 UA_MANDATORY),
2859 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_OBJ_HANDLE,
2860 MLX5_IB_OBJECT_DEVX_OBJ,
2861 UVERBS_ACCESS_READ,
2862 UA_OPTIONAL),
2863 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST,
2864 UVERBS_ATTR_MIN_SIZE(sizeof(u16)),
2865 UA_MANDATORY,
2866 UA_ALLOC_AND_COPY),
2867 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE,
2868 UVERBS_ATTR_TYPE(u64),
2869 UA_OPTIONAL),
2870 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM,
2871 UVERBS_ATTR_TYPE(u32),
2872 UA_OPTIONAL));
2873
2874 DECLARE_UVERBS_GLOBAL_METHODS(MLX5_IB_OBJECT_DEVX,
2875 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OTHER),
2876 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_QUERY_UAR),
2877 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_QUERY_EQN),
2878 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT));
2879
2880 DECLARE_UVERBS_NAMED_OBJECT(MLX5_IB_OBJECT_DEVX_OBJ,
2881 UVERBS_TYPE_ALLOC_IDR(devx_obj_cleanup),
2882 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_CREATE),
2883 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_DESTROY),
2884 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_MODIFY),
2885 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_QUERY),
2886 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY));
2887
2888 DECLARE_UVERBS_NAMED_OBJECT(MLX5_IB_OBJECT_DEVX_UMEM,
2889 UVERBS_TYPE_ALLOC_IDR(devx_umem_cleanup),
2890 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_UMEM_REG),
2891 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_UMEM_DEREG));
2892
2893
2894 DECLARE_UVERBS_NAMED_METHOD(
2895 MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC,
2896 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_ASYNC_CMD_FD_ALLOC_HANDLE,
2897 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
2898 UVERBS_ACCESS_NEW,
2899 UA_MANDATORY));
2900
2901 DECLARE_UVERBS_NAMED_OBJECT(
2902 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
2903 UVERBS_TYPE_ALLOC_FD(sizeof(struct devx_async_cmd_event_file),
2904 devx_async_cmd_event_destroy_uobj,
2905 &devx_async_cmd_event_fops, "[devx_async_cmd]",
2906 FMODE_READ),
2907 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC));
2908
2909 DECLARE_UVERBS_NAMED_METHOD(
2910 MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC,
2911 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_HANDLE,
2912 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
2913 UVERBS_ACCESS_NEW,
2914 UA_MANDATORY),
2915 UVERBS_ATTR_FLAGS_IN(MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_FLAGS,
2916 enum mlx5_ib_uapi_devx_create_event_channel_flags,
2917 UA_MANDATORY));
2918
2919 DECLARE_UVERBS_NAMED_OBJECT(
2920 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
2921 UVERBS_TYPE_ALLOC_FD(sizeof(struct devx_async_event_file),
2922 devx_async_event_destroy_uobj,
2923 &devx_async_event_fops, "[devx_async_event]",
2924 FMODE_READ),
2925 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC));
2926
devx_is_supported(struct ib_device * device)2927 static bool devx_is_supported(struct ib_device *device)
2928 {
2929 struct mlx5_ib_dev *dev = to_mdev(device);
2930
2931 return MLX5_CAP_GEN(dev->mdev, log_max_uctx);
2932 }
2933
2934 const struct uapi_definition mlx5_ib_devx_defs[] = {
2935 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
2936 MLX5_IB_OBJECT_DEVX,
2937 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
2938 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
2939 MLX5_IB_OBJECT_DEVX_OBJ,
2940 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
2941 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
2942 MLX5_IB_OBJECT_DEVX_UMEM,
2943 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
2944 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
2945 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
2946 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
2947 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
2948 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
2949 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
2950 {},
2951 };
2952