1 /* 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved. 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved. 4 * 5 * This program is free software; you may redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; version 2 of the License. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 16 * SOFTWARE. 17 * 18 */ 19 20 #include <linux/module.h> 21 #include <linux/kernel.h> 22 #include <linux/string.h> 23 #include <linux/errno.h> 24 #include <linux/types.h> 25 #include <linux/init.h> 26 #include <linux/interrupt.h> 27 #include <linux/workqueue.h> 28 #include <linux/pci.h> 29 #include <linux/netdevice.h> 30 #include <linux/etherdevice.h> 31 #include <linux/if.h> 32 #include <linux/if_ether.h> 33 #include <linux/if_vlan.h> 34 #include <linux/in.h> 35 #include <linux/ip.h> 36 #include <linux/ipv6.h> 37 #include <linux/tcp.h> 38 #include <linux/rtnetlink.h> 39 #include <linux/prefetch.h> 40 #include <net/ip6_checksum.h> 41 #include <linux/ktime.h> 42 #include <linux/numa.h> 43 #ifdef CONFIG_RFS_ACCEL 44 #include <linux/cpu_rmap.h> 45 #endif 46 #include <linux/crash_dump.h> 47 #include <net/busy_poll.h> 48 #include <net/vxlan.h> 49 #include <net/netdev_queues.h> 50 51 #include "cq_enet_desc.h" 52 #include "vnic_dev.h" 53 #include "vnic_intr.h" 54 #include "vnic_stats.h" 55 #include "vnic_vic.h" 56 #include "enic_res.h" 57 #include "enic.h" 58 #include "enic_dev.h" 59 #include "enic_pp.h" 60 #include "enic_clsf.h" 61 #include "enic_rq.h" 62 #include "enic_wq.h" 63 64 #define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ) 65 66 #define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */ 67 #define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */ 68 #define PCI_DEVICE_ID_CISCO_VIC_ENET_VF 0x0071 /* enet SRIOV VF */ 69 #define PCI_DEVICE_ID_CISCO_VIC_ENET_VF_V2 0x02b7 /* enet SRIOV V2 VF */ 70 #define PCI_DEVICE_ID_CISCO_VIC_ENET_VF_USNIC 0x00cf /* enet USNIC VF */ 71 72 /* Supported devices */ 73 static const struct pci_device_id enic_id_table[] = { 74 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) }, 75 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) }, 76 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) }, 77 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF_V2) }, 78 { 0, } /* end of table */ 79 }; 80 81 MODULE_DESCRIPTION(DRV_DESCRIPTION); 82 MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>"); 83 MODULE_LICENSE("GPL"); 84 MODULE_DEVICE_TABLE(pci, enic_id_table); 85 86 #define ENIC_LARGE_PKT_THRESHOLD 1000 87 #define ENIC_MAX_COALESCE_TIMERS 10 88 /* Interrupt moderation table, which will be used to decide the 89 * coalescing timer values 90 * {rx_rate in Mbps, mapping percentage of the range} 91 */ 92 static struct enic_intr_mod_table mod_table[ENIC_MAX_COALESCE_TIMERS + 1] = { 93 {4000, 0}, 94 {4400, 10}, 95 {5060, 20}, 96 {5230, 30}, 97 {5540, 40}, 98 {5820, 50}, 99 {6120, 60}, 100 {6435, 70}, 101 {6745, 80}, 102 {7000, 90}, 103 {0xFFFFFFFF, 100} 104 }; 105 106 /* This table helps the driver to pick different ranges for rx coalescing 107 * timer depending on the link speed. 108 */ 109 static struct enic_intr_mod_range mod_range[ENIC_MAX_LINK_SPEEDS] = { 110 {0, 0}, /* 0 - 4 Gbps */ 111 {0, 3}, /* 4 - 10 Gbps */ 112 {3, 6}, /* 10+ Gbps */ 113 }; 114 115 static void enic_init_affinity_hint(struct enic *enic) 116 { 117 int numa_node = dev_to_node(&enic->pdev->dev); 118 int i; 119 120 for (i = 0; i < enic->intr_count; i++) { 121 if (enic_is_err_intr(enic, i) || enic_is_notify_intr(enic, i) || 122 (cpumask_available(enic->msix[i].affinity_mask) && 123 !cpumask_empty(enic->msix[i].affinity_mask))) 124 continue; 125 if (zalloc_cpumask_var(&enic->msix[i].affinity_mask, 126 GFP_KERNEL)) 127 cpumask_set_cpu(cpumask_local_spread(i, numa_node), 128 enic->msix[i].affinity_mask); 129 } 130 } 131 132 static void enic_free_affinity_hint(struct enic *enic) 133 { 134 int i; 135 136 for (i = 0; i < enic->intr_count; i++) { 137 if (enic_is_err_intr(enic, i) || enic_is_notify_intr(enic, i)) 138 continue; 139 free_cpumask_var(enic->msix[i].affinity_mask); 140 } 141 } 142 143 static void enic_set_affinity_hint(struct enic *enic) 144 { 145 int i; 146 int err; 147 148 for (i = 0; i < enic->intr_count; i++) { 149 if (enic_is_err_intr(enic, i) || 150 enic_is_notify_intr(enic, i) || 151 !cpumask_available(enic->msix[i].affinity_mask) || 152 cpumask_empty(enic->msix[i].affinity_mask)) 153 continue; 154 err = irq_update_affinity_hint(enic->msix_entry[i].vector, 155 enic->msix[i].affinity_mask); 156 if (err) 157 netdev_warn(enic->netdev, "irq_update_affinity_hint failed, err %d\n", 158 err); 159 } 160 161 for (i = 0; i < enic->wq_count; i++) { 162 int wq_intr = enic_msix_wq_intr(enic, i); 163 164 if (cpumask_available(enic->msix[wq_intr].affinity_mask) && 165 !cpumask_empty(enic->msix[wq_intr].affinity_mask)) 166 netif_set_xps_queue(enic->netdev, 167 enic->msix[wq_intr].affinity_mask, 168 i); 169 } 170 } 171 172 static void enic_unset_affinity_hint(struct enic *enic) 173 { 174 int i; 175 176 for (i = 0; i < enic->intr_count; i++) 177 irq_update_affinity_hint(enic->msix_entry[i].vector, NULL); 178 } 179 180 static int enic_udp_tunnel_set_port(struct net_device *netdev, 181 unsigned int table, unsigned int entry, 182 struct udp_tunnel_info *ti) 183 { 184 struct enic *enic = netdev_priv(netdev); 185 int err; 186 187 spin_lock_bh(&enic->devcmd_lock); 188 189 err = vnic_dev_overlay_offload_cfg(enic->vdev, 190 OVERLAY_CFG_VXLAN_PORT_UPDATE, 191 ntohs(ti->port)); 192 if (err) 193 goto error; 194 195 err = vnic_dev_overlay_offload_ctrl(enic->vdev, OVERLAY_FEATURE_VXLAN, 196 enic->vxlan.patch_level); 197 if (err) 198 goto error; 199 200 enic->vxlan.vxlan_udp_port_number = ntohs(ti->port); 201 error: 202 spin_unlock_bh(&enic->devcmd_lock); 203 204 return err; 205 } 206 207 static int enic_udp_tunnel_unset_port(struct net_device *netdev, 208 unsigned int table, unsigned int entry, 209 struct udp_tunnel_info *ti) 210 { 211 struct enic *enic = netdev_priv(netdev); 212 int err; 213 214 spin_lock_bh(&enic->devcmd_lock); 215 216 err = vnic_dev_overlay_offload_ctrl(enic->vdev, OVERLAY_FEATURE_VXLAN, 217 OVERLAY_OFFLOAD_DISABLE); 218 if (err) 219 goto unlock; 220 221 enic->vxlan.vxlan_udp_port_number = 0; 222 223 unlock: 224 spin_unlock_bh(&enic->devcmd_lock); 225 226 return err; 227 } 228 229 static const struct udp_tunnel_nic_info enic_udp_tunnels = { 230 .set_port = enic_udp_tunnel_set_port, 231 .unset_port = enic_udp_tunnel_unset_port, 232 .tables = { 233 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, }, 234 }, 235 }, enic_udp_tunnels_v4 = { 236 .set_port = enic_udp_tunnel_set_port, 237 .unset_port = enic_udp_tunnel_unset_port, 238 .flags = UDP_TUNNEL_NIC_INFO_IPV4_ONLY, 239 .tables = { 240 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, }, 241 }, 242 }; 243 244 static netdev_features_t enic_features_check(struct sk_buff *skb, 245 struct net_device *dev, 246 netdev_features_t features) 247 { 248 const struct ethhdr *eth = (struct ethhdr *)skb_inner_mac_header(skb); 249 struct enic *enic = netdev_priv(dev); 250 struct udphdr *udph; 251 u16 port = 0; 252 u8 proto; 253 254 if (!skb->encapsulation) 255 return features; 256 257 features = vxlan_features_check(skb, features); 258 259 switch (vlan_get_protocol(skb)) { 260 case htons(ETH_P_IPV6): 261 if (!(enic->vxlan.flags & ENIC_VXLAN_OUTER_IPV6)) 262 goto out; 263 proto = ipv6_hdr(skb)->nexthdr; 264 break; 265 case htons(ETH_P_IP): 266 proto = ip_hdr(skb)->protocol; 267 break; 268 default: 269 goto out; 270 } 271 272 switch (eth->h_proto) { 273 case ntohs(ETH_P_IPV6): 274 if (!(enic->vxlan.flags & ENIC_VXLAN_INNER_IPV6)) 275 goto out; 276 fallthrough; 277 case ntohs(ETH_P_IP): 278 break; 279 default: 280 goto out; 281 } 282 283 284 if (proto == IPPROTO_UDP) { 285 udph = udp_hdr(skb); 286 port = be16_to_cpu(udph->dest); 287 } 288 289 /* HW supports offload of only one UDP port. Remove CSUM and GSO MASK 290 * for other UDP port tunnels 291 */ 292 if (port != enic->vxlan.vxlan_udp_port_number) 293 goto out; 294 295 return features; 296 297 out: 298 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK); 299 } 300 301 int enic_is_dynamic(struct enic *enic) 302 { 303 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN; 304 } 305 306 int enic_sriov_enabled(struct enic *enic) 307 { 308 return (enic->priv_flags & ENIC_SRIOV_ENABLED) ? 1 : 0; 309 } 310 311 static int enic_is_sriov_vf(struct enic *enic) 312 { 313 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF || 314 enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF_V2; 315 } 316 317 int enic_is_valid_vf(struct enic *enic, int vf) 318 { 319 #ifdef CONFIG_PCI_IOV 320 return vf >= 0 && vf < enic->num_vfs; 321 #else 322 return 0; 323 #endif 324 } 325 326 static bool enic_log_q_error(struct enic *enic) 327 { 328 unsigned int i; 329 u32 error_status; 330 bool err = false; 331 332 for (i = 0; i < enic->wq_count; i++) { 333 error_status = vnic_wq_error_status(&enic->wq[i].vwq); 334 err |= error_status; 335 if (error_status) 336 netdev_err(enic->netdev, "WQ[%d] error_status %d\n", 337 i, error_status); 338 } 339 340 for (i = 0; i < enic->rq_count; i++) { 341 error_status = vnic_rq_error_status(&enic->rq[i].vrq); 342 err |= error_status; 343 if (error_status) 344 netdev_err(enic->netdev, "RQ[%d] error_status %d\n", 345 i, error_status); 346 } 347 348 return err; 349 } 350 351 static void enic_msglvl_check(struct enic *enic) 352 { 353 u32 msg_enable = vnic_dev_msg_lvl(enic->vdev); 354 355 if (msg_enable != enic->msg_enable) { 356 netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n", 357 enic->msg_enable, msg_enable); 358 enic->msg_enable = msg_enable; 359 } 360 } 361 362 static void enic_mtu_check(struct enic *enic) 363 { 364 u32 mtu = vnic_dev_mtu(enic->vdev); 365 struct net_device *netdev = enic->netdev; 366 367 if (mtu && mtu != enic->port_mtu) { 368 enic->port_mtu = mtu; 369 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) { 370 mtu = max_t(int, ENIC_MIN_MTU, 371 min_t(int, ENIC_MAX_MTU, mtu)); 372 if (mtu != netdev->mtu) 373 schedule_work(&enic->change_mtu_work); 374 } else { 375 if (mtu < netdev->mtu) 376 netdev_warn(netdev, 377 "interface MTU (%d) set higher " 378 "than switch port MTU (%d)\n", 379 netdev->mtu, mtu); 380 } 381 } 382 } 383 384 static void enic_set_rx_coal_setting(struct enic *enic) 385 { 386 unsigned int speed; 387 int index = -1; 388 struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting; 389 390 /* 1. Read the link speed from fw 391 * 2. Pick the default range for the speed 392 * 3. Update it in enic->rx_coalesce_setting 393 */ 394 speed = vnic_dev_port_speed(enic->vdev); 395 if (speed > ENIC_LINK_SPEED_10G) 396 index = ENIC_LINK_40G_INDEX; 397 else if (speed > ENIC_LINK_SPEED_4G) 398 index = ENIC_LINK_10G_INDEX; 399 else 400 index = ENIC_LINK_4G_INDEX; 401 402 rx_coal->small_pkt_range_start = mod_range[index].small_pkt_range_start; 403 rx_coal->large_pkt_range_start = mod_range[index].large_pkt_range_start; 404 rx_coal->range_end = ENIC_RX_COALESCE_RANGE_END; 405 406 /* Start with the value provided by UCSM */ 407 for (index = 0; index < enic->rq_count; index++) 408 enic->cq[index].cur_rx_coal_timeval = 409 enic->config.intr_timer_usec; 410 411 rx_coal->use_adaptive_rx_coalesce = 1; 412 } 413 414 static void enic_link_check(struct enic *enic) 415 { 416 int link_status = vnic_dev_link_status(enic->vdev); 417 int carrier_ok = netif_carrier_ok(enic->netdev); 418 419 if (link_status && !carrier_ok) { 420 netdev_info(enic->netdev, "Link UP\n"); 421 netif_carrier_on(enic->netdev); 422 enic_set_rx_coal_setting(enic); 423 } else if (!link_status && carrier_ok) { 424 netdev_info(enic->netdev, "Link DOWN\n"); 425 netif_carrier_off(enic->netdev); 426 } 427 } 428 429 static void enic_notify_check(struct enic *enic) 430 { 431 enic_msglvl_check(enic); 432 enic_mtu_check(enic); 433 enic_link_check(enic); 434 } 435 436 #define ENIC_TEST_INTR(pba, i) (pba & (1 << i)) 437 438 static irqreturn_t enic_isr_legacy(int irq, void *data) 439 { 440 struct net_device *netdev = data; 441 struct enic *enic = netdev_priv(netdev); 442 unsigned int io_intr = ENIC_LEGACY_IO_INTR; 443 unsigned int err_intr = ENIC_LEGACY_ERR_INTR; 444 unsigned int notify_intr = ENIC_LEGACY_NOTIFY_INTR; 445 u32 pba; 446 447 vnic_intr_mask(&enic->intr[io_intr]); 448 449 pba = vnic_intr_legacy_pba(enic->legacy_pba); 450 if (!pba) { 451 vnic_intr_unmask(&enic->intr[io_intr]); 452 return IRQ_NONE; /* not our interrupt */ 453 } 454 455 if (ENIC_TEST_INTR(pba, notify_intr)) { 456 enic_notify_check(enic); 457 vnic_intr_return_all_credits(&enic->intr[notify_intr]); 458 } 459 460 if (ENIC_TEST_INTR(pba, err_intr)) { 461 vnic_intr_return_all_credits(&enic->intr[err_intr]); 462 enic_log_q_error(enic); 463 /* schedule recovery from WQ/RQ error */ 464 schedule_work(&enic->reset); 465 return IRQ_HANDLED; 466 } 467 468 if (ENIC_TEST_INTR(pba, io_intr)) 469 napi_schedule_irqoff(&enic->napi[0]); 470 else 471 vnic_intr_unmask(&enic->intr[io_intr]); 472 473 return IRQ_HANDLED; 474 } 475 476 static irqreturn_t enic_isr_msi(int irq, void *data) 477 { 478 struct enic *enic = data; 479 480 /* With MSI, there is no sharing of interrupts, so this is 481 * our interrupt and there is no need to ack it. The device 482 * is not providing per-vector masking, so the OS will not 483 * write to PCI config space to mask/unmask the interrupt. 484 * We're using mask_on_assertion for MSI, so the device 485 * automatically masks the interrupt when the interrupt is 486 * generated. Later, when exiting polling, the interrupt 487 * will be unmasked (see enic_poll). 488 * 489 * Also, the device uses the same PCIe Traffic Class (TC) 490 * for Memory Write data and MSI, so there are no ordering 491 * issues; the MSI will always arrive at the Root Complex 492 * _after_ corresponding Memory Writes (i.e. descriptor 493 * writes). 494 */ 495 496 napi_schedule_irqoff(&enic->napi[0]); 497 498 return IRQ_HANDLED; 499 } 500 501 static irqreturn_t enic_isr_msix(int irq, void *data) 502 { 503 struct napi_struct *napi = data; 504 505 napi_schedule_irqoff(napi); 506 507 return IRQ_HANDLED; 508 } 509 510 static irqreturn_t enic_isr_msix_err(int irq, void *data) 511 { 512 struct enic *enic = data; 513 unsigned int intr = enic_msix_err_intr(enic); 514 515 vnic_intr_return_all_credits(&enic->intr[intr]); 516 517 if (enic_log_q_error(enic)) 518 /* schedule recovery from WQ/RQ error */ 519 schedule_work(&enic->reset); 520 521 return IRQ_HANDLED; 522 } 523 524 static irqreturn_t enic_isr_msix_notify(int irq, void *data) 525 { 526 struct enic *enic = data; 527 unsigned int intr = enic_msix_notify_intr(enic); 528 529 enic_notify_check(enic); 530 vnic_intr_return_all_credits(&enic->intr[intr]); 531 532 return IRQ_HANDLED; 533 } 534 535 static int enic_queue_wq_skb_cont(struct enic *enic, struct vnic_wq *wq, 536 struct sk_buff *skb, unsigned int len_left, 537 int loopback) 538 { 539 const skb_frag_t *frag; 540 dma_addr_t dma_addr; 541 542 /* Queue additional data fragments */ 543 for (frag = skb_shinfo(skb)->frags; len_left; frag++) { 544 len_left -= skb_frag_size(frag); 545 dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag, 0, 546 skb_frag_size(frag), 547 DMA_TO_DEVICE); 548 if (unlikely(enic_dma_map_check(enic, dma_addr))) 549 return -ENOMEM; 550 enic_queue_wq_desc_cont(wq, skb, dma_addr, skb_frag_size(frag), 551 (len_left == 0), /* EOP? */ 552 loopback); 553 } 554 555 return 0; 556 } 557 558 static int enic_queue_wq_skb_vlan(struct enic *enic, struct vnic_wq *wq, 559 struct sk_buff *skb, int vlan_tag_insert, 560 unsigned int vlan_tag, int loopback) 561 { 562 unsigned int head_len = skb_headlen(skb); 563 unsigned int len_left = skb->len - head_len; 564 int eop = (len_left == 0); 565 dma_addr_t dma_addr; 566 int err = 0; 567 568 dma_addr = dma_map_single(&enic->pdev->dev, skb->data, head_len, 569 DMA_TO_DEVICE); 570 if (unlikely(enic_dma_map_check(enic, dma_addr))) 571 return -ENOMEM; 572 573 /* Queue the main skb fragment. The fragments are no larger 574 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less 575 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor 576 * per fragment is queued. 577 */ 578 enic_queue_wq_desc(wq, skb, dma_addr, head_len, vlan_tag_insert, 579 vlan_tag, eop, loopback); 580 581 if (!eop) 582 err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback); 583 584 /* The enic_queue_wq_desc() above does not do HW checksum */ 585 enic->wq[wq->index].stats.csum_none++; 586 enic->wq[wq->index].stats.packets++; 587 enic->wq[wq->index].stats.bytes += skb->len; 588 589 return err; 590 } 591 592 static int enic_queue_wq_skb_csum_l4(struct enic *enic, struct vnic_wq *wq, 593 struct sk_buff *skb, int vlan_tag_insert, 594 unsigned int vlan_tag, int loopback) 595 { 596 unsigned int head_len = skb_headlen(skb); 597 unsigned int len_left = skb->len - head_len; 598 unsigned int hdr_len = skb_checksum_start_offset(skb); 599 unsigned int csum_offset = hdr_len + skb->csum_offset; 600 int eop = (len_left == 0); 601 dma_addr_t dma_addr; 602 int err = 0; 603 604 dma_addr = dma_map_single(&enic->pdev->dev, skb->data, head_len, 605 DMA_TO_DEVICE); 606 if (unlikely(enic_dma_map_check(enic, dma_addr))) 607 return -ENOMEM; 608 609 /* Queue the main skb fragment. The fragments are no larger 610 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less 611 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor 612 * per fragment is queued. 613 */ 614 enic_queue_wq_desc_csum_l4(wq, skb, dma_addr, head_len, csum_offset, 615 hdr_len, vlan_tag_insert, vlan_tag, eop, 616 loopback); 617 618 if (!eop) 619 err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback); 620 621 enic->wq[wq->index].stats.csum_partial++; 622 enic->wq[wq->index].stats.packets++; 623 enic->wq[wq->index].stats.bytes += skb->len; 624 625 return err; 626 } 627 628 static void enic_preload_tcp_csum_encap(struct sk_buff *skb) 629 { 630 const struct ethhdr *eth = (struct ethhdr *)skb_inner_mac_header(skb); 631 632 switch (eth->h_proto) { 633 case ntohs(ETH_P_IP): 634 inner_ip_hdr(skb)->check = 0; 635 inner_tcp_hdr(skb)->check = 636 ~csum_tcpudp_magic(inner_ip_hdr(skb)->saddr, 637 inner_ip_hdr(skb)->daddr, 0, 638 IPPROTO_TCP, 0); 639 break; 640 case ntohs(ETH_P_IPV6): 641 inner_tcp_hdr(skb)->check = 642 ~csum_ipv6_magic(&inner_ipv6_hdr(skb)->saddr, 643 &inner_ipv6_hdr(skb)->daddr, 0, 644 IPPROTO_TCP, 0); 645 break; 646 default: 647 WARN_ONCE(1, "Non ipv4/ipv6 inner pkt for encap offload"); 648 break; 649 } 650 } 651 652 static void enic_preload_tcp_csum(struct sk_buff *skb) 653 { 654 /* Preload TCP csum field with IP pseudo hdr calculated 655 * with IP length set to zero. HW will later add in length 656 * to each TCP segment resulting from the TSO. 657 */ 658 659 if (skb->protocol == cpu_to_be16(ETH_P_IP)) { 660 ip_hdr(skb)->check = 0; 661 tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr, 662 ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0); 663 } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) { 664 tcp_v6_gso_csum_prep(skb); 665 } 666 } 667 668 static int enic_queue_wq_skb_tso(struct enic *enic, struct vnic_wq *wq, 669 struct sk_buff *skb, unsigned int mss, 670 int vlan_tag_insert, unsigned int vlan_tag, 671 int loopback) 672 { 673 unsigned int frag_len_left = skb_headlen(skb); 674 unsigned int len_left = skb->len - frag_len_left; 675 int eop = (len_left == 0); 676 unsigned int offset = 0; 677 unsigned int hdr_len; 678 dma_addr_t dma_addr; 679 unsigned int pkts; 680 unsigned int len; 681 skb_frag_t *frag; 682 683 if (skb->encapsulation) { 684 hdr_len = skb_inner_tcp_all_headers(skb); 685 enic_preload_tcp_csum_encap(skb); 686 enic->wq[wq->index].stats.encap_tso++; 687 } else { 688 hdr_len = skb_tcp_all_headers(skb); 689 enic_preload_tcp_csum(skb); 690 enic->wq[wq->index].stats.tso++; 691 } 692 693 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors 694 * for the main skb fragment 695 */ 696 while (frag_len_left) { 697 len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN); 698 dma_addr = dma_map_single(&enic->pdev->dev, 699 skb->data + offset, len, 700 DMA_TO_DEVICE); 701 if (unlikely(enic_dma_map_check(enic, dma_addr))) 702 return -ENOMEM; 703 enic_queue_wq_desc_tso(wq, skb, dma_addr, len, mss, hdr_len, 704 vlan_tag_insert, vlan_tag, 705 eop && (len == frag_len_left), loopback); 706 frag_len_left -= len; 707 offset += len; 708 } 709 710 if (eop) 711 goto tso_out_stats; 712 713 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors 714 * for additional data fragments 715 */ 716 for (frag = skb_shinfo(skb)->frags; len_left; frag++) { 717 len_left -= skb_frag_size(frag); 718 frag_len_left = skb_frag_size(frag); 719 offset = 0; 720 721 while (frag_len_left) { 722 len = min(frag_len_left, 723 (unsigned int)WQ_ENET_MAX_DESC_LEN); 724 dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag, 725 offset, len, 726 DMA_TO_DEVICE); 727 if (unlikely(enic_dma_map_check(enic, dma_addr))) 728 return -ENOMEM; 729 enic_queue_wq_desc_cont(wq, skb, dma_addr, len, 730 (len_left == 0) && 731 (len == frag_len_left),/*EOP*/ 732 loopback); 733 frag_len_left -= len; 734 offset += len; 735 } 736 } 737 738 tso_out_stats: 739 /* calculate how many packets tso sent */ 740 len = skb->len - hdr_len; 741 pkts = len / mss; 742 if ((len % mss) > 0) 743 pkts++; 744 enic->wq[wq->index].stats.packets += pkts; 745 enic->wq[wq->index].stats.bytes += (len + (pkts * hdr_len)); 746 747 return 0; 748 } 749 750 static inline int enic_queue_wq_skb_encap(struct enic *enic, struct vnic_wq *wq, 751 struct sk_buff *skb, 752 int vlan_tag_insert, 753 unsigned int vlan_tag, int loopback) 754 { 755 unsigned int head_len = skb_headlen(skb); 756 unsigned int len_left = skb->len - head_len; 757 /* Hardware will overwrite the checksum fields, calculating from 758 * scratch and ignoring the value placed by software. 759 * Offload mode = 00 760 * mss[2], mss[1], mss[0] bits are set 761 */ 762 unsigned int mss_or_csum = 7; 763 int eop = (len_left == 0); 764 dma_addr_t dma_addr; 765 int err = 0; 766 767 dma_addr = dma_map_single(&enic->pdev->dev, skb->data, head_len, 768 DMA_TO_DEVICE); 769 if (unlikely(enic_dma_map_check(enic, dma_addr))) 770 return -ENOMEM; 771 772 enic_queue_wq_desc_ex(wq, skb, dma_addr, head_len, mss_or_csum, 0, 773 vlan_tag_insert, vlan_tag, 774 WQ_ENET_OFFLOAD_MODE_CSUM, eop, 1 /* SOP */, eop, 775 loopback); 776 if (!eop) 777 err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback); 778 779 enic->wq[wq->index].stats.encap_csum++; 780 enic->wq[wq->index].stats.packets++; 781 enic->wq[wq->index].stats.bytes += skb->len; 782 783 return err; 784 } 785 786 static inline int enic_queue_wq_skb(struct enic *enic, 787 struct vnic_wq *wq, struct sk_buff *skb) 788 { 789 unsigned int mss = skb_shinfo(skb)->gso_size; 790 unsigned int vlan_tag = 0; 791 int vlan_tag_insert = 0; 792 int loopback = 0; 793 int err; 794 795 if (skb_vlan_tag_present(skb)) { 796 /* VLAN tag from trunking driver */ 797 vlan_tag_insert = 1; 798 vlan_tag = skb_vlan_tag_get(skb); 799 enic->wq[wq->index].stats.add_vlan++; 800 } else if (enic->loop_enable) { 801 vlan_tag = enic->loop_tag; 802 loopback = 1; 803 } 804 805 if (mss) 806 err = enic_queue_wq_skb_tso(enic, wq, skb, mss, 807 vlan_tag_insert, vlan_tag, 808 loopback); 809 else if (skb->encapsulation) 810 err = enic_queue_wq_skb_encap(enic, wq, skb, vlan_tag_insert, 811 vlan_tag, loopback); 812 else if (skb->ip_summed == CHECKSUM_PARTIAL) 813 err = enic_queue_wq_skb_csum_l4(enic, wq, skb, vlan_tag_insert, 814 vlan_tag, loopback); 815 else 816 err = enic_queue_wq_skb_vlan(enic, wq, skb, vlan_tag_insert, 817 vlan_tag, loopback); 818 if (unlikely(err)) { 819 struct vnic_wq_buf *buf; 820 821 buf = wq->to_use->prev; 822 /* while not EOP of previous pkt && queue not empty. 823 * For all non EOP bufs, os_buf is NULL. 824 */ 825 while (!buf->os_buf && (buf->next != wq->to_clean)) { 826 enic_free_wq_buf(wq, buf); 827 wq->ring.desc_avail++; 828 buf = buf->prev; 829 } 830 wq->to_use = buf->next; 831 dev_kfree_skb(skb); 832 } 833 return err; 834 } 835 836 /* netif_tx_lock held, process context with BHs disabled, or BH */ 837 static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb, 838 struct net_device *netdev) 839 { 840 struct enic *enic = netdev_priv(netdev); 841 struct vnic_wq *wq; 842 unsigned int txq_map; 843 struct netdev_queue *txq; 844 845 txq_map = skb_get_queue_mapping(skb) % enic->wq_count; 846 wq = &enic->wq[txq_map].vwq; 847 848 if (skb->len <= 0) { 849 dev_kfree_skb_any(skb); 850 enic->wq[wq->index].stats.null_pkt++; 851 return NETDEV_TX_OK; 852 } 853 854 txq = netdev_get_tx_queue(netdev, txq_map); 855 856 /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs, 857 * which is very likely. In the off chance it's going to take 858 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb. 859 */ 860 861 if (skb_shinfo(skb)->gso_size == 0 && 862 skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC && 863 skb_linearize(skb)) { 864 dev_kfree_skb_any(skb); 865 enic->wq[wq->index].stats.skb_linear_fail++; 866 return NETDEV_TX_OK; 867 } 868 869 spin_lock(&enic->wq[txq_map].lock); 870 871 if (vnic_wq_desc_avail(wq) < 872 skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) { 873 netif_tx_stop_queue(txq); 874 /* This is a hard error, log it */ 875 netdev_err(netdev, "BUG! Tx ring full when queue awake!\n"); 876 spin_unlock(&enic->wq[txq_map].lock); 877 enic->wq[wq->index].stats.desc_full_awake++; 878 return NETDEV_TX_BUSY; 879 } 880 881 if (enic_queue_wq_skb(enic, wq, skb)) 882 goto error; 883 884 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS) { 885 netif_tx_stop_queue(txq); 886 enic->wq[wq->index].stats.stopped++; 887 } 888 skb_tx_timestamp(skb); 889 if (!netdev_xmit_more() || netif_xmit_stopped(txq)) 890 vnic_wq_doorbell(wq); 891 892 error: 893 spin_unlock(&enic->wq[txq_map].lock); 894 895 return NETDEV_TX_OK; 896 } 897 898 /* rcu_read_lock potentially held, nominally process context */ 899 static void enic_get_stats(struct net_device *netdev, 900 struct rtnl_link_stats64 *net_stats) 901 { 902 struct enic *enic = netdev_priv(netdev); 903 struct vnic_stats *stats; 904 u64 pkt_truncated = 0; 905 u64 bad_fcs = 0; 906 int err; 907 int i; 908 909 err = enic_dev_stats_dump(enic, &stats); 910 /* return only when dma_alloc_coherent fails in vnic_dev_stats_dump 911 * For other failures, like devcmd failure, we return previously 912 * recorded stats. 913 */ 914 if (err == -ENOMEM) 915 return; 916 917 net_stats->tx_packets = stats->tx.tx_frames_ok; 918 net_stats->tx_bytes = stats->tx.tx_bytes_ok; 919 net_stats->tx_errors = stats->tx.tx_errors; 920 net_stats->tx_dropped = stats->tx.tx_drops; 921 922 net_stats->rx_packets = stats->rx.rx_frames_ok; 923 net_stats->rx_bytes = stats->rx.rx_bytes_ok; 924 net_stats->rx_errors = stats->rx.rx_errors; 925 net_stats->multicast = stats->rx.rx_multicast_frames_ok; 926 927 for (i = 0; i < enic->rq_count; i++) { 928 struct enic_rq_stats *rqs = &enic->rq[i].stats; 929 930 if (!enic->rq[i].vrq.ctrl) 931 break; 932 pkt_truncated += rqs->pkt_truncated; 933 bad_fcs += rqs->bad_fcs; 934 } 935 net_stats->rx_over_errors = pkt_truncated; 936 net_stats->rx_crc_errors = bad_fcs; 937 net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop; 938 } 939 940 static int enic_mc_sync(struct net_device *netdev, const u8 *mc_addr) 941 { 942 struct enic *enic = netdev_priv(netdev); 943 944 if (enic->mc_count == ENIC_MULTICAST_PERFECT_FILTERS) { 945 unsigned int mc_count = netdev_mc_count(netdev); 946 947 netdev_warn(netdev, "Registering only %d out of %d multicast addresses\n", 948 ENIC_MULTICAST_PERFECT_FILTERS, mc_count); 949 950 return -ENOSPC; 951 } 952 953 enic_dev_add_addr(enic, mc_addr); 954 enic->mc_count++; 955 956 return 0; 957 } 958 959 static int enic_mc_unsync(struct net_device *netdev, const u8 *mc_addr) 960 { 961 struct enic *enic = netdev_priv(netdev); 962 963 enic_dev_del_addr(enic, mc_addr); 964 enic->mc_count--; 965 966 return 0; 967 } 968 969 static int enic_uc_sync(struct net_device *netdev, const u8 *uc_addr) 970 { 971 struct enic *enic = netdev_priv(netdev); 972 973 if (enic->uc_count == ENIC_UNICAST_PERFECT_FILTERS) { 974 unsigned int uc_count = netdev_uc_count(netdev); 975 976 netdev_warn(netdev, "Registering only %d out of %d unicast addresses\n", 977 ENIC_UNICAST_PERFECT_FILTERS, uc_count); 978 979 return -ENOSPC; 980 } 981 982 enic_dev_add_addr(enic, uc_addr); 983 enic->uc_count++; 984 985 return 0; 986 } 987 988 static int enic_uc_unsync(struct net_device *netdev, const u8 *uc_addr) 989 { 990 struct enic *enic = netdev_priv(netdev); 991 992 enic_dev_del_addr(enic, uc_addr); 993 enic->uc_count--; 994 995 return 0; 996 } 997 998 void enic_reset_addr_lists(struct enic *enic) 999 { 1000 struct net_device *netdev = enic->netdev; 1001 1002 __dev_uc_unsync(netdev, NULL); 1003 __dev_mc_unsync(netdev, NULL); 1004 1005 enic->mc_count = 0; 1006 enic->uc_count = 0; 1007 enic->flags = 0; 1008 } 1009 1010 static int enic_set_mac_addr(struct net_device *netdev, char *addr) 1011 { 1012 struct enic *enic = netdev_priv(netdev); 1013 1014 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) { 1015 if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr)) 1016 return -EADDRNOTAVAIL; 1017 } else { 1018 if (!is_valid_ether_addr(addr)) 1019 return -EADDRNOTAVAIL; 1020 } 1021 1022 eth_hw_addr_set(netdev, addr); 1023 1024 return 0; 1025 } 1026 1027 static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p) 1028 { 1029 struct enic *enic = netdev_priv(netdev); 1030 struct sockaddr *saddr = p; 1031 char *addr = saddr->sa_data; 1032 int err; 1033 1034 if (netif_running(enic->netdev)) { 1035 err = enic_dev_del_station_addr(enic); 1036 if (err) 1037 return err; 1038 } 1039 1040 err = enic_set_mac_addr(netdev, addr); 1041 if (err) 1042 return err; 1043 1044 if (netif_running(enic->netdev)) { 1045 err = enic_dev_add_station_addr(enic); 1046 if (err) 1047 return err; 1048 } 1049 1050 return err; 1051 } 1052 1053 static int enic_set_mac_address(struct net_device *netdev, void *p) 1054 { 1055 struct sockaddr *saddr = p; 1056 char *addr = saddr->sa_data; 1057 struct enic *enic = netdev_priv(netdev); 1058 int err; 1059 1060 err = enic_dev_del_station_addr(enic); 1061 if (err) 1062 return err; 1063 1064 err = enic_set_mac_addr(netdev, addr); 1065 if (err) 1066 return err; 1067 1068 return enic_dev_add_station_addr(enic); 1069 } 1070 1071 /* netif_tx_lock held, BHs disabled */ 1072 static void enic_set_rx_mode(struct net_device *netdev) 1073 { 1074 struct enic *enic = netdev_priv(netdev); 1075 int directed = 1; 1076 int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0; 1077 int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0; 1078 int promisc = (netdev->flags & IFF_PROMISC) || 1079 netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS; 1080 int allmulti = (netdev->flags & IFF_ALLMULTI) || 1081 netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS; 1082 unsigned int flags = netdev->flags | 1083 (allmulti ? IFF_ALLMULTI : 0) | 1084 (promisc ? IFF_PROMISC : 0); 1085 1086 if (enic->flags != flags) { 1087 enic->flags = flags; 1088 enic_dev_packet_filter(enic, directed, 1089 multicast, broadcast, promisc, allmulti); 1090 } 1091 1092 if (!promisc) { 1093 __dev_uc_sync(netdev, enic_uc_sync, enic_uc_unsync); 1094 if (!allmulti) 1095 __dev_mc_sync(netdev, enic_mc_sync, enic_mc_unsync); 1096 } 1097 } 1098 1099 /* netif_tx_lock held, BHs disabled */ 1100 static void enic_tx_timeout(struct net_device *netdev, unsigned int txqueue) 1101 { 1102 struct enic *enic = netdev_priv(netdev); 1103 schedule_work(&enic->tx_hang_reset); 1104 } 1105 1106 static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac) 1107 { 1108 struct enic *enic = netdev_priv(netdev); 1109 struct enic_port_profile *pp; 1110 int err; 1111 1112 ENIC_PP_BY_INDEX(enic, vf, pp, &err); 1113 if (err) 1114 return err; 1115 1116 if (is_valid_ether_addr(mac) || is_zero_ether_addr(mac)) { 1117 if (vf == PORT_SELF_VF) { 1118 memcpy(pp->vf_mac, mac, ETH_ALEN); 1119 return 0; 1120 } else { 1121 /* 1122 * For sriov vf's set the mac in hw 1123 */ 1124 ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic, 1125 vnic_dev_set_mac_addr, mac); 1126 return enic_dev_status_to_errno(err); 1127 } 1128 } else 1129 return -EINVAL; 1130 } 1131 1132 static int enic_set_vf_port(struct net_device *netdev, int vf, 1133 struct nlattr *port[]) 1134 { 1135 static const u8 zero_addr[ETH_ALEN] = {}; 1136 struct enic *enic = netdev_priv(netdev); 1137 struct enic_port_profile prev_pp; 1138 struct enic_port_profile *pp; 1139 int err = 0, restore_pp = 1; 1140 1141 ENIC_PP_BY_INDEX(enic, vf, pp, &err); 1142 if (err) 1143 return err; 1144 1145 if (!port[IFLA_PORT_REQUEST]) 1146 return -EOPNOTSUPP; 1147 1148 memcpy(&prev_pp, pp, sizeof(*enic->pp)); 1149 memset(pp, 0, sizeof(*enic->pp)); 1150 1151 pp->set |= ENIC_SET_REQUEST; 1152 pp->request = nla_get_u8(port[IFLA_PORT_REQUEST]); 1153 1154 if (port[IFLA_PORT_PROFILE]) { 1155 if (nla_len(port[IFLA_PORT_PROFILE]) != PORT_PROFILE_MAX) { 1156 memcpy(pp, &prev_pp, sizeof(*pp)); 1157 return -EINVAL; 1158 } 1159 pp->set |= ENIC_SET_NAME; 1160 memcpy(pp->name, nla_data(port[IFLA_PORT_PROFILE]), 1161 PORT_PROFILE_MAX); 1162 } 1163 1164 if (port[IFLA_PORT_INSTANCE_UUID]) { 1165 if (nla_len(port[IFLA_PORT_INSTANCE_UUID]) != PORT_UUID_MAX) { 1166 memcpy(pp, &prev_pp, sizeof(*pp)); 1167 return -EINVAL; 1168 } 1169 pp->set |= ENIC_SET_INSTANCE; 1170 memcpy(pp->instance_uuid, 1171 nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX); 1172 } 1173 1174 if (port[IFLA_PORT_HOST_UUID]) { 1175 if (nla_len(port[IFLA_PORT_HOST_UUID]) != PORT_UUID_MAX) { 1176 memcpy(pp, &prev_pp, sizeof(*pp)); 1177 return -EINVAL; 1178 } 1179 pp->set |= ENIC_SET_HOST; 1180 memcpy(pp->host_uuid, 1181 nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX); 1182 } 1183 1184 if (vf == PORT_SELF_VF) { 1185 /* Special case handling: mac came from IFLA_VF_MAC */ 1186 if (!is_zero_ether_addr(prev_pp.vf_mac)) 1187 memcpy(pp->mac_addr, prev_pp.vf_mac, ETH_ALEN); 1188 1189 if (is_zero_ether_addr(netdev->dev_addr)) 1190 eth_hw_addr_random(netdev); 1191 } else { 1192 /* SR-IOV VF: get mac from adapter */ 1193 ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic, 1194 vnic_dev_get_mac_addr, pp->mac_addr); 1195 if (err) { 1196 netdev_err(netdev, "Error getting mac for vf %d\n", vf); 1197 memcpy(pp, &prev_pp, sizeof(*pp)); 1198 return enic_dev_status_to_errno(err); 1199 } 1200 } 1201 1202 err = enic_process_set_pp_request(enic, vf, &prev_pp, &restore_pp); 1203 if (err) { 1204 if (restore_pp) { 1205 /* Things are still the way they were: Implicit 1206 * DISASSOCIATE failed 1207 */ 1208 memcpy(pp, &prev_pp, sizeof(*pp)); 1209 } else { 1210 memset(pp, 0, sizeof(*pp)); 1211 if (vf == PORT_SELF_VF) 1212 eth_hw_addr_set(netdev, zero_addr); 1213 } 1214 } else { 1215 /* Set flag to indicate that the port assoc/disassoc 1216 * request has been sent out to fw 1217 */ 1218 pp->set |= ENIC_PORT_REQUEST_APPLIED; 1219 1220 /* If DISASSOCIATE, clean up all assigned/saved macaddresses */ 1221 if (pp->request == PORT_REQUEST_DISASSOCIATE) { 1222 eth_zero_addr(pp->mac_addr); 1223 if (vf == PORT_SELF_VF) 1224 eth_hw_addr_set(netdev, zero_addr); 1225 } 1226 } 1227 1228 if (vf == PORT_SELF_VF) 1229 eth_zero_addr(pp->vf_mac); 1230 1231 return err; 1232 } 1233 1234 static int enic_get_vf_port(struct net_device *netdev, int vf, 1235 struct sk_buff *skb) 1236 { 1237 struct enic *enic = netdev_priv(netdev); 1238 u16 response = PORT_PROFILE_RESPONSE_SUCCESS; 1239 struct enic_port_profile *pp; 1240 int err; 1241 1242 ENIC_PP_BY_INDEX(enic, vf, pp, &err); 1243 if (err) 1244 return err; 1245 1246 if (!(pp->set & ENIC_PORT_REQUEST_APPLIED)) 1247 return -ENODATA; 1248 1249 err = enic_process_get_pp_request(enic, vf, pp->request, &response); 1250 if (err) 1251 return err; 1252 1253 if (nla_put_u16(skb, IFLA_PORT_REQUEST, pp->request) || 1254 nla_put_u16(skb, IFLA_PORT_RESPONSE, response) || 1255 ((pp->set & ENIC_SET_NAME) && 1256 nla_put(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX, pp->name)) || 1257 ((pp->set & ENIC_SET_INSTANCE) && 1258 nla_put(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX, 1259 pp->instance_uuid)) || 1260 ((pp->set & ENIC_SET_HOST) && 1261 nla_put(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX, pp->host_uuid))) 1262 goto nla_put_failure; 1263 return 0; 1264 1265 nla_put_failure: 1266 return -EMSGSIZE; 1267 } 1268 1269 static void enic_set_int_moderation(struct enic *enic, struct vnic_rq *rq) 1270 { 1271 unsigned int intr = enic_msix_rq_intr(enic, rq->index); 1272 struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)]; 1273 u32 timer = cq->tobe_rx_coal_timeval; 1274 1275 if (cq->tobe_rx_coal_timeval != cq->cur_rx_coal_timeval) { 1276 vnic_intr_coalescing_timer_set(&enic->intr[intr], timer); 1277 cq->cur_rx_coal_timeval = cq->tobe_rx_coal_timeval; 1278 } 1279 } 1280 1281 static void enic_calc_int_moderation(struct enic *enic, struct vnic_rq *rq) 1282 { 1283 struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting; 1284 struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)]; 1285 struct vnic_rx_bytes_counter *pkt_size_counter = &cq->pkt_size_counter; 1286 int index; 1287 u32 timer; 1288 u32 range_start; 1289 u32 traffic; 1290 u64 delta; 1291 ktime_t now = ktime_get(); 1292 1293 delta = ktime_us_delta(now, cq->prev_ts); 1294 if (delta < ENIC_AIC_TS_BREAK) 1295 return; 1296 cq->prev_ts = now; 1297 1298 traffic = pkt_size_counter->large_pkt_bytes_cnt + 1299 pkt_size_counter->small_pkt_bytes_cnt; 1300 /* The table takes Mbps 1301 * traffic *= 8 => bits 1302 * traffic *= (10^6 / delta) => bps 1303 * traffic /= 10^6 => Mbps 1304 * 1305 * Combining, traffic *= (8 / delta) 1306 */ 1307 1308 traffic <<= 3; 1309 traffic = delta > UINT_MAX ? 0 : traffic / (u32)delta; 1310 1311 for (index = 0; index < ENIC_MAX_COALESCE_TIMERS; index++) 1312 if (traffic < mod_table[index].rx_rate) 1313 break; 1314 range_start = (pkt_size_counter->small_pkt_bytes_cnt > 1315 pkt_size_counter->large_pkt_bytes_cnt << 1) ? 1316 rx_coal->small_pkt_range_start : 1317 rx_coal->large_pkt_range_start; 1318 timer = range_start + ((rx_coal->range_end - range_start) * 1319 mod_table[index].range_percent / 100); 1320 /* Damping */ 1321 cq->tobe_rx_coal_timeval = (timer + cq->tobe_rx_coal_timeval) >> 1; 1322 1323 pkt_size_counter->large_pkt_bytes_cnt = 0; 1324 pkt_size_counter->small_pkt_bytes_cnt = 0; 1325 } 1326 1327 static int enic_poll(struct napi_struct *napi, int budget) 1328 { 1329 struct net_device *netdev = napi->dev; 1330 struct enic *enic = netdev_priv(netdev); 1331 unsigned int cq_rq = enic_cq_rq(enic, 0); 1332 unsigned int cq_wq = enic_cq_wq(enic, 0); 1333 unsigned int intr = ENIC_LEGACY_IO_INTR; 1334 unsigned int rq_work_to_do = budget; 1335 unsigned int wq_work_to_do = ENIC_WQ_NAPI_BUDGET; 1336 unsigned int work_done, rq_work_done = 0, wq_work_done; 1337 int err; 1338 1339 wq_work_done = enic_wq_cq_service(enic, cq_wq, wq_work_to_do); 1340 1341 if (budget > 0) 1342 rq_work_done = enic_rq_cq_service(enic, cq_rq, rq_work_to_do); 1343 1344 /* Accumulate intr event credits for this polling 1345 * cycle. An intr event is the completion of a 1346 * a WQ or RQ packet. 1347 */ 1348 1349 work_done = rq_work_done + wq_work_done; 1350 1351 if (work_done > 0) 1352 vnic_intr_return_credits(&enic->intr[intr], 1353 work_done, 1354 0 /* don't unmask intr */, 1355 0 /* don't reset intr timer */); 1356 1357 err = vnic_rq_fill(&enic->rq[0].vrq, enic_rq_alloc_buf); 1358 1359 /* Buffer allocation failed. Stay in polling 1360 * mode so we can try to fill the ring again. 1361 */ 1362 1363 if (err) 1364 rq_work_done = rq_work_to_do; 1365 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1366 /* Call the function which refreshes the intr coalescing timer 1367 * value based on the traffic. 1368 */ 1369 enic_calc_int_moderation(enic, &enic->rq[0].vrq); 1370 1371 if ((rq_work_done < budget) && napi_complete_done(napi, rq_work_done)) { 1372 1373 /* Some work done, but not enough to stay in polling, 1374 * exit polling 1375 */ 1376 1377 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1378 enic_set_int_moderation(enic, &enic->rq[0].vrq); 1379 vnic_intr_unmask(&enic->intr[intr]); 1380 enic->rq[0].stats.napi_complete++; 1381 } else { 1382 enic->rq[0].stats.napi_repoll++; 1383 } 1384 1385 return rq_work_done; 1386 } 1387 1388 #ifdef CONFIG_RFS_ACCEL 1389 static void enic_free_rx_cpu_rmap(struct enic *enic) 1390 { 1391 free_irq_cpu_rmap(enic->netdev->rx_cpu_rmap); 1392 enic->netdev->rx_cpu_rmap = NULL; 1393 } 1394 1395 static void enic_set_rx_cpu_rmap(struct enic *enic) 1396 { 1397 int i, res; 1398 1399 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) { 1400 enic->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(enic->rq_count); 1401 if (unlikely(!enic->netdev->rx_cpu_rmap)) 1402 return; 1403 for (i = 0; i < enic->rq_count; i++) { 1404 res = irq_cpu_rmap_add(enic->netdev->rx_cpu_rmap, 1405 enic->msix_entry[i].vector); 1406 if (unlikely(res)) { 1407 enic_free_rx_cpu_rmap(enic); 1408 return; 1409 } 1410 } 1411 } 1412 } 1413 1414 #else 1415 1416 static void enic_free_rx_cpu_rmap(struct enic *enic) 1417 { 1418 } 1419 1420 static void enic_set_rx_cpu_rmap(struct enic *enic) 1421 { 1422 } 1423 1424 #endif /* CONFIG_RFS_ACCEL */ 1425 1426 static int enic_poll_msix_wq(struct napi_struct *napi, int budget) 1427 { 1428 struct net_device *netdev = napi->dev; 1429 struct enic *enic = netdev_priv(netdev); 1430 unsigned int wq_index = (napi - &enic->napi[0]) - enic->rq_count; 1431 struct vnic_wq *wq = &enic->wq[wq_index].vwq; 1432 unsigned int cq; 1433 unsigned int intr; 1434 unsigned int wq_work_to_do = ENIC_WQ_NAPI_BUDGET; 1435 unsigned int wq_work_done; 1436 unsigned int wq_irq; 1437 1438 wq_irq = wq->index; 1439 cq = enic_cq_wq(enic, wq_irq); 1440 intr = enic_msix_wq_intr(enic, wq_irq); 1441 1442 wq_work_done = enic_wq_cq_service(enic, cq, wq_work_to_do); 1443 1444 vnic_intr_return_credits(&enic->intr[intr], wq_work_done, 1445 0 /* don't unmask intr */, 1446 1 /* reset intr timer */); 1447 if (!wq_work_done) { 1448 napi_complete(napi); 1449 vnic_intr_unmask(&enic->intr[intr]); 1450 return 0; 1451 } 1452 1453 return budget; 1454 } 1455 1456 static int enic_poll_msix_rq(struct napi_struct *napi, int budget) 1457 { 1458 struct net_device *netdev = napi->dev; 1459 struct enic *enic = netdev_priv(netdev); 1460 unsigned int rq = (napi - &enic->napi[0]); 1461 unsigned int cq = enic_cq_rq(enic, rq); 1462 unsigned int intr = enic_msix_rq_intr(enic, rq); 1463 unsigned int work_to_do = budget; 1464 unsigned int work_done = 0; 1465 int err; 1466 1467 /* Service RQ 1468 */ 1469 1470 if (budget > 0) 1471 work_done = enic_rq_cq_service(enic, cq, work_to_do); 1472 1473 /* Return intr event credits for this polling 1474 * cycle. An intr event is the completion of a 1475 * RQ packet. 1476 */ 1477 1478 if (work_done > 0) 1479 vnic_intr_return_credits(&enic->intr[intr], 1480 work_done, 1481 0 /* don't unmask intr */, 1482 0 /* don't reset intr timer */); 1483 1484 err = vnic_rq_fill(&enic->rq[rq].vrq, enic_rq_alloc_buf); 1485 1486 /* Buffer allocation failed. Stay in polling mode 1487 * so we can try to fill the ring again. 1488 */ 1489 1490 if (err) 1491 work_done = work_to_do; 1492 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1493 /* Call the function which refreshes the intr coalescing timer 1494 * value based on the traffic. 1495 */ 1496 enic_calc_int_moderation(enic, &enic->rq[rq].vrq); 1497 1498 if ((work_done < budget) && napi_complete_done(napi, work_done)) { 1499 1500 /* Some work done, but not enough to stay in polling, 1501 * exit polling 1502 */ 1503 1504 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1505 enic_set_int_moderation(enic, &enic->rq[rq].vrq); 1506 vnic_intr_unmask(&enic->intr[intr]); 1507 enic->rq[rq].stats.napi_complete++; 1508 } else { 1509 enic->rq[rq].stats.napi_repoll++; 1510 } 1511 1512 return work_done; 1513 } 1514 1515 static void enic_notify_timer(struct timer_list *t) 1516 { 1517 struct enic *enic = timer_container_of(enic, t, notify_timer); 1518 1519 enic_notify_check(enic); 1520 1521 mod_timer(&enic->notify_timer, 1522 round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD)); 1523 } 1524 1525 static void enic_free_intr(struct enic *enic) 1526 { 1527 struct net_device *netdev = enic->netdev; 1528 unsigned int i; 1529 1530 enic_free_rx_cpu_rmap(enic); 1531 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1532 case VNIC_DEV_INTR_MODE_INTX: 1533 free_irq(enic->pdev->irq, netdev); 1534 break; 1535 case VNIC_DEV_INTR_MODE_MSI: 1536 free_irq(enic->pdev->irq, enic); 1537 break; 1538 case VNIC_DEV_INTR_MODE_MSIX: 1539 for (i = 0; i < enic->intr_count; i++) 1540 if (enic->msix[i].requested) 1541 free_irq(enic->msix_entry[i].vector, 1542 enic->msix[i].devid); 1543 break; 1544 default: 1545 break; 1546 } 1547 } 1548 1549 static int enic_request_intr(struct enic *enic) 1550 { 1551 struct net_device *netdev = enic->netdev; 1552 unsigned int i, intr; 1553 int err = 0; 1554 1555 enic_set_rx_cpu_rmap(enic); 1556 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1557 1558 case VNIC_DEV_INTR_MODE_INTX: 1559 1560 err = request_irq(enic->pdev->irq, enic_isr_legacy, 1561 IRQF_SHARED, netdev->name, netdev); 1562 break; 1563 1564 case VNIC_DEV_INTR_MODE_MSI: 1565 1566 err = request_irq(enic->pdev->irq, enic_isr_msi, 1567 0, netdev->name, enic); 1568 break; 1569 1570 case VNIC_DEV_INTR_MODE_MSIX: 1571 1572 for (i = 0; i < enic->rq_count; i++) { 1573 intr = enic_msix_rq_intr(enic, i); 1574 snprintf(enic->msix[intr].devname, 1575 sizeof(enic->msix[intr].devname), 1576 "%s-rx-%u", netdev->name, i); 1577 enic->msix[intr].isr = enic_isr_msix; 1578 enic->msix[intr].devid = &enic->napi[i]; 1579 } 1580 1581 for (i = 0; i < enic->wq_count; i++) { 1582 int wq = enic_cq_wq(enic, i); 1583 1584 intr = enic_msix_wq_intr(enic, i); 1585 snprintf(enic->msix[intr].devname, 1586 sizeof(enic->msix[intr].devname), 1587 "%s-tx-%u", netdev->name, i); 1588 enic->msix[intr].isr = enic_isr_msix; 1589 enic->msix[intr].devid = &enic->napi[wq]; 1590 } 1591 1592 intr = enic_msix_err_intr(enic); 1593 snprintf(enic->msix[intr].devname, 1594 sizeof(enic->msix[intr].devname), 1595 "%s-err", netdev->name); 1596 enic->msix[intr].isr = enic_isr_msix_err; 1597 enic->msix[intr].devid = enic; 1598 1599 intr = enic_msix_notify_intr(enic); 1600 snprintf(enic->msix[intr].devname, 1601 sizeof(enic->msix[intr].devname), 1602 "%s-notify", netdev->name); 1603 enic->msix[intr].isr = enic_isr_msix_notify; 1604 enic->msix[intr].devid = enic; 1605 1606 for (i = 0; i < enic->intr_count; i++) 1607 enic->msix[i].requested = 0; 1608 1609 for (i = 0; i < enic->intr_count; i++) { 1610 err = request_irq(enic->msix_entry[i].vector, 1611 enic->msix[i].isr, 0, 1612 enic->msix[i].devname, 1613 enic->msix[i].devid); 1614 if (err) { 1615 enic_free_intr(enic); 1616 break; 1617 } 1618 enic->msix[i].requested = 1; 1619 } 1620 1621 break; 1622 1623 default: 1624 break; 1625 } 1626 1627 return err; 1628 } 1629 1630 static void enic_synchronize_irqs(struct enic *enic) 1631 { 1632 unsigned int i; 1633 1634 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1635 case VNIC_DEV_INTR_MODE_INTX: 1636 case VNIC_DEV_INTR_MODE_MSI: 1637 synchronize_irq(enic->pdev->irq); 1638 break; 1639 case VNIC_DEV_INTR_MODE_MSIX: 1640 for (i = 0; i < enic->intr_count; i++) 1641 synchronize_irq(enic->msix_entry[i].vector); 1642 break; 1643 default: 1644 break; 1645 } 1646 } 1647 1648 static int enic_dev_notify_set(struct enic *enic) 1649 { 1650 int err; 1651 1652 spin_lock_bh(&enic->devcmd_lock); 1653 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1654 case VNIC_DEV_INTR_MODE_INTX: 1655 err = vnic_dev_notify_set(enic->vdev, ENIC_LEGACY_NOTIFY_INTR); 1656 break; 1657 case VNIC_DEV_INTR_MODE_MSIX: 1658 err = vnic_dev_notify_set(enic->vdev, 1659 enic_msix_notify_intr(enic)); 1660 break; 1661 default: 1662 err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */); 1663 break; 1664 } 1665 spin_unlock_bh(&enic->devcmd_lock); 1666 1667 return err; 1668 } 1669 1670 static void enic_notify_timer_start(struct enic *enic) 1671 { 1672 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1673 case VNIC_DEV_INTR_MODE_MSI: 1674 mod_timer(&enic->notify_timer, jiffies); 1675 break; 1676 default: 1677 /* Using intr for notification for INTx/MSI-X */ 1678 break; 1679 } 1680 } 1681 1682 /* rtnl lock is held, process context */ 1683 static int enic_open(struct net_device *netdev) 1684 { 1685 struct enic *enic = netdev_priv(netdev); 1686 unsigned int i; 1687 int err, ret; 1688 unsigned int max_pkt_len = netdev->mtu + VLAN_ETH_HLEN; 1689 struct page_pool_params pp_params = { 1690 .order = get_order(max_pkt_len), 1691 .pool_size = enic->config.rq_desc_count, 1692 .nid = dev_to_node(&enic->pdev->dev), 1693 .dev = &enic->pdev->dev, 1694 .dma_dir = DMA_FROM_DEVICE, 1695 .max_len = (max_pkt_len > PAGE_SIZE) ? max_pkt_len : PAGE_SIZE, 1696 .netdev = netdev, 1697 .flags = PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV, 1698 }; 1699 1700 err = enic_request_intr(enic); 1701 if (err) { 1702 netdev_err(netdev, "Unable to request irq.\n"); 1703 return err; 1704 } 1705 enic_init_affinity_hint(enic); 1706 enic_set_affinity_hint(enic); 1707 1708 err = enic_dev_notify_set(enic); 1709 if (err) { 1710 netdev_err(netdev, 1711 "Failed to alloc notify buffer, aborting.\n"); 1712 goto err_out_free_intr; 1713 } 1714 1715 for (i = 0; i < enic->rq_count; i++) { 1716 /* create a page pool for each RQ */ 1717 pp_params.napi = &enic->napi[i]; 1718 pp_params.queue_idx = i; 1719 enic->rq[i].pool = page_pool_create(&pp_params); 1720 if (IS_ERR(enic->rq[i].pool)) { 1721 err = PTR_ERR(enic->rq[i].pool); 1722 enic->rq[i].pool = NULL; 1723 goto err_out_free_rq; 1724 } 1725 1726 /* enable rq before updating rq desc */ 1727 vnic_rq_enable(&enic->rq[i].vrq); 1728 vnic_rq_fill(&enic->rq[i].vrq, enic_rq_alloc_buf); 1729 /* Need at least one buffer on ring to get going */ 1730 if (vnic_rq_desc_used(&enic->rq[i].vrq) == 0) { 1731 netdev_err(netdev, "Unable to alloc receive buffers\n"); 1732 err = -ENOMEM; 1733 goto err_out_free_rq; 1734 } 1735 } 1736 1737 for (i = 0; i < enic->wq_count; i++) 1738 vnic_wq_enable(&enic->wq[i].vwq); 1739 1740 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic)) 1741 enic_dev_add_station_addr(enic); 1742 1743 enic_set_rx_mode(netdev); 1744 1745 netif_tx_wake_all_queues(netdev); 1746 1747 for (i = 0; i < enic->rq_count; i++) 1748 napi_enable(&enic->napi[i]); 1749 1750 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) 1751 for (i = 0; i < enic->wq_count; i++) 1752 napi_enable(&enic->napi[enic_cq_wq(enic, i)]); 1753 err = enic_dev_enable(enic); 1754 if (err) { 1755 netdev_err(netdev, "Failed to enable device: %d\n", err); 1756 goto err_out_dev_enable; 1757 } 1758 1759 for (i = 0; i < enic->intr_count; i++) 1760 vnic_intr_unmask(&enic->intr[i]); 1761 1762 enic_notify_timer_start(enic); 1763 enic_rfs_timer_start(enic); 1764 1765 return 0; 1766 1767 err_out_dev_enable: 1768 for (i = 0; i < enic->rq_count; i++) 1769 napi_disable(&enic->napi[i]); 1770 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) 1771 for (i = 0; i < enic->wq_count; i++) 1772 napi_disable(&enic->napi[enic_cq_wq(enic, i)]); 1773 netif_tx_disable(netdev); 1774 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic)) 1775 enic_dev_del_station_addr(enic); 1776 for (i = 0; i < enic->wq_count; i++) 1777 vnic_wq_disable(&enic->wq[i].vwq); 1778 err_out_free_rq: 1779 for (i = 0; i < enic->rq_count; i++) { 1780 ret = vnic_rq_disable(&enic->rq[i].vrq); 1781 if (!ret) { 1782 vnic_rq_clean(&enic->rq[i].vrq, enic_free_rq_buf); 1783 page_pool_destroy(enic->rq[i].pool); 1784 enic->rq[i].pool = NULL; 1785 } 1786 } 1787 enic_dev_notify_unset(enic); 1788 err_out_free_intr: 1789 enic_unset_affinity_hint(enic); 1790 enic_free_intr(enic); 1791 1792 return err; 1793 } 1794 1795 /* rtnl lock is held, process context */ 1796 static int enic_stop(struct net_device *netdev) 1797 { 1798 struct enic *enic = netdev_priv(netdev); 1799 unsigned int i; 1800 int err; 1801 1802 for (i = 0; i < enic->intr_count; i++) { 1803 vnic_intr_mask(&enic->intr[i]); 1804 (void)vnic_intr_masked(&enic->intr[i]); /* flush write */ 1805 } 1806 1807 enic_synchronize_irqs(enic); 1808 1809 timer_delete_sync(&enic->notify_timer); 1810 enic_rfs_flw_tbl_free(enic); 1811 1812 enic_dev_disable(enic); 1813 1814 for (i = 0; i < enic->rq_count; i++) 1815 napi_disable(&enic->napi[i]); 1816 1817 netif_carrier_off(netdev); 1818 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) 1819 for (i = 0; i < enic->wq_count; i++) 1820 napi_disable(&enic->napi[enic_cq_wq(enic, i)]); 1821 netif_tx_disable(netdev); 1822 1823 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic)) 1824 enic_dev_del_station_addr(enic); 1825 1826 for (i = 0; i < enic->wq_count; i++) { 1827 err = vnic_wq_disable(&enic->wq[i].vwq); 1828 if (err) 1829 return err; 1830 } 1831 for (i = 0; i < enic->rq_count; i++) { 1832 err = vnic_rq_disable(&enic->rq[i].vrq); 1833 if (err) 1834 return err; 1835 } 1836 1837 enic_dev_notify_unset(enic); 1838 enic_unset_affinity_hint(enic); 1839 enic_free_intr(enic); 1840 1841 for (i = 0; i < enic->wq_count; i++) 1842 vnic_wq_clean(&enic->wq[i].vwq, enic_free_wq_buf); 1843 for (i = 0; i < enic->rq_count; i++) { 1844 vnic_rq_clean(&enic->rq[i].vrq, enic_free_rq_buf); 1845 page_pool_destroy(enic->rq[i].pool); 1846 enic->rq[i].pool = NULL; 1847 } 1848 for (i = 0; i < enic->cq_count; i++) 1849 vnic_cq_clean(&enic->cq[i]); 1850 for (i = 0; i < enic->intr_count; i++) 1851 vnic_intr_clean(&enic->intr[i]); 1852 1853 return 0; 1854 } 1855 1856 static int _enic_change_mtu(struct net_device *netdev, int new_mtu) 1857 { 1858 bool running = netif_running(netdev); 1859 int err = 0; 1860 1861 ASSERT_RTNL(); 1862 if (running) { 1863 err = enic_stop(netdev); 1864 if (err) 1865 return err; 1866 } 1867 1868 WRITE_ONCE(netdev->mtu, new_mtu); 1869 1870 if (running) { 1871 err = enic_open(netdev); 1872 if (err) 1873 return err; 1874 } 1875 1876 return 0; 1877 } 1878 1879 static int enic_change_mtu(struct net_device *netdev, int new_mtu) 1880 { 1881 struct enic *enic = netdev_priv(netdev); 1882 1883 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) 1884 return -EOPNOTSUPP; 1885 1886 if (new_mtu > enic->port_mtu) 1887 netdev_warn(netdev, 1888 "interface MTU (%d) set higher than port MTU (%d)\n", 1889 new_mtu, enic->port_mtu); 1890 1891 return _enic_change_mtu(netdev, new_mtu); 1892 } 1893 1894 static void enic_change_mtu_work(struct work_struct *work) 1895 { 1896 struct enic *enic = container_of(work, struct enic, change_mtu_work); 1897 struct net_device *netdev = enic->netdev; 1898 int new_mtu = vnic_dev_mtu(enic->vdev); 1899 1900 rtnl_lock(); 1901 (void)_enic_change_mtu(netdev, new_mtu); 1902 rtnl_unlock(); 1903 1904 netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu); 1905 } 1906 1907 #ifdef CONFIG_NET_POLL_CONTROLLER 1908 static void enic_poll_controller(struct net_device *netdev) 1909 { 1910 struct enic *enic = netdev_priv(netdev); 1911 struct vnic_dev *vdev = enic->vdev; 1912 unsigned int i, intr; 1913 1914 switch (vnic_dev_get_intr_mode(vdev)) { 1915 case VNIC_DEV_INTR_MODE_MSIX: 1916 for (i = 0; i < enic->rq_count; i++) { 1917 intr = enic_msix_rq_intr(enic, i); 1918 enic_isr_msix(enic->msix_entry[intr].vector, 1919 &enic->napi[i]); 1920 } 1921 1922 for (i = 0; i < enic->wq_count; i++) { 1923 intr = enic_msix_wq_intr(enic, i); 1924 enic_isr_msix(enic->msix_entry[intr].vector, 1925 &enic->napi[enic_cq_wq(enic, i)]); 1926 } 1927 1928 break; 1929 case VNIC_DEV_INTR_MODE_MSI: 1930 enic_isr_msi(enic->pdev->irq, enic); 1931 break; 1932 case VNIC_DEV_INTR_MODE_INTX: 1933 enic_isr_legacy(enic->pdev->irq, netdev); 1934 break; 1935 default: 1936 break; 1937 } 1938 } 1939 #endif 1940 1941 static int enic_dev_wait(struct vnic_dev *vdev, 1942 int (*start)(struct vnic_dev *, int), 1943 int (*finished)(struct vnic_dev *, int *), 1944 int arg) 1945 { 1946 unsigned long time; 1947 int done; 1948 int err; 1949 1950 err = start(vdev, arg); 1951 if (err) 1952 return err; 1953 1954 /* Wait for func to complete...2 seconds max 1955 */ 1956 1957 time = jiffies + (HZ * 2); 1958 do { 1959 1960 err = finished(vdev, &done); 1961 if (err) 1962 return err; 1963 1964 if (done) 1965 return 0; 1966 1967 schedule_timeout_uninterruptible(HZ / 10); 1968 1969 } while (time_after(time, jiffies)); 1970 1971 return -ETIMEDOUT; 1972 } 1973 1974 static int enic_dev_open(struct enic *enic) 1975 { 1976 int err; 1977 u32 flags = CMD_OPENF_IG_DESCCACHE; 1978 1979 err = enic_dev_wait(enic->vdev, vnic_dev_open, 1980 vnic_dev_open_done, flags); 1981 if (err) 1982 dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n", 1983 err); 1984 1985 return err; 1986 } 1987 1988 static int enic_dev_soft_reset(struct enic *enic) 1989 { 1990 int err; 1991 1992 err = enic_dev_wait(enic->vdev, vnic_dev_soft_reset, 1993 vnic_dev_soft_reset_done, 0); 1994 if (err) 1995 netdev_err(enic->netdev, "vNIC soft reset failed, err %d\n", 1996 err); 1997 1998 return err; 1999 } 2000 2001 static int enic_dev_hang_reset(struct enic *enic) 2002 { 2003 int err; 2004 2005 err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset, 2006 vnic_dev_hang_reset_done, 0); 2007 if (err) 2008 netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n", 2009 err); 2010 2011 return err; 2012 } 2013 2014 int __enic_set_rsskey(struct enic *enic) 2015 { 2016 union vnic_rss_key *rss_key_buf_va; 2017 dma_addr_t rss_key_buf_pa; 2018 int i, kidx, bidx, err; 2019 2020 rss_key_buf_va = dma_alloc_coherent(&enic->pdev->dev, 2021 sizeof(union vnic_rss_key), 2022 &rss_key_buf_pa, GFP_ATOMIC); 2023 if (!rss_key_buf_va) 2024 return -ENOMEM; 2025 2026 for (i = 0; i < ENIC_RSS_LEN; i++) { 2027 kidx = i / ENIC_RSS_BYTES_PER_KEY; 2028 bidx = i % ENIC_RSS_BYTES_PER_KEY; 2029 rss_key_buf_va->key[kidx].b[bidx] = enic->rss_key[i]; 2030 } 2031 spin_lock_bh(&enic->devcmd_lock); 2032 err = enic_set_rss_key(enic, 2033 rss_key_buf_pa, 2034 sizeof(union vnic_rss_key)); 2035 spin_unlock_bh(&enic->devcmd_lock); 2036 2037 dma_free_coherent(&enic->pdev->dev, sizeof(union vnic_rss_key), 2038 rss_key_buf_va, rss_key_buf_pa); 2039 2040 return err; 2041 } 2042 2043 static int enic_set_rsskey(struct enic *enic) 2044 { 2045 netdev_rss_key_fill(enic->rss_key, ENIC_RSS_LEN); 2046 2047 return __enic_set_rsskey(enic); 2048 } 2049 2050 static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits) 2051 { 2052 dma_addr_t rss_cpu_buf_pa; 2053 union vnic_rss_cpu *rss_cpu_buf_va = NULL; 2054 unsigned int i; 2055 int err; 2056 2057 rss_cpu_buf_va = dma_alloc_coherent(&enic->pdev->dev, 2058 sizeof(union vnic_rss_cpu), 2059 &rss_cpu_buf_pa, GFP_ATOMIC); 2060 if (!rss_cpu_buf_va) 2061 return -ENOMEM; 2062 2063 for (i = 0; i < (1 << rss_hash_bits); i++) 2064 (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count; 2065 2066 spin_lock_bh(&enic->devcmd_lock); 2067 err = enic_set_rss_cpu(enic, 2068 rss_cpu_buf_pa, 2069 sizeof(union vnic_rss_cpu)); 2070 spin_unlock_bh(&enic->devcmd_lock); 2071 2072 dma_free_coherent(&enic->pdev->dev, sizeof(union vnic_rss_cpu), 2073 rss_cpu_buf_va, rss_cpu_buf_pa); 2074 2075 return err; 2076 } 2077 2078 static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu, 2079 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable) 2080 { 2081 const u8 tso_ipid_split_en = 0; 2082 const u8 ig_vlan_strip_en = 1; 2083 int err; 2084 2085 /* Enable VLAN tag stripping. 2086 */ 2087 2088 spin_lock_bh(&enic->devcmd_lock); 2089 err = enic_set_nic_cfg(enic, 2090 rss_default_cpu, rss_hash_type, 2091 rss_hash_bits, rss_base_cpu, 2092 rss_enable, tso_ipid_split_en, 2093 ig_vlan_strip_en); 2094 spin_unlock_bh(&enic->devcmd_lock); 2095 2096 return err; 2097 } 2098 2099 static int enic_set_rss_nic_cfg(struct enic *enic) 2100 { 2101 struct device *dev = enic_get_dev(enic); 2102 const u8 rss_default_cpu = 0; 2103 const u8 rss_hash_bits = 7; 2104 const u8 rss_base_cpu = 0; 2105 u8 rss_hash_type; 2106 int res; 2107 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1); 2108 2109 spin_lock_bh(&enic->devcmd_lock); 2110 res = vnic_dev_capable_rss_hash_type(enic->vdev, &rss_hash_type); 2111 spin_unlock_bh(&enic->devcmd_lock); 2112 if (res) { 2113 /* defaults for old adapters 2114 */ 2115 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 | 2116 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 | 2117 NIC_CFG_RSS_HASH_TYPE_IPV6 | 2118 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6; 2119 } 2120 2121 if (rss_enable) { 2122 if (!enic_set_rsskey(enic)) { 2123 if (enic_set_rsscpu(enic, rss_hash_bits)) { 2124 rss_enable = 0; 2125 dev_warn(dev, "RSS disabled, " 2126 "Failed to set RSS cpu indirection table."); 2127 } 2128 } else { 2129 rss_enable = 0; 2130 dev_warn(dev, "RSS disabled, Failed to set RSS key.\n"); 2131 } 2132 } 2133 2134 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type, 2135 rss_hash_bits, rss_base_cpu, rss_enable); 2136 } 2137 2138 static void enic_set_api_busy(struct enic *enic, bool busy) 2139 { 2140 spin_lock(&enic->enic_api_lock); 2141 enic->enic_api_busy = busy; 2142 spin_unlock(&enic->enic_api_lock); 2143 } 2144 2145 static void enic_reset(struct work_struct *work) 2146 { 2147 struct enic *enic = container_of(work, struct enic, reset); 2148 2149 if (!netif_running(enic->netdev)) 2150 return; 2151 2152 rtnl_lock(); 2153 2154 /* Stop any activity from infiniband */ 2155 enic_set_api_busy(enic, true); 2156 2157 enic_stop(enic->netdev); 2158 enic_dev_soft_reset(enic); 2159 enic_reset_addr_lists(enic); 2160 enic_init_vnic_resources(enic); 2161 enic_set_rss_nic_cfg(enic); 2162 enic_dev_set_ig_vlan_rewrite_mode(enic); 2163 enic_ext_cq(enic); 2164 enic_open(enic->netdev); 2165 2166 /* Allow infiniband to fiddle with the device again */ 2167 enic_set_api_busy(enic, false); 2168 2169 call_netdevice_notifiers(NETDEV_REBOOT, enic->netdev); 2170 2171 rtnl_unlock(); 2172 } 2173 2174 static void enic_tx_hang_reset(struct work_struct *work) 2175 { 2176 struct enic *enic = container_of(work, struct enic, tx_hang_reset); 2177 2178 rtnl_lock(); 2179 2180 /* Stop any activity from infiniband */ 2181 enic_set_api_busy(enic, true); 2182 2183 enic_dev_hang_notify(enic); 2184 enic_stop(enic->netdev); 2185 enic_dev_hang_reset(enic); 2186 enic_reset_addr_lists(enic); 2187 enic_init_vnic_resources(enic); 2188 enic_set_rss_nic_cfg(enic); 2189 enic_dev_set_ig_vlan_rewrite_mode(enic); 2190 enic_ext_cq(enic); 2191 enic_open(enic->netdev); 2192 2193 /* Allow infiniband to fiddle with the device again */ 2194 enic_set_api_busy(enic, false); 2195 2196 call_netdevice_notifiers(NETDEV_REBOOT, enic->netdev); 2197 2198 rtnl_unlock(); 2199 } 2200 2201 static int enic_set_intr_mode(struct enic *enic) 2202 { 2203 unsigned int i; 2204 int num_intr; 2205 2206 /* Set interrupt mode (INTx, MSI, MSI-X) depending 2207 * on system capabilities. 2208 * 2209 * Try MSI-X first 2210 */ 2211 2212 if (enic->config.intr_mode < 1 && 2213 enic->intr_avail >= ENIC_MSIX_MIN_INTR) { 2214 for (i = 0; i < enic->intr_avail; i++) 2215 enic->msix_entry[i].entry = i; 2216 2217 num_intr = pci_enable_msix_range(enic->pdev, enic->msix_entry, 2218 ENIC_MSIX_MIN_INTR, 2219 enic->intr_avail); 2220 if (num_intr > 0) { 2221 vnic_dev_set_intr_mode(enic->vdev, 2222 VNIC_DEV_INTR_MODE_MSIX); 2223 enic->intr_avail = num_intr; 2224 return 0; 2225 } 2226 } 2227 2228 /* Next try MSI 2229 * 2230 * We need 1 INTR 2231 */ 2232 2233 if (enic->config.intr_mode < 2 && 2234 enic->intr_avail >= 1 && 2235 !pci_enable_msi(enic->pdev)) { 2236 enic->intr_avail = 1; 2237 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI); 2238 return 0; 2239 } 2240 2241 /* Next try INTx 2242 * 2243 * We need 3 INTRs 2244 * (the first INTR is used for WQ/RQ) 2245 * (the second INTR is used for WQ/RQ errors) 2246 * (the last INTR is used for notifications) 2247 */ 2248 2249 if (enic->config.intr_mode < 3 && 2250 enic->intr_avail >= 3) { 2251 enic->intr_avail = 3; 2252 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX); 2253 return 0; 2254 } 2255 2256 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN); 2257 2258 return -EINVAL; 2259 } 2260 2261 static void enic_clear_intr_mode(struct enic *enic) 2262 { 2263 switch (vnic_dev_get_intr_mode(enic->vdev)) { 2264 case VNIC_DEV_INTR_MODE_MSIX: 2265 pci_disable_msix(enic->pdev); 2266 break; 2267 case VNIC_DEV_INTR_MODE_MSI: 2268 pci_disable_msi(enic->pdev); 2269 break; 2270 default: 2271 break; 2272 } 2273 2274 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN); 2275 } 2276 2277 static int enic_adjust_resources(struct enic *enic) 2278 { 2279 unsigned int max_queues; 2280 unsigned int rq_default; 2281 unsigned int rq_avail; 2282 unsigned int wq_avail; 2283 2284 if (enic->rq_avail < 1 || enic->wq_avail < 1 || enic->cq_avail < 2) { 2285 dev_err(enic_get_dev(enic), 2286 "Not enough resources available rq: %d wq: %d cq: %d\n", 2287 enic->rq_avail, enic->wq_avail, 2288 enic->cq_avail); 2289 return -ENOSPC; 2290 } 2291 2292 if (is_kdump_kernel()) { 2293 dev_info(enic_get_dev(enic), "Running from within kdump kernel. Using minimal resources\n"); 2294 enic->rq_avail = 1; 2295 enic->wq_avail = 1; 2296 enic->config.rq_desc_count = ENIC_MIN_RQ_DESCS; 2297 enic->config.wq_desc_count = ENIC_MIN_WQ_DESCS; 2298 enic->config.mtu = min_t(u16, 1500, enic->config.mtu); 2299 } 2300 2301 /* if RSS isn't set, then we can only use one RQ */ 2302 if (!ENIC_SETTING(enic, RSS)) 2303 enic->rq_avail = 1; 2304 2305 switch (vnic_dev_get_intr_mode(enic->vdev)) { 2306 case VNIC_DEV_INTR_MODE_INTX: 2307 case VNIC_DEV_INTR_MODE_MSI: 2308 enic->rq_count = 1; 2309 enic->wq_count = 1; 2310 enic->cq_count = 2; 2311 enic->intr_count = enic->intr_avail; 2312 break; 2313 case VNIC_DEV_INTR_MODE_MSIX: 2314 /* Adjust the number of wqs/rqs/cqs/interrupts that will be 2315 * used based on which resource is the most constrained 2316 */ 2317 wq_avail = min(enic->wq_avail, ENIC_WQ_MAX); 2318 rq_default = max(netif_get_num_default_rss_queues(), 2319 ENIC_RQ_MIN_DEFAULT); 2320 rq_avail = min3(enic->rq_avail, ENIC_RQ_MAX, rq_default); 2321 max_queues = min(enic->cq_avail, 2322 enic->intr_avail - ENIC_MSIX_RESERVED_INTR); 2323 if (wq_avail + rq_avail <= max_queues) { 2324 enic->rq_count = rq_avail; 2325 enic->wq_count = wq_avail; 2326 } else { 2327 /* recalculate wq/rq count */ 2328 if (rq_avail < wq_avail) { 2329 enic->rq_count = min(rq_avail, max_queues / 2); 2330 enic->wq_count = max_queues - enic->rq_count; 2331 } else { 2332 enic->wq_count = min(wq_avail, max_queues / 2); 2333 enic->rq_count = max_queues - enic->wq_count; 2334 } 2335 } 2336 enic->cq_count = enic->rq_count + enic->wq_count; 2337 enic->intr_count = enic->cq_count + ENIC_MSIX_RESERVED_INTR; 2338 2339 break; 2340 default: 2341 dev_err(enic_get_dev(enic), "Unknown interrupt mode\n"); 2342 return -EINVAL; 2343 } 2344 2345 return 0; 2346 } 2347 2348 static void enic_get_queue_stats_rx(struct net_device *dev, int idx, 2349 struct netdev_queue_stats_rx *rxs) 2350 { 2351 struct enic *enic = netdev_priv(dev); 2352 struct enic_rq_stats *rqstats = &enic->rq[idx].stats; 2353 2354 rxs->bytes = rqstats->bytes; 2355 rxs->packets = rqstats->packets; 2356 rxs->hw_drops = rqstats->bad_fcs + rqstats->pkt_truncated; 2357 rxs->hw_drop_overruns = rqstats->pkt_truncated; 2358 rxs->csum_unnecessary = rqstats->csum_unnecessary + 2359 rqstats->csum_unnecessary_encap; 2360 rxs->alloc_fail = rqstats->pp_alloc_fail; 2361 } 2362 2363 static void enic_get_queue_stats_tx(struct net_device *dev, int idx, 2364 struct netdev_queue_stats_tx *txs) 2365 { 2366 struct enic *enic = netdev_priv(dev); 2367 struct enic_wq_stats *wqstats = &enic->wq[idx].stats; 2368 2369 txs->bytes = wqstats->bytes; 2370 txs->packets = wqstats->packets; 2371 txs->csum_none = wqstats->csum_none; 2372 txs->needs_csum = wqstats->csum_partial + wqstats->encap_csum + 2373 wqstats->tso; 2374 txs->hw_gso_packets = wqstats->tso; 2375 txs->stop = wqstats->stopped; 2376 txs->wake = wqstats->wake; 2377 } 2378 2379 static void enic_get_base_stats(struct net_device *dev, 2380 struct netdev_queue_stats_rx *rxs, 2381 struct netdev_queue_stats_tx *txs) 2382 { 2383 rxs->bytes = 0; 2384 rxs->packets = 0; 2385 rxs->hw_drops = 0; 2386 rxs->hw_drop_overruns = 0; 2387 rxs->csum_unnecessary = 0; 2388 rxs->alloc_fail = 0; 2389 txs->bytes = 0; 2390 txs->packets = 0; 2391 txs->csum_none = 0; 2392 txs->needs_csum = 0; 2393 txs->hw_gso_packets = 0; 2394 txs->stop = 0; 2395 txs->wake = 0; 2396 } 2397 2398 static const struct net_device_ops enic_netdev_dynamic_ops = { 2399 .ndo_open = enic_open, 2400 .ndo_stop = enic_stop, 2401 .ndo_start_xmit = enic_hard_start_xmit, 2402 .ndo_get_stats64 = enic_get_stats, 2403 .ndo_validate_addr = eth_validate_addr, 2404 .ndo_set_rx_mode = enic_set_rx_mode, 2405 .ndo_set_mac_address = enic_set_mac_address_dynamic, 2406 .ndo_change_mtu = enic_change_mtu, 2407 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid, 2408 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid, 2409 .ndo_tx_timeout = enic_tx_timeout, 2410 .ndo_set_vf_port = enic_set_vf_port, 2411 .ndo_get_vf_port = enic_get_vf_port, 2412 .ndo_set_vf_mac = enic_set_vf_mac, 2413 #ifdef CONFIG_NET_POLL_CONTROLLER 2414 .ndo_poll_controller = enic_poll_controller, 2415 #endif 2416 #ifdef CONFIG_RFS_ACCEL 2417 .ndo_rx_flow_steer = enic_rx_flow_steer, 2418 #endif 2419 .ndo_features_check = enic_features_check, 2420 }; 2421 2422 static const struct net_device_ops enic_netdev_ops = { 2423 .ndo_open = enic_open, 2424 .ndo_stop = enic_stop, 2425 .ndo_start_xmit = enic_hard_start_xmit, 2426 .ndo_get_stats64 = enic_get_stats, 2427 .ndo_validate_addr = eth_validate_addr, 2428 .ndo_set_mac_address = enic_set_mac_address, 2429 .ndo_set_rx_mode = enic_set_rx_mode, 2430 .ndo_change_mtu = enic_change_mtu, 2431 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid, 2432 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid, 2433 .ndo_tx_timeout = enic_tx_timeout, 2434 .ndo_set_vf_port = enic_set_vf_port, 2435 .ndo_get_vf_port = enic_get_vf_port, 2436 .ndo_set_vf_mac = enic_set_vf_mac, 2437 #ifdef CONFIG_NET_POLL_CONTROLLER 2438 .ndo_poll_controller = enic_poll_controller, 2439 #endif 2440 #ifdef CONFIG_RFS_ACCEL 2441 .ndo_rx_flow_steer = enic_rx_flow_steer, 2442 #endif 2443 .ndo_features_check = enic_features_check, 2444 }; 2445 2446 static const struct netdev_stat_ops enic_netdev_stat_ops = { 2447 .get_queue_stats_rx = enic_get_queue_stats_rx, 2448 .get_queue_stats_tx = enic_get_queue_stats_tx, 2449 .get_base_stats = enic_get_base_stats, 2450 }; 2451 2452 static void enic_free_enic_resources(struct enic *enic) 2453 { 2454 kfree(enic->wq); 2455 enic->wq = NULL; 2456 2457 kfree(enic->rq); 2458 enic->rq = NULL; 2459 2460 kfree(enic->cq); 2461 enic->cq = NULL; 2462 2463 kfree(enic->napi); 2464 enic->napi = NULL; 2465 2466 kfree(enic->msix_entry); 2467 enic->msix_entry = NULL; 2468 2469 kfree(enic->msix); 2470 enic->msix = NULL; 2471 2472 kfree(enic->intr); 2473 enic->intr = NULL; 2474 } 2475 2476 static int enic_alloc_enic_resources(struct enic *enic) 2477 { 2478 enic->wq = kzalloc_objs(struct enic_wq, enic->wq_avail); 2479 if (!enic->wq) 2480 goto free_queues; 2481 2482 enic->rq = kzalloc_objs(struct enic_rq, enic->rq_avail); 2483 if (!enic->rq) 2484 goto free_queues; 2485 2486 enic->cq = kzalloc_objs(struct vnic_cq, enic->cq_avail); 2487 if (!enic->cq) 2488 goto free_queues; 2489 2490 enic->napi = kzalloc_objs(struct napi_struct, 2491 enic->wq_avail + enic->rq_avail); 2492 if (!enic->napi) 2493 goto free_queues; 2494 2495 enic->msix_entry = kzalloc_objs(struct msix_entry, enic->intr_avail); 2496 if (!enic->msix_entry) 2497 goto free_queues; 2498 2499 enic->msix = kzalloc_objs(struct enic_msix_entry, enic->intr_avail); 2500 if (!enic->msix) 2501 goto free_queues; 2502 2503 enic->intr = kzalloc_objs(struct vnic_intr, enic->intr_avail); 2504 if (!enic->intr) 2505 goto free_queues; 2506 2507 return 0; 2508 2509 free_queues: 2510 enic_free_enic_resources(enic); 2511 return -ENOMEM; 2512 } 2513 2514 static void enic_dev_deinit(struct enic *enic) 2515 { 2516 unsigned int i; 2517 2518 for (i = 0; i < enic->rq_count; i++) 2519 __netif_napi_del(&enic->napi[i]); 2520 2521 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) 2522 for (i = 0; i < enic->wq_count; i++) 2523 __netif_napi_del(&enic->napi[enic_cq_wq(enic, i)]); 2524 2525 /* observe RCU grace period after __netif_napi_del() calls */ 2526 synchronize_net(); 2527 2528 enic_free_vnic_resources(enic); 2529 enic_clear_intr_mode(enic); 2530 enic_free_affinity_hint(enic); 2531 enic_free_enic_resources(enic); 2532 } 2533 2534 static int enic_dev_init(struct enic *enic) 2535 { 2536 struct device *dev = enic_get_dev(enic); 2537 struct net_device *netdev = enic->netdev; 2538 unsigned int i; 2539 int err; 2540 2541 /* Get interrupt coalesce timer info */ 2542 err = enic_dev_intr_coal_timer_info(enic); 2543 if (err) { 2544 dev_warn(dev, "Using default conversion factor for " 2545 "interrupt coalesce timer\n"); 2546 vnic_dev_intr_coal_timer_info_default(enic->vdev); 2547 } 2548 2549 /* Get vNIC configuration 2550 */ 2551 2552 err = enic_get_vnic_config(enic); 2553 if (err) { 2554 dev_err(dev, "Get vNIC configuration failed, aborting\n"); 2555 return err; 2556 } 2557 2558 /* Get available resource counts 2559 */ 2560 2561 enic_get_res_counts(enic); 2562 2563 enic_ext_cq(enic); 2564 2565 err = enic_alloc_enic_resources(enic); 2566 if (err) { 2567 dev_err(dev, "Failed to allocate enic resources\n"); 2568 return err; 2569 } 2570 2571 /* Set interrupt mode based on system capabilities */ 2572 2573 err = enic_set_intr_mode(enic); 2574 if (err) { 2575 dev_err(dev, "Failed to set intr mode based on resource " 2576 "counts and system capabilities, aborting\n"); 2577 goto err_out_free_vnic_resources; 2578 } 2579 2580 /* Adjust resource counts based on most constrained resources */ 2581 err = enic_adjust_resources(enic); 2582 if (err) { 2583 dev_err(dev, "Failed to adjust resources\n"); 2584 goto err_out_free_vnic_resources; 2585 } 2586 2587 /* Allocate and configure vNIC resources 2588 */ 2589 2590 err = enic_alloc_vnic_resources(enic); 2591 if (err) { 2592 dev_err(dev, "Failed to alloc vNIC resources, aborting\n"); 2593 goto err_out_free_vnic_resources; 2594 } 2595 2596 enic_init_vnic_resources(enic); 2597 2598 err = enic_set_rss_nic_cfg(enic); 2599 if (err) { 2600 dev_err(dev, "Failed to config nic, aborting\n"); 2601 goto err_out_free_vnic_resources; 2602 } 2603 2604 switch (vnic_dev_get_intr_mode(enic->vdev)) { 2605 default: 2606 netif_napi_add(netdev, &enic->napi[0], enic_poll); 2607 break; 2608 case VNIC_DEV_INTR_MODE_MSIX: 2609 for (i = 0; i < enic->rq_count; i++) { 2610 netif_napi_add(netdev, &enic->napi[i], 2611 enic_poll_msix_rq); 2612 } 2613 for (i = 0; i < enic->wq_count; i++) 2614 netif_napi_add(netdev, 2615 &enic->napi[enic_cq_wq(enic, i)], 2616 enic_poll_msix_wq); 2617 break; 2618 } 2619 2620 return 0; 2621 2622 err_out_free_vnic_resources: 2623 enic_free_affinity_hint(enic); 2624 enic_clear_intr_mode(enic); 2625 enic_free_vnic_resources(enic); 2626 enic_free_enic_resources(enic); 2627 2628 return err; 2629 } 2630 2631 static void enic_iounmap(struct enic *enic) 2632 { 2633 unsigned int i; 2634 2635 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) 2636 if (enic->bar[i].vaddr) 2637 iounmap(enic->bar[i].vaddr); 2638 } 2639 2640 #ifdef CONFIG_PCI_IOV 2641 static void enic_sriov_detect_vf_type(struct enic *enic) 2642 { 2643 struct pci_dev *pdev = enic->pdev; 2644 int pos; 2645 u16 vf_dev_id; 2646 2647 if (enic_is_sriov_vf(enic) || enic_is_dynamic(enic)) 2648 return; 2649 2650 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); 2651 if (!pos) { 2652 enic->vf_type = ENIC_VF_TYPE_NONE; 2653 return; 2654 } 2655 2656 pci_read_config_word(pdev, pos + PCI_SRIOV_VF_DID, &vf_dev_id); 2657 2658 switch (vf_dev_id) { 2659 case PCI_DEVICE_ID_CISCO_VIC_ENET_VF: 2660 enic->vf_type = ENIC_VF_TYPE_V1; 2661 break; 2662 case PCI_DEVICE_ID_CISCO_VIC_ENET_VF_USNIC: 2663 enic->vf_type = ENIC_VF_TYPE_USNIC; 2664 break; 2665 case PCI_DEVICE_ID_CISCO_VIC_ENET_VF_V2: 2666 enic->vf_type = ENIC_VF_TYPE_V2; 2667 break; 2668 default: 2669 enic->vf_type = ENIC_VF_TYPE_NONE; 2670 break; 2671 } 2672 } 2673 #endif 2674 2675 static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 2676 { 2677 struct device *dev = &pdev->dev; 2678 struct net_device *netdev; 2679 struct enic *enic; 2680 int using_dac = 0; 2681 unsigned int i; 2682 int err; 2683 #ifdef CONFIG_PCI_IOV 2684 int pos = 0; 2685 #endif 2686 int num_pps = 1; 2687 2688 /* Allocate net device structure and initialize. Private 2689 * instance data is initialized to zero. 2690 */ 2691 2692 netdev = alloc_etherdev_mqs(sizeof(struct enic), 2693 ENIC_RQ_MAX, ENIC_WQ_MAX); 2694 if (!netdev) 2695 return -ENOMEM; 2696 2697 pci_set_drvdata(pdev, netdev); 2698 2699 SET_NETDEV_DEV(netdev, &pdev->dev); 2700 2701 enic = netdev_priv(netdev); 2702 enic->netdev = netdev; 2703 enic->pdev = pdev; 2704 2705 /* Setup PCI resources 2706 */ 2707 2708 err = pci_enable_device_mem(pdev); 2709 if (err) { 2710 dev_err(dev, "Cannot enable PCI device, aborting\n"); 2711 goto err_out_free_netdev; 2712 } 2713 2714 err = pci_request_regions(pdev, DRV_NAME); 2715 if (err) { 2716 dev_err(dev, "Cannot request PCI regions, aborting\n"); 2717 goto err_out_disable_device; 2718 } 2719 2720 pci_set_master(pdev); 2721 2722 /* Query PCI controller on system for DMA addressing 2723 * limitation for the device. Try 47-bit first, and 2724 * fail to 32-bit. 2725 */ 2726 2727 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(47)); 2728 if (err) { 2729 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 2730 if (err) { 2731 dev_err(dev, "No usable DMA configuration, aborting\n"); 2732 goto err_out_release_regions; 2733 } 2734 } else { 2735 using_dac = 1; 2736 } 2737 2738 /* Map vNIC resources from BAR0-5 2739 */ 2740 2741 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) { 2742 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM)) 2743 continue; 2744 enic->bar[i].len = pci_resource_len(pdev, i); 2745 enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len); 2746 if (!enic->bar[i].vaddr) { 2747 dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i); 2748 err = -ENODEV; 2749 goto err_out_iounmap; 2750 } 2751 enic->bar[i].bus_addr = pci_resource_start(pdev, i); 2752 } 2753 2754 /* Register vNIC device 2755 */ 2756 2757 enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar, 2758 ARRAY_SIZE(enic->bar)); 2759 if (!enic->vdev) { 2760 dev_err(dev, "vNIC registration failed, aborting\n"); 2761 err = -ENODEV; 2762 goto err_out_iounmap; 2763 } 2764 2765 err = vnic_devcmd_init(enic->vdev); 2766 2767 if (err) 2768 goto err_out_vnic_unregister; 2769 2770 #ifdef CONFIG_PCI_IOV 2771 /* Get number of subvnics */ 2772 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); 2773 if (pos) { 2774 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, 2775 &enic->num_vfs); 2776 if (enic->num_vfs) { 2777 err = pci_enable_sriov(pdev, enic->num_vfs); 2778 if (err) { 2779 dev_err(dev, "SRIOV enable failed, aborting." 2780 " pci_enable_sriov() returned %d\n", 2781 err); 2782 goto err_out_vnic_unregister; 2783 } 2784 enic->priv_flags |= ENIC_SRIOV_ENABLED; 2785 num_pps = enic->num_vfs; 2786 } 2787 } 2788 enic_sriov_detect_vf_type(enic); 2789 #endif 2790 2791 /* Allocate structure for port profiles */ 2792 enic->pp = kzalloc_objs(*enic->pp, num_pps); 2793 if (!enic->pp) { 2794 err = -ENOMEM; 2795 goto err_out_disable_sriov_pp; 2796 } 2797 2798 /* Issue device open to get device in known state 2799 */ 2800 2801 err = enic_dev_open(enic); 2802 if (err) { 2803 dev_err(dev, "vNIC dev open failed, aborting\n"); 2804 goto err_out_disable_sriov; 2805 } 2806 2807 /* Setup devcmd lock 2808 */ 2809 2810 spin_lock_init(&enic->devcmd_lock); 2811 spin_lock_init(&enic->enic_api_lock); 2812 2813 /* 2814 * Set ingress vlan rewrite mode before vnic initialization 2815 */ 2816 2817 err = enic_dev_set_ig_vlan_rewrite_mode(enic); 2818 if (err) { 2819 dev_err(dev, 2820 "Failed to set ingress vlan rewrite mode, aborting.\n"); 2821 goto err_out_dev_close; 2822 } 2823 2824 /* Issue device init to initialize the vnic-to-switch link. 2825 * We'll start with carrier off and wait for link UP 2826 * notification later to turn on carrier. We don't need 2827 * to wait here for the vnic-to-switch link initialization 2828 * to complete; link UP notification is the indication that 2829 * the process is complete. 2830 */ 2831 2832 netif_carrier_off(netdev); 2833 2834 /* Do not call dev_init for a dynamic vnic. 2835 * For a dynamic vnic, init_prov_info will be 2836 * called later by an upper layer. 2837 */ 2838 2839 if (!enic_is_dynamic(enic)) { 2840 err = vnic_dev_init(enic->vdev, 0); 2841 if (err) { 2842 dev_err(dev, "vNIC dev init failed, aborting\n"); 2843 goto err_out_dev_close; 2844 } 2845 } 2846 2847 err = enic_dev_init(enic); 2848 if (err) { 2849 dev_err(dev, "Device initialization failed, aborting\n"); 2850 goto err_out_dev_close; 2851 } 2852 2853 netif_set_real_num_tx_queues(netdev, enic->wq_count); 2854 netif_set_real_num_rx_queues(netdev, enic->rq_count); 2855 2856 /* Setup notification timer, HW reset task, and wq locks 2857 */ 2858 2859 timer_setup(&enic->notify_timer, enic_notify_timer, 0); 2860 2861 enic_rfs_flw_tbl_init(enic); 2862 INIT_WORK(&enic->reset, enic_reset); 2863 INIT_WORK(&enic->tx_hang_reset, enic_tx_hang_reset); 2864 INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work); 2865 2866 for (i = 0; i < enic->wq_count; i++) 2867 spin_lock_init(&enic->wq[i].lock); 2868 2869 /* Register net device 2870 */ 2871 2872 enic->port_mtu = enic->config.mtu; 2873 2874 err = enic_set_mac_addr(netdev, enic->mac_addr); 2875 if (err) { 2876 dev_err(dev, "Invalid MAC address, aborting\n"); 2877 goto err_out_dev_deinit; 2878 } 2879 2880 enic->tx_coalesce_usecs = enic->config.intr_timer_usec; 2881 /* rx coalesce time already got initialized. This gets used 2882 * if adaptive coal is turned off 2883 */ 2884 enic->rx_coalesce_usecs = enic->tx_coalesce_usecs; 2885 2886 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) 2887 netdev->netdev_ops = &enic_netdev_dynamic_ops; 2888 else 2889 netdev->netdev_ops = &enic_netdev_ops; 2890 netdev->stat_ops = &enic_netdev_stat_ops; 2891 2892 netdev->watchdog_timeo = 2 * HZ; 2893 enic_set_ethtool_ops(netdev); 2894 2895 netdev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX; 2896 if (ENIC_SETTING(enic, LOOP)) { 2897 netdev->features &= ~NETIF_F_HW_VLAN_CTAG_TX; 2898 enic->loop_enable = 1; 2899 enic->loop_tag = enic->config.loop_tag; 2900 dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag); 2901 } 2902 if (ENIC_SETTING(enic, TXCSUM)) 2903 netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM; 2904 if (ENIC_SETTING(enic, TSO)) 2905 netdev->hw_features |= NETIF_F_TSO | 2906 NETIF_F_TSO6 | NETIF_F_TSO_ECN; 2907 if (ENIC_SETTING(enic, RSS)) 2908 netdev->hw_features |= NETIF_F_RXHASH; 2909 if (ENIC_SETTING(enic, RXCSUM)) 2910 netdev->hw_features |= NETIF_F_RXCSUM; 2911 if (ENIC_SETTING(enic, VXLAN)) { 2912 u64 patch_level; 2913 u64 a1 = 0; 2914 2915 netdev->hw_enc_features |= NETIF_F_RXCSUM | 2916 NETIF_F_TSO | 2917 NETIF_F_TSO6 | 2918 NETIF_F_TSO_ECN | 2919 NETIF_F_GSO_UDP_TUNNEL | 2920 NETIF_F_HW_CSUM | 2921 NETIF_F_GSO_UDP_TUNNEL_CSUM; 2922 netdev->hw_features |= netdev->hw_enc_features; 2923 /* get bit mask from hw about supported offload bit level 2924 * BIT(0) = fw supports patch_level 0 2925 * fcoe bit = encap 2926 * fcoe_fc_crc_ok = outer csum ok 2927 * BIT(1) = always set by fw 2928 * BIT(2) = fw supports patch_level 2 2929 * BIT(0) in rss_hash = encap 2930 * BIT(1,2) in rss_hash = outer_ip_csum_ok/ 2931 * outer_tcp_csum_ok 2932 * used in enic_rq_indicate_buf 2933 */ 2934 err = vnic_dev_get_supported_feature_ver(enic->vdev, 2935 VIC_FEATURE_VXLAN, 2936 &patch_level, &a1); 2937 if (err) 2938 patch_level = 0; 2939 enic->vxlan.flags = (u8)a1; 2940 /* mask bits that are supported by driver 2941 */ 2942 patch_level &= BIT_ULL(0) | BIT_ULL(2); 2943 patch_level = fls(patch_level); 2944 patch_level = patch_level ? patch_level - 1 : 0; 2945 enic->vxlan.patch_level = patch_level; 2946 2947 if (vnic_dev_get_res_count(enic->vdev, RES_TYPE_WQ) == 1 || 2948 enic->vxlan.flags & ENIC_VXLAN_MULTI_WQ) { 2949 netdev->udp_tunnel_nic_info = &enic_udp_tunnels_v4; 2950 if (enic->vxlan.flags & ENIC_VXLAN_OUTER_IPV6) 2951 netdev->udp_tunnel_nic_info = &enic_udp_tunnels; 2952 } 2953 } 2954 2955 netdev->features |= netdev->hw_features; 2956 netdev->vlan_features |= netdev->features; 2957 2958 #ifdef CONFIG_RFS_ACCEL 2959 netdev->hw_features |= NETIF_F_NTUPLE; 2960 #endif 2961 2962 if (using_dac) 2963 netdev->features |= NETIF_F_HIGHDMA; 2964 2965 netdev->priv_flags |= IFF_UNICAST_FLT; 2966 2967 /* MTU range: 68 - 9000 */ 2968 netdev->min_mtu = ENIC_MIN_MTU; 2969 netdev->max_mtu = ENIC_MAX_MTU; 2970 netdev->mtu = enic->port_mtu; 2971 2972 err = register_netdev(netdev); 2973 if (err) { 2974 dev_err(dev, "Cannot register net device, aborting\n"); 2975 goto err_out_dev_deinit; 2976 } 2977 2978 return 0; 2979 2980 err_out_dev_deinit: 2981 enic_dev_deinit(enic); 2982 err_out_dev_close: 2983 vnic_dev_close(enic->vdev); 2984 err_out_disable_sriov: 2985 kfree(enic->pp); 2986 err_out_disable_sriov_pp: 2987 #ifdef CONFIG_PCI_IOV 2988 if (enic_sriov_enabled(enic)) { 2989 pci_disable_sriov(pdev); 2990 enic->priv_flags &= ~ENIC_SRIOV_ENABLED; 2991 } 2992 #endif 2993 err_out_vnic_unregister: 2994 vnic_dev_unregister(enic->vdev); 2995 err_out_iounmap: 2996 enic_iounmap(enic); 2997 err_out_release_regions: 2998 pci_release_regions(pdev); 2999 err_out_disable_device: 3000 pci_disable_device(pdev); 3001 err_out_free_netdev: 3002 free_netdev(netdev); 3003 3004 return err; 3005 } 3006 3007 static void enic_remove(struct pci_dev *pdev) 3008 { 3009 struct net_device *netdev = pci_get_drvdata(pdev); 3010 3011 if (netdev) { 3012 struct enic *enic = netdev_priv(netdev); 3013 3014 cancel_work_sync(&enic->reset); 3015 cancel_work_sync(&enic->change_mtu_work); 3016 unregister_netdev(netdev); 3017 enic_dev_deinit(enic); 3018 vnic_dev_close(enic->vdev); 3019 #ifdef CONFIG_PCI_IOV 3020 if (enic_sriov_enabled(enic)) { 3021 pci_disable_sriov(pdev); 3022 enic->priv_flags &= ~ENIC_SRIOV_ENABLED; 3023 } 3024 #endif 3025 kfree(enic->pp); 3026 vnic_dev_unregister(enic->vdev); 3027 enic_iounmap(enic); 3028 pci_release_regions(pdev); 3029 pci_disable_device(pdev); 3030 free_netdev(netdev); 3031 } 3032 } 3033 3034 static struct pci_driver enic_driver = { 3035 .name = DRV_NAME, 3036 .id_table = enic_id_table, 3037 .probe = enic_probe, 3038 .remove = enic_remove, 3039 }; 3040 3041 module_pci_driver(enic_driver); 3042