1 /*-
2 * Copyright (c) 2015 The FreeBSD Foundation
3 *
4 * This software was developed by Semihalf under
5 * the sponsorship of the FreeBSD Foundation.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/param.h>
30 #include <sys/systm.h>
31 #include <sys/bitstring.h>
32 #include <sys/bus.h>
33 #include <sys/kernel.h>
34 #include <sys/module.h>
35 #include <sys/rman.h>
36
37 #include <machine/intr.h>
38 #include <machine/resource.h>
39
40 #include <dev/ofw/openfirm.h>
41 #include <dev/ofw/ofw_bus.h>
42 #include <dev/ofw/ofw_bus_subr.h>
43
44 #include <arm/arm/gic_common.h>
45 #include "gic_v3_reg.h"
46 #include "gic_v3_var.h"
47
48 /*
49 * FDT glue.
50 */
51 static int gic_v3_fdt_probe(device_t);
52 static int gic_v3_fdt_attach(device_t);
53
54 static const struct ofw_bus_devinfo *gic_v3_ofw_get_devinfo(device_t, device_t);
55 static bus_get_resource_list_t gic_v3_fdt_get_resource_list;
56
57 static device_method_t gic_v3_fdt_methods[] = {
58 /* Device interface */
59 DEVMETHOD(device_probe, gic_v3_fdt_probe),
60 DEVMETHOD(device_attach, gic_v3_fdt_attach),
61
62 /* Bus interface */
63 DEVMETHOD(bus_get_resource_list, gic_v3_fdt_get_resource_list),
64 DEVMETHOD(bus_get_device_path, ofw_bus_gen_get_device_path),
65
66 /* ofw_bus interface */
67 DEVMETHOD(ofw_bus_get_devinfo, gic_v3_ofw_get_devinfo),
68 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
69 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
70 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
71 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
72 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
73
74 /* End */
75 DEVMETHOD_END
76 };
77
78 DEFINE_CLASS_1(gic, gic_v3_fdt_driver, gic_v3_fdt_methods,
79 sizeof(struct gic_v3_softc), gic_v3_driver);
80
81 EARLY_DRIVER_MODULE(gic_v3, simplebus, gic_v3_fdt_driver, 0, 0,
82 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
83 EARLY_DRIVER_MODULE(gic_v3, ofwbus, gic_v3_fdt_driver, 0, 0,
84 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
85
86 /*
87 * Helper functions declarations.
88 */
89 static void gic_v3_ofw_bus_attach(device_t);
90
91 /*
92 * Device interface.
93 */
94 static int
gic_v3_fdt_probe(device_t dev)95 gic_v3_fdt_probe(device_t dev)
96 {
97
98 if (!ofw_bus_status_okay(dev))
99 return (ENXIO);
100
101 if (!ofw_bus_is_compatible(dev, "arm,gic-v3"))
102 return (ENXIO);
103
104 device_set_desc(dev, GIC_V3_DEVSTR);
105 return (BUS_PROBE_DEFAULT);
106 }
107
108 static int
gic_v3_fdt_attach(device_t dev)109 gic_v3_fdt_attach(device_t dev)
110 {
111 struct gic_v3_softc *sc;
112 pcell_t redist_regions;
113 phandle_t xref, node;
114 int err;
115 uint32_t *mbi_ranges;
116 ssize_t ret;
117
118 sc = device_get_softc(dev);
119 sc->dev = dev;
120 sc->gic_bus = GIC_BUS_FDT;
121 node = ofw_bus_get_node(dev);
122
123 /*
124 * Limit DMA shareability. "dma-noncoherent" was introduced in DT 6.15.
125 * For compatibility with previous versions, also use a match based on
126 * affected SoCs.
127 */
128 if (OF_hasprop(node, "dma-noncoherent") ||
129 ofw_bus_is_machine_compatible("rockchip,rk3566") ||
130 ofw_bus_is_machine_compatible("rockchip,rk3568") ||
131 ofw_bus_is_machine_compatible("rockchip,rk3588") ||
132 ofw_bus_is_machine_compatible("rockchip,rk3588s"))
133 sc->gic_flags |= GIC_V3_FLAGS_FORCE_NOSHAREABLE;
134
135 /*
136 * Recover number of the Re-Distributor regions.
137 */
138 if (OF_getencprop(ofw_bus_get_node(dev), "#redistributor-regions",
139 &redist_regions, sizeof(redist_regions)) <= 0)
140 sc->gic_redists.nregions = 1;
141 else
142 sc->gic_redists.nregions = redist_regions;
143
144 /* Add Message Based Interrupts using SPIs. */
145 ret = OF_getencprop_alloc_multi(ofw_bus_get_node(dev), "mbi-ranges",
146 sizeof(*mbi_ranges), (void **)&mbi_ranges);
147 if (ret > 0) {
148 if (ret % 2 == 0) {
149 /* Limit to a single range for now. */
150 sc->gic_mbi_start = mbi_ranges[0];
151 sc->gic_mbi_end = mbi_ranges[0] + mbi_ranges[1];
152 } else {
153 if (bootverbose)
154 device_printf(dev, "Malformed mbi-ranges property\n");
155 }
156 free(mbi_ranges, M_OFWPROP);
157 }
158
159 err = gic_v3_attach(dev);
160 if (err != 0)
161 goto error;
162
163 xref = OF_xref_from_node(ofw_bus_get_node(dev));
164 sc->gic_pic = intr_pic_register(dev, xref);
165 if (sc->gic_pic == NULL) {
166 device_printf(dev, "could not register PIC\n");
167 err = ENXIO;
168 goto error;
169 }
170
171 if (sc->gic_mbi_start > 0)
172 intr_msi_register(dev, xref);
173
174 /* Register xref */
175 OF_device_register_xref(xref, dev);
176
177 err = intr_pic_claim_root(dev, xref, arm_gic_v3_intr, sc, INTR_ROOT_IRQ);
178 if (err != 0) {
179 err = ENXIO;
180 goto error;
181 }
182
183 #ifdef SMP
184 err = intr_ipi_pic_register(dev, 0);
185 if (err != 0) {
186 device_printf(dev, "could not register for IPIs\n");
187 goto error;
188 }
189 #endif
190
191 /*
192 * Try to register ITS to this GIC.
193 * GIC will act as a bus in that case.
194 * Failure here will not affect main GIC functionality.
195 */
196 gic_v3_ofw_bus_attach(dev);
197
198 if (device_get_children(dev, &sc->gic_children, &sc->gic_nchildren) != 0)
199 sc->gic_nchildren = 0;
200
201 return (err);
202
203 error:
204 if (bootverbose) {
205 device_printf(dev,
206 "Failed to attach. Error %d\n", err);
207 }
208 /* Failure so free resources */
209 gic_v3_detach(dev);
210
211 return (err);
212 }
213
214 /* OFW bus interface */
215 struct gic_v3_ofw_devinfo {
216 struct gic_v3_devinfo di_gic_dinfo;
217 struct ofw_bus_devinfo di_dinfo;
218 struct resource_list di_rl;
219 };
220
221 static const struct ofw_bus_devinfo *
gic_v3_ofw_get_devinfo(device_t bus __unused,device_t child)222 gic_v3_ofw_get_devinfo(device_t bus __unused, device_t child)
223 {
224 struct gic_v3_ofw_devinfo *di;
225
226 di = device_get_ivars(child);
227 if (di->di_gic_dinfo.is_vgic)
228 return (NULL);
229 return (&di->di_dinfo);
230 }
231
232 /* Helper functions */
233 static int
gic_v3_ofw_fill_ranges(phandle_t parent,struct gic_v3_softc * sc,pcell_t * addr_cellsp,pcell_t * size_cellsp)234 gic_v3_ofw_fill_ranges(phandle_t parent, struct gic_v3_softc *sc,
235 pcell_t *addr_cellsp, pcell_t *size_cellsp)
236 {
237 pcell_t addr_cells, host_cells, size_cells;
238 cell_t *base_ranges;
239 ssize_t nbase_ranges;
240 int i, j, k;
241
242 host_cells = 1;
243 OF_getencprop(OF_parent(parent), "#address-cells", &host_cells,
244 sizeof(host_cells));
245 addr_cells = 2;
246 OF_getencprop(parent, "#address-cells", &addr_cells,
247 sizeof(addr_cells));
248 size_cells = 2;
249 OF_getencprop(parent, "#size-cells", &size_cells,
250 sizeof(size_cells));
251
252 *addr_cellsp = addr_cells;
253 *size_cellsp = size_cells;
254
255 nbase_ranges = OF_getproplen(parent, "ranges");
256 if (nbase_ranges < 0)
257 return (EINVAL);
258
259 sc->nranges = nbase_ranges / sizeof(cell_t) /
260 (addr_cells + host_cells + size_cells);
261 if (sc->nranges == 0)
262 return (0);
263
264 sc->ranges = malloc(sc->nranges * sizeof(sc->ranges[0]), M_GIC_V3,
265 M_WAITOK);
266 base_ranges = malloc(nbase_ranges, M_DEVBUF, M_WAITOK);
267 OF_getencprop(parent, "ranges", base_ranges, nbase_ranges);
268
269 for (i = 0, j = 0; i < sc->nranges; i++) {
270 sc->ranges[i].bus = 0;
271 for (k = 0; k < addr_cells; k++) {
272 sc->ranges[i].bus <<= 32;
273 sc->ranges[i].bus |= base_ranges[j++];
274 }
275 sc->ranges[i].host = 0;
276 for (k = 0; k < host_cells; k++) {
277 sc->ranges[i].host <<= 32;
278 sc->ranges[i].host |= base_ranges[j++];
279 }
280 sc->ranges[i].size = 0;
281 for (k = 0; k < size_cells; k++) {
282 sc->ranges[i].size <<= 32;
283 sc->ranges[i].size |= base_ranges[j++];
284 }
285 }
286
287 free(base_ranges, M_DEVBUF);
288 return (0);
289 }
290
291 /*
292 * Bus capability support for GICv3.
293 * Collects and configures device informations and finally
294 * adds ITS device as a child of GICv3 in Newbus hierarchy.
295 */
296 static void
gic_v3_ofw_bus_attach(device_t dev)297 gic_v3_ofw_bus_attach(device_t dev)
298 {
299 struct gic_v3_ofw_devinfo *di;
300 struct gic_v3_softc *sc;
301 device_t child;
302 phandle_t parent, node;
303 pcell_t addr_cells, size_cells;
304 int rv;
305
306 sc = device_get_softc(dev);
307 parent = ofw_bus_get_node(dev);
308 if (parent > 0) {
309 rv = gic_v3_ofw_fill_ranges(parent, sc, &addr_cells,
310 &size_cells);
311 if (rv != 0) {
312 if (bootverbose) {
313 device_printf(dev,
314 "Failed to attach ITS to this GIC\n");
315 }
316 goto vgic;
317 }
318
319 /* Iterate through all GIC subordinates */
320 for (node = OF_child(parent); node > 0; node = OF_peer(node)) {
321 /*
322 * Ignore children that lack a compatible property.
323 * Some of them may be for configuration, for example
324 * ppi-partitions.
325 */
326 if (!OF_hasprop(node, "compatible"))
327 continue;
328
329 /* Allocate and populate devinfo. */
330 di = malloc(sizeof(*di), M_GIC_V3, M_WAITOK | M_ZERO);
331
332 /* Read the numa node, or -1 if there is none */
333 if (OF_getencprop(node, "numa-node-id",
334 &di->di_gic_dinfo.gic_domain,
335 sizeof(di->di_gic_dinfo.gic_domain)) <= 0) {
336 di->di_gic_dinfo.gic_domain = -1;
337 }
338
339 if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node)) {
340 if (bootverbose) {
341 device_printf(dev,
342 "Could not set up devinfo for ITS\n");
343 }
344 free(di, M_GIC_V3);
345 continue;
346 }
347
348 /* Initialize and populate resource list. */
349 resource_list_init(&di->di_rl);
350 ofw_bus_reg_to_rl(dev, node, addr_cells, size_cells,
351 &di->di_rl);
352
353 /* Should not have any interrupts, so don't add any */
354
355 /* Add newbus device for this FDT node */
356 child = device_add_child(dev, NULL, DEVICE_UNIT_ANY);
357 if (!child) {
358 if (bootverbose) {
359 device_printf(dev,
360 "Could not add child: %s\n",
361 di->di_dinfo.obd_name);
362 }
363 resource_list_free(&di->di_rl);
364 ofw_bus_gen_destroy_devinfo(&di->di_dinfo);
365 free(di, M_GIC_V3);
366 continue;
367 }
368
369 sc->gic_nchildren++;
370 device_set_ivars(child, di);
371 }
372
373 vgic:
374
375 /*
376 * If there is a vgic maintanance interrupt add a virtual gic
377 * child so we can use this in the vmm module for bhyve.
378 */
379 if (OF_hasprop(parent, "interrupts")) {
380 child = device_add_child(dev, "vgic", DEVICE_UNIT_ANY);
381 if (child == NULL) {
382 device_printf(dev,
383 "Could not add vgic child\n");
384 } else {
385 di = malloc(sizeof(*di), M_GIC_V3,
386 M_WAITOK | M_ZERO);
387 resource_list_init(&di->di_rl);
388 di->di_gic_dinfo.gic_domain = -1;
389 di->di_gic_dinfo.is_vgic = 1;
390 device_set_ivars(child, di);
391 sc->gic_nchildren++;
392 }
393 }
394 }
395
396 bus_attach_children(dev);
397 }
398
399 static struct resource_list *
gic_v3_fdt_get_resource_list(device_t bus,device_t child)400 gic_v3_fdt_get_resource_list(device_t bus, device_t child)
401 {
402 struct gic_v3_ofw_devinfo *di;
403
404 di = device_get_ivars(child);
405 KASSERT(di != NULL, ("%s: No devinfo", __func__));
406
407 return (&di->di_rl);
408 }
409