1 /*
2 * Copyright (c) 2015-2024, Broadcom. All rights reserved. The term
3 * Broadcom refers to Broadcom Limited and/or its subsidiaries.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in
13 * the documentation and/or other materials provided with the
14 * distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
18 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Description: Fast Path Operators (header)
29 */
30
31 #ifndef __BNXT_QPLIB_FP_H__
32 #define __BNXT_QPLIB_FP_H__
33
34 /* Temp header structures for SQ */
35 struct sq_ud_ext_hdr {
36 __le32 dst_qp;
37 __le32 avid;
38 __le64 rsvd;
39 };
40
41 struct sq_raw_ext_hdr {
42 __le32 cfa_meta;
43 __le32 rsvd0;
44 __le64 rsvd1;
45 };
46
47 struct sq_rdma_ext_hdr {
48 __le64 remote_va;
49 __le32 remote_key;
50 __le32 rsvd;
51 };
52
53 struct sq_atomic_ext_hdr {
54 __le64 swap_data;
55 __le64 cmp_data;
56 };
57
58 struct sq_fr_pmr_ext_hdr {
59 __le64 pblptr;
60 __le64 va;
61 };
62
63 struct sq_bind_ext_hdr {
64 __le64 va;
65 __le32 length_lo;
66 __le32 length_hi;
67 };
68
69 struct rq_ext_hdr {
70 __le64 rsvd1;
71 __le64 rsvd2;
72 };
73
74 #define BNXT_QPLIB_ETHTYPE_ROCEV1 0x8915
75
76 struct bnxt_qplib_srq {
77 struct bnxt_qplib_pd *pd;
78 struct bnxt_qplib_dpi *dpi;
79 struct bnxt_qplib_chip_ctx *cctx;
80 struct bnxt_qplib_cq *cq;
81 struct bnxt_qplib_swq *swq;
82 struct bnxt_qplib_hwq hwq;
83 struct bnxt_qplib_db_info dbinfo;
84 struct bnxt_qplib_sg_info sginfo;
85 u64 srq_handle;
86 u32 id;
87 u16 wqe_size;
88 u32 max_wqe;
89 u32 max_sge;
90 u32 threshold;
91 bool arm_req;
92 int start_idx;
93 int last_idx;
94 u16 eventq_hw_ring_id;
95 bool is_user;
96 spinlock_t lock;
97 };
98
99 struct bnxt_qplib_sge {
100 u64 addr;
101 u32 size;
102 u32 lkey;
103 };
104
105 /*
106 * Buffer space for ETH(14), IP or GRH(40), UDP header(8)
107 * and ib_bth + ib_deth (20).
108 * Max required is 82 when RoCE V2 is enabled
109 */
110
111 /*
112 * RoCE V1 (38 bytes needed)
113 * +------------+----------+--------+--------+-------+
114 * |Eth-hdr(14B)| GRH (40B)|bth+deth| Mad | iCRC |
115 * | | supplied | 20B |payload | 4B |
116 * | | by user |supplied| 256B | |
117 * | | mad | |by user | |
118 * | | | | | |
119 * | sge 1 | sge 2 | sge 3 | sge 4 | sge 5 |
120 * +------------+----------+--------+--------+-------+
121 */
122
123 /*
124 * RoCE V2-IPv4 (46 Bytes needed)
125 * +------------+----------+--------+--------+-------+
126 * |Eth-hdr(14B)| IP-hdr |UDP-hdr | Mad | iCRC |
127 * | | supplied | 8B |payload | 4B |
128 * | | by user |bth+deth| 256B | |
129 * | | mad lower| 20B |supplied| |
130 * | | 20B out | (sge 3)|by user | |
131 * | | of 40B | | | |
132 * | | grh space| | | |
133 * | sge 1 | sge 2 | sge 3 | sge 4 | sge 5 |
134 * +------------+----------+--------+--------+-------+
135 */
136
137 /*
138 * RoCE V2-IPv6 (46 Bytes needed)
139 * +------------+----------+--------+--------+-------+
140 * |Eth-hdr(14B)| IPv6 |UDP-hdr | Mad | iCRC |
141 * | | supplied | 8B |payload | 4B |
142 * | | by user |bth+deth| 256B | |
143 * | | mad lower| 20B |supplied| |
144 * | | 40 bytes | |by user | |
145 * | | grh space| | | |
146 * | | | | | |
147 * | sge 1 | sge 2 | sge 3 | sge 4 | sge 5 |
148 * +------------+----------+--------+--------+-------+
149 */
150
151 #define BNXT_QPLIB_MAX_QP1_SQ_HDR_SIZE 74
152 #define BNXT_QPLIB_MAX_QP1_SQ_HDR_SIZE_V2 86
153 #define BNXT_QPLIB_MAX_QP1_RQ_HDR_SIZE 46
154 #define BNXT_QPLIB_MAX_QP1_RQ_ETH_HDR_SIZE 14
155 #define BNXT_QPLIB_MAX_QP1_RQ_HDR_SIZE_V2 512
156 #define BNXT_QPLIB_MAX_GRH_HDR_SIZE_IPV4 20
157 #define BNXT_QPLIB_MAX_GRH_HDR_SIZE_IPV6 40
158 #define BNXT_QPLIB_MAX_QP1_RQ_BDETH_HDR_SIZE 20
159 #define BNXT_QPLIB_MAX_SQSZ 0xFFFF
160
161 struct bnxt_qplib_hdrbuf {
162 dma_addr_t dma_map;
163 void *va;
164 u32 len;
165 u32 step;
166 };
167
168 struct bnxt_qplib_swq {
169 u64 wr_id;
170 int next_idx;
171 u8 type;
172 u8 flags;
173 u32 start_psn;
174 u32 next_psn;
175 u32 slot_idx;
176 u8 slots;
177 /* WIP: make it void * to handle legacy also */
178 struct sq_psn_search *psn_search;
179 void *inline_data;
180 };
181
182 struct bnxt_qplib_swqe {
183 /* General */
184 #define BNXT_QPLIB_FENCE_WRID 0x46454E43 /* "FENC" */
185 #define BNXT_QPLIB_QP1_DUMMY_WRID 0x44554D59 /* "DUMY" */
186 u64 wr_id;
187 u8 reqs_type;
188 u8 type;
189 #define BNXT_QPLIB_SWQE_TYPE_SEND 0
190 #define BNXT_QPLIB_SWQE_TYPE_SEND_WITH_IMM 1
191 #define BNXT_QPLIB_SWQE_TYPE_SEND_WITH_INV 2
192 #define BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE 4
193 #define BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE_WITH_IMM 5
194 #define BNXT_QPLIB_SWQE_TYPE_RDMA_READ 6
195 #define BNXT_QPLIB_SWQE_TYPE_ATOMIC_CMP_AND_SWP 8
196 #define BNXT_QPLIB_SWQE_TYPE_ATOMIC_FETCH_AND_ADD 11
197 #define BNXT_QPLIB_SWQE_TYPE_LOCAL_INV 12
198 #define BNXT_QPLIB_SWQE_TYPE_FAST_REG_MR 13
199 #define BNXT_QPLIB_SWQE_TYPE_REG_MR 13
200 #define BNXT_QPLIB_SWQE_TYPE_BIND_MW 14
201 #define BNXT_QPLIB_SWQE_TYPE_RECV 128
202 #define BNXT_QPLIB_SWQE_TYPE_RECV_RDMA_IMM 129
203 u8 flags;
204 #define BNXT_QPLIB_SWQE_FLAGS_SIGNAL_COMP (1 << 0)
205 #define BNXT_QPLIB_SWQE_FLAGS_RD_ATOMIC_FENCE (1 << 1)
206 #define BNXT_QPLIB_SWQE_FLAGS_UC_FENCE (1 << 2)
207 #define BNXT_QPLIB_SWQE_FLAGS_SOLICIT_EVENT (1 << 3)
208 #define BNXT_QPLIB_SWQE_FLAGS_INLINE (1 << 4)
209 struct bnxt_qplib_sge *sg_list;
210 int num_sge;
211
212 union {
213 /* Send, with imm, inval key */
214 struct {
215 union {
216 __be32 imm_data;
217 u32 inv_key;
218 };
219 u32 q_key;
220 u32 dst_qp;
221 u16 avid;
222 } send;
223
224 /* Send Raw Ethernet and QP1 */
225 struct {
226 u16 lflags;
227 u16 cfa_action;
228 u32 cfa_meta;
229 } rawqp1;
230
231 /* RDMA write, with imm, read */
232 struct {
233 union {
234 __be32 imm_data;
235 u32 inv_key;
236 };
237 u64 remote_va;
238 u32 r_key;
239 } rdma;
240
241 /* Atomic cmp/swap, fetch/add */
242 struct {
243 u64 remote_va;
244 u32 r_key;
245 u64 swap_data;
246 u64 cmp_data;
247 } atomic;
248
249 /* Local Invalidate */
250 struct {
251 u32 inv_l_key;
252 } local_inv;
253
254 /* FR-PMR */
255 struct {
256 u8 access_cntl;
257 u8 pg_sz_log;
258 bool zero_based;
259 u32 l_key;
260 u32 length;
261 u8 pbl_pg_sz_log;
262 #define BNXT_QPLIB_SWQE_PAGE_SIZE_4K 0
263 #define BNXT_QPLIB_SWQE_PAGE_SIZE_8K 1
264 #define BNXT_QPLIB_SWQE_PAGE_SIZE_64K 4
265 #define BNXT_QPLIB_SWQE_PAGE_SIZE_256K 6
266 #define BNXT_QPLIB_SWQE_PAGE_SIZE_1M 8
267 #define BNXT_QPLIB_SWQE_PAGE_SIZE_2M 9
268 #define BNXT_QPLIB_SWQE_PAGE_SIZE_4M 10
269 #define BNXT_QPLIB_SWQE_PAGE_SIZE_1G 18
270 u8 levels;
271 #define PAGE_SHIFT_4K 12
272 __le64 *pbl_ptr;
273 dma_addr_t pbl_dma_ptr;
274 u64 *page_list;
275 u16 page_list_len;
276 u64 va;
277 } frmr;
278
279 /* Bind */
280 struct {
281 u8 access_cntl;
282 #define BNXT_QPLIB_BIND_SWQE_ACCESS_LOCAL_WRITE (1 << 0)
283 #define BNXT_QPLIB_BIND_SWQE_ACCESS_REMOTE_READ (1 << 1)
284 #define BNXT_QPLIB_BIND_SWQE_ACCESS_REMOTE_WRITE (1 << 2)
285 #define BNXT_QPLIB_BIND_SWQE_ACCESS_REMOTE_ATOMIC (1 << 3)
286 #define BNXT_QPLIB_BIND_SWQE_ACCESS_WINDOW_BIND (1 << 4)
287 bool zero_based;
288 u8 mw_type;
289 u32 parent_l_key;
290 u32 r_key;
291 u64 va;
292 u32 length;
293 } bind;
294 };
295 };
296
297 struct bnxt_qplib_q {
298 struct bnxt_qplib_swq *swq;
299 struct bnxt_qplib_db_info dbinfo;
300 struct bnxt_qplib_sg_info sginfo;
301 struct bnxt_qplib_hwq hwq;
302 u32 max_wqe;
303 u32 max_sw_wqe;
304 u16 max_sge;
305 u16 wqe_size;
306 u16 q_full_delta;
307 u32 psn;
308 bool condition;
309 bool single;
310 bool legacy_send_phantom;
311 u32 phantom_wqe_cnt;
312 u32 phantom_cqe_cnt;
313 u32 next_cq_cons;
314 bool flushed;
315 u32 swq_start;
316 u32 swq_last;
317 };
318
319 #define BNXT_QPLIB_PPP_REQ 0x1
320 #define BNXT_QPLIB_PPP_ST_IDX_SHIFT 0x1
321
322 struct bnxt_qplib_ppp {
323 u32 dpi;
324 u8 req;
325 u8 st_idx_en;
326 };
327
328 struct bnxt_qplib_qp {
329 struct bnxt_qplib_pd *pd;
330 struct bnxt_qplib_dpi *dpi;
331 struct bnxt_qplib_chip_ctx *cctx;
332 u64 qp_handle;
333 #define BNXT_QPLIB_QP_ID_INVALID 0xFFFFFFFF
334 u32 id;
335 u8 type;
336 u8 sig_type;
337 u8 wqe_mode;
338 u8 state;
339 u8 cur_qp_state;
340 u8 is_user;
341 u64 modify_flags;
342 u32 max_inline_data;
343 u32 mtu;
344 u32 path_mtu;
345 bool en_sqd_async_notify;
346 u16 pkey_index;
347 u32 qkey;
348 u32 dest_qp_id;
349 u8 access;
350 u8 timeout;
351 u8 retry_cnt;
352 u8 rnr_retry;
353 u64 wqe_cnt;
354 u32 min_rnr_timer;
355 u32 max_rd_atomic;
356 u32 max_dest_rd_atomic;
357 u32 dest_qpn;
358 u8 smac[6];
359 u16 vlan_id;
360 u8 nw_type;
361 u16 port_id;
362 struct bnxt_qplib_ah ah;
363 struct bnxt_qplib_ppp ppp;
364
365 #define BTH_PSN_MASK ((1 << 24) - 1)
366 /* SQ */
367 struct bnxt_qplib_q sq;
368 /* RQ */
369 struct bnxt_qplib_q rq;
370 /* SRQ */
371 struct bnxt_qplib_srq *srq;
372 /* CQ */
373 struct bnxt_qplib_cq *scq;
374 struct bnxt_qplib_cq *rcq;
375 /* IRRQ and ORRQ */
376 struct bnxt_qplib_hwq irrq;
377 struct bnxt_qplib_hwq orrq;
378 /* Header buffer for QP1 */
379 struct bnxt_qplib_hdrbuf *sq_hdr_buf;
380 struct bnxt_qplib_hdrbuf *rq_hdr_buf;
381
382 /* ToS */
383 u8 tos_ecn;
384 u8 tos_dscp;
385 /* To track the SQ and RQ flush list */
386 struct list_head sq_flush;
387 struct list_head rq_flush;
388 /* 4 bytes of QP's scrabled mac received from FW */
389 u32 lag_src_mac;
390 u32 msn;
391 u32 msn_tbl_sz;
392 /* get devflags in PI code */
393 u16 dev_cap_flags;
394 bool is_host_msn_tbl;
395 };
396
397
398 #define CQE_CMP_VALID(hdr, pass) \
399 (!!((hdr)->cqe_type_toggle & CQ_BASE_TOGGLE) == \
400 !(pass & BNXT_QPLIB_FLAG_EPOCH_CONS_MASK))
401
__bnxt_qplib_get_avail(struct bnxt_qplib_hwq * hwq)402 static inline u32 __bnxt_qplib_get_avail(struct bnxt_qplib_hwq *hwq)
403 {
404 int cons, prod, avail;
405
406 /* False full is possible retrying post-send makes sense */
407 cons = hwq->cons;
408 prod = hwq->prod;
409 avail = cons - prod;
410 if (cons <= prod)
411 avail += hwq->depth;
412 return avail;
413 }
414
bnxt_qplib_queue_full(struct bnxt_qplib_hwq * hwq,u8 slots)415 static inline bool bnxt_qplib_queue_full(struct bnxt_qplib_hwq *hwq, u8 slots)
416 {
417 return __bnxt_qplib_get_avail(hwq) <= slots;
418 }
419
420 struct bnxt_qplib_cqe {
421 u8 status;
422 u8 type;
423 u8 opcode;
424 u32 length;
425 /* Lower 16 is cfa_metadata0, Upper 16 is cfa_metadata1 */
426 u32 cfa_meta;
427 #define BNXT_QPLIB_META1_SHIFT 16
428 #define BNXT_QPLIB_CQE_CFA_META1_VALID 0x80000UL
429 u64 wr_id;
430 union {
431 __be32 immdata;
432 u32 invrkey;
433 };
434 u64 qp_handle;
435 u64 mr_handle;
436 u16 flags;
437 u8 smac[6];
438 u32 src_qp;
439 u16 raweth_qp1_flags;
440 u16 raweth_qp1_errors;
441 u16 raweth_qp1_cfa_code;
442 u32 raweth_qp1_flags2;
443 u32 raweth_qp1_metadata;
444 u8 raweth_qp1_payload_offset;
445 u16 pkey_index;
446 };
447
448 #define BNXT_QPLIB_QUEUE_START_PERIOD 0x01
449 struct bnxt_qplib_cq {
450 struct bnxt_qplib_dpi *dpi;
451 struct bnxt_qplib_chip_ctx *cctx;
452 struct bnxt_qplib_nq *nq;
453 struct bnxt_qplib_db_info dbinfo;
454 struct bnxt_qplib_sg_info sginfo;
455 struct bnxt_qplib_hwq hwq;
456 struct bnxt_qplib_hwq resize_hwq;
457 struct list_head sqf_head;
458 struct list_head rqf_head;
459 u32 max_wqe;
460 u32 id;
461 u16 count;
462 u16 period;
463 u32 cnq_hw_ring_id;
464 u64 cq_handle;
465 atomic_t arm_state;
466 #define CQ_RESIZE_WAIT_TIME_MS 500
467 unsigned long flags;
468 #define CQ_FLAGS_RESIZE_IN_PROG 1
469 wait_queue_head_t waitq;
470 spinlock_t flush_lock; /* lock flush queue list */
471 spinlock_t compl_lock; /* synch CQ handlers */
472 u16 cnq_events;
473 bool is_cq_err_event;
474 bool destroyed;
475 u8 toggle;
476 };
477
478 #define BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE sizeof(struct xrrq_irrq)
479 #define BNXT_QPLIB_MAX_ORRQE_ENTRY_SIZE sizeof(struct xrrq_orrq)
480 #define IRD_LIMIT_TO_IRRQ_SLOTS(x) (2 * x + 2)
481 #define IRRQ_SLOTS_TO_IRD_LIMIT(s) ((s >> 1) - 1)
482 #define ORD_LIMIT_TO_ORRQ_SLOTS(x) (x + 1)
483 #define ORRQ_SLOTS_TO_ORD_LIMIT(s) (s - 1)
484
485 #define NQE_CMP_VALID(hdr, pass) \
486 (!!(le32_to_cpu((hdr)->info63_v & 0xffffffff) & NQ_BASE_V) == \
487 !(pass & BNXT_QPLIB_FLAG_EPOCH_CONS_MASK))
488
489 #define BNXT_QPLIB_NQE_MAX_CNT (128 * 1024)
490
491 /* MSN table print macros for debugging */
492 #define BNXT_RE_MSN_IDX(m) (((m) & SQ_MSN_SEARCH_START_IDX_MASK) >> \
493 SQ_MSN_SEARCH_START_IDX_SFT)
494 #define BNXT_RE_MSN_NPSN(m) (((m) & SQ_MSN_SEARCH_NEXT_PSN_MASK) >> \
495 SQ_MSN_SEARCH_NEXT_PSN_SFT)
496 #define BNXT_RE_MSN_SPSN(m) (((m) & SQ_MSN_SEARCH_START_PSN_MASK) >> \
497 SQ_MSN_SEARCH_START_PSN_SFT)
498 #define BNXT_MSN_TBLE_SGE 6
499
500 struct bnxt_qplib_nq_stats {
501 u64 num_dbqne_processed;
502 u64 num_srqne_processed;
503 u64 num_cqne_processed;
504 u64 num_tasklet_resched;
505 u64 num_nq_rearm;
506 };
507
508 struct bnxt_qplib_nq_db {
509 struct bnxt_qplib_reg_desc reg;
510 void __iomem *db;
511 struct bnxt_qplib_db_info dbinfo;
512 };
513
514 typedef int (*cqn_handler_t)(struct bnxt_qplib_nq *nq,
515 struct bnxt_qplib_cq *cq);
516 typedef int (*srqn_handler_t)(struct bnxt_qplib_nq *nq,
517 struct bnxt_qplib_srq *srq, u8 event);
518
519 struct bnxt_qplib_nq {
520 struct bnxt_qplib_res *res;
521 struct bnxt_qplib_hwq hwq;
522 struct bnxt_qplib_nq_db nq_db;
523
524 char *name;
525 u16 ring_id;
526 int msix_vec;
527 bool requested;
528 int budget;
529 u32 load;
530 struct mutex lock;
531
532 cqn_handler_t cqn_handler;
533 srqn_handler_t srqn_handler;
534 struct workqueue_struct *cqn_wq;
535 struct bnxt_qplib_nq_stats stats;
536 };
537
538 struct bnxt_qplib_nq_work {
539 struct work_struct work;
540 struct bnxt_qplib_nq *nq;
541 struct bnxt_qplib_cq *cq;
542 };
543
544 static inline dma_addr_t
bnxt_qplib_get_qp_buf_from_index(struct bnxt_qplib_qp * qp,u32 index)545 bnxt_qplib_get_qp_buf_from_index(struct bnxt_qplib_qp *qp, u32 index)
546 {
547 struct bnxt_qplib_hdrbuf *buf;
548
549 buf = qp->rq_hdr_buf;
550 return (buf->dma_map + index * buf->step);
551 }
552
553 void bnxt_qplib_nq_stop_irq(struct bnxt_qplib_nq *nq, bool kill);
554 void bnxt_qplib_disable_nq(struct bnxt_qplib_nq *nq);
555 int bnxt_qplib_nq_start_irq(struct bnxt_qplib_nq *nq, int nq_indx,
556 int msix_vector, bool need_init);
557 int bnxt_qplib_enable_nq(struct bnxt_qplib_nq *nq, int nq_idx,
558 int msix_vector, int bar_reg_offset,
559 cqn_handler_t cqn_handler,
560 srqn_handler_t srq_handler);
561 int bnxt_qplib_create_srq(struct bnxt_qplib_res *res,
562 struct bnxt_qplib_srq *srq);
563 int bnxt_qplib_modify_srq(struct bnxt_qplib_res *res,
564 struct bnxt_qplib_srq *srq);
565 int bnxt_qplib_query_srq(struct bnxt_qplib_res *res,
566 struct bnxt_qplib_srq *srq);
567 int bnxt_qplib_destroy_srq(struct bnxt_qplib_res *res,
568 struct bnxt_qplib_srq *srq);
569 int bnxt_qplib_post_srq_recv(struct bnxt_qplib_srq *srq,
570 struct bnxt_qplib_swqe *wqe);
571 int bnxt_qplib_create_qp1(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp);
572 int bnxt_qplib_create_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp);
573 int bnxt_qplib_modify_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp);
574 int bnxt_qplib_query_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp);
575 int bnxt_qplib_destroy_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp);
576 void bnxt_qplib_clean_qp(struct bnxt_qplib_qp *qp);
577 void bnxt_qplib_free_qp_res(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp);
578 void *bnxt_qplib_get_qp1_sq_buf(struct bnxt_qplib_qp *qp,
579 struct bnxt_qplib_sge *sge);
580 void *bnxt_qplib_get_qp1_rq_buf(struct bnxt_qplib_qp *qp,
581 struct bnxt_qplib_sge *sge);
582 u32 bnxt_qplib_get_rq_prod_index(struct bnxt_qplib_qp *qp);
583 void bnxt_qplib_post_send_db(struct bnxt_qplib_qp *qp);
584 int bnxt_qplib_post_send(struct bnxt_qplib_qp *qp,
585 struct bnxt_qplib_swqe *wqe);
586 void bnxt_qplib_post_recv_db(struct bnxt_qplib_qp *qp);
587 int bnxt_qplib_post_recv(struct bnxt_qplib_qp *qp,
588 struct bnxt_qplib_swqe *wqe);
589 int bnxt_qplib_create_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq);
590 int bnxt_qplib_modify_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq);
591 int bnxt_qplib_resize_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq,
592 int new_cqes);
593 void bnxt_qplib_resize_cq_complete(struct bnxt_qplib_res *res,
594 struct bnxt_qplib_cq *cq);
595 int bnxt_qplib_destroy_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq);
596 void bnxt_qplib_free_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq);
597 int bnxt_qplib_poll_cq(struct bnxt_qplib_cq *cq, struct bnxt_qplib_cqe *cqe,
598 int num, struct bnxt_qplib_qp **qp);
599 bool bnxt_qplib_is_cq_empty(struct bnxt_qplib_cq *cq);
600 void bnxt_qplib_req_notify_cq(struct bnxt_qplib_cq *cq, u32 arm_type);
601 void bnxt_qplib_free_nq_mem(struct bnxt_qplib_nq *nq);
602 int bnxt_qplib_alloc_nq_mem(struct bnxt_qplib_res *res,
603 struct bnxt_qplib_nq *nq);
604 void bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp *qp);
605 void bnxt_qplib_del_flush_qp(struct bnxt_qplib_qp *qp);
606 int bnxt_qplib_process_flush_list(struct bnxt_qplib_cq *cq,
607 struct bnxt_qplib_cqe *cqe,
608 int num_cqes);
609 void bnxt_qplib_flush_cqn_wq(struct bnxt_qplib_qp *qp);
610 void bnxt_qplib_free_hdr_buf(struct bnxt_qplib_res *res,
611 struct bnxt_qplib_qp *qp);
612 int bnxt_qplib_alloc_hdr_buf(struct bnxt_qplib_res *res,
613 struct bnxt_qplib_qp *qp, u32 slen, u32 rlen);
614
__can_request_ppp(struct bnxt_qplib_qp * qp)615 static inline bool __can_request_ppp(struct bnxt_qplib_qp *qp)
616 {
617 bool can_request = false;
618
619 if (qp->cur_qp_state == CMDQ_MODIFY_QP_NEW_STATE_RESET &&
620 qp->state == CMDQ_MODIFY_QP_NEW_STATE_INIT &&
621 qp->ppp.req &&
622 !(qp->ppp.st_idx_en &
623 CREQ_MODIFY_QP_RESP_PINGPONG_PUSH_ENABLED))
624 can_request = true;
625 return can_request;
626 }
627
628 /* MSN table update inlin */
bnxt_re_update_msn_tbl(uint32_t st_idx,uint32_t npsn,uint32_t start_psn)629 static inline uint64_t bnxt_re_update_msn_tbl(uint32_t st_idx, uint32_t npsn, uint32_t start_psn)
630 {
631 return cpu_to_le64((((u64)(st_idx) << SQ_MSN_SEARCH_START_IDX_SFT) &
632 SQ_MSN_SEARCH_START_IDX_MASK) |
633 (((u64)(npsn) << SQ_MSN_SEARCH_NEXT_PSN_SFT) &
634 SQ_MSN_SEARCH_NEXT_PSN_MASK) |
635 (((start_psn) << SQ_MSN_SEARCH_START_PSN_SFT) &
636 SQ_MSN_SEARCH_START_PSN_MASK));
637 }
638
__is_var_wqe(struct bnxt_qplib_qp * qp)639 static inline bool __is_var_wqe(struct bnxt_qplib_qp *qp)
640 {
641 return (qp->wqe_mode == BNXT_QPLIB_WQE_MODE_VARIABLE);
642 }
643
__is_err_cqe_for_var_wqe(struct bnxt_qplib_qp * qp,u8 status)644 static inline bool __is_err_cqe_for_var_wqe(struct bnxt_qplib_qp *qp, u8 status)
645 {
646 return (status != CQ_REQ_STATUS_OK) && __is_var_wqe(qp);
647 }
648
649 void bnxt_re_schedule_dbq_event(struct bnxt_qplib_res *res);
650 u32 bnxt_qplib_get_depth(struct bnxt_qplib_q *que, u8 wqe_mode, bool is_sq);
651 #endif
652