1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2024 Intel Corporation. */
3
4 /* ethtool support for ixgbe */
5
6 #include <linux/interrupt.h>
7 #include <linux/types.h>
8 #include <linux/module.h>
9 #include <linux/slab.h>
10 #include <linux/pci.h>
11 #include <linux/netdevice.h>
12 #include <linux/ethtool.h>
13 #include <linux/vmalloc.h>
14 #include <linux/highmem.h>
15 #include <linux/uaccess.h>
16
17 #include "ixgbe.h"
18 #include "ixgbe_phy.h"
19
20
21 enum {NETDEV_STATS, IXGBE_STATS};
22
23 struct ixgbe_stats {
24 char stat_string[ETH_GSTRING_LEN];
25 int type;
26 int sizeof_stat;
27 int stat_offset;
28 };
29
30 #define IXGBE_STAT(m) IXGBE_STATS, \
31 sizeof(((struct ixgbe_adapter *)0)->m), \
32 offsetof(struct ixgbe_adapter, m)
33 #define IXGBE_NETDEV_STAT(m) NETDEV_STATS, \
34 sizeof(((struct rtnl_link_stats64 *)0)->m), \
35 offsetof(struct rtnl_link_stats64, m)
36
37 static const struct ixgbe_stats ixgbe_gstrings_stats[] = {
38 {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)},
39 {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)},
40 {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)},
41 {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)},
42 {"rx_pkts_nic", IXGBE_STAT(stats.gprc)},
43 {"tx_pkts_nic", IXGBE_STAT(stats.gptc)},
44 {"rx_bytes_nic", IXGBE_STAT(stats.gorc)},
45 {"tx_bytes_nic", IXGBE_STAT(stats.gotc)},
46 {"lsc_int", IXGBE_STAT(lsc_int)},
47 {"tx_busy", IXGBE_STAT(tx_busy)},
48 {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
49 {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)},
50 {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)},
51 {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)},
52 {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)},
53 {"multicast", IXGBE_NETDEV_STAT(multicast)},
54 {"broadcast", IXGBE_STAT(stats.bprc)},
55 {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
56 {"collisions", IXGBE_NETDEV_STAT(collisions)},
57 {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)},
58 {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)},
59 {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)},
60 {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)},
61 {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)},
62 {"fdir_match", IXGBE_STAT(stats.fdirmatch)},
63 {"fdir_miss", IXGBE_STAT(stats.fdirmiss)},
64 {"fdir_overflow", IXGBE_STAT(fdir_overflow)},
65 {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)},
66 {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)},
67 {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)},
68 {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)},
69 {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)},
70 {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)},
71 {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
72 {"tx_restart_queue", IXGBE_STAT(restart_queue)},
73 {"rx_length_errors", IXGBE_STAT(stats.rlec)},
74 {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
75 {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
76 {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
77 {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
78 {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
79 {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
80 {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
81 {"alloc_rx_page", IXGBE_STAT(alloc_rx_page)},
82 {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
83 {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
84 {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
85 {"os2bmc_rx_by_bmc", IXGBE_STAT(stats.o2bgptc)},
86 {"os2bmc_tx_by_bmc", IXGBE_STAT(stats.b2ospc)},
87 {"os2bmc_tx_by_host", IXGBE_STAT(stats.o2bspc)},
88 {"os2bmc_rx_by_host", IXGBE_STAT(stats.b2ogprc)},
89 {"tx_hwtstamp_timeouts", IXGBE_STAT(tx_hwtstamp_timeouts)},
90 {"tx_hwtstamp_skipped", IXGBE_STAT(tx_hwtstamp_skipped)},
91 {"rx_hwtstamp_cleared", IXGBE_STAT(rx_hwtstamp_cleared)},
92 {"tx_ipsec", IXGBE_STAT(tx_ipsec)},
93 {"rx_ipsec", IXGBE_STAT(rx_ipsec)},
94 #ifdef IXGBE_FCOE
95 {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)},
96 {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)},
97 {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)},
98 {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)},
99 {"fcoe_noddp", IXGBE_STAT(stats.fcoe_noddp)},
100 {"fcoe_noddp_ext_buff", IXGBE_STAT(stats.fcoe_noddp_ext_buff)},
101 {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)},
102 {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)},
103 #endif /* IXGBE_FCOE */
104 };
105
106 /* ixgbe allocates num_tx_queues and num_rx_queues symmetrically so
107 * we set the num_rx_queues to evaluate to num_tx_queues. This is
108 * used because we do not have a good way to get the max number of
109 * rx queues with CONFIG_RPS disabled.
110 */
111 #define IXGBE_NUM_RX_QUEUES netdev->num_tx_queues
112
113 #define IXGBE_QUEUE_STATS_LEN ( \
114 (netdev->num_tx_queues + IXGBE_NUM_RX_QUEUES) * \
115 (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
116 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
117 #define IXGBE_PB_STATS_LEN ( \
118 (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
119 sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
120 sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
121 sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
122 / sizeof(u64))
123 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
124 IXGBE_PB_STATS_LEN + \
125 IXGBE_QUEUE_STATS_LEN)
126
127 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
128 "Register test (offline)", "Eeprom test (offline)",
129 "Interrupt test (offline)", "Loopback test (offline)",
130 "Link test (on/offline)"
131 };
132 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN
133
134 static const char ixgbe_priv_flags_strings[][ETH_GSTRING_LEN] = {
135 #define IXGBE_PRIV_FLAGS_LEGACY_RX BIT(0)
136 "legacy-rx",
137 #define IXGBE_PRIV_FLAGS_VF_IPSEC_EN BIT(1)
138 "vf-ipsec",
139 #define IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF BIT(2)
140 "mdd-disable-vf",
141 };
142
143 #define IXGBE_PRIV_FLAGS_STR_LEN ARRAY_SIZE(ixgbe_priv_flags_strings)
144
145 #define ixgbe_isbackplane(type) ((type) == ixgbe_media_type_backplane)
146
ixgbe_set_supported_10gtypes(struct ixgbe_hw * hw,struct ethtool_link_ksettings * cmd)147 static void ixgbe_set_supported_10gtypes(struct ixgbe_hw *hw,
148 struct ethtool_link_ksettings *cmd)
149 {
150 if (!ixgbe_isbackplane(hw->phy.media_type)) {
151 ethtool_link_ksettings_add_link_mode(cmd, supported,
152 10000baseT_Full);
153 return;
154 }
155
156 switch (hw->device_id) {
157 case IXGBE_DEV_ID_82598:
158 case IXGBE_DEV_ID_82599_KX4:
159 case IXGBE_DEV_ID_82599_KX4_MEZZ:
160 case IXGBE_DEV_ID_X550EM_X_KX4:
161 ethtool_link_ksettings_add_link_mode
162 (cmd, supported, 10000baseKX4_Full);
163 break;
164 case IXGBE_DEV_ID_82598_BX:
165 case IXGBE_DEV_ID_82599_KR:
166 case IXGBE_DEV_ID_X550EM_X_KR:
167 case IXGBE_DEV_ID_X550EM_X_XFI:
168 ethtool_link_ksettings_add_link_mode
169 (cmd, supported, 10000baseKR_Full);
170 break;
171 default:
172 ethtool_link_ksettings_add_link_mode
173 (cmd, supported, 10000baseKX4_Full);
174 ethtool_link_ksettings_add_link_mode
175 (cmd, supported, 10000baseKR_Full);
176 break;
177 }
178 }
179
ixgbe_set_advertising_10gtypes(struct ixgbe_hw * hw,struct ethtool_link_ksettings * cmd)180 static void ixgbe_set_advertising_10gtypes(struct ixgbe_hw *hw,
181 struct ethtool_link_ksettings *cmd)
182 {
183 if (!ixgbe_isbackplane(hw->phy.media_type)) {
184 ethtool_link_ksettings_add_link_mode(cmd, advertising,
185 10000baseT_Full);
186 return;
187 }
188
189 switch (hw->device_id) {
190 case IXGBE_DEV_ID_82598:
191 case IXGBE_DEV_ID_82599_KX4:
192 case IXGBE_DEV_ID_82599_KX4_MEZZ:
193 case IXGBE_DEV_ID_X550EM_X_KX4:
194 ethtool_link_ksettings_add_link_mode
195 (cmd, advertising, 10000baseKX4_Full);
196 break;
197 case IXGBE_DEV_ID_82598_BX:
198 case IXGBE_DEV_ID_82599_KR:
199 case IXGBE_DEV_ID_X550EM_X_KR:
200 case IXGBE_DEV_ID_X550EM_X_XFI:
201 ethtool_link_ksettings_add_link_mode
202 (cmd, advertising, 10000baseKR_Full);
203 break;
204 default:
205 ethtool_link_ksettings_add_link_mode
206 (cmd, advertising, 10000baseKX4_Full);
207 ethtool_link_ksettings_add_link_mode
208 (cmd, advertising, 10000baseKR_Full);
209 break;
210 }
211 }
212
ixgbe_get_link_ksettings(struct net_device * netdev,struct ethtool_link_ksettings * cmd)213 static int ixgbe_get_link_ksettings(struct net_device *netdev,
214 struct ethtool_link_ksettings *cmd)
215 {
216 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
217 struct ixgbe_hw *hw = &adapter->hw;
218 ixgbe_link_speed supported_link;
219 bool autoneg = false;
220
221 ethtool_link_ksettings_zero_link_mode(cmd, supported);
222 ethtool_link_ksettings_zero_link_mode(cmd, advertising);
223
224 hw->mac.ops.get_link_capabilities(hw, &supported_link, &autoneg);
225
226 /* set the supported link speeds */
227 if (supported_link & IXGBE_LINK_SPEED_10GB_FULL) {
228 ixgbe_set_supported_10gtypes(hw, cmd);
229 ixgbe_set_advertising_10gtypes(hw, cmd);
230 }
231 if (supported_link & IXGBE_LINK_SPEED_5GB_FULL)
232 ethtool_link_ksettings_add_link_mode(cmd, supported,
233 5000baseT_Full);
234
235 if (supported_link & IXGBE_LINK_SPEED_2_5GB_FULL)
236 ethtool_link_ksettings_add_link_mode(cmd, supported,
237 2500baseT_Full);
238
239 if (supported_link & IXGBE_LINK_SPEED_1GB_FULL) {
240 if (ixgbe_isbackplane(hw->phy.media_type)) {
241 ethtool_link_ksettings_add_link_mode(cmd, supported,
242 1000baseKX_Full);
243 ethtool_link_ksettings_add_link_mode(cmd, advertising,
244 1000baseKX_Full);
245 } else {
246 ethtool_link_ksettings_add_link_mode(cmd, supported,
247 1000baseT_Full);
248 ethtool_link_ksettings_add_link_mode(cmd, advertising,
249 1000baseT_Full);
250 }
251 }
252 if (supported_link & IXGBE_LINK_SPEED_100_FULL) {
253 ethtool_link_ksettings_add_link_mode(cmd, supported,
254 100baseT_Full);
255 ethtool_link_ksettings_add_link_mode(cmd, advertising,
256 100baseT_Full);
257 }
258 if (supported_link & IXGBE_LINK_SPEED_10_FULL) {
259 ethtool_link_ksettings_add_link_mode(cmd, supported,
260 10baseT_Full);
261 ethtool_link_ksettings_add_link_mode(cmd, advertising,
262 10baseT_Full);
263 }
264
265 /* set the advertised speeds */
266 if (hw->phy.autoneg_advertised) {
267 ethtool_link_ksettings_zero_link_mode(cmd, advertising);
268 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10_FULL)
269 ethtool_link_ksettings_add_link_mode(cmd, advertising,
270 10baseT_Full);
271 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL)
272 ethtool_link_ksettings_add_link_mode(cmd, advertising,
273 100baseT_Full);
274 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
275 ixgbe_set_advertising_10gtypes(hw, cmd);
276 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) {
277 if (ethtool_link_ksettings_test_link_mode
278 (cmd, supported, 1000baseKX_Full))
279 ethtool_link_ksettings_add_link_mode
280 (cmd, advertising, 1000baseKX_Full);
281 else
282 ethtool_link_ksettings_add_link_mode
283 (cmd, advertising, 1000baseT_Full);
284 }
285 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_5GB_FULL)
286 ethtool_link_ksettings_add_link_mode(cmd, advertising,
287 5000baseT_Full);
288 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_2_5GB_FULL)
289 ethtool_link_ksettings_add_link_mode(cmd, advertising,
290 2500baseT_Full);
291 } else {
292 if (hw->phy.multispeed_fiber && !autoneg) {
293 if (supported_link & IXGBE_LINK_SPEED_10GB_FULL)
294 ethtool_link_ksettings_add_link_mode
295 (cmd, advertising, 10000baseT_Full);
296 }
297 }
298
299 if (autoneg) {
300 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
301 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
302 cmd->base.autoneg = AUTONEG_ENABLE;
303 } else
304 cmd->base.autoneg = AUTONEG_DISABLE;
305
306 /* Determine the remaining settings based on the PHY type. */
307 switch (adapter->hw.phy.type) {
308 case ixgbe_phy_tn:
309 case ixgbe_phy_aq:
310 case ixgbe_phy_x550em_ext_t:
311 case ixgbe_phy_fw:
312 case ixgbe_phy_cu_unknown:
313 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
314 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
315 cmd->base.port = PORT_TP;
316 break;
317 case ixgbe_phy_qt:
318 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
319 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
320 cmd->base.port = PORT_FIBRE;
321 break;
322 case ixgbe_phy_nl:
323 case ixgbe_phy_sfp_passive_tyco:
324 case ixgbe_phy_sfp_passive_unknown:
325 case ixgbe_phy_sfp_ftl:
326 case ixgbe_phy_sfp_avago:
327 case ixgbe_phy_sfp_intel:
328 case ixgbe_phy_sfp_unknown:
329 case ixgbe_phy_qsfp_passive_unknown:
330 case ixgbe_phy_qsfp_active_unknown:
331 case ixgbe_phy_qsfp_intel:
332 case ixgbe_phy_qsfp_unknown:
333 /* SFP+ devices, further checking needed */
334 switch (adapter->hw.phy.sfp_type) {
335 case ixgbe_sfp_type_da_cu:
336 case ixgbe_sfp_type_da_cu_core0:
337 case ixgbe_sfp_type_da_cu_core1:
338 ethtool_link_ksettings_add_link_mode(cmd, supported,
339 FIBRE);
340 ethtool_link_ksettings_add_link_mode(cmd, advertising,
341 FIBRE);
342 cmd->base.port = PORT_DA;
343 break;
344 case ixgbe_sfp_type_sr:
345 case ixgbe_sfp_type_lr:
346 case ixgbe_sfp_type_srlr_core0:
347 case ixgbe_sfp_type_srlr_core1:
348 case ixgbe_sfp_type_1g_sx_core0:
349 case ixgbe_sfp_type_1g_sx_core1:
350 case ixgbe_sfp_type_1g_lx_core0:
351 case ixgbe_sfp_type_1g_lx_core1:
352 case ixgbe_sfp_type_1g_bx_core0:
353 case ixgbe_sfp_type_1g_bx_core1:
354 ethtool_link_ksettings_add_link_mode(cmd, supported,
355 FIBRE);
356 ethtool_link_ksettings_add_link_mode(cmd, advertising,
357 FIBRE);
358 cmd->base.port = PORT_FIBRE;
359 break;
360 case ixgbe_sfp_type_not_present:
361 ethtool_link_ksettings_add_link_mode(cmd, supported,
362 FIBRE);
363 ethtool_link_ksettings_add_link_mode(cmd, advertising,
364 FIBRE);
365 cmd->base.port = PORT_NONE;
366 break;
367 case ixgbe_sfp_type_1g_cu_core0:
368 case ixgbe_sfp_type_1g_cu_core1:
369 ethtool_link_ksettings_add_link_mode(cmd, supported,
370 TP);
371 ethtool_link_ksettings_add_link_mode(cmd, advertising,
372 TP);
373 cmd->base.port = PORT_TP;
374 break;
375 case ixgbe_sfp_type_unknown:
376 default:
377 ethtool_link_ksettings_add_link_mode(cmd, supported,
378 FIBRE);
379 ethtool_link_ksettings_add_link_mode(cmd, advertising,
380 FIBRE);
381 cmd->base.port = PORT_OTHER;
382 break;
383 }
384 break;
385 case ixgbe_phy_xaui:
386 ethtool_link_ksettings_add_link_mode(cmd, supported,
387 FIBRE);
388 ethtool_link_ksettings_add_link_mode(cmd, advertising,
389 FIBRE);
390 cmd->base.port = PORT_NONE;
391 break;
392 case ixgbe_phy_unknown:
393 case ixgbe_phy_generic:
394 case ixgbe_phy_sfp_unsupported:
395 default:
396 ethtool_link_ksettings_add_link_mode(cmd, supported,
397 FIBRE);
398 ethtool_link_ksettings_add_link_mode(cmd, advertising,
399 FIBRE);
400 cmd->base.port = PORT_OTHER;
401 break;
402 }
403
404 /* Indicate pause support */
405 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
406
407 switch (hw->fc.requested_mode) {
408 case ixgbe_fc_full:
409 ethtool_link_ksettings_add_link_mode(cmd, advertising, Pause);
410 break;
411 case ixgbe_fc_rx_pause:
412 ethtool_link_ksettings_add_link_mode(cmd, advertising, Pause);
413 ethtool_link_ksettings_add_link_mode(cmd, advertising,
414 Asym_Pause);
415 break;
416 case ixgbe_fc_tx_pause:
417 ethtool_link_ksettings_add_link_mode(cmd, advertising,
418 Asym_Pause);
419 break;
420 default:
421 ethtool_link_ksettings_del_link_mode(cmd, advertising, Pause);
422 ethtool_link_ksettings_del_link_mode(cmd, advertising,
423 Asym_Pause);
424 }
425
426 if (netif_carrier_ok(netdev)) {
427 switch (adapter->link_speed) {
428 case IXGBE_LINK_SPEED_10GB_FULL:
429 cmd->base.speed = SPEED_10000;
430 break;
431 case IXGBE_LINK_SPEED_5GB_FULL:
432 cmd->base.speed = SPEED_5000;
433 break;
434 case IXGBE_LINK_SPEED_2_5GB_FULL:
435 cmd->base.speed = SPEED_2500;
436 break;
437 case IXGBE_LINK_SPEED_1GB_FULL:
438 cmd->base.speed = SPEED_1000;
439 break;
440 case IXGBE_LINK_SPEED_100_FULL:
441 cmd->base.speed = SPEED_100;
442 break;
443 case IXGBE_LINK_SPEED_10_FULL:
444 cmd->base.speed = SPEED_10;
445 break;
446 default:
447 break;
448 }
449 cmd->base.duplex = DUPLEX_FULL;
450 } else {
451 cmd->base.speed = SPEED_UNKNOWN;
452 cmd->base.duplex = DUPLEX_UNKNOWN;
453 }
454
455 return 0;
456 }
457
ixgbe_set_link_ksettings(struct net_device * netdev,const struct ethtool_link_ksettings * cmd)458 static int ixgbe_set_link_ksettings(struct net_device *netdev,
459 const struct ethtool_link_ksettings *cmd)
460 {
461 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
462 struct ixgbe_hw *hw = &adapter->hw;
463 u32 advertised, old;
464 int err = 0;
465
466 if ((hw->phy.media_type == ixgbe_media_type_copper) ||
467 (hw->phy.multispeed_fiber)) {
468 /*
469 * this function does not support duplex forcing, but can
470 * limit the advertising of the adapter to the specified speed
471 */
472 if (!linkmode_subset(cmd->link_modes.advertising,
473 cmd->link_modes.supported))
474 return -EINVAL;
475
476 /* only allow one speed at a time if no autoneg */
477 if (!cmd->base.autoneg && hw->phy.multispeed_fiber) {
478 if (ethtool_link_ksettings_test_link_mode(cmd, advertising,
479 10000baseT_Full) &&
480 ethtool_link_ksettings_test_link_mode(cmd, advertising,
481 1000baseT_Full))
482 return -EINVAL;
483 }
484
485 old = hw->phy.autoneg_advertised;
486 advertised = 0;
487 if (ethtool_link_ksettings_test_link_mode(cmd, advertising,
488 10000baseT_Full))
489 advertised |= IXGBE_LINK_SPEED_10GB_FULL;
490 if (ethtool_link_ksettings_test_link_mode(cmd, advertising,
491 5000baseT_Full))
492 advertised |= IXGBE_LINK_SPEED_5GB_FULL;
493 if (ethtool_link_ksettings_test_link_mode(cmd, advertising,
494 2500baseT_Full))
495 advertised |= IXGBE_LINK_SPEED_2_5GB_FULL;
496 if (ethtool_link_ksettings_test_link_mode(cmd, advertising,
497 1000baseT_Full))
498 advertised |= IXGBE_LINK_SPEED_1GB_FULL;
499
500 if (ethtool_link_ksettings_test_link_mode(cmd, advertising,
501 100baseT_Full))
502 advertised |= IXGBE_LINK_SPEED_100_FULL;
503
504 if (ethtool_link_ksettings_test_link_mode(cmd, advertising,
505 10baseT_Full))
506 advertised |= IXGBE_LINK_SPEED_10_FULL;
507
508 if (old == advertised)
509 return err;
510 /* this sets the link speed and restarts auto-neg */
511 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
512 usleep_range(1000, 2000);
513
514 hw->mac.autotry_restart = true;
515 err = hw->mac.ops.setup_link(hw, advertised, true);
516 if (err) {
517 e_info(probe, "setup link failed with code %d\n", err);
518 hw->mac.ops.setup_link(hw, old, true);
519 }
520 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
521 } else {
522 /* in this case we currently only support 10Gb/FULL */
523 u32 speed = cmd->base.speed;
524
525 if ((cmd->base.autoneg == AUTONEG_ENABLE) ||
526 (!ethtool_link_ksettings_test_link_mode(cmd, advertising,
527 10000baseT_Full)) ||
528 (speed + cmd->base.duplex != SPEED_10000 + DUPLEX_FULL))
529 return -EINVAL;
530 }
531
532 return err;
533 }
534
ixgbe_get_pause_stats(struct net_device * netdev,struct ethtool_pause_stats * stats)535 static void ixgbe_get_pause_stats(struct net_device *netdev,
536 struct ethtool_pause_stats *stats)
537 {
538 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
539 struct ixgbe_hw_stats *hwstats = &adapter->stats;
540
541 stats->tx_pause_frames = hwstats->lxontxc + hwstats->lxofftxc;
542 stats->rx_pause_frames = hwstats->lxonrxc + hwstats->lxoffrxc;
543 }
544
ixgbe_get_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pause)545 static void ixgbe_get_pauseparam(struct net_device *netdev,
546 struct ethtool_pauseparam *pause)
547 {
548 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
549 struct ixgbe_hw *hw = &adapter->hw;
550
551 if (ixgbe_device_supports_autoneg_fc(hw) &&
552 !hw->fc.disable_fc_autoneg)
553 pause->autoneg = 1;
554 else
555 pause->autoneg = 0;
556
557 if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
558 pause->rx_pause = 1;
559 } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
560 pause->tx_pause = 1;
561 } else if (hw->fc.current_mode == ixgbe_fc_full) {
562 pause->rx_pause = 1;
563 pause->tx_pause = 1;
564 }
565 }
566
ixgbe_set_pauseparam_finalize(struct net_device * netdev,struct ixgbe_fc_info * fc)567 static void ixgbe_set_pauseparam_finalize(struct net_device *netdev,
568 struct ixgbe_fc_info *fc)
569 {
570 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
571 struct ixgbe_hw *hw = &adapter->hw;
572
573 /* If the thing changed then we'll update and use new autoneg. */
574 if (memcmp(fc, &hw->fc, sizeof(*fc))) {
575 hw->fc = *fc;
576 if (netif_running(netdev))
577 ixgbe_reinit_locked(adapter);
578 else
579 ixgbe_reset(adapter);
580 }
581 }
582
ixgbe_set_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pause)583 static int ixgbe_set_pauseparam(struct net_device *netdev,
584 struct ethtool_pauseparam *pause)
585 {
586 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
587 struct ixgbe_hw *hw = &adapter->hw;
588 struct ixgbe_fc_info fc = hw->fc;
589
590 /* 82598 does no support link flow control with DCB enabled */
591 if ((hw->mac.type == ixgbe_mac_82598EB) &&
592 (adapter->flags & IXGBE_FLAG_DCB_ENABLED))
593 return -EINVAL;
594
595 /* some devices do not support autoneg of link flow control */
596 if ((pause->autoneg == AUTONEG_ENABLE) &&
597 !ixgbe_device_supports_autoneg_fc(hw))
598 return -EINVAL;
599
600 fc.disable_fc_autoneg = (pause->autoneg != AUTONEG_ENABLE);
601
602 if ((pause->rx_pause && pause->tx_pause) || pause->autoneg)
603 fc.requested_mode = ixgbe_fc_full;
604 else if (pause->rx_pause && !pause->tx_pause)
605 fc.requested_mode = ixgbe_fc_rx_pause;
606 else if (!pause->rx_pause && pause->tx_pause)
607 fc.requested_mode = ixgbe_fc_tx_pause;
608 else
609 fc.requested_mode = ixgbe_fc_none;
610
611 ixgbe_set_pauseparam_finalize(netdev, &fc);
612
613 return 0;
614 }
615
ixgbe_set_pauseparam_e610(struct net_device * netdev,struct ethtool_pauseparam * pause)616 static int ixgbe_set_pauseparam_e610(struct net_device *netdev,
617 struct ethtool_pauseparam *pause)
618 {
619 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
620 struct ixgbe_hw *hw = &adapter->hw;
621 struct ixgbe_fc_info fc = hw->fc;
622
623 if (!ixgbe_device_supports_autoneg_fc(hw))
624 return -EOPNOTSUPP;
625
626 if (pause->autoneg == AUTONEG_DISABLE) {
627 netdev_info(netdev,
628 "Cannot disable autonegotiation on this device.\n");
629 return -EOPNOTSUPP;
630 }
631
632 fc.disable_fc_autoneg = false;
633
634 if (pause->rx_pause && pause->tx_pause)
635 fc.requested_mode = ixgbe_fc_full;
636 else if (pause->rx_pause)
637 fc.requested_mode = ixgbe_fc_rx_pause;
638 else if (pause->tx_pause)
639 fc.requested_mode = ixgbe_fc_tx_pause;
640 else
641 fc.requested_mode = ixgbe_fc_none;
642
643 ixgbe_set_pauseparam_finalize(netdev, &fc);
644
645 return 0;
646 }
647
ixgbe_get_msglevel(struct net_device * netdev)648 static u32 ixgbe_get_msglevel(struct net_device *netdev)
649 {
650 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
651 return adapter->msg_enable;
652 }
653
ixgbe_set_msglevel(struct net_device * netdev,u32 data)654 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
655 {
656 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
657 adapter->msg_enable = data;
658 }
659
ixgbe_get_regs_len(struct net_device * netdev)660 static int ixgbe_get_regs_len(struct net_device *netdev)
661 {
662 #define IXGBE_REGS_LEN 1145
663 return IXGBE_REGS_LEN * sizeof(u32);
664 }
665
666 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
667
ixgbe_get_regs(struct net_device * netdev,struct ethtool_regs * regs,void * p)668 static void ixgbe_get_regs(struct net_device *netdev,
669 struct ethtool_regs *regs, void *p)
670 {
671 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
672 struct ixgbe_hw *hw = &adapter->hw;
673 u32 *regs_buff = p;
674 u8 i;
675
676 memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
677
678 regs->version = hw->mac.type << 24 | hw->revision_id << 16 |
679 hw->device_id;
680
681 /* General Registers */
682 regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
683 regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
684 regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
685 regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
686 regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
687 regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
688 regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
689 regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
690
691 /* NVM Register */
692 regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
693 regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
694 regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA(hw));
695 regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
696 regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
697 regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
698 regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
699 regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
700 regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
701 regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC(hw));
702
703 /* Interrupt */
704 /* don't read EICR because it can clear interrupt causes, instead
705 * read EICS which is a shadow but doesn't clear EICR */
706 regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
707 regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
708 regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
709 regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
710 regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
711 regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
712 regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
713 regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
714 regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
715 regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
716 regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
717 regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
718
719 /* Flow Control */
720 regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
721 for (i = 0; i < 4; i++)
722 regs_buff[31 + i] = IXGBE_READ_REG(hw, IXGBE_FCTTV(i));
723 for (i = 0; i < 8; i++) {
724 switch (hw->mac.type) {
725 case ixgbe_mac_82598EB:
726 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
727 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
728 break;
729 case ixgbe_mac_82599EB:
730 case ixgbe_mac_X540:
731 case ixgbe_mac_X550:
732 case ixgbe_mac_X550EM_x:
733 case ixgbe_mac_x550em_a:
734 case ixgbe_mac_e610:
735 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i));
736 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i));
737 break;
738 default:
739 break;
740 }
741 }
742 regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
743 regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
744
745 /* Receive DMA */
746 for (i = 0; i < 64; i++)
747 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
748 for (i = 0; i < 64; i++)
749 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
750 for (i = 0; i < 64; i++)
751 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
752 for (i = 0; i < 64; i++)
753 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
754 for (i = 0; i < 64; i++)
755 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
756 for (i = 0; i < 64; i++)
757 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
758 for (i = 0; i < 16; i++)
759 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
760 for (i = 0; i < 16; i++)
761 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
762 regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
763 for (i = 0; i < 8; i++)
764 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
765 regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
766 regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
767
768 /* Receive */
769 regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
770 regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
771 for (i = 0; i < 16; i++)
772 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
773 for (i = 0; i < 16; i++)
774 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
775 regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
776 regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
777 regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
778 regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
779 regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
780 regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
781 for (i = 0; i < 8; i++)
782 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
783 for (i = 0; i < 8; i++)
784 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
785 regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
786
787 /* Transmit */
788 for (i = 0; i < 32; i++)
789 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
790 for (i = 0; i < 32; i++)
791 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
792 for (i = 0; i < 32; i++)
793 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
794 for (i = 0; i < 32; i++)
795 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
796 for (i = 0; i < 32; i++)
797 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
798 for (i = 0; i < 32; i++)
799 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
800 for (i = 0; i < 32; i++)
801 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
802 for (i = 0; i < 32; i++)
803 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
804 regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
805 for (i = 0; i < 16; i++)
806 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
807 regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
808 for (i = 0; i < 8; i++)
809 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
810 regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
811
812 /* Wake Up */
813 regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
814 regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
815 regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
816 regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
817 regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
818 regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
819 regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
820 regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
821 regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
822
823 /* DCB */
824 regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS); /* same as FCCFG */
825 regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS); /* same as RTTPCS */
826
827 switch (hw->mac.type) {
828 case ixgbe_mac_82598EB:
829 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
830 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
831 for (i = 0; i < 8; i++)
832 regs_buff[833 + i] =
833 IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
834 for (i = 0; i < 8; i++)
835 regs_buff[841 + i] =
836 IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
837 for (i = 0; i < 8; i++)
838 regs_buff[849 + i] =
839 IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
840 for (i = 0; i < 8; i++)
841 regs_buff[857 + i] =
842 IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
843 break;
844 case ixgbe_mac_82599EB:
845 case ixgbe_mac_X540:
846 case ixgbe_mac_X550:
847 case ixgbe_mac_X550EM_x:
848 case ixgbe_mac_x550em_a:
849 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
850 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RTRPCS);
851 for (i = 0; i < 8; i++)
852 regs_buff[833 + i] =
853 IXGBE_READ_REG(hw, IXGBE_RTRPT4C(i));
854 for (i = 0; i < 8; i++)
855 regs_buff[841 + i] =
856 IXGBE_READ_REG(hw, IXGBE_RTRPT4S(i));
857 for (i = 0; i < 8; i++)
858 regs_buff[849 + i] =
859 IXGBE_READ_REG(hw, IXGBE_RTTDT2C(i));
860 for (i = 0; i < 8; i++)
861 regs_buff[857 + i] =
862 IXGBE_READ_REG(hw, IXGBE_RTTDT2S(i));
863 break;
864 default:
865 break;
866 }
867
868 for (i = 0; i < 8; i++)
869 regs_buff[865 + i] =
870 IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i)); /* same as RTTPT2C */
871 for (i = 0; i < 8; i++)
872 regs_buff[873 + i] =
873 IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i)); /* same as RTTPT2S */
874
875 /* Statistics */
876 regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
877 regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
878 regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
879 regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
880 for (i = 0; i < 8; i++)
881 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
882 regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
883 regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
884 regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
885 regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
886 regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
887 regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
888 regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
889 for (i = 0; i < 8; i++)
890 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
891 for (i = 0; i < 8; i++)
892 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
893 for (i = 0; i < 8; i++)
894 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
895 for (i = 0; i < 8; i++)
896 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
897 regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
898 regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
899 regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
900 regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
901 regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
902 regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
903 regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
904 regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
905 regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
906 regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
907 regs_buff[942] = (u32)IXGBE_GET_STAT(adapter, gorc);
908 regs_buff[943] = (u32)(IXGBE_GET_STAT(adapter, gorc) >> 32);
909 regs_buff[944] = (u32)IXGBE_GET_STAT(adapter, gotc);
910 regs_buff[945] = (u32)(IXGBE_GET_STAT(adapter, gotc) >> 32);
911 for (i = 0; i < 8; i++)
912 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
913 regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
914 regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
915 regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
916 regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
917 regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
918 regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
919 regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
920 regs_buff[961] = (u32)IXGBE_GET_STAT(adapter, tor);
921 regs_buff[962] = (u32)(IXGBE_GET_STAT(adapter, tor) >> 32);
922 regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
923 regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
924 regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
925 regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
926 regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
927 regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
928 regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
929 regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
930 regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
931 regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
932 regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
933 for (i = 0; i < 16; i++)
934 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
935 for (i = 0; i < 16; i++)
936 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
937 for (i = 0; i < 16; i++)
938 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
939 for (i = 0; i < 16; i++)
940 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
941
942 /* MAC */
943 regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
944 regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
945 regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
946 regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
947 regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
948 regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
949 regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
950 regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
951 regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
952 regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
953 regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
954 regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
955 regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
956 regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
957 regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
958 regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
959 regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
960 regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
961 regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
962 regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
963 regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
964 regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
965 regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
966 regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
967 regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
968 regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
969 regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
970 regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
971 regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
972 regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
973 regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
974 regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
975 regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
976
977 /* Diagnostic */
978 regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
979 for (i = 0; i < 8; i++)
980 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
981 regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
982 for (i = 0; i < 4; i++)
983 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
984 regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
985 regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
986 for (i = 0; i < 8; i++)
987 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
988 regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
989 for (i = 0; i < 4; i++)
990 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
991 regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
992 regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
993 for (i = 0; i < 4; i++)
994 regs_buff[1102 + i] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA(i));
995 regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
996 for (i = 0; i < 4; i++)
997 regs_buff[1107 + i] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA(i));
998 for (i = 0; i < 8; i++)
999 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
1000 regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
1001 regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
1002 regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
1003 regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
1004 regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
1005 regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
1006 regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
1007 regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
1008 regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
1009
1010 /* 82599 X540 specific registers */
1011 regs_buff[1128] = IXGBE_READ_REG(hw, IXGBE_MFLCN);
1012
1013 /* 82599 X540 specific DCB registers */
1014 regs_buff[1129] = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
1015 regs_buff[1130] = IXGBE_READ_REG(hw, IXGBE_RTTUP2TC);
1016 for (i = 0; i < 4; i++)
1017 regs_buff[1131 + i] = IXGBE_READ_REG(hw, IXGBE_TXLLQ(i));
1018 regs_buff[1135] = IXGBE_READ_REG(hw, IXGBE_RTTBCNRM);
1019 /* same as RTTQCNRM */
1020 regs_buff[1136] = IXGBE_READ_REG(hw, IXGBE_RTTBCNRD);
1021 /* same as RTTQCNRR */
1022
1023 /* X540 specific DCB registers */
1024 regs_buff[1137] = IXGBE_READ_REG(hw, IXGBE_RTTQCNCR);
1025 regs_buff[1138] = IXGBE_READ_REG(hw, IXGBE_RTTQCNTG);
1026
1027 /* Security config registers */
1028 regs_buff[1139] = IXGBE_READ_REG(hw, IXGBE_SECTXCTRL);
1029 regs_buff[1140] = IXGBE_READ_REG(hw, IXGBE_SECTXSTAT);
1030 regs_buff[1141] = IXGBE_READ_REG(hw, IXGBE_SECTXBUFFAF);
1031 regs_buff[1142] = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
1032 regs_buff[1143] = IXGBE_READ_REG(hw, IXGBE_SECRXCTRL);
1033 regs_buff[1144] = IXGBE_READ_REG(hw, IXGBE_SECRXSTAT);
1034 }
1035
ixgbe_get_link_ext_stats(struct net_device * netdev,struct ethtool_link_ext_stats * stats)1036 static void ixgbe_get_link_ext_stats(struct net_device *netdev,
1037 struct ethtool_link_ext_stats *stats)
1038 {
1039 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1040
1041 stats->link_down_events = adapter->link_down_events;
1042 }
1043
ixgbe_get_eeprom_len(struct net_device * netdev)1044 static int ixgbe_get_eeprom_len(struct net_device *netdev)
1045 {
1046 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1047 return adapter->hw.eeprom.word_size * 2;
1048 }
1049
ixgbe_get_eeprom(struct net_device * netdev,struct ethtool_eeprom * eeprom,u8 * bytes)1050 static int ixgbe_get_eeprom(struct net_device *netdev,
1051 struct ethtool_eeprom *eeprom, u8 *bytes)
1052 {
1053 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1054 struct ixgbe_hw *hw = &adapter->hw;
1055 u16 *eeprom_buff;
1056 int first_word, last_word, eeprom_len;
1057 int ret_val = 0;
1058 u16 i;
1059
1060 if (eeprom->len == 0)
1061 return -EINVAL;
1062
1063 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
1064
1065 first_word = eeprom->offset >> 1;
1066 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
1067 eeprom_len = last_word - first_word + 1;
1068
1069 eeprom_buff = kmalloc_array(eeprom_len, sizeof(u16), GFP_KERNEL);
1070 if (!eeprom_buff)
1071 return -ENOMEM;
1072
1073 ret_val = hw->eeprom.ops.read_buffer(hw, first_word, eeprom_len,
1074 eeprom_buff);
1075
1076 /* Device's eeprom is always little-endian, word addressable */
1077 for (i = 0; i < eeprom_len; i++)
1078 le16_to_cpus(&eeprom_buff[i]);
1079
1080 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
1081 kfree(eeprom_buff);
1082
1083 return ret_val;
1084 }
1085
ixgbe_set_eeprom(struct net_device * netdev,struct ethtool_eeprom * eeprom,u8 * bytes)1086 static int ixgbe_set_eeprom(struct net_device *netdev,
1087 struct ethtool_eeprom *eeprom, u8 *bytes)
1088 {
1089 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1090 struct ixgbe_hw *hw = &adapter->hw;
1091 u16 *eeprom_buff;
1092 void *ptr;
1093 int max_len, first_word, last_word, ret_val = 0;
1094 u16 i;
1095
1096 if (eeprom->len == 0)
1097 return -EINVAL;
1098
1099 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
1100 return -EINVAL;
1101
1102 max_len = hw->eeprom.word_size * 2;
1103
1104 first_word = eeprom->offset >> 1;
1105 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
1106 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
1107 if (!eeprom_buff)
1108 return -ENOMEM;
1109
1110 ptr = eeprom_buff;
1111
1112 if (eeprom->offset & 1) {
1113 /*
1114 * need read/modify/write of first changed EEPROM word
1115 * only the second byte of the word is being modified
1116 */
1117 ret_val = hw->eeprom.ops.read(hw, first_word, &eeprom_buff[0]);
1118 if (ret_val)
1119 goto err;
1120
1121 ptr++;
1122 }
1123 if ((eeprom->offset + eeprom->len) & 1) {
1124 /*
1125 * need read/modify/write of last changed EEPROM word
1126 * only the first byte of the word is being modified
1127 */
1128 ret_val = hw->eeprom.ops.read(hw, last_word,
1129 &eeprom_buff[last_word - first_word]);
1130 if (ret_val)
1131 goto err;
1132 }
1133
1134 /* Device's eeprom is always little-endian, word addressable */
1135 for (i = 0; i < last_word - first_word + 1; i++)
1136 le16_to_cpus(&eeprom_buff[i]);
1137
1138 memcpy(ptr, bytes, eeprom->len);
1139
1140 for (i = 0; i < last_word - first_word + 1; i++)
1141 cpu_to_le16s(&eeprom_buff[i]);
1142
1143 ret_val = hw->eeprom.ops.write_buffer(hw, first_word,
1144 last_word - first_word + 1,
1145 eeprom_buff);
1146
1147 /* Update the checksum */
1148 if (ret_val == 0)
1149 hw->eeprom.ops.update_checksum(hw);
1150
1151 err:
1152 kfree(eeprom_buff);
1153 return ret_val;
1154 }
1155
ixgbe_refresh_fw_version(struct ixgbe_adapter * adapter)1156 void ixgbe_refresh_fw_version(struct ixgbe_adapter *adapter)
1157 {
1158 struct ixgbe_hw *hw = &adapter->hw;
1159
1160 ixgbe_get_flash_data(hw);
1161 ixgbe_set_fw_version_e610(adapter);
1162 }
1163
ixgbe_get_drvinfo(struct net_device * netdev,struct ethtool_drvinfo * drvinfo)1164 static void ixgbe_get_drvinfo(struct net_device *netdev,
1165 struct ethtool_drvinfo *drvinfo)
1166 {
1167 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1168
1169 /* need to refresh info for e610 in case fw reloads in runtime */
1170 if (adapter->hw.mac.type == ixgbe_mac_e610)
1171 ixgbe_refresh_fw_version(adapter);
1172
1173 strscpy(drvinfo->driver, ixgbe_driver_name, sizeof(drvinfo->driver));
1174
1175 strscpy(drvinfo->fw_version, adapter->eeprom_id,
1176 sizeof(drvinfo->fw_version));
1177
1178 strscpy(drvinfo->bus_info, pci_name(adapter->pdev),
1179 sizeof(drvinfo->bus_info));
1180
1181 drvinfo->n_priv_flags = IXGBE_PRIV_FLAGS_STR_LEN;
1182 }
1183
ixgbe_get_max_rxd(struct ixgbe_adapter * adapter)1184 static u32 ixgbe_get_max_rxd(struct ixgbe_adapter *adapter)
1185 {
1186 switch (adapter->hw.mac.type) {
1187 case ixgbe_mac_82598EB:
1188 return IXGBE_MAX_RXD_82598;
1189 case ixgbe_mac_82599EB:
1190 return IXGBE_MAX_RXD_82599;
1191 case ixgbe_mac_X540:
1192 return IXGBE_MAX_RXD_X540;
1193 case ixgbe_mac_X550:
1194 case ixgbe_mac_X550EM_x:
1195 case ixgbe_mac_x550em_a:
1196 return IXGBE_MAX_RXD_X550;
1197 default:
1198 return IXGBE_MAX_RXD_82598;
1199 }
1200 }
1201
ixgbe_get_max_txd(struct ixgbe_adapter * adapter)1202 static u32 ixgbe_get_max_txd(struct ixgbe_adapter *adapter)
1203 {
1204 switch (adapter->hw.mac.type) {
1205 case ixgbe_mac_82598EB:
1206 return IXGBE_MAX_TXD_82598;
1207 case ixgbe_mac_82599EB:
1208 return IXGBE_MAX_TXD_82599;
1209 case ixgbe_mac_X540:
1210 return IXGBE_MAX_TXD_X540;
1211 case ixgbe_mac_X550:
1212 case ixgbe_mac_X550EM_x:
1213 case ixgbe_mac_x550em_a:
1214 return IXGBE_MAX_TXD_X550;
1215 default:
1216 return IXGBE_MAX_TXD_82598;
1217 }
1218 }
1219
ixgbe_get_ringparam(struct net_device * netdev,struct ethtool_ringparam * ring,struct kernel_ethtool_ringparam * kernel_ring,struct netlink_ext_ack * extack)1220 static void ixgbe_get_ringparam(struct net_device *netdev,
1221 struct ethtool_ringparam *ring,
1222 struct kernel_ethtool_ringparam *kernel_ring,
1223 struct netlink_ext_ack *extack)
1224 {
1225 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1226 struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
1227 struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
1228
1229 ring->rx_max_pending = ixgbe_get_max_rxd(adapter);
1230 ring->tx_max_pending = ixgbe_get_max_txd(adapter);
1231 ring->rx_pending = rx_ring->count;
1232 ring->tx_pending = tx_ring->count;
1233 }
1234
ixgbe_set_ringparam(struct net_device * netdev,struct ethtool_ringparam * ring,struct kernel_ethtool_ringparam * kernel_ring,struct netlink_ext_ack * extack)1235 static int ixgbe_set_ringparam(struct net_device *netdev,
1236 struct ethtool_ringparam *ring,
1237 struct kernel_ethtool_ringparam *kernel_ring,
1238 struct netlink_ext_ack *extack)
1239 {
1240 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1241 struct ixgbe_ring *temp_ring;
1242 int i, j, err = 0;
1243 u32 new_rx_count, new_tx_count;
1244
1245 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
1246 return -EINVAL;
1247
1248 new_tx_count = clamp_t(u32, ring->tx_pending,
1249 IXGBE_MIN_TXD, ixgbe_get_max_txd(adapter));
1250 new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
1251
1252 new_rx_count = clamp_t(u32, ring->rx_pending,
1253 IXGBE_MIN_RXD, ixgbe_get_max_rxd(adapter));
1254 new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
1255
1256 if ((new_tx_count == adapter->tx_ring_count) &&
1257 (new_rx_count == adapter->rx_ring_count)) {
1258 /* nothing to do */
1259 return 0;
1260 }
1261
1262 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
1263 usleep_range(1000, 2000);
1264
1265 if (!netif_running(adapter->netdev)) {
1266 for (i = 0; i < adapter->num_tx_queues; i++)
1267 adapter->tx_ring[i]->count = new_tx_count;
1268 for (i = 0; i < adapter->num_xdp_queues; i++)
1269 adapter->xdp_ring[i]->count = new_tx_count;
1270 for (i = 0; i < adapter->num_rx_queues; i++)
1271 adapter->rx_ring[i]->count = new_rx_count;
1272 adapter->tx_ring_count = new_tx_count;
1273 adapter->xdp_ring_count = new_tx_count;
1274 adapter->rx_ring_count = new_rx_count;
1275 goto clear_reset;
1276 }
1277
1278 /* allocate temporary buffer to store rings in */
1279 i = max_t(int, adapter->num_tx_queues + adapter->num_xdp_queues,
1280 adapter->num_rx_queues);
1281 temp_ring = vmalloc(array_size(i, sizeof(struct ixgbe_ring)));
1282
1283 if (!temp_ring) {
1284 err = -ENOMEM;
1285 goto clear_reset;
1286 }
1287
1288 ixgbe_down(adapter);
1289
1290 /*
1291 * Setup new Tx resources and free the old Tx resources in that order.
1292 * We can then assign the new resources to the rings via a memcpy.
1293 * The advantage to this approach is that we are guaranteed to still
1294 * have resources even in the case of an allocation failure.
1295 */
1296 if (new_tx_count != adapter->tx_ring_count) {
1297 for (i = 0; i < adapter->num_tx_queues; i++) {
1298 memcpy(&temp_ring[i], adapter->tx_ring[i],
1299 sizeof(struct ixgbe_ring));
1300
1301 temp_ring[i].count = new_tx_count;
1302 err = ixgbe_setup_tx_resources(&temp_ring[i]);
1303 if (err) {
1304 while (i) {
1305 i--;
1306 ixgbe_free_tx_resources(&temp_ring[i]);
1307 }
1308 goto err_setup;
1309 }
1310 }
1311
1312 for (j = 0; j < adapter->num_xdp_queues; j++, i++) {
1313 memcpy(&temp_ring[i], adapter->xdp_ring[j],
1314 sizeof(struct ixgbe_ring));
1315
1316 temp_ring[i].count = new_tx_count;
1317 err = ixgbe_setup_tx_resources(&temp_ring[i]);
1318 if (err) {
1319 while (i) {
1320 i--;
1321 ixgbe_free_tx_resources(&temp_ring[i]);
1322 }
1323 goto err_setup;
1324 }
1325 }
1326
1327 for (i = 0; i < adapter->num_tx_queues; i++) {
1328 ixgbe_free_tx_resources(adapter->tx_ring[i]);
1329
1330 memcpy(adapter->tx_ring[i], &temp_ring[i],
1331 sizeof(struct ixgbe_ring));
1332 }
1333 for (j = 0; j < adapter->num_xdp_queues; j++, i++) {
1334 ixgbe_free_tx_resources(adapter->xdp_ring[j]);
1335
1336 memcpy(adapter->xdp_ring[j], &temp_ring[i],
1337 sizeof(struct ixgbe_ring));
1338 }
1339
1340 adapter->tx_ring_count = new_tx_count;
1341 }
1342
1343 /* Repeat the process for the Rx rings if needed */
1344 if (new_rx_count != adapter->rx_ring_count) {
1345 for (i = 0; i < adapter->num_rx_queues; i++) {
1346 memcpy(&temp_ring[i], adapter->rx_ring[i],
1347 sizeof(struct ixgbe_ring));
1348
1349 /* Clear copied XDP RX-queue info */
1350 memset(&temp_ring[i].xdp_rxq, 0,
1351 sizeof(temp_ring[i].xdp_rxq));
1352
1353 temp_ring[i].count = new_rx_count;
1354 err = ixgbe_setup_rx_resources(adapter, &temp_ring[i]);
1355 if (err) {
1356 while (i) {
1357 i--;
1358 ixgbe_free_rx_resources(&temp_ring[i]);
1359 }
1360 goto err_setup;
1361 }
1362
1363 }
1364
1365 for (i = 0; i < adapter->num_rx_queues; i++) {
1366 ixgbe_free_rx_resources(adapter->rx_ring[i]);
1367
1368 memcpy(adapter->rx_ring[i], &temp_ring[i],
1369 sizeof(struct ixgbe_ring));
1370 }
1371
1372 adapter->rx_ring_count = new_rx_count;
1373 }
1374
1375 err_setup:
1376 ixgbe_up(adapter);
1377 vfree(temp_ring);
1378 clear_reset:
1379 clear_bit(__IXGBE_RESETTING, &adapter->state);
1380 return err;
1381 }
1382
ixgbe_get_sset_count(struct net_device * netdev,int sset)1383 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
1384 {
1385 switch (sset) {
1386 case ETH_SS_TEST:
1387 return IXGBE_TEST_LEN;
1388 case ETH_SS_STATS:
1389 return IXGBE_STATS_LEN;
1390 case ETH_SS_PRIV_FLAGS:
1391 return IXGBE_PRIV_FLAGS_STR_LEN;
1392 default:
1393 return -EOPNOTSUPP;
1394 }
1395 }
1396
ixgbe_get_ethtool_stats(struct net_device * netdev,struct ethtool_stats * stats,u64 * data)1397 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
1398 struct ethtool_stats *stats, u64 *data)
1399 {
1400 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1401 struct rtnl_link_stats64 temp;
1402 const struct rtnl_link_stats64 *net_stats;
1403 unsigned int start;
1404 struct ixgbe_ring *ring;
1405 int i, j;
1406 char *p = NULL;
1407
1408 ixgbe_update_stats(adapter);
1409 net_stats = dev_get_stats(netdev, &temp);
1410 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1411 switch (ixgbe_gstrings_stats[i].type) {
1412 case NETDEV_STATS:
1413 p = (char *) net_stats +
1414 ixgbe_gstrings_stats[i].stat_offset;
1415 break;
1416 case IXGBE_STATS:
1417 p = (char *) adapter +
1418 ixgbe_gstrings_stats[i].stat_offset;
1419 break;
1420 default:
1421 data[i] = 0;
1422 continue;
1423 }
1424
1425 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
1426 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1427 }
1428 for (j = 0; j < netdev->num_tx_queues; j++) {
1429 ring = adapter->tx_ring[j];
1430 if (!ring) {
1431 data[i] = 0;
1432 data[i+1] = 0;
1433 i += 2;
1434 continue;
1435 }
1436
1437 do {
1438 start = u64_stats_fetch_begin(&ring->syncp);
1439 data[i] = ring->stats.packets;
1440 data[i+1] = ring->stats.bytes;
1441 } while (u64_stats_fetch_retry(&ring->syncp, start));
1442 i += 2;
1443 }
1444 for (j = 0; j < IXGBE_NUM_RX_QUEUES; j++) {
1445 ring = adapter->rx_ring[j];
1446 if (!ring) {
1447 data[i] = 0;
1448 data[i+1] = 0;
1449 i += 2;
1450 continue;
1451 }
1452
1453 do {
1454 start = u64_stats_fetch_begin(&ring->syncp);
1455 data[i] = ring->stats.packets;
1456 data[i+1] = ring->stats.bytes;
1457 } while (u64_stats_fetch_retry(&ring->syncp, start));
1458 i += 2;
1459 }
1460
1461 for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) {
1462 data[i++] = adapter->stats.pxontxc[j];
1463 data[i++] = adapter->stats.pxofftxc[j];
1464 }
1465 for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) {
1466 data[i++] = adapter->stats.pxonrxc[j];
1467 data[i++] = adapter->stats.pxoffrxc[j];
1468 }
1469 }
1470
ixgbe_get_strings(struct net_device * netdev,u32 stringset,u8 * data)1471 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
1472 u8 *data)
1473 {
1474 unsigned int i;
1475 u8 *p = data;
1476
1477 switch (stringset) {
1478 case ETH_SS_TEST:
1479 for (i = 0; i < IXGBE_TEST_LEN; i++)
1480 ethtool_puts(&p, ixgbe_gstrings_test[i]);
1481 break;
1482 case ETH_SS_STATS:
1483 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++)
1484 ethtool_puts(&p, ixgbe_gstrings_stats[i].stat_string);
1485 for (i = 0; i < netdev->num_tx_queues; i++) {
1486 ethtool_sprintf(&p, "tx_queue_%u_packets", i);
1487 ethtool_sprintf(&p, "tx_queue_%u_bytes", i);
1488 }
1489 for (i = 0; i < IXGBE_NUM_RX_QUEUES; i++) {
1490 ethtool_sprintf(&p, "rx_queue_%u_packets", i);
1491 ethtool_sprintf(&p, "rx_queue_%u_bytes", i);
1492 }
1493 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) {
1494 ethtool_sprintf(&p, "tx_pb_%u_pxon", i);
1495 ethtool_sprintf(&p, "tx_pb_%u_pxoff", i);
1496 }
1497 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) {
1498 ethtool_sprintf(&p, "rx_pb_%u_pxon", i);
1499 ethtool_sprintf(&p, "rx_pb_%u_pxoff", i);
1500 }
1501 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
1502 break;
1503 case ETH_SS_PRIV_FLAGS:
1504 memcpy(data, ixgbe_priv_flags_strings,
1505 IXGBE_PRIV_FLAGS_STR_LEN * ETH_GSTRING_LEN);
1506 }
1507 }
1508
ixgbe_link_test(struct ixgbe_adapter * adapter,u64 * data)1509 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data)
1510 {
1511 struct ixgbe_hw *hw = &adapter->hw;
1512 bool link_up;
1513 u32 link_speed = 0;
1514
1515 if (ixgbe_removed(hw->hw_addr)) {
1516 *data = 1;
1517 return 1;
1518 }
1519 *data = 0;
1520
1521 hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
1522 if (link_up)
1523 return *data;
1524 else
1525 *data = 1;
1526 return *data;
1527 }
1528
1529 /* ethtool register test data */
1530 struct ixgbe_reg_test {
1531 u16 reg;
1532 u8 array_len;
1533 u8 test_type;
1534 u32 mask;
1535 u32 write;
1536 };
1537
1538 /* In the hardware, registers are laid out either singly, in arrays
1539 * spaced 0x40 bytes apart, or in contiguous tables. We assume
1540 * most tests take place on arrays or single registers (handled
1541 * as a single-element array) and special-case the tables.
1542 * Table tests are always pattern tests.
1543 *
1544 * We also make provision for some required setup steps by specifying
1545 * registers to be written without any read-back testing.
1546 */
1547
1548 #define PATTERN_TEST 1
1549 #define SET_READ_TEST 2
1550 #define WRITE_NO_TEST 3
1551 #define TABLE32_TEST 4
1552 #define TABLE64_TEST_LO 5
1553 #define TABLE64_TEST_HI 6
1554
1555 /* default 82599 register test */
1556 static const struct ixgbe_reg_test reg_test_82599[] = {
1557 { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1558 { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1559 { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1560 { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1561 { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
1562 { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1563 { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1564 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1565 { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1566 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1567 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1568 { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1569 { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1570 { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1571 { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
1572 { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 },
1573 { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1574 { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF },
1575 { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1576 { .reg = 0 }
1577 };
1578
1579 /* default 82598 register test */
1580 static const struct ixgbe_reg_test reg_test_82598[] = {
1581 { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1582 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1583 { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1584 { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1585 { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1586 { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1587 { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1588 /* Enable all four RX queues before testing. */
1589 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1590 /* RDH is read-only for 82598, only test RDT. */
1591 { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1592 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1593 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1594 { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1595 { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF },
1596 { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1597 { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1598 { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1599 { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 },
1600 { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 },
1601 { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1602 { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF },
1603 { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1604 { .reg = 0 }
1605 };
1606
reg_pattern_test(struct ixgbe_adapter * adapter,u64 * data,int reg,u32 mask,u32 write)1607 static bool reg_pattern_test(struct ixgbe_adapter *adapter, u64 *data, int reg,
1608 u32 mask, u32 write)
1609 {
1610 u32 pat, val, before;
1611 static const u32 test_pattern[] = {
1612 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1613
1614 if (ixgbe_removed(adapter->hw.hw_addr)) {
1615 *data = 1;
1616 return true;
1617 }
1618 for (pat = 0; pat < ARRAY_SIZE(test_pattern); pat++) {
1619 before = ixgbe_read_reg(&adapter->hw, reg);
1620 ixgbe_write_reg(&adapter->hw, reg, test_pattern[pat] & write);
1621 val = ixgbe_read_reg(&adapter->hw, reg);
1622 if (val != (test_pattern[pat] & write & mask)) {
1623 e_err(drv, "pattern test reg %04X failed: got 0x%08X expected 0x%08X\n",
1624 reg, val, (test_pattern[pat] & write & mask));
1625 *data = reg;
1626 ixgbe_write_reg(&adapter->hw, reg, before);
1627 return true;
1628 }
1629 ixgbe_write_reg(&adapter->hw, reg, before);
1630 }
1631 return false;
1632 }
1633
reg_set_and_check(struct ixgbe_adapter * adapter,u64 * data,int reg,u32 mask,u32 write)1634 static bool reg_set_and_check(struct ixgbe_adapter *adapter, u64 *data, int reg,
1635 u32 mask, u32 write)
1636 {
1637 u32 val, before;
1638
1639 if (ixgbe_removed(adapter->hw.hw_addr)) {
1640 *data = 1;
1641 return true;
1642 }
1643 before = ixgbe_read_reg(&adapter->hw, reg);
1644 ixgbe_write_reg(&adapter->hw, reg, write & mask);
1645 val = ixgbe_read_reg(&adapter->hw, reg);
1646 if ((write & mask) != (val & mask)) {
1647 e_err(drv, "set/check reg %04X test failed: got 0x%08X expected 0x%08X\n",
1648 reg, (val & mask), (write & mask));
1649 *data = reg;
1650 ixgbe_write_reg(&adapter->hw, reg, before);
1651 return true;
1652 }
1653 ixgbe_write_reg(&adapter->hw, reg, before);
1654 return false;
1655 }
1656
ixgbe_reg_test(struct ixgbe_adapter * adapter,u64 * data)1657 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1658 {
1659 const struct ixgbe_reg_test *test;
1660 u32 value, before, after;
1661 u32 i, toggle;
1662
1663 if (ixgbe_removed(adapter->hw.hw_addr)) {
1664 e_err(drv, "Adapter removed - register test blocked\n");
1665 *data = 1;
1666 return 1;
1667 }
1668 switch (adapter->hw.mac.type) {
1669 case ixgbe_mac_82598EB:
1670 toggle = 0x7FFFF3FF;
1671 test = reg_test_82598;
1672 break;
1673 case ixgbe_mac_82599EB:
1674 case ixgbe_mac_X540:
1675 case ixgbe_mac_X550:
1676 case ixgbe_mac_X550EM_x:
1677 case ixgbe_mac_x550em_a:
1678 case ixgbe_mac_e610:
1679 toggle = 0x7FFFF30F;
1680 test = reg_test_82599;
1681 break;
1682 default:
1683 *data = 1;
1684 return 1;
1685 }
1686
1687 /*
1688 * Because the status register is such a special case,
1689 * we handle it separately from the rest of the register
1690 * tests. Some bits are read-only, some toggle, and some
1691 * are writeable on newer MACs.
1692 */
1693 before = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS);
1694 value = (ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle);
1695 ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, toggle);
1696 after = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle;
1697 if (value != after) {
1698 e_err(drv, "failed STATUS register test got: 0x%08X expected: 0x%08X\n",
1699 after, value);
1700 *data = 1;
1701 return 1;
1702 }
1703 /* restore previous status */
1704 ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, before);
1705
1706 /*
1707 * Perform the remainder of the register test, looping through
1708 * the test table until we either fail or reach the null entry.
1709 */
1710 while (test->reg) {
1711 for (i = 0; i < test->array_len; i++) {
1712 bool b = false;
1713
1714 switch (test->test_type) {
1715 case PATTERN_TEST:
1716 b = reg_pattern_test(adapter, data,
1717 test->reg + (i * 0x40),
1718 test->mask,
1719 test->write);
1720 break;
1721 case SET_READ_TEST:
1722 b = reg_set_and_check(adapter, data,
1723 test->reg + (i * 0x40),
1724 test->mask,
1725 test->write);
1726 break;
1727 case WRITE_NO_TEST:
1728 ixgbe_write_reg(&adapter->hw,
1729 test->reg + (i * 0x40),
1730 test->write);
1731 break;
1732 case TABLE32_TEST:
1733 b = reg_pattern_test(adapter, data,
1734 test->reg + (i * 4),
1735 test->mask,
1736 test->write);
1737 break;
1738 case TABLE64_TEST_LO:
1739 b = reg_pattern_test(adapter, data,
1740 test->reg + (i * 8),
1741 test->mask,
1742 test->write);
1743 break;
1744 case TABLE64_TEST_HI:
1745 b = reg_pattern_test(adapter, data,
1746 (test->reg + 4) + (i * 8),
1747 test->mask,
1748 test->write);
1749 break;
1750 }
1751 if (b)
1752 return 1;
1753 }
1754 test++;
1755 }
1756
1757 *data = 0;
1758 return 0;
1759 }
1760
ixgbe_eeprom_test(struct ixgbe_adapter * adapter,u64 * data)1761 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data)
1762 {
1763 struct ixgbe_hw *hw = &adapter->hw;
1764 if (hw->eeprom.ops.validate_checksum(hw, NULL))
1765 *data = 1;
1766 else
1767 *data = 0;
1768 return *data;
1769 }
1770
ixgbe_test_intr(int irq,void * data)1771 static irqreturn_t ixgbe_test_intr(int irq, void *data)
1772 {
1773 struct net_device *netdev = (struct net_device *) data;
1774 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1775
1776 adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR);
1777
1778 return IRQ_HANDLED;
1779 }
1780
ixgbe_intr_test(struct ixgbe_adapter * adapter,u64 * data)1781 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1782 {
1783 struct net_device *netdev = adapter->netdev;
1784 u32 mask, i = 0, shared_int = true;
1785 u32 irq = adapter->pdev->irq;
1786
1787 *data = 0;
1788
1789 /* Hook up test interrupt handler just for this test */
1790 if (adapter->msix_entries) {
1791 /* NOTE: we don't test MSI-X interrupts here, yet */
1792 return 0;
1793 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1794 shared_int = false;
1795 if (request_irq(irq, ixgbe_test_intr, 0, netdev->name,
1796 netdev)) {
1797 *data = 1;
1798 return -1;
1799 }
1800 } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED,
1801 netdev->name, netdev)) {
1802 shared_int = false;
1803 } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED,
1804 netdev->name, netdev)) {
1805 *data = 1;
1806 return -1;
1807 }
1808 e_info(hw, "testing %s interrupt\n", shared_int ?
1809 "shared" : "unshared");
1810
1811 /* Disable all the interrupts */
1812 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1813 IXGBE_WRITE_FLUSH(&adapter->hw);
1814 usleep_range(10000, 20000);
1815
1816 /* Test each interrupt */
1817 for (; i < 10; i++) {
1818 /* Interrupt to test */
1819 mask = BIT(i);
1820
1821 if (!shared_int) {
1822 /*
1823 * Disable the interrupts to be reported in
1824 * the cause register and then force the same
1825 * interrupt and see if one gets posted. If
1826 * an interrupt was posted to the bus, the
1827 * test failed.
1828 */
1829 adapter->test_icr = 0;
1830 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1831 ~mask & 0x00007FFF);
1832 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1833 ~mask & 0x00007FFF);
1834 IXGBE_WRITE_FLUSH(&adapter->hw);
1835 usleep_range(10000, 20000);
1836
1837 if (adapter->test_icr & mask) {
1838 *data = 3;
1839 break;
1840 }
1841 }
1842
1843 /*
1844 * Enable the interrupt to be reported in the cause
1845 * register and then force the same interrupt and see
1846 * if one gets posted. If an interrupt was not posted
1847 * to the bus, the test failed.
1848 */
1849 adapter->test_icr = 0;
1850 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1851 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
1852 IXGBE_WRITE_FLUSH(&adapter->hw);
1853 usleep_range(10000, 20000);
1854
1855 if (!(adapter->test_icr & mask)) {
1856 *data = 4;
1857 break;
1858 }
1859
1860 if (!shared_int) {
1861 /*
1862 * Disable the other interrupts to be reported in
1863 * the cause register and then force the other
1864 * interrupts and see if any get posted. If
1865 * an interrupt was posted to the bus, the
1866 * test failed.
1867 */
1868 adapter->test_icr = 0;
1869 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1870 ~mask & 0x00007FFF);
1871 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1872 ~mask & 0x00007FFF);
1873 IXGBE_WRITE_FLUSH(&adapter->hw);
1874 usleep_range(10000, 20000);
1875
1876 if (adapter->test_icr) {
1877 *data = 5;
1878 break;
1879 }
1880 }
1881 }
1882
1883 /* Disable all the interrupts */
1884 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1885 IXGBE_WRITE_FLUSH(&adapter->hw);
1886 usleep_range(10000, 20000);
1887
1888 /* Unhook test interrupt handler */
1889 free_irq(irq, netdev);
1890
1891 return *data;
1892 }
1893
ixgbe_free_desc_rings(struct ixgbe_adapter * adapter)1894 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter)
1895 {
1896 /* Shut down the DMA engines now so they can be reinitialized later,
1897 * since the test rings and normally used rings should overlap on
1898 * queue 0 we can just use the standard disable Rx/Tx calls and they
1899 * will take care of disabling the test rings for us.
1900 */
1901
1902 /* first Rx */
1903 ixgbe_disable_rx(adapter);
1904
1905 /* now Tx */
1906 ixgbe_disable_tx(adapter);
1907
1908 ixgbe_reset(adapter);
1909
1910 ixgbe_free_tx_resources(&adapter->test_tx_ring);
1911 ixgbe_free_rx_resources(&adapter->test_rx_ring);
1912 }
1913
ixgbe_setup_desc_rings(struct ixgbe_adapter * adapter)1914 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter)
1915 {
1916 struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1917 struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1918 struct ixgbe_hw *hw = &adapter->hw;
1919 u32 rctl, reg_data;
1920 int ret_val;
1921 int err;
1922
1923 /* Setup Tx descriptor ring and Tx buffers */
1924 tx_ring->count = IXGBE_DEFAULT_TXD;
1925 tx_ring->queue_index = 0;
1926 tx_ring->dev = &adapter->pdev->dev;
1927 tx_ring->netdev = adapter->netdev;
1928 tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx;
1929
1930 err = ixgbe_setup_tx_resources(tx_ring);
1931 if (err)
1932 return 1;
1933
1934 switch (adapter->hw.mac.type) {
1935 case ixgbe_mac_82599EB:
1936 case ixgbe_mac_X540:
1937 case ixgbe_mac_X550:
1938 case ixgbe_mac_X550EM_x:
1939 case ixgbe_mac_x550em_a:
1940 case ixgbe_mac_e610:
1941 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL);
1942 reg_data |= IXGBE_DMATXCTL_TE;
1943 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data);
1944 break;
1945 default:
1946 break;
1947 }
1948
1949 ixgbe_configure_tx_ring(adapter, tx_ring);
1950
1951 /* Setup Rx Descriptor ring and Rx buffers */
1952 rx_ring->count = IXGBE_DEFAULT_RXD;
1953 rx_ring->queue_index = 0;
1954 rx_ring->dev = &adapter->pdev->dev;
1955 rx_ring->netdev = adapter->netdev;
1956 rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx;
1957
1958 err = ixgbe_setup_rx_resources(adapter, rx_ring);
1959 if (err) {
1960 ret_val = 4;
1961 goto err_nomem;
1962 }
1963
1964 hw->mac.ops.disable_rx(hw);
1965
1966 ixgbe_configure_rx_ring(adapter, rx_ring);
1967
1968 rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1969 rctl |= IXGBE_RXCTRL_DMBYPS;
1970 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl);
1971
1972 hw->mac.ops.enable_rx(hw);
1973
1974 return 0;
1975
1976 err_nomem:
1977 ixgbe_free_desc_rings(adapter);
1978 return ret_val;
1979 }
1980
ixgbe_setup_loopback_test(struct ixgbe_adapter * adapter)1981 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
1982 {
1983 struct ixgbe_hw *hw = &adapter->hw;
1984 u32 reg_data;
1985
1986
1987 /* Setup MAC loopback */
1988 reg_data = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1989 reg_data |= IXGBE_HLREG0_LPBK;
1990 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, reg_data);
1991
1992 reg_data = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1993 reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
1994 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg_data);
1995
1996 /* X540 and X550 needs to set the MACC.FLU bit to force link up */
1997 switch (adapter->hw.mac.type) {
1998 case ixgbe_mac_X540:
1999 case ixgbe_mac_X550:
2000 case ixgbe_mac_X550EM_x:
2001 case ixgbe_mac_x550em_a:
2002 case ixgbe_mac_e610:
2003 reg_data = IXGBE_READ_REG(hw, IXGBE_MACC);
2004 reg_data |= IXGBE_MACC_FLU;
2005 IXGBE_WRITE_REG(hw, IXGBE_MACC, reg_data);
2006 break;
2007 default:
2008 if (hw->mac.orig_autoc) {
2009 reg_data = hw->mac.orig_autoc | IXGBE_AUTOC_FLU;
2010 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_data);
2011 } else {
2012 return 10;
2013 }
2014 }
2015 IXGBE_WRITE_FLUSH(hw);
2016 usleep_range(10000, 20000);
2017
2018 /* Disable Atlas Tx lanes; re-enabled in reset path */
2019 if (hw->mac.type == ixgbe_mac_82598EB) {
2020 u8 atlas;
2021
2022 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas);
2023 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN;
2024 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas);
2025
2026 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas);
2027 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
2028 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas);
2029
2030 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas);
2031 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
2032 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas);
2033
2034 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas);
2035 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
2036 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas);
2037 }
2038
2039 return 0;
2040 }
2041
ixgbe_loopback_cleanup(struct ixgbe_adapter * adapter)2042 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter)
2043 {
2044 u32 reg_data;
2045
2046 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
2047 reg_data &= ~IXGBE_HLREG0_LPBK;
2048 IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
2049 }
2050
ixgbe_create_lbtest_frame(struct sk_buff * skb,unsigned int frame_size)2051 static void ixgbe_create_lbtest_frame(struct sk_buff *skb,
2052 unsigned int frame_size)
2053 {
2054 memset(skb->data, 0xFF, frame_size);
2055 frame_size >>= 1;
2056 memset(&skb->data[frame_size], 0xAA, frame_size / 2 - 1);
2057 skb->data[frame_size + 10] = 0xBE;
2058 skb->data[frame_size + 12] = 0xAF;
2059 }
2060
ixgbe_check_lbtest_frame(struct ixgbe_rx_buffer * rx_buffer,unsigned int frame_size)2061 static bool ixgbe_check_lbtest_frame(struct ixgbe_rx_buffer *rx_buffer,
2062 unsigned int frame_size)
2063 {
2064 unsigned char *data;
2065
2066 frame_size >>= 1;
2067
2068 data = page_address(rx_buffer->page) + rx_buffer->page_offset;
2069
2070 return data[3] == 0xFF && data[frame_size + 10] == 0xBE &&
2071 data[frame_size + 12] == 0xAF;
2072 }
2073
ixgbe_clean_test_rings(struct ixgbe_ring * rx_ring,struct ixgbe_ring * tx_ring,unsigned int size)2074 static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring,
2075 struct ixgbe_ring *tx_ring,
2076 unsigned int size)
2077 {
2078 union ixgbe_adv_rx_desc *rx_desc;
2079 u16 rx_ntc, tx_ntc, count = 0;
2080
2081 /* initialize next to clean and descriptor values */
2082 rx_ntc = rx_ring->next_to_clean;
2083 tx_ntc = tx_ring->next_to_clean;
2084 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc);
2085
2086 while (tx_ntc != tx_ring->next_to_use) {
2087 union ixgbe_adv_tx_desc *tx_desc;
2088 struct ixgbe_tx_buffer *tx_buffer;
2089
2090 tx_desc = IXGBE_TX_DESC(tx_ring, tx_ntc);
2091
2092 /* if DD is not set transmit has not completed */
2093 if (!(tx_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
2094 return count;
2095
2096 /* unmap buffer on Tx side */
2097 tx_buffer = &tx_ring->tx_buffer_info[tx_ntc];
2098
2099 /* Free all the Tx ring sk_buffs */
2100 dev_kfree_skb_any(tx_buffer->skb);
2101
2102 /* unmap skb header data */
2103 dma_unmap_single(tx_ring->dev,
2104 dma_unmap_addr(tx_buffer, dma),
2105 dma_unmap_len(tx_buffer, len),
2106 DMA_TO_DEVICE);
2107 dma_unmap_len_set(tx_buffer, len, 0);
2108
2109 /* increment Tx next to clean counter */
2110 tx_ntc++;
2111 if (tx_ntc == tx_ring->count)
2112 tx_ntc = 0;
2113 }
2114
2115 while (rx_desc->wb.upper.length) {
2116 struct ixgbe_rx_buffer *rx_buffer;
2117
2118 /* check Rx buffer */
2119 rx_buffer = &rx_ring->rx_buffer_info[rx_ntc];
2120
2121 /* sync Rx buffer for CPU read */
2122 dma_sync_single_for_cpu(rx_ring->dev,
2123 rx_buffer->dma,
2124 ixgbe_rx_bufsz(rx_ring),
2125 DMA_FROM_DEVICE);
2126
2127 /* verify contents of skb */
2128 if (ixgbe_check_lbtest_frame(rx_buffer, size))
2129 count++;
2130 else
2131 break;
2132
2133 /* sync Rx buffer for device write */
2134 dma_sync_single_for_device(rx_ring->dev,
2135 rx_buffer->dma,
2136 ixgbe_rx_bufsz(rx_ring),
2137 DMA_FROM_DEVICE);
2138
2139 /* increment Rx next to clean counter */
2140 rx_ntc++;
2141 if (rx_ntc == rx_ring->count)
2142 rx_ntc = 0;
2143
2144 /* fetch next descriptor */
2145 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc);
2146 }
2147
2148 netdev_tx_reset_queue(txring_txq(tx_ring));
2149
2150 /* re-map buffers to ring, store next to clean values */
2151 ixgbe_alloc_rx_buffers(rx_ring, count);
2152 rx_ring->next_to_clean = rx_ntc;
2153 tx_ring->next_to_clean = tx_ntc;
2154
2155 return count;
2156 }
2157
ixgbe_run_loopback_test(struct ixgbe_adapter * adapter)2158 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter)
2159 {
2160 struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
2161 struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
2162 int i, j, lc, good_cnt, ret_val = 0;
2163 unsigned int size = 1024;
2164 netdev_tx_t tx_ret_val;
2165 struct sk_buff *skb;
2166 u32 flags_orig = adapter->flags;
2167
2168 /* DCB can modify the frames on Tx */
2169 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
2170
2171 /* allocate test skb */
2172 skb = alloc_skb(size, GFP_KERNEL);
2173 if (!skb)
2174 return 11;
2175
2176 /* place data into test skb */
2177 ixgbe_create_lbtest_frame(skb, size);
2178 skb_put(skb, size);
2179
2180 /*
2181 * Calculate the loop count based on the largest descriptor ring
2182 * The idea is to wrap the largest ring a number of times using 64
2183 * send/receive pairs during each loop
2184 */
2185
2186 if (rx_ring->count <= tx_ring->count)
2187 lc = ((tx_ring->count / 64) * 2) + 1;
2188 else
2189 lc = ((rx_ring->count / 64) * 2) + 1;
2190
2191 for (j = 0; j <= lc; j++) {
2192 /* reset count of good packets */
2193 good_cnt = 0;
2194
2195 /* place 64 packets on the transmit queue*/
2196 for (i = 0; i < 64; i++) {
2197 skb_get(skb);
2198 tx_ret_val = ixgbe_xmit_frame_ring(skb,
2199 adapter,
2200 tx_ring);
2201 if (tx_ret_val == NETDEV_TX_OK)
2202 good_cnt++;
2203 }
2204
2205 if (good_cnt != 64) {
2206 ret_val = 12;
2207 break;
2208 }
2209
2210 /* allow 200 milliseconds for packets to go from Tx to Rx */
2211 msleep(200);
2212
2213 good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size);
2214 if (good_cnt != 64) {
2215 ret_val = 13;
2216 break;
2217 }
2218 }
2219
2220 /* free the original skb */
2221 kfree_skb(skb);
2222 adapter->flags = flags_orig;
2223
2224 return ret_val;
2225 }
2226
ixgbe_loopback_test(struct ixgbe_adapter * adapter,u64 * data)2227 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data)
2228 {
2229 *data = ixgbe_setup_desc_rings(adapter);
2230 if (*data)
2231 goto out;
2232 *data = ixgbe_setup_loopback_test(adapter);
2233 if (*data)
2234 goto err_loopback;
2235 *data = ixgbe_run_loopback_test(adapter);
2236 ixgbe_loopback_cleanup(adapter);
2237
2238 err_loopback:
2239 ixgbe_free_desc_rings(adapter);
2240 out:
2241 return *data;
2242 }
2243
ixgbe_diag_test(struct net_device * netdev,struct ethtool_test * eth_test,u64 * data)2244 static void ixgbe_diag_test(struct net_device *netdev,
2245 struct ethtool_test *eth_test, u64 *data)
2246 {
2247 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
2248 bool if_running = netif_running(netdev);
2249
2250 if (ixgbe_removed(adapter->hw.hw_addr)) {
2251 e_err(hw, "Adapter removed - test blocked\n");
2252 data[0] = 1;
2253 data[1] = 1;
2254 data[2] = 1;
2255 data[3] = 1;
2256 data[4] = 1;
2257 eth_test->flags |= ETH_TEST_FL_FAILED;
2258 return;
2259 }
2260 set_bit(__IXGBE_TESTING, &adapter->state);
2261 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
2262 struct ixgbe_hw *hw = &adapter->hw;
2263
2264 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
2265 int i;
2266 for (i = 0; i < adapter->num_vfs; i++) {
2267 if (adapter->vfinfo[i].clear_to_send) {
2268 netdev_warn(netdev, "offline diagnostic is not supported when VFs are present\n");
2269 data[0] = 1;
2270 data[1] = 1;
2271 data[2] = 1;
2272 data[3] = 1;
2273 data[4] = 1;
2274 eth_test->flags |= ETH_TEST_FL_FAILED;
2275 clear_bit(__IXGBE_TESTING,
2276 &adapter->state);
2277 return;
2278 }
2279 }
2280 }
2281
2282 /* Offline tests */
2283 e_info(hw, "offline testing starting\n");
2284
2285 /* Link test performed before hardware reset so autoneg doesn't
2286 * interfere with test result
2287 */
2288 if (ixgbe_link_test(adapter, &data[4]))
2289 eth_test->flags |= ETH_TEST_FL_FAILED;
2290
2291 if (if_running)
2292 /* indicate we're in test mode */
2293 ixgbe_close(netdev);
2294 else
2295 ixgbe_reset(adapter);
2296
2297 e_info(hw, "register testing starting\n");
2298 if (ixgbe_reg_test(adapter, &data[0]))
2299 eth_test->flags |= ETH_TEST_FL_FAILED;
2300
2301 ixgbe_reset(adapter);
2302 e_info(hw, "eeprom testing starting\n");
2303 if (ixgbe_eeprom_test(adapter, &data[1]))
2304 eth_test->flags |= ETH_TEST_FL_FAILED;
2305
2306 ixgbe_reset(adapter);
2307 e_info(hw, "interrupt testing starting\n");
2308 if (ixgbe_intr_test(adapter, &data[2]))
2309 eth_test->flags |= ETH_TEST_FL_FAILED;
2310
2311 /* If SRIOV or VMDq is enabled then skip MAC
2312 * loopback diagnostic. */
2313 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED |
2314 IXGBE_FLAG_VMDQ_ENABLED)) {
2315 e_info(hw, "Skip MAC loopback diagnostic in VT mode\n");
2316 data[3] = 0;
2317 goto skip_loopback;
2318 }
2319
2320 ixgbe_reset(adapter);
2321 e_info(hw, "loopback testing starting\n");
2322 if (ixgbe_loopback_test(adapter, &data[3]))
2323 eth_test->flags |= ETH_TEST_FL_FAILED;
2324
2325 skip_loopback:
2326 ixgbe_reset(adapter);
2327
2328 /* clear testing bit and return adapter to previous state */
2329 clear_bit(__IXGBE_TESTING, &adapter->state);
2330 if (if_running)
2331 ixgbe_open(netdev);
2332 else if (hw->mac.ops.disable_tx_laser)
2333 hw->mac.ops.disable_tx_laser(hw);
2334 } else {
2335 e_info(hw, "online testing starting\n");
2336
2337 /* Online tests */
2338 if (ixgbe_link_test(adapter, &data[4]))
2339 eth_test->flags |= ETH_TEST_FL_FAILED;
2340
2341 /* Offline tests aren't run; pass by default */
2342 data[0] = 0;
2343 data[1] = 0;
2344 data[2] = 0;
2345 data[3] = 0;
2346
2347 clear_bit(__IXGBE_TESTING, &adapter->state);
2348 }
2349 }
2350
ixgbe_wol_exclusion(struct ixgbe_adapter * adapter,struct ethtool_wolinfo * wol)2351 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
2352 struct ethtool_wolinfo *wol)
2353 {
2354 struct ixgbe_hw *hw = &adapter->hw;
2355 int retval = 0;
2356
2357 /* WOL not supported for all devices */
2358 if (!ixgbe_wol_supported(adapter, hw->device_id,
2359 hw->subsystem_device_id)) {
2360 retval = 1;
2361 wol->supported = 0;
2362 }
2363
2364 return retval;
2365 }
2366
ixgbe_get_wol(struct net_device * netdev,struct ethtool_wolinfo * wol)2367 static void ixgbe_get_wol(struct net_device *netdev,
2368 struct ethtool_wolinfo *wol)
2369 {
2370 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
2371
2372 wol->supported = WAKE_UCAST | WAKE_MCAST |
2373 WAKE_BCAST | WAKE_MAGIC;
2374 wol->wolopts = 0;
2375
2376 if (ixgbe_wol_exclusion(adapter, wol) ||
2377 !device_can_wakeup(&adapter->pdev->dev))
2378 return;
2379
2380 if (adapter->wol & IXGBE_WUFC_EX)
2381 wol->wolopts |= WAKE_UCAST;
2382 if (adapter->wol & IXGBE_WUFC_MC)
2383 wol->wolopts |= WAKE_MCAST;
2384 if (adapter->wol & IXGBE_WUFC_BC)
2385 wol->wolopts |= WAKE_BCAST;
2386 if (adapter->wol & IXGBE_WUFC_MAG)
2387 wol->wolopts |= WAKE_MAGIC;
2388 }
2389
ixgbe_set_wol(struct net_device * netdev,struct ethtool_wolinfo * wol)2390 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2391 {
2392 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
2393
2394 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE |
2395 WAKE_FILTER))
2396 return -EOPNOTSUPP;
2397
2398 if (ixgbe_wol_exclusion(adapter, wol))
2399 return wol->wolopts ? -EOPNOTSUPP : 0;
2400
2401 adapter->wol = 0;
2402
2403 if (wol->wolopts & WAKE_UCAST)
2404 adapter->wol |= IXGBE_WUFC_EX;
2405 if (wol->wolopts & WAKE_MCAST)
2406 adapter->wol |= IXGBE_WUFC_MC;
2407 if (wol->wolopts & WAKE_BCAST)
2408 adapter->wol |= IXGBE_WUFC_BC;
2409 if (wol->wolopts & WAKE_MAGIC)
2410 adapter->wol |= IXGBE_WUFC_MAG;
2411
2412 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
2413
2414 return 0;
2415 }
2416
ixgbe_set_wol_acpi(struct net_device * netdev,struct ethtool_wolinfo * wol)2417 static int ixgbe_set_wol_acpi(struct net_device *netdev,
2418 struct ethtool_wolinfo *wol)
2419 {
2420 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
2421 struct ixgbe_hw *hw = &adapter->hw;
2422 u32 grc;
2423
2424 if (ixgbe_wol_exclusion(adapter, wol))
2425 return wol->wolopts ? -EOPNOTSUPP : 0;
2426
2427 /* disable APM wakeup */
2428 grc = IXGBE_READ_REG(hw, IXGBE_GRC_X550EM_a);
2429 grc &= ~IXGBE_GRC_APME;
2430 IXGBE_WRITE_REG(hw, IXGBE_GRC_X550EM_a, grc);
2431
2432 /* erase existing filters */
2433 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
2434 adapter->wol = 0;
2435
2436 if (wol->wolopts & WAKE_UCAST)
2437 adapter->wol |= IXGBE_WUFC_EX;
2438 if (wol->wolopts & WAKE_MCAST)
2439 adapter->wol |= IXGBE_WUFC_MC;
2440 if (wol->wolopts & WAKE_BCAST)
2441 adapter->wol |= IXGBE_WUFC_BC;
2442
2443 IXGBE_WRITE_REG(hw, IXGBE_WUC, IXGBE_WUC_PME_EN);
2444 IXGBE_WRITE_REG(hw, IXGBE_WUFC, adapter->wol);
2445
2446 hw->wol_enabled = adapter->wol;
2447 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
2448
2449 return 0;
2450 }
2451
ixgbe_set_wol_e610(struct net_device * netdev,struct ethtool_wolinfo * wol)2452 static int ixgbe_set_wol_e610(struct net_device *netdev,
2453 struct ethtool_wolinfo *wol)
2454 {
2455 if (wol->wolopts & (WAKE_UCAST | WAKE_MCAST | WAKE_BCAST))
2456 return ixgbe_set_wol_acpi(netdev, wol);
2457 else
2458 return ixgbe_set_wol(netdev, wol);
2459 }
2460
ixgbe_nway_reset(struct net_device * netdev)2461 static int ixgbe_nway_reset(struct net_device *netdev)
2462 {
2463 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
2464
2465 if (netif_running(netdev))
2466 ixgbe_reinit_locked(adapter);
2467
2468 return 0;
2469 }
2470
ixgbe_set_phys_id(struct net_device * netdev,enum ethtool_phys_id_state state)2471 static int ixgbe_set_phys_id(struct net_device *netdev,
2472 enum ethtool_phys_id_state state)
2473 {
2474 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
2475 struct ixgbe_hw *hw = &adapter->hw;
2476
2477 if (!hw->mac.ops.led_on || !hw->mac.ops.led_off)
2478 return -EOPNOTSUPP;
2479
2480 switch (state) {
2481 case ETHTOOL_ID_ACTIVE:
2482 adapter->led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
2483 return 2;
2484
2485 case ETHTOOL_ID_ON:
2486 hw->mac.ops.led_on(hw, hw->mac.led_link_act);
2487 break;
2488
2489 case ETHTOOL_ID_OFF:
2490 hw->mac.ops.led_off(hw, hw->mac.led_link_act);
2491 break;
2492
2493 case ETHTOOL_ID_INACTIVE:
2494 /* Restore LED settings */
2495 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, adapter->led_reg);
2496 break;
2497 }
2498
2499 return 0;
2500 }
2501
ixgbe_set_phys_id_e610(struct net_device * netdev,enum ethtool_phys_id_state state)2502 static int ixgbe_set_phys_id_e610(struct net_device *netdev,
2503 enum ethtool_phys_id_state state)
2504 {
2505 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
2506 bool led_active;
2507
2508 switch (state) {
2509 case ETHTOOL_ID_ACTIVE:
2510 led_active = true;
2511 break;
2512 case ETHTOOL_ID_INACTIVE:
2513 led_active = false;
2514 break;
2515 default:
2516 return -EOPNOTSUPP;
2517 }
2518
2519 return ixgbe_aci_set_port_id_led(&adapter->hw, !led_active);
2520 }
2521
ixgbe_get_coalesce(struct net_device * netdev,struct ethtool_coalesce * ec,struct kernel_ethtool_coalesce * kernel_coal,struct netlink_ext_ack * extack)2522 static int ixgbe_get_coalesce(struct net_device *netdev,
2523 struct ethtool_coalesce *ec,
2524 struct kernel_ethtool_coalesce *kernel_coal,
2525 struct netlink_ext_ack *extack)
2526 {
2527 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
2528
2529 /* only valid if in constant ITR mode */
2530 if (adapter->rx_itr_setting <= 1)
2531 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
2532 else
2533 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
2534
2535 /* if in mixed tx/rx queues per vector mode, report only rx settings */
2536 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count)
2537 return 0;
2538
2539 /* only valid if in constant ITR mode */
2540 if (adapter->tx_itr_setting <= 1)
2541 ec->tx_coalesce_usecs = adapter->tx_itr_setting;
2542 else
2543 ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
2544
2545 return 0;
2546 }
2547
2548 /*
2549 * this function must be called before setting the new value of
2550 * rx_itr_setting
2551 */
ixgbe_update_rsc(struct ixgbe_adapter * adapter)2552 static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter)
2553 {
2554 struct net_device *netdev = adapter->netdev;
2555
2556 /* nothing to do if LRO or RSC are not enabled */
2557 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) ||
2558 !(netdev->features & NETIF_F_LRO))
2559 return false;
2560
2561 /* check the feature flag value and enable RSC if necessary */
2562 if (adapter->rx_itr_setting == 1 ||
2563 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
2564 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
2565 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2566 e_info(probe, "rx-usecs value high enough to re-enable RSC\n");
2567 return true;
2568 }
2569 /* if interrupt rate is too high then disable RSC */
2570 } else if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2571 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2572 e_info(probe, "rx-usecs set too low, disabling RSC\n");
2573 return true;
2574 }
2575 return false;
2576 }
2577
ixgbe_set_coalesce(struct net_device * netdev,struct ethtool_coalesce * ec,struct kernel_ethtool_coalesce * kernel_coal,struct netlink_ext_ack * extack)2578 static int ixgbe_set_coalesce(struct net_device *netdev,
2579 struct ethtool_coalesce *ec,
2580 struct kernel_ethtool_coalesce *kernel_coal,
2581 struct netlink_ext_ack *extack)
2582 {
2583 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
2584 struct ixgbe_q_vector *q_vector;
2585 int i;
2586 u16 tx_itr_param, rx_itr_param, tx_itr_prev;
2587 bool need_reset = false;
2588
2589 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) {
2590 /* reject Tx specific changes in case of mixed RxTx vectors */
2591 if (ec->tx_coalesce_usecs)
2592 return -EINVAL;
2593 tx_itr_prev = adapter->rx_itr_setting;
2594 } else {
2595 tx_itr_prev = adapter->tx_itr_setting;
2596 }
2597
2598 if ((ec->rx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)) ||
2599 (ec->tx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)))
2600 return -EINVAL;
2601
2602 if (ec->rx_coalesce_usecs > 1)
2603 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
2604 else
2605 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
2606
2607 if (adapter->rx_itr_setting == 1)
2608 rx_itr_param = IXGBE_20K_ITR;
2609 else
2610 rx_itr_param = adapter->rx_itr_setting;
2611
2612 if (ec->tx_coalesce_usecs > 1)
2613 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2614 else
2615 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
2616
2617 if (adapter->tx_itr_setting == 1)
2618 tx_itr_param = IXGBE_12K_ITR;
2619 else
2620 tx_itr_param = adapter->tx_itr_setting;
2621
2622 /* mixed Rx/Tx */
2623 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count)
2624 adapter->tx_itr_setting = adapter->rx_itr_setting;
2625
2626 /* detect ITR changes that require update of TXDCTL.WTHRESH */
2627 if ((adapter->tx_itr_setting != 1) &&
2628 (adapter->tx_itr_setting < IXGBE_100K_ITR)) {
2629 if ((tx_itr_prev == 1) ||
2630 (tx_itr_prev >= IXGBE_100K_ITR))
2631 need_reset = true;
2632 } else {
2633 if ((tx_itr_prev != 1) &&
2634 (tx_itr_prev < IXGBE_100K_ITR))
2635 need_reset = true;
2636 }
2637
2638 /* check the old value and enable RSC if necessary */
2639 need_reset |= ixgbe_update_rsc(adapter);
2640
2641 for (i = 0; i < adapter->num_q_vectors; i++) {
2642 q_vector = adapter->q_vector[i];
2643 if (q_vector->tx.count && !q_vector->rx.count)
2644 /* tx only */
2645 q_vector->itr = tx_itr_param;
2646 else
2647 /* rx only or mixed */
2648 q_vector->itr = rx_itr_param;
2649 ixgbe_write_eitr(q_vector);
2650 }
2651
2652 /*
2653 * do reset here at the end to make sure EITR==0 case is handled
2654 * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings
2655 * also locks in RSC enable/disable which requires reset
2656 */
2657 if (need_reset)
2658 ixgbe_do_reset(netdev);
2659
2660 return 0;
2661 }
2662
ixgbe_get_ethtool_fdir_entry(struct ixgbe_adapter * adapter,struct ethtool_rxnfc * cmd)2663 static int ixgbe_get_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2664 struct ethtool_rxnfc *cmd)
2665 {
2666 union ixgbe_atr_input *mask = &adapter->fdir_mask;
2667 struct ethtool_rx_flow_spec *fsp =
2668 (struct ethtool_rx_flow_spec *)&cmd->fs;
2669 struct hlist_node *node2;
2670 struct ixgbe_fdir_filter *rule = NULL;
2671
2672 /* report total rule count */
2673 cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2674
2675 hlist_for_each_entry_safe(rule, node2,
2676 &adapter->fdir_filter_list, fdir_node) {
2677 if (fsp->location <= rule->sw_idx)
2678 break;
2679 }
2680
2681 if (!rule || fsp->location != rule->sw_idx)
2682 return -EINVAL;
2683
2684 /* fill out the flow spec entry */
2685
2686 /* set flow type field */
2687 switch (rule->filter.formatted.flow_type) {
2688 case IXGBE_ATR_FLOW_TYPE_TCPV4:
2689 fsp->flow_type = TCP_V4_FLOW;
2690 break;
2691 case IXGBE_ATR_FLOW_TYPE_UDPV4:
2692 fsp->flow_type = UDP_V4_FLOW;
2693 break;
2694 case IXGBE_ATR_FLOW_TYPE_SCTPV4:
2695 fsp->flow_type = SCTP_V4_FLOW;
2696 break;
2697 case IXGBE_ATR_FLOW_TYPE_IPV4:
2698 fsp->flow_type = IP_USER_FLOW;
2699 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
2700 fsp->h_u.usr_ip4_spec.proto = 0;
2701 fsp->m_u.usr_ip4_spec.proto = 0;
2702 break;
2703 default:
2704 return -EINVAL;
2705 }
2706
2707 fsp->h_u.tcp_ip4_spec.psrc = rule->filter.formatted.src_port;
2708 fsp->m_u.tcp_ip4_spec.psrc = mask->formatted.src_port;
2709 fsp->h_u.tcp_ip4_spec.pdst = rule->filter.formatted.dst_port;
2710 fsp->m_u.tcp_ip4_spec.pdst = mask->formatted.dst_port;
2711 fsp->h_u.tcp_ip4_spec.ip4src = rule->filter.formatted.src_ip[0];
2712 fsp->m_u.tcp_ip4_spec.ip4src = mask->formatted.src_ip[0];
2713 fsp->h_u.tcp_ip4_spec.ip4dst = rule->filter.formatted.dst_ip[0];
2714 fsp->m_u.tcp_ip4_spec.ip4dst = mask->formatted.dst_ip[0];
2715 fsp->h_ext.vlan_tci = rule->filter.formatted.vlan_id;
2716 fsp->m_ext.vlan_tci = mask->formatted.vlan_id;
2717 fsp->h_ext.vlan_etype = rule->filter.formatted.flex_bytes;
2718 fsp->m_ext.vlan_etype = mask->formatted.flex_bytes;
2719 fsp->h_ext.data[1] = htonl(rule->filter.formatted.vm_pool);
2720 fsp->m_ext.data[1] = htonl(mask->formatted.vm_pool);
2721 fsp->flow_type |= FLOW_EXT;
2722
2723 /* record action */
2724 if (rule->action == IXGBE_FDIR_DROP_QUEUE)
2725 fsp->ring_cookie = RX_CLS_FLOW_DISC;
2726 else
2727 fsp->ring_cookie = rule->action;
2728
2729 return 0;
2730 }
2731
ixgbe_get_ethtool_fdir_all(struct ixgbe_adapter * adapter,struct ethtool_rxnfc * cmd,u32 * rule_locs)2732 static int ixgbe_get_ethtool_fdir_all(struct ixgbe_adapter *adapter,
2733 struct ethtool_rxnfc *cmd,
2734 u32 *rule_locs)
2735 {
2736 struct hlist_node *node2;
2737 struct ixgbe_fdir_filter *rule;
2738 int cnt = 0;
2739
2740 /* report total rule count */
2741 cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2742
2743 hlist_for_each_entry_safe(rule, node2,
2744 &adapter->fdir_filter_list, fdir_node) {
2745 if (cnt == cmd->rule_cnt)
2746 return -EMSGSIZE;
2747 rule_locs[cnt] = rule->sw_idx;
2748 cnt++;
2749 }
2750
2751 cmd->rule_cnt = cnt;
2752
2753 return 0;
2754 }
2755
ixgbe_get_rxfh_fields(struct net_device * dev,struct ethtool_rxfh_fields * cmd)2756 static int ixgbe_get_rxfh_fields(struct net_device *dev,
2757 struct ethtool_rxfh_fields *cmd)
2758 {
2759 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
2760
2761 cmd->data = 0;
2762
2763 /* Report default options for RSS on ixgbe */
2764 switch (cmd->flow_type) {
2765 case TCP_V4_FLOW:
2766 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2767 fallthrough;
2768 case UDP_V4_FLOW:
2769 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
2770 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2771 fallthrough;
2772 case SCTP_V4_FLOW:
2773 case AH_ESP_V4_FLOW:
2774 case AH_V4_FLOW:
2775 case ESP_V4_FLOW:
2776 case IPV4_FLOW:
2777 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2778 break;
2779 case TCP_V6_FLOW:
2780 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2781 fallthrough;
2782 case UDP_V6_FLOW:
2783 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2784 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2785 fallthrough;
2786 case SCTP_V6_FLOW:
2787 case AH_ESP_V6_FLOW:
2788 case AH_V6_FLOW:
2789 case ESP_V6_FLOW:
2790 case IPV6_FLOW:
2791 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2792 break;
2793 default:
2794 return -EINVAL;
2795 }
2796
2797 return 0;
2798 }
2799
ixgbe_rss_indir_tbl_max(struct ixgbe_adapter * adapter)2800 static int ixgbe_rss_indir_tbl_max(struct ixgbe_adapter *adapter)
2801 {
2802 if (adapter->hw.mac.type < ixgbe_mac_X550)
2803 return 16;
2804 else
2805 return 64;
2806 }
2807
ixgbe_get_rxnfc(struct net_device * dev,struct ethtool_rxnfc * cmd,u32 * rule_locs)2808 static int ixgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2809 u32 *rule_locs)
2810 {
2811 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
2812 int ret = -EOPNOTSUPP;
2813
2814 switch (cmd->cmd) {
2815 case ETHTOOL_GRXRINGS:
2816 cmd->data = min_t(int, adapter->num_rx_queues,
2817 ixgbe_rss_indir_tbl_max(adapter));
2818 ret = 0;
2819 break;
2820 case ETHTOOL_GRXCLSRLCNT:
2821 cmd->rule_cnt = adapter->fdir_filter_count;
2822 ret = 0;
2823 break;
2824 case ETHTOOL_GRXCLSRULE:
2825 ret = ixgbe_get_ethtool_fdir_entry(adapter, cmd);
2826 break;
2827 case ETHTOOL_GRXCLSRLALL:
2828 ret = ixgbe_get_ethtool_fdir_all(adapter, cmd, rule_locs);
2829 break;
2830 default:
2831 break;
2832 }
2833
2834 return ret;
2835 }
2836
ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter * adapter,struct ixgbe_fdir_filter * input,u16 sw_idx)2837 int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2838 struct ixgbe_fdir_filter *input,
2839 u16 sw_idx)
2840 {
2841 struct ixgbe_hw *hw = &adapter->hw;
2842 struct hlist_node *node2;
2843 struct ixgbe_fdir_filter *rule, *parent;
2844 int err = -EINVAL;
2845
2846 parent = NULL;
2847 rule = NULL;
2848
2849 hlist_for_each_entry_safe(rule, node2,
2850 &adapter->fdir_filter_list, fdir_node) {
2851 /* hash found, or no matching entry */
2852 if (rule->sw_idx >= sw_idx)
2853 break;
2854 parent = rule;
2855 }
2856
2857 /* if there is an old rule occupying our place remove it */
2858 if (rule && (rule->sw_idx == sw_idx)) {
2859 if (!input || (rule->filter.formatted.bkt_hash !=
2860 input->filter.formatted.bkt_hash)) {
2861 err = ixgbe_fdir_erase_perfect_filter_82599(hw,
2862 &rule->filter,
2863 sw_idx);
2864 }
2865
2866 hlist_del(&rule->fdir_node);
2867 kfree(rule);
2868 adapter->fdir_filter_count--;
2869 }
2870
2871 /*
2872 * If no input this was a delete, err should be 0 if a rule was
2873 * successfully found and removed from the list else -EINVAL
2874 */
2875 if (!input)
2876 return err;
2877
2878 /* initialize node and set software index */
2879 INIT_HLIST_NODE(&input->fdir_node);
2880
2881 /* add filter to the list */
2882 if (parent)
2883 hlist_add_behind(&input->fdir_node, &parent->fdir_node);
2884 else
2885 hlist_add_head(&input->fdir_node,
2886 &adapter->fdir_filter_list);
2887
2888 /* update counts */
2889 adapter->fdir_filter_count++;
2890
2891 return 0;
2892 }
2893
ixgbe_flowspec_to_flow_type(struct ethtool_rx_flow_spec * fsp,u8 * flow_type)2894 static int ixgbe_flowspec_to_flow_type(struct ethtool_rx_flow_spec *fsp,
2895 u8 *flow_type)
2896 {
2897 switch (fsp->flow_type & ~FLOW_EXT) {
2898 case TCP_V4_FLOW:
2899 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2900 break;
2901 case UDP_V4_FLOW:
2902 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2903 break;
2904 case SCTP_V4_FLOW:
2905 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2906 break;
2907 case IP_USER_FLOW:
2908 switch (fsp->h_u.usr_ip4_spec.proto) {
2909 case IPPROTO_TCP:
2910 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2911 break;
2912 case IPPROTO_UDP:
2913 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2914 break;
2915 case IPPROTO_SCTP:
2916 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2917 break;
2918 case 0:
2919 if (!fsp->m_u.usr_ip4_spec.proto) {
2920 *flow_type = IXGBE_ATR_FLOW_TYPE_IPV4;
2921 break;
2922 }
2923 fallthrough;
2924 default:
2925 return 0;
2926 }
2927 break;
2928 default:
2929 return 0;
2930 }
2931
2932 return 1;
2933 }
2934
ixgbe_add_ethtool_fdir_entry(struct ixgbe_adapter * adapter,struct ethtool_rxnfc * cmd)2935 static int ixgbe_add_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2936 struct ethtool_rxnfc *cmd)
2937 {
2938 struct ethtool_rx_flow_spec *fsp =
2939 (struct ethtool_rx_flow_spec *)&cmd->fs;
2940 struct ixgbe_hw *hw = &adapter->hw;
2941 struct ixgbe_fdir_filter *input;
2942 union ixgbe_atr_input mask;
2943 u8 queue;
2944 int err;
2945
2946 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
2947 return -EOPNOTSUPP;
2948
2949 /* ring_cookie is a masked into a set of queues and ixgbe pools or
2950 * we use the drop index.
2951 */
2952 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) {
2953 queue = IXGBE_FDIR_DROP_QUEUE;
2954 } else {
2955 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie);
2956 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie);
2957
2958 if (!vf && (ring >= adapter->num_rx_queues))
2959 return -EINVAL;
2960 else if (vf &&
2961 ((vf > adapter->num_vfs) ||
2962 ring >= adapter->num_rx_queues_per_pool))
2963 return -EINVAL;
2964
2965 /* Map the ring onto the absolute queue index */
2966 if (!vf)
2967 queue = adapter->rx_ring[ring]->reg_idx;
2968 else
2969 queue = ((vf - 1) *
2970 adapter->num_rx_queues_per_pool) + ring;
2971 }
2972
2973 /* Don't allow indexes to exist outside of available space */
2974 if (fsp->location >= ((1024 << adapter->fdir_pballoc) - 2)) {
2975 e_err(drv, "Location out of range\n");
2976 return -EINVAL;
2977 }
2978
2979 input = kzalloc(sizeof(*input), GFP_ATOMIC);
2980 if (!input)
2981 return -ENOMEM;
2982
2983 memset(&mask, 0, sizeof(union ixgbe_atr_input));
2984
2985 /* set SW index */
2986 input->sw_idx = fsp->location;
2987
2988 /* record flow type */
2989 if (!ixgbe_flowspec_to_flow_type(fsp,
2990 &input->filter.formatted.flow_type)) {
2991 e_err(drv, "Unrecognized flow type\n");
2992 goto err_out;
2993 }
2994
2995 mask.formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
2996 IXGBE_ATR_L4TYPE_MASK;
2997
2998 if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
2999 mask.formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
3000
3001 /* Copy input into formatted structures */
3002 input->filter.formatted.src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src;
3003 mask.formatted.src_ip[0] = fsp->m_u.tcp_ip4_spec.ip4src;
3004 input->filter.formatted.dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst;
3005 mask.formatted.dst_ip[0] = fsp->m_u.tcp_ip4_spec.ip4dst;
3006 input->filter.formatted.src_port = fsp->h_u.tcp_ip4_spec.psrc;
3007 mask.formatted.src_port = fsp->m_u.tcp_ip4_spec.psrc;
3008 input->filter.formatted.dst_port = fsp->h_u.tcp_ip4_spec.pdst;
3009 mask.formatted.dst_port = fsp->m_u.tcp_ip4_spec.pdst;
3010
3011 if (fsp->flow_type & FLOW_EXT) {
3012 input->filter.formatted.vm_pool =
3013 (unsigned char)ntohl(fsp->h_ext.data[1]);
3014 mask.formatted.vm_pool =
3015 (unsigned char)ntohl(fsp->m_ext.data[1]);
3016 input->filter.formatted.vlan_id = fsp->h_ext.vlan_tci;
3017 mask.formatted.vlan_id = fsp->m_ext.vlan_tci;
3018 input->filter.formatted.flex_bytes =
3019 fsp->h_ext.vlan_etype;
3020 mask.formatted.flex_bytes = fsp->m_ext.vlan_etype;
3021 }
3022
3023 /* determine if we need to drop or route the packet */
3024 if (fsp->ring_cookie == RX_CLS_FLOW_DISC)
3025 input->action = IXGBE_FDIR_DROP_QUEUE;
3026 else
3027 input->action = fsp->ring_cookie;
3028
3029 spin_lock(&adapter->fdir_perfect_lock);
3030
3031 if (hlist_empty(&adapter->fdir_filter_list)) {
3032 /* save mask and program input mask into HW */
3033 memcpy(&adapter->fdir_mask, &mask, sizeof(mask));
3034 err = ixgbe_fdir_set_input_mask_82599(hw, &mask);
3035 if (err) {
3036 e_err(drv, "Error writing mask\n");
3037 goto err_out_w_lock;
3038 }
3039 } else if (memcmp(&adapter->fdir_mask, &mask, sizeof(mask))) {
3040 e_err(drv, "Only one mask supported per port\n");
3041 goto err_out_w_lock;
3042 }
3043
3044 /* apply mask and compute/store hash */
3045 ixgbe_atr_compute_perfect_hash_82599(&input->filter, &mask);
3046
3047 /* program filters to filter memory */
3048 err = ixgbe_fdir_write_perfect_filter_82599(hw,
3049 &input->filter, input->sw_idx, queue);
3050 if (err)
3051 goto err_out_w_lock;
3052
3053 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
3054
3055 spin_unlock(&adapter->fdir_perfect_lock);
3056
3057 return err;
3058 err_out_w_lock:
3059 spin_unlock(&adapter->fdir_perfect_lock);
3060 err_out:
3061 kfree(input);
3062 return -EINVAL;
3063 }
3064
ixgbe_del_ethtool_fdir_entry(struct ixgbe_adapter * adapter,struct ethtool_rxnfc * cmd)3065 static int ixgbe_del_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
3066 struct ethtool_rxnfc *cmd)
3067 {
3068 struct ethtool_rx_flow_spec *fsp =
3069 (struct ethtool_rx_flow_spec *)&cmd->fs;
3070 int err;
3071
3072 spin_lock(&adapter->fdir_perfect_lock);
3073 err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, fsp->location);
3074 spin_unlock(&adapter->fdir_perfect_lock);
3075
3076 return err;
3077 }
3078
3079 #define UDP_RSS_FLAGS (IXGBE_FLAG2_RSS_FIELD_IPV4_UDP | \
3080 IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
ixgbe_set_rxfh_fields(struct net_device * dev,const struct ethtool_rxfh_fields * nfc,struct netlink_ext_ack * extack)3081 static int ixgbe_set_rxfh_fields(struct net_device *dev,
3082 const struct ethtool_rxfh_fields *nfc,
3083 struct netlink_ext_ack *extack)
3084 {
3085 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
3086 u32 flags2 = adapter->flags2;
3087
3088 /*
3089 * RSS does not support anything other than hashing
3090 * to queues on src and dst IPs and ports
3091 */
3092 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
3093 RXH_L4_B_0_1 | RXH_L4_B_2_3))
3094 return -EINVAL;
3095
3096 switch (nfc->flow_type) {
3097 case TCP_V4_FLOW:
3098 case TCP_V6_FLOW:
3099 if (!(nfc->data & RXH_IP_SRC) ||
3100 !(nfc->data & RXH_IP_DST) ||
3101 !(nfc->data & RXH_L4_B_0_1) ||
3102 !(nfc->data & RXH_L4_B_2_3))
3103 return -EINVAL;
3104 break;
3105 case UDP_V4_FLOW:
3106 if (!(nfc->data & RXH_IP_SRC) ||
3107 !(nfc->data & RXH_IP_DST))
3108 return -EINVAL;
3109 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
3110 case 0:
3111 flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV4_UDP;
3112 break;
3113 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
3114 flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV4_UDP;
3115 break;
3116 default:
3117 return -EINVAL;
3118 }
3119 break;
3120 case UDP_V6_FLOW:
3121 if (!(nfc->data & RXH_IP_SRC) ||
3122 !(nfc->data & RXH_IP_DST))
3123 return -EINVAL;
3124 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
3125 case 0:
3126 flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV6_UDP;
3127 break;
3128 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
3129 flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV6_UDP;
3130 break;
3131 default:
3132 return -EINVAL;
3133 }
3134 break;
3135 case AH_ESP_V4_FLOW:
3136 case AH_V4_FLOW:
3137 case ESP_V4_FLOW:
3138 case SCTP_V4_FLOW:
3139 case AH_ESP_V6_FLOW:
3140 case AH_V6_FLOW:
3141 case ESP_V6_FLOW:
3142 case SCTP_V6_FLOW:
3143 if (!(nfc->data & RXH_IP_SRC) ||
3144 !(nfc->data & RXH_IP_DST) ||
3145 (nfc->data & RXH_L4_B_0_1) ||
3146 (nfc->data & RXH_L4_B_2_3))
3147 return -EINVAL;
3148 break;
3149 default:
3150 return -EINVAL;
3151 }
3152
3153 /* if we changed something we need to update flags */
3154 if (flags2 != adapter->flags2) {
3155 struct ixgbe_hw *hw = &adapter->hw;
3156 u32 mrqc;
3157 unsigned int pf_pool = adapter->num_vfs;
3158
3159 if ((hw->mac.type >= ixgbe_mac_X550) &&
3160 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3161 mrqc = IXGBE_READ_REG(hw, IXGBE_PFVFMRQC(pf_pool));
3162 else
3163 mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC);
3164
3165 if ((flags2 & UDP_RSS_FLAGS) &&
3166 !(adapter->flags2 & UDP_RSS_FLAGS))
3167 e_warn(drv, "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n");
3168
3169 adapter->flags2 = flags2;
3170
3171 /* Perform hash on these packet types */
3172 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4
3173 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
3174 | IXGBE_MRQC_RSS_FIELD_IPV6
3175 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3176
3177 mrqc &= ~(IXGBE_MRQC_RSS_FIELD_IPV4_UDP |
3178 IXGBE_MRQC_RSS_FIELD_IPV6_UDP);
3179
3180 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3181 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3182
3183 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3184 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3185
3186 if ((hw->mac.type >= ixgbe_mac_X550) &&
3187 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3188 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), mrqc);
3189 else
3190 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3191 }
3192
3193 return 0;
3194 }
3195
ixgbe_set_rxnfc(struct net_device * dev,struct ethtool_rxnfc * cmd)3196 static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
3197 {
3198 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
3199 int ret = -EOPNOTSUPP;
3200
3201 switch (cmd->cmd) {
3202 case ETHTOOL_SRXCLSRLINS:
3203 ret = ixgbe_add_ethtool_fdir_entry(adapter, cmd);
3204 break;
3205 case ETHTOOL_SRXCLSRLDEL:
3206 ret = ixgbe_del_ethtool_fdir_entry(adapter, cmd);
3207 break;
3208 default:
3209 break;
3210 }
3211
3212 return ret;
3213 }
3214
ixgbe_get_rxfh_key_size(struct net_device * netdev)3215 static u32 ixgbe_get_rxfh_key_size(struct net_device *netdev)
3216 {
3217 return IXGBE_RSS_KEY_SIZE;
3218 }
3219
ixgbe_rss_indir_size(struct net_device * netdev)3220 static u32 ixgbe_rss_indir_size(struct net_device *netdev)
3221 {
3222 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
3223
3224 return ixgbe_rss_indir_tbl_entries(adapter);
3225 }
3226
ixgbe_get_reta(struct ixgbe_adapter * adapter,u32 * indir)3227 static void ixgbe_get_reta(struct ixgbe_adapter *adapter, u32 *indir)
3228 {
3229 int i, reta_size = ixgbe_rss_indir_tbl_entries(adapter);
3230 u16 rss_m = adapter->ring_feature[RING_F_RSS].mask;
3231
3232 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3233 rss_m = adapter->ring_feature[RING_F_RSS].indices - 1;
3234
3235 for (i = 0; i < reta_size; i++)
3236 indir[i] = adapter->rss_indir_tbl[i] & rss_m;
3237 }
3238
ixgbe_get_rxfh(struct net_device * netdev,struct ethtool_rxfh_param * rxfh)3239 static int ixgbe_get_rxfh(struct net_device *netdev,
3240 struct ethtool_rxfh_param *rxfh)
3241 {
3242 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
3243
3244 rxfh->hfunc = ETH_RSS_HASH_TOP;
3245
3246 if (rxfh->indir)
3247 ixgbe_get_reta(adapter, rxfh->indir);
3248
3249 if (rxfh->key)
3250 memcpy(rxfh->key, adapter->rss_key,
3251 ixgbe_get_rxfh_key_size(netdev));
3252
3253 return 0;
3254 }
3255
ixgbe_set_rxfh(struct net_device * netdev,struct ethtool_rxfh_param * rxfh,struct netlink_ext_ack * extack)3256 static int ixgbe_set_rxfh(struct net_device *netdev,
3257 struct ethtool_rxfh_param *rxfh,
3258 struct netlink_ext_ack *extack)
3259 {
3260 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
3261 int i;
3262 u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3263
3264 if (rxfh->hfunc != ETH_RSS_HASH_NO_CHANGE &&
3265 rxfh->hfunc != ETH_RSS_HASH_TOP)
3266 return -EOPNOTSUPP;
3267
3268 /* Fill out the redirection table */
3269 if (rxfh->indir) {
3270 int max_queues = min_t(int, adapter->num_rx_queues,
3271 ixgbe_rss_indir_tbl_max(adapter));
3272
3273 /*Allow at least 2 queues w/ SR-IOV.*/
3274 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
3275 (max_queues < 2))
3276 max_queues = 2;
3277
3278 /* Verify user input. */
3279 for (i = 0; i < reta_entries; i++)
3280 if (rxfh->indir[i] >= max_queues)
3281 return -EINVAL;
3282
3283 for (i = 0; i < reta_entries; i++)
3284 adapter->rss_indir_tbl[i] = rxfh->indir[i];
3285
3286 ixgbe_store_reta(adapter);
3287 }
3288
3289 /* Fill out the rss hash key */
3290 if (rxfh->key) {
3291 memcpy(adapter->rss_key, rxfh->key,
3292 ixgbe_get_rxfh_key_size(netdev));
3293 ixgbe_store_key(adapter);
3294 }
3295
3296 return 0;
3297 }
3298
ixgbe_get_ts_info(struct net_device * dev,struct kernel_ethtool_ts_info * info)3299 static int ixgbe_get_ts_info(struct net_device *dev,
3300 struct kernel_ethtool_ts_info *info)
3301 {
3302 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
3303
3304 /* we always support timestamping disabled */
3305 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE);
3306
3307 switch (adapter->hw.mac.type) {
3308 case ixgbe_mac_X550:
3309 case ixgbe_mac_X550EM_x:
3310 case ixgbe_mac_x550em_a:
3311 case ixgbe_mac_e610:
3312 info->rx_filters |= BIT(HWTSTAMP_FILTER_ALL);
3313 break;
3314 case ixgbe_mac_X540:
3315 case ixgbe_mac_82599EB:
3316 info->rx_filters |=
3317 BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
3318 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
3319 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);
3320 break;
3321 default:
3322 return ethtool_op_get_ts_info(dev, info);
3323 }
3324
3325 info->so_timestamping =
3326 SOF_TIMESTAMPING_TX_SOFTWARE |
3327 SOF_TIMESTAMPING_TX_HARDWARE |
3328 SOF_TIMESTAMPING_RX_HARDWARE |
3329 SOF_TIMESTAMPING_RAW_HARDWARE;
3330
3331 if (adapter->ptp_clock)
3332 info->phc_index = ptp_clock_index(adapter->ptp_clock);
3333
3334 info->tx_types =
3335 BIT(HWTSTAMP_TX_OFF) |
3336 BIT(HWTSTAMP_TX_ON);
3337
3338 return 0;
3339 }
3340
ixgbe_max_channels(struct ixgbe_adapter * adapter)3341 static unsigned int ixgbe_max_channels(struct ixgbe_adapter *adapter)
3342 {
3343 unsigned int max_combined;
3344 u8 tcs = adapter->hw_tcs;
3345
3346 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3347 /* We only support one q_vector without MSI-X */
3348 max_combined = 1;
3349 } else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3350 /* Limit value based on the queue mask */
3351 max_combined = adapter->ring_feature[RING_F_RSS].mask + 1;
3352 } else if (tcs > 1) {
3353 /* For DCB report channels per traffic class */
3354 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3355 /* 8 TC w/ 4 queues per TC */
3356 max_combined = 4;
3357 } else if (tcs > 4) {
3358 /* 8 TC w/ 8 queues per TC */
3359 max_combined = 8;
3360 } else {
3361 /* 4 TC w/ 16 queues per TC */
3362 max_combined = 16;
3363 }
3364 } else if (adapter->atr_sample_rate) {
3365 /* support up to 64 queues with ATR */
3366 max_combined = IXGBE_MAX_FDIR_INDICES;
3367 } else {
3368 /* support up to 16 queues with RSS */
3369 max_combined = ixgbe_max_rss_indices(adapter);
3370 }
3371
3372 return min_t(int, max_combined, num_online_cpus());
3373 }
3374
ixgbe_get_channels(struct net_device * dev,struct ethtool_channels * ch)3375 static void ixgbe_get_channels(struct net_device *dev,
3376 struct ethtool_channels *ch)
3377 {
3378 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
3379
3380 /* report maximum channels */
3381 ch->max_combined = ixgbe_max_channels(adapter);
3382
3383 /* report info for other vector */
3384 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3385 ch->max_other = NON_Q_VECTORS;
3386 ch->other_count = NON_Q_VECTORS;
3387 }
3388
3389 /* record RSS queues */
3390 ch->combined_count = adapter->ring_feature[RING_F_RSS].indices;
3391
3392 /* nothing else to report if RSS is disabled */
3393 if (ch->combined_count == 1)
3394 return;
3395
3396 /* we do not support ATR queueing if SR-IOV is enabled */
3397 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3398 return;
3399
3400 /* same thing goes for being DCB enabled */
3401 if (adapter->hw_tcs > 1)
3402 return;
3403
3404 /* if ATR is disabled we can exit */
3405 if (!adapter->atr_sample_rate)
3406 return;
3407
3408 /* report flow director queues as maximum channels */
3409 ch->combined_count = adapter->ring_feature[RING_F_FDIR].indices;
3410 }
3411
ixgbe_set_channels(struct net_device * dev,struct ethtool_channels * ch)3412 static int ixgbe_set_channels(struct net_device *dev,
3413 struct ethtool_channels *ch)
3414 {
3415 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
3416 unsigned int count = ch->combined_count;
3417 u8 max_rss_indices = ixgbe_max_rss_indices(adapter);
3418
3419 /* verify they are not requesting separate vectors */
3420 if (!count || ch->rx_count || ch->tx_count)
3421 return -EINVAL;
3422
3423 /* verify other_count has not changed */
3424 if (ch->other_count != NON_Q_VECTORS)
3425 return -EINVAL;
3426
3427 /* verify the number of channels does not exceed hardware limits */
3428 if (count > ixgbe_max_channels(adapter))
3429 return -EINVAL;
3430
3431 /* update feature limits from largest to smallest supported values */
3432 adapter->ring_feature[RING_F_FDIR].limit = count;
3433
3434 /* cap RSS limit */
3435 if (count > max_rss_indices)
3436 count = max_rss_indices;
3437 adapter->ring_feature[RING_F_RSS].limit = count;
3438
3439 #ifdef IXGBE_FCOE
3440 /* cap FCoE limit at 8 */
3441 if (count > IXGBE_FCRETA_SIZE)
3442 count = IXGBE_FCRETA_SIZE;
3443 adapter->ring_feature[RING_F_FCOE].limit = count;
3444
3445 #endif
3446 /* use setup TC to update any traffic class queue mapping */
3447 return ixgbe_setup_tc(dev, adapter->hw_tcs);
3448 }
3449
ixgbe_get_module_info(struct net_device * dev,struct ethtool_modinfo * modinfo)3450 static int ixgbe_get_module_info(struct net_device *dev,
3451 struct ethtool_modinfo *modinfo)
3452 {
3453 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
3454 struct ixgbe_hw *hw = &adapter->hw;
3455 u8 sff8472_rev, addr_mode;
3456 bool page_swap = false;
3457 int status;
3458
3459 if (hw->phy.type == ixgbe_phy_fw)
3460 return -ENXIO;
3461
3462 /* Check whether we support SFF-8472 or not */
3463 status = hw->phy.ops.read_i2c_eeprom(hw,
3464 IXGBE_SFF_SFF_8472_COMP,
3465 &sff8472_rev);
3466 if (status)
3467 return -EIO;
3468
3469 /* addressing mode is not supported */
3470 status = hw->phy.ops.read_i2c_eeprom(hw,
3471 IXGBE_SFF_SFF_8472_SWAP,
3472 &addr_mode);
3473 if (status)
3474 return -EIO;
3475
3476 if (addr_mode & IXGBE_SFF_ADDRESSING_MODE) {
3477 e_err(drv, "Address change required to access page 0xA2, but not supported. Please report the module type to the driver maintainers.\n");
3478 page_swap = true;
3479 }
3480
3481 if (sff8472_rev == IXGBE_SFF_SFF_8472_UNSUP || page_swap ||
3482 !(addr_mode & IXGBE_SFF_DDM_IMPLEMENTED)) {
3483 /* We have a SFP, but it does not support SFF-8472 */
3484 modinfo->type = ETH_MODULE_SFF_8079;
3485 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
3486 } else {
3487 /* We have a SFP which supports a revision of SFF-8472. */
3488 modinfo->type = ETH_MODULE_SFF_8472;
3489 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
3490 }
3491
3492 return 0;
3493 }
3494
ixgbe_get_module_eeprom(struct net_device * dev,struct ethtool_eeprom * ee,u8 * data)3495 static int ixgbe_get_module_eeprom(struct net_device *dev,
3496 struct ethtool_eeprom *ee,
3497 u8 *data)
3498 {
3499 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
3500 struct ixgbe_hw *hw = &adapter->hw;
3501 int status = -EFAULT;
3502 u8 databyte = 0xFF;
3503 int i = 0;
3504
3505 if (ee->len == 0)
3506 return -EINVAL;
3507
3508 if (hw->phy.type == ixgbe_phy_fw)
3509 return -ENXIO;
3510
3511 for (i = ee->offset; i < ee->offset + ee->len; i++) {
3512 /* I2C reads can take long time */
3513 if (test_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
3514 return -EBUSY;
3515
3516 if (i < ETH_MODULE_SFF_8079_LEN)
3517 status = hw->phy.ops.read_i2c_eeprom(hw, i, &databyte);
3518 else
3519 status = hw->phy.ops.read_i2c_sff8472(hw, i, &databyte);
3520
3521 if (status)
3522 return -EIO;
3523
3524 data[i - ee->offset] = databyte;
3525 }
3526
3527 return 0;
3528 }
3529
3530 static const struct {
3531 ixgbe_link_speed mac_speed;
3532 u32 link_mode;
3533 } ixgbe_ls_map[] = {
3534 { IXGBE_LINK_SPEED_10_FULL, ETHTOOL_LINK_MODE_10baseT_Full_BIT },
3535 { IXGBE_LINK_SPEED_100_FULL, ETHTOOL_LINK_MODE_100baseT_Full_BIT },
3536 { IXGBE_LINK_SPEED_1GB_FULL, ETHTOOL_LINK_MODE_1000baseT_Full_BIT },
3537 { IXGBE_LINK_SPEED_2_5GB_FULL, ETHTOOL_LINK_MODE_2500baseX_Full_BIT },
3538 { IXGBE_LINK_SPEED_10GB_FULL, ETHTOOL_LINK_MODE_10000baseT_Full_BIT },
3539 };
3540
3541 static const struct {
3542 u32 lp_advertised;
3543 u32 link_mode;
3544 } ixgbe_lp_map[] = {
3545 { FW_PHY_ACT_UD_2_100M_TX_EEE, ETHTOOL_LINK_MODE_100baseT_Full_BIT },
3546 { FW_PHY_ACT_UD_2_1G_T_EEE, ETHTOOL_LINK_MODE_1000baseT_Full_BIT },
3547 { FW_PHY_ACT_UD_2_10G_T_EEE, ETHTOOL_LINK_MODE_10000baseT_Full_BIT },
3548 { FW_PHY_ACT_UD_2_1G_KX_EEE, ETHTOOL_LINK_MODE_1000baseKX_Full_BIT },
3549 { FW_PHY_ACT_UD_2_10G_KX4_EEE, ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT },
3550 { FW_PHY_ACT_UD_2_10G_KR_EEE, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT},
3551 };
3552
3553 static int
ixgbe_get_eee_fw(struct ixgbe_adapter * adapter,struct ethtool_keee * edata)3554 ixgbe_get_eee_fw(struct ixgbe_adapter *adapter, struct ethtool_keee *edata)
3555 {
3556 __ETHTOOL_DECLARE_LINK_MODE_MASK(common);
3557 u32 info[FW_PHY_ACT_DATA_COUNT] = { 0 };
3558 struct ixgbe_hw *hw = &adapter->hw;
3559 int rc;
3560 u16 i;
3561
3562 rc = ixgbe_fw_phy_activity(hw, FW_PHY_ACT_UD_2, &info);
3563 if (rc)
3564 return rc;
3565
3566 for (i = 0; i < ARRAY_SIZE(ixgbe_lp_map); ++i) {
3567 if (info[0] & ixgbe_lp_map[i].lp_advertised)
3568 linkmode_set_bit(ixgbe_lp_map[i].link_mode,
3569 edata->lp_advertised);
3570 }
3571
3572 for (i = 0; i < ARRAY_SIZE(ixgbe_ls_map); ++i) {
3573 if (hw->phy.eee_speeds_supported & ixgbe_ls_map[i].mac_speed)
3574 linkmode_set_bit(ixgbe_lp_map[i].link_mode,
3575 edata->supported);
3576 }
3577
3578 for (i = 0; i < ARRAY_SIZE(ixgbe_ls_map); ++i) {
3579 if (hw->phy.eee_speeds_advertised & ixgbe_ls_map[i].mac_speed)
3580 linkmode_set_bit(ixgbe_lp_map[i].link_mode,
3581 edata->advertised);
3582 }
3583
3584 edata->eee_enabled = !linkmode_empty(edata->advertised);
3585 edata->tx_lpi_enabled = edata->eee_enabled;
3586
3587 linkmode_and(common, edata->advertised, edata->lp_advertised);
3588 edata->eee_active = !linkmode_empty(common);
3589
3590 return 0;
3591 }
3592
ixgbe_get_eee(struct net_device * netdev,struct ethtool_keee * edata)3593 static int ixgbe_get_eee(struct net_device *netdev, struct ethtool_keee *edata)
3594 {
3595 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
3596 struct ixgbe_hw *hw = &adapter->hw;
3597
3598 if (!(adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE))
3599 return -EOPNOTSUPP;
3600
3601 if (hw->phy.eee_speeds_supported && hw->phy.type == ixgbe_phy_fw)
3602 return ixgbe_get_eee_fw(adapter, edata);
3603
3604 return -EOPNOTSUPP;
3605 }
3606
ixgbe_set_eee(struct net_device * netdev,struct ethtool_keee * edata)3607 static int ixgbe_set_eee(struct net_device *netdev, struct ethtool_keee *edata)
3608 {
3609 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
3610 struct ixgbe_hw *hw = &adapter->hw;
3611 struct ethtool_keee eee_data;
3612 int ret_val;
3613
3614 if (!(adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE))
3615 return -EOPNOTSUPP;
3616
3617 memset(&eee_data, 0, sizeof(struct ethtool_keee));
3618
3619 ret_val = ixgbe_get_eee(netdev, &eee_data);
3620 if (ret_val)
3621 return ret_val;
3622
3623 if (eee_data.eee_enabled && !edata->eee_enabled) {
3624 if (eee_data.tx_lpi_enabled != edata->tx_lpi_enabled) {
3625 e_err(drv, "Setting EEE tx-lpi is not supported\n");
3626 return -EINVAL;
3627 }
3628
3629 if (eee_data.tx_lpi_timer != edata->tx_lpi_timer) {
3630 e_err(drv,
3631 "Setting EEE Tx LPI timer is not supported\n");
3632 return -EINVAL;
3633 }
3634
3635 if (!linkmode_equal(eee_data.advertised, edata->advertised)) {
3636 e_err(drv,
3637 "Setting EEE advertised speeds is not supported\n");
3638 return -EINVAL;
3639 }
3640 }
3641
3642 if (eee_data.eee_enabled != edata->eee_enabled) {
3643 if (edata->eee_enabled) {
3644 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
3645 hw->phy.eee_speeds_advertised =
3646 hw->phy.eee_speeds_supported;
3647 } else {
3648 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
3649 hw->phy.eee_speeds_advertised = 0;
3650 }
3651
3652 /* reset link */
3653 if (netif_running(netdev))
3654 ixgbe_reinit_locked(adapter);
3655 else
3656 ixgbe_reset(adapter);
3657 }
3658
3659 return 0;
3660 }
3661
ixgbe_get_priv_flags(struct net_device * netdev)3662 static u32 ixgbe_get_priv_flags(struct net_device *netdev)
3663 {
3664 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
3665 u32 priv_flags = 0;
3666
3667 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
3668 priv_flags |= IXGBE_PRIV_FLAGS_LEGACY_RX;
3669
3670 if (adapter->flags2 & IXGBE_FLAG2_VF_IPSEC_ENABLED)
3671 priv_flags |= IXGBE_PRIV_FLAGS_VF_IPSEC_EN;
3672
3673 if (adapter->flags2 & IXGBE_FLAG2_AUTO_DISABLE_VF)
3674 priv_flags |= IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF;
3675
3676 return priv_flags;
3677 }
3678
ixgbe_set_priv_flags(struct net_device * netdev,u32 priv_flags)3679 static int ixgbe_set_priv_flags(struct net_device *netdev, u32 priv_flags)
3680 {
3681 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
3682 unsigned int flags2 = adapter->flags2;
3683 unsigned int i;
3684
3685 flags2 &= ~IXGBE_FLAG2_RX_LEGACY;
3686 if (priv_flags & IXGBE_PRIV_FLAGS_LEGACY_RX)
3687 flags2 |= IXGBE_FLAG2_RX_LEGACY;
3688
3689 flags2 &= ~IXGBE_FLAG2_VF_IPSEC_ENABLED;
3690 if (priv_flags & IXGBE_PRIV_FLAGS_VF_IPSEC_EN)
3691 flags2 |= IXGBE_FLAG2_VF_IPSEC_ENABLED;
3692
3693 flags2 &= ~IXGBE_FLAG2_AUTO_DISABLE_VF;
3694 if (priv_flags & IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF) {
3695 if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
3696 /* Reset primary abort counter */
3697 for (i = 0; i < adapter->num_vfs; i++)
3698 adapter->vfinfo[i].primary_abort_count = 0;
3699
3700 flags2 |= IXGBE_FLAG2_AUTO_DISABLE_VF;
3701 } else {
3702 e_info(probe,
3703 "Cannot set private flags: Operation not supported\n");
3704 return -EOPNOTSUPP;
3705 }
3706 }
3707
3708 if (flags2 != adapter->flags2) {
3709 adapter->flags2 = flags2;
3710
3711 /* reset interface to repopulate queues */
3712 if (netif_running(netdev))
3713 ixgbe_reinit_locked(adapter);
3714 }
3715
3716 return 0;
3717 }
3718
3719 static const struct ethtool_ops ixgbe_ethtool_ops = {
3720 .supported_coalesce_params = ETHTOOL_COALESCE_USECS,
3721 .get_drvinfo = ixgbe_get_drvinfo,
3722 .get_regs_len = ixgbe_get_regs_len,
3723 .get_regs = ixgbe_get_regs,
3724 .get_wol = ixgbe_get_wol,
3725 .set_wol = ixgbe_set_wol,
3726 .nway_reset = ixgbe_nway_reset,
3727 .get_link = ethtool_op_get_link,
3728 .get_link_ext_stats = ixgbe_get_link_ext_stats,
3729 .get_eeprom_len = ixgbe_get_eeprom_len,
3730 .get_eeprom = ixgbe_get_eeprom,
3731 .set_eeprom = ixgbe_set_eeprom,
3732 .get_ringparam = ixgbe_get_ringparam,
3733 .set_ringparam = ixgbe_set_ringparam,
3734 .get_pause_stats = ixgbe_get_pause_stats,
3735 .get_pauseparam = ixgbe_get_pauseparam,
3736 .set_pauseparam = ixgbe_set_pauseparam,
3737 .get_msglevel = ixgbe_get_msglevel,
3738 .set_msglevel = ixgbe_set_msglevel,
3739 .self_test = ixgbe_diag_test,
3740 .get_strings = ixgbe_get_strings,
3741 .set_phys_id = ixgbe_set_phys_id,
3742 .get_sset_count = ixgbe_get_sset_count,
3743 .get_ethtool_stats = ixgbe_get_ethtool_stats,
3744 .get_coalesce = ixgbe_get_coalesce,
3745 .set_coalesce = ixgbe_set_coalesce,
3746 .get_rxnfc = ixgbe_get_rxnfc,
3747 .set_rxnfc = ixgbe_set_rxnfc,
3748 .get_rxfh_indir_size = ixgbe_rss_indir_size,
3749 .get_rxfh_key_size = ixgbe_get_rxfh_key_size,
3750 .get_rxfh = ixgbe_get_rxfh,
3751 .set_rxfh = ixgbe_set_rxfh,
3752 .get_rxfh_fields = ixgbe_get_rxfh_fields,
3753 .set_rxfh_fields = ixgbe_set_rxfh_fields,
3754 .get_eee = ixgbe_get_eee,
3755 .set_eee = ixgbe_set_eee,
3756 .get_channels = ixgbe_get_channels,
3757 .set_channels = ixgbe_set_channels,
3758 .get_priv_flags = ixgbe_get_priv_flags,
3759 .set_priv_flags = ixgbe_set_priv_flags,
3760 .get_ts_info = ixgbe_get_ts_info,
3761 .get_module_info = ixgbe_get_module_info,
3762 .get_module_eeprom = ixgbe_get_module_eeprom,
3763 .get_link_ksettings = ixgbe_get_link_ksettings,
3764 .set_link_ksettings = ixgbe_set_link_ksettings,
3765 };
3766
3767 static const struct ethtool_ops ixgbe_ethtool_ops_e610 = {
3768 .supported_coalesce_params = ETHTOOL_COALESCE_USECS,
3769 .get_drvinfo = ixgbe_get_drvinfo,
3770 .get_regs_len = ixgbe_get_regs_len,
3771 .get_regs = ixgbe_get_regs,
3772 .get_wol = ixgbe_get_wol,
3773 .set_wol = ixgbe_set_wol_e610,
3774 .nway_reset = ixgbe_nway_reset,
3775 .get_link = ethtool_op_get_link,
3776 .get_link_ext_stats = ixgbe_get_link_ext_stats,
3777 .get_eeprom_len = ixgbe_get_eeprom_len,
3778 .get_eeprom = ixgbe_get_eeprom,
3779 .set_eeprom = ixgbe_set_eeprom,
3780 .get_ringparam = ixgbe_get_ringparam,
3781 .set_ringparam = ixgbe_set_ringparam,
3782 .get_pause_stats = ixgbe_get_pause_stats,
3783 .get_pauseparam = ixgbe_get_pauseparam,
3784 .set_pauseparam = ixgbe_set_pauseparam_e610,
3785 .get_msglevel = ixgbe_get_msglevel,
3786 .set_msglevel = ixgbe_set_msglevel,
3787 .self_test = ixgbe_diag_test,
3788 .get_strings = ixgbe_get_strings,
3789 .set_phys_id = ixgbe_set_phys_id_e610,
3790 .get_sset_count = ixgbe_get_sset_count,
3791 .get_ethtool_stats = ixgbe_get_ethtool_stats,
3792 .get_coalesce = ixgbe_get_coalesce,
3793 .set_coalesce = ixgbe_set_coalesce,
3794 .get_rxnfc = ixgbe_get_rxnfc,
3795 .set_rxnfc = ixgbe_set_rxnfc,
3796 .get_rxfh_indir_size = ixgbe_rss_indir_size,
3797 .get_rxfh_key_size = ixgbe_get_rxfh_key_size,
3798 .get_rxfh = ixgbe_get_rxfh,
3799 .set_rxfh = ixgbe_set_rxfh,
3800 .get_rxfh_fields = ixgbe_get_rxfh_fields,
3801 .set_rxfh_fields = ixgbe_set_rxfh_fields,
3802 .get_eee = ixgbe_get_eee,
3803 .set_eee = ixgbe_set_eee,
3804 .get_channels = ixgbe_get_channels,
3805 .set_channels = ixgbe_set_channels,
3806 .get_priv_flags = ixgbe_get_priv_flags,
3807 .set_priv_flags = ixgbe_set_priv_flags,
3808 .get_ts_info = ixgbe_get_ts_info,
3809 .get_module_info = ixgbe_get_module_info,
3810 .get_module_eeprom = ixgbe_get_module_eeprom,
3811 .get_link_ksettings = ixgbe_get_link_ksettings,
3812 .set_link_ksettings = ixgbe_set_link_ksettings,
3813 };
3814
ixgbe_set_ethtool_ops(struct net_device * netdev)3815 void ixgbe_set_ethtool_ops(struct net_device *netdev)
3816 {
3817 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
3818
3819 if (adapter->hw.mac.type == ixgbe_mac_e610)
3820 netdev->ethtool_ops = &ixgbe_ethtool_ops_e610;
3821 else
3822 netdev->ethtool_ops = &ixgbe_ethtool_ops;
3823 }
3824