1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /*
3 * Copyright (C) 2012-2014, 2018-2025 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
6 */
7 #include <net/mac80211.h>
8 #include <linux/netdevice.h>
9 #include <linux/dmi.h>
10
11 #include "iwl-trans.h"
12 #include "iwl-op-mode.h"
13 #include "fw/img.h"
14 #include "iwl-debug.h"
15 #include "iwl-prph.h"
16 #include "fw/acpi.h"
17 #include "fw/pnvm.h"
18 #include "fw/uefi.h"
19 #include "fw/regulatory.h"
20
21 #include "mvm.h"
22 #include "fw/dbg.h"
23 #include "iwl-phy-db.h"
24 #include "iwl-modparams.h"
25 #include "iwl-nvm-parse.h"
26 #include "time-sync.h"
27
28 #define MVM_UCODE_ALIVE_TIMEOUT (2 * HZ)
29 #define MVM_UCODE_CALIB_TIMEOUT (2 * HZ)
30
31 struct iwl_mvm_alive_data {
32 __le32 sku_id[3];
33 bool valid;
34 };
35
iwl_send_tx_ant_cfg(struct iwl_mvm * mvm,u8 valid_tx_ant)36 static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
37 {
38 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
39 .valid = cpu_to_le32(valid_tx_ant),
40 };
41
42 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
43 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
44 sizeof(tx_ant_cmd), &tx_ant_cmd);
45 }
46
iwl_send_rss_cfg_cmd(struct iwl_mvm * mvm)47 static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
48 {
49 int i;
50 struct iwl_rss_config_cmd cmd = {
51 .flags = cpu_to_le32(IWL_RSS_ENABLE),
52 .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) |
53 BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) |
54 BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) |
55 BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) |
56 BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) |
57 BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD),
58 };
59
60 if (mvm->trans->info.num_rxqs == 1)
61 return 0;
62
63 /* Do not direct RSS traffic to Q 0 which is our fallback queue */
64 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
65 cmd.indirection_table[i] =
66 1 + (i % (mvm->trans->info.num_rxqs - 1));
67 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
68
69 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
70 }
71
iwl_mvm_send_dqa_cmd(struct iwl_mvm * mvm)72 static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
73 {
74 struct iwl_dqa_enable_cmd dqa_cmd = {
75 .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
76 };
77 u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, DQA_ENABLE_CMD);
78 int ret;
79
80 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
81 if (ret)
82 IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
83 else
84 IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
85
86 return ret;
87 }
88
iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm * mvm,struct iwl_rx_cmd_buffer * rxb)89 void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
90 struct iwl_rx_cmd_buffer *rxb)
91 {
92 struct iwl_rx_packet *pkt = rxb_addr(rxb);
93 struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
94
95 if (mfu_dump_notif->index_num == 0)
96 IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
97 le32_to_cpu(mfu_dump_notif->assert_id));
98 }
99
iwl_alive_fn(struct iwl_notif_wait_data * notif_wait,struct iwl_rx_packet * pkt,void * data)100 static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
101 struct iwl_rx_packet *pkt, void *data)
102 {
103 unsigned int pkt_len = iwl_rx_packet_payload_len(pkt);
104 struct iwl_mvm *mvm =
105 container_of(notif_wait, struct iwl_mvm, notif_wait);
106 struct iwl_mvm_alive_data *alive_data = data;
107 struct iwl_umac_alive *umac;
108 struct iwl_lmac_alive *lmac1;
109 struct iwl_lmac_alive *lmac2 = NULL;
110 u16 status;
111 u32 lmac_error_event_table, umac_error_table;
112 u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP,
113 UCODE_ALIVE_NTFY, 0);
114 u32 i;
115
116
117 if (version >= 6) {
118 struct iwl_alive_ntf_v6 *palive;
119
120 if (pkt_len < sizeof(*palive))
121 return false;
122
123 palive = (void *)pkt->data;
124
125 umac = &palive->umac_data;
126 lmac1 = &palive->lmac_data[0];
127 lmac2 = &palive->lmac_data[1];
128 status = le16_to_cpu(palive->status);
129
130 BUILD_BUG_ON(sizeof(palive->sku_id.data) !=
131 sizeof(alive_data->sku_id));
132 memcpy(alive_data->sku_id, palive->sku_id.data,
133 sizeof(palive->sku_id.data));
134
135 IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n",
136 le32_to_cpu(alive_data->sku_id[0]),
137 le32_to_cpu(alive_data->sku_id[1]),
138 le32_to_cpu(alive_data->sku_id[2]));
139
140 mvm->trans->dbg.imr_data.imr_enable =
141 le32_to_cpu(palive->imr.enabled);
142 mvm->trans->dbg.imr_data.imr_size =
143 le32_to_cpu(palive->imr.size);
144 mvm->trans->dbg.imr_data.imr2sram_remainbyte =
145 mvm->trans->dbg.imr_data.imr_size;
146 mvm->trans->dbg.imr_data.imr_base_addr =
147 palive->imr.base_addr;
148 mvm->trans->dbg.imr_data.imr_curr_addr =
149 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr);
150 IWL_DEBUG_FW(mvm, "IMR Enabled: 0x0%x size 0x0%x Address 0x%016llx\n",
151 mvm->trans->dbg.imr_data.imr_enable,
152 mvm->trans->dbg.imr_data.imr_size,
153 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr));
154
155 if (!mvm->trans->dbg.imr_data.imr_enable) {
156 for (i = 0; i < ARRAY_SIZE(mvm->trans->dbg.active_regions); i++) {
157 struct iwl_ucode_tlv *reg_tlv;
158 struct iwl_fw_ini_region_tlv *reg;
159
160 reg_tlv = mvm->trans->dbg.active_regions[i];
161 if (!reg_tlv)
162 continue;
163
164 reg = (void *)reg_tlv->data;
165 /*
166 * We have only one DRAM IMR region, so we
167 * can break as soon as we find the first
168 * one.
169 */
170 if (reg->type == IWL_FW_INI_REGION_DRAM_IMR) {
171 mvm->trans->dbg.unsupported_region_msk |= BIT(i);
172 break;
173 }
174 }
175 }
176
177 if (version >= 8) {
178 const struct iwl_alive_ntf *palive_v8 =
179 (void *)pkt->data;
180
181 if (pkt_len < sizeof(*palive_v8))
182 return false;
183
184 IWL_DEBUG_FW(mvm, "platform id: 0x%llx\n",
185 palive_v8->platform_id);
186 }
187 } else if (iwl_rx_packet_payload_len(pkt) ==
188 sizeof(struct iwl_alive_ntf_v3)) {
189 struct iwl_alive_ntf_v3 *palive3;
190
191 if (pkt_len < sizeof(*palive3))
192 return false;
193
194 palive3 = (void *)pkt->data;
195 umac = &palive3->umac_data;
196 lmac1 = &palive3->lmac_data;
197 status = le16_to_cpu(palive3->status);
198 } else {
199 WARN(1, "unsupported alive notification (size %d)\n",
200 iwl_rx_packet_payload_len(pkt));
201 /* get timeout later */
202 return false;
203 }
204
205 lmac_error_event_table =
206 le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr);
207 iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table);
208
209 if (lmac2)
210 mvm->trans->dbg.lmac_error_event_table[1] =
211 le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr);
212
213 umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) &
214 ~FW_ADDR_CACHE_CONTROL;
215
216 if (umac_error_table) {
217 if (umac_error_table >=
218 mvm->trans->mac_cfg->base->min_umac_error_event_table) {
219 iwl_fw_umac_set_alive_err_table(mvm->trans,
220 umac_error_table);
221 } else {
222 IWL_ERR(mvm,
223 "Not valid error log pointer 0x%08X for %s uCode\n",
224 umac_error_table,
225 (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ?
226 "Init" : "RT");
227 }
228 }
229
230 alive_data->valid = status == IWL_ALIVE_STATUS_OK;
231
232 IWL_DEBUG_FW(mvm,
233 "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
234 status, lmac1->ver_type, lmac1->ver_subtype);
235
236 if (lmac2)
237 IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
238
239 IWL_DEBUG_FW(mvm,
240 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
241 le32_to_cpu(umac->umac_major),
242 le32_to_cpu(umac->umac_minor));
243
244 iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac);
245
246 return true;
247 }
248
iwl_wait_init_complete(struct iwl_notif_wait_data * notif_wait,struct iwl_rx_packet * pkt,void * data)249 static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
250 struct iwl_rx_packet *pkt, void *data)
251 {
252 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
253
254 return true;
255 }
256
iwl_wait_phy_db_entry(struct iwl_notif_wait_data * notif_wait,struct iwl_rx_packet * pkt,void * data)257 static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
258 struct iwl_rx_packet *pkt, void *data)
259 {
260 struct iwl_phy_db *phy_db = data;
261
262 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
263 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
264 return true;
265 }
266
267 WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
268
269 return false;
270 }
271
iwl_mvm_print_pd_notification(struct iwl_mvm * mvm)272 static void iwl_mvm_print_pd_notification(struct iwl_mvm *mvm)
273 {
274 #define IWL_FW_PRINT_REG_INFO(reg_name) \
275 IWL_ERR(mvm, #reg_name ": 0x%x\n", iwl_read_umac_prph(trans, reg_name))
276
277 struct iwl_trans *trans = mvm->trans;
278 enum iwl_device_family device_family = trans->mac_cfg->device_family;
279
280 if (device_family < IWL_DEVICE_FAMILY_8000)
281 return;
282
283 if (device_family <= IWL_DEVICE_FAMILY_9000)
284 IWL_FW_PRINT_REG_INFO(WFPM_ARC1_PD_NOTIFICATION);
285 else
286 IWL_FW_PRINT_REG_INFO(WFPM_LMAC1_PD_NOTIFICATION);
287
288 IWL_FW_PRINT_REG_INFO(HPM_SECONDARY_DEVICE_STATE);
289
290 /* print OPT info */
291 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_ADDR);
292 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_DATA);
293 }
294
iwl_mvm_load_ucode_wait_alive(struct iwl_mvm * mvm,enum iwl_ucode_type ucode_type)295 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
296 enum iwl_ucode_type ucode_type)
297 {
298 struct iwl_notification_wait alive_wait;
299 struct iwl_mvm_alive_data alive_data = {};
300 int ret;
301 enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
302 static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY };
303 bool run_in_rfkill =
304 ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm);
305 u8 count;
306 struct iwl_pc_data *pc_data;
307
308 if (ucode_type == IWL_UCODE_REGULAR &&
309 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
310 !(fw_has_capa(&mvm->fw->ucode_capa,
311 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
312 ucode_type = IWL_UCODE_REGULAR_USNIFFER;
313 iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
314 clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
315
316 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
317 alive_cmd, ARRAY_SIZE(alive_cmd),
318 iwl_alive_fn, &alive_data);
319
320 /*
321 * We want to load the INIT firmware even in RFKILL
322 * For the unified firmware case, the ucode_type is not
323 * INIT, but we still need to run it.
324 */
325 ret = iwl_trans_start_fw(mvm->trans, mvm->fw, ucode_type,
326 run_in_rfkill);
327 if (ret) {
328 iwl_fw_set_current_image(&mvm->fwrt, old_type);
329 iwl_remove_notification(&mvm->notif_wait, &alive_wait);
330 return ret;
331 }
332
333 /*
334 * Some things may run in the background now, but we
335 * just wait for the ALIVE notification here.
336 */
337 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
338 MVM_UCODE_ALIVE_TIMEOUT);
339
340 if (mvm->trans->mac_cfg->device_family ==
341 IWL_DEVICE_FAMILY_AX210) {
342 /* print these registers regardless of alive fail/success */
343 IWL_INFO(mvm, "WFPM_UMAC_PD_NOTIFICATION: 0x%x\n",
344 iwl_read_umac_prph(mvm->trans, WFPM_ARC1_PD_NOTIFICATION));
345 IWL_INFO(mvm, "WFPM_LMAC2_PD_NOTIFICATION: 0x%x\n",
346 iwl_read_umac_prph(mvm->trans, WFPM_LMAC2_PD_NOTIFICATION));
347 IWL_INFO(mvm, "WFPM_AUTH_KEY_0: 0x%x\n",
348 iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG));
349 IWL_INFO(mvm, "CNVI_SCU_SEQ_DATA_DW9: 0x%x\n",
350 iwl_read_prph(mvm->trans, CNVI_SCU_SEQ_DATA_DW9));
351 }
352
353 if (ret) {
354 struct iwl_trans *trans = mvm->trans;
355
356 /* SecBoot info */
357 if (trans->mac_cfg->device_family >=
358 IWL_DEVICE_FAMILY_22000) {
359 IWL_ERR(mvm,
360 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
361 iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS),
362 iwl_read_umac_prph(trans,
363 UMAG_SB_CPU_2_STATUS));
364 } else if (trans->mac_cfg->device_family >=
365 IWL_DEVICE_FAMILY_8000) {
366 IWL_ERR(mvm,
367 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
368 iwl_read_prph(trans, SB_CPU_1_STATUS),
369 iwl_read_prph(trans, SB_CPU_2_STATUS));
370 }
371
372 iwl_mvm_print_pd_notification(mvm);
373
374 /* LMAC/UMAC PC info */
375 if (trans->mac_cfg->device_family >=
376 IWL_DEVICE_FAMILY_22000) {
377 pc_data = trans->dbg.pc_data;
378 for (count = 0; count < trans->dbg.num_pc;
379 count++, pc_data++)
380 IWL_ERR(mvm, "%s: 0x%x\n",
381 pc_data->pc_name,
382 pc_data->pc_address);
383 } else if (trans->mac_cfg->device_family >=
384 IWL_DEVICE_FAMILY_9000) {
385 IWL_ERR(mvm, "UMAC PC: 0x%x\n",
386 iwl_read_umac_prph(trans,
387 UREG_UMAC_CURRENT_PC));
388 IWL_ERR(mvm, "LMAC PC: 0x%x\n",
389 iwl_read_umac_prph(trans,
390 UREG_LMAC1_CURRENT_PC));
391 if (iwl_mvm_is_cdb_supported(mvm))
392 IWL_ERR(mvm, "LMAC2 PC: 0x%x\n",
393 iwl_read_umac_prph(trans,
394 UREG_LMAC2_CURRENT_PC));
395 }
396
397 if (ret == -ETIMEDOUT && !mvm->fw_product_reset)
398 iwl_fw_dbg_error_collect(&mvm->fwrt,
399 FW_DBG_TRIGGER_ALIVE_TIMEOUT);
400
401 iwl_fw_set_current_image(&mvm->fwrt, old_type);
402 return ret;
403 }
404
405 if (!alive_data.valid) {
406 IWL_ERR(mvm, "Loaded ucode is not valid!\n");
407 iwl_fw_set_current_image(&mvm->fwrt, old_type);
408 return -EIO;
409 }
410
411 /* if reached this point, Alive notification was received */
412 iwl_mei_alive_notif(true);
413
414 iwl_trans_fw_alive(mvm->trans);
415
416 ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait,
417 mvm->fw, alive_data.sku_id);
418 if (ret) {
419 IWL_ERR(mvm, "Timeout waiting for PNVM load!\n");
420 iwl_fw_set_current_image(&mvm->fwrt, old_type);
421 return ret;
422 }
423
424 /*
425 * Note: all the queues are enabled as part of the interface
426 * initialization, but in firmware restart scenarios they
427 * could be stopped, so wake them up. In firmware restart,
428 * mac80211 will have the queues stopped as well until the
429 * reconfiguration completes. During normal startup, they
430 * will be empty.
431 */
432
433 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
434 /*
435 * Set a 'fake' TID for the command queue, since we use the
436 * hweight() of the tid_bitmap as a refcount now. Not that
437 * we ever even consider the command queue as one we might
438 * want to reuse, but be safe nevertheless.
439 */
440 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap =
441 BIT(IWL_MAX_TID_COUNT + 2);
442
443 set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
444 #ifdef CONFIG_IWLWIFI_DEBUGFS
445 iwl_fw_set_dbg_rec_on(&mvm->fwrt);
446 #endif
447
448 /*
449 * For pre-MLD API (MLD API doesn't use the timestamps):
450 * All the BSSes in the BSS table include the GP2 in the system
451 * at the beacon Rx time, this is of course no longer relevant
452 * since we are resetting the firmware.
453 * Purge all the BSS table.
454 */
455 if (!mvm->mld_api_is_used)
456 cfg80211_bss_flush(mvm->hw->wiphy);
457
458 return 0;
459 }
460
iwl_mvm_phy_filter_init(struct iwl_mvm * mvm,struct iwl_phy_specific_cfg * phy_filters)461 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
462 struct iwl_phy_specific_cfg *phy_filters)
463 {
464 #ifdef CONFIG_ACPI
465 *phy_filters = mvm->fwrt.phy_filters;
466 #endif /* CONFIG_ACPI */
467 }
468
iwl_mvm_uats_init(struct iwl_mvm * mvm)469 static void iwl_mvm_uats_init(struct iwl_mvm *mvm)
470 {
471 u8 cmd_ver;
472 int ret;
473 struct iwl_host_cmd cmd = {
474 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP,
475 MCC_ALLOWED_AP_TYPE_CMD),
476 .flags = 0,
477 .data[0] = &mvm->fwrt.uats_table,
478 .len[0] = sizeof(mvm->fwrt.uats_table),
479 .dataflags[0] = IWL_HCMD_DFL_NOCOPY,
480 };
481
482 if (mvm->trans->mac_cfg->device_family < IWL_DEVICE_FAMILY_AX210) {
483 IWL_DEBUG_RADIO(mvm, "UATS feature is not supported\n");
484 return;
485 }
486
487 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id,
488 IWL_FW_CMD_VER_UNKNOWN);
489 if (cmd_ver != 1) {
490 IWL_DEBUG_RADIO(mvm,
491 "MCC_ALLOWED_AP_TYPE_CMD ver %d not supported\n",
492 cmd_ver);
493 return;
494 }
495
496 iwl_uefi_get_uats_table(mvm->trans, &mvm->fwrt);
497
498 if (!mvm->fwrt.uats_valid)
499 return;
500
501 ret = iwl_mvm_send_cmd(mvm, &cmd);
502 if (ret < 0)
503 IWL_ERR(mvm, "failed to send MCC_ALLOWED_AP_TYPE_CMD (%d)\n",
504 ret);
505 else
506 IWL_DEBUG_RADIO(mvm, "MCC_ALLOWED_AP_TYPE_CMD sent to FW\n");
507 }
508
iwl_mvm_sgom_init(struct iwl_mvm * mvm)509 static int iwl_mvm_sgom_init(struct iwl_mvm *mvm)
510 {
511 u8 cmd_ver;
512 int ret;
513 struct iwl_host_cmd cmd = {
514 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP,
515 SAR_OFFSET_MAPPING_TABLE_CMD),
516 .flags = 0,
517 .data[0] = &mvm->fwrt.sgom_table,
518 .len[0] = sizeof(mvm->fwrt.sgom_table),
519 .dataflags[0] = IWL_HCMD_DFL_NOCOPY,
520 };
521
522 if (!mvm->fwrt.sgom_enabled) {
523 IWL_DEBUG_RADIO(mvm, "SGOM table is disabled\n");
524 return 0;
525 }
526
527 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id,
528 IWL_FW_CMD_VER_UNKNOWN);
529
530 if (cmd_ver != 2) {
531 IWL_DEBUG_RADIO(mvm, "command version is unsupported. version = %d\n",
532 cmd_ver);
533 return 0;
534 }
535
536 ret = iwl_mvm_send_cmd(mvm, &cmd);
537 if (ret < 0)
538 IWL_ERR(mvm, "failed to send SAR_OFFSET_MAPPING_CMD (%d)\n", ret);
539
540 return ret;
541 }
542
iwl_send_phy_cfg_cmd(struct iwl_mvm * mvm)543 static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
544 {
545 u32 cmd_id = PHY_CONFIGURATION_CMD;
546 struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd;
547 enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
548 u8 cmd_ver;
549 size_t cmd_size;
550
551 if (iwl_mvm_has_unified_ucode(mvm) &&
552 !mvm->trans->cfg->tx_with_siso_diversity)
553 return 0;
554
555 if (mvm->trans->cfg->tx_with_siso_diversity) {
556 /*
557 * TODO: currently we don't set the antenna but letting the NIC
558 * to decide which antenna to use. This should come from BIOS.
559 */
560 phy_cfg_cmd.phy_cfg =
561 cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED);
562 }
563
564 /* Set parameters */
565 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
566
567 /* set flags extra PHY configuration flags from the device's cfg */
568 phy_cfg_cmd.phy_cfg |=
569 cpu_to_le32(mvm->trans->mac_cfg->extra_phy_cfg_flags);
570
571 phy_cfg_cmd.calib_control.event_trigger =
572 mvm->fw->default_calib[ucode_type].event_trigger;
573 phy_cfg_cmd.calib_control.flow_trigger =
574 mvm->fw->default_calib[ucode_type].flow_trigger;
575
576 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
577 IWL_FW_CMD_VER_UNKNOWN);
578 if (cmd_ver >= 3)
579 iwl_mvm_phy_filter_init(mvm, &phy_cfg_cmd.phy_specific_cfg);
580
581 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
582 phy_cfg_cmd.phy_cfg);
583 cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) :
584 sizeof(struct iwl_phy_cfg_cmd_v1);
585 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &phy_cfg_cmd);
586 }
587
iwl_run_unified_mvm_ucode(struct iwl_mvm * mvm)588 static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm)
589 {
590 struct iwl_notification_wait init_wait;
591 struct iwl_nvm_access_complete_cmd nvm_complete = {};
592 struct iwl_init_extended_cfg_cmd init_cfg = {
593 .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
594 };
595 static const u16 init_complete[] = {
596 INIT_COMPLETE_NOTIF,
597 };
598 u32 sb_cfg;
599 int ret;
600
601 if (mvm->trans->cfg->tx_with_siso_diversity)
602 init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY));
603
604 lockdep_assert_held(&mvm->mutex);
605
606 mvm->rfkill_safe_init_done = false;
607
608 if (mvm->trans->mac_cfg->device_family == IWL_DEVICE_FAMILY_AX210) {
609 sb_cfg = iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG);
610 /* if needed, we'll reset this on our way out later */
611 mvm->fw_product_reset = sb_cfg == SB_CFG_RESIDES_IN_ROM;
612 if (mvm->fw_product_reset && iwl_mei_pldr_req())
613 return -EBUSY;
614 }
615
616 iwl_init_notification_wait(&mvm->notif_wait,
617 &init_wait,
618 init_complete,
619 ARRAY_SIZE(init_complete),
620 iwl_wait_init_complete,
621 NULL);
622
623 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
624
625 /* Will also start the device */
626 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
627 if (ret) {
628 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
629
630 /* if we needed reset then fail here, but notify and remove */
631 if (mvm->fw_product_reset) {
632 iwl_mei_alive_notif(false);
633 iwl_trans_pcie_reset(mvm->trans,
634 IWL_RESET_MODE_RESCAN);
635 }
636
637 goto error;
638 }
639 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
640 NULL);
641
642 /* Send init config command to mark that we are sending NVM access
643 * commands
644 */
645 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
646 INIT_EXTENDED_CFG_CMD),
647 CMD_SEND_IN_RFKILL,
648 sizeof(init_cfg), &init_cfg);
649 if (ret) {
650 IWL_ERR(mvm, "Failed to run init config command: %d\n",
651 ret);
652 goto error;
653 }
654
655 /* Load NVM to NIC if needed */
656 if (mvm->nvm_file_name) {
657 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
658 mvm->nvm_sections);
659 if (ret)
660 goto error;
661 ret = iwl_mvm_load_nvm_to_nic(mvm);
662 if (ret)
663 goto error;
664 }
665
666 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
667 NVM_ACCESS_COMPLETE),
668 CMD_SEND_IN_RFKILL,
669 sizeof(nvm_complete), &nvm_complete);
670 if (ret) {
671 IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
672 ret);
673 goto error;
674 }
675
676 ret = iwl_send_phy_cfg_cmd(mvm);
677 if (ret) {
678 IWL_ERR(mvm, "Failed to run PHY configuration: %d\n",
679 ret);
680 goto error;
681 }
682
683 /* We wait for the INIT complete notification */
684 ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
685 MVM_UCODE_ALIVE_TIMEOUT);
686 if (ret)
687 return ret;
688
689 /* Read the NVM only at driver load time, no need to do this twice */
690 if (!mvm->nvm_data) {
691 mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw,
692 mvm->set_tx_ant, mvm->set_rx_ant);
693 if (IS_ERR(mvm->nvm_data)) {
694 ret = PTR_ERR(mvm->nvm_data);
695 mvm->nvm_data = NULL;
696 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
697 return ret;
698 }
699 }
700
701 mvm->rfkill_safe_init_done = true;
702
703 return 0;
704
705 error:
706 iwl_remove_notification(&mvm->notif_wait, &init_wait);
707 return ret;
708 }
709
iwl_run_init_mvm_ucode(struct iwl_mvm * mvm)710 int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm)
711 {
712 struct iwl_notification_wait calib_wait;
713 static const u16 init_complete[] = {
714 INIT_COMPLETE_NOTIF,
715 CALIB_RES_NOTIF_PHY_DB
716 };
717 int ret;
718
719 if (iwl_mvm_has_unified_ucode(mvm))
720 return iwl_run_unified_mvm_ucode(mvm);
721
722 lockdep_assert_held(&mvm->mutex);
723
724 mvm->rfkill_safe_init_done = false;
725
726 iwl_init_notification_wait(&mvm->notif_wait,
727 &calib_wait,
728 init_complete,
729 ARRAY_SIZE(init_complete),
730 iwl_wait_phy_db_entry,
731 mvm->phy_db);
732
733 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
734
735 /* Will also start the device */
736 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
737 if (ret) {
738 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
739 goto remove_notif;
740 }
741
742 if (mvm->trans->mac_cfg->device_family < IWL_DEVICE_FAMILY_8000) {
743 ret = iwl_mvm_send_bt_init_conf(mvm);
744 if (ret)
745 goto remove_notif;
746 }
747
748 /* Read the NVM only at driver load time, no need to do this twice */
749 if (!mvm->nvm_data) {
750 ret = iwl_nvm_init(mvm);
751 if (ret) {
752 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
753 goto remove_notif;
754 }
755 }
756
757 /* In case we read the NVM from external file, load it to the NIC */
758 if (mvm->nvm_file_name) {
759 ret = iwl_mvm_load_nvm_to_nic(mvm);
760 if (ret)
761 goto remove_notif;
762 }
763
764 WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver,
765 "Too old NVM version (0x%0x, required = 0x%0x)",
766 mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver);
767
768 /*
769 * abort after reading the nvm in case RF Kill is on, we will complete
770 * the init seq later when RF kill will switch to off
771 */
772 if (iwl_mvm_is_radio_hw_killed(mvm)) {
773 IWL_DEBUG_RF_KILL(mvm,
774 "jump over all phy activities due to RF kill\n");
775 goto remove_notif;
776 }
777
778 mvm->rfkill_safe_init_done = true;
779
780 /* Send TX valid antennas before triggering calibrations */
781 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
782 if (ret)
783 goto remove_notif;
784
785 ret = iwl_send_phy_cfg_cmd(mvm);
786 if (ret) {
787 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
788 ret);
789 goto remove_notif;
790 }
791
792 /*
793 * Some things may run in the background now, but we
794 * just wait for the calibration complete notification.
795 */
796 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
797 MVM_UCODE_CALIB_TIMEOUT);
798 if (!ret)
799 goto out;
800
801 if (iwl_mvm_is_radio_hw_killed(mvm)) {
802 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
803 ret = 0;
804 } else {
805 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
806 ret);
807 }
808
809 goto out;
810
811 remove_notif:
812 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
813 out:
814 mvm->rfkill_safe_init_done = false;
815 if (!mvm->nvm_data) {
816 /* we want to debug INIT and we have no NVM - fake */
817 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
818 sizeof(struct ieee80211_channel) +
819 sizeof(struct ieee80211_rate),
820 GFP_KERNEL);
821 if (!mvm->nvm_data)
822 return -ENOMEM;
823 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
824 mvm->nvm_data->bands[0].n_channels = 1;
825 mvm->nvm_data->bands[0].n_bitrates = 1;
826 mvm->nvm_data->bands[0].bitrates =
827 (void *)(mvm->nvm_data->channels + 1);
828 mvm->nvm_data->bands[0].bitrates->hw_value = 10;
829 }
830
831 return ret;
832 }
833
iwl_mvm_config_ltr(struct iwl_mvm * mvm)834 static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
835 {
836 struct iwl_ltr_config_cmd cmd = {
837 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
838 };
839
840 if (!mvm->trans->ltr_enabled)
841 return 0;
842
843 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
844 sizeof(cmd), &cmd);
845 }
846
iwl_mvm_sar_select_profile(struct iwl_mvm * mvm,int prof_a,int prof_b)847 int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
848 {
849 u32 cmd_id = REDUCE_TX_POWER_CMD;
850 struct iwl_dev_tx_power_cmd_v3_v8 cmd = {
851 .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
852 };
853 struct iwl_dev_tx_power_cmd cmd_v9_v10 = {
854 .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
855 };
856 __le16 *per_chain;
857 int ret;
858 u16 len = 0;
859 u32 n_subbands;
860 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 3);
861 void *cmd_data = &cmd;
862
863 if (cmd_ver == 10) {
864 len = sizeof(cmd_v9_v10.v10);
865 n_subbands = IWL_NUM_SUB_BANDS_V2;
866 per_chain = &cmd_v9_v10.v10.per_chain[0][0][0];
867 cmd_v9_v10.v10.flags =
868 cpu_to_le32(mvm->fwrt.reduced_power_flags);
869 } else if (cmd_ver == 9) {
870 len = sizeof(cmd_v9_v10.v9);
871 n_subbands = IWL_NUM_SUB_BANDS_V1;
872 per_chain = &cmd_v9_v10.v9.per_chain[0][0];
873 } else if (cmd_ver == 8) {
874 len = sizeof(cmd.v8);
875 n_subbands = IWL_NUM_SUB_BANDS_V2;
876 per_chain = cmd.v8.per_chain[0][0];
877 cmd.v8.flags = cpu_to_le32(mvm->fwrt.reduced_power_flags);
878 } else if (fw_has_api(&mvm->fw->ucode_capa,
879 IWL_UCODE_TLV_API_REDUCE_TX_POWER)) {
880 len = sizeof(cmd.v5);
881 n_subbands = IWL_NUM_SUB_BANDS_V1;
882 per_chain = cmd.v5.per_chain[0][0];
883 } else if (fw_has_capa(&mvm->fw->ucode_capa,
884 IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) {
885 len = sizeof(cmd.v4);
886 n_subbands = IWL_NUM_SUB_BANDS_V1;
887 per_chain = cmd.v4.per_chain[0][0];
888 } else {
889 len = sizeof(cmd.v3);
890 n_subbands = IWL_NUM_SUB_BANDS_V1;
891 per_chain = cmd.v3.per_chain[0][0];
892 }
893
894 /* all structs have the same common part, add its length */
895 len += sizeof(cmd.common);
896
897 if (cmd_ver < 9)
898 len += sizeof(cmd.per_band);
899 else
900 cmd_data = &cmd_v9_v10;
901
902 ret = iwl_sar_fill_profile(&mvm->fwrt, per_chain,
903 IWL_NUM_CHAIN_TABLES,
904 n_subbands, prof_a, prof_b);
905
906 /* return on error or if the profile is disabled (positive number) */
907 if (ret)
908 return ret;
909
910 iwl_mei_set_power_limit(per_chain);
911
912 IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
913 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, cmd_data);
914 }
915
iwl_mvm_get_sar_geo_profile(struct iwl_mvm * mvm)916 int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
917 {
918 union iwl_geo_tx_power_profiles_cmd geo_tx_cmd;
919 struct iwl_geo_tx_power_profiles_resp *resp;
920 u16 len;
921 int ret;
922 struct iwl_host_cmd cmd = {
923 .id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD),
924 .flags = CMD_WANT_SKB,
925 .data = { &geo_tx_cmd },
926 };
927 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id,
928 IWL_FW_CMD_VER_UNKNOWN);
929
930 /* the ops field is at the same spot for all versions, so set in v1 */
931 geo_tx_cmd.v1.ops =
932 cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE);
933
934 if (cmd_ver == 5)
935 len = sizeof(geo_tx_cmd.v5);
936 else if (cmd_ver == 4)
937 len = sizeof(geo_tx_cmd.v4);
938 else if (cmd_ver == 3)
939 len = sizeof(geo_tx_cmd.v3);
940 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
941 IWL_UCODE_TLV_API_SAR_TABLE_VER))
942 len = sizeof(geo_tx_cmd.v2);
943 else
944 len = sizeof(geo_tx_cmd.v1);
945
946 if (!iwl_sar_geo_support(&mvm->fwrt))
947 return -EOPNOTSUPP;
948
949 cmd.len[0] = len;
950
951 ret = iwl_mvm_send_cmd(mvm, &cmd);
952 if (ret) {
953 IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
954 return ret;
955 }
956
957 resp = (void *)cmd.resp_pkt->data;
958 ret = le32_to_cpu(resp->profile_idx);
959
960 if (WARN_ON(ret > BIOS_GEO_MAX_PROFILE_NUM))
961 ret = -EIO;
962
963 iwl_free_resp(&cmd);
964 return ret;
965 }
966
iwl_mvm_sar_geo_init(struct iwl_mvm * mvm)967 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
968 {
969 u32 cmd_id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD);
970 union iwl_geo_tx_power_profiles_cmd cmd;
971 u16 len;
972 u32 n_bands;
973 u32 n_profiles;
974 __le32 sk = cpu_to_le32(0);
975 int ret;
976 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
977 IWL_FW_CMD_VER_UNKNOWN);
978
979 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) !=
980 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) ||
981 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) !=
982 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) ||
983 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) !=
984 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) ||
985 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) !=
986 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, ops));
987
988 /* the ops field is at the same spot for all versions, so set in v1 */
989 cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES);
990
991 /* Only set to South Korea if the table revision is 1 */
992 if (mvm->fwrt.geo_rev == 1)
993 sk = cpu_to_le32(1);
994
995 if (cmd_ver == 5) {
996 len = sizeof(cmd.v5);
997 n_bands = ARRAY_SIZE(cmd.v5.table[0]);
998 n_profiles = BIOS_GEO_MAX_PROFILE_NUM;
999 cmd.v5.table_revision = sk;
1000 } else if (cmd_ver == 4) {
1001 len = sizeof(cmd.v4);
1002 n_bands = ARRAY_SIZE(cmd.v4.table[0]);
1003 n_profiles = BIOS_GEO_MAX_PROFILE_NUM;
1004 cmd.v4.table_revision = sk;
1005 } else if (cmd_ver == 3) {
1006 len = sizeof(cmd.v3);
1007 n_bands = ARRAY_SIZE(cmd.v3.table[0]);
1008 n_profiles = BIOS_GEO_MIN_PROFILE_NUM;
1009 cmd.v3.table_revision = sk;
1010 } else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
1011 IWL_UCODE_TLV_API_SAR_TABLE_VER)) {
1012 len = sizeof(cmd.v2);
1013 n_bands = ARRAY_SIZE(cmd.v2.table[0]);
1014 n_profiles = BIOS_GEO_MIN_PROFILE_NUM;
1015 cmd.v2.table_revision = sk;
1016 } else {
1017 len = sizeof(cmd.v1);
1018 n_bands = ARRAY_SIZE(cmd.v1.table[0]);
1019 n_profiles = BIOS_GEO_MIN_PROFILE_NUM;
1020 }
1021
1022 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) !=
1023 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) ||
1024 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) !=
1025 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) ||
1026 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) !=
1027 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) ||
1028 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) !=
1029 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, table));
1030 /* the table is at the same position for all versions, so set use v1 */
1031 ret = iwl_sar_geo_fill_table(&mvm->fwrt, &cmd.v1.table[0][0],
1032 n_bands, n_profiles);
1033
1034 /*
1035 * It is a valid scenario to not support SAR, or miss wgds table,
1036 * but in that case there is no need to send the command.
1037 */
1038 if (ret)
1039 return 0;
1040
1041 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd);
1042 }
1043
iwl_mvm_ppag_send_cmd(struct iwl_mvm * mvm)1044 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
1045 {
1046 union iwl_ppag_table_cmd cmd;
1047 int ret, cmd_size;
1048
1049 ret = iwl_fill_ppag_table(&mvm->fwrt, &cmd, &cmd_size);
1050 /* Not supporting PPAG table is a valid scenario */
1051 if (ret < 0)
1052 return 0;
1053
1054 IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n");
1055 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP,
1056 PER_PLATFORM_ANT_GAIN_CMD),
1057 0, cmd_size, &cmd);
1058 if (ret < 0)
1059 IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n",
1060 ret);
1061
1062 return ret;
1063 }
1064
iwl_mvm_ppag_init(struct iwl_mvm * mvm)1065 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
1066 {
1067 /* no need to read the table, done in INIT stage */
1068 if (!(iwl_is_ppag_approved(&mvm->fwrt)))
1069 return 0;
1070
1071 return iwl_mvm_ppag_send_cmd(mvm);
1072 }
1073
iwl_mvm_tas_init(struct iwl_mvm * mvm)1074 static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
1075 {
1076 u32 cmd_id = WIDE_ID(REGULATORY_AND_NVM_GROUP, TAS_CONFIG);
1077 int fw_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
1078 IWL_FW_CMD_VER_UNKNOWN);
1079 struct iwl_tas_selection_data selection_data = {};
1080 struct iwl_tas_config_cmd_v2_v4 cmd_v2_v4 = {};
1081 struct iwl_tas_config_cmd cmd_v5 = {};
1082 struct iwl_tas_data data = {};
1083 void *cmd_data = &cmd_v2_v4;
1084 int cmd_size;
1085 int ret;
1086
1087 BUILD_BUG_ON(ARRAY_SIZE(data.block_list_array) !=
1088 IWL_WTAS_BLACK_LIST_MAX);
1089 BUILD_BUG_ON(ARRAY_SIZE(cmd_v2_v4.common.block_list_array) !=
1090 IWL_WTAS_BLACK_LIST_MAX);
1091 BUILD_BUG_ON(ARRAY_SIZE(cmd_v5.block_list_array) !=
1092 IWL_WTAS_BLACK_LIST_MAX);
1093
1094 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) {
1095 IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n");
1096 return;
1097 }
1098
1099 ret = iwl_bios_get_tas_table(&mvm->fwrt, &data);
1100 if (ret < 0) {
1101 IWL_DEBUG_RADIO(mvm,
1102 "TAS table invalid or unavailable. (%d)\n",
1103 ret);
1104 return;
1105 }
1106
1107 if (ret == 0 && fw_ver < 5)
1108 return;
1109
1110 if (!iwl_is_tas_approved()) {
1111 IWL_DEBUG_RADIO(mvm,
1112 "System vendor '%s' is not in the approved list, disabling TAS in US and Canada.\n",
1113 dmi_get_system_info(DMI_SYS_VENDOR) ?: "<unknown>");
1114 if ((!iwl_add_mcc_to_tas_block_list(data.block_list_array,
1115 &data.block_list_size,
1116 IWL_MCC_US)) ||
1117 (!iwl_add_mcc_to_tas_block_list(data.block_list_array,
1118 &data.block_list_size,
1119 IWL_MCC_CANADA))) {
1120 IWL_DEBUG_RADIO(mvm,
1121 "Unable to add US/Canada to TAS block list, disabling TAS\n");
1122 return;
1123 }
1124 } else {
1125 IWL_DEBUG_RADIO(mvm,
1126 "System vendor '%s' is in the approved list.\n",
1127 dmi_get_system_info(DMI_SYS_VENDOR) ?: "<unknown>");
1128 }
1129
1130 if (fw_ver < 5) {
1131 selection_data = iwl_parse_tas_selection(data.tas_selection,
1132 data.table_revision);
1133 cmd_v2_v4.common.block_list_size =
1134 cpu_to_le32(data.block_list_size);
1135 for (u8 i = 0; i < data.block_list_size; i++)
1136 cmd_v2_v4.common.block_list_array[i] =
1137 cpu_to_le32(data.block_list_array[i]);
1138 }
1139
1140 if (fw_ver == 5) {
1141 cmd_size = sizeof(cmd_v5);
1142 cmd_data = &cmd_v5;
1143 cmd_v5.block_list_size = cpu_to_le16(data.block_list_size);
1144 for (u16 i = 0; i < data.block_list_size; i++)
1145 cmd_v5.block_list_array[i] =
1146 cpu_to_le16(data.block_list_array[i]);
1147 cmd_v5.tas_config_info.table_source = data.table_source;
1148 cmd_v5.tas_config_info.table_revision = data.table_revision;
1149 cmd_v5.tas_config_info.value = cpu_to_le32(data.tas_selection);
1150 } else if (fw_ver == 4) {
1151 cmd_size = sizeof(cmd_v2_v4.common) + sizeof(cmd_v2_v4.v4);
1152 cmd_v2_v4.v4.override_tas_iec = selection_data.override_tas_iec;
1153 cmd_v2_v4.v4.enable_tas_iec = selection_data.enable_tas_iec;
1154 cmd_v2_v4.v4.usa_tas_uhb_allowed =
1155 selection_data.usa_tas_uhb_allowed;
1156 if (fw_has_capa(&mvm->fw->ucode_capa,
1157 IWL_UCODE_TLV_CAPA_UHB_CANADA_TAS_SUPPORT) &&
1158 selection_data.canada_tas_uhb_allowed)
1159 cmd_v2_v4.v4.uhb_allowed_flags = TAS_UHB_ALLOWED_CANADA;
1160 } else if (fw_ver == 3) {
1161 cmd_size = sizeof(cmd_v2_v4.common) + sizeof(cmd_v2_v4.v3);
1162 cmd_v2_v4.v3.override_tas_iec =
1163 cpu_to_le16(selection_data.override_tas_iec);
1164 cmd_v2_v4.v3.enable_tas_iec =
1165 cpu_to_le16(selection_data.enable_tas_iec);
1166 } else if (fw_ver == 2) {
1167 cmd_size = sizeof(cmd_v2_v4.common);
1168 } else {
1169 return;
1170 }
1171
1172 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, cmd_data);
1173 if (ret < 0)
1174 IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret);
1175 }
1176
iwl_mvm_lari_cfg(struct iwl_mvm * mvm)1177 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1178 {
1179 struct iwl_lari_config_change_cmd cmd;
1180 size_t cmd_size;
1181 int ret;
1182
1183 ret = iwl_fill_lari_config(&mvm->fwrt, &cmd, &cmd_size);
1184 if (!ret) {
1185 ret = iwl_mvm_send_cmd_pdu(mvm,
1186 WIDE_ID(REGULATORY_AND_NVM_GROUP,
1187 LARI_CONFIG_CHANGE),
1188 0, cmd_size, &cmd);
1189 if (ret < 0)
1190 IWL_DEBUG_RADIO(mvm,
1191 "Failed to send LARI_CONFIG_CHANGE (%d)\n",
1192 ret);
1193 }
1194 }
1195
iwl_mvm_get_bios_tables(struct iwl_mvm * mvm)1196 void iwl_mvm_get_bios_tables(struct iwl_mvm *mvm)
1197 {
1198 int ret;
1199
1200 iwl_acpi_get_guid_lock_status(&mvm->fwrt);
1201
1202 /* read PPAG table */
1203 ret = iwl_bios_get_ppag_table(&mvm->fwrt);
1204 if (ret < 0) {
1205 IWL_DEBUG_RADIO(mvm,
1206 "PPAG BIOS table invalid or unavailable. (%d)\n",
1207 ret);
1208 }
1209
1210 /* read SAR tables */
1211 ret = iwl_bios_get_wrds_table(&mvm->fwrt);
1212 if (ret < 0) {
1213 IWL_DEBUG_RADIO(mvm,
1214 "WRDS SAR BIOS table invalid or unavailable. (%d)\n",
1215 ret);
1216 /*
1217 * If not available, don't fail and don't bother with EWRD and
1218 * WGDS */
1219
1220 if (!iwl_bios_get_wgds_table(&mvm->fwrt)) {
1221 /*
1222 * If basic SAR is not available, we check for WGDS,
1223 * which should *not* be available either. If it is
1224 * available, issue an error, because we can't use SAR
1225 * Geo without basic SAR.
1226 */
1227 IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n");
1228 }
1229
1230 } else {
1231 ret = iwl_bios_get_ewrd_table(&mvm->fwrt);
1232 /* if EWRD is not available, we can still use
1233 * WRDS, so don't fail */
1234 if (ret < 0)
1235 IWL_DEBUG_RADIO(mvm,
1236 "EWRD SAR BIOS table invalid or unavailable. (%d)\n",
1237 ret);
1238
1239 /* read geo SAR table */
1240 if (iwl_sar_geo_support(&mvm->fwrt)) {
1241 ret = iwl_bios_get_wgds_table(&mvm->fwrt);
1242 if (ret < 0)
1243 IWL_DEBUG_RADIO(mvm,
1244 "Geo SAR BIOS table invalid or unavailable. (%d)\n",
1245 ret);
1246 /* we don't fail if the table is not available */
1247 }
1248 }
1249
1250 iwl_acpi_get_phy_filters(&mvm->fwrt);
1251
1252 if (iwl_bios_get_eckv(&mvm->fwrt, &mvm->ext_clock_valid))
1253 IWL_DEBUG_RADIO(mvm, "ECKV table doesn't exist in BIOS\n");
1254 }
1255
iwl_mvm_disconnect_iterator(void * data,u8 * mac,struct ieee80211_vif * vif)1256 static void iwl_mvm_disconnect_iterator(void *data, u8 *mac,
1257 struct ieee80211_vif *vif)
1258 {
1259 if (vif->type == NL80211_IFTYPE_STATION)
1260 ieee80211_hw_restart_disconnect(vif);
1261 }
1262
iwl_mvm_send_recovery_cmd(struct iwl_mvm * mvm,u32 flags)1263 void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags)
1264 {
1265 u32 error_log_size = mvm->fw->ucode_capa.error_log_size;
1266 u32 status = 0;
1267 int ret;
1268
1269 struct iwl_fw_error_recovery_cmd recovery_cmd = {
1270 .flags = cpu_to_le32(flags),
1271 .buf_size = 0,
1272 };
1273 struct iwl_host_cmd host_cmd = {
1274 .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD),
1275 .data = {&recovery_cmd, },
1276 .len = {sizeof(recovery_cmd), },
1277 };
1278
1279 /* no error log was defined in TLV */
1280 if (!error_log_size)
1281 return;
1282
1283 if (flags & ERROR_RECOVERY_UPDATE_DB) {
1284 /* no buf was allocated while HW reset */
1285 if (!mvm->error_recovery_buf)
1286 return;
1287
1288 host_cmd.data[1] = mvm->error_recovery_buf;
1289 host_cmd.len[1] = error_log_size;
1290 host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
1291 recovery_cmd.buf_size = cpu_to_le32(error_log_size);
1292 }
1293
1294 ret = iwl_mvm_send_cmd_status(mvm, &host_cmd, &status);
1295 kfree(mvm->error_recovery_buf);
1296 mvm->error_recovery_buf = NULL;
1297
1298 if (ret) {
1299 IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret);
1300 return;
1301 }
1302
1303 /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */
1304 if (flags & ERROR_RECOVERY_UPDATE_DB) {
1305 if (status) {
1306 IWL_ERR(mvm,
1307 "Failed to send recovery cmd blob was invalid %d\n",
1308 status);
1309
1310 ieee80211_iterate_interfaces(mvm->hw, 0,
1311 iwl_mvm_disconnect_iterator,
1312 mvm);
1313 }
1314 }
1315 }
1316
iwl_mvm_sar_init(struct iwl_mvm * mvm)1317 static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
1318 {
1319 return iwl_mvm_sar_select_profile(mvm, 1, 1);
1320 }
1321
iwl_mvm_load_rt_fw(struct iwl_mvm * mvm)1322 static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
1323 {
1324 int ret;
1325
1326 if (iwl_mvm_has_unified_ucode(mvm))
1327 return iwl_run_unified_mvm_ucode(mvm);
1328
1329 ret = iwl_run_init_mvm_ucode(mvm);
1330
1331 if (ret) {
1332 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
1333 return ret;
1334 }
1335
1336 iwl_fw_dbg_stop_sync(&mvm->fwrt);
1337 iwl_trans_stop_device(mvm->trans);
1338 ret = iwl_trans_start_hw(mvm->trans);
1339 if (ret)
1340 return ret;
1341
1342 mvm->rfkill_safe_init_done = false;
1343 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
1344 if (ret)
1345 return ret;
1346
1347 mvm->rfkill_safe_init_done = true;
1348
1349 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
1350 NULL);
1351
1352 return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
1353 }
1354
iwl_mvm_up(struct iwl_mvm * mvm)1355 int iwl_mvm_up(struct iwl_mvm *mvm)
1356 {
1357 int ret, i;
1358 struct ieee80211_supported_band *sband = NULL;
1359
1360 lockdep_assert_wiphy(mvm->hw->wiphy);
1361 lockdep_assert_held(&mvm->mutex);
1362
1363 ret = iwl_trans_start_hw(mvm->trans);
1364 if (ret)
1365 return ret;
1366
1367 ret = iwl_mvm_load_rt_fw(mvm);
1368 if (ret) {
1369 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
1370 if (ret != -ERFKILL && !mvm->fw_product_reset)
1371 iwl_fw_dbg_error_collect(&mvm->fwrt,
1372 FW_DBG_TRIGGER_DRIVER);
1373 goto error;
1374 }
1375
1376 /* FW loaded successfully */
1377 mvm->fw_product_reset = false;
1378
1379 iwl_fw_disable_dbg_asserts(&mvm->fwrt);
1380 iwl_get_shared_mem_conf(&mvm->fwrt);
1381
1382 ret = iwl_mvm_sf_update(mvm, NULL, false);
1383 if (ret)
1384 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1385
1386 if (!iwl_trans_dbg_ini_valid(mvm->trans)) {
1387 mvm->fwrt.dump.conf = FW_DBG_INVALID;
1388 /* if we have a destination, assume EARLY START */
1389 if (mvm->fw->dbg.dest_tlv)
1390 mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
1391 iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
1392 }
1393
1394 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1395 if (ret)
1396 goto error;
1397
1398 if (!iwl_mvm_has_unified_ucode(mvm)) {
1399 /* Send phy db control command and then phy db calibration */
1400 ret = iwl_send_phy_db_data(mvm->phy_db);
1401 if (ret)
1402 goto error;
1403 ret = iwl_send_phy_cfg_cmd(mvm);
1404 if (ret)
1405 goto error;
1406 }
1407
1408 ret = iwl_mvm_send_bt_init_conf(mvm);
1409 if (ret)
1410 goto error;
1411
1412 if (fw_has_capa(&mvm->fw->ucode_capa,
1413 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) {
1414 ret = iwl_set_soc_latency(&mvm->fwrt);
1415 if (ret)
1416 goto error;
1417 }
1418
1419 iwl_mvm_lari_cfg(mvm);
1420
1421 /* Init RSS configuration */
1422 ret = iwl_configure_rxq(&mvm->fwrt);
1423 if (ret)
1424 goto error;
1425
1426 if (iwl_mvm_has_new_rx_api(mvm)) {
1427 ret = iwl_send_rss_cfg_cmd(mvm);
1428 if (ret) {
1429 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
1430 ret);
1431 goto error;
1432 }
1433 }
1434
1435 /* init the fw <-> mac80211 STA mapping */
1436 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) {
1437 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1438 RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL);
1439 }
1440
1441 mvm->tdls_cs.peer.sta_id = IWL_INVALID_STA;
1442
1443 /* reset quota debouncing buffer - 0xff will yield invalid data */
1444 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1445
1446 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) {
1447 ret = iwl_mvm_send_dqa_cmd(mvm);
1448 if (ret)
1449 goto error;
1450 }
1451
1452 /*
1453 * Add auxiliary station for scanning.
1454 * Newer versions of this command implies that the fw uses
1455 * internal aux station for all aux activities that don't
1456 * requires a dedicated data queue.
1457 */
1458 if (!iwl_mvm_has_new_station_api(mvm->fw)) {
1459 /*
1460 * In old version the aux station uses mac id like other
1461 * station and not lmac id
1462 */
1463 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1464 if (ret)
1465 goto error;
1466 }
1467
1468 /* Add all the PHY contexts */
1469 i = 0;
1470 while (!sband && i < NUM_NL80211_BANDS)
1471 sband = mvm->hw->wiphy->bands[i++];
1472
1473 if (WARN_ON_ONCE(!sband)) {
1474 ret = -ENODEV;
1475 goto error;
1476 }
1477
1478 if (iwl_mvm_is_tt_in_fw(mvm)) {
1479 /* in order to give the responsibility of ct-kill and
1480 * TX backoff to FW we need to send empty temperature reporting
1481 * cmd during init time
1482 */
1483 iwl_mvm_send_temp_report_ths_cmd(mvm);
1484 } else {
1485 /* Initialize tx backoffs to the minimal possible */
1486 iwl_mvm_tt_tx_backoff(mvm, 0);
1487 }
1488
1489 #ifdef CONFIG_THERMAL
1490 /* TODO: read the budget from BIOS / Platform NVM */
1491
1492 /*
1493 * In case there is no budget from BIOS / Platform NVM the default
1494 * budget should be 2000mW (cooling state 0).
1495 */
1496 if (iwl_mvm_is_ctdp_supported(mvm)) {
1497 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
1498 mvm->cooling_dev.cur_state);
1499 if (ret)
1500 goto error;
1501 }
1502 #endif
1503
1504 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2))
1505 WARN_ON(iwl_mvm_config_ltr(mvm));
1506
1507 ret = iwl_mvm_power_update_device(mvm);
1508 if (ret)
1509 goto error;
1510
1511 /*
1512 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1513 * anyway, so don't init MCC.
1514 */
1515 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1516 ret = iwl_mvm_init_mcc(mvm);
1517 if (ret)
1518 goto error;
1519 }
1520
1521 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
1522 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
1523 mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
1524 ret = iwl_mvm_config_scan(mvm);
1525 if (ret)
1526 goto error;
1527 }
1528
1529 if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) {
1530 iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB);
1531
1532 if (mvm->time_sync.active)
1533 iwl_mvm_time_sync_config(mvm, mvm->time_sync.peer_addr,
1534 IWL_TIME_SYNC_PROTOCOL_TM |
1535 IWL_TIME_SYNC_PROTOCOL_FTM);
1536 }
1537
1538 if (!mvm->ptp_data.ptp_clock)
1539 iwl_mvm_ptp_init(mvm);
1540
1541 ret = iwl_mvm_ppag_init(mvm);
1542 if (ret)
1543 goto error;
1544
1545 ret = iwl_mvm_sar_init(mvm);
1546 if (ret == 0)
1547 ret = iwl_mvm_sar_geo_init(mvm);
1548 if (ret < 0)
1549 goto error;
1550
1551 ret = iwl_mvm_sgom_init(mvm);
1552 if (ret)
1553 goto error;
1554
1555 iwl_mvm_tas_init(mvm);
1556 iwl_mvm_leds_sync(mvm);
1557 iwl_mvm_uats_init(mvm);
1558
1559 if (iwl_rfi_supported(mvm)) {
1560 if (iwl_rfi_is_enabled_in_bios(&mvm->fwrt))
1561 iwl_rfi_send_config_cmd(mvm, NULL);
1562 }
1563
1564 iwl_mvm_mei_device_state(mvm, true);
1565
1566 IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
1567 return 0;
1568 error:
1569 iwl_mvm_stop_device(mvm);
1570 return ret;
1571 }
1572
iwl_mvm_load_d3_fw(struct iwl_mvm * mvm)1573 int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1574 {
1575 int ret, i;
1576
1577 lockdep_assert_wiphy(mvm->hw->wiphy);
1578 lockdep_assert_held(&mvm->mutex);
1579
1580 ret = iwl_trans_start_hw(mvm->trans);
1581 if (ret)
1582 return ret;
1583
1584 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1585 if (ret) {
1586 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1587 goto error;
1588 }
1589
1590 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1591 if (ret)
1592 goto error;
1593
1594 /* Send phy db control command and then phy db calibration*/
1595 ret = iwl_send_phy_db_data(mvm->phy_db);
1596 if (ret)
1597 goto error;
1598
1599 ret = iwl_send_phy_cfg_cmd(mvm);
1600 if (ret)
1601 goto error;
1602
1603 /* init the fw <-> mac80211 STA mapping */
1604 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) {
1605 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1606 RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL);
1607 }
1608
1609 if (!iwl_mvm_has_new_station_api(mvm->fw)) {
1610 /*
1611 * Add auxiliary station for scanning.
1612 * Newer versions of this command implies that the fw uses
1613 * internal aux station for all aux activities that don't
1614 * requires a dedicated data queue.
1615 * In old version the aux station uses mac id like other
1616 * station and not lmac id
1617 */
1618 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1619 if (ret)
1620 goto error;
1621 }
1622
1623 return 0;
1624 error:
1625 iwl_mvm_stop_device(mvm);
1626 return ret;
1627 }
1628
iwl_mvm_rx_mfuart_notif(struct iwl_mvm * mvm,struct iwl_rx_cmd_buffer * rxb)1629 void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1630 struct iwl_rx_cmd_buffer *rxb)
1631 {
1632 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1633 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1634
1635 IWL_DEBUG_INFO(mvm,
1636 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1637 le32_to_cpu(mfuart_notif->installed_ver),
1638 le32_to_cpu(mfuart_notif->external_ver),
1639 le32_to_cpu(mfuart_notif->status),
1640 le32_to_cpu(mfuart_notif->duration));
1641
1642 if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
1643 IWL_DEBUG_INFO(mvm,
1644 "MFUART: image size: 0x%08x\n",
1645 le32_to_cpu(mfuart_notif->image_size));
1646 }
1647