xref: /linux/drivers/s390/net/ism_drv.c (revision fab183d632628381b466a41479489541ac0e29a0)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * ISM driver for s390.
4  *
5  * Copyright IBM Corp. 2018
6  */
7 #define pr_fmt(fmt) "ism: " fmt
8 
9 #include <linux/export.h>
10 #include <linux/module.h>
11 #include <linux/types.h>
12 #include <linux/interrupt.h>
13 #include <linux/device.h>
14 #include <linux/err.h>
15 #include <linux/ctype.h>
16 #include <linux/processor.h>
17 
18 #include "ism.h"
19 
20 MODULE_DESCRIPTION("ISM driver for s390");
21 MODULE_LICENSE("GPL");
22 
23 #define DRV_NAME "ism"
24 
25 static const struct pci_device_id ism_device_table[] = {
26 	{ PCI_VDEVICE(IBM, PCI_DEVICE_ID_IBM_ISM) },
27 	{ }
28 };
29 MODULE_DEVICE_TABLE(pci, ism_device_table);
30 
31 static debug_info_t *ism_debug_info;
32 
ism_cmd(struct ism_dev * ism,void * cmd)33 static int ism_cmd(struct ism_dev *ism, void *cmd)
34 {
35 	struct ism_req_hdr *req = cmd;
36 	struct ism_resp_hdr *resp = cmd;
37 
38 	spin_lock(&ism->cmd_lock);
39 	__ism_write_cmd(ism, req + 1, sizeof(*req), req->len - sizeof(*req));
40 	__ism_write_cmd(ism, req, 0, sizeof(*req));
41 
42 	WRITE_ONCE(resp->ret, ISM_ERROR);
43 
44 	__ism_read_cmd(ism, resp, 0, sizeof(*resp));
45 	if (resp->ret) {
46 		debug_text_event(ism_debug_info, 0, "cmd failure");
47 		debug_event(ism_debug_info, 0, resp, sizeof(*resp));
48 		goto out;
49 	}
50 	__ism_read_cmd(ism, resp + 1, sizeof(*resp), resp->len - sizeof(*resp));
51 out:
52 	spin_unlock(&ism->cmd_lock);
53 	return resp->ret;
54 }
55 
ism_cmd_simple(struct ism_dev * ism,u32 cmd_code)56 static int ism_cmd_simple(struct ism_dev *ism, u32 cmd_code)
57 {
58 	union ism_cmd_simple cmd;
59 
60 	memset(&cmd, 0, sizeof(cmd));
61 	cmd.request.hdr.cmd = cmd_code;
62 	cmd.request.hdr.len = sizeof(cmd.request);
63 
64 	return ism_cmd(ism, &cmd);
65 }
66 
query_info(struct ism_dev * ism)67 static int query_info(struct ism_dev *ism)
68 {
69 	union ism_qi cmd;
70 
71 	memset(&cmd, 0, sizeof(cmd));
72 	cmd.request.hdr.cmd = ISM_QUERY_INFO;
73 	cmd.request.hdr.len = sizeof(cmd.request);
74 
75 	if (ism_cmd(ism, &cmd))
76 		goto out;
77 
78 	debug_text_event(ism_debug_info, 3, "query info");
79 	debug_event(ism_debug_info, 3, &cmd.response, sizeof(cmd.response));
80 out:
81 	return 0;
82 }
83 
register_sba(struct ism_dev * ism)84 static int register_sba(struct ism_dev *ism)
85 {
86 	union ism_reg_sba cmd;
87 	dma_addr_t dma_handle;
88 	struct ism_sba *sba;
89 
90 	sba = dma_alloc_coherent(&ism->pdev->dev, PAGE_SIZE, &dma_handle,
91 				 GFP_KERNEL);
92 	if (!sba)
93 		return -ENOMEM;
94 
95 	memset(&cmd, 0, sizeof(cmd));
96 	cmd.request.hdr.cmd = ISM_REG_SBA;
97 	cmd.request.hdr.len = sizeof(cmd.request);
98 	cmd.request.sba = dma_handle;
99 
100 	if (ism_cmd(ism, &cmd)) {
101 		dma_free_coherent(&ism->pdev->dev, PAGE_SIZE, sba, dma_handle);
102 		return -EIO;
103 	}
104 
105 	ism->sba = sba;
106 	ism->sba_dma_addr = dma_handle;
107 
108 	return 0;
109 }
110 
register_ieq(struct ism_dev * ism)111 static int register_ieq(struct ism_dev *ism)
112 {
113 	union ism_reg_ieq cmd;
114 	dma_addr_t dma_handle;
115 	struct ism_eq *ieq;
116 
117 	ieq = dma_alloc_coherent(&ism->pdev->dev, PAGE_SIZE, &dma_handle,
118 				 GFP_KERNEL);
119 	if (!ieq)
120 		return -ENOMEM;
121 
122 	memset(&cmd, 0, sizeof(cmd));
123 	cmd.request.hdr.cmd = ISM_REG_IEQ;
124 	cmd.request.hdr.len = sizeof(cmd.request);
125 	cmd.request.ieq = dma_handle;
126 	cmd.request.len = sizeof(*ieq);
127 
128 	if (ism_cmd(ism, &cmd)) {
129 		dma_free_coherent(&ism->pdev->dev, PAGE_SIZE, ieq, dma_handle);
130 		return -EIO;
131 	}
132 
133 	ism->ieq = ieq;
134 	ism->ieq_idx = -1;
135 	ism->ieq_dma_addr = dma_handle;
136 
137 	return 0;
138 }
139 
unregister_sba(struct ism_dev * ism)140 static int unregister_sba(struct ism_dev *ism)
141 {
142 	int ret;
143 
144 	if (!ism->sba)
145 		return 0;
146 
147 	ret = ism_cmd_simple(ism, ISM_UNREG_SBA);
148 	if (ret && ret != ISM_ERROR)
149 		return -EIO;
150 
151 	return 0;
152 }
153 
ism_free_sba(struct ism_dev * ism)154 static void ism_free_sba(struct ism_dev *ism)
155 {
156 	dma_free_coherent(&ism->pdev->dev, PAGE_SIZE,
157 			  ism->sba, ism->sba_dma_addr);
158 
159 	ism->sba = NULL;
160 	ism->sba_dma_addr = 0;
161 }
162 
unregister_ieq(struct ism_dev * ism)163 static int unregister_ieq(struct ism_dev *ism)
164 {
165 	int ret;
166 
167 	if (!ism->ieq)
168 		return 0;
169 
170 	ret = ism_cmd_simple(ism, ISM_UNREG_IEQ);
171 	if (ret && ret != ISM_ERROR)
172 		return -EIO;
173 
174 	return 0;
175 }
176 
ism_free_ieq(struct ism_dev * ism)177 static void ism_free_ieq(struct ism_dev *ism)
178 {
179 	dma_free_coherent(&ism->pdev->dev, PAGE_SIZE,
180 			  ism->ieq, ism->ieq_dma_addr);
181 
182 	ism->ieq = NULL;
183 	ism->ieq_dma_addr = 0;
184 }
185 
ism_read_local_gid(struct dibs_dev * dibs)186 static int ism_read_local_gid(struct dibs_dev *dibs)
187 {
188 	struct ism_dev *ism = dibs->drv_priv;
189 	union ism_read_gid cmd;
190 	int ret;
191 
192 	memset(&cmd, 0, sizeof(cmd));
193 	cmd.request.hdr.cmd = ISM_READ_GID;
194 	cmd.request.hdr.len = sizeof(cmd.request);
195 
196 	ret = ism_cmd(ism, &cmd);
197 	if (ret)
198 		goto out;
199 
200 	memset(&dibs->gid, 0, sizeof(dibs->gid));
201 	memcpy(&dibs->gid, &cmd.response.gid, sizeof(cmd.response.gid));
202 out:
203 	return ret;
204 }
205 
ism_query_rgid(struct dibs_dev * dibs,const uuid_t * rgid,u32 vid_valid,u32 vid)206 static int ism_query_rgid(struct dibs_dev *dibs, const uuid_t *rgid,
207 			  u32 vid_valid, u32 vid)
208 {
209 	struct ism_dev *ism = dibs->drv_priv;
210 	union ism_query_rgid cmd;
211 
212 	memset(&cmd, 0, sizeof(cmd));
213 	cmd.request.hdr.cmd = ISM_QUERY_RGID;
214 	cmd.request.hdr.len = sizeof(cmd.request);
215 
216 	memcpy(&cmd.request.rgid, rgid, sizeof(cmd.request.rgid));
217 	cmd.request.vlan_valid = vid_valid;
218 	cmd.request.vlan_id = vid;
219 
220 	return ism_cmd(ism, &cmd);
221 }
222 
ism_max_dmbs(void)223 static int ism_max_dmbs(void)
224 {
225 	return ISM_NR_DMBS;
226 }
227 
ism_free_dmb(struct ism_dev * ism,struct dibs_dmb * dmb)228 static void ism_free_dmb(struct ism_dev *ism, struct dibs_dmb *dmb)
229 {
230 	clear_bit(dmb->idx, ism->sba_bitmap);
231 	dma_unmap_page(&ism->pdev->dev, dmb->dma_addr, dmb->dmb_len,
232 		       DMA_FROM_DEVICE);
233 	folio_put(virt_to_folio(dmb->cpu_addr));
234 }
235 
ism_alloc_dmb(struct ism_dev * ism,struct dibs_dmb * dmb)236 static int ism_alloc_dmb(struct ism_dev *ism, struct dibs_dmb *dmb)
237 {
238 	struct folio *folio;
239 	unsigned long bit;
240 	int rc;
241 
242 	if (PAGE_ALIGN(dmb->dmb_len) > dma_get_max_seg_size(&ism->pdev->dev))
243 		return -EINVAL;
244 
245 	if (!dmb->idx) {
246 		bit = find_next_zero_bit(ism->sba_bitmap, ISM_NR_DMBS,
247 					 ISM_DMB_BIT_OFFSET);
248 		if (bit == ISM_NR_DMBS)
249 			return -ENOSPC;
250 
251 		dmb->idx = bit;
252 	}
253 	if (dmb->idx < ISM_DMB_BIT_OFFSET ||
254 	    test_and_set_bit(dmb->idx, ism->sba_bitmap))
255 		return -EINVAL;
256 
257 	folio = folio_alloc(GFP_KERNEL | __GFP_NOWARN | __GFP_NOMEMALLOC |
258 			    __GFP_NORETRY, get_order(dmb->dmb_len));
259 
260 	if (!folio) {
261 		rc = -ENOMEM;
262 		goto out_bit;
263 	}
264 
265 	dmb->cpu_addr = folio_address(folio);
266 	dmb->dma_addr = dma_map_page(&ism->pdev->dev,
267 				     virt_to_page(dmb->cpu_addr), 0,
268 				     dmb->dmb_len, DMA_FROM_DEVICE);
269 	if (dma_mapping_error(&ism->pdev->dev, dmb->dma_addr)) {
270 		rc = -ENOMEM;
271 		goto out_free;
272 	}
273 
274 	return 0;
275 
276 out_free:
277 	kfree(dmb->cpu_addr);
278 out_bit:
279 	clear_bit(dmb->idx, ism->sba_bitmap);
280 	return rc;
281 }
282 
ism_register_dmb(struct dibs_dev * dibs,struct dibs_dmb * dmb,struct dibs_client * client)283 static int ism_register_dmb(struct dibs_dev *dibs, struct dibs_dmb *dmb,
284 			    struct dibs_client *client)
285 {
286 	struct ism_dev *ism = dibs->drv_priv;
287 	union ism_reg_dmb cmd;
288 	unsigned long flags;
289 	int ret;
290 
291 	ret = ism_alloc_dmb(ism, dmb);
292 	if (ret)
293 		goto out;
294 
295 	memset(&cmd, 0, sizeof(cmd));
296 	cmd.request.hdr.cmd = ISM_REG_DMB;
297 	cmd.request.hdr.len = sizeof(cmd.request);
298 
299 	cmd.request.dmb = dmb->dma_addr;
300 	cmd.request.dmb_len = dmb->dmb_len;
301 	cmd.request.sba_idx = dmb->idx;
302 	cmd.request.vlan_valid = dmb->vlan_valid;
303 	cmd.request.vlan_id = dmb->vlan_id;
304 	memcpy(&cmd.request.rgid, &dmb->rgid, sizeof(u64));
305 
306 	ret = ism_cmd(ism, &cmd);
307 	if (ret) {
308 		ism_free_dmb(ism, dmb);
309 		goto out;
310 	}
311 	dmb->dmb_tok = cmd.response.dmb_tok;
312 	spin_lock_irqsave(&dibs->lock, flags);
313 	dibs->dmb_clientid_arr[dmb->idx - ISM_DMB_BIT_OFFSET] = client->id;
314 	spin_unlock_irqrestore(&dibs->lock, flags);
315 out:
316 	return ret;
317 }
318 
ism_unregister_dmb(struct dibs_dev * dibs,struct dibs_dmb * dmb)319 static int ism_unregister_dmb(struct dibs_dev *dibs, struct dibs_dmb *dmb)
320 {
321 	struct ism_dev *ism = dibs->drv_priv;
322 	union ism_unreg_dmb cmd;
323 	unsigned long flags;
324 	int ret;
325 
326 	memset(&cmd, 0, sizeof(cmd));
327 	cmd.request.hdr.cmd = ISM_UNREG_DMB;
328 	cmd.request.hdr.len = sizeof(cmd.request);
329 
330 	cmd.request.dmb_tok = dmb->dmb_tok;
331 
332 	spin_lock_irqsave(&dibs->lock, flags);
333 	dibs->dmb_clientid_arr[dmb->idx - ISM_DMB_BIT_OFFSET] = NO_DIBS_CLIENT;
334 	spin_unlock_irqrestore(&dibs->lock, flags);
335 
336 	ret = ism_cmd(ism, &cmd);
337 	if (ret && ret != ISM_ERROR)
338 		goto out;
339 
340 	ism_free_dmb(ism, dmb);
341 out:
342 	return ret;
343 }
344 
ism_add_vlan_id(struct dibs_dev * dibs,u64 vlan_id)345 static int ism_add_vlan_id(struct dibs_dev *dibs, u64 vlan_id)
346 {
347 	struct ism_dev *ism = dibs->drv_priv;
348 	union ism_set_vlan_id cmd;
349 
350 	memset(&cmd, 0, sizeof(cmd));
351 	cmd.request.hdr.cmd = ISM_ADD_VLAN_ID;
352 	cmd.request.hdr.len = sizeof(cmd.request);
353 
354 	cmd.request.vlan_id = vlan_id;
355 
356 	return ism_cmd(ism, &cmd);
357 }
358 
ism_del_vlan_id(struct dibs_dev * dibs,u64 vlan_id)359 static int ism_del_vlan_id(struct dibs_dev *dibs, u64 vlan_id)
360 {
361 	struct ism_dev *ism = dibs->drv_priv;
362 	union ism_set_vlan_id cmd;
363 
364 	memset(&cmd, 0, sizeof(cmd));
365 	cmd.request.hdr.cmd = ISM_DEL_VLAN_ID;
366 	cmd.request.hdr.len = sizeof(cmd.request);
367 
368 	cmd.request.vlan_id = vlan_id;
369 
370 	return ism_cmd(ism, &cmd);
371 }
372 
ism_signal_ieq(struct dibs_dev * dibs,const uuid_t * rgid,u32 trigger_irq,u32 event_code,u64 info)373 static int ism_signal_ieq(struct dibs_dev *dibs, const uuid_t *rgid,
374 			  u32 trigger_irq, u32 event_code, u64 info)
375 {
376 	struct ism_dev *ism = dibs->drv_priv;
377 	union ism_sig_ieq cmd;
378 
379 	memset(&cmd, 0, sizeof(cmd));
380 	cmd.request.hdr.cmd = ISM_SIGNAL_IEQ;
381 	cmd.request.hdr.len = sizeof(cmd.request);
382 
383 	memcpy(&cmd.request.rgid, rgid, sizeof(cmd.request.rgid));
384 	cmd.request.trigger_irq = trigger_irq;
385 	cmd.request.event_code = event_code;
386 	cmd.request.info = info;
387 
388 	return ism_cmd(ism, &cmd);
389 }
390 
max_bytes(unsigned int start,unsigned int len,unsigned int boundary)391 static unsigned int max_bytes(unsigned int start, unsigned int len,
392 			      unsigned int boundary)
393 {
394 	return min(boundary - (start & (boundary - 1)), len);
395 }
396 
ism_move(struct dibs_dev * dibs,u64 dmb_tok,unsigned int idx,bool sf,unsigned int offset,void * data,unsigned int size)397 static int ism_move(struct dibs_dev *dibs, u64 dmb_tok, unsigned int idx,
398 		    bool sf, unsigned int offset, void *data,
399 		    unsigned int size)
400 {
401 	struct ism_dev *ism = dibs->drv_priv;
402 	unsigned int bytes;
403 	u64 dmb_req;
404 	int ret;
405 
406 	while (size) {
407 		bytes = max_bytes(offset, size, PAGE_SIZE);
408 		dmb_req = ISM_CREATE_REQ(dmb_tok, idx, size == bytes ? sf : 0,
409 					 offset);
410 
411 		ret = __ism_move(ism, dmb_req, data, bytes);
412 		if (ret)
413 			return ret;
414 
415 		size -= bytes;
416 		data += bytes;
417 		offset += bytes;
418 	}
419 
420 	return 0;
421 }
422 
ism_get_chid(struct dibs_dev * dibs)423 static u16 ism_get_chid(struct dibs_dev *dibs)
424 {
425 	struct ism_dev *ism = dibs->drv_priv;
426 
427 	if (!ism || !ism->pdev)
428 		return 0;
429 
430 	return to_zpci(ism->pdev)->pchid;
431 }
432 
ism_match_event_type(u32 s390_event_type)433 static int ism_match_event_type(u32 s390_event_type)
434 {
435 	switch (s390_event_type) {
436 	case ISM_EVENT_BUF:
437 		return DIBS_BUF_EVENT;
438 	case ISM_EVENT_DEV:
439 		return DIBS_DEV_EVENT;
440 	case ISM_EVENT_SWR:
441 		return DIBS_SW_EVENT;
442 	default:
443 		return DIBS_OTHER_TYPE;
444 	}
445 }
446 
ism_match_event_subtype(u32 s390_event_subtype)447 static int ism_match_event_subtype(u32 s390_event_subtype)
448 {
449 	switch (s390_event_subtype) {
450 	case ISM_BUF_DMB_UNREGISTERED:
451 		return DIBS_BUF_UNREGISTERED;
452 	case ISM_DEV_GID_DISABLED:
453 		return DIBS_DEV_DISABLED;
454 	case ISM_DEV_GID_ERR_STATE:
455 		return DIBS_DEV_ERR_STATE;
456 	default:
457 		return DIBS_OTHER_SUBTYPE;
458 	}
459 }
460 
ism_handle_event(struct ism_dev * ism)461 static void ism_handle_event(struct ism_dev *ism)
462 {
463 	struct dibs_dev *dibs = ism->dibs;
464 	struct dibs_event event;
465 	struct ism_event *entry;
466 	struct dibs_client *clt;
467 	int i;
468 
469 	while ((ism->ieq_idx + 1) != READ_ONCE(ism->ieq->header.idx)) {
470 		if (++ism->ieq_idx == ARRAY_SIZE(ism->ieq->entry))
471 			ism->ieq_idx = 0;
472 
473 		entry = &ism->ieq->entry[ism->ieq_idx];
474 		debug_event(ism_debug_info, 2, entry, sizeof(*entry));
475 		__memset(&event, 0, sizeof(event));
476 		event.type = ism_match_event_type(entry->type);
477 		if (event.type == DIBS_SW_EVENT)
478 			event.subtype = entry->code;
479 		else
480 			event.subtype = ism_match_event_subtype(entry->code);
481 		event.time = entry->time;
482 		event.data = entry->info;
483 		switch (event.type) {
484 		case DIBS_BUF_EVENT:
485 			event.buffer_tok = entry->tok;
486 			break;
487 		case DIBS_DEV_EVENT:
488 		case DIBS_SW_EVENT:
489 			memcpy(&event.gid, &entry->tok, sizeof(u64));
490 		}
491 		for (i = 0; i < MAX_DIBS_CLIENTS; ++i) {
492 			clt = dibs->subs[i];
493 			if (clt)
494 				clt->ops->handle_event(dibs, &event);
495 		}
496 	}
497 }
498 
ism_handle_irq(int irq,void * data)499 static irqreturn_t ism_handle_irq(int irq, void *data)
500 {
501 	struct ism_dev *ism = data;
502 	unsigned long bit, end;
503 	struct dibs_dev *dibs;
504 	unsigned long *bv;
505 	u16 dmbemask;
506 	u8 client_id;
507 
508 	dibs = ism->dibs;
509 
510 	bv = (void *) &ism->sba->dmb_bits[ISM_DMB_WORD_OFFSET];
511 	end = sizeof(ism->sba->dmb_bits) * BITS_PER_BYTE - ISM_DMB_BIT_OFFSET;
512 
513 	spin_lock(&dibs->lock);
514 	ism->sba->s = 0;
515 	barrier();
516 	for (bit = 0;;) {
517 		bit = find_next_bit_inv(bv, end, bit);
518 		if (bit >= end)
519 			break;
520 
521 		clear_bit_inv(bit, bv);
522 		dmbemask = ism->sba->dmbe_mask[bit + ISM_DMB_BIT_OFFSET];
523 		ism->sba->dmbe_mask[bit + ISM_DMB_BIT_OFFSET] = 0;
524 		barrier();
525 		client_id = dibs->dmb_clientid_arr[bit];
526 		if (unlikely(client_id == NO_DIBS_CLIENT ||
527 			     !dibs->subs[client_id]))
528 			continue;
529 		dibs->subs[client_id]->ops->handle_irq(dibs,
530 						       bit + ISM_DMB_BIT_OFFSET,
531 						       dmbemask);
532 	}
533 
534 	if (ism->sba->e) {
535 		ism->sba->e = 0;
536 		barrier();
537 		ism_handle_event(ism);
538 	}
539 	spin_unlock(&dibs->lock);
540 	return IRQ_HANDLED;
541 }
542 
543 static const struct dibs_dev_ops ism_ops = {
544 	.get_fabric_id = ism_get_chid,
545 	.query_remote_gid = ism_query_rgid,
546 	.max_dmbs = ism_max_dmbs,
547 	.register_dmb = ism_register_dmb,
548 	.unregister_dmb = ism_unregister_dmb,
549 	.move_data = ism_move,
550 	.add_vlan_id = ism_add_vlan_id,
551 	.del_vlan_id = ism_del_vlan_id,
552 	.signal_event = ism_signal_ieq,
553 };
554 
ism_dev_init(struct ism_dev * ism)555 static int ism_dev_init(struct ism_dev *ism)
556 {
557 	struct pci_dev *pdev = ism->pdev;
558 	int ret;
559 
560 	ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
561 	if (ret <= 0)
562 		goto out;
563 
564 	ret = request_irq(pci_irq_vector(pdev, 0), ism_handle_irq, 0,
565 			  pci_name(pdev), ism);
566 	if (ret)
567 		goto free_vectors;
568 
569 	ret = register_sba(ism);
570 	if (ret)
571 		goto free_irq;
572 
573 	ret = register_ieq(ism);
574 	if (ret)
575 		goto unreg_sba;
576 
577 	query_info(ism);
578 	return 0;
579 
580 unreg_sba:
581 	unregister_sba(ism);
582 	ism_free_sba(ism);
583 free_irq:
584 	free_irq(pci_irq_vector(pdev, 0), ism);
585 free_vectors:
586 	pci_free_irq_vectors(pdev);
587 out:
588 	return ret;
589 }
590 
ism_dev_exit(struct ism_dev * ism)591 static void ism_dev_exit(struct ism_dev *ism)
592 {
593 	struct pci_dev *pdev = ism->pdev;
594 
595 	/* ism will only generate new IRQs while ieq & sba are registered */
596 	unregister_ieq(ism);
597 	unregister_sba(ism);
598 	/* drain ongoing irpt handlers */
599 	free_irq(pci_irq_vector(pdev, 0), ism);
600 	ism_free_ieq(ism);
601 	ism_free_sba(ism);
602 	pci_free_irq_vectors(pdev);
603 }
604 
ism_probe(struct pci_dev * pdev,const struct pci_device_id * id)605 static int ism_probe(struct pci_dev *pdev, const struct pci_device_id *id)
606 {
607 	struct dibs_dev *dibs;
608 	struct zpci_dev *zdev;
609 	struct ism_dev *ism;
610 	int ret;
611 
612 	ism = kzalloc_obj(*ism);
613 	if (!ism)
614 		return -ENOMEM;
615 
616 	spin_lock_init(&ism->cmd_lock);
617 	dev_set_drvdata(&pdev->dev, ism);
618 	ism->pdev = pdev;
619 
620 	ret = pci_enable_device_mem(pdev);
621 	if (ret)
622 		goto err_dev;
623 
624 	ret = pci_request_mem_regions(pdev, DRV_NAME);
625 	if (ret)
626 		goto err_disable;
627 
628 	ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
629 	if (ret)
630 		goto err_resource;
631 
632 	dma_set_seg_boundary(&pdev->dev, SZ_1M - 1);
633 	dma_set_max_seg_size(&pdev->dev, SZ_1M);
634 	pci_set_master(pdev);
635 
636 	dibs = dibs_dev_alloc();
637 	if (!dibs) {
638 		ret = -ENOMEM;
639 		goto err_resource;
640 	}
641 	/* set this up before we enable interrupts */
642 	ism->dibs = dibs;
643 	dibs->drv_priv = ism;
644 	dibs->ops = &ism_ops;
645 
646 	/* enable ism device, but any interrupts and events will be ignored
647 	 * before dibs_dev_add() adds it to any clients.
648 	 */
649 	ret = ism_dev_init(ism);
650 	if (ret)
651 		goto err_dibs;
652 
653 	/* after ism_dev_init() we can call ism function to set gid */
654 	ret = ism_read_local_gid(dibs);
655 	if (ret)
656 		goto err_ism;
657 
658 	dibs->dev.parent = &pdev->dev;
659 
660 	zdev = to_zpci(pdev);
661 	dev_set_name(&dibs->dev, "ism%x", zdev->uid ? zdev->uid : zdev->fid);
662 
663 	ret = dibs_dev_add(dibs);
664 	if (ret)
665 		goto err_ism;
666 
667 	return 0;
668 
669 err_ism:
670 	ism_dev_exit(ism);
671 err_dibs:
672 	/* pairs with dibs_dev_alloc() */
673 	put_device(&dibs->dev);
674 err_resource:
675 	pci_release_mem_regions(pdev);
676 err_disable:
677 	pci_disable_device(pdev);
678 err_dev:
679 	dev_set_drvdata(&pdev->dev, NULL);
680 	kfree(ism);
681 
682 	return ret;
683 }
684 
ism_remove(struct pci_dev * pdev)685 static void ism_remove(struct pci_dev *pdev)
686 {
687 	struct ism_dev *ism = dev_get_drvdata(&pdev->dev);
688 	struct dibs_dev *dibs = ism->dibs;
689 
690 	dibs_dev_del(dibs);
691 	ism_dev_exit(ism);
692 	/* pairs with dibs_dev_alloc() */
693 	put_device(&dibs->dev);
694 
695 	pci_release_mem_regions(pdev);
696 	pci_disable_device(pdev);
697 	dev_set_drvdata(&pdev->dev, NULL);
698 	kfree(ism);
699 }
700 
701 static struct pci_driver ism_driver = {
702 	.name	  = DRV_NAME,
703 	.id_table = ism_device_table,
704 	.probe	  = ism_probe,
705 	.remove	  = ism_remove,
706 };
707 
ism_init(void)708 static int __init ism_init(void)
709 {
710 	int ret;
711 
712 	ism_debug_info = debug_register("ism", 2, 1, 16);
713 	if (!ism_debug_info)
714 		return -ENODEV;
715 
716 	debug_register_view(ism_debug_info, &debug_hex_ascii_view);
717 	ret = pci_register_driver(&ism_driver);
718 	if (ret)
719 		debug_unregister(ism_debug_info);
720 
721 	return ret;
722 }
723 
ism_exit(void)724 static void __exit ism_exit(void)
725 {
726 	pci_unregister_driver(&ism_driver);
727 	debug_unregister(ism_debug_info);
728 }
729 
730 module_init(ism_init);
731 module_exit(ism_exit);
732