1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
5 */
6
7 #ifndef ATH12K_CORE_H
8 #define ATH12K_CORE_H
9
10 #include <linux/types.h>
11 #include <linux/interrupt.h>
12 #include <linux/irq.h>
13 #include <linux/bitfield.h>
14 #include <linux/dmi.h>
15 #include <linux/ctype.h>
16 #include <linux/firmware.h>
17 #include <linux/of_reserved_mem.h>
18 #include <linux/panic_notifier.h>
19 #include <linux/average.h>
20 #include <linux/of.h>
21 #include <linux/rhashtable.h>
22 #if defined(__FreeBSD__)
23 #include <linux/wait.h>
24 #endif
25 #include "qmi.h"
26 #include "htc.h"
27 #include "wmi.h"
28 #include "hal.h"
29 #include "dp.h"
30 #include "ce.h"
31 #include "mac.h"
32 #include "hw.h"
33 #include "reg.h"
34 #include "dbring.h"
35 #include "fw.h"
36 #include "acpi.h"
37 #include "wow.h"
38 #include "debugfs_htt_stats.h"
39 #include "coredump.h"
40 #include "cmn_defs.h"
41 #include "dp_cmn.h"
42
43 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
44
45 #define ATH12K_TX_MGMT_NUM_PENDING_MAX 512
46
47 #define ATH12K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64
48
49 /* Pending management packets threshold for dropping probe responses */
50 #define ATH12K_PRB_RSP_DROP_THRESHOLD ((ATH12K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4)
51
52 /* SMBIOS type containing Board Data File Name Extension */
53 #define ATH12K_SMBIOS_BDF_EXT_TYPE 0xF8
54
55 /* SMBIOS type structure length (excluding strings-set) */
56 #define ATH12K_SMBIOS_BDF_EXT_LENGTH 0x9
57
58 /* The magic used by QCA spec */
59 #define ATH12K_SMBIOS_BDF_EXT_MAGIC "BDF_"
60
61 #define ATH12K_INVALID_HW_MAC_ID 0xFF
62 #define ATH12K_CONNECTION_LOSS_HZ (3 * HZ)
63
64 #define ATH12K_MON_TIMER_INTERVAL 10
65 #define ATH12K_RESET_TIMEOUT_HZ (20 * HZ)
66 #define ATH12K_RESET_MAX_FAIL_COUNT_FIRST 3
67 #define ATH12K_RESET_MAX_FAIL_COUNT_FINAL 5
68 #define ATH12K_RESET_FAIL_TIMEOUT_HZ (20 * HZ)
69 #define ATH12K_RECONFIGURE_TIMEOUT_HZ (10 * HZ)
70 #define ATH12K_RECOVER_START_TIMEOUT_HZ (20 * HZ)
71
72 #define ATH12K_INVALID_GROUP_ID 0xFF
73 #define ATH12K_INVALID_DEVICE_ID 0xFF
74
75 #define ATH12K_MAX_MLO_PEERS 256
76 #define ATH12K_MLO_PEER_ID_INVALID 0xFFFF
77
78 #define ATH12K_INVALID_RSSI_FULL -1
79 #define ATH12K_INVALID_RSSI_EMPTY -128
80
81 enum ath12k_bdf_search {
82 ATH12K_BDF_SEARCH_DEFAULT,
83 ATH12K_BDF_SEARCH_BUS_AND_BOARD,
84 };
85
86 #if defined(__FreeBSD__)
87 #ifdef WME_AC_BE
88 #undef WME_AC_BE
89 #endif
90 #ifdef WME_AC_BK
91 #undef WME_AC_BK
92 #endif
93 #ifdef WME_AC_VI
94 #undef WME_AC_VI
95 #endif
96 #ifdef WME_AC_VO
97 #undef WME_AC_VO
98 #endif
99 #ifdef WME_NUM_AC
100 #undef WME_NUM_AC
101 #endif
102 #endif /* FreeBSD */
103
104 enum wme_ac {
105 WME_AC_BE,
106 WME_AC_BK,
107 WME_AC_VI,
108 WME_AC_VO,
109 WME_NUM_AC
110 };
111
112 #define ATH12K_HT_MCS_MAX 7
113 #define ATH12K_VHT_MCS_MAX 9
114 #define ATH12K_HE_MCS_MAX 11
115 #define ATH12K_EHT_MCS_MAX 15
116
117 enum ath12k_crypt_mode {
118 /* Only use hardware crypto engine */
119 ATH12K_CRYPT_MODE_HW,
120 /* Only use software crypto */
121 ATH12K_CRYPT_MODE_SW,
122 };
123
ath12k_tid_to_ac(u32 tid)124 static inline enum wme_ac ath12k_tid_to_ac(u32 tid)
125 {
126 return (((tid == 0) || (tid == 3)) ? WME_AC_BE :
127 ((tid == 1) || (tid == 2)) ? WME_AC_BK :
128 ((tid == 4) || (tid == 5)) ? WME_AC_VI :
129 WME_AC_VO);
130 }
131
ath12k_le32hilo_to_u64(__le32 hi,__le32 lo)132 static inline u64 ath12k_le32hilo_to_u64(__le32 hi, __le32 lo)
133 {
134 u64 hi64 = le32_to_cpu(hi);
135 u64 lo64 = le32_to_cpu(lo);
136
137 return (hi64 << 32) | lo64;
138 }
139
140 enum ath12k_skb_flags {
141 ATH12K_SKB_HW_80211_ENCAP = BIT(0),
142 ATH12K_SKB_CIPHER_SET = BIT(1),
143 ATH12K_SKB_MLO_STA = BIT(2),
144 };
145
146 struct ath12k_skb_cb {
147 dma_addr_t paddr;
148 struct ath12k *ar;
149 struct ieee80211_vif *vif;
150 dma_addr_t paddr_ext_desc;
151 u32 cipher;
152 u8 flags;
153 u8 link_id;
154 };
155
156 struct ath12k_skb_rxcb {
157 dma_addr_t paddr;
158 bool is_first_msdu;
159 bool is_last_msdu;
160 bool is_continuation;
161 bool is_mcbc;
162 bool is_eapol;
163 struct hal_rx_desc *rx_desc;
164 u8 err_rel_src;
165 u8 err_code;
166 u8 hw_link_id;
167 u8 unmapped;
168 u8 is_frag;
169 u8 tid;
170 u16 peer_id;
171 bool is_end_of_ppdu;
172 };
173
174 enum ath12k_hw_rev {
175 ATH12K_HW_QCN9274_HW10,
176 ATH12K_HW_QCN9274_HW20,
177 ATH12K_HW_WCN7850_HW20,
178 ATH12K_HW_IPQ5332_HW10,
179 ATH12K_HW_QCC2072_HW10,
180 };
181
182 enum ath12k_firmware_mode {
183 /* the default mode, standard 802.11 functionality */
184 ATH12K_FIRMWARE_MODE_NORMAL,
185
186 /* factory tests etc */
187 ATH12K_FIRMWARE_MODE_FTM,
188 };
189
190 #define ATH12K_IRQ_NUM_MAX 57
191 #define ATH12K_EXT_IRQ_NUM_MAX 16
192 #define ATH12K_MAX_TCL_RING_NUM 3
193
194 struct ath12k_ext_irq_grp {
195 struct ath12k_base *ab;
196 u32 irqs[ATH12K_EXT_IRQ_NUM_MAX];
197 u32 num_irq;
198 u32 grp_id;
199 u64 timestamp;
200 bool napi_enabled;
201 struct napi_struct napi;
202 struct net_device *napi_ndev;
203 };
204
205 enum ath12k_smbios_cc_type {
206 /* disable country code setting from SMBIOS */
207 ATH12K_SMBIOS_CC_DISABLE = 0,
208
209 /* set country code by ANSI country name, based on ISO3166-1 alpha2 */
210 ATH12K_SMBIOS_CC_ISO = 1,
211
212 /* worldwide regdomain */
213 ATH12K_SMBIOS_CC_WW = 2,
214 };
215
216 struct ath12k_smbios_bdf {
217 struct dmi_header hdr;
218 u8 features_disabled;
219
220 /* enum ath12k_smbios_cc_type */
221 u8 country_code_flag;
222
223 /* To set specific country, you need to set country code
224 * flag=ATH12K_SMBIOS_CC_ISO first, then if country is United
225 * States, then country code value = 0x5553 ("US",'U' = 0x55, 'S'=
226 * 0x53). To set country to INDONESIA, then country code value =
227 * 0x4944 ("IN", 'I'=0x49, 'D'=0x44). If country code flag =
228 * ATH12K_SMBIOS_CC_WW, then you can use worldwide regulatory
229 * setting.
230 */
231 u16 cc_code;
232
233 u8 bdf_enabled;
234 u8 bdf_ext[];
235 } __packed;
236
237 #define HEHANDLE_CAP_PHYINFO_SIZE 3
238 #define HECAP_PHYINFO_SIZE 9
239 #define HECAP_MACINFO_SIZE 5
240 #define HECAP_TXRX_MCS_NSS_SIZE 2
241 #define HECAP_PPET16_PPET8_MAX_SIZE 25
242
243 #define HE_PPET16_PPET8_SIZE 8
244
245 /* 802.11ax PPE (PPDU packet Extension) threshold */
246 struct he_ppe_threshold {
247 u32 numss_m1;
248 u32 ru_mask;
249 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE];
250 };
251
252 struct ath12k_he {
253 u8 hecap_macinfo[HECAP_MACINFO_SIZE];
254 u32 hecap_rxmcsnssmap;
255 u32 hecap_txmcsnssmap;
256 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE];
257 struct he_ppe_threshold hecap_ppet;
258 u32 heop_param;
259 };
260
261 enum {
262 WMI_HOST_TP_SCALE_MAX = 0,
263 WMI_HOST_TP_SCALE_50 = 1,
264 WMI_HOST_TP_SCALE_25 = 2,
265 WMI_HOST_TP_SCALE_12 = 3,
266 WMI_HOST_TP_SCALE_MIN = 4,
267 WMI_HOST_TP_SCALE_SIZE = 5,
268 };
269
270 enum ath12k_scan_state {
271 ATH12K_SCAN_IDLE,
272 ATH12K_SCAN_STARTING,
273 ATH12K_SCAN_RUNNING,
274 ATH12K_SCAN_ABORTING,
275 };
276
277 enum ath12k_11d_state {
278 ATH12K_11D_IDLE,
279 ATH12K_11D_PREPARING,
280 ATH12K_11D_RUNNING,
281 };
282
283 enum ath12k_hw_group_flags {
284 ATH12K_GROUP_FLAG_REGISTERED,
285 ATH12K_GROUP_FLAG_UNREGISTER,
286 };
287
288 enum ath12k_dev_flags {
289 ATH12K_FLAG_CAC_RUNNING,
290 ATH12K_FLAG_CRASH_FLUSH,
291 ATH12K_FLAG_RAW_MODE,
292 ATH12K_FLAG_HW_CRYPTO_DISABLED,
293 ATH12K_FLAG_RECOVERY,
294 ATH12K_FLAG_UNREGISTERING,
295 ATH12K_FLAG_REGISTERED,
296 ATH12K_FLAG_QMI_FAIL,
297 ATH12K_FLAG_HTC_SUSPEND_COMPLETE,
298 ATH12K_FLAG_CE_IRQ_ENABLED,
299 ATH12K_FLAG_EXT_IRQ_ENABLED,
300 ATH12K_FLAG_QMI_FW_READY_COMPLETE,
301 ATH12K_FLAG_FTM_SEGMENTED,
302 ATH12K_FLAG_FIXED_MEM_REGION,
303 };
304
305 struct ath12k_tx_conf {
306 bool changed;
307 u16 ac;
308 struct ieee80211_tx_queue_params tx_queue_params;
309 };
310
311 struct ath12k_key_conf {
312 enum set_key_cmd cmd;
313 struct list_head list;
314 struct ieee80211_sta *sta;
315 struct ieee80211_key_conf *key;
316 };
317
318 struct ath12k_vif_cache {
319 struct ath12k_tx_conf tx_conf;
320 struct ath12k_key_conf key_conf;
321 u32 bss_conf_changed;
322 };
323
324 struct ath12k_rekey_data {
325 u8 kck[NL80211_KCK_LEN];
326 u8 kek[NL80211_KCK_LEN];
327 u64 replay_ctr;
328 bool enable_offload;
329 };
330
331 struct ath12k_link_vif {
332 u32 vdev_id;
333 u32 beacon_interval;
334 u32 dtim_period;
335
336 struct ath12k *ar;
337
338 bool beacon_prot;
339
340 struct wmi_wmm_params_all_arg wmm_params;
341 struct list_head list;
342
343 bool is_created;
344 bool is_started;
345 bool is_up;
346 u8 bssid[ETH_ALEN];
347 struct cfg80211_bitrate_mask bitrate_mask;
348 struct delayed_work connection_loss_work;
349 int num_legacy_stations;
350 int rtscts_prot_mode;
351 int txpower;
352 bool rsnie_present;
353 bool wpaie_present;
354 u8 vdev_stats_id;
355 u32 punct_bitmap;
356 u8 link_id;
357 struct ath12k_vif *ahvif;
358 struct ath12k_rekey_data rekey_data;
359 struct ath12k_link_stats link_stats;
360 spinlock_t link_stats_lock; /* Protects updates to link_stats */
361
362 u8 current_cntdown_counter;
363
364 /* only used in station mode */
365 bool is_sta_assoc_link;
366
367 struct ath12k_reg_tpc_power_info reg_tpc_info;
368
369 bool group_key_valid;
370 struct wmi_vdev_install_key_arg group_key;
371 bool pairwise_key_done;
372 u16 num_stations;
373 bool is_csa_in_progress;
374 struct wiphy_work bcn_tx_work;
375 };
376
377 struct ath12k_vif {
378 struct ath12k_dp_vif dp_vif;
379
380 enum wmi_vdev_type vdev_type;
381 enum wmi_vdev_subtype vdev_subtype;
382 struct ieee80211_vif *vif;
383 struct ath12k_hw *ah;
384
385 union {
386 struct {
387 u32 uapsd;
388 } sta;
389 struct {
390 /* 127 stations; wmi limit */
391 u8 tim_bitmap[16];
392 u8 tim_len;
393 u32 ssid_len;
394 u8 ssid[IEEE80211_MAX_SSID_LEN];
395 bool hidden_ssid;
396 /* P2P_IE with NoA attribute for P2P_GO case */
397 u32 noa_len;
398 u8 *noa_data;
399 } ap;
400 } u;
401
402 u32 aid;
403 bool ps;
404
405 struct ath12k_link_vif deflink;
406 struct ath12k_link_vif __rcu *link[ATH12K_NUM_MAX_LINKS];
407 struct ath12k_vif_cache *cache[IEEE80211_MLD_MAX_NUM_LINKS];
408 /* indicates bitmap of link vif created in FW */
409 u32 links_map;
410 /* Must be last - ends in a flexible-array member.
411 *
412 * FIXME: Driver should not copy struct ieee80211_chanctx_conf,
413 * especially because it has a flexible array. Find a better way.
414 */
415 struct ieee80211_chanctx_conf chanctx;
416 };
417
418 struct ath12k_vif_iter {
419 u32 vdev_id;
420 struct ath12k *ar;
421 struct ath12k_link_vif *arvif;
422 };
423
424 #define ATH12K_SCAN_TIMEOUT_HZ (20 * HZ)
425
426 #define ATH12K_HE_MCS_NUM 12
427 #define ATH12K_VHT_MCS_NUM 10
428 #define ATH12K_BW_NUM 5
429 #define ATH12K_NSS_NUM 4
430 #define ATH12K_LEGACY_NUM 12
431 #define ATH12K_GI_NUM 4
432 #define ATH12K_HT_MCS_NUM 32
433
434 enum ath12k_pkt_rx_err {
435 ATH12K_PKT_RX_ERR_FCS,
436 ATH12K_PKT_RX_ERR_TKIP,
437 ATH12K_PKT_RX_ERR_CRYPT,
438 ATH12K_PKT_RX_ERR_PEER_IDX_INVAL,
439 ATH12K_PKT_RX_ERR_MAX,
440 };
441
442 enum ath12k_ampdu_subfrm_num {
443 ATH12K_AMPDU_SUBFRM_NUM_10,
444 ATH12K_AMPDU_SUBFRM_NUM_20,
445 ATH12K_AMPDU_SUBFRM_NUM_30,
446 ATH12K_AMPDU_SUBFRM_NUM_40,
447 ATH12K_AMPDU_SUBFRM_NUM_50,
448 ATH12K_AMPDU_SUBFRM_NUM_60,
449 ATH12K_AMPDU_SUBFRM_NUM_MORE,
450 ATH12K_AMPDU_SUBFRM_NUM_MAX,
451 };
452
453 enum ath12k_amsdu_subfrm_num {
454 ATH12K_AMSDU_SUBFRM_NUM_1,
455 ATH12K_AMSDU_SUBFRM_NUM_2,
456 ATH12K_AMSDU_SUBFRM_NUM_3,
457 ATH12K_AMSDU_SUBFRM_NUM_4,
458 ATH12K_AMSDU_SUBFRM_NUM_MORE,
459 ATH12K_AMSDU_SUBFRM_NUM_MAX,
460 };
461
462 enum ath12k_counter_type {
463 ATH12K_COUNTER_TYPE_BYTES,
464 ATH12K_COUNTER_TYPE_PKTS,
465 ATH12K_COUNTER_TYPE_MAX,
466 };
467
468 enum ath12k_stats_type {
469 ATH12K_STATS_TYPE_SUCC,
470 ATH12K_STATS_TYPE_FAIL,
471 ATH12K_STATS_TYPE_RETRY,
472 ATH12K_STATS_TYPE_AMPDU,
473 ATH12K_STATS_TYPE_MAX,
474 };
475
476 struct ath12k_htt_data_stats {
477 u64 legacy[ATH12K_COUNTER_TYPE_MAX][ATH12K_LEGACY_NUM];
478 u64 ht[ATH12K_COUNTER_TYPE_MAX][ATH12K_HT_MCS_NUM];
479 u64 vht[ATH12K_COUNTER_TYPE_MAX][ATH12K_VHT_MCS_NUM];
480 u64 he[ATH12K_COUNTER_TYPE_MAX][ATH12K_HE_MCS_NUM];
481 u64 bw[ATH12K_COUNTER_TYPE_MAX][ATH12K_BW_NUM];
482 u64 nss[ATH12K_COUNTER_TYPE_MAX][ATH12K_NSS_NUM];
483 u64 gi[ATH12K_COUNTER_TYPE_MAX][ATH12K_GI_NUM];
484 u64 transmit_type[ATH12K_COUNTER_TYPE_MAX][HAL_RX_RECEPTION_TYPE_MAX];
485 u64 ru_loc[ATH12K_COUNTER_TYPE_MAX][HAL_RX_RU_ALLOC_TYPE_MAX];
486 };
487
488 struct ath12k_htt_tx_stats {
489 struct ath12k_htt_data_stats stats[ATH12K_STATS_TYPE_MAX];
490 u64 tx_duration;
491 u64 ba_fails;
492 u64 ack_fails;
493 u16 ru_start;
494 u16 ru_tones;
495 u32 mu_group[MAX_MU_GROUP_ID];
496 };
497
498 struct ath12k_per_ppdu_tx_stats {
499 u16 succ_pkts;
500 u16 failed_pkts;
501 u16 retry_pkts;
502 u32 succ_bytes;
503 u32 failed_bytes;
504 u32 retry_bytes;
505 };
506
507 struct ath12k_link_sta {
508 struct ath12k_link_vif *arvif;
509 struct ath12k_sta *ahsta;
510
511 /* link address similar to ieee80211_link_sta */
512 u8 addr[ETH_ALEN];
513
514 /* the following are protected by ar->data_lock */
515 u32 changed; /* IEEE80211_RC_* */
516 u32 bw;
517 u32 nss;
518 u32 smps;
519
520 struct wiphy_work update_wk;
521 u8 link_id;
522 u32 bw_prev;
523 u32 peer_nss;
524 s8 rssi_beacon;
525 s8 chain_signal[IEEE80211_MAX_CHAINS];
526
527 /* For now the assoc link will be considered primary */
528 bool is_assoc_link;
529
530 /* for firmware use only */
531 u8 link_idx;
532
533 /* peer addr based rhashtable list pointer */
534 struct rhash_head rhash_addr;
535 };
536
537 struct ath12k_sta {
538 struct ath12k_vif *ahvif;
539 enum hal_pn_type pn_type;
540 struct ath12k_link_sta deflink;
541 struct ath12k_link_sta __rcu *link[IEEE80211_MLD_MAX_NUM_LINKS];
542 /* indicates bitmap of link sta created in FW */
543 u16 links_map;
544 u8 assoc_link_id;
545 u16 ml_peer_id;
546 u8 num_peer;
547
548 enum ieee80211_sta_state state;
549 };
550
551 #define ATH12K_HALF_20MHZ_BW 10
552 #define ATH12K_2GHZ_MIN_CENTER 2412
553 #define ATH12K_2GHZ_MAX_CENTER 2484
554 #define ATH12K_5GHZ_MIN_CENTER 4900
555 #define ATH12K_5GHZ_MAX_CENTER 5920
556 #define ATH12K_6GHZ_MIN_CENTER 5935
557 #define ATH12K_6GHZ_MAX_CENTER 7115
558 #define ATH12K_MIN_2GHZ_FREQ (ATH12K_2GHZ_MIN_CENTER - ATH12K_HALF_20MHZ_BW - 1)
559 #define ATH12K_MAX_2GHZ_FREQ (ATH12K_2GHZ_MAX_CENTER + ATH12K_HALF_20MHZ_BW + 1)
560 #define ATH12K_MIN_5GHZ_FREQ (ATH12K_5GHZ_MIN_CENTER - ATH12K_HALF_20MHZ_BW)
561 #define ATH12K_MAX_5GHZ_FREQ (ATH12K_5GHZ_MAX_CENTER + ATH12K_HALF_20MHZ_BW)
562 #define ATH12K_MIN_6GHZ_FREQ (ATH12K_6GHZ_MIN_CENTER - ATH12K_HALF_20MHZ_BW)
563 #define ATH12K_MAX_6GHZ_FREQ (ATH12K_6GHZ_MAX_CENTER + ATH12K_HALF_20MHZ_BW)
564 #define ATH12K_NUM_CHANS 101
565 #define ATH12K_MAX_5GHZ_CHAN 173
566
ath12k_is_2ghz_channel_freq(u32 freq)567 static inline bool ath12k_is_2ghz_channel_freq(u32 freq)
568 {
569 return freq >= ATH12K_MIN_2GHZ_FREQ &&
570 freq <= ATH12K_MAX_2GHZ_FREQ;
571 }
572
573 enum ath12k_hw_state {
574 ATH12K_HW_STATE_OFF,
575 ATH12K_HW_STATE_ON,
576 ATH12K_HW_STATE_RESTARTING,
577 ATH12K_HW_STATE_RESTARTED,
578 ATH12K_HW_STATE_WEDGED,
579 ATH12K_HW_STATE_TM,
580 /* Add other states as required */
581 };
582
583 /* Antenna noise floor */
584 #define ATH12K_DEFAULT_NOISE_FLOOR -95
585
586 struct ath12k_ftm_event_obj {
587 u32 data_pos;
588 u32 expected_seq;
589 u8 *eventdata;
590 };
591
592 struct ath12k_fw_stats {
593 u32 pdev_id;
594 u32 stats_id;
595 struct list_head pdevs;
596 struct list_head vdevs;
597 struct list_head bcn;
598 u32 num_vdev_recvd;
599 };
600
601 struct ath12k_dbg_htt_stats {
602 enum ath12k_dbg_htt_ext_stats_type type;
603 u32 cfg_param[4];
604 u8 reset;
605 struct debug_htt_stats_req *stats_req;
606 };
607
608 struct ath12k_debug {
609 struct dentry *debugfs_pdev;
610 struct dentry *debugfs_pdev_symlink;
611 struct ath12k_dbg_htt_stats htt_stats;
612 enum wmi_halphy_ctrl_path_stats_id tpc_stats_type;
613 bool tpc_request;
614 struct completion tpc_complete;
615 struct wmi_tpc_stats_arg *tpc_stats;
616 u32 rx_filter;
617 bool extd_rx_stats;
618 };
619
620 struct ath12k_pdev_rssi_offsets {
621 s32 temp_offset;
622 s8 min_nf_dbm;
623 /* Cache the sum here to avoid calculating it every time in hot path
624 * noise_floor = min_nf_dbm + temp_offset
625 */
626 s32 noise_floor;
627 };
628
629 #define ATH12K_FLUSH_TIMEOUT (5 * HZ)
630 #define ATH12K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ)
631
632 struct ath12k {
633 struct ath12k_base *ab;
634 struct ath12k_pdev *pdev;
635 struct ath12k_hw *ah;
636 struct ath12k_wmi_pdev *wmi;
637 struct ath12k_pdev_dp dp;
638 u8 mac_addr[ETH_ALEN];
639 u32 ht_cap_info;
640 u32 vht_cap_info;
641 struct ath12k_he ar_he;
642 bool supports_6ghz;
643 struct {
644 struct completion started;
645 struct completion completed;
646 struct completion on_channel;
647 struct delayed_work timeout;
648 enum ath12k_scan_state state;
649 bool is_roc;
650 int roc_freq;
651 bool roc_notify;
652 struct wiphy_work vdev_clean_wk;
653 struct ath12k_link_vif *arvif;
654 } scan;
655
656 struct {
657 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
658 struct ieee80211_sband_iftype_data
659 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
660 } mac;
661
662 unsigned long dev_flags;
663 unsigned int filter_flags;
664 u32 min_tx_power;
665 u32 max_tx_power;
666 u32 txpower_limit_2g;
667 u32 txpower_limit_5g;
668 u32 txpower_scale;
669 u32 power_scale;
670 u32 chan_tx_pwr;
671 u32 rts_threshold;
672 u32 num_stations;
673 u32 max_num_stations;
674
675 /* protects the radio specific data like debug stats, ppdu_stats_info stats,
676 * vdev_stop_status info, scan data, ath12k_sta info, ath12k_link_vif info,
677 * channel context data, survey info, test mode data, regd_channel_update_queue.
678 */
679 spinlock_t data_lock;
680
681 struct list_head arvifs;
682 /* should never be NULL; needed for regular htt rx */
683 struct ieee80211_channel *rx_channel;
684
685 /* valid during scan; needed for mgmt rx during scan */
686 struct ieee80211_channel *scan_channel;
687
688 u8 cfg_tx_chainmask;
689 u8 cfg_rx_chainmask;
690 u8 num_rx_chains;
691 u8 num_tx_chains;
692 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */
693 u8 pdev_idx;
694 u8 lmac_id;
695 u8 hw_link_id;
696
697 struct completion peer_assoc_done;
698 struct completion peer_delete_done;
699
700 int install_key_status;
701 struct completion install_key_done;
702
703 int last_wmi_vdev_start_status;
704 struct completion vdev_setup_done;
705 struct completion vdev_delete_done;
706
707 int num_peers;
708 int max_num_peers;
709 u32 num_started_vdevs;
710 u32 num_created_vdevs;
711 unsigned long long allocated_vdev_map;
712
713 struct idr txmgmt_idr;
714 /* protects txmgmt_idr data */
715 spinlock_t txmgmt_idr_lock;
716 atomic_t num_pending_mgmt_tx;
717 wait_queue_head_t txmgmt_empty_waitq;
718
719 /* cycle count is reported twice for each visited channel during scan.
720 * access protected by data_lock
721 */
722 u32 survey_last_rx_clear_count;
723 u32 survey_last_cycle_count;
724
725 /* Channel info events are expected to come in pairs without and with
726 * COMPLETE flag set respectively for each channel visit during scan.
727 *
728 * However there are deviations from this rule. This flag is used to
729 * avoid reporting garbage data.
730 */
731 bool ch_info_can_report_survey;
732 struct survey_info survey[ATH12K_NUM_CHANS];
733 struct completion bss_survey_done;
734
735 struct work_struct regd_update_work;
736 struct work_struct regd_channel_update_work;
737 struct list_head regd_channel_update_queue;
738
739 struct wiphy_work wmi_mgmt_tx_work;
740 struct sk_buff_head wmi_mgmt_tx_queue;
741
742 struct ath12k_wow wow;
743 struct completion target_suspend;
744 bool target_suspend_ack;
745
746 struct ath12k_per_peer_tx_stats cached_stats;
747 u32 last_ppdu_id;
748 u32 cached_ppdu_id;
749 #ifdef CONFIG_ATH12K_DEBUGFS
750 struct ath12k_debug debug;
751 #endif
752
753 bool dfs_block_radar_events;
754 bool monitor_vdev_created;
755 bool monitor_started;
756 int monitor_vdev_id;
757
758 struct wiphy_radio_freq_range freq_range;
759
760 bool nlo_enabled;
761
762 /* Protected by wiphy::mtx lock. */
763 u32 vdev_id_11d_scan;
764 struct completion completed_11d_scan;
765 enum ath12k_11d_state state_11d;
766 u8 alpha2[REG_ALPHA2_LEN];
767 bool regdom_set_by_user;
768 struct completion regd_update_completed;
769
770 struct completion fw_stats_complete;
771 struct completion fw_stats_done;
772
773 struct completion mlo_setup_done;
774 u32 mlo_setup_status;
775 u8 ftm_msgref;
776 struct ath12k_fw_stats fw_stats;
777 unsigned long last_tx_power_update;
778
779 s8 max_allowed_tx_power;
780 struct ath12k_pdev_rssi_offsets rssi_info;
781 };
782
783 struct ath12k_hw {
784 struct ieee80211_hw *hw;
785 struct device *dev;
786
787 /* Protect the write operation of the hardware state ath12k_hw::state
788 * between hardware start<=>reconfigure<=>stop transitions.
789 */
790 struct mutex hw_mutex;
791 enum ath12k_hw_state state;
792 bool regd_updated;
793 bool use_6ghz_regd;
794
795 u8 num_radio;
796
797 DECLARE_BITMAP(free_ml_peer_id_map, ATH12K_MAX_MLO_PEERS);
798
799 struct ath12k_dp_hw dp_hw;
800
801 /* Keep last */
802 struct ath12k radio[] __aligned(sizeof(void *));
803 };
804
805 struct ath12k_band_cap {
806 u32 phy_id;
807 u32 max_bw_supported;
808 u32 ht_cap_info;
809 u32 he_cap_info[2];
810 u32 he_mcs;
811 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE];
812 struct ath12k_wmi_ppe_threshold_arg he_ppet;
813 u16 he_6ghz_capa;
814 u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE];
815 u32 eht_cap_phy_info[WMI_MAX_EHTCAP_PHY_SIZE];
816 u32 eht_mcs_20_only;
817 u32 eht_mcs_80;
818 u32 eht_mcs_160;
819 u32 eht_mcs_320;
820 struct ath12k_wmi_ppe_threshold_arg eht_ppet;
821 u32 eht_cap_info_internal;
822 };
823
824 struct ath12k_pdev_cap {
825 u32 supported_bands;
826 u32 ampdu_density;
827 u32 vht_cap;
828 u32 vht_mcs;
829 u32 he_mcs;
830 u32 tx_chain_mask;
831 u32 rx_chain_mask;
832 u32 tx_chain_mask_shift;
833 u32 rx_chain_mask_shift;
834 struct ath12k_band_cap band[NUM_NL80211_BANDS];
835 u32 eml_cap;
836 u32 mld_cap;
837 bool nss_ratio_enabled;
838 u8 nss_ratio_info;
839 };
840
841 struct mlo_timestamp {
842 u32 info;
843 u32 sync_timestamp_lo_us;
844 u32 sync_timestamp_hi_us;
845 u32 mlo_offset_lo;
846 u32 mlo_offset_hi;
847 u32 mlo_offset_clks;
848 u32 mlo_comp_clks;
849 u32 mlo_comp_timer;
850 };
851
852 struct ath12k_pdev {
853 struct ath12k *ar;
854 u32 pdev_id;
855 u32 hw_link_id;
856 struct ath12k_pdev_cap cap;
857 u8 mac_addr[ETH_ALEN];
858 struct mlo_timestamp timestamp;
859 };
860
861 struct ath12k_fw_pdev {
862 u32 pdev_id;
863 u32 phy_id;
864 u32 supported_bands;
865 };
866
867 struct ath12k_board_data {
868 const struct firmware *fw;
869 const void *data;
870 size_t len;
871 };
872
873 struct ath12k_reg_freq {
874 u32 start_freq;
875 u32 end_freq;
876 };
877
878 struct ath12k_mlo_memory {
879 struct target_mem_chunk chunk[ATH12K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01];
880 int mlo_mem_size;
881 bool init_done;
882 };
883
884 struct ath12k_hw_link {
885 u8 device_id;
886 u8 pdev_idx;
887 };
888
889 /* Holds info on the group of devices that are registered as a single
890 * wiphy, protected with struct ath12k_hw_group::mutex.
891 */
892 struct ath12k_hw_group {
893 /* Keep dp_hw_grp as the first member to allow efficient
894 * usage of cache lines for DP fields
895 */
896 struct ath12k_dp_hw_group dp_hw_grp;
897 struct ath12k_hw_link hw_links[ATH12K_GROUP_MAX_RADIO];
898 struct list_head list;
899 u8 id;
900 u8 num_devices;
901 u8 num_probed;
902 u8 num_started;
903 unsigned long flags;
904 struct ath12k_base *ab[ATH12K_MAX_DEVICES];
905
906 /* protects access to this struct */
907 struct mutex mutex;
908
909 /* Holds information of wiphy (hw) registration.
910 *
911 * In Multi/Single Link Operation case, all pdevs are registered as
912 * a single wiphy. In other (legacy/Non-MLO) cases, each pdev is
913 * registered as separate wiphys.
914 */
915 struct ath12k_hw *ah[ATH12K_GROUP_MAX_RADIO];
916 u8 num_hw;
917 bool mlo_capable;
918 struct device_node *wsi_node[ATH12K_MAX_DEVICES];
919 struct ath12k_mlo_memory mlo_mem;
920 bool hw_link_id_init_done;
921 };
922
923 /* Holds WSI info specific to each device, excluding WSI group info */
924 struct ath12k_wsi_info {
925 u32 index;
926 u32 hw_link_id_base;
927 };
928
929 struct ath12k_dp_profile_params {
930 u32 tx_comp_ring_size;
931 u32 rxdma_monitor_buf_ring_size;
932 u32 rxdma_monitor_dst_ring_size;
933 u32 num_pool_tx_desc;
934 u32 rx_desc_count;
935 };
936
937 struct ath12k_mem_profile_based_param {
938 u32 num_vdevs;
939 u32 max_client_single;
940 u32 max_client_dbs;
941 u32 max_client_dbs_sbs;
942 struct ath12k_dp_profile_params dp_params;
943 };
944
945 enum ath12k_device_family {
946 ATH12K_DEVICE_FAMILY_START,
947 ATH12K_DEVICE_FAMILY_WIFI7 = ATH12K_DEVICE_FAMILY_START,
948 ATH12K_DEVICE_FAMILY_MAX,
949 };
950
951 /* Master structure to hold the hw data which may be used in core module */
952 struct ath12k_base {
953 enum ath12k_hw_rev hw_rev;
954 struct platform_device *pdev;
955 struct device *dev;
956 struct ath12k_qmi qmi;
957 struct ath12k_wmi_base wmi_ab;
958 struct completion fw_ready;
959 u8 device_id;
960 int num_radios;
961 /* HW channel counters frequency value in hertz common to all MACs */
962 u32 cc_freq_hz;
963
964 struct ath12k_dump_file_data *dump_data;
965 size_t ath12k_coredump_len;
966 struct work_struct dump_work;
967
968 struct ath12k_htc htc;
969
970 struct ath12k_dp *dp;
971
972 void __iomem *mem;
973 unsigned long mem_len;
974
975 void __iomem *mem_ce;
976 u32 ce_remap_base_addr;
977 u32 cmem_offset;
978 bool ce_remap;
979
980 struct {
981 enum ath12k_bus bus;
982 const struct ath12k_hif_ops *ops;
983 } hif;
984
985 struct {
986 struct completion wakeup_completed;
987 u32 wmi_conf_rx_decap_mode;
988 } wow;
989
990 struct ath12k_ce ce;
991 struct timer_list rx_replenish_retry;
992 struct ath12k_hal hal;
993 /* To synchronize core_start/core_stop */
994 struct mutex core_lock;
995 /* Protects data like peers */
996 spinlock_t base_lock;
997
998 /* Single pdev device (struct ath12k_hw_params::single_pdev_only):
999 *
1000 * Firmware maintains data for all bands but advertises a single
1001 * phy to the host which is stored as a single element in this
1002 * array.
1003 *
1004 * Other devices:
1005 *
1006 * This array will contain as many elements as the number of
1007 * radios.
1008 */
1009 struct ath12k_pdev pdevs[MAX_RADIOS];
1010
1011 /* struct ath12k_hw_params::single_pdev_only devices use this to
1012 * store phy specific data
1013 */
1014 struct ath12k_fw_pdev fw_pdev[MAX_RADIOS];
1015 u8 fw_pdev_count;
1016
1017 struct ath12k_pdev __rcu *pdevs_active[MAX_RADIOS];
1018
1019 struct ath12k_wmi_hal_reg_capabilities_ext_arg hal_reg_cap[MAX_RADIOS];
1020 unsigned long long free_vdev_map;
1021 unsigned long long free_vdev_stats_id_map;
1022 wait_queue_head_t peer_mapping_wq;
1023 u8 mac_addr[ETH_ALEN];
1024 bool wmi_ready;
1025 u32 wlan_init_status;
1026 int irq_num[ATH12K_IRQ_NUM_MAX];
1027 struct ath12k_ext_irq_grp ext_irq_grp[ATH12K_EXT_IRQ_GRP_NUM_MAX];
1028 struct napi_struct *napi;
1029 struct ath12k_wmi_target_cap_arg target_caps;
1030 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE];
1031 bool pdevs_macaddr_valid;
1032
1033 const struct ath12k_hw_params *hw_params;
1034
1035 const struct firmware *cal_file;
1036
1037 /* Below regd's are protected by ab->data_lock */
1038 /* This is the regd set for every radio
1039 * by the firmware during initialization
1040 */
1041 struct ieee80211_regdomain *default_regd[MAX_RADIOS];
1042 /* This regd is set during dynamic country setting
1043 * This may or may not be used during the runtime
1044 */
1045 struct ieee80211_regdomain *new_regd[MAX_RADIOS];
1046
1047 struct ath12k_reg_info *reg_info[MAX_RADIOS];
1048
1049 /* Current DFS Regulatory */
1050 enum ath12k_dfs_region dfs_region;
1051 #ifdef CONFIG_ATH12K_DEBUGFS
1052 struct dentry *debugfs_soc;
1053 #endif
1054
1055 unsigned long dev_flags;
1056 struct completion driver_recovery;
1057 struct workqueue_struct *workqueue;
1058 struct work_struct restart_work;
1059 struct workqueue_struct *workqueue_aux;
1060 struct work_struct reset_work;
1061 atomic_t reset_count;
1062 atomic_t recovery_count;
1063 bool is_reset;
1064 struct completion reset_complete;
1065 /* continuous recovery fail count */
1066 atomic_t fail_cont_count;
1067 unsigned long reset_fail_timeout;
1068 struct work_struct update_11d_work;
1069 u8 new_alpha2[2];
1070 struct {
1071 /* protected by data_lock */
1072 u32 fw_crash_counter;
1073 } stats;
1074 u32 pktlog_defs_checksum;
1075
1076 struct ath12k_dbring_cap *db_caps;
1077 u32 num_db_cap;
1078
1079 struct completion htc_suspend;
1080
1081 u64 fw_soc_drop_count;
1082 bool static_window_map;
1083
1084 struct work_struct rfkill_work;
1085 /* true means radio is on */
1086 bool rfkill_radio_on;
1087
1088 struct {
1089 enum ath12k_bdf_search bdf_search;
1090 u32 vendor;
1091 u32 device;
1092 u32 subsystem_vendor;
1093 u32 subsystem_device;
1094 } id;
1095
1096 struct {
1097 u32 api_version;
1098
1099 const struct firmware *fw;
1100 const u8 *amss_data;
1101 size_t amss_len;
1102 const u8 *amss_dualmac_data;
1103 size_t amss_dualmac_len;
1104 const u8 *m3_data;
1105 size_t m3_len;
1106 const u8 *aux_uc_data;
1107 size_t aux_uc_len;
1108
1109 DECLARE_BITMAP(fw_features, ATH12K_FW_FEATURE_COUNT);
1110 bool fw_features_valid;
1111 } fw;
1112
1113 struct completion restart_completed;
1114
1115 #ifdef CONFIG_ACPI
1116
1117 struct {
1118 bool started;
1119 u32 func_bit;
1120 bool acpi_tas_enable;
1121 bool acpi_bios_sar_enable;
1122 bool acpi_disable_11be;
1123 bool acpi_disable_rfkill;
1124 bool acpi_cca_enable;
1125 bool acpi_band_edge_enable;
1126 bool acpi_enable_bdf;
1127 u32 bit_flag;
1128 char bdf_string[ATH12K_ACPI_BDF_MAX_LEN];
1129 u8 tas_cfg[ATH12K_ACPI_DSM_TAS_CFG_SIZE];
1130 u8 tas_sar_power_table[ATH12K_ACPI_DSM_TAS_DATA_SIZE];
1131 u8 bios_sar_data[ATH12K_ACPI_DSM_BIOS_SAR_DATA_SIZE];
1132 u8 geo_offset_data[ATH12K_ACPI_DSM_GEO_OFFSET_DATA_SIZE];
1133 u8 cca_data[ATH12K_ACPI_DSM_CCA_DATA_SIZE];
1134 u8 band_edge_power[ATH12K_ACPI_DSM_BAND_EDGE_DATA_SIZE];
1135 } acpi;
1136
1137 #endif /* CONFIG_ACPI */
1138
1139 struct notifier_block panic_nb;
1140
1141 struct ath12k_hw_group *ag;
1142 struct ath12k_wsi_info wsi_info;
1143 enum ath12k_firmware_mode fw_mode;
1144 struct ath12k_ftm_event_obj ftm_event_obj;
1145 bool hw_group_ref;
1146
1147 /* Denote whether MLO is possible within the device */
1148 bool single_chip_mlo_support;
1149
1150 struct ath12k_reg_freq reg_freq_2ghz;
1151 struct ath12k_reg_freq reg_freq_5ghz;
1152 struct ath12k_reg_freq reg_freq_6ghz;
1153 const struct ath12k_mem_profile_based_param *profile_param;
1154 enum ath12k_qmi_mem_mode target_mem_mode;
1155
1156 /* FIXME: Define this field in a ag equivalent object available
1157 * during the initial phase of probe later.
1158 */
1159 const struct ieee80211_ops *ath12k_ops;
1160
1161 struct rhashtable *rhead_sta_addr;
1162 struct rhashtable_params rhash_sta_addr_param;
1163
1164 /* must be last */
1165 u8 drv_priv[] __aligned(sizeof(void *));
1166 };
1167
1168 struct ath12k_pdev_map {
1169 struct ath12k_base *ab;
1170 u8 pdev_idx;
1171 };
1172
1173 struct ath12k_fw_stats_vdev {
1174 struct list_head list;
1175
1176 u32 vdev_id;
1177 u32 beacon_snr;
1178 u32 data_snr;
1179 u32 num_tx_frames[WLAN_MAX_AC];
1180 u32 num_rx_frames;
1181 u32 num_tx_frames_retries[WLAN_MAX_AC];
1182 u32 num_tx_frames_failures[WLAN_MAX_AC];
1183 u32 num_rts_fail;
1184 u32 num_rts_success;
1185 u32 num_rx_err;
1186 u32 num_rx_discard;
1187 u32 num_tx_not_acked;
1188 u32 tx_rate_history[MAX_TX_RATE_VALUES];
1189 u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
1190 };
1191
1192 struct ath12k_fw_stats_bcn {
1193 struct list_head list;
1194
1195 u32 vdev_id;
1196 u32 tx_bcn_succ_cnt;
1197 u32 tx_bcn_outage_cnt;
1198 };
1199
1200 struct ath12k_fw_stats_pdev {
1201 struct list_head list;
1202
1203 /* PDEV stats */
1204 s32 ch_noise_floor;
1205 u32 tx_frame_count;
1206 u32 rx_frame_count;
1207 u32 rx_clear_count;
1208 u32 cycle_count;
1209 u32 phy_err_count;
1210 u32 chan_tx_power;
1211 u32 ack_rx_bad;
1212 u32 rts_bad;
1213 u32 rts_good;
1214 u32 fcs_bad;
1215 u32 no_beacons;
1216 u32 mib_int_count;
1217
1218 /* PDEV TX stats */
1219 s32 comp_queued;
1220 s32 comp_delivered;
1221 s32 msdu_enqued;
1222 s32 mpdu_enqued;
1223 s32 wmm_drop;
1224 s32 local_enqued;
1225 s32 local_freed;
1226 s32 hw_queued;
1227 s32 hw_reaped;
1228 s32 underrun;
1229 s32 tx_abort;
1230 s32 mpdus_requed;
1231 u32 tx_ko;
1232 u32 data_rc;
1233 u32 self_triggers;
1234 u32 sw_retry_failure;
1235 u32 illgl_rate_phy_err;
1236 u32 pdev_cont_xretry;
1237 u32 pdev_tx_timeout;
1238 u32 pdev_resets;
1239 u32 stateless_tid_alloc_failure;
1240 u32 phy_underrun;
1241 u32 txop_ovf;
1242
1243 /* PDEV RX stats */
1244 s32 mid_ppdu_route_change;
1245 s32 status_rcvd;
1246 s32 r0_frags;
1247 s32 r1_frags;
1248 s32 r2_frags;
1249 s32 r3_frags;
1250 s32 htt_msdus;
1251 s32 htt_mpdus;
1252 s32 loc_msdus;
1253 s32 loc_mpdus;
1254 s32 oversize_amsdu;
1255 s32 phy_errs;
1256 s32 phy_err_drop;
1257 s32 mpdu_errs;
1258 };
1259
1260 int ath12k_core_qmi_firmware_ready(struct ath12k_base *ab);
1261 void ath12k_core_hw_group_cleanup(struct ath12k_hw_group *ag);
1262 int ath12k_core_pre_init(struct ath12k_base *ab);
1263 int ath12k_core_init(struct ath12k_base *ath12k);
1264 void ath12k_core_deinit(struct ath12k_base *ath12k);
1265 struct ath12k_base *ath12k_core_alloc(struct device *dev, size_t priv_size,
1266 enum ath12k_bus bus);
1267 void ath12k_core_free(struct ath12k_base *ath12k);
1268 int ath12k_core_fetch_board_data_api_1(struct ath12k_base *ab,
1269 struct ath12k_board_data *bd,
1270 char *filename);
1271 int ath12k_core_fetch_bdf(struct ath12k_base *ath12k,
1272 struct ath12k_board_data *bd);
1273 void ath12k_core_free_bdf(struct ath12k_base *ab, struct ath12k_board_data *bd);
1274 int ath12k_core_fetch_regdb(struct ath12k_base *ab, struct ath12k_board_data *bd);
1275 int ath12k_core_check_dt(struct ath12k_base *ath12k);
1276 int ath12k_core_check_smbios(struct ath12k_base *ab);
1277 void ath12k_core_halt(struct ath12k *ar);
1278 int ath12k_core_resume_early(struct ath12k_base *ab);
1279 int ath12k_core_resume(struct ath12k_base *ab);
1280 int ath12k_core_suspend(struct ath12k_base *ab);
1281 int ath12k_core_suspend_late(struct ath12k_base *ab);
1282 void ath12k_core_hw_group_unassign(struct ath12k_base *ab);
1283 u8 ath12k_get_num_partner_link(struct ath12k *ar);
1284
1285 const struct firmware *ath12k_core_firmware_request(struct ath12k_base *ab,
1286 const char *filename);
1287 u32 ath12k_core_get_max_station_per_radio(struct ath12k_base *ab);
1288 u32 ath12k_core_get_max_peers_per_radio(struct ath12k_base *ab);
1289
1290 void ath12k_core_hw_group_set_mlo_capable(struct ath12k_hw_group *ag);
1291 void ath12k_fw_stats_init(struct ath12k *ar);
1292 void ath12k_fw_stats_bcn_free(struct list_head *head);
1293 void ath12k_fw_stats_free(struct ath12k_fw_stats *stats);
1294 void ath12k_fw_stats_reset(struct ath12k *ar);
1295 struct reserved_mem *ath12k_core_get_reserved_mem(struct ath12k_base *ab,
1296 int index);
1297 enum ath12k_qmi_mem_mode ath12k_core_get_memory_mode(struct ath12k_base *ab);
1298
ath12k_scan_state_str(enum ath12k_scan_state state)1299 static inline const char *ath12k_scan_state_str(enum ath12k_scan_state state)
1300 {
1301 switch (state) {
1302 case ATH12K_SCAN_IDLE:
1303 return "idle";
1304 case ATH12K_SCAN_STARTING:
1305 return "starting";
1306 case ATH12K_SCAN_RUNNING:
1307 return "running";
1308 case ATH12K_SCAN_ABORTING:
1309 return "aborting";
1310 }
1311
1312 return "unknown";
1313 }
1314
ATH12K_SKB_CB(struct sk_buff * skb)1315 static inline struct ath12k_skb_cb *ATH12K_SKB_CB(struct sk_buff *skb)
1316 {
1317 BUILD_BUG_ON(sizeof(struct ath12k_skb_cb) >
1318 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
1319 return (struct ath12k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
1320 }
1321
ATH12K_SKB_RXCB(struct sk_buff * skb)1322 static inline struct ath12k_skb_rxcb *ATH12K_SKB_RXCB(struct sk_buff *skb)
1323 {
1324 BUILD_BUG_ON(sizeof(struct ath12k_skb_rxcb) > sizeof(skb->cb));
1325 return (struct ath12k_skb_rxcb *)skb->cb;
1326 }
1327
ath12k_vif_to_ahvif(struct ieee80211_vif * vif)1328 static inline struct ath12k_vif *ath12k_vif_to_ahvif(struct ieee80211_vif *vif)
1329 {
1330 return (struct ath12k_vif *)vif->drv_priv;
1331 }
1332
ath12k_sta_to_ahsta(struct ieee80211_sta * sta)1333 static inline struct ath12k_sta *ath12k_sta_to_ahsta(struct ieee80211_sta *sta)
1334 {
1335 return (struct ath12k_sta *)sta->drv_priv;
1336 }
1337
ath12k_ahsta_to_sta(struct ath12k_sta * ahsta)1338 static inline struct ieee80211_sta *ath12k_ahsta_to_sta(struct ath12k_sta *ahsta)
1339 {
1340 return container_of((void *)ahsta, struct ieee80211_sta, drv_priv);
1341 }
1342
ath12k_ahvif_to_vif(struct ath12k_vif * ahvif)1343 static inline struct ieee80211_vif *ath12k_ahvif_to_vif(struct ath12k_vif *ahvif)
1344 {
1345 return container_of((void *)ahvif, struct ieee80211_vif, drv_priv);
1346 }
1347
ath12k_ab_to_ar(struct ath12k_base * ab,int mac_id)1348 static inline struct ath12k *ath12k_ab_to_ar(struct ath12k_base *ab,
1349 int mac_id)
1350 {
1351 return ab->pdevs[ath12k_hw_mac_id_to_pdev_id(ab->hw_params, mac_id)].ar;
1352 }
1353
ath12k_core_create_firmware_path(struct ath12k_base * ab,const char * filename,void * buf,size_t buf_len)1354 static inline void ath12k_core_create_firmware_path(struct ath12k_base *ab,
1355 const char *filename,
1356 void *buf, size_t buf_len)
1357 {
1358 const char *fw_name = NULL;
1359
1360 of_property_read_string(ab->dev->of_node, "firmware-name", &fw_name);
1361
1362 if (fw_name && strncmp(filename, "board", 5))
1363 snprintf(buf, buf_len, "%s/%s/%s/%s", ATH12K_FW_DIR,
1364 ab->hw_params->fw.dir, fw_name, filename);
1365 else
1366 snprintf(buf, buf_len, "%s/%s/%s", ATH12K_FW_DIR,
1367 ab->hw_params->fw.dir, filename);
1368 }
1369
ath12k_bus_str(enum ath12k_bus bus)1370 static inline const char *ath12k_bus_str(enum ath12k_bus bus)
1371 {
1372 switch (bus) {
1373 case ATH12K_BUS_PCI:
1374 return "pci";
1375 case ATH12K_BUS_AHB:
1376 return "ahb";
1377 }
1378
1379 return "unknown";
1380 }
1381
ath12k_hw_to_ah(struct ieee80211_hw * hw)1382 static inline struct ath12k_hw *ath12k_hw_to_ah(struct ieee80211_hw *hw)
1383 {
1384 return hw->priv;
1385 }
1386
ath12k_ah_to_ar(struct ath12k_hw * ah,u8 hw_link_id)1387 static inline struct ath12k *ath12k_ah_to_ar(struct ath12k_hw *ah, u8 hw_link_id)
1388 {
1389 if (WARN(hw_link_id >= ah->num_radio,
1390 "bad hw link id %d, so switch to default link\n", hw_link_id))
1391 hw_link_id = 0;
1392
1393 return &ah->radio[hw_link_id];
1394 }
1395
ath12k_ar_to_ah(struct ath12k * ar)1396 static inline struct ath12k_hw *ath12k_ar_to_ah(struct ath12k *ar)
1397 {
1398 return ar->ah;
1399 }
1400
ath12k_ar_to_hw(struct ath12k * ar)1401 static inline struct ieee80211_hw *ath12k_ar_to_hw(struct ath12k *ar)
1402 {
1403 return ar->ah->hw;
1404 }
1405
1406 #define for_each_ar(ah, ar, index) \
1407 for ((index) = 0; ((index) < (ah)->num_radio && \
1408 ((ar) = &(ah)->radio[(index)])); (index)++)
1409
ath12k_ag_to_ah(struct ath12k_hw_group * ag,int idx)1410 static inline struct ath12k_hw *ath12k_ag_to_ah(struct ath12k_hw_group *ag, int idx)
1411 {
1412 return ag->ah[idx];
1413 }
1414
ath12k_ag_set_ah(struct ath12k_hw_group * ag,int idx,struct ath12k_hw * ah)1415 static inline void ath12k_ag_set_ah(struct ath12k_hw_group *ag, int idx,
1416 struct ath12k_hw *ah)
1417 {
1418 ag->ah[idx] = ah;
1419 }
1420
ath12k_ab_to_ag(struct ath12k_base * ab)1421 static inline struct ath12k_hw_group *ath12k_ab_to_ag(struct ath12k_base *ab)
1422 {
1423 return ab->ag;
1424 }
1425
ath12k_ag_to_ab(struct ath12k_hw_group * ag,u8 device_id)1426 static inline struct ath12k_base *ath12k_ag_to_ab(struct ath12k_hw_group *ag,
1427 u8 device_id)
1428 {
1429 return ag->ab[device_id];
1430 }
1431
ath12k_pdev_get_noise_floor(struct ath12k * ar)1432 static inline s32 ath12k_pdev_get_noise_floor(struct ath12k *ar)
1433 {
1434 lockdep_assert_held(&ar->data_lock);
1435
1436 return ar->rssi_info.noise_floor;
1437 }
1438
1439 /* The @ab->dp NULL check or assertion is intentionally omitted because
1440 * @ab->dp is guaranteed to be non-NULL after a successful probe and
1441 * remains valid until teardown. Invoking this before allocation or
1442 * after teardown is considered invalid usage.
1443 */
ath12k_ab_to_dp(struct ath12k_base * ab)1444 static inline struct ath12k_dp *ath12k_ab_to_dp(struct ath12k_base *ab)
1445 {
1446 return ab->dp;
1447 }
1448
ath12k_pdev_dp_to_ar(struct ath12k_pdev_dp * dp)1449 static inline struct ath12k *ath12k_pdev_dp_to_ar(struct ath12k_pdev_dp *dp)
1450 {
1451 return container_of(dp, struct ath12k, dp);
1452 }
1453 #endif /* _CORE_H_ */
1454