1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (c) 2017 Pengutronix, Oleksij Rempel <kernel@pengutronix.de>
4 */
5
6 #include <dt-bindings/firmware/imx/rsrc.h>
7 #include <linux/arm-smccc.h>
8 #include <linux/clk.h>
9 #include <linux/err.h>
10 #include <linux/firmware/imx/sci.h>
11 #include <linux/interrupt.h>
12 #include <linux/kernel.h>
13 #include <linux/mailbox_client.h>
14 #include <linux/mfd/syscon.h>
15 #include <linux/module.h>
16 #include <linux/of.h>
17 #include <linux/of_address.h>
18 #include <linux/of_reserved_mem.h>
19 #include <linux/platform_device.h>
20 #include <linux/pm_domain.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/reboot.h>
23 #include <linux/regmap.h>
24 #include <linux/remoteproc.h>
25 #include <linux/workqueue.h>
26
27 #include "imx_rproc.h"
28 #include "remoteproc_internal.h"
29
30 #define IMX7D_SRC_SCR 0x0C
31 #define IMX7D_ENABLE_M4 BIT(3)
32 #define IMX7D_SW_M4P_RST BIT(2)
33 #define IMX7D_SW_M4C_RST BIT(1)
34 #define IMX7D_SW_M4C_NON_SCLR_RST BIT(0)
35
36 #define IMX7D_M4_RST_MASK (IMX7D_ENABLE_M4 | IMX7D_SW_M4P_RST \
37 | IMX7D_SW_M4C_RST \
38 | IMX7D_SW_M4C_NON_SCLR_RST)
39
40 #define IMX7D_M4_START (IMX7D_ENABLE_M4 | IMX7D_SW_M4P_RST \
41 | IMX7D_SW_M4C_RST)
42 #define IMX7D_M4_STOP (IMX7D_ENABLE_M4 | IMX7D_SW_M4C_RST | \
43 IMX7D_SW_M4C_NON_SCLR_RST)
44
45 #define IMX8M_M7_STOP (IMX7D_ENABLE_M4 | IMX7D_SW_M4C_RST)
46 #define IMX8M_M7_POLL IMX7D_ENABLE_M4
47
48 #define IMX8M_GPR22 0x58
49 #define IMX8M_GPR22_CM7_CPUWAIT BIT(0)
50
51 /* Address: 0x020D8000 */
52 #define IMX6SX_SRC_SCR 0x00
53 #define IMX6SX_ENABLE_M4 BIT(22)
54 #define IMX6SX_SW_M4P_RST BIT(12)
55 #define IMX6SX_SW_M4C_NON_SCLR_RST BIT(4)
56 #define IMX6SX_SW_M4C_RST BIT(3)
57
58 #define IMX6SX_M4_START (IMX6SX_ENABLE_M4 | IMX6SX_SW_M4P_RST \
59 | IMX6SX_SW_M4C_RST)
60 #define IMX6SX_M4_STOP (IMX6SX_ENABLE_M4 | IMX6SX_SW_M4C_RST | \
61 IMX6SX_SW_M4C_NON_SCLR_RST)
62 #define IMX6SX_M4_RST_MASK (IMX6SX_ENABLE_M4 | IMX6SX_SW_M4P_RST \
63 | IMX6SX_SW_M4C_NON_SCLR_RST \
64 | IMX6SX_SW_M4C_RST)
65
66 #define IMX_RPROC_MEM_MAX 32
67
68 #define IMX_SIP_RPROC 0xC2000005
69 #define IMX_SIP_RPROC_START 0x00
70 #define IMX_SIP_RPROC_STARTED 0x01
71 #define IMX_SIP_RPROC_STOP 0x02
72
73 #define IMX_SC_IRQ_GROUP_REBOOTED 5
74
75 /**
76 * struct imx_rproc_mem - slim internal memory structure
77 * @cpu_addr: MPU virtual address of the memory region
78 * @sys_addr: Bus address used to access the memory region
79 * @size: Size of the memory region
80 */
81 struct imx_rproc_mem {
82 void __iomem *cpu_addr;
83 phys_addr_t sys_addr;
84 size_t size;
85 };
86
87 /* att flags: lower 16 bits specifying core, higher 16 bits for flags */
88 /* M4 own area. Can be mapped at probe */
89 #define ATT_OWN BIT(31)
90 #define ATT_IOMEM BIT(30)
91
92 #define ATT_CORE_MASK 0xffff
93 #define ATT_CORE(I) BIT((I))
94
95 static int imx_rproc_xtr_mbox_init(struct rproc *rproc, bool tx_block);
96 static void imx_rproc_free_mbox(struct rproc *rproc);
97
98 struct imx_rproc {
99 struct device *dev;
100 struct regmap *regmap;
101 struct regmap *gpr;
102 struct rproc *rproc;
103 const struct imx_rproc_dcfg *dcfg;
104 struct imx_rproc_mem mem[IMX_RPROC_MEM_MAX];
105 struct clk *clk;
106 struct mbox_client cl;
107 struct mbox_chan *tx_ch;
108 struct mbox_chan *rx_ch;
109 struct work_struct rproc_work;
110 struct workqueue_struct *workqueue;
111 void __iomem *rsc_table;
112 struct imx_sc_ipc *ipc_handle;
113 struct notifier_block rproc_nb;
114 u32 rproc_pt; /* partition id */
115 u32 rsrc_id; /* resource id */
116 u32 entry; /* cpu start address */
117 u32 core_index;
118 struct dev_pm_domain_list *pd_list;
119 };
120
121 static const struct imx_rproc_att imx_rproc_att_imx93[] = {
122 /* dev addr , sys addr , size , flags */
123 /* TCM CODE NON-SECURE */
124 { 0x0FFC0000, 0x201C0000, 0x00040000, ATT_OWN | ATT_IOMEM },
125
126 /* TCM CODE SECURE */
127 { 0x1FFC0000, 0x201C0000, 0x00040000, ATT_OWN | ATT_IOMEM },
128
129 /* TCM SYS NON-SECURE*/
130 { 0x20000000, 0x20200000, 0x00040000, ATT_OWN | ATT_IOMEM },
131
132 /* TCM SYS SECURE*/
133 { 0x30000000, 0x20200000, 0x00040000, ATT_OWN | ATT_IOMEM },
134
135 /* DDR */
136 { 0x80000000, 0x80000000, 0x10000000, 0 },
137 { 0x90000000, 0x80000000, 0x10000000, 0 },
138
139 { 0xC0000000, 0xC0000000, 0x10000000, 0 },
140 { 0xD0000000, 0xC0000000, 0x10000000, 0 },
141 };
142
143 static const struct imx_rproc_att imx_rproc_att_imx8qm[] = {
144 /* dev addr , sys addr , size , flags */
145 { 0x08000000, 0x08000000, 0x10000000, 0},
146 /* TCML */
147 { 0x1FFE0000, 0x34FE0000, 0x00020000, ATT_OWN | ATT_IOMEM | ATT_CORE(0)},
148 { 0x1FFE0000, 0x38FE0000, 0x00020000, ATT_OWN | ATT_IOMEM | ATT_CORE(1)},
149 /* TCMU */
150 { 0x20000000, 0x35000000, 0x00020000, ATT_OWN | ATT_IOMEM | ATT_CORE(0)},
151 { 0x20000000, 0x39000000, 0x00020000, ATT_OWN | ATT_IOMEM | ATT_CORE(1)},
152 /* DDR (Data) */
153 { 0x80000000, 0x80000000, 0x60000000, 0 },
154 };
155
156 static const struct imx_rproc_att imx_rproc_att_imx8qxp[] = {
157 { 0x08000000, 0x08000000, 0x10000000, 0 },
158 /* TCML/U */
159 { 0x1FFE0000, 0x34FE0000, 0x00040000, ATT_OWN | ATT_IOMEM },
160 /* OCRAM(Low 96KB) */
161 { 0x21000000, 0x00100000, 0x00018000, 0 },
162 /* OCRAM */
163 { 0x21100000, 0x00100000, 0x00040000, 0 },
164 /* DDR (Data) */
165 { 0x80000000, 0x80000000, 0x60000000, 0 },
166 };
167
168 static const struct imx_rproc_att imx_rproc_att_imx8mn[] = {
169 /* dev addr , sys addr , size , flags */
170 /* ITCM */
171 { 0x00000000, 0x007E0000, 0x00020000, ATT_OWN | ATT_IOMEM },
172 /* OCRAM_S */
173 { 0x00180000, 0x00180000, 0x00009000, 0 },
174 /* OCRAM */
175 { 0x00900000, 0x00900000, 0x00020000, 0 },
176 /* OCRAM */
177 { 0x00920000, 0x00920000, 0x00020000, 0 },
178 /* OCRAM */
179 { 0x00940000, 0x00940000, 0x00050000, 0 },
180 /* QSPI Code - alias */
181 { 0x08000000, 0x08000000, 0x08000000, 0 },
182 /* DDR (Code) - alias */
183 { 0x10000000, 0x40000000, 0x0FFE0000, 0 },
184 /* DTCM */
185 { 0x20000000, 0x00800000, 0x00020000, ATT_OWN | ATT_IOMEM },
186 /* OCRAM_S - alias */
187 { 0x20180000, 0x00180000, 0x00008000, ATT_OWN },
188 /* OCRAM */
189 { 0x20200000, 0x00900000, 0x00020000, ATT_OWN },
190 /* OCRAM */
191 { 0x20220000, 0x00920000, 0x00020000, ATT_OWN },
192 /* OCRAM */
193 { 0x20240000, 0x00940000, 0x00040000, ATT_OWN },
194 /* DDR (Data) */
195 { 0x40000000, 0x40000000, 0x80000000, 0 },
196 };
197
198 static const struct imx_rproc_att imx_rproc_att_imx8mq[] = {
199 /* dev addr , sys addr , size , flags */
200 /* TCML - alias */
201 { 0x00000000, 0x007e0000, 0x00020000, ATT_IOMEM},
202 /* OCRAM_S */
203 { 0x00180000, 0x00180000, 0x00008000, 0 },
204 /* OCRAM */
205 { 0x00900000, 0x00900000, 0x00020000, 0 },
206 /* OCRAM */
207 { 0x00920000, 0x00920000, 0x00020000, 0 },
208 /* QSPI Code - alias */
209 { 0x08000000, 0x08000000, 0x08000000, 0 },
210 /* DDR (Code) - alias */
211 { 0x10000000, 0x40000000, 0x0FFE0000, 0 },
212 /* TCML/U */
213 { 0x1FFE0000, 0x007E0000, 0x00040000, ATT_OWN | ATT_IOMEM},
214 /* OCRAM_S */
215 { 0x20180000, 0x00180000, 0x00008000, ATT_OWN },
216 /* OCRAM */
217 { 0x20200000, 0x00900000, 0x00020000, ATT_OWN },
218 /* OCRAM */
219 { 0x20220000, 0x00920000, 0x00020000, ATT_OWN },
220 /* DDR (Data) */
221 { 0x40000000, 0x40000000, 0x80000000, 0 },
222 };
223
224 static const struct imx_rproc_att imx_rproc_att_imx8ulp[] = {
225 {0x1FFC0000, 0x1FFC0000, 0xC0000, ATT_OWN},
226 {0x21000000, 0x21000000, 0x10000, ATT_OWN},
227 {0x80000000, 0x80000000, 0x60000000, 0}
228 };
229
230 static const struct imx_rproc_att imx_rproc_att_imx7ulp[] = {
231 {0x1FFD0000, 0x1FFD0000, 0x30000, ATT_OWN},
232 {0x20000000, 0x20000000, 0x10000, ATT_OWN},
233 {0x2F000000, 0x2F000000, 0x20000, ATT_OWN},
234 {0x2F020000, 0x2F020000, 0x20000, ATT_OWN},
235 {0x60000000, 0x60000000, 0x40000000, 0}
236 };
237
238 static const struct imx_rproc_att imx_rproc_att_imx7d[] = {
239 /* dev addr , sys addr , size , flags */
240 /* OCRAM_S (M4 Boot code) - alias */
241 { 0x00000000, 0x00180000, 0x00008000, 0 },
242 /* OCRAM_S (Code) */
243 { 0x00180000, 0x00180000, 0x00008000, ATT_OWN },
244 /* OCRAM (Code) - alias */
245 { 0x00900000, 0x00900000, 0x00020000, 0 },
246 /* OCRAM_EPDC (Code) - alias */
247 { 0x00920000, 0x00920000, 0x00020000, 0 },
248 /* OCRAM_PXP (Code) - alias */
249 { 0x00940000, 0x00940000, 0x00008000, 0 },
250 /* TCML (Code) */
251 { 0x1FFF8000, 0x007F8000, 0x00008000, ATT_OWN | ATT_IOMEM },
252 /* DDR (Code) - alias, first part of DDR (Data) */
253 { 0x10000000, 0x80000000, 0x0FFF0000, 0 },
254
255 /* TCMU (Data) */
256 { 0x20000000, 0x00800000, 0x00008000, ATT_OWN | ATT_IOMEM },
257 /* OCRAM (Data) */
258 { 0x20200000, 0x00900000, 0x00020000, 0 },
259 /* OCRAM_EPDC (Data) */
260 { 0x20220000, 0x00920000, 0x00020000, 0 },
261 /* OCRAM_PXP (Data) */
262 { 0x20240000, 0x00940000, 0x00008000, 0 },
263 /* DDR (Data) */
264 { 0x80000000, 0x80000000, 0x60000000, 0 },
265 };
266
267 static const struct imx_rproc_att imx_rproc_att_imx6sx[] = {
268 /* dev addr , sys addr , size , flags */
269 /* TCML (M4 Boot Code) - alias */
270 { 0x00000000, 0x007F8000, 0x00008000, ATT_IOMEM },
271 /* OCRAM_S (Code) */
272 { 0x00180000, 0x008F8000, 0x00004000, 0 },
273 /* OCRAM_S (Code) - alias */
274 { 0x00180000, 0x008FC000, 0x00004000, 0 },
275 /* TCML (Code) */
276 { 0x1FFF8000, 0x007F8000, 0x00008000, ATT_OWN | ATT_IOMEM },
277 /* DDR (Code) - alias, first part of DDR (Data) */
278 { 0x10000000, 0x80000000, 0x0FFF8000, 0 },
279
280 /* TCMU (Data) */
281 { 0x20000000, 0x00800000, 0x00008000, ATT_OWN | ATT_IOMEM },
282 /* OCRAM_S (Data) - alias? */
283 { 0x208F8000, 0x008F8000, 0x00004000, 0 },
284 /* DDR (Data) */
285 { 0x80000000, 0x80000000, 0x60000000, 0 },
286 };
287
288 static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mn_mmio = {
289 .src_reg = IMX7D_SRC_SCR,
290 .src_mask = IMX7D_M4_RST_MASK,
291 .src_start = IMX7D_M4_START,
292 .src_stop = IMX8M_M7_STOP,
293 .gpr_reg = IMX8M_GPR22,
294 .gpr_wait = IMX8M_GPR22_CM7_CPUWAIT,
295 .att = imx_rproc_att_imx8mn,
296 .att_size = ARRAY_SIZE(imx_rproc_att_imx8mn),
297 .method = IMX_RPROC_MMIO,
298 };
299
300 static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mn = {
301 .att = imx_rproc_att_imx8mn,
302 .att_size = ARRAY_SIZE(imx_rproc_att_imx8mn),
303 .method = IMX_RPROC_SMC,
304 };
305
306 static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mq = {
307 .src_reg = IMX7D_SRC_SCR,
308 .src_mask = IMX7D_M4_RST_MASK,
309 .src_start = IMX7D_M4_START,
310 .src_stop = IMX7D_M4_STOP,
311 .att = imx_rproc_att_imx8mq,
312 .att_size = ARRAY_SIZE(imx_rproc_att_imx8mq),
313 .method = IMX_RPROC_MMIO,
314 };
315
316 static const struct imx_rproc_dcfg imx_rproc_cfg_imx8qm = {
317 .att = imx_rproc_att_imx8qm,
318 .att_size = ARRAY_SIZE(imx_rproc_att_imx8qm),
319 .method = IMX_RPROC_SCU_API,
320 };
321
322 static const struct imx_rproc_dcfg imx_rproc_cfg_imx8qxp = {
323 .att = imx_rproc_att_imx8qxp,
324 .att_size = ARRAY_SIZE(imx_rproc_att_imx8qxp),
325 .method = IMX_RPROC_SCU_API,
326 };
327
328 static const struct imx_rproc_dcfg imx_rproc_cfg_imx8ulp = {
329 .att = imx_rproc_att_imx8ulp,
330 .att_size = ARRAY_SIZE(imx_rproc_att_imx8ulp),
331 .method = IMX_RPROC_NONE,
332 };
333
334 static const struct imx_rproc_dcfg imx_rproc_cfg_imx7ulp = {
335 .att = imx_rproc_att_imx7ulp,
336 .att_size = ARRAY_SIZE(imx_rproc_att_imx7ulp),
337 .method = IMX_RPROC_NONE,
338 .flags = IMX_RPROC_NEED_SYSTEM_OFF,
339 };
340
341 static const struct imx_rproc_dcfg imx_rproc_cfg_imx7d = {
342 .src_reg = IMX7D_SRC_SCR,
343 .src_mask = IMX7D_M4_RST_MASK,
344 .src_start = IMX7D_M4_START,
345 .src_stop = IMX7D_M4_STOP,
346 .att = imx_rproc_att_imx7d,
347 .att_size = ARRAY_SIZE(imx_rproc_att_imx7d),
348 .method = IMX_RPROC_MMIO,
349 };
350
351 static const struct imx_rproc_dcfg imx_rproc_cfg_imx6sx = {
352 .src_reg = IMX6SX_SRC_SCR,
353 .src_mask = IMX6SX_M4_RST_MASK,
354 .src_start = IMX6SX_M4_START,
355 .src_stop = IMX6SX_M4_STOP,
356 .att = imx_rproc_att_imx6sx,
357 .att_size = ARRAY_SIZE(imx_rproc_att_imx6sx),
358 .method = IMX_RPROC_MMIO,
359 };
360
361 static const struct imx_rproc_dcfg imx_rproc_cfg_imx93 = {
362 .att = imx_rproc_att_imx93,
363 .att_size = ARRAY_SIZE(imx_rproc_att_imx93),
364 .method = IMX_RPROC_SMC,
365 };
366
imx_rproc_start(struct rproc * rproc)367 static int imx_rproc_start(struct rproc *rproc)
368 {
369 struct imx_rproc *priv = rproc->priv;
370 const struct imx_rproc_dcfg *dcfg = priv->dcfg;
371 struct device *dev = priv->dev;
372 struct arm_smccc_res res;
373 int ret;
374
375 ret = imx_rproc_xtr_mbox_init(rproc, true);
376 if (ret)
377 return ret;
378
379 switch (dcfg->method) {
380 case IMX_RPROC_MMIO:
381 if (priv->gpr) {
382 ret = regmap_clear_bits(priv->gpr, dcfg->gpr_reg,
383 dcfg->gpr_wait);
384 } else {
385 ret = regmap_update_bits(priv->regmap, dcfg->src_reg,
386 dcfg->src_mask,
387 dcfg->src_start);
388 }
389 break;
390 case IMX_RPROC_SMC:
391 arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_START, 0, 0, 0, 0, 0, 0, &res);
392 ret = res.a0;
393 break;
394 case IMX_RPROC_SCU_API:
395 ret = imx_sc_pm_cpu_start(priv->ipc_handle, priv->rsrc_id, true, priv->entry);
396 break;
397 default:
398 return -EOPNOTSUPP;
399 }
400
401 if (ret)
402 dev_err(dev, "Failed to enable remote core!\n");
403
404 return ret;
405 }
406
imx_rproc_stop(struct rproc * rproc)407 static int imx_rproc_stop(struct rproc *rproc)
408 {
409 struct imx_rproc *priv = rproc->priv;
410 const struct imx_rproc_dcfg *dcfg = priv->dcfg;
411 struct device *dev = priv->dev;
412 struct arm_smccc_res res;
413 int ret;
414
415 switch (dcfg->method) {
416 case IMX_RPROC_MMIO:
417 if (priv->gpr) {
418 ret = regmap_set_bits(priv->gpr, dcfg->gpr_reg,
419 dcfg->gpr_wait);
420 if (ret) {
421 dev_err(priv->dev,
422 "Failed to quiescence M4 platform!\n");
423 return ret;
424 }
425 }
426
427 ret = regmap_update_bits(priv->regmap, dcfg->src_reg, dcfg->src_mask,
428 dcfg->src_stop);
429 break;
430 case IMX_RPROC_SMC:
431 arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_STOP, 0, 0, 0, 0, 0, 0, &res);
432 ret = res.a0;
433 if (res.a1)
434 dev_info(dev, "Not in wfi, force stopped\n");
435 break;
436 case IMX_RPROC_SCU_API:
437 ret = imx_sc_pm_cpu_start(priv->ipc_handle, priv->rsrc_id, false, priv->entry);
438 break;
439 default:
440 return -EOPNOTSUPP;
441 }
442
443 if (ret)
444 dev_err(dev, "Failed to stop remote core\n");
445 else
446 imx_rproc_free_mbox(rproc);
447
448 return ret;
449 }
450
imx_rproc_da_to_sys(struct imx_rproc * priv,u64 da,size_t len,u64 * sys,bool * is_iomem)451 static int imx_rproc_da_to_sys(struct imx_rproc *priv, u64 da,
452 size_t len, u64 *sys, bool *is_iomem)
453 {
454 const struct imx_rproc_dcfg *dcfg = priv->dcfg;
455 int i;
456
457 /* parse address translation table */
458 for (i = 0; i < dcfg->att_size; i++) {
459 const struct imx_rproc_att *att = &dcfg->att[i];
460
461 /*
462 * Ignore entries not belong to current core:
463 * i.MX8QM has dual general M4_[0,1] cores, M4_0's own entries
464 * has "ATT_CORE(0) & BIT(0)" true, M4_1's own entries has
465 * "ATT_CORE(1) & BIT(1)" true.
466 */
467 if (att->flags & ATT_CORE_MASK) {
468 if (!((BIT(priv->core_index)) & (att->flags & ATT_CORE_MASK)))
469 continue;
470 }
471
472 if (da >= att->da && da + len < att->da + att->size) {
473 unsigned int offset = da - att->da;
474
475 *sys = att->sa + offset;
476 if (is_iomem)
477 *is_iomem = att->flags & ATT_IOMEM;
478 return 0;
479 }
480 }
481
482 dev_warn(priv->dev, "Translation failed: da = 0x%llx len = 0x%zx\n",
483 da, len);
484 return -ENOENT;
485 }
486
imx_rproc_da_to_va(struct rproc * rproc,u64 da,size_t len,bool * is_iomem)487 static void *imx_rproc_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem)
488 {
489 struct imx_rproc *priv = rproc->priv;
490 void *va = NULL;
491 u64 sys;
492 int i;
493
494 if (len == 0)
495 return NULL;
496
497 /*
498 * On device side we have many aliases, so we need to convert device
499 * address (M4) to system bus address first.
500 */
501 if (imx_rproc_da_to_sys(priv, da, len, &sys, is_iomem))
502 return NULL;
503
504 for (i = 0; i < IMX_RPROC_MEM_MAX; i++) {
505 if (sys >= priv->mem[i].sys_addr && sys + len <
506 priv->mem[i].sys_addr + priv->mem[i].size) {
507 unsigned int offset = sys - priv->mem[i].sys_addr;
508 /* __force to make sparse happy with type conversion */
509 va = (__force void *)(priv->mem[i].cpu_addr + offset);
510 break;
511 }
512 }
513
514 dev_dbg(&rproc->dev, "da = 0x%llx len = 0x%zx va = 0x%p\n",
515 da, len, va);
516
517 return va;
518 }
519
imx_rproc_mem_alloc(struct rproc * rproc,struct rproc_mem_entry * mem)520 static int imx_rproc_mem_alloc(struct rproc *rproc,
521 struct rproc_mem_entry *mem)
522 {
523 struct device *dev = rproc->dev.parent;
524 void *va;
525
526 dev_dbg(dev, "map memory: %p+%zx\n", &mem->dma, mem->len);
527 va = ioremap_wc(mem->dma, mem->len);
528 if (IS_ERR_OR_NULL(va)) {
529 dev_err(dev, "Unable to map memory region: %p+%zx\n",
530 &mem->dma, mem->len);
531 return -ENOMEM;
532 }
533
534 /* Update memory entry va */
535 mem->va = va;
536
537 return 0;
538 }
539
imx_rproc_mem_release(struct rproc * rproc,struct rproc_mem_entry * mem)540 static int imx_rproc_mem_release(struct rproc *rproc,
541 struct rproc_mem_entry *mem)
542 {
543 dev_dbg(rproc->dev.parent, "unmap memory: %pa\n", &mem->dma);
544 iounmap(mem->va);
545
546 return 0;
547 }
548
imx_rproc_prepare(struct rproc * rproc)549 static int imx_rproc_prepare(struct rproc *rproc)
550 {
551 struct imx_rproc *priv = rproc->priv;
552 struct device_node *np = priv->dev->of_node;
553 struct of_phandle_iterator it;
554 struct rproc_mem_entry *mem;
555 struct reserved_mem *rmem;
556 u32 da;
557
558 /* Register associated reserved memory regions */
559 of_phandle_iterator_init(&it, np, "memory-region", NULL, 0);
560 while (of_phandle_iterator_next(&it) == 0) {
561 /*
562 * Ignore the first memory region which will be used vdev buffer.
563 * No need to do extra handlings, rproc_add_virtio_dev will handle it.
564 */
565 if (!strcmp(it.node->name, "vdev0buffer"))
566 continue;
567
568 if (!strcmp(it.node->name, "rsc-table"))
569 continue;
570
571 rmem = of_reserved_mem_lookup(it.node);
572 if (!rmem) {
573 of_node_put(it.node);
574 dev_err(priv->dev, "unable to acquire memory-region\n");
575 return -EINVAL;
576 }
577
578 /* No need to translate pa to da, i.MX use same map */
579 da = rmem->base;
580
581 /* Register memory region */
582 mem = rproc_mem_entry_init(priv->dev, NULL, (dma_addr_t)rmem->base, rmem->size, da,
583 imx_rproc_mem_alloc, imx_rproc_mem_release,
584 it.node->name);
585
586 if (mem) {
587 rproc_coredump_add_segment(rproc, da, rmem->size);
588 } else {
589 of_node_put(it.node);
590 return -ENOMEM;
591 }
592
593 rproc_add_carveout(rproc, mem);
594 }
595
596 return 0;
597 }
598
imx_rproc_parse_fw(struct rproc * rproc,const struct firmware * fw)599 static int imx_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw)
600 {
601 int ret;
602
603 ret = rproc_elf_load_rsc_table(rproc, fw);
604 if (ret)
605 dev_info(&rproc->dev, "No resource table in elf\n");
606
607 return 0;
608 }
609
imx_rproc_kick(struct rproc * rproc,int vqid)610 static void imx_rproc_kick(struct rproc *rproc, int vqid)
611 {
612 struct imx_rproc *priv = rproc->priv;
613 int err;
614 __u32 mmsg;
615
616 if (!priv->tx_ch) {
617 dev_err(priv->dev, "No initialized mbox tx channel\n");
618 return;
619 }
620
621 /*
622 * Send the index of the triggered virtqueue as the mu payload.
623 * Let remote processor know which virtqueue is used.
624 */
625 mmsg = vqid << 16;
626
627 err = mbox_send_message(priv->tx_ch, (void *)&mmsg);
628 if (err < 0)
629 dev_err(priv->dev, "%s: failed (%d, err:%d)\n",
630 __func__, vqid, err);
631 }
632
imx_rproc_attach(struct rproc * rproc)633 static int imx_rproc_attach(struct rproc *rproc)
634 {
635 return imx_rproc_xtr_mbox_init(rproc, true);
636 }
637
imx_rproc_detach(struct rproc * rproc)638 static int imx_rproc_detach(struct rproc *rproc)
639 {
640 struct imx_rproc *priv = rproc->priv;
641 const struct imx_rproc_dcfg *dcfg = priv->dcfg;
642
643 if (dcfg->method != IMX_RPROC_SCU_API)
644 return -EOPNOTSUPP;
645
646 if (imx_sc_rm_is_resource_owned(priv->ipc_handle, priv->rsrc_id))
647 return -EOPNOTSUPP;
648
649 imx_rproc_free_mbox(rproc);
650
651 return 0;
652 }
653
imx_rproc_get_loaded_rsc_table(struct rproc * rproc,size_t * table_sz)654 static struct resource_table *imx_rproc_get_loaded_rsc_table(struct rproc *rproc, size_t *table_sz)
655 {
656 struct imx_rproc *priv = rproc->priv;
657
658 /* The resource table has already been mapped in imx_rproc_addr_init */
659 if (!priv->rsc_table)
660 return NULL;
661
662 *table_sz = SZ_1K;
663 return (struct resource_table *)priv->rsc_table;
664 }
665
666 static struct resource_table *
imx_rproc_elf_find_loaded_rsc_table(struct rproc * rproc,const struct firmware * fw)667 imx_rproc_elf_find_loaded_rsc_table(struct rproc *rproc, const struct firmware *fw)
668 {
669 struct imx_rproc *priv = rproc->priv;
670
671 if (priv->rsc_table)
672 return (struct resource_table *)priv->rsc_table;
673
674 return rproc_elf_find_loaded_rsc_table(rproc, fw);
675 }
676
677 static const struct rproc_ops imx_rproc_ops = {
678 .prepare = imx_rproc_prepare,
679 .attach = imx_rproc_attach,
680 .detach = imx_rproc_detach,
681 .start = imx_rproc_start,
682 .stop = imx_rproc_stop,
683 .kick = imx_rproc_kick,
684 .da_to_va = imx_rproc_da_to_va,
685 .load = rproc_elf_load_segments,
686 .parse_fw = imx_rproc_parse_fw,
687 .find_loaded_rsc_table = imx_rproc_elf_find_loaded_rsc_table,
688 .get_loaded_rsc_table = imx_rproc_get_loaded_rsc_table,
689 .sanity_check = rproc_elf_sanity_check,
690 .get_boot_addr = rproc_elf_get_boot_addr,
691 };
692
imx_rproc_addr_init(struct imx_rproc * priv,struct platform_device * pdev)693 static int imx_rproc_addr_init(struct imx_rproc *priv,
694 struct platform_device *pdev)
695 {
696 const struct imx_rproc_dcfg *dcfg = priv->dcfg;
697 struct device *dev = &pdev->dev;
698 struct device_node *np = dev->of_node;
699 int a, b = 0, err, nph;
700
701 /* remap required addresses */
702 for (a = 0; a < dcfg->att_size; a++) {
703 const struct imx_rproc_att *att = &dcfg->att[a];
704
705 if (!(att->flags & ATT_OWN))
706 continue;
707
708 if (b >= IMX_RPROC_MEM_MAX)
709 break;
710
711 if (att->flags & ATT_IOMEM)
712 priv->mem[b].cpu_addr = devm_ioremap(&pdev->dev,
713 att->sa, att->size);
714 else
715 priv->mem[b].cpu_addr = devm_ioremap_wc(&pdev->dev,
716 att->sa, att->size);
717 if (!priv->mem[b].cpu_addr) {
718 dev_err(dev, "failed to remap %#x bytes from %#x\n", att->size, att->sa);
719 return -ENOMEM;
720 }
721 priv->mem[b].sys_addr = att->sa;
722 priv->mem[b].size = att->size;
723 b++;
724 }
725
726 /* memory-region is optional property */
727 nph = of_count_phandle_with_args(np, "memory-region", NULL);
728 if (nph <= 0)
729 return 0;
730
731 /* remap optional addresses */
732 for (a = 0; a < nph; a++) {
733 struct device_node *node;
734 struct resource res;
735
736 node = of_parse_phandle(np, "memory-region", a);
737 if (!node)
738 continue;
739 /* Not map vdevbuffer, vdevring region */
740 if (!strncmp(node->name, "vdev", strlen("vdev"))) {
741 of_node_put(node);
742 continue;
743 }
744 err = of_address_to_resource(node, 0, &res);
745 if (err) {
746 dev_err(dev, "unable to resolve memory region\n");
747 of_node_put(node);
748 return err;
749 }
750
751 if (b >= IMX_RPROC_MEM_MAX) {
752 of_node_put(node);
753 break;
754 }
755
756 /* Not use resource version, because we might share region */
757 priv->mem[b].cpu_addr = devm_ioremap_wc(&pdev->dev, res.start, resource_size(&res));
758 if (!priv->mem[b].cpu_addr) {
759 dev_err(dev, "failed to remap %pr\n", &res);
760 of_node_put(node);
761 return -ENOMEM;
762 }
763 priv->mem[b].sys_addr = res.start;
764 priv->mem[b].size = resource_size(&res);
765 if (!strcmp(node->name, "rsc-table"))
766 priv->rsc_table = priv->mem[b].cpu_addr;
767 of_node_put(node);
768 b++;
769 }
770
771 return 0;
772 }
773
imx_rproc_notified_idr_cb(int id,void * ptr,void * data)774 static int imx_rproc_notified_idr_cb(int id, void *ptr, void *data)
775 {
776 struct rproc *rproc = data;
777
778 rproc_vq_interrupt(rproc, id);
779
780 return 0;
781 }
782
imx_rproc_vq_work(struct work_struct * work)783 static void imx_rproc_vq_work(struct work_struct *work)
784 {
785 struct imx_rproc *priv = container_of(work, struct imx_rproc,
786 rproc_work);
787 struct rproc *rproc = priv->rproc;
788
789 idr_for_each(&rproc->notifyids, imx_rproc_notified_idr_cb, rproc);
790 }
791
imx_rproc_rx_callback(struct mbox_client * cl,void * msg)792 static void imx_rproc_rx_callback(struct mbox_client *cl, void *msg)
793 {
794 struct rproc *rproc = dev_get_drvdata(cl->dev);
795 struct imx_rproc *priv = rproc->priv;
796
797 queue_work(priv->workqueue, &priv->rproc_work);
798 }
799
imx_rproc_xtr_mbox_init(struct rproc * rproc,bool tx_block)800 static int imx_rproc_xtr_mbox_init(struct rproc *rproc, bool tx_block)
801 {
802 struct imx_rproc *priv = rproc->priv;
803 struct device *dev = priv->dev;
804 struct mbox_client *cl;
805
806 /*
807 * stop() and detach() will free the mbox channels, so need
808 * to request mbox channels in start() and attach().
809 *
810 * Because start() and attach() not able to handle mbox defer
811 * probe, imx_rproc_xtr_mbox_init is also called in probe().
812 * The check is to avoid request mbox again when start() or
813 * attach() after probe() returns success.
814 */
815 if (priv->tx_ch && priv->rx_ch)
816 return 0;
817
818 if (!of_property_present(dev->of_node, "mbox-names"))
819 return 0;
820
821 cl = &priv->cl;
822 cl->dev = dev;
823 cl->tx_block = tx_block;
824 cl->tx_tout = 100;
825 cl->knows_txdone = false;
826 cl->rx_callback = imx_rproc_rx_callback;
827
828 priv->tx_ch = mbox_request_channel_byname(cl, "tx");
829 if (IS_ERR(priv->tx_ch))
830 return dev_err_probe(cl->dev, PTR_ERR(priv->tx_ch),
831 "failed to request tx mailbox channel\n");
832
833 priv->rx_ch = mbox_request_channel_byname(cl, "rx");
834 if (IS_ERR(priv->rx_ch)) {
835 mbox_free_channel(priv->tx_ch);
836 return dev_err_probe(cl->dev, PTR_ERR(priv->rx_ch),
837 "failed to request rx mailbox channel\n");
838 }
839
840 return 0;
841 }
842
imx_rproc_free_mbox(struct rproc * rproc)843 static void imx_rproc_free_mbox(struct rproc *rproc)
844 {
845 struct imx_rproc *priv = rproc->priv;
846
847 if (priv->tx_ch) {
848 mbox_free_channel(priv->tx_ch);
849 priv->tx_ch = NULL;
850 }
851
852 if (priv->rx_ch) {
853 mbox_free_channel(priv->rx_ch);
854 priv->rx_ch = NULL;
855 }
856 }
857
imx_rproc_put_scu(struct rproc * rproc)858 static void imx_rproc_put_scu(struct rproc *rproc)
859 {
860 struct imx_rproc *priv = rproc->priv;
861 const struct imx_rproc_dcfg *dcfg = priv->dcfg;
862
863 if (dcfg->method != IMX_RPROC_SCU_API)
864 return;
865
866 if (imx_sc_rm_is_resource_owned(priv->ipc_handle, priv->rsrc_id)) {
867 dev_pm_domain_detach_list(priv->pd_list);
868 return;
869 }
870
871 imx_scu_irq_group_enable(IMX_SC_IRQ_GROUP_REBOOTED, BIT(priv->rproc_pt), false);
872 imx_scu_irq_unregister_notifier(&priv->rproc_nb);
873 }
874
imx_rproc_partition_notify(struct notifier_block * nb,unsigned long event,void * group)875 static int imx_rproc_partition_notify(struct notifier_block *nb,
876 unsigned long event, void *group)
877 {
878 struct imx_rproc *priv = container_of(nb, struct imx_rproc, rproc_nb);
879
880 /* Ignore other irqs */
881 if (!((event & BIT(priv->rproc_pt)) && (*(u8 *)group == IMX_SC_IRQ_GROUP_REBOOTED)))
882 return 0;
883
884 rproc_report_crash(priv->rproc, RPROC_WATCHDOG);
885
886 pr_info("Partition%d reset!\n", priv->rproc_pt);
887
888 return 0;
889 }
890
imx_rproc_attach_pd(struct imx_rproc * priv)891 static int imx_rproc_attach_pd(struct imx_rproc *priv)
892 {
893 struct device *dev = priv->dev;
894 int ret, i;
895 bool detached = true;
896
897 /*
898 * If there is only one power-domain entry, the platform driver framework
899 * will handle it, no need handle it in this driver.
900 */
901 if (dev->pm_domain)
902 return 0;
903
904 ret = dev_pm_domain_attach_list(dev, NULL, &priv->pd_list);
905 if (ret < 0)
906 return ret;
907 /*
908 * If all the power domain devices are already turned on, the remote
909 * core is already powered up and running when the kernel booted (e.g.,
910 * started by U-Boot's bootaux command). In this case attach to it.
911 */
912 for (i = 0; i < ret; i++) {
913 if (!dev_pm_genpd_is_on(priv->pd_list->pd_devs[i])) {
914 detached = false;
915 break;
916 }
917 }
918
919 if (detached)
920 priv->rproc->state = RPROC_DETACHED;
921
922 return 0;
923 }
924
imx_rproc_detect_mode(struct imx_rproc * priv)925 static int imx_rproc_detect_mode(struct imx_rproc *priv)
926 {
927 struct regmap_config config = { .name = "imx-rproc" };
928 const struct imx_rproc_dcfg *dcfg = priv->dcfg;
929 struct device *dev = priv->dev;
930 struct regmap *regmap;
931 struct arm_smccc_res res;
932 int ret;
933 u32 val;
934 u8 pt;
935
936 switch (dcfg->method) {
937 case IMX_RPROC_NONE:
938 priv->rproc->state = RPROC_DETACHED;
939 return 0;
940 case IMX_RPROC_SMC:
941 arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_STARTED, 0, 0, 0, 0, 0, 0, &res);
942 if (res.a0)
943 priv->rproc->state = RPROC_DETACHED;
944 return 0;
945 case IMX_RPROC_SCU_API:
946 ret = imx_scu_get_handle(&priv->ipc_handle);
947 if (ret)
948 return ret;
949 ret = of_property_read_u32(dev->of_node, "fsl,resource-id", &priv->rsrc_id);
950 if (ret) {
951 dev_err(dev, "No fsl,resource-id property\n");
952 return ret;
953 }
954
955 if (priv->rsrc_id == IMX_SC_R_M4_1_PID0)
956 priv->core_index = 1;
957 else
958 priv->core_index = 0;
959
960 /*
961 * If Mcore resource is not owned by Acore partition, It is kicked by ROM,
962 * and Linux could only do IPC with Mcore and nothing else.
963 */
964 if (imx_sc_rm_is_resource_owned(priv->ipc_handle, priv->rsrc_id)) {
965 if (of_property_read_u32(dev->of_node, "fsl,entry-address", &priv->entry))
966 return -EINVAL;
967
968 return imx_rproc_attach_pd(priv);
969 }
970
971 priv->rproc->state = RPROC_DETACHED;
972 priv->rproc->recovery_disabled = false;
973 rproc_set_feature(priv->rproc, RPROC_FEAT_ATTACH_ON_RECOVERY);
974
975 /* Get partition id and enable irq in SCFW */
976 ret = imx_sc_rm_get_resource_owner(priv->ipc_handle, priv->rsrc_id, &pt);
977 if (ret) {
978 dev_err(dev, "not able to get resource owner\n");
979 return ret;
980 }
981
982 priv->rproc_pt = pt;
983 priv->rproc_nb.notifier_call = imx_rproc_partition_notify;
984
985 ret = imx_scu_irq_register_notifier(&priv->rproc_nb);
986 if (ret) {
987 dev_err(dev, "register scu notifier failed, %d\n", ret);
988 return ret;
989 }
990
991 ret = imx_scu_irq_group_enable(IMX_SC_IRQ_GROUP_REBOOTED, BIT(priv->rproc_pt),
992 true);
993 if (ret) {
994 imx_scu_irq_unregister_notifier(&priv->rproc_nb);
995 dev_err(dev, "Enable irq failed, %d\n", ret);
996 return ret;
997 }
998
999 return 0;
1000 default:
1001 break;
1002 }
1003
1004 priv->gpr = syscon_regmap_lookup_by_phandle(dev->of_node, "fsl,iomuxc-gpr");
1005 if (IS_ERR(priv->gpr))
1006 priv->gpr = NULL;
1007
1008 regmap = syscon_regmap_lookup_by_phandle(dev->of_node, "syscon");
1009 if (IS_ERR(regmap)) {
1010 dev_err(dev, "failed to find syscon\n");
1011 return PTR_ERR(regmap);
1012 }
1013
1014 priv->regmap = regmap;
1015 regmap_attach_dev(dev, regmap, &config);
1016
1017 if (priv->gpr) {
1018 ret = regmap_read(priv->gpr, dcfg->gpr_reg, &val);
1019 if (val & dcfg->gpr_wait) {
1020 /*
1021 * After cold boot, the CM indicates its in wait
1022 * state, but not fully powered off. Power it off
1023 * fully so firmware can be loaded into it.
1024 */
1025 imx_rproc_stop(priv->rproc);
1026 return 0;
1027 }
1028 }
1029
1030 ret = regmap_read(regmap, dcfg->src_reg, &val);
1031 if (ret) {
1032 dev_err(dev, "Failed to read src\n");
1033 return ret;
1034 }
1035
1036 if ((val & dcfg->src_mask) != dcfg->src_stop)
1037 priv->rproc->state = RPROC_DETACHED;
1038
1039 return 0;
1040 }
1041
imx_rproc_clk_enable(struct imx_rproc * priv)1042 static int imx_rproc_clk_enable(struct imx_rproc *priv)
1043 {
1044 const struct imx_rproc_dcfg *dcfg = priv->dcfg;
1045 struct device *dev = priv->dev;
1046 int ret;
1047
1048 /* Remote core is not under control of Linux or it is managed by SCU API */
1049 if (dcfg->method == IMX_RPROC_NONE || dcfg->method == IMX_RPROC_SCU_API)
1050 return 0;
1051
1052 priv->clk = devm_clk_get(dev, NULL);
1053 if (IS_ERR(priv->clk)) {
1054 dev_err(dev, "Failed to get clock\n");
1055 return PTR_ERR(priv->clk);
1056 }
1057
1058 /*
1059 * clk for M4 block including memory. Should be
1060 * enabled before .start for FW transfer.
1061 */
1062 ret = clk_prepare_enable(priv->clk);
1063 if (ret) {
1064 dev_err(dev, "Failed to enable clock\n");
1065 return ret;
1066 }
1067
1068 return 0;
1069 }
1070
imx_rproc_sys_off_handler(struct sys_off_data * data)1071 static int imx_rproc_sys_off_handler(struct sys_off_data *data)
1072 {
1073 struct rproc *rproc = data->cb_data;
1074 int ret;
1075
1076 imx_rproc_free_mbox(rproc);
1077
1078 ret = imx_rproc_xtr_mbox_init(rproc, false);
1079 if (ret) {
1080 dev_err(&rproc->dev, "Failed to request non-blocking mbox\n");
1081 return NOTIFY_BAD;
1082 }
1083
1084 return NOTIFY_DONE;
1085 }
1086
imx_rproc_probe(struct platform_device * pdev)1087 static int imx_rproc_probe(struct platform_device *pdev)
1088 {
1089 struct device *dev = &pdev->dev;
1090 struct device_node *np = dev->of_node;
1091 struct imx_rproc *priv;
1092 struct rproc *rproc;
1093 const struct imx_rproc_dcfg *dcfg;
1094 int ret;
1095
1096 /* set some other name then imx */
1097 rproc = devm_rproc_alloc(dev, "imx-rproc", &imx_rproc_ops,
1098 NULL, sizeof(*priv));
1099 if (!rproc)
1100 return -ENOMEM;
1101
1102 dcfg = of_device_get_match_data(dev);
1103 if (!dcfg)
1104 return -EINVAL;
1105
1106 priv = rproc->priv;
1107 priv->rproc = rproc;
1108 priv->dcfg = dcfg;
1109 priv->dev = dev;
1110
1111 dev_set_drvdata(dev, rproc);
1112 priv->workqueue = create_workqueue(dev_name(dev));
1113 if (!priv->workqueue) {
1114 dev_err(dev, "cannot create workqueue\n");
1115 return -ENOMEM;
1116 }
1117
1118 INIT_WORK(&priv->rproc_work, imx_rproc_vq_work);
1119
1120 ret = imx_rproc_xtr_mbox_init(rproc, true);
1121 if (ret)
1122 goto err_put_wkq;
1123
1124 ret = imx_rproc_addr_init(priv, pdev);
1125 if (ret) {
1126 dev_err(dev, "failed on imx_rproc_addr_init\n");
1127 goto err_put_mbox;
1128 }
1129
1130 ret = imx_rproc_detect_mode(priv);
1131 if (ret)
1132 goto err_put_mbox;
1133
1134 ret = imx_rproc_clk_enable(priv);
1135 if (ret)
1136 goto err_put_scu;
1137
1138 if (rproc->state != RPROC_DETACHED)
1139 rproc->auto_boot = of_property_read_bool(np, "fsl,auto-boot");
1140
1141 if (dcfg->flags & IMX_RPROC_NEED_SYSTEM_OFF) {
1142 /*
1143 * setup mailbox to non-blocking mode in
1144 * [SYS_OFF_MODE_POWER_OFF_PREPARE, SYS_OFF_MODE_RESTART_PREPARE]
1145 * phase before invoking [SYS_OFF_MODE_POWER_OFF, SYS_OFF_MODE_RESTART]
1146 * atomic chain, see kernel/reboot.c.
1147 */
1148 ret = devm_register_sys_off_handler(dev, SYS_OFF_MODE_POWER_OFF_PREPARE,
1149 SYS_OFF_PRIO_DEFAULT,
1150 imx_rproc_sys_off_handler, rproc);
1151 if (ret) {
1152 dev_err(dev, "register power off handler failure\n");
1153 goto err_put_clk;
1154 }
1155
1156 ret = devm_register_sys_off_handler(dev, SYS_OFF_MODE_RESTART_PREPARE,
1157 SYS_OFF_PRIO_DEFAULT,
1158 imx_rproc_sys_off_handler, rproc);
1159 if (ret) {
1160 dev_err(dev, "register restart handler failure\n");
1161 goto err_put_clk;
1162 }
1163 }
1164
1165 if (dcfg->method == IMX_RPROC_SCU_API) {
1166 pm_runtime_enable(dev);
1167 ret = pm_runtime_resume_and_get(dev);
1168 if (ret) {
1169 dev_err(dev, "pm_runtime get failed: %d\n", ret);
1170 goto err_put_clk;
1171 }
1172 }
1173
1174 ret = rproc_add(rproc);
1175 if (ret) {
1176 dev_err(dev, "rproc_add failed\n");
1177 goto err_put_clk;
1178 }
1179
1180 return 0;
1181
1182 err_put_clk:
1183 clk_disable_unprepare(priv->clk);
1184 err_put_scu:
1185 imx_rproc_put_scu(rproc);
1186 err_put_mbox:
1187 imx_rproc_free_mbox(rproc);
1188 err_put_wkq:
1189 destroy_workqueue(priv->workqueue);
1190
1191 return ret;
1192 }
1193
imx_rproc_remove(struct platform_device * pdev)1194 static void imx_rproc_remove(struct platform_device *pdev)
1195 {
1196 struct rproc *rproc = platform_get_drvdata(pdev);
1197 struct imx_rproc *priv = rproc->priv;
1198
1199 if (priv->dcfg->method == IMX_RPROC_SCU_API) {
1200 pm_runtime_disable(priv->dev);
1201 pm_runtime_put(priv->dev);
1202 }
1203 clk_disable_unprepare(priv->clk);
1204 rproc_del(rproc);
1205 imx_rproc_put_scu(rproc);
1206 imx_rproc_free_mbox(rproc);
1207 destroy_workqueue(priv->workqueue);
1208 }
1209
1210 static const struct of_device_id imx_rproc_of_match[] = {
1211 { .compatible = "fsl,imx7ulp-cm4", .data = &imx_rproc_cfg_imx7ulp },
1212 { .compatible = "fsl,imx7d-cm4", .data = &imx_rproc_cfg_imx7d },
1213 { .compatible = "fsl,imx6sx-cm4", .data = &imx_rproc_cfg_imx6sx },
1214 { .compatible = "fsl,imx8mq-cm4", .data = &imx_rproc_cfg_imx8mq },
1215 { .compatible = "fsl,imx8mm-cm4", .data = &imx_rproc_cfg_imx8mq },
1216 { .compatible = "fsl,imx8mn-cm7", .data = &imx_rproc_cfg_imx8mn },
1217 { .compatible = "fsl,imx8mp-cm7", .data = &imx_rproc_cfg_imx8mn },
1218 { .compatible = "fsl,imx8mn-cm7-mmio", .data = &imx_rproc_cfg_imx8mn_mmio },
1219 { .compatible = "fsl,imx8mp-cm7-mmio", .data = &imx_rproc_cfg_imx8mn_mmio },
1220 { .compatible = "fsl,imx8qxp-cm4", .data = &imx_rproc_cfg_imx8qxp },
1221 { .compatible = "fsl,imx8qm-cm4", .data = &imx_rproc_cfg_imx8qm },
1222 { .compatible = "fsl,imx8ulp-cm33", .data = &imx_rproc_cfg_imx8ulp },
1223 { .compatible = "fsl,imx93-cm33", .data = &imx_rproc_cfg_imx93 },
1224 {},
1225 };
1226 MODULE_DEVICE_TABLE(of, imx_rproc_of_match);
1227
1228 static struct platform_driver imx_rproc_driver = {
1229 .probe = imx_rproc_probe,
1230 .remove = imx_rproc_remove,
1231 .driver = {
1232 .name = "imx-rproc",
1233 .of_match_table = imx_rproc_of_match,
1234 },
1235 };
1236
1237 module_platform_driver(imx_rproc_driver);
1238
1239 MODULE_LICENSE("GPL v2");
1240 MODULE_DESCRIPTION("i.MX remote processor control driver");
1241 MODULE_AUTHOR("Oleksij Rempel <o.rempel@pengutronix.de>");
1242