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Searched defs:gpu (Results 1 – 25 of 114) sorted by relevance

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/linux/drivers/gpu/drm/msm/adreno/
H A Dadreno_gpu.h256 static inline uint8_t adreno_patchid(const struct adreno_gpu *gpu) in adreno_patchid()
266 static inline bool adreno_is_revn(const struct adreno_gpu *gpu, uint32_t revn) in adreno_is_revn()
273 static inline bool adreno_has_gmu_wrapper(const struct adreno_gpu *gpu) in adreno_has_gmu_wrapper()
278 static inline bool adreno_is_a2xx(const struct adreno_gpu *gpu) in adreno_is_a2xx()
285 static inline bool adreno_is_a20x(const struct adreno_gpu *gpu) in adreno_is_a20x()
292 static inline bool adreno_is_a225(const struct adreno_gpu *gpu) in adreno_is_a225()
297 static inline bool adreno_is_a305(const struct adreno_gpu *gpu) in adreno_is_a305()
302 static inline bool adreno_is_a305b(const struct adreno_gpu *gpu) in adreno_is_a305b()
307 static inline bool adreno_is_a306(const struct adreno_gpu *gpu) in adreno_is_a306()
313 static inline bool adreno_is_a306a(const struct adreno_gpu *gpu) in adreno_is_a306a()
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H A Da6xx_gpu.c19 static inline bool _a6xx_check_idle(struct msm_gpu *gpu) in _a6xx_check_idle()
37 static bool a6xx_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in a6xx_idle()
56 static void update_shadow_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in update_shadow_rptr()
69 static void a6xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in a6xx_flush()
222 static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a6xx_submit()
347 static void a7xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a7xx_submit()
511 static void a6xx_set_hwcg(struct msm_gpu *gpu, bool state) in a6xx_set_hwcg()
582 static void a6xx_set_cp_protect(struct msm_gpu *gpu) in a6xx_set_cp_protect()
607 static int a6xx_calc_ubwc_config(struct adreno_gpu *gpu) in a6xx_calc_ubwc_config()
677 static void a6xx_set_ubwc_config(struct msm_gpu *gpu) in a6xx_set_ubwc_config()
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H A Da5xx_gpu.c21 static void update_shadow_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in update_shadow_rptr()
33 void a5xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring, in a5xx_flush()
66 static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a5xx_submit_in_rb()
127 static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a5xx_submit()
446 void a5xx_set_hwcg(struct msm_gpu *gpu, bool state) in a5xx_set_hwcg()
477 static int a5xx_me_init(struct msm_gpu *gpu) in a5xx_me_init()
519 static int a5xx_preempt_start(struct msm_gpu *gpu) in a5xx_preempt_start()
582 static int a5xx_ucode_load(struct msm_gpu *gpu) in a5xx_ucode_load()
644 static int a5xx_zap_shader_resume(struct msm_gpu *gpu) in a5xx_zap_shader_resume()
664 static int a5xx_zap_shader_init(struct msm_gpu *gpu) in a5xx_zap_shader_init()
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H A Dadreno_gpu.c30 static int zap_shader_load_mdt(struct msm_gpu *gpu, const char *fwname, in zap_shader_load_mdt()
176 int adreno_zap_shader_load(struct msm_gpu *gpu, u32 pasid) in adreno_zap_shader_load()
195 adreno_create_vm(struct msm_gpu *gpu, in adreno_create_vm()
202 adreno_iommu_create_vm(struct msm_gpu *gpu, in adreno_iommu_create_vm()
238 u64 adreno_private_vm_size(struct msm_gpu *gpu) in adreno_private_vm_size()
266 struct msm_gpu *gpu = &adreno_gpu->base; in adreno_check_and_reenable_stall() local
292 int adreno_fault_handler(struct msm_gpu *gpu, unsigned long iova, int flags, in adreno_fault_handler()
361 adreno_smmu_has_prr(struct msm_gpu *gpu) in adreno_smmu_has_prr()
367 int adreno_get_param(struct msm_gpu *gpu, struct msm_context *ctx, in adreno_get_param()
460 int adreno_set_param(struct msm_gpu *gpu, struct msm_context *ctx, in adreno_set_param()
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H A Da5xx_preempt.c25 static inline void set_preempt_state(struct a5xx_gpu *gpu, in set_preempt_state()
40 static inline void update_wptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in update_wptr()
56 static struct msm_ringbuffer *get_next_ring(struct msm_gpu *gpu) in get_next_ring()
84 struct msm_gpu *gpu = &a5xx_gpu->base.base; in a5xx_preempt_timer() local
95 void a5xx_preempt_trigger(struct msm_gpu *gpu) in a5xx_preempt_trigger()
175 void a5xx_preempt_irq(struct msm_gpu *gpu) in a5xx_preempt_irq()
217 void a5xx_preempt_hw_init(struct msm_gpu *gpu) in a5xx_preempt_hw_init()
250 struct msm_gpu *gpu = &adreno_gpu->base; in preempt_init_ring() local
292 void a5xx_preempt_fini(struct msm_gpu *gpu) in a5xx_preempt_fini()
304 void a5xx_preempt_init(struct msm_gpu *gpu) in a5xx_preempt_init()
H A Da6xx_preempt.c29 static inline void set_preempt_state(struct a6xx_gpu *gpu, in set_preempt_state()
44 static inline void update_wptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in update_wptr()
63 static struct msm_ringbuffer *get_next_ring(struct msm_gpu *gpu) in get_next_ring()
92 struct msm_gpu *gpu = &a6xx_gpu->base.base; in a6xx_preempt_timer() local
139 void a6xx_preempt_irq(struct msm_gpu *gpu) in a6xx_preempt_irq()
188 void a6xx_preempt_hw_init(struct msm_gpu *gpu) in a6xx_preempt_hw_init()
224 void a6xx_preempt_trigger(struct msm_gpu *gpu) in a6xx_preempt_trigger()
338 struct msm_gpu *gpu = &adreno_gpu->base; in preempt_init_ring() local
401 void a6xx_preempt_fini(struct msm_gpu *gpu) in a6xx_preempt_fini()
411 void a6xx_preempt_init(struct msm_gpu *gpu) in a6xx_preempt_init()
H A Da6xx_gpu_state.c131 static int a6xx_crashdumper_init(struct msm_gpu *gpu, in a6xx_crashdumper_init()
144 static int a6xx_crashdumper_run(struct msm_gpu *gpu, in a6xx_crashdumper_run()
174 static int debugbus_read(struct msm_gpu *gpu, u32 block, u32 offset, in debugbus_read()
208 static int cx_debugbus_read(struct msm_gpu *gpu, void __iomem *cxdbg, u32 block, u32 offset, in cx_debugbus_read()
236 static int vbif_debugbus_read(struct msm_gpu *gpu, u32 ctrl0, u32 ctrl1, in vbif_debugbus_read()
260 static void a6xx_get_vbif_debugbus_block(struct msm_gpu *gpu, in a6xx_get_vbif_debugbus_block()
314 static void a6xx_get_debugbus_block(struct msm_gpu *gpu, in a6xx_get_debugbus_block()
332 static void a6xx_get_cx_debugbus_block(struct msm_gpu *gpu, in a6xx_get_cx_debugbus_block()
351 static void a6xx_get_debugbus_blocks(struct msm_gpu *gpu, in a6xx_get_debugbus_blocks()
398 static void a7xx_get_debugbus_blocks(struct msm_gpu *gpu, in a7xx_get_debugbus_blocks()
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H A Dadreno_device.c66 struct msm_gpu *gpu = NULL; in adreno_load_gpu() local
207 struct msm_gpu *gpu; in adreno_bind() local
249 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_unbind() local
299 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_runtime_resume() local
306 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_runtime_suspend() local
318 static void suspend_scheduler(struct msm_gpu *gpu) in suspend_scheduler()
340 static void resume_scheduler(struct msm_gpu *gpu) in resume_scheduler()
353 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_system_suspend() local
380 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_system_resume() local
H A Da2xx_gpummu.c16 struct msm_gpu *gpu; member
94 struct msm_mmu *a2xx_gpummu_new(struct device *dev, struct msm_gpu *gpu) in a2xx_gpummu_new()
/linux/drivers/gpu/drm/etnaviv/
H A Detnaviv_gpu.c40 int etnaviv_gpu_get_param(struct etnaviv_gpu *gpu, u32 param, u64 *value) in etnaviv_gpu_get_param()
176 static int etnaviv_gpu_reset_deassert(struct etnaviv_gpu *gpu) in etnaviv_gpu_reset_deassert()
199 static inline bool etnaviv_is_model_rev(struct etnaviv_gpu *gpu, u32 model, u32 revision) in etnaviv_is_model_rev()
208 static void etnaviv_hw_specs(struct etnaviv_gpu *gpu) in etnaviv_hw_specs()
358 static void etnaviv_hw_identify(struct etnaviv_gpu *gpu) in etnaviv_hw_identify()
499 static void etnaviv_gpu_load_clock(struct etnaviv_gpu *gpu, u32 clock) in etnaviv_gpu_load_clock()
506 static void etnaviv_gpu_update_clock(struct etnaviv_gpu *gpu) in etnaviv_gpu_update_clock()
532 static int etnaviv_hw_reset(struct etnaviv_gpu *gpu) in etnaviv_hw_reset()
633 static void etnaviv_gpu_enable_mlcg(struct etnaviv_gpu *gpu) in etnaviv_gpu_enable_mlcg()
693 void etnaviv_gpu_start_fe(struct etnaviv_gpu *gpu, u32 address, u16 prefetch) in etnaviv_gpu_start_fe()
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H A Detnaviv_drv.c85 struct etnaviv_gpu *gpu = priv->gpu[i]; in etnaviv_open() local
112 struct etnaviv_gpu *gpu = priv->gpu[i]; in etnaviv_postclose() local
150 static int etnaviv_mmu_show(struct etnaviv_gpu *gpu, struct seq_file *m) in etnaviv_mmu_show()
180 static void etnaviv_buffer_dump(struct etnaviv_gpu *gpu, struct seq_file *m) in etnaviv_buffer_dump()
201 static int etnaviv_ring_show(struct etnaviv_gpu *gpu, struct seq_file *m) in etnaviv_ring_show()
227 struct etnaviv_gpu *gpu; in show_each_gpu() local
271 struct etnaviv_gpu *gpu; in etnaviv_ioctl_get_param() local
364 struct etnaviv_gpu *gpu; in etnaviv_ioctl_wait_fence() local
414 struct etnaviv_gpu *gpu; in etnaviv_ioctl_gem_wait() local
446 struct etnaviv_gpu *gpu; in etnaviv_ioctl_pm_query_dom() local
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H A Detnaviv_sched.c38 struct etnaviv_gpu *gpu = submit->gpu; in etnaviv_sched_timedout_job() local
109 struct etnaviv_gpu *gpu = submit->gpu; in etnaviv_sched_push_job() local
141 int etnaviv_sched_init(struct etnaviv_gpu *gpu) in etnaviv_sched_init()
156 void etnaviv_sched_fini(struct etnaviv_gpu *gpu) in etnaviv_sched_fini()
H A Detnaviv_gpu.h170 static inline void gpu_write(struct etnaviv_gpu *gpu, u32 reg, u32 data) in gpu_write()
175 static inline u32 gpu_read(struct etnaviv_gpu *gpu, u32 reg) in gpu_read()
187 static inline u32 gpu_fix_power_address(struct etnaviv_gpu *gpu, u32 reg) in gpu_fix_power_address()
197 static inline void gpu_write_power(struct etnaviv_gpu *gpu, u32 reg, u32 data) in gpu_write_power()
202 static inline u32 gpu_read_power(struct etnaviv_gpu *gpu, u32 reg) in gpu_read_power()
H A Detnaviv_iommu_v2.c165 static void etnaviv_iommuv2_restore_nonsec(struct etnaviv_gpu *gpu, in etnaviv_iommuv2_restore_nonsec()
189 static void etnaviv_iommuv2_restore_sec(struct etnaviv_gpu *gpu, in etnaviv_iommuv2_restore_sec()
244 static void etnaviv_iommuv2_restore(struct etnaviv_gpu *gpu, in etnaviv_iommuv2_restore()
H A Detnaviv_dump.c82 struct etnaviv_gpu *gpu) in etnaviv_core_dump_registers()
120 struct etnaviv_gpu *gpu = submit->gpu; in etnaviv_core_dump() local
H A Detnaviv_cmd_parser.c16 struct etnaviv_gpu *gpu; member
148 bool etnaviv_cmd_validate_one(struct etnaviv_gpu *gpu, u32 *stream, in etnaviv_cmd_validate_one()
H A Detnaviv_mmu.c389 void etnaviv_iommu_restore(struct etnaviv_gpu *gpu, in etnaviv_iommu_restore()
474 int etnaviv_iommu_global_init(struct etnaviv_gpu *gpu) in etnaviv_iommu_global_init()
535 void etnaviv_iommu_global_fini(struct etnaviv_gpu *gpu) in etnaviv_iommu_global_fini()
H A Detnaviv_hwdb.c265 bool etnaviv_fill_identity_from_hwdb(struct etnaviv_gpu *gpu) in etnaviv_fill_identity_from_hwdb()
/linux/drivers/gpu/drm/msm/
H A Dmsm_gpu.c25 static int enable_pwrrail(struct msm_gpu *gpu) in enable_pwrrail()
49 static int disable_pwrrail(struct msm_gpu *gpu) in disable_pwrrail()
58 static int enable_clk(struct msm_gpu *gpu) in enable_clk()
70 static int disable_clk(struct msm_gpu *gpu) in disable_clk()
88 static int enable_axi(struct msm_gpu *gpu) in enable_axi()
93 static int disable_axi(struct msm_gpu *gpu) in disable_axi()
99 int msm_gpu_pm_resume(struct msm_gpu *gpu) in msm_gpu_pm_resume()
125 int msm_gpu_pm_suspend(struct msm_gpu *gpu) in msm_gpu_pm_suspend()
151 void msm_gpu_show_fdinfo(struct msm_gpu *gpu, struct msm_context *ctx, in msm_gpu_show_fdinfo()
159 int msm_gpu_hw_init(struct msm_gpu *gpu) in msm_gpu_hw_init()
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H A Dmsm_gpu.h308 static inline bool msm_gpu_active(struct msm_gpu *gpu) in msm_gpu_active()
509 static inline int msm_gpu_convert_priority(struct msm_gpu *gpu, int prio, in msm_gpu_convert_priority()
614 static inline void gpu_write(struct msm_gpu *gpu, u32 reg, u32 data) in gpu_write()
619 static inline u32 gpu_read(struct msm_gpu *gpu, u32 reg) in gpu_read()
624 static inline void gpu_rmw(struct msm_gpu *gpu, u32 reg, u32 mask, u32 or) in gpu_rmw()
629 static inline u64 gpu_read64(struct msm_gpu *gpu, u32 reg) in gpu_read64()
653 static inline void gpu_write64(struct msm_gpu *gpu, u32 reg, u64 val) in gpu_write64()
733 static inline struct msm_gpu_state *msm_gpu_crashstate_get(struct msm_gpu *gpu) in msm_gpu_crashstate_get()
749 static inline void msm_gpu_crashstate_put(struct msm_gpu *gpu) in msm_gpu_crashstate_put()
767 #define check_apriv(gpu, flags) \ argument
H A Dmsm_debugfs.c37 struct msm_gpu *gpu = priv->gpu; in msm_gpu_show() local
57 struct msm_gpu *gpu = priv->gpu; in msm_gpu_release() local
72 struct msm_gpu *gpu = priv->gpu; in msm_gpu_open() local
H A Dmsm_perf.c61 struct msm_gpu *gpu = priv->gpu; in refill_buf() local
155 struct msm_gpu *gpu = priv->gpu; in perf_open() local
/linux/arch/arm/boot/dts/st/
H A Dstm32mp157.dtsi11 gpu: gpu@59000000 { label
/linux/drivers/gpu/drm/loongson/
H A Dlsdc_gfxpll.c83 unsigned int *gpu) in loongson_gfxpll_get_rates()
122 unsigned int dc, gmc, gpu; in loongson_gfxpll_print() local
/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_topology.c1082 static uint32_t kfd_generate_gpu_id(struct kfd_node *gpu) in kfd_generate_gpu_id()
1141 static struct kfd_topology_device *kfd_assign_gpu(struct kfd_node *gpu) in kfd_assign_gpu()
1272 struct kfd_node *gpu = outbound_link->gpu; in kfd_set_recommended_sdma_engines() local
1864 static int kfd_topology_add_device_locked(struct kfd_node *gpu, in kfd_topology_add_device_locked()
2027 int kfd_topology_add_device(struct kfd_node *gpu) in kfd_topology_add_device()
2255 int kfd_topology_remove_device(struct kfd_node *gpu) in kfd_topology_remove_device()

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