1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Thermal sensor driver for Allwinner SOC
4 * Copyright (C) 2019 Yangtao Li
5 *
6 * Based on the work of Icenowy Zheng <icenowy@aosc.io>
7 * Based on the work of Ondrej Jirman <megous@megous.com>
8 * Based on the work of Josef Gajdusek <atx@atx.name>
9 */
10
11 #include <linux/bitmap.h>
12 #include <linux/cleanup.h>
13 #include <linux/clk.h>
14 #include <linux/device.h>
15 #include <linux/interrupt.h>
16 #include <linux/module.h>
17 #include <linux/nvmem-consumer.h>
18 #include <linux/of.h>
19 #include <linux/of_platform.h>
20 #include <linux/platform_device.h>
21 #include <linux/regmap.h>
22 #include <linux/reset.h>
23 #include <linux/slab.h>
24 #include <linux/thermal.h>
25
26 #include "thermal_hwmon.h"
27
28 #define MAX_SENSOR_NUM 4
29
30 #define FT_TEMP_MASK GENMASK(11, 0)
31 #define TEMP_CALIB_MASK GENMASK(11, 0)
32 #define CALIBRATE_DEFAULT 0x800
33
34 #define SUN8I_THS_CTRL0 0x00
35 #define SUN8I_THS_CTRL2 0x40
36 #define SUN8I_THS_IC 0x44
37 #define SUN8I_THS_IS 0x48
38 #define SUN8I_THS_MFC 0x70
39 #define SUN8I_THS_TEMP_CALIB 0x74
40 #define SUN8I_THS_TEMP_DATA 0x80
41
42 #define SUN50I_THS_CTRL0 0x00
43 #define SUN50I_H6_THS_ENABLE 0x04
44 #define SUN50I_H6_THS_PC 0x08
45 #define SUN50I_H6_THS_DIC 0x10
46 #define SUN50I_H6_THS_DIS 0x20
47 #define SUN50I_H6_THS_MFC 0x30
48 #define SUN50I_H6_THS_TEMP_CALIB 0xa0
49 #define SUN50I_H6_THS_TEMP_DATA 0xc0
50
51 #define SUN8I_THS_CTRL0_T_ACQ0(x) (GENMASK(15, 0) & (x))
52 #define SUN8I_THS_CTRL2_T_ACQ1(x) ((GENMASK(15, 0) & (x)) << 16)
53 #define SUN8I_THS_DATA_IRQ_STS(x) BIT(x + 8)
54
55 #define SUN50I_THS_CTRL0_T_ACQ(x) (GENMASK(15, 0) & ((x) - 1))
56 #define SUN50I_THS_CTRL0_T_SAMPLE_PER(x) ((GENMASK(15, 0) & ((x) - 1)) << 16)
57 #define SUN50I_THS_FILTER_EN BIT(2)
58 #define SUN50I_THS_FILTER_TYPE(x) (GENMASK(1, 0) & (x))
59 #define SUN50I_H6_THS_PC_TEMP_PERIOD(x) ((GENMASK(19, 0) & (x)) << 12)
60 #define SUN50I_H6_THS_DATA_IRQ_STS(x) BIT(x)
61
62 struct tsensor {
63 struct ths_device *tmdev;
64 struct thermal_zone_device *tzd;
65 int id;
66 };
67
68 struct ths_thermal_chip {
69 bool has_mod_clk;
70 bool has_bus_clk_reset;
71 bool needs_sram;
72 int sensor_num;
73 int offset;
74 int scale;
75 int ft_deviation;
76 int temp_data_base;
77 int (*calibrate)(struct ths_device *tmdev,
78 u16 *caldata, int callen);
79 int (*init)(struct ths_device *tmdev);
80 unsigned long (*irq_ack)(struct ths_device *tmdev);
81 int (*calc_temp)(struct ths_device *tmdev,
82 int id, int reg);
83 };
84
85 struct ths_device {
86 const struct ths_thermal_chip *chip;
87 struct device *dev;
88 struct regmap *regmap;
89 struct regmap_field *sram_regmap_field;
90 struct reset_control *reset;
91 struct clk *bus_clk;
92 struct clk *mod_clk;
93 struct tsensor sensor[MAX_SENSOR_NUM];
94 };
95
96 /* The H616 needs to have a bit 16 in the SRAM control register cleared. */
97 static const struct reg_field sun8i_ths_sram_reg_field = REG_FIELD(0x0, 16, 16);
98
99 /* Temp Unit: millidegree Celsius */
sun8i_ths_calc_temp(struct ths_device * tmdev,int id,int reg)100 static int sun8i_ths_calc_temp(struct ths_device *tmdev,
101 int id, int reg)
102 {
103 return tmdev->chip->offset - (reg * tmdev->chip->scale / 10);
104 }
105
sun50i_h5_calc_temp(struct ths_device * tmdev,int id,int reg)106 static int sun50i_h5_calc_temp(struct ths_device *tmdev,
107 int id, int reg)
108 {
109 if (reg >= 0x500)
110 return -1191 * reg / 10 + 223000;
111 else if (!id)
112 return -1452 * reg / 10 + 259000;
113 else
114 return -1590 * reg / 10 + 276000;
115 }
116
sun8i_ths_get_temp(struct thermal_zone_device * tz,int * temp)117 static int sun8i_ths_get_temp(struct thermal_zone_device *tz, int *temp)
118 {
119 struct tsensor *s = thermal_zone_device_priv(tz);
120 struct ths_device *tmdev = s->tmdev;
121 int val = 0;
122
123 regmap_read(tmdev->regmap, tmdev->chip->temp_data_base +
124 0x4 * s->id, &val);
125
126 /* ths have no data yet */
127 if (!val)
128 return -EAGAIN;
129
130 *temp = tmdev->chip->calc_temp(tmdev, s->id, val);
131 /*
132 * According to the original sdk, there are some platforms(rarely)
133 * that add a fixed offset value after calculating the temperature
134 * value. We can't simply put it on the formula for calculating the
135 * temperature above, because the formula for calculating the
136 * temperature above is also used when the sensor is calibrated. If
137 * do this, the correct calibration formula is hard to know.
138 */
139 *temp += tmdev->chip->ft_deviation;
140
141 return 0;
142 }
143
144 static const struct thermal_zone_device_ops ths_ops = {
145 .get_temp = sun8i_ths_get_temp,
146 };
147
148 static const struct regmap_config config = {
149 .reg_bits = 32,
150 .val_bits = 32,
151 .reg_stride = 4,
152 .max_register = 0xfc,
153 };
154
sun8i_h3_irq_ack(struct ths_device * tmdev)155 static unsigned long sun8i_h3_irq_ack(struct ths_device *tmdev)
156 {
157 unsigned long irq_bitmap = 0;
158 int i, state;
159
160 regmap_read(tmdev->regmap, SUN8I_THS_IS, &state);
161
162 for (i = 0; i < tmdev->chip->sensor_num; i++) {
163 if (state & SUN8I_THS_DATA_IRQ_STS(i)) {
164 regmap_write(tmdev->regmap, SUN8I_THS_IS,
165 SUN8I_THS_DATA_IRQ_STS(i));
166 bitmap_set(&irq_bitmap, i, 1);
167 }
168 }
169
170 return irq_bitmap;
171 }
172
sun50i_h6_irq_ack(struct ths_device * tmdev)173 static unsigned long sun50i_h6_irq_ack(struct ths_device *tmdev)
174 {
175 unsigned long irq_bitmap = 0;
176 int i, state;
177
178 regmap_read(tmdev->regmap, SUN50I_H6_THS_DIS, &state);
179
180 for (i = 0; i < tmdev->chip->sensor_num; i++) {
181 if (state & SUN50I_H6_THS_DATA_IRQ_STS(i)) {
182 regmap_write(tmdev->regmap, SUN50I_H6_THS_DIS,
183 SUN50I_H6_THS_DATA_IRQ_STS(i));
184 bitmap_set(&irq_bitmap, i, 1);
185 }
186 }
187
188 return irq_bitmap;
189 }
190
sun8i_irq_thread(int irq,void * data)191 static irqreturn_t sun8i_irq_thread(int irq, void *data)
192 {
193 struct ths_device *tmdev = data;
194 unsigned long irq_bitmap = tmdev->chip->irq_ack(tmdev);
195 int i;
196
197 for_each_set_bit(i, &irq_bitmap, tmdev->chip->sensor_num) {
198 /* We allow some zones to not register. */
199 if (IS_ERR(tmdev->sensor[i].tzd))
200 continue;
201 thermal_zone_device_update(tmdev->sensor[i].tzd,
202 THERMAL_EVENT_UNSPECIFIED);
203 }
204
205 return IRQ_HANDLED;
206 }
207
sun8i_h3_ths_calibrate(struct ths_device * tmdev,u16 * caldata,int callen)208 static int sun8i_h3_ths_calibrate(struct ths_device *tmdev,
209 u16 *caldata, int callen)
210 {
211 int i;
212
213 if (!caldata[0] || callen < 2 * tmdev->chip->sensor_num)
214 return -EINVAL;
215
216 for (i = 0; i < tmdev->chip->sensor_num; i++) {
217 int offset = (i % 2) << 4;
218
219 regmap_update_bits(tmdev->regmap,
220 SUN8I_THS_TEMP_CALIB + (4 * (i >> 1)),
221 TEMP_CALIB_MASK << offset,
222 caldata[i] << offset);
223 }
224
225 return 0;
226 }
227
sun50i_h6_ths_calibrate(struct ths_device * tmdev,u16 * caldata,int callen)228 static int sun50i_h6_ths_calibrate(struct ths_device *tmdev,
229 u16 *caldata, int callen)
230 {
231 struct device *dev = tmdev->dev;
232 int i, ft_temp;
233
234 if (!caldata[0])
235 return -EINVAL;
236
237 /*
238 * efuse layout:
239 *
240 * 0 11 16 27 32 43 48 57
241 * +----------+-----------+-----------+-----------+
242 * | temp | |sensor0| |sensor1| |sensor2| |
243 * +----------+-----------+-----------+-----------+
244 * ^ ^ ^
245 * | | |
246 * | | sensor3[11:8]
247 * | sensor3[7:4]
248 * sensor3[3:0]
249 *
250 * The calibration data on the H6 is the ambient temperature and
251 * sensor values that are filled during the factory test stage.
252 *
253 * The unit of stored FT temperature is 0.1 degree celsius.
254 *
255 * We need to calculate a delta between measured and caluclated
256 * register values and this will become a calibration offset.
257 */
258 ft_temp = (caldata[0] & FT_TEMP_MASK) * 100;
259
260 for (i = 0; i < tmdev->chip->sensor_num; i++) {
261 int sensor_reg, sensor_temp, cdata, offset;
262
263 if (i == 3)
264 sensor_reg = (caldata[1] >> 12)
265 | ((caldata[2] >> 12) << 4)
266 | ((caldata[3] >> 12) << 8);
267 else
268 sensor_reg = caldata[i + 1] & TEMP_CALIB_MASK;
269
270 sensor_temp = tmdev->chip->calc_temp(tmdev, i, sensor_reg);
271
272 /*
273 * Calibration data is CALIBRATE_DEFAULT - (calculated
274 * temperature from sensor reading at factory temperature
275 * minus actual factory temperature) * 14.88 (scale from
276 * temperature to register values)
277 */
278 cdata = CALIBRATE_DEFAULT -
279 ((sensor_temp - ft_temp) * 10 / tmdev->chip->scale);
280 if (cdata & ~TEMP_CALIB_MASK) {
281 /*
282 * Calibration value more than 12-bit, but calibration
283 * register is 12-bit. In this case, ths hardware can
284 * still work without calibration, although the data
285 * won't be so accurate.
286 */
287 dev_warn(dev, "sensor%d is not calibrated.\n", i);
288 continue;
289 }
290
291 offset = (i % 2) * 16;
292 regmap_update_bits(tmdev->regmap,
293 SUN50I_H6_THS_TEMP_CALIB + (i / 2 * 4),
294 TEMP_CALIB_MASK << offset,
295 cdata << offset);
296 }
297
298 return 0;
299 }
300
sun8i_ths_calibrate(struct ths_device * tmdev)301 static int sun8i_ths_calibrate(struct ths_device *tmdev)
302 {
303 struct nvmem_cell *calcell;
304 struct device *dev = tmdev->dev;
305 u16 *caldata;
306 size_t callen;
307 int ret = 0;
308
309 calcell = nvmem_cell_get(dev, "calibration");
310 if (IS_ERR(calcell)) {
311 if (PTR_ERR(calcell) == -EPROBE_DEFER)
312 return -EPROBE_DEFER;
313 /*
314 * Even if the external calibration data stored in sid is
315 * not accessible, the THS hardware can still work, although
316 * the data won't be so accurate.
317 *
318 * The default value of calibration register is 0x800 for
319 * every sensor, and the calibration value is usually 0x7xx
320 * or 0x8xx, so they won't be away from the default value
321 * for a lot.
322 *
323 * So here we do not return error if the calibration data is
324 * not available, except the probe needs deferring.
325 */
326 goto out;
327 }
328
329 caldata = nvmem_cell_read(calcell, &callen);
330 if (IS_ERR(caldata)) {
331 ret = PTR_ERR(caldata);
332 goto out;
333 }
334
335 tmdev->chip->calibrate(tmdev, caldata, callen);
336
337 kfree(caldata);
338 out:
339 if (!IS_ERR(calcell))
340 nvmem_cell_put(calcell);
341 return ret;
342 }
343
sun8i_ths_reset_control_assert(void * data)344 static void sun8i_ths_reset_control_assert(void *data)
345 {
346 reset_control_assert(data);
347 }
348
sun8i_ths_get_sram_regmap(struct device_node * node)349 static struct regmap *sun8i_ths_get_sram_regmap(struct device_node *node)
350 {
351 struct platform_device *sram_pdev;
352 struct regmap *regmap = NULL;
353
354 struct device_node *sram_node __free(device_node) =
355 of_parse_phandle(node, "allwinner,sram", 0);
356 if (!sram_node)
357 return ERR_PTR(-ENODEV);
358
359 sram_pdev = of_find_device_by_node(sram_node);
360 if (!sram_pdev) {
361 /* platform device might not be probed yet */
362 return ERR_PTR(-EPROBE_DEFER);
363 }
364
365 /* If no regmap is found then the other device driver is at fault */
366 regmap = dev_get_regmap(&sram_pdev->dev, NULL);
367 if (!regmap)
368 regmap = ERR_PTR(-EINVAL);
369
370 platform_device_put(sram_pdev);
371
372 return regmap;
373 }
374
sun8i_ths_resource_init(struct ths_device * tmdev)375 static int sun8i_ths_resource_init(struct ths_device *tmdev)
376 {
377 struct device *dev = tmdev->dev;
378 struct platform_device *pdev = to_platform_device(dev);
379 void __iomem *base;
380 int ret;
381
382 base = devm_platform_ioremap_resource(pdev, 0);
383 if (IS_ERR(base))
384 return PTR_ERR(base);
385
386 tmdev->regmap = devm_regmap_init_mmio(dev, base, &config);
387 if (IS_ERR(tmdev->regmap))
388 return PTR_ERR(tmdev->regmap);
389
390 if (tmdev->chip->has_bus_clk_reset) {
391 tmdev->reset = devm_reset_control_get(dev, NULL);
392 if (IS_ERR(tmdev->reset))
393 return PTR_ERR(tmdev->reset);
394
395 ret = reset_control_deassert(tmdev->reset);
396 if (ret)
397 return ret;
398
399 ret = devm_add_action_or_reset(dev, sun8i_ths_reset_control_assert,
400 tmdev->reset);
401 if (ret)
402 return ret;
403
404 tmdev->bus_clk = devm_clk_get_enabled(&pdev->dev, "bus");
405 if (IS_ERR(tmdev->bus_clk))
406 return PTR_ERR(tmdev->bus_clk);
407 }
408
409 if (tmdev->chip->has_mod_clk) {
410 tmdev->mod_clk = devm_clk_get_enabled(&pdev->dev, "mod");
411 if (IS_ERR(tmdev->mod_clk))
412 return PTR_ERR(tmdev->mod_clk);
413 }
414
415 ret = clk_set_rate(tmdev->mod_clk, 24000000);
416 if (ret)
417 return ret;
418
419 if (tmdev->chip->needs_sram) {
420 struct regmap *regmap;
421
422 regmap = sun8i_ths_get_sram_regmap(dev->of_node);
423 if (IS_ERR(regmap))
424 return PTR_ERR(regmap);
425 tmdev->sram_regmap_field = devm_regmap_field_alloc(dev,
426 regmap,
427 sun8i_ths_sram_reg_field);
428 if (IS_ERR(tmdev->sram_regmap_field))
429 return PTR_ERR(tmdev->sram_regmap_field);
430 }
431
432 ret = sun8i_ths_calibrate(tmdev);
433 if (ret)
434 return ret;
435
436 return 0;
437 }
438
sun8i_h3_thermal_init(struct ths_device * tmdev)439 static int sun8i_h3_thermal_init(struct ths_device *tmdev)
440 {
441 int val;
442
443 /* average over 4 samples */
444 regmap_write(tmdev->regmap, SUN8I_THS_MFC,
445 SUN50I_THS_FILTER_EN |
446 SUN50I_THS_FILTER_TYPE(1));
447 /*
448 * clkin = 24MHz
449 * filter_samples = 4
450 * period = 0.25s
451 *
452 * x = period * clkin / 4096 / filter_samples - 1
453 * = 365
454 */
455 val = GENMASK(7 + tmdev->chip->sensor_num, 8);
456 regmap_write(tmdev->regmap, SUN8I_THS_IC,
457 SUN50I_H6_THS_PC_TEMP_PERIOD(365) | val);
458 /*
459 * T_acq = 20us
460 * clkin = 24MHz
461 *
462 * x = T_acq * clkin - 1
463 * = 479
464 */
465 regmap_write(tmdev->regmap, SUN8I_THS_CTRL0,
466 SUN8I_THS_CTRL0_T_ACQ0(479));
467 val = GENMASK(tmdev->chip->sensor_num - 1, 0);
468 regmap_write(tmdev->regmap, SUN8I_THS_CTRL2,
469 SUN8I_THS_CTRL2_T_ACQ1(479) | val);
470
471 return 0;
472 }
473
sun50i_h6_thermal_init(struct ths_device * tmdev)474 static int sun50i_h6_thermal_init(struct ths_device *tmdev)
475 {
476 int val;
477
478 /* The H616 needs to have a bit in the SRAM control register cleared. */
479 if (tmdev->sram_regmap_field)
480 regmap_field_write(tmdev->sram_regmap_field, 0);
481
482 /*
483 * The manual recommends an overall sample frequency of 50 KHz (20us,
484 * 480 cycles at 24 MHz), which provides plenty of time for both the
485 * acquisition time (>24 cycles) and the actual conversion time
486 * (>14 cycles).
487 * The lower half of the CTRL register holds the "acquire time", in
488 * clock cycles, which the manual recommends to be 2us:
489 * 24MHz * 2us = 48 cycles.
490 * The high half of THS_CTRL encodes the sample frequency, in clock
491 * cycles: 24MHz * 20us = 480 cycles.
492 * This is explained in the H616 manual, but apparently wrongly
493 * described in the H6 manual, although the BSP code does the same
494 * for both SoCs.
495 */
496 regmap_write(tmdev->regmap, SUN50I_THS_CTRL0,
497 SUN50I_THS_CTRL0_T_ACQ(48) |
498 SUN50I_THS_CTRL0_T_SAMPLE_PER(480));
499 /* average over 4 samples */
500 regmap_write(tmdev->regmap, SUN50I_H6_THS_MFC,
501 SUN50I_THS_FILTER_EN |
502 SUN50I_THS_FILTER_TYPE(1));
503 /*
504 * clkin = 24MHz
505 * filter_samples = 4
506 * period = 0.25s
507 *
508 * x = period * clkin / 4096 / filter_samples - 1
509 * = 365
510 */
511 regmap_write(tmdev->regmap, SUN50I_H6_THS_PC,
512 SUN50I_H6_THS_PC_TEMP_PERIOD(365));
513 /* enable sensor */
514 val = GENMASK(tmdev->chip->sensor_num - 1, 0);
515 regmap_write(tmdev->regmap, SUN50I_H6_THS_ENABLE, val);
516 /* thermal data interrupt enable */
517 val = GENMASK(tmdev->chip->sensor_num - 1, 0);
518 regmap_write(tmdev->regmap, SUN50I_H6_THS_DIC, val);
519
520 return 0;
521 }
522
sun8i_ths_register(struct ths_device * tmdev)523 static int sun8i_ths_register(struct ths_device *tmdev)
524 {
525 int i;
526
527 for (i = 0; i < tmdev->chip->sensor_num; i++) {
528 tmdev->sensor[i].tmdev = tmdev;
529 tmdev->sensor[i].id = i;
530 tmdev->sensor[i].tzd =
531 devm_thermal_of_zone_register(tmdev->dev,
532 i,
533 &tmdev->sensor[i],
534 &ths_ops);
535
536 /*
537 * If an individual zone fails to register for reasons
538 * other than probe deferral (eg, a bad DT) then carry
539 * on, other zones might register successfully.
540 */
541 if (IS_ERR(tmdev->sensor[i].tzd)) {
542 if (PTR_ERR(tmdev->sensor[i].tzd) == -EPROBE_DEFER)
543 return PTR_ERR(tmdev->sensor[i].tzd);
544 continue;
545 }
546
547 devm_thermal_add_hwmon_sysfs(tmdev->dev, tmdev->sensor[i].tzd);
548 }
549
550 return 0;
551 }
552
sun8i_ths_probe(struct platform_device * pdev)553 static int sun8i_ths_probe(struct platform_device *pdev)
554 {
555 struct ths_device *tmdev;
556 struct device *dev = &pdev->dev;
557 int ret, irq;
558
559 tmdev = devm_kzalloc(dev, sizeof(*tmdev), GFP_KERNEL);
560 if (!tmdev)
561 return -ENOMEM;
562
563 tmdev->dev = dev;
564 tmdev->chip = of_device_get_match_data(&pdev->dev);
565 if (!tmdev->chip)
566 return -EINVAL;
567
568 ret = sun8i_ths_resource_init(tmdev);
569 if (ret)
570 return ret;
571
572 irq = platform_get_irq(pdev, 0);
573 if (irq < 0)
574 return irq;
575
576 ret = tmdev->chip->init(tmdev);
577 if (ret)
578 return ret;
579
580 ret = sun8i_ths_register(tmdev);
581 if (ret)
582 return ret;
583
584 /*
585 * Avoid entering the interrupt handler, the thermal device is not
586 * registered yet, we deffer the registration of the interrupt to
587 * the end.
588 */
589 ret = devm_request_threaded_irq(dev, irq, NULL,
590 sun8i_irq_thread,
591 IRQF_ONESHOT, "ths", tmdev);
592 if (ret)
593 return ret;
594
595 return 0;
596 }
597
598 static const struct ths_thermal_chip sun8i_a83t_ths = {
599 .sensor_num = 3,
600 .scale = 705,
601 .offset = 191668,
602 .temp_data_base = SUN8I_THS_TEMP_DATA,
603 .calibrate = sun8i_h3_ths_calibrate,
604 .init = sun8i_h3_thermal_init,
605 .irq_ack = sun8i_h3_irq_ack,
606 .calc_temp = sun8i_ths_calc_temp,
607 };
608
609 static const struct ths_thermal_chip sun8i_h3_ths = {
610 .sensor_num = 1,
611 .scale = 1211,
612 .offset = 217000,
613 .has_mod_clk = true,
614 .has_bus_clk_reset = true,
615 .temp_data_base = SUN8I_THS_TEMP_DATA,
616 .calibrate = sun8i_h3_ths_calibrate,
617 .init = sun8i_h3_thermal_init,
618 .irq_ack = sun8i_h3_irq_ack,
619 .calc_temp = sun8i_ths_calc_temp,
620 };
621
622 static const struct ths_thermal_chip sun8i_r40_ths = {
623 .sensor_num = 2,
624 .offset = 251086,
625 .scale = 1130,
626 .has_mod_clk = true,
627 .has_bus_clk_reset = true,
628 .temp_data_base = SUN8I_THS_TEMP_DATA,
629 .calibrate = sun8i_h3_ths_calibrate,
630 .init = sun8i_h3_thermal_init,
631 .irq_ack = sun8i_h3_irq_ack,
632 .calc_temp = sun8i_ths_calc_temp,
633 };
634
635 static const struct ths_thermal_chip sun50i_a64_ths = {
636 .sensor_num = 3,
637 .offset = 260890,
638 .scale = 1170,
639 .has_mod_clk = true,
640 .has_bus_clk_reset = true,
641 .temp_data_base = SUN8I_THS_TEMP_DATA,
642 .calibrate = sun8i_h3_ths_calibrate,
643 .init = sun8i_h3_thermal_init,
644 .irq_ack = sun8i_h3_irq_ack,
645 .calc_temp = sun8i_ths_calc_temp,
646 };
647
648 static const struct ths_thermal_chip sun50i_a100_ths = {
649 .sensor_num = 3,
650 .has_bus_clk_reset = true,
651 .ft_deviation = 8000,
652 .offset = 187744,
653 .scale = 672,
654 .temp_data_base = SUN50I_H6_THS_TEMP_DATA,
655 .calibrate = sun50i_h6_ths_calibrate,
656 .init = sun50i_h6_thermal_init,
657 .irq_ack = sun50i_h6_irq_ack,
658 .calc_temp = sun8i_ths_calc_temp,
659 };
660
661 static const struct ths_thermal_chip sun50i_h5_ths = {
662 .sensor_num = 2,
663 .has_mod_clk = true,
664 .has_bus_clk_reset = true,
665 .temp_data_base = SUN8I_THS_TEMP_DATA,
666 .calibrate = sun8i_h3_ths_calibrate,
667 .init = sun8i_h3_thermal_init,
668 .irq_ack = sun8i_h3_irq_ack,
669 .calc_temp = sun50i_h5_calc_temp,
670 };
671
672 static const struct ths_thermal_chip sun50i_h6_ths = {
673 .sensor_num = 2,
674 .has_bus_clk_reset = true,
675 .ft_deviation = 7000,
676 .offset = 187744,
677 .scale = 672,
678 .temp_data_base = SUN50I_H6_THS_TEMP_DATA,
679 .calibrate = sun50i_h6_ths_calibrate,
680 .init = sun50i_h6_thermal_init,
681 .irq_ack = sun50i_h6_irq_ack,
682 .calc_temp = sun8i_ths_calc_temp,
683 };
684
685 static const struct ths_thermal_chip sun20i_d1_ths = {
686 .sensor_num = 1,
687 .has_bus_clk_reset = true,
688 .offset = 188552,
689 .scale = 673,
690 .temp_data_base = SUN50I_H6_THS_TEMP_DATA,
691 .calibrate = sun50i_h6_ths_calibrate,
692 .init = sun50i_h6_thermal_init,
693 .irq_ack = sun50i_h6_irq_ack,
694 .calc_temp = sun8i_ths_calc_temp,
695 };
696
697 static const struct ths_thermal_chip sun50i_h616_ths = {
698 .sensor_num = 4,
699 .has_bus_clk_reset = true,
700 .needs_sram = true,
701 .ft_deviation = 8000,
702 .offset = 263655,
703 .scale = 810,
704 .temp_data_base = SUN50I_H6_THS_TEMP_DATA,
705 .calibrate = sun50i_h6_ths_calibrate,
706 .init = sun50i_h6_thermal_init,
707 .irq_ack = sun50i_h6_irq_ack,
708 .calc_temp = sun8i_ths_calc_temp,
709 };
710
711 static const struct of_device_id of_ths_match[] = {
712 { .compatible = "allwinner,sun8i-a83t-ths", .data = &sun8i_a83t_ths },
713 { .compatible = "allwinner,sun8i-h3-ths", .data = &sun8i_h3_ths },
714 { .compatible = "allwinner,sun8i-r40-ths", .data = &sun8i_r40_ths },
715 { .compatible = "allwinner,sun50i-a64-ths", .data = &sun50i_a64_ths },
716 { .compatible = "allwinner,sun50i-a100-ths", .data = &sun50i_a100_ths },
717 { .compatible = "allwinner,sun50i-h5-ths", .data = &sun50i_h5_ths },
718 { .compatible = "allwinner,sun50i-h6-ths", .data = &sun50i_h6_ths },
719 { .compatible = "allwinner,sun20i-d1-ths", .data = &sun20i_d1_ths },
720 { .compatible = "allwinner,sun50i-h616-ths", .data = &sun50i_h616_ths },
721 { /* sentinel */ },
722 };
723 MODULE_DEVICE_TABLE(of, of_ths_match);
724
725 static struct platform_driver ths_driver = {
726 .probe = sun8i_ths_probe,
727 .driver = {
728 .name = "sun8i-thermal",
729 .of_match_table = of_ths_match,
730 },
731 };
732 module_platform_driver(ths_driver);
733
734 MODULE_DESCRIPTION("Thermal sensor driver for Allwinner SOC");
735 MODULE_LICENSE("GPL v2");
736