1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause AND BSD-4-Clause 3 * 4 * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com> 5 * Copyright (c) 1998 Joachim Kuebart <joachim.kuebart@gmx.net> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 /*- 31 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org> 32 * All rights reserved. 33 * 34 * Redistribution and use in source and binary forms, with or without 35 * modification, are permitted provided that the following conditions 36 * are met: 37 * 38 * 1. Redistributions of source code must retain the above copyright 39 * notice, this list of conditions and the following disclaimer. 40 * 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in 43 * the documentation and/or other materials provided with the 44 * distribution. 45 * 46 * 3. All advertising materials mentioning features or use of this 47 * software must display the following acknowledgement: 48 * This product includes software developed by Joachim Kuebart. 49 * 50 * 4. The name of the author may not be used to endorse or promote 51 * products derived from this software without specific prior 52 * written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 55 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 56 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 57 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 58 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 59 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 60 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 61 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 62 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 64 * OF THE POSSIBILITY OF SUCH DAMAGE. 65 */ 66 67 /* 68 * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI 69 * boards based on the ES1370, ES1371 and ES1373 chips. 70 * 71 * Part of this code was heavily inspired by the linux driver from 72 * Thomas Sailer (sailer@ife.ee.ethz.ch) 73 * Just about everything has been touched and reworked in some way but 74 * the all the underlying sequences/timing/register values are from 75 * Thomas' code. 76 */ 77 78 #ifdef HAVE_KERNEL_OPTION_HEADERS 79 #include "opt_snd.h" 80 #endif 81 82 #include <dev/sound/pcm/sound.h> 83 #include <dev/sound/pcm/ac97.h> 84 #include <dev/sound/pci/es137x.h> 85 86 #include <dev/pci/pcireg.h> 87 #include <dev/pci/pcivar.h> 88 89 #include <sys/sysctl.h> 90 91 #include "mixer_if.h" 92 93 #define MEM_MAP_REG 0x14 94 95 /* PCI IDs of supported chips */ 96 #define ES1370_PCI_ID 0x50001274 97 #define ES1371_PCI_ID 0x13711274 98 #define ES1371_PCI_ID2 0x13713274 99 #define CT5880_PCI_ID 0x58801274 100 #define CT4730_PCI_ID 0x89381102 101 102 #define ES1371REV_ES1371_A 0x02 103 #define ES1371REV_ES1371_B 0x09 104 105 #define ES1371REV_ES1373_8 0x08 106 #define ES1371REV_ES1373_A 0x04 107 #define ES1371REV_ES1373_B 0x06 108 109 #define ES1371REV_CT5880_A 0x07 110 111 #define CT5880REV_CT5880_C 0x02 112 #define CT5880REV_CT5880_D 0x03 113 #define CT5880REV_CT5880_E 0x04 114 115 #define CT4730REV_CT4730_A 0x00 116 117 #define ES_DEFAULT_BUFSZ 4096 118 119 /* 2 DAC for playback, 1 ADC for record */ 120 #define ES_DAC1 0 121 #define ES_DAC2 1 122 #define ES_ADC 2 123 #define ES_NCHANS 3 124 125 #define ES_DMA_SEGS_MIN 2 126 #define ES_DMA_SEGS_MAX 256 127 #define ES_BLK_MIN 64 128 #define ES_BLK_ALIGN (~(ES_BLK_MIN - 1)) 129 130 #define ES1370_DAC1_MINSPEED 5512 131 #define ES1370_DAC1_MAXSPEED 44100 132 133 /* device private data */ 134 struct es_info; 135 136 struct es_chinfo { 137 struct es_info *parent; 138 struct pcm_channel *channel; 139 struct snd_dbuf *buffer; 140 struct pcmchan_caps caps; 141 int dir, num, index; 142 uint32_t fmt, blksz, blkcnt, bufsz; 143 uint32_t ptr, prevptr; 144 int active; 145 }; 146 147 /* 148 * 32bit Ensoniq Configuration (es->escfg). 149 * ---------------------------------------- 150 * 151 * +-------+--------+------+------+---------+--------+---------+---------+ 152 * len | 16 | 1 | 1 | 1 | 2 | 2 | 1 | 8 | 153 * +-------+--------+------+------+---------+--------+---------+---------+ 154 * | fixed | single | | | | | is | general | 155 * | rate | pcm | DACx | DACy | numplay | numrec | es1370? | purpose | 156 * | | mixer | | | | | | | 157 * +-------+--------+------+------+---------+--------+---------+---------+ 158 */ 159 #define ES_FIXED_RATE(cfgv) \ 160 (((cfgv) & 0xffff0000) >> 16) 161 #define ES_SET_FIXED_RATE(cfgv, nv) \ 162 (((cfgv) & ~0xffff0000) | (((nv) & 0xffff) << 16)) 163 #define ES_SINGLE_PCM_MIX(cfgv) \ 164 (((cfgv) & 0x8000) >> 15) 165 #define ES_SET_SINGLE_PCM_MIX(cfgv, nv) \ 166 (((cfgv) & ~0x8000) | (((nv) ? 1 : 0) << 15)) 167 #define ES_DAC_FIRST(cfgv) \ 168 (((cfgv) & 0x4000) >> 14) 169 #define ES_SET_DAC_FIRST(cfgv, nv) \ 170 (((cfgv) & ~0x4000) | (((nv) & 0x1) << 14)) 171 #define ES_DAC_SECOND(cfgv) \ 172 (((cfgv) & 0x2000) >> 13) 173 #define ES_SET_DAC_SECOND(cfgv, nv) \ 174 (((cfgv) & ~0x2000) | (((nv) & 0x1) << 13)) 175 #define ES_NUMPLAY(cfgv) \ 176 (((cfgv) & 0x1800) >> 11) 177 #define ES_SET_NUMPLAY(cfgv, nv) \ 178 (((cfgv) & ~0x1800) | (((nv) & 0x3) << 11)) 179 #define ES_NUMREC(cfgv) \ 180 (((cfgv) & 0x600) >> 9) 181 #define ES_SET_NUMREC(cfgv, nv) \ 182 (((cfgv) & ~0x600) | (((nv) & 0x3) << 9)) 183 #define ES_IS_ES1370(cfgv) \ 184 (((cfgv) & 0x100) >> 8) 185 #define ES_SET_IS_ES1370(cfgv, nv) \ 186 (((cfgv) & ~0x100) | (((nv) ? 1 : 0) << 8)) 187 #define ES_GP(cfgv) \ 188 ((cfgv) & 0xff) 189 #define ES_SET_GP(cfgv, nv) \ 190 (((cfgv) & ~0xff) | ((nv) & 0xff)) 191 192 #define ES_DAC1_ENABLED(cfgv) \ 193 (ES_NUMPLAY(cfgv) > 1 || \ 194 (ES_NUMPLAY(cfgv) == 1 && ES_DAC_FIRST(cfgv) == ES_DAC1)) 195 #define ES_DAC2_ENABLED(cfgv) \ 196 (ES_NUMPLAY(cfgv) > 1 || \ 197 (ES_NUMPLAY(cfgv) == 1 && ES_DAC_FIRST(cfgv) == ES_DAC2)) 198 199 /* 200 * DAC 1/2 configuration through kernel hint - hint.pcm.<unit>.dac="val" 201 * 202 * 0 = Enable both DACs - Default 203 * 1 = Enable single DAC (DAC1) 204 * 2 = Enable single DAC (DAC2) 205 * 3 = Enable both DACs, swap position (DAC2 comes first instead of DAC1) 206 */ 207 #define ES_DEFAULT_DAC_CFG 0 208 209 struct es_info { 210 bus_space_tag_t st; 211 bus_space_handle_t sh; 212 bus_dma_tag_t parent_dmat; 213 214 struct resource *reg, *irq; 215 int regtype, regid, irqid; 216 void *ih; 217 218 device_t dev; 219 int num; 220 unsigned int bufsz, blkcnt; 221 222 /* Contents of board's registers */ 223 uint32_t ctrl; 224 uint32_t sctrl; 225 uint32_t escfg; 226 struct es_chinfo ch[ES_NCHANS]; 227 struct mtx lock; 228 struct callout poll_timer; 229 int poll_ticks, polling; 230 }; 231 232 #define ES_LOCK(sc) mtx_lock(&(sc)->lock) 233 #define ES_UNLOCK(sc) mtx_unlock(&(sc)->lock) 234 #define ES_LOCK_ASSERT(sc) mtx_assert(&(sc)->lock, MA_OWNED) 235 236 /* prototypes */ 237 static void es_intr(void *); 238 static uint32_t es1371_wait_src_ready(struct es_info *); 239 static void es1371_src_write(struct es_info *, 240 unsigned short, unsigned short); 241 static unsigned int es1371_adc_rate(struct es_info *, unsigned int, int); 242 static unsigned int es1371_dac_rate(struct es_info *, unsigned int, int); 243 static int es1371_init(struct es_info *); 244 static int es1370_init(struct es_info *); 245 static int es1370_wrcodec(struct es_info *, unsigned char, unsigned char); 246 247 static uint32_t es_fmt[] = { 248 SND_FORMAT(AFMT_U8, 1, 0), 249 SND_FORMAT(AFMT_U8, 2, 0), 250 SND_FORMAT(AFMT_S16_LE, 1, 0), 251 SND_FORMAT(AFMT_S16_LE, 2, 0), 252 0 253 }; 254 static struct pcmchan_caps es_caps = {4000, 48000, es_fmt, 0}; 255 256 static const struct { 257 unsigned volidx:4; 258 unsigned left:4; 259 unsigned right:4; 260 unsigned stereo:1; 261 unsigned recmask:13; 262 unsigned avail:1; 263 } mixtable[SOUND_MIXER_NRDEVICES] = { 264 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x1f7f, 1 }, 265 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 }, 266 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 }, 267 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 }, 268 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, 269 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, 270 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, 271 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, 272 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, 273 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } 274 }; 275 276 static __inline uint32_t 277 es_rd(struct es_info *es, int regno, int size) 278 { 279 switch (size) { 280 case 1: 281 return (bus_space_read_1(es->st, es->sh, regno)); 282 case 2: 283 return (bus_space_read_2(es->st, es->sh, regno)); 284 case 4: 285 return (bus_space_read_4(es->st, es->sh, regno)); 286 default: 287 return (0xFFFFFFFF); 288 } 289 } 290 291 static __inline void 292 es_wr(struct es_info *es, int regno, uint32_t data, int size) 293 { 294 295 switch (size) { 296 case 1: 297 bus_space_write_1(es->st, es->sh, regno, data); 298 break; 299 case 2: 300 bus_space_write_2(es->st, es->sh, regno, data); 301 break; 302 case 4: 303 bus_space_write_4(es->st, es->sh, regno, data); 304 break; 305 } 306 } 307 308 /* -------------------------------------------------------------------- */ 309 /* The es1370 mixer interface */ 310 311 static int 312 es1370_mixinit(struct snd_mixer *m) 313 { 314 struct es_info *es; 315 int i; 316 uint32_t v; 317 318 es = mix_getdevinfo(m); 319 v = 0; 320 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) { 321 if (mixtable[i].avail) 322 v |= (1 << i); 323 } 324 /* 325 * Each DAC1/2 for ES1370 can be controlled independently 326 * DAC1 = controlled by synth 327 * DAC2 = controlled by pcm 328 * This is indeed can confuse user if DAC1 become primary playback 329 * channel. Try to be smart and combine both if necessary. 330 */ 331 if (ES_SINGLE_PCM_MIX(es->escfg)) 332 v &= ~(1 << SOUND_MIXER_SYNTH); 333 mix_setdevs(m, v); 334 v = 0; 335 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) { 336 if (mixtable[i].recmask) 337 v |= (1 << i); 338 } 339 if (ES_SINGLE_PCM_MIX(es->escfg)) /* ditto */ 340 v &= ~(1 << SOUND_MIXER_SYNTH); 341 mix_setrecdevs(m, v); 342 return (0); 343 } 344 345 static int 346 es1370_mixset(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right) 347 { 348 struct es_info *es; 349 int l, r, rl, rr, set_dac1; 350 351 if (!mixtable[dev].avail) 352 return (-1); 353 l = left; 354 r = (mixtable[dev].stereo) ? right : l; 355 if (mixtable[dev].left == 0xf) 356 rl = (l < 2) ? 0x80 : 7 - (l - 2) / 14; 357 else 358 rl = (l < 7) ? 0x80 : 31 - (l - 7) / 3; 359 es = mix_getdevinfo(m); 360 ES_LOCK(es); 361 if (dev == SOUND_MIXER_PCM && (ES_SINGLE_PCM_MIX(es->escfg)) && 362 ES_DAC1_ENABLED(es->escfg)) 363 set_dac1 = 1; 364 else 365 set_dac1 = 0; 366 if (mixtable[dev].stereo) { 367 rr = (r < 7) ? 0x80 : 31 - (r - 7) / 3; 368 es1370_wrcodec(es, mixtable[dev].right, rr); 369 if (set_dac1 && mixtable[SOUND_MIXER_SYNTH].stereo) 370 es1370_wrcodec(es, 371 mixtable[SOUND_MIXER_SYNTH].right, rr); 372 } 373 es1370_wrcodec(es, mixtable[dev].left, rl); 374 if (set_dac1) 375 es1370_wrcodec(es, mixtable[SOUND_MIXER_SYNTH].left, rl); 376 ES_UNLOCK(es); 377 378 return (l | (r << 8)); 379 } 380 381 static uint32_t 382 es1370_mixsetrecsrc(struct snd_mixer *m, uint32_t src) 383 { 384 struct es_info *es; 385 int i, j = 0; 386 387 es = mix_getdevinfo(m); 388 if (src == 0) src = 1 << SOUND_MIXER_MIC; 389 src &= mix_getrecdevs(m); 390 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 391 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask; 392 393 ES_LOCK(es); 394 if ((src & (1 << SOUND_MIXER_PCM)) && ES_SINGLE_PCM_MIX(es->escfg) && 395 ES_DAC1_ENABLED(es->escfg)) 396 j |= mixtable[SOUND_MIXER_SYNTH].recmask; 397 es1370_wrcodec(es, CODEC_LIMIX1, j & 0x55); 398 es1370_wrcodec(es, CODEC_RIMIX1, j & 0xaa); 399 es1370_wrcodec(es, CODEC_LIMIX2, (j >> 8) & 0x17); 400 es1370_wrcodec(es, CODEC_RIMIX2, (j >> 8) & 0x0f); 401 es1370_wrcodec(es, CODEC_OMIX1, 0x7f); 402 es1370_wrcodec(es, CODEC_OMIX2, 0x3f); 403 ES_UNLOCK(es); 404 405 return (src); 406 } 407 408 static kobj_method_t es1370_mixer_methods[] = { 409 KOBJMETHOD(mixer_init, es1370_mixinit), 410 KOBJMETHOD(mixer_set, es1370_mixset), 411 KOBJMETHOD(mixer_setrecsrc, es1370_mixsetrecsrc), 412 KOBJMETHOD_END 413 }; 414 MIXER_DECLARE(es1370_mixer); 415 416 /* -------------------------------------------------------------------- */ 417 418 static int 419 es1370_wrcodec(struct es_info *es, unsigned char i, unsigned char data) 420 { 421 unsigned int t; 422 423 ES_LOCK_ASSERT(es); 424 425 for (t = 0; t < 0x1000; t++) { 426 if ((es_rd(es, ES1370_REG_STATUS, 4) & 427 STAT_CSTAT) == 0) { 428 es_wr(es, ES1370_REG_CODEC, 429 ((unsigned short)i << CODEC_INDEX_SHIFT) | data, 2); 430 return (0); 431 } 432 DELAY(1); 433 } 434 device_printf(es->dev, "%s: timed out\n", __func__); 435 return (-1); 436 } 437 438 /* -------------------------------------------------------------------- */ 439 440 /* channel interface */ 441 static void * 442 eschan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, 443 struct pcm_channel *c, int dir) 444 { 445 struct es_info *es = devinfo; 446 struct es_chinfo *ch; 447 uint32_t index; 448 449 ES_LOCK(es); 450 451 if (dir == PCMDIR_PLAY) { 452 index = ES_GP(es->escfg); 453 es->escfg = ES_SET_GP(es->escfg, index + 1); 454 if (index == 0) 455 index = ES_DAC_FIRST(es->escfg); 456 else if (index == 1) 457 index = ES_DAC_SECOND(es->escfg); 458 else { 459 device_printf(es->dev, 460 "Invalid ES_GP index: %d\n", index); 461 ES_UNLOCK(es); 462 return (NULL); 463 } 464 if (!(index == ES_DAC1 || index == ES_DAC2)) { 465 device_printf(es->dev, "Unknown DAC: %d\n", index + 1); 466 ES_UNLOCK(es); 467 return (NULL); 468 } 469 if (es->ch[index].channel != NULL) { 470 device_printf(es->dev, "DAC%d already initialized!\n", 471 index + 1); 472 ES_UNLOCK(es); 473 return (NULL); 474 } 475 } else 476 index = ES_ADC; 477 478 ch = &es->ch[index]; 479 ch->index = index; 480 ch->num = es->num++; 481 ch->caps = es_caps; 482 if (ES_IS_ES1370(es->escfg)) { 483 if (ch->index == ES_DAC1) { 484 ch->caps.maxspeed = ES1370_DAC1_MAXSPEED; 485 ch->caps.minspeed = ES1370_DAC1_MINSPEED; 486 } else { 487 uint32_t fixed_rate = ES_FIXED_RATE(es->escfg); 488 if (!(fixed_rate < es_caps.minspeed || 489 fixed_rate > es_caps.maxspeed)) { 490 ch->caps.maxspeed = fixed_rate; 491 ch->caps.minspeed = fixed_rate; 492 } 493 } 494 } 495 ch->parent = es; 496 ch->channel = c; 497 ch->buffer = b; 498 ch->bufsz = es->bufsz; 499 ch->blkcnt = es->blkcnt; 500 ch->blksz = ch->bufsz / ch->blkcnt; 501 ch->dir = dir; 502 ES_UNLOCK(es); 503 if (sndbuf_alloc(ch->buffer, es->parent_dmat, 0, ch->bufsz) != 0) 504 return (NULL); 505 ES_LOCK(es); 506 if (dir == PCMDIR_PLAY) { 507 if (ch->index == ES_DAC1) { 508 es_wr(es, ES1370_REG_MEMPAGE, 509 ES1370_REG_DAC1_FRAMEADR >> 8, 1); 510 es_wr(es, ES1370_REG_DAC1_FRAMEADR & 0xff, 511 ch->buffer->buf_addr, 4); 512 es_wr(es, ES1370_REG_DAC1_FRAMECNT & 0xff, 513 (ch->bufsz >> 2) - 1, 4); 514 } else { 515 es_wr(es, ES1370_REG_MEMPAGE, 516 ES1370_REG_DAC2_FRAMEADR >> 8, 1); 517 es_wr(es, ES1370_REG_DAC2_FRAMEADR & 0xff, 518 ch->buffer->buf_addr, 4); 519 es_wr(es, ES1370_REG_DAC2_FRAMECNT & 0xff, 520 (ch->bufsz >> 2) - 1, 4); 521 } 522 } else { 523 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMEADR >> 8, 1); 524 es_wr(es, ES1370_REG_ADC_FRAMEADR & 0xff, 525 ch->buffer->buf_addr, 4); 526 es_wr(es, ES1370_REG_ADC_FRAMECNT & 0xff, 527 (ch->bufsz >> 2) - 1, 4); 528 } 529 ES_UNLOCK(es); 530 return (ch); 531 } 532 533 static int 534 eschan_setformat(kobj_t obj, void *data, uint32_t format) 535 { 536 struct es_chinfo *ch = data; 537 struct es_info *es = ch->parent; 538 539 ES_LOCK(es); 540 if (ch->dir == PCMDIR_PLAY) { 541 if (ch->index == ES_DAC1) { 542 es->sctrl &= ~SCTRL_P1FMT; 543 if (format & AFMT_S16_LE) 544 es->sctrl |= SCTRL_P1SEB; 545 if (AFMT_CHANNEL(format) > 1) 546 es->sctrl |= SCTRL_P1SMB; 547 } else { 548 es->sctrl &= ~SCTRL_P2FMT; 549 if (format & AFMT_S16_LE) 550 es->sctrl |= SCTRL_P2SEB; 551 if (AFMT_CHANNEL(format) > 1) 552 es->sctrl |= SCTRL_P2SMB; 553 } 554 } else { 555 es->sctrl &= ~SCTRL_R1FMT; 556 if (format & AFMT_S16_LE) 557 es->sctrl |= SCTRL_R1SEB; 558 if (AFMT_CHANNEL(format) > 1) 559 es->sctrl |= SCTRL_R1SMB; 560 } 561 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 562 ES_UNLOCK(es); 563 ch->fmt = format; 564 return (0); 565 } 566 567 static uint32_t 568 eschan1370_setspeed(kobj_t obj, void *data, uint32_t speed) 569 { 570 struct es_chinfo *ch = data; 571 struct es_info *es = ch->parent; 572 573 ES_LOCK(es); 574 /* Fixed rate , do nothing. */ 575 if (ch->caps.minspeed == ch->caps.maxspeed) { 576 ES_UNLOCK(es); 577 return (ch->caps.maxspeed); 578 } 579 if (speed < ch->caps.minspeed) 580 speed = ch->caps.minspeed; 581 if (speed > ch->caps.maxspeed) 582 speed = ch->caps.maxspeed; 583 if (ch->index == ES_DAC1) { 584 /* 585 * DAC1 does not support continuous rate settings. 586 * Pick the nearest and use it since FEEDER_RATE will 587 * do the proper conversion for us. 588 */ 589 es->ctrl &= ~CTRL_WTSRSEL; 590 if (speed < 8268) { 591 speed = 5512; 592 es->ctrl |= 0 << CTRL_SH_WTSRSEL; 593 } else if (speed < 16537) { 594 speed = 11025; 595 es->ctrl |= 1 << CTRL_SH_WTSRSEL; 596 } else if (speed < 33075) { 597 speed = 22050; 598 es->ctrl |= 2 << CTRL_SH_WTSRSEL; 599 } else { 600 speed = 44100; 601 es->ctrl |= 3 << CTRL_SH_WTSRSEL; 602 } 603 } else { 604 es->ctrl &= ~CTRL_PCLKDIV; 605 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV; 606 } 607 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 608 ES_UNLOCK(es); 609 return (speed); 610 } 611 612 static uint32_t 613 eschan1371_setspeed(kobj_t obj, void *data, uint32_t speed) 614 { 615 struct es_chinfo *ch = data; 616 struct es_info *es = ch->parent; 617 uint32_t i; 618 int delta; 619 620 ES_LOCK(es); 621 if (ch->dir == PCMDIR_PLAY) 622 i = es1371_dac_rate(es, speed, ch->index); /* play */ 623 else 624 i = es1371_adc_rate(es, speed, ch->index); /* record */ 625 ES_UNLOCK(es); 626 delta = (speed > i) ? (speed - i) : (i - speed); 627 if (delta < 2) 628 return (speed); 629 return (i); 630 } 631 632 static int 633 eschan_setfragments(kobj_t obj, void *data, uint32_t blksz, uint32_t blkcnt) 634 { 635 struct es_chinfo *ch = data; 636 struct es_info *es = ch->parent; 637 int error; 638 639 blksz &= ES_BLK_ALIGN; 640 641 if (blksz > (ch->buffer->maxsize / ES_DMA_SEGS_MIN)) 642 blksz = ch->buffer->maxsize / ES_DMA_SEGS_MIN; 643 if (blksz < ES_BLK_MIN) 644 blksz = ES_BLK_MIN; 645 if (blkcnt > ES_DMA_SEGS_MAX) 646 blkcnt = ES_DMA_SEGS_MAX; 647 if (blkcnt < ES_DMA_SEGS_MIN) 648 blkcnt = ES_DMA_SEGS_MIN; 649 650 while ((blksz * blkcnt) > ch->buffer->maxsize) { 651 if ((blkcnt >> 1) >= ES_DMA_SEGS_MIN) 652 blkcnt >>= 1; 653 else if ((blksz >> 1) >= ES_BLK_MIN) 654 blksz >>= 1; 655 else 656 break; 657 } 658 659 if ((ch->buffer->blksz != blksz || 660 ch->buffer->blkcnt != blkcnt) && 661 (error = sndbuf_resize(ch->buffer, blkcnt, blksz)) != 0) { 662 device_printf(es->dev, "%s: failed blksz=%u blkcnt=%u\n", 663 __func__, blksz, blkcnt); 664 return (error); 665 } 666 667 ch->bufsz = ch->buffer->bufsize; 668 ch->blksz = ch->buffer->blksz; 669 ch->blkcnt = ch->buffer->blkcnt; 670 671 return (0); 672 } 673 674 static uint32_t 675 eschan_setblocksize(kobj_t obj, void *data, uint32_t blksz) 676 { 677 struct es_chinfo *ch = data; 678 struct es_info *es = ch->parent; 679 680 if (eschan_setfragments(obj, data, blksz, es->blkcnt) != 0) 681 return (0); 682 683 return (ch->blksz); 684 } 685 686 #define es_chan_active(es) ((es)->ch[ES_DAC1].active + \ 687 (es)->ch[ES_DAC2].active + \ 688 (es)->ch[ES_ADC].active) 689 690 static __inline int 691 es_poll_channel(struct es_chinfo *ch) 692 { 693 struct es_info *es; 694 uint32_t sz, delta; 695 uint32_t reg, ptr; 696 697 if (ch == NULL || ch->channel == NULL || ch->active == 0) 698 return (0); 699 700 es = ch->parent; 701 if (ch->dir == PCMDIR_PLAY) { 702 if (ch->index == ES_DAC1) 703 reg = ES1370_REG_DAC1_FRAMECNT; 704 else 705 reg = ES1370_REG_DAC2_FRAMECNT; 706 } else 707 reg = ES1370_REG_ADC_FRAMECNT; 708 sz = ch->blksz * ch->blkcnt; 709 es_wr(es, ES1370_REG_MEMPAGE, reg >> 8, 4); 710 ptr = es_rd(es, reg & 0x000000ff, 4) >> 16; 711 ptr <<= 2; 712 ch->ptr = ptr; 713 ptr %= sz; 714 ptr &= ~(ch->blksz - 1); 715 delta = (sz + ptr - ch->prevptr) % sz; 716 717 if (delta < ch->blksz) 718 return (0); 719 720 ch->prevptr = ptr; 721 722 return (1); 723 } 724 725 static void 726 es_poll_callback(void *arg) 727 { 728 struct es_info *es = arg; 729 uint32_t trigger = 0; 730 int i; 731 732 if (es == NULL) 733 return; 734 735 ES_LOCK(es); 736 if (es->polling == 0 || es_chan_active(es) == 0) { 737 ES_UNLOCK(es); 738 return; 739 } 740 741 for (i = 0; i < ES_NCHANS; i++) { 742 if (es_poll_channel(&es->ch[i]) != 0) 743 trigger |= 1 << i; 744 } 745 746 /* XXX */ 747 callout_reset(&es->poll_timer, 1/*es->poll_ticks*/, 748 es_poll_callback, es); 749 750 ES_UNLOCK(es); 751 752 for (i = 0; i < ES_NCHANS; i++) { 753 if (trigger & (1 << i)) 754 chn_intr(es->ch[i].channel); 755 } 756 } 757 758 static int 759 eschan_trigger(kobj_t obj, void *data, int go) 760 { 761 struct es_chinfo *ch = data; 762 struct es_info *es = ch->parent; 763 uint32_t cnt, b = 0; 764 765 if (!PCMTRIG_COMMON(go)) 766 return 0; 767 768 ES_LOCK(es); 769 cnt = (ch->blksz / ch->buffer->align) - 1; 770 if (ch->fmt & AFMT_16BIT) 771 b |= 0x02; 772 if (AFMT_CHANNEL(ch->fmt) > 1) 773 b |= 0x01; 774 if (ch->dir == PCMDIR_PLAY) { 775 if (go == PCMTRIG_START) { 776 if (ch->index == ES_DAC1) { 777 es->ctrl |= CTRL_DAC1_EN; 778 es->sctrl &= ~(SCTRL_P1LOOPSEL | 779 SCTRL_P1PAUSE | SCTRL_P1SCTRLD); 780 if (es->polling == 0) 781 es->sctrl |= SCTRL_P1INTEN; 782 else 783 es->sctrl &= ~SCTRL_P1INTEN; 784 es->sctrl |= b; 785 es_wr(es, ES1370_REG_DAC1_SCOUNT, cnt, 4); 786 /* start at beginning of buffer */ 787 es_wr(es, ES1370_REG_MEMPAGE, 788 ES1370_REG_DAC1_FRAMECNT >> 8, 4); 789 es_wr(es, ES1370_REG_DAC1_FRAMECNT & 0xff, 790 (ch->bufsz >> 2) - 1, 4); 791 } else { 792 es->ctrl |= CTRL_DAC2_EN; 793 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC | 794 SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | 795 SCTRL_P2DACSEN); 796 if (es->polling == 0) 797 es->sctrl |= SCTRL_P2INTEN; 798 else 799 es->sctrl &= ~SCTRL_P2INTEN; 800 es->sctrl |= (b << 2) | 801 ((((b >> 1) & 1) + 1) << SCTRL_SH_P2ENDINC); 802 es_wr(es, ES1370_REG_DAC2_SCOUNT, cnt, 4); 803 /* start at beginning of buffer */ 804 es_wr(es, ES1370_REG_MEMPAGE, 805 ES1370_REG_DAC2_FRAMECNT >> 8, 4); 806 es_wr(es, ES1370_REG_DAC2_FRAMECNT & 0xff, 807 (ch->bufsz >> 2) - 1, 4); 808 } 809 } else 810 es->ctrl &= ~((ch->index == ES_DAC1) ? 811 CTRL_DAC1_EN : CTRL_DAC2_EN); 812 } else { 813 if (go == PCMTRIG_START) { 814 es->ctrl |= CTRL_ADC_EN; 815 es->sctrl &= ~SCTRL_R1LOOPSEL; 816 if (es->polling == 0) 817 es->sctrl |= SCTRL_R1INTEN; 818 else 819 es->sctrl &= ~SCTRL_R1INTEN; 820 es->sctrl |= b << 4; 821 es_wr(es, ES1370_REG_ADC_SCOUNT, cnt, 4); 822 /* start at beginning of buffer */ 823 es_wr(es, ES1370_REG_MEMPAGE, 824 ES1370_REG_ADC_FRAMECNT >> 8, 4); 825 es_wr(es, ES1370_REG_ADC_FRAMECNT & 0xff, 826 (ch->bufsz >> 2) - 1, 4); 827 } else 828 es->ctrl &= ~CTRL_ADC_EN; 829 } 830 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 831 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 832 if (go == PCMTRIG_START) { 833 if (es->polling != 0) { 834 ch->ptr = 0; 835 ch->prevptr = 0; 836 if (es_chan_active(es) == 0) { 837 es->poll_ticks = 1; 838 callout_reset(&es->poll_timer, 1, 839 es_poll_callback, es); 840 } 841 } 842 ch->active = 1; 843 } else { 844 ch->active = 0; 845 if (es->polling != 0) { 846 if (es_chan_active(es) == 0) { 847 callout_stop(&es->poll_timer); 848 es->poll_ticks = 1; 849 } 850 } 851 } 852 ES_UNLOCK(es); 853 return (0); 854 } 855 856 static uint32_t 857 eschan_getptr(kobj_t obj, void *data) 858 { 859 struct es_chinfo *ch = data; 860 struct es_info *es = ch->parent; 861 uint32_t reg, cnt; 862 863 ES_LOCK(es); 864 if (es->polling != 0) 865 cnt = ch->ptr; 866 else { 867 if (ch->dir == PCMDIR_PLAY) { 868 if (ch->index == ES_DAC1) 869 reg = ES1370_REG_DAC1_FRAMECNT; 870 else 871 reg = ES1370_REG_DAC2_FRAMECNT; 872 } else 873 reg = ES1370_REG_ADC_FRAMECNT; 874 es_wr(es, ES1370_REG_MEMPAGE, reg >> 8, 4); 875 cnt = es_rd(es, reg & 0x000000ff, 4) >> 16; 876 /* cnt is longwords */ 877 cnt <<= 2; 878 } 879 ES_UNLOCK(es); 880 881 cnt &= ES_BLK_ALIGN; 882 883 return (cnt); 884 } 885 886 static struct pcmchan_caps * 887 eschan_getcaps(kobj_t obj, void *data) 888 { 889 struct es_chinfo *ch = data; 890 891 return (&ch->caps); 892 } 893 894 static kobj_method_t eschan1370_methods[] = { 895 KOBJMETHOD(channel_init, eschan_init), 896 KOBJMETHOD(channel_setformat, eschan_setformat), 897 KOBJMETHOD(channel_setspeed, eschan1370_setspeed), 898 KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 899 KOBJMETHOD(channel_setfragments, eschan_setfragments), 900 KOBJMETHOD(channel_trigger, eschan_trigger), 901 KOBJMETHOD(channel_getptr, eschan_getptr), 902 KOBJMETHOD(channel_getcaps, eschan_getcaps), 903 KOBJMETHOD_END 904 }; 905 CHANNEL_DECLARE(eschan1370); 906 907 static kobj_method_t eschan1371_methods[] = { 908 KOBJMETHOD(channel_init, eschan_init), 909 KOBJMETHOD(channel_setformat, eschan_setformat), 910 KOBJMETHOD(channel_setspeed, eschan1371_setspeed), 911 KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 912 KOBJMETHOD(channel_setfragments, eschan_setfragments), 913 KOBJMETHOD(channel_trigger, eschan_trigger), 914 KOBJMETHOD(channel_getptr, eschan_getptr), 915 KOBJMETHOD(channel_getcaps, eschan_getcaps), 916 KOBJMETHOD_END 917 }; 918 CHANNEL_DECLARE(eschan1371); 919 920 /* -------------------------------------------------------------------- */ 921 /* The interrupt handler */ 922 static void 923 es_intr(void *p) 924 { 925 struct es_info *es = p; 926 uint32_t intsrc, sctrl; 927 928 ES_LOCK(es); 929 if (es->polling != 0) { 930 ES_UNLOCK(es); 931 return; 932 } 933 intsrc = es_rd(es, ES1370_REG_STATUS, 4); 934 if ((intsrc & STAT_INTR) == 0) { 935 ES_UNLOCK(es); 936 return; 937 } 938 939 sctrl = es->sctrl; 940 if (intsrc & STAT_ADC) 941 sctrl &= ~SCTRL_R1INTEN; 942 if (intsrc & STAT_DAC1) 943 sctrl &= ~SCTRL_P1INTEN; 944 if (intsrc & STAT_DAC2) 945 sctrl &= ~SCTRL_P2INTEN; 946 947 es_wr(es, ES1370_REG_SERIAL_CONTROL, sctrl, 4); 948 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 949 ES_UNLOCK(es); 950 951 if (intsrc & STAT_ADC) 952 chn_intr(es->ch[ES_ADC].channel); 953 if (intsrc & STAT_DAC1) 954 chn_intr(es->ch[ES_DAC1].channel); 955 if (intsrc & STAT_DAC2) 956 chn_intr(es->ch[ES_DAC2].channel); 957 } 958 959 /* ES1370 specific */ 960 static int 961 es1370_init(struct es_info *es) 962 { 963 uint32_t fixed_rate; 964 int r, single_pcm; 965 966 /* ES1370 default to fixed rate operation */ 967 if (resource_int_value(device_get_name(es->dev), 968 device_get_unit(es->dev), "fixed_rate", &r) == 0) { 969 fixed_rate = r; 970 if (fixed_rate) { 971 if (fixed_rate < es_caps.minspeed) 972 fixed_rate = es_caps.minspeed; 973 if (fixed_rate > es_caps.maxspeed) 974 fixed_rate = es_caps.maxspeed; 975 } 976 } else 977 fixed_rate = es_caps.maxspeed; 978 979 if (resource_int_value(device_get_name(es->dev), 980 device_get_unit(es->dev), "single_pcm_mixer", &r) == 0) 981 single_pcm = (r != 0) ? 1 : 0; 982 else 983 single_pcm = 1; 984 985 ES_LOCK(es); 986 if (ES_NUMPLAY(es->escfg) == 1) 987 single_pcm = 1; 988 /* This is ES1370 */ 989 es->escfg = ES_SET_IS_ES1370(es->escfg, 1); 990 if (fixed_rate) 991 es->escfg = ES_SET_FIXED_RATE(es->escfg, fixed_rate); 992 else { 993 es->escfg = ES_SET_FIXED_RATE(es->escfg, 0); 994 fixed_rate = 8000; 995 } 996 if (single_pcm) 997 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 1); 998 else 999 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 0); 1000 es->ctrl = CTRL_CDC_EN | CTRL_JYSTK_EN | CTRL_SERR_DIS | 1001 (DAC2_SRTODIV(fixed_rate) << CTRL_SH_PCLKDIV); 1002 es->ctrl |= 3 << CTRL_SH_WTSRSEL; 1003 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 1004 1005 es->sctrl = 0; 1006 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 1007 1008 /* No RST, PD */ 1009 es1370_wrcodec(es, CODEC_RES_PD, 3); 1010 /* 1011 * CODEC ADC and CODEC DAC use {LR,B}CLK2 and run off the LRCLK2 PLL; 1012 * program DAC_SYNC=0! 1013 */ 1014 es1370_wrcodec(es, CODEC_CSEL, 0); 1015 /* Recording source is mixer */ 1016 es1370_wrcodec(es, CODEC_ADSEL, 0); 1017 /* MIC amp is 0db */ 1018 es1370_wrcodec(es, CODEC_MGAIN, 0); 1019 ES_UNLOCK(es); 1020 1021 return (0); 1022 } 1023 1024 /* ES1371 specific */ 1025 int 1026 es1371_init(struct es_info *es) 1027 { 1028 uint32_t cssr, devid, revid, subdev; 1029 int idx; 1030 1031 ES_LOCK(es); 1032 /* This is NOT ES1370 */ 1033 es->escfg = ES_SET_IS_ES1370(es->escfg, 0); 1034 es->num = 0; 1035 es->sctrl = 0; 1036 cssr = 0; 1037 devid = pci_get_devid(es->dev); 1038 revid = pci_get_revid(es->dev); 1039 subdev = (pci_get_subdevice(es->dev) << 16) | 1040 pci_get_subvendor(es->dev); 1041 /* 1042 * Joyport blacklist. Either we're facing with broken hardware 1043 * or because this hardware need special (unknown) initialization 1044 * procedures. 1045 */ 1046 switch (subdev) { 1047 case 0x20001274: /* old Ensoniq */ 1048 es->ctrl = 0; 1049 break; 1050 default: 1051 es->ctrl = CTRL_JYSTK_EN; 1052 break; 1053 } 1054 if (devid == CT4730_PCI_ID) { 1055 /* XXX amplifier hack? */ 1056 es->ctrl |= (1 << 16); 1057 } 1058 /* initialize the chips */ 1059 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 1060 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 1061 es_wr(es, ES1371_REG_LEGACY, 0, 4); 1062 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) || 1063 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) || 1064 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) || 1065 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) || 1066 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E)) { 1067 cssr = 1 << 29; 1068 es_wr(es, ES1370_REG_STATUS, cssr, 4); 1069 DELAY(20000); 1070 } 1071 /* AC'97 warm reset to start the bitclk */ 1072 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 1073 es_wr(es, ES1371_REG_LEGACY, ES1371_SYNC_RES, 4); 1074 DELAY(2000); 1075 es_wr(es, ES1370_REG_CONTROL, es->sctrl, 4); 1076 es1371_wait_src_ready(es); 1077 /* Init the sample rate converter */ 1078 es_wr(es, ES1371_REG_SMPRATE, ES1371_DIS_SRC, 4); 1079 for (idx = 0; idx < 0x80; idx++) 1080 es1371_src_write(es, idx, 0); 1081 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4); 1082 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10); 1083 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4); 1084 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10); 1085 es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12); 1086 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12); 1087 es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12); 1088 es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12); 1089 es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12); 1090 es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12); 1091 es1371_adc_rate(es, 22050, ES_ADC); 1092 es1371_dac_rate(es, 22050, ES_DAC1); 1093 es1371_dac_rate(es, 22050, ES_DAC2); 1094 /* 1095 * WARNING: 1096 * enabling the sample rate converter without properly programming 1097 * its parameters causes the chip to lock up (the SRC busy bit will 1098 * be stuck high, and I've found no way to rectify this other than 1099 * power cycle) 1100 */ 1101 es1371_wait_src_ready(es); 1102 es_wr(es, ES1371_REG_SMPRATE, 0, 4); 1103 /* try to reset codec directly */ 1104 es_wr(es, ES1371_REG_CODEC, 0, 4); 1105 es_wr(es, ES1370_REG_STATUS, cssr, 4); 1106 ES_UNLOCK(es); 1107 1108 return (0); 1109 } 1110 1111 /* -------------------------------------------------------------------- */ 1112 1113 static int 1114 es1371_wrcd(kobj_t obj, void *s, int addr, uint32_t data) 1115 { 1116 uint32_t t, x, orig; 1117 struct es_info *es = (struct es_info*)s; 1118 1119 for (t = 0; t < 0x1000; t++) { 1120 if (!es_rd(es, ES1371_REG_CODEC & CODEC_WIP, 4)) 1121 break; 1122 } 1123 /* save the current state for later */ 1124 x = orig = es_rd(es, ES1371_REG_SMPRATE, 4); 1125 /* enable SRC state data in SRC mux */ 1126 es_wr(es, ES1371_REG_SMPRATE, (x & (ES1371_DIS_SRC | ES1371_DIS_P1 | 1127 ES1371_DIS_P2 | ES1371_DIS_R1)) | 0x00010000, 4); 1128 /* busy wait */ 1129 for (t = 0; t < 0x1000; t++) { 1130 if ((es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == 1131 0x00000000) 1132 break; 1133 } 1134 /* wait for a SAFE time to write addr/data and then do it, dammit */ 1135 for (t = 0; t < 0x1000; t++) { 1136 if ((es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == 1137 0x00010000) 1138 break; 1139 } 1140 1141 es_wr(es, ES1371_REG_CODEC, ((addr << CODEC_POADD_SHIFT) & 1142 CODEC_POADD_MASK) | ((data << CODEC_PODAT_SHIFT) & 1143 CODEC_PODAT_MASK), 4); 1144 /* restore SRC reg */ 1145 es1371_wait_src_ready(s); 1146 es_wr(es, ES1371_REG_SMPRATE, orig, 4); 1147 1148 return (0); 1149 } 1150 1151 static int 1152 es1371_rdcd(kobj_t obj, void *s, int addr) 1153 { 1154 uint32_t t, x, orig; 1155 struct es_info *es = (struct es_info *)s; 1156 1157 for (t = 0; t < 0x1000; t++) { 1158 if (!(x = es_rd(es, ES1371_REG_CODEC, 4) & CODEC_WIP)) 1159 break; 1160 } 1161 1162 /* save the current state for later */ 1163 x = orig = es_rd(es, ES1371_REG_SMPRATE, 4); 1164 /* enable SRC state data in SRC mux */ 1165 es_wr(es, ES1371_REG_SMPRATE, (x & (ES1371_DIS_SRC | ES1371_DIS_P1 | 1166 ES1371_DIS_P2 | ES1371_DIS_R1)) | 0x00010000, 4); 1167 /* busy wait */ 1168 for (t = 0; t < 0x1000; t++) { 1169 if ((x = es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == 1170 0x00000000) 1171 break; 1172 } 1173 /* wait for a SAFE time to write addr/data and then do it, dammit */ 1174 for (t = 0; t < 0x1000; t++) { 1175 if ((x = es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == 1176 0x00010000) 1177 break; 1178 } 1179 1180 es_wr(es, ES1371_REG_CODEC, ((addr << CODEC_POADD_SHIFT) & 1181 CODEC_POADD_MASK) | CODEC_PORD, 4); 1182 1183 /* restore SRC reg */ 1184 es1371_wait_src_ready(s); 1185 es_wr(es, ES1371_REG_SMPRATE, orig, 4); 1186 1187 /* now wait for the stinkin' data (RDY) */ 1188 for (t = 0; t < 0x1000; t++) { 1189 if ((x = es_rd(es, ES1371_REG_CODEC, 4)) & CODEC_RDY) 1190 break; 1191 } 1192 1193 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT); 1194 } 1195 1196 static kobj_method_t es1371_ac97_methods[] = { 1197 KOBJMETHOD(ac97_read, es1371_rdcd), 1198 KOBJMETHOD(ac97_write, es1371_wrcd), 1199 KOBJMETHOD_END 1200 }; 1201 AC97_DECLARE(es1371_ac97); 1202 1203 /* -------------------------------------------------------------------- */ 1204 1205 static unsigned int 1206 es1371_src_read(struct es_info *es, unsigned short reg) 1207 { 1208 uint32_t r; 1209 1210 r = es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | 1211 ES1371_DIS_P2 | ES1371_DIS_R1); 1212 r |= ES1371_SRC_RAM_ADDRO(reg); 1213 es_wr(es, ES1371_REG_SMPRATE, r, 4); 1214 return (ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es))); 1215 } 1216 1217 static void 1218 es1371_src_write(struct es_info *es, unsigned short reg, unsigned short data) 1219 { 1220 uint32_t r; 1221 1222 r = es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | 1223 ES1371_DIS_P2 | ES1371_DIS_R1); 1224 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data); 1225 es_wr(es, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE, 4); 1226 } 1227 1228 static unsigned int 1229 es1371_adc_rate(struct es_info *es, unsigned int rate, int set) 1230 { 1231 unsigned int n, truncm, freq, result; 1232 1233 ES_LOCK_ASSERT(es); 1234 1235 if (rate > 48000) 1236 rate = 48000; 1237 if (rate < 4000) 1238 rate = 4000; 1239 n = rate / 3000; 1240 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9))) 1241 n--; 1242 truncm = (21 * n - 1) | 1; 1243 freq = ((48000UL << 15) / rate) * n; 1244 result = (48000UL << 15) / (freq / n); 1245 if (set) { 1246 if (rate >= 24000) { 1247 if (truncm > 239) 1248 truncm = 239; 1249 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 1250 (((239 - truncm) >> 1) << 9) | (n << 4)); 1251 } else { 1252 if (truncm > 119) 1253 truncm = 119; 1254 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 1255 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4)); 1256 } 1257 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS, 1258 (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) & 1259 0x00ff) | ((freq >> 5) & 0xfc00)); 1260 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, 1261 freq & 0x7fff); 1262 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8); 1263 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8); 1264 } 1265 return (result); 1266 } 1267 1268 static unsigned int 1269 es1371_dac_rate(struct es_info *es, unsigned int rate, int set) 1270 { 1271 unsigned int freq, r, result, dac, dis; 1272 1273 ES_LOCK_ASSERT(es); 1274 1275 if (rate > 48000) 1276 rate = 48000; 1277 if (rate < 4000) 1278 rate = 4000; 1279 freq = ((rate << 15) + 1500) / 3000; 1280 result = (freq * 3000) >> 15; 1281 1282 dac = (set == ES_DAC1) ? ES_SMPREG_DAC1 : ES_SMPREG_DAC2; 1283 dis = (set == ES_DAC1) ? ES1371_DIS_P2 : ES1371_DIS_P1; 1284 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | 1285 ES1371_DIS_P2 | ES1371_DIS_R1)); 1286 es_wr(es, ES1371_REG_SMPRATE, r, 4); 1287 es1371_src_write(es, dac + ES_SMPREG_INT_REGS, 1288 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | 1289 ((freq >> 5) & 0xfc00)); 1290 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 1291 r = (es1371_wait_src_ready(es) & 1292 (ES1371_DIS_SRC | dis | ES1371_DIS_R1)); 1293 es_wr(es, ES1371_REG_SMPRATE, r, 4); 1294 return (result); 1295 } 1296 1297 static uint32_t 1298 es1371_wait_src_ready(struct es_info *es) 1299 { 1300 uint32_t t, r; 1301 1302 for (t = 0; t < 0x1000; t++) { 1303 if (!((r = es_rd(es, ES1371_REG_SMPRATE, 4)) & 1304 ES1371_SRC_RAM_BUSY)) 1305 return (r); 1306 DELAY(1); 1307 } 1308 device_printf(es->dev, "%s: timed out 0x%x [0x%x]\n", __func__, 1309 ES1371_REG_SMPRATE, r); 1310 return (0); 1311 } 1312 1313 /* -------------------------------------------------------------------- */ 1314 1315 /* 1316 * Probe and attach the card 1317 */ 1318 1319 static int 1320 es_pci_probe(device_t dev) 1321 { 1322 switch(pci_get_devid(dev)) { 1323 case ES1370_PCI_ID: 1324 device_set_desc(dev, "AudioPCI ES1370"); 1325 return (BUS_PROBE_DEFAULT); 1326 case ES1371_PCI_ID: 1327 switch(pci_get_revid(dev)) { 1328 case ES1371REV_ES1371_A: 1329 device_set_desc(dev, "AudioPCI ES1371-A"); 1330 return (BUS_PROBE_DEFAULT); 1331 case ES1371REV_ES1371_B: 1332 device_set_desc(dev, "AudioPCI ES1371-B"); 1333 return (BUS_PROBE_DEFAULT); 1334 case ES1371REV_ES1373_A: 1335 device_set_desc(dev, "AudioPCI ES1373-A"); 1336 return (BUS_PROBE_DEFAULT); 1337 case ES1371REV_ES1373_B: 1338 device_set_desc(dev, "AudioPCI ES1373-B"); 1339 return (BUS_PROBE_DEFAULT); 1340 case ES1371REV_ES1373_8: 1341 device_set_desc(dev, "AudioPCI ES1373-8"); 1342 return (BUS_PROBE_DEFAULT); 1343 case ES1371REV_CT5880_A: 1344 device_set_desc(dev, "Creative CT5880-A"); 1345 return (BUS_PROBE_DEFAULT); 1346 default: 1347 device_set_desc(dev, "AudioPCI ES1371-?"); 1348 device_printf(dev, 1349 "unknown revision %d -- please report to " 1350 "freebsd-multimedia@freebsd.org\n", 1351 pci_get_revid(dev)); 1352 return (BUS_PROBE_DEFAULT); 1353 } 1354 case ES1371_PCI_ID2: 1355 device_set_desc(dev, "Strange AudioPCI ES1371-? (vid=3274)"); 1356 device_printf(dev, 1357 "unknown revision %d -- please report to " 1358 "freebsd-multimedia@freebsd.org\n", pci_get_revid(dev)); 1359 return (BUS_PROBE_DEFAULT); 1360 case CT4730_PCI_ID: 1361 switch(pci_get_revid(dev)) { 1362 case CT4730REV_CT4730_A: 1363 device_set_desc(dev, 1364 "Creative SB AudioPCI CT4730/EV1938"); 1365 return (BUS_PROBE_DEFAULT); 1366 default: 1367 device_set_desc(dev, "Creative SB AudioPCI CT4730-?"); 1368 device_printf(dev, 1369 "unknown revision %d -- please report to " 1370 "freebsd-multimedia@freebsd.org\n", 1371 pci_get_revid(dev)); 1372 return (BUS_PROBE_DEFAULT); 1373 } 1374 case CT5880_PCI_ID: 1375 switch(pci_get_revid(dev)) { 1376 case CT5880REV_CT5880_C: 1377 device_set_desc(dev, "Creative CT5880-C"); 1378 return (BUS_PROBE_DEFAULT); 1379 case CT5880REV_CT5880_D: 1380 device_set_desc(dev, "Creative CT5880-D"); 1381 return (BUS_PROBE_DEFAULT); 1382 case CT5880REV_CT5880_E: 1383 device_set_desc(dev, "Creative CT5880-E"); 1384 return (BUS_PROBE_DEFAULT); 1385 default: 1386 device_set_desc(dev, "Creative CT5880-?"); 1387 device_printf(dev, 1388 "unknown revision %d -- please report to " 1389 "freebsd-multimedia@freebsd.org\n", 1390 pci_get_revid(dev)); 1391 return (BUS_PROBE_DEFAULT); 1392 } 1393 default: 1394 return (ENXIO); 1395 } 1396 } 1397 1398 static int 1399 sysctl_es137x_spdif_enable(SYSCTL_HANDLER_ARGS) 1400 { 1401 struct es_info *es; 1402 device_t dev; 1403 uint32_t r; 1404 int err, new_en; 1405 1406 dev = oidp->oid_arg1; 1407 es = pcm_getdevinfo(dev); 1408 ES_LOCK(es); 1409 r = es_rd(es, ES1370_REG_STATUS, 4); 1410 ES_UNLOCK(es); 1411 new_en = (r & ENABLE_SPDIF) ? 1 : 0; 1412 err = sysctl_handle_int(oidp, &new_en, 0, req); 1413 1414 if (err || req->newptr == NULL) 1415 return (err); 1416 if (new_en < 0 || new_en > 1) 1417 return (EINVAL); 1418 1419 ES_LOCK(es); 1420 if (new_en) { 1421 r |= ENABLE_SPDIF; 1422 es->ctrl |= SPDIFEN_B; 1423 es->ctrl |= RECEN_B; 1424 } else { 1425 r &= ~ENABLE_SPDIF; 1426 es->ctrl &= ~SPDIFEN_B; 1427 es->ctrl &= ~RECEN_B; 1428 } 1429 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 1430 es_wr(es, ES1370_REG_STATUS, r, 4); 1431 ES_UNLOCK(es); 1432 1433 return (0); 1434 } 1435 1436 static int 1437 sysctl_es137x_latency_timer(SYSCTL_HANDLER_ARGS) 1438 { 1439 struct es_info *es; 1440 device_t dev; 1441 uint32_t val; 1442 int err; 1443 1444 dev = oidp->oid_arg1; 1445 es = pcm_getdevinfo(dev); 1446 ES_LOCK(es); 1447 val = pci_read_config(dev, PCIR_LATTIMER, 1); 1448 ES_UNLOCK(es); 1449 err = sysctl_handle_int(oidp, &val, 0, req); 1450 1451 if (err || req->newptr == NULL) 1452 return (err); 1453 if (val > 255) 1454 return (EINVAL); 1455 1456 ES_LOCK(es); 1457 pci_write_config(dev, PCIR_LATTIMER, val, 1); 1458 ES_UNLOCK(es); 1459 1460 return (0); 1461 } 1462 1463 static int 1464 sysctl_es137x_fixed_rate(SYSCTL_HANDLER_ARGS) 1465 { 1466 struct es_info *es; 1467 device_t dev; 1468 uint32_t val; 1469 int err; 1470 1471 dev = oidp->oid_arg1; 1472 es = pcm_getdevinfo(dev); 1473 ES_LOCK(es); 1474 val = ES_FIXED_RATE(es->escfg); 1475 if (val < es_caps.minspeed) 1476 val = 0; 1477 ES_UNLOCK(es); 1478 err = sysctl_handle_int(oidp, &val, 0, req); 1479 1480 if (err || req->newptr == NULL) 1481 return (err); 1482 if (val != 0 && (val < es_caps.minspeed || val > es_caps.maxspeed)) 1483 return (EINVAL); 1484 1485 ES_LOCK(es); 1486 if (es->ctrl & (CTRL_DAC2_EN|CTRL_ADC_EN)) { 1487 ES_UNLOCK(es); 1488 return (EBUSY); 1489 } 1490 if (val) { 1491 if (val != ES_FIXED_RATE(es->escfg)) { 1492 es->escfg = ES_SET_FIXED_RATE(es->escfg, val); 1493 es->ch[ES_DAC2].caps.maxspeed = val; 1494 es->ch[ES_DAC2].caps.minspeed = val; 1495 es->ch[ES_ADC].caps.maxspeed = val; 1496 es->ch[ES_ADC].caps.minspeed = val; 1497 es->ctrl &= ~CTRL_PCLKDIV; 1498 es->ctrl |= DAC2_SRTODIV(val) << CTRL_SH_PCLKDIV; 1499 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 1500 } 1501 } else { 1502 es->escfg = ES_SET_FIXED_RATE(es->escfg, 0); 1503 es->ch[ES_DAC2].caps = es_caps; 1504 es->ch[ES_ADC].caps = es_caps; 1505 } 1506 ES_UNLOCK(es); 1507 1508 return (0); 1509 } 1510 1511 static int 1512 sysctl_es137x_single_pcm_mixer(SYSCTL_HANDLER_ARGS) 1513 { 1514 struct es_info *es; 1515 struct snddev_info *d; 1516 struct snd_mixer *m; 1517 device_t dev; 1518 uint32_t val, set; 1519 int recsrc, level, err; 1520 1521 dev = oidp->oid_arg1; 1522 d = device_get_softc(dev); 1523 if (!PCM_REGISTERED(d) || !MIXER_REGISTERED(d->mixer)) 1524 return (EINVAL); 1525 es = d->devinfo; 1526 if (es == NULL) 1527 return (EINVAL); 1528 ES_LOCK(es); 1529 set = ES_SINGLE_PCM_MIX(es->escfg); 1530 val = set; 1531 ES_UNLOCK(es); 1532 err = sysctl_handle_int(oidp, &val, 0, req); 1533 1534 if (err || req->newptr == NULL) 1535 return (err); 1536 if (!(val == 0 || val == 1)) 1537 return (EINVAL); 1538 if (val == set) 1539 return (0); 1540 PCM_ACQUIRE_QUICK(d); 1541 m = d->mixer; 1542 if (m == NULL) { 1543 PCM_RELEASE_QUICK(d); 1544 return (ENODEV); 1545 } 1546 level = mix_get(m, SOUND_MIXER_PCM); 1547 recsrc = mix_getrecsrc(m); 1548 if (level < 0 || recsrc < 0) { 1549 PCM_RELEASE_QUICK(d); 1550 return (ENXIO); 1551 } 1552 1553 ES_LOCK(es); 1554 if (es->ctrl & (CTRL_ADC_EN | CTRL_DAC1_EN | CTRL_DAC2_EN)) { 1555 ES_UNLOCK(es); 1556 PCM_RELEASE_QUICK(d); 1557 return (EBUSY); 1558 } 1559 if (val) 1560 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 1); 1561 else 1562 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 0); 1563 ES_UNLOCK(es); 1564 if (!val) { 1565 mix_setdevs(m, mix_getdevs(m) | (1 << SOUND_MIXER_SYNTH)); 1566 mix_setrecdevs(m, mix_getrecdevs(m) | (1 << SOUND_MIXER_SYNTH)); 1567 err = mix_set(m, SOUND_MIXER_SYNTH, level & 0x7f, 1568 (level >> 8) & 0x7f); 1569 } else { 1570 err = mix_set(m, SOUND_MIXER_SYNTH, level & 0x7f, 1571 (level >> 8) & 0x7f); 1572 mix_setdevs(m, mix_getdevs(m) & ~(1 << SOUND_MIXER_SYNTH)); 1573 mix_setrecdevs(m, mix_getrecdevs(m) & 1574 ~(1 << SOUND_MIXER_SYNTH)); 1575 } 1576 if (!err) { 1577 level = recsrc; 1578 if (recsrc & (1 << SOUND_MIXER_PCM)) 1579 recsrc |= 1 << SOUND_MIXER_SYNTH; 1580 else if (recsrc & (1 << SOUND_MIXER_SYNTH)) 1581 recsrc |= 1 << SOUND_MIXER_PCM; 1582 if (level != recsrc) 1583 err = mix_setrecsrc(m, recsrc); 1584 } 1585 1586 PCM_RELEASE_QUICK(d); 1587 1588 return (err); 1589 } 1590 1591 static int 1592 sysctl_es_polling(SYSCTL_HANDLER_ARGS) 1593 { 1594 struct es_info *es; 1595 device_t dev; 1596 int err, val; 1597 1598 dev = oidp->oid_arg1; 1599 es = pcm_getdevinfo(dev); 1600 if (es == NULL) 1601 return (EINVAL); 1602 ES_LOCK(es); 1603 val = es->polling; 1604 ES_UNLOCK(es); 1605 err = sysctl_handle_int(oidp, &val, 0, req); 1606 1607 if (err || req->newptr == NULL) 1608 return (err); 1609 if (val < 0 || val > 1) 1610 return (EINVAL); 1611 1612 ES_LOCK(es); 1613 if (val != es->polling) { 1614 if (es_chan_active(es) != 0) 1615 err = EBUSY; 1616 else if (val == 0) 1617 es->polling = 0; 1618 else 1619 es->polling = 1; 1620 } 1621 ES_UNLOCK(es); 1622 1623 return (err); 1624 } 1625 1626 static void 1627 es_init_sysctls(device_t dev) 1628 { 1629 struct es_info *es; 1630 int r, devid, revid; 1631 1632 devid = pci_get_devid(dev); 1633 revid = pci_get_revid(dev); 1634 es = pcm_getdevinfo(dev); 1635 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) || 1636 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) || 1637 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) || 1638 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) || 1639 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E)) { 1640 /* XXX: an user should be able to set this with a control tool, 1641 if not done before 7.0-RELEASE, this needs to be converted 1642 to a device specific sysctl "dev.pcm.X.yyy" via 1643 device_get_sysctl_*() as discussed on multimedia@ in msg-id 1644 <861wujij2q.fsf@xps.des.no> */ 1645 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 1646 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, 1647 "spdif_enabled", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, 1648 dev, sizeof(dev), sysctl_es137x_spdif_enable, "I", 1649 "Enable S/PDIF output on primary playback channel"); 1650 } else if (devid == ES1370_PCI_ID) { 1651 /* 1652 * Enable fixed rate sysctl if both DAC2 / ADC enabled. 1653 */ 1654 if (es->ch[ES_DAC2].channel != NULL && 1655 es->ch[ES_ADC].channel != NULL) { 1656 /* XXX: an user should be able to set this with a control tool, 1657 if not done before 7.0-RELEASE, this needs to be converted 1658 to a device specific sysctl "dev.pcm.X.yyy" via 1659 device_get_sysctl_*() as discussed on multimedia@ in msg-id 1660 <861wujij2q.fsf@xps.des.no> */ 1661 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 1662 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 1663 OID_AUTO, "fixed_rate", 1664 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, 1665 dev, sizeof(dev), sysctl_es137x_fixed_rate, "I", 1666 "Enable fixed rate playback/recording"); 1667 } 1668 /* 1669 * Enable single pcm mixer sysctl if both DAC1/2 enabled. 1670 */ 1671 if (es->ch[ES_DAC1].channel != NULL && 1672 es->ch[ES_DAC2].channel != NULL) { 1673 /* XXX: an user should be able to set this with a control tool, 1674 if not done before 7.0-RELEASE, this needs to be converted 1675 to a device specific sysctl "dev.pcm.X.yyy" via 1676 device_get_sysctl_*() as discussed on multimedia@ in msg-id 1677 <861wujij2q.fsf@xps.des.no> */ 1678 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 1679 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 1680 OID_AUTO, "single_pcm_mixer", 1681 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, dev, 1682 sizeof(dev), sysctl_es137x_single_pcm_mixer, "I", 1683 "Single PCM mixer controller for both DAC1/DAC2"); 1684 } 1685 } 1686 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 1687 "latency_timer", &r) == 0 && !(r < 0 || r > 255)) 1688 pci_write_config(dev, PCIR_LATTIMER, r, 1); 1689 /* XXX: this needs to be converted to a device specific sysctl 1690 "dev.pcm.X.yyy" via device_get_sysctl_*() as discussed on 1691 multimedia@ in msg-id <861wujij2q.fsf@xps.des.no> */ 1692 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 1693 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, 1694 "latency_timer", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, 1695 dev, sizeof(dev), sysctl_es137x_latency_timer, "I", 1696 "PCI Latency Timer configuration"); 1697 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 1698 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, 1699 "polling", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, dev, 1700 sizeof(dev), sysctl_es_polling, "I", "Enable polling mode"); 1701 } 1702 1703 static int 1704 es_pci_attach(device_t dev) 1705 { 1706 struct es_info *es = NULL; 1707 int mapped, i, numplay, dac_cfg; 1708 char status[SND_STATUSLEN]; 1709 struct ac97_info *codec = NULL; 1710 kobj_class_t ct = NULL; 1711 uint32_t devid; 1712 1713 es = malloc(sizeof *es, M_DEVBUF, M_WAITOK | M_ZERO); 1714 mtx_init(&es->lock, device_get_nameunit(dev), "snd_es137x softc", 1715 MTX_DEF); 1716 es->dev = dev; 1717 es->escfg = 0; 1718 mapped = 0; 1719 1720 pci_enable_busmaster(dev); 1721 if (mapped == 0) { 1722 es->regid = MEM_MAP_REG; 1723 es->regtype = SYS_RES_MEMORY; 1724 es->reg = bus_alloc_resource_any(dev, es->regtype, &es->regid, 1725 RF_ACTIVE); 1726 if (es->reg) 1727 mapped++; 1728 } 1729 if (mapped == 0) { 1730 es->regid = PCIR_BAR(0); 1731 es->regtype = SYS_RES_IOPORT; 1732 es->reg = bus_alloc_resource_any(dev, es->regtype, &es->regid, 1733 RF_ACTIVE); 1734 if (es->reg) 1735 mapped++; 1736 } 1737 if (mapped == 0) { 1738 device_printf(dev, "unable to map register space\n"); 1739 goto bad; 1740 } 1741 1742 es->st = rman_get_bustag(es->reg); 1743 es->sh = rman_get_bushandle(es->reg); 1744 callout_init(&es->poll_timer, 1); 1745 es->poll_ticks = 1; 1746 1747 if (resource_int_value(device_get_name(dev), 1748 device_get_unit(dev), "polling", &i) == 0 && i != 0) 1749 es->polling = 1; 1750 else 1751 es->polling = 0; 1752 1753 es->bufsz = pcm_getbuffersize(dev, 4096, ES_DEFAULT_BUFSZ, 65536); 1754 if (resource_int_value(device_get_name(dev), 1755 device_get_unit(dev), "blocksize", &i) == 0 && i > 0) { 1756 i &= ES_BLK_ALIGN; 1757 if (i < ES_BLK_MIN) 1758 i = ES_BLK_MIN; 1759 es->blkcnt = es->bufsz / i; 1760 i = 0; 1761 while (es->blkcnt >> i) 1762 i++; 1763 es->blkcnt = 1 << (i - 1); 1764 if (es->blkcnt < ES_DMA_SEGS_MIN) 1765 es->blkcnt = ES_DMA_SEGS_MIN; 1766 else if (es->blkcnt > ES_DMA_SEGS_MAX) 1767 es->blkcnt = ES_DMA_SEGS_MAX; 1768 1769 } else 1770 es->blkcnt = 2; 1771 1772 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 1773 "dac", &dac_cfg) == 0) { 1774 if (dac_cfg < 0 || dac_cfg > 3) 1775 dac_cfg = ES_DEFAULT_DAC_CFG; 1776 } else 1777 dac_cfg = ES_DEFAULT_DAC_CFG; 1778 1779 switch (dac_cfg) { 1780 case 0: /* Enable all DAC: DAC1, DAC2 */ 1781 numplay = 2; 1782 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC1); 1783 es->escfg = ES_SET_DAC_SECOND(es->escfg, ES_DAC2); 1784 break; 1785 case 1: /* Only DAC1 */ 1786 numplay = 1; 1787 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC1); 1788 break; 1789 case 3: /* Enable all DAC / swap position: DAC2, DAC1 */ 1790 numplay = 2; 1791 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC2); 1792 es->escfg = ES_SET_DAC_SECOND(es->escfg, ES_DAC1); 1793 break; 1794 case 2: /* Only DAC2 */ 1795 default: 1796 numplay = 1; 1797 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC2); 1798 break; 1799 } 1800 es->escfg = ES_SET_NUMPLAY(es->escfg, numplay); 1801 es->escfg = ES_SET_NUMREC(es->escfg, 1); 1802 1803 devid = pci_get_devid(dev); 1804 pcm_init(dev, es); 1805 switch (devid) { 1806 case ES1371_PCI_ID: 1807 case ES1371_PCI_ID2: 1808 case CT5880_PCI_ID: 1809 case CT4730_PCI_ID: 1810 es1371_init(es); 1811 codec = AC97_CREATE(dev, es, es1371_ac97); 1812 if (codec == NULL) 1813 goto bad; 1814 /* our init routine does everything for us */ 1815 /* set to NULL; flag mixer_init not to run the ac97_init */ 1816 /* ac97_mixer.init = NULL; */ 1817 if (mixer_init(dev, ac97_getmixerclass(), codec)) 1818 goto bad; 1819 ct = &eschan1371_class; 1820 break; 1821 case ES1370_PCI_ID: 1822 es1370_init(es); 1823 /* 1824 * Disable fixed rate operation if DAC2 disabled. 1825 * This is a special case for es1370 only, where the 1826 * speed of both ADC and DAC2 locked together. 1827 */ 1828 if (!ES_DAC2_ENABLED(es->escfg)) 1829 es->escfg = ES_SET_FIXED_RATE(es->escfg, 0); 1830 if (mixer_init(dev, &es1370_mixer_class, es)) 1831 goto bad; 1832 ct = &eschan1370_class; 1833 break; 1834 default: 1835 goto bad; 1836 /* NOTREACHED */ 1837 } 1838 1839 es->irqid = 0; 1840 es->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &es->irqid, 1841 RF_ACTIVE | RF_SHAREABLE); 1842 if (!es->irq || snd_setup_intr(dev, es->irq, INTR_MPSAFE, es_intr, 1843 es, &es->ih)) { 1844 device_printf(dev, "unable to map interrupt\n"); 1845 goto bad; 1846 } 1847 1848 if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), 1849 /*alignment*/2, /*boundary*/0, 1850 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 1851 /*highaddr*/BUS_SPACE_MAXADDR, 1852 /*filter*/NULL, /*filterarg*/NULL, 1853 /*maxsize*/es->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff, 1854 /*flags*/0, /*lockfunc*/NULL, 1855 /*lockarg*/NULL, &es->parent_dmat) != 0) { 1856 device_printf(dev, "unable to create dma tag\n"); 1857 goto bad; 1858 } 1859 1860 snprintf(status, SND_STATUSLEN, "%s 0x%jx irq %jd on %s", 1861 (es->regtype == SYS_RES_IOPORT)? "port" : "mem", 1862 rman_get_start(es->reg), rman_get_start(es->irq), 1863 device_get_nameunit(device_get_parent(dev))); 1864 1865 for (i = 0; i < numplay; i++) 1866 pcm_addchan(dev, PCMDIR_PLAY, ct, es); 1867 pcm_addchan(dev, PCMDIR_REC, ct, es); 1868 es_init_sysctls(dev); 1869 if (pcm_register(dev, status)) 1870 goto bad; 1871 es->escfg = ES_SET_GP(es->escfg, 0); 1872 if (numplay == 1) 1873 device_printf(dev, "<Playback: DAC%d / Record: ADC>\n", 1874 ES_DAC_FIRST(es->escfg) + 1); 1875 else if (numplay == 2) 1876 device_printf(dev, "<Playback: DAC%d,DAC%d / Record: ADC>\n", 1877 ES_DAC_FIRST(es->escfg) + 1, ES_DAC_SECOND(es->escfg) + 1); 1878 return (0); 1879 1880 bad: 1881 if (es->parent_dmat) 1882 bus_dma_tag_destroy(es->parent_dmat); 1883 if (es->ih) 1884 bus_teardown_intr(dev, es->irq, es->ih); 1885 if (es->irq) 1886 bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 1887 if (codec) 1888 ac97_destroy(codec); 1889 if (es->reg) 1890 bus_release_resource(dev, es->regtype, es->regid, es->reg); 1891 mtx_destroy(&es->lock); 1892 free(es, M_DEVBUF); 1893 return (ENXIO); 1894 } 1895 1896 static int 1897 es_pci_detach(device_t dev) 1898 { 1899 int r; 1900 struct es_info *es; 1901 1902 r = pcm_unregister(dev); 1903 if (r) 1904 return (r); 1905 1906 es = pcm_getdevinfo(dev); 1907 1908 if (es != NULL && es->num != 0) { 1909 ES_LOCK(es); 1910 es->polling = 0; 1911 callout_stop(&es->poll_timer); 1912 ES_UNLOCK(es); 1913 callout_drain(&es->poll_timer); 1914 } 1915 1916 bus_teardown_intr(dev, es->irq, es->ih); 1917 bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 1918 bus_release_resource(dev, es->regtype, es->regid, es->reg); 1919 bus_dma_tag_destroy(es->parent_dmat); 1920 mtx_destroy(&es->lock); 1921 free(es, M_DEVBUF); 1922 1923 return (0); 1924 } 1925 1926 static device_method_t es_methods[] = { 1927 /* Device interface */ 1928 DEVMETHOD(device_probe, es_pci_probe), 1929 DEVMETHOD(device_attach, es_pci_attach), 1930 DEVMETHOD(device_detach, es_pci_detach), 1931 DEVMETHOD_END 1932 }; 1933 1934 static driver_t es_driver = { 1935 "pcm", 1936 es_methods, 1937 PCM_SOFTC_SIZE, 1938 }; 1939 1940 DRIVER_MODULE(snd_es137x, pci, es_driver, 0, 0); 1941 MODULE_DEPEND(snd_es137x, sound, 1, 1, 1); 1942 MODULE_VERSION(snd_es137x, 1); 1943