1 // SPDX-License-Identifier: ISC
2 /*
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
6 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
7 */
8
9 #if defined(__FreeBSD__)
10 #define LINUXKPI_PARAM_PREFIX ath10k_core_
11 #endif
12
13 #include <linux/export.h>
14 #include <linux/module.h>
15 #include <linux/firmware.h>
16 #if defined(__linux__) || (defined(__FreeBSD__) && defined(CONFIG_OF))
17 #include <linux/of.h>
18 #endif
19 #include <linux/property.h>
20 #include <linux/dmi.h>
21 #include <linux/ctype.h>
22 #include <linux/pm_qos.h>
23 #include <linux/nvmem-consumer.h>
24 #include <asm/byteorder.h>
25
26 #include "core.h"
27 #include "mac.h"
28 #include "htc.h"
29 #include "hif.h"
30 #include "wmi.h"
31 #include "bmi.h"
32 #include "debug.h"
33 #include "htt.h"
34 #include "testmode.h"
35 #include "wmi-ops.h"
36 #include "coredump.h"
37 #if defined(CONFIG_FWLOG)
38 #include "fwlog.h"
39 #endif
40 #include "leds.h"
41
42 unsigned int ath10k_debug_mask;
43 EXPORT_SYMBOL(ath10k_debug_mask);
44
45 static unsigned int ath10k_cryptmode_param;
46 static bool uart_print;
47 static bool skip_otp;
48 static bool fw_diag_log;
49
50 /* frame mode values are mapped as per enum ath10k_hw_txrx_mode */
51 unsigned int ath10k_frame_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
52
53 unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) |
54 BIT(ATH10K_FW_CRASH_DUMP_CE_DATA);
55
56 /* FIXME: most of these should be readonly */
57 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
58 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
59 module_param(uart_print, bool, 0644);
60 module_param(skip_otp, bool, 0644);
61 module_param(fw_diag_log, bool, 0644);
62 module_param_named(frame_mode, ath10k_frame_mode, uint, 0644);
63 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444);
64
65 MODULE_PARM_DESC(debug_mask, "Debugging mask");
66 MODULE_PARM_DESC(uart_print, "Uart target debugging");
67 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
68 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
69 MODULE_PARM_DESC(frame_mode,
70 "Datapath frame mode (0: raw, 1: native wifi (default), 2: ethernet)");
71 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file");
72 MODULE_PARM_DESC(fw_diag_log, "Diag based fw log debugging");
73
74 static const struct ath10k_hw_params ath10k_hw_params_list[] = {
75 {
76 .id = QCA988X_HW_2_0_VERSION,
77 .dev_id = QCA988X_2_0_DEVICE_ID,
78 .bus = ATH10K_BUS_PCI,
79 .name = "qca988x hw2.0",
80 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
81 .uart_pin = 7,
82 .led_pin = 1,
83 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
84 .otp_exe_param = 0,
85 .channel_counters_freq_hz = 88000,
86 .max_probe_resp_desc_thres = 0,
87 .cal_data_len = 2116,
88 .fw = {
89 .dir = QCA988X_HW_2_0_FW_DIR,
90 .board_size = QCA988X_BOARD_DATA_SZ,
91 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
92 },
93 .rx_desc_ops = &qca988x_rx_desc_ops,
94 .hw_ops = &qca988x_ops,
95 .decap_align_bytes = 4,
96 .spectral_bin_discard = 0,
97 .spectral_bin_offset = 0,
98 .vht160_mcs_rx_highest = 0,
99 .vht160_mcs_tx_highest = 0,
100 .n_cipher_suites = 8,
101 .ast_skid_limit = 0x10,
102 .num_wds_entries = 0x20,
103 .target_64bit = false,
104 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
105 .shadow_reg_support = false,
106 .rri_on_ddr = false,
107 .hw_filter_reset_required = true,
108 .fw_diag_ce_download = false,
109 .credit_size_workaround = false,
110 .tx_stats_over_pktlog = true,
111 .dynamic_sar_support = false,
112 .hw_restart_disconnect = false,
113 .use_fw_tx_credits = true,
114 .delay_unmap_buffer = false,
115 .mcast_frame_registration = false,
116 },
117 {
118 .id = QCA988X_HW_2_0_VERSION,
119 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT,
120 .name = "qca988x hw2.0 ubiquiti",
121 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
122 .uart_pin = 7,
123 .led_pin = 0,
124 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
125 .otp_exe_param = 0,
126 .channel_counters_freq_hz = 88000,
127 .max_probe_resp_desc_thres = 0,
128 .cal_data_len = 2116,
129 .fw = {
130 .dir = QCA988X_HW_2_0_FW_DIR,
131 .board_size = QCA988X_BOARD_DATA_SZ,
132 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
133 },
134 .rx_desc_ops = &qca988x_rx_desc_ops,
135 .hw_ops = &qca988x_ops,
136 .decap_align_bytes = 4,
137 .spectral_bin_discard = 0,
138 .spectral_bin_offset = 0,
139 .vht160_mcs_rx_highest = 0,
140 .vht160_mcs_tx_highest = 0,
141 .n_cipher_suites = 8,
142 .ast_skid_limit = 0x10,
143 .num_wds_entries = 0x20,
144 .target_64bit = false,
145 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
146 .shadow_reg_support = false,
147 .rri_on_ddr = false,
148 .hw_filter_reset_required = true,
149 .fw_diag_ce_download = false,
150 .credit_size_workaround = false,
151 .tx_stats_over_pktlog = true,
152 .dynamic_sar_support = false,
153 .hw_restart_disconnect = false,
154 .use_fw_tx_credits = true,
155 .delay_unmap_buffer = false,
156 .mcast_frame_registration = false,
157 },
158 {
159 .id = QCA9887_HW_1_0_VERSION,
160 .dev_id = QCA9887_1_0_DEVICE_ID,
161 .bus = ATH10K_BUS_PCI,
162 .name = "qca9887 hw1.0",
163 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
164 .uart_pin = 7,
165 .led_pin = 1,
166 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
167 .otp_exe_param = 0,
168 .channel_counters_freq_hz = 88000,
169 .max_probe_resp_desc_thres = 0,
170 .cal_data_len = 2116,
171 .fw = {
172 .dir = QCA9887_HW_1_0_FW_DIR,
173 .board_size = QCA9887_BOARD_DATA_SZ,
174 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
175 },
176 .rx_desc_ops = &qca988x_rx_desc_ops,
177 .hw_ops = &qca988x_ops,
178 .decap_align_bytes = 4,
179 .spectral_bin_discard = 0,
180 .spectral_bin_offset = 0,
181 .vht160_mcs_rx_highest = 0,
182 .vht160_mcs_tx_highest = 0,
183 .n_cipher_suites = 8,
184 .ast_skid_limit = 0x10,
185 .num_wds_entries = 0x20,
186 .target_64bit = false,
187 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
188 .shadow_reg_support = false,
189 .rri_on_ddr = false,
190 .hw_filter_reset_required = true,
191 .fw_diag_ce_download = false,
192 .credit_size_workaround = false,
193 .tx_stats_over_pktlog = false,
194 .dynamic_sar_support = false,
195 .hw_restart_disconnect = false,
196 .use_fw_tx_credits = true,
197 .delay_unmap_buffer = false,
198 .mcast_frame_registration = false,
199 },
200 {
201 .id = QCA6174_HW_3_2_VERSION,
202 .dev_id = QCA6174_3_2_DEVICE_ID,
203 .bus = ATH10K_BUS_SDIO,
204 .name = "qca6174 hw3.2 sdio",
205 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
206 .uart_pin = 19,
207 .led_pin = 0,
208 .otp_exe_param = 0,
209 .channel_counters_freq_hz = 88000,
210 .max_probe_resp_desc_thres = 0,
211 .cal_data_len = 0,
212 .fw = {
213 .dir = QCA6174_HW_3_0_FW_DIR,
214 .board_size = QCA6174_BOARD_DATA_SZ,
215 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
216 },
217 .rx_desc_ops = &qca988x_rx_desc_ops,
218 .hw_ops = &qca6174_sdio_ops,
219 .hw_clk = qca6174_clk,
220 .target_cpu_freq = 176000000,
221 .decap_align_bytes = 4,
222 .n_cipher_suites = 8,
223 .num_peers = 10,
224 .ast_skid_limit = 0x10,
225 .num_wds_entries = 0x20,
226 .uart_pin_workaround = true,
227 .tx_stats_over_pktlog = false,
228 .credit_size_workaround = false,
229 .bmi_large_size_download = true,
230 .supports_peer_stats_info = true,
231 .dynamic_sar_support = true,
232 .hw_restart_disconnect = false,
233 .use_fw_tx_credits = true,
234 .delay_unmap_buffer = false,
235 .mcast_frame_registration = false,
236 },
237 {
238 .id = QCA6174_HW_2_1_VERSION,
239 .dev_id = QCA6164_2_1_DEVICE_ID,
240 .bus = ATH10K_BUS_PCI,
241 .name = "qca6164 hw2.1",
242 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
243 .uart_pin = 6,
244 .led_pin = 0,
245 .otp_exe_param = 0,
246 .channel_counters_freq_hz = 88000,
247 .max_probe_resp_desc_thres = 0,
248 .cal_data_len = 8124,
249 .fw = {
250 .dir = QCA6174_HW_2_1_FW_DIR,
251 .board_size = QCA6174_BOARD_DATA_SZ,
252 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
253 },
254 .rx_desc_ops = &qca988x_rx_desc_ops,
255 .hw_ops = &qca988x_ops,
256 .decap_align_bytes = 4,
257 .spectral_bin_discard = 0,
258 .spectral_bin_offset = 0,
259 .vht160_mcs_rx_highest = 0,
260 .vht160_mcs_tx_highest = 0,
261 .n_cipher_suites = 8,
262 .ast_skid_limit = 0x10,
263 .num_wds_entries = 0x20,
264 .target_64bit = false,
265 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
266 .shadow_reg_support = false,
267 .rri_on_ddr = false,
268 .hw_filter_reset_required = true,
269 .fw_diag_ce_download = false,
270 .credit_size_workaround = false,
271 .tx_stats_over_pktlog = false,
272 .dynamic_sar_support = false,
273 .hw_restart_disconnect = false,
274 .use_fw_tx_credits = true,
275 .delay_unmap_buffer = false,
276 .mcast_frame_registration = false,
277 },
278 {
279 .id = QCA6174_HW_2_1_VERSION,
280 .dev_id = QCA6174_2_1_DEVICE_ID,
281 .bus = ATH10K_BUS_PCI,
282 .name = "qca6174 hw2.1",
283 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
284 .uart_pin = 6,
285 .led_pin = 0,
286 .otp_exe_param = 0,
287 .channel_counters_freq_hz = 88000,
288 .max_probe_resp_desc_thres = 0,
289 .cal_data_len = 8124,
290 .fw = {
291 .dir = QCA6174_HW_2_1_FW_DIR,
292 .board_size = QCA6174_BOARD_DATA_SZ,
293 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
294 },
295 .rx_desc_ops = &qca988x_rx_desc_ops,
296 .hw_ops = &qca988x_ops,
297 .decap_align_bytes = 4,
298 .spectral_bin_discard = 0,
299 .spectral_bin_offset = 0,
300 .vht160_mcs_rx_highest = 0,
301 .vht160_mcs_tx_highest = 0,
302 .n_cipher_suites = 8,
303 .ast_skid_limit = 0x10,
304 .num_wds_entries = 0x20,
305 .target_64bit = false,
306 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
307 .shadow_reg_support = false,
308 .rri_on_ddr = false,
309 .hw_filter_reset_required = true,
310 .fw_diag_ce_download = false,
311 .credit_size_workaround = false,
312 .tx_stats_over_pktlog = false,
313 .dynamic_sar_support = false,
314 .hw_restart_disconnect = false,
315 .use_fw_tx_credits = true,
316 .delay_unmap_buffer = false,
317 .mcast_frame_registration = false,
318 },
319 {
320 .id = QCA6174_HW_3_0_VERSION,
321 .dev_id = QCA6174_2_1_DEVICE_ID,
322 .bus = ATH10K_BUS_PCI,
323 .name = "qca6174 hw3.0",
324 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
325 .uart_pin = 6,
326 .led_pin = 0,
327 .otp_exe_param = 0,
328 .channel_counters_freq_hz = 88000,
329 .max_probe_resp_desc_thres = 0,
330 .cal_data_len = 8124,
331 .fw = {
332 .dir = QCA6174_HW_3_0_FW_DIR,
333 .board_size = QCA6174_BOARD_DATA_SZ,
334 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
335 },
336 .rx_desc_ops = &qca988x_rx_desc_ops,
337 .hw_ops = &qca988x_ops,
338 .decap_align_bytes = 4,
339 .spectral_bin_discard = 0,
340 .spectral_bin_offset = 0,
341 .vht160_mcs_rx_highest = 0,
342 .vht160_mcs_tx_highest = 0,
343 .n_cipher_suites = 8,
344 .ast_skid_limit = 0x10,
345 .num_wds_entries = 0x20,
346 .target_64bit = false,
347 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
348 .shadow_reg_support = false,
349 .rri_on_ddr = false,
350 .hw_filter_reset_required = true,
351 .fw_diag_ce_download = false,
352 .credit_size_workaround = false,
353 .tx_stats_over_pktlog = false,
354 .dynamic_sar_support = false,
355 .hw_restart_disconnect = false,
356 .use_fw_tx_credits = true,
357 .delay_unmap_buffer = false,
358 .mcast_frame_registration = false,
359 },
360 {
361 .id = QCA6174_HW_3_2_VERSION,
362 .dev_id = QCA6174_2_1_DEVICE_ID,
363 .bus = ATH10K_BUS_PCI,
364 .name = "qca6174 hw3.2",
365 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
366 .uart_pin = 6,
367 .led_pin = 0,
368 .otp_exe_param = 0,
369 .channel_counters_freq_hz = 88000,
370 .max_probe_resp_desc_thres = 0,
371 .cal_data_len = 8124,
372 .fw = {
373 /* uses same binaries as hw3.0 */
374 .dir = QCA6174_HW_3_0_FW_DIR,
375 .board_size = QCA6174_BOARD_DATA_SZ,
376 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
377 },
378 .rx_desc_ops = &qca988x_rx_desc_ops,
379 .hw_ops = &qca6174_ops,
380 .hw_clk = qca6174_clk,
381 .target_cpu_freq = 176000000,
382 .decap_align_bytes = 4,
383 .spectral_bin_discard = 0,
384 .spectral_bin_offset = 0,
385 .vht160_mcs_rx_highest = 0,
386 .vht160_mcs_tx_highest = 0,
387 .n_cipher_suites = 8,
388 .ast_skid_limit = 0x10,
389 .num_wds_entries = 0x20,
390 .target_64bit = false,
391 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
392 .shadow_reg_support = false,
393 .rri_on_ddr = false,
394 .hw_filter_reset_required = true,
395 .fw_diag_ce_download = true,
396 .credit_size_workaround = false,
397 .tx_stats_over_pktlog = false,
398 .supports_peer_stats_info = true,
399 .dynamic_sar_support = true,
400 .hw_restart_disconnect = false,
401 .use_fw_tx_credits = true,
402 .delay_unmap_buffer = false,
403 .mcast_frame_registration = true,
404 },
405 {
406 .id = QCA99X0_HW_2_0_DEV_VERSION,
407 .dev_id = QCA99X0_2_0_DEVICE_ID,
408 .bus = ATH10K_BUS_PCI,
409 .name = "qca99x0 hw2.0",
410 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
411 .uart_pin = 7,
412 .led_pin = 17,
413 .otp_exe_param = 0x00000700,
414 .continuous_frag_desc = true,
415 .cck_rate_map_rev2 = true,
416 .channel_counters_freq_hz = 150000,
417 .max_probe_resp_desc_thres = 24,
418 .tx_chain_mask = 0xf,
419 .rx_chain_mask = 0xf,
420 .max_spatial_stream = 4,
421 .cal_data_len = 12064,
422 .fw = {
423 .dir = QCA99X0_HW_2_0_FW_DIR,
424 .board_size = QCA99X0_BOARD_DATA_SZ,
425 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
426 },
427 .sw_decrypt_mcast_mgmt = true,
428 .rx_desc_ops = &qca99x0_rx_desc_ops,
429 .hw_ops = &qca99x0_ops,
430 .decap_align_bytes = 1,
431 .spectral_bin_discard = 4,
432 .spectral_bin_offset = 0,
433 .vht160_mcs_rx_highest = 0,
434 .vht160_mcs_tx_highest = 0,
435 .n_cipher_suites = 11,
436 .ast_skid_limit = 0x10,
437 .num_wds_entries = 0x20,
438 .target_64bit = false,
439 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
440 .shadow_reg_support = false,
441 .rri_on_ddr = false,
442 .hw_filter_reset_required = true,
443 .fw_diag_ce_download = false,
444 .credit_size_workaround = false,
445 .tx_stats_over_pktlog = false,
446 .dynamic_sar_support = false,
447 .hw_restart_disconnect = false,
448 .use_fw_tx_credits = true,
449 .delay_unmap_buffer = false,
450 .mcast_frame_registration = false,
451 },
452 {
453 .id = QCA9984_HW_1_0_DEV_VERSION,
454 .dev_id = QCA9984_1_0_DEVICE_ID,
455 .bus = ATH10K_BUS_PCI,
456 .name = "qca9984/qca9994 hw1.0",
457 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
458 .uart_pin = 7,
459 .led_pin = 17,
460 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
461 .otp_exe_param = 0x00000700,
462 .continuous_frag_desc = true,
463 .cck_rate_map_rev2 = true,
464 .channel_counters_freq_hz = 150000,
465 .max_probe_resp_desc_thres = 24,
466 .tx_chain_mask = 0xf,
467 .rx_chain_mask = 0xf,
468 .max_spatial_stream = 4,
469 .cal_data_len = 12064,
470 .fw = {
471 .dir = QCA9984_HW_1_0_FW_DIR,
472 .board_size = QCA99X0_BOARD_DATA_SZ,
473 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
474 .ext_board_size = QCA99X0_EXT_BOARD_DATA_SZ,
475 },
476 .sw_decrypt_mcast_mgmt = true,
477 .rx_desc_ops = &qca99x0_rx_desc_ops,
478 .hw_ops = &qca99x0_ops,
479 .decap_align_bytes = 1,
480 .spectral_bin_discard = 12,
481 .spectral_bin_offset = 8,
482
483 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz
484 * or 2x2 160Mhz, long-guard-interval.
485 */
486 .vht160_mcs_rx_highest = 1560,
487 .vht160_mcs_tx_highest = 1560,
488 .n_cipher_suites = 11,
489 .ast_skid_limit = 0x10,
490 .num_wds_entries = 0x20,
491 .target_64bit = false,
492 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
493 .shadow_reg_support = false,
494 .rri_on_ddr = false,
495 .hw_filter_reset_required = true,
496 .fw_diag_ce_download = false,
497 .credit_size_workaround = false,
498 .tx_stats_over_pktlog = false,
499 .dynamic_sar_support = false,
500 .hw_restart_disconnect = false,
501 .use_fw_tx_credits = true,
502 .delay_unmap_buffer = false,
503 .mcast_frame_registration = false,
504 },
505 {
506 .id = QCA9888_HW_2_0_DEV_VERSION,
507 .dev_id = QCA9888_2_0_DEVICE_ID,
508 .bus = ATH10K_BUS_PCI,
509 .name = "qca9888 hw2.0",
510 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
511 .uart_pin = 7,
512 .led_pin = 17,
513 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
514 .otp_exe_param = 0x00000700,
515 .continuous_frag_desc = true,
516 .channel_counters_freq_hz = 150000,
517 .max_probe_resp_desc_thres = 24,
518 .tx_chain_mask = 3,
519 .rx_chain_mask = 3,
520 .max_spatial_stream = 2,
521 .cal_data_len = 12064,
522 .fw = {
523 .dir = QCA9888_HW_2_0_FW_DIR,
524 .board_size = QCA99X0_BOARD_DATA_SZ,
525 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
526 },
527 .sw_decrypt_mcast_mgmt = true,
528 .rx_desc_ops = &qca99x0_rx_desc_ops,
529 .hw_ops = &qca99x0_ops,
530 .decap_align_bytes = 1,
531 .spectral_bin_discard = 12,
532 .spectral_bin_offset = 8,
533
534 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or
535 * 1x1 160Mhz, long-guard-interval.
536 */
537 .vht160_mcs_rx_highest = 780,
538 .vht160_mcs_tx_highest = 780,
539 .n_cipher_suites = 11,
540 .ast_skid_limit = 0x10,
541 .num_wds_entries = 0x20,
542 .target_64bit = false,
543 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
544 .shadow_reg_support = false,
545 .rri_on_ddr = false,
546 .hw_filter_reset_required = true,
547 .fw_diag_ce_download = false,
548 .credit_size_workaround = false,
549 .tx_stats_over_pktlog = false,
550 .dynamic_sar_support = false,
551 .hw_restart_disconnect = false,
552 .use_fw_tx_credits = true,
553 .delay_unmap_buffer = false,
554 .mcast_frame_registration = false,
555 },
556 {
557 .id = QCA9377_HW_1_0_DEV_VERSION,
558 .dev_id = QCA9377_1_0_DEVICE_ID,
559 .bus = ATH10K_BUS_PCI,
560 .name = "qca9377 hw1.0",
561 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
562 .uart_pin = 6,
563 .led_pin = 0,
564 .otp_exe_param = 0,
565 .channel_counters_freq_hz = 88000,
566 .max_probe_resp_desc_thres = 0,
567 .cal_data_len = 8124,
568 .fw = {
569 .dir = QCA9377_HW_1_0_FW_DIR,
570 .board_size = QCA9377_BOARD_DATA_SZ,
571 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
572 },
573 .rx_desc_ops = &qca988x_rx_desc_ops,
574 .hw_ops = &qca988x_ops,
575 .decap_align_bytes = 4,
576 .spectral_bin_discard = 0,
577 .spectral_bin_offset = 0,
578 .vht160_mcs_rx_highest = 0,
579 .vht160_mcs_tx_highest = 0,
580 .n_cipher_suites = 8,
581 .ast_skid_limit = 0x10,
582 .num_wds_entries = 0x20,
583 .target_64bit = false,
584 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
585 .shadow_reg_support = false,
586 .rri_on_ddr = false,
587 .hw_filter_reset_required = true,
588 .fw_diag_ce_download = false,
589 .credit_size_workaround = false,
590 .tx_stats_over_pktlog = false,
591 .dynamic_sar_support = false,
592 .hw_restart_disconnect = false,
593 .use_fw_tx_credits = true,
594 .delay_unmap_buffer = false,
595 .mcast_frame_registration = false,
596 },
597 {
598 .id = QCA9377_HW_1_1_DEV_VERSION,
599 .dev_id = QCA9377_1_0_DEVICE_ID,
600 .bus = ATH10K_BUS_PCI,
601 .name = "qca9377 hw1.1",
602 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
603 .uart_pin = 6,
604 .led_pin = 0,
605 .otp_exe_param = 0,
606 .channel_counters_freq_hz = 88000,
607 .max_probe_resp_desc_thres = 0,
608 .cal_data_len = 8124,
609 .fw = {
610 .dir = QCA9377_HW_1_0_FW_DIR,
611 .board_size = QCA9377_BOARD_DATA_SZ,
612 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
613 },
614 .rx_desc_ops = &qca988x_rx_desc_ops,
615 .hw_ops = &qca6174_ops,
616 .hw_clk = qca6174_clk,
617 .target_cpu_freq = 176000000,
618 .decap_align_bytes = 4,
619 .spectral_bin_discard = 0,
620 .spectral_bin_offset = 0,
621 .vht160_mcs_rx_highest = 0,
622 .vht160_mcs_tx_highest = 0,
623 .n_cipher_suites = 8,
624 .ast_skid_limit = 0x10,
625 .num_wds_entries = 0x20,
626 .target_64bit = false,
627 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
628 .shadow_reg_support = false,
629 .rri_on_ddr = false,
630 .hw_filter_reset_required = true,
631 .fw_diag_ce_download = true,
632 .credit_size_workaround = false,
633 .tx_stats_over_pktlog = false,
634 .dynamic_sar_support = false,
635 .hw_restart_disconnect = false,
636 .use_fw_tx_credits = true,
637 .delay_unmap_buffer = false,
638 .mcast_frame_registration = false,
639 },
640 {
641 .id = QCA9377_HW_1_1_DEV_VERSION,
642 .dev_id = QCA9377_1_0_DEVICE_ID,
643 .bus = ATH10K_BUS_SDIO,
644 .name = "qca9377 hw1.1 sdio",
645 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
646 .uart_pin = 19,
647 .led_pin = 0,
648 .otp_exe_param = 0,
649 .channel_counters_freq_hz = 88000,
650 .max_probe_resp_desc_thres = 0,
651 .cal_data_len = 8124,
652 .fw = {
653 .dir = QCA9377_HW_1_0_FW_DIR,
654 .board_size = QCA9377_BOARD_DATA_SZ,
655 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
656 },
657 .rx_desc_ops = &qca988x_rx_desc_ops,
658 .hw_ops = &qca6174_ops,
659 .hw_clk = qca6174_clk,
660 .target_cpu_freq = 176000000,
661 .decap_align_bytes = 4,
662 .n_cipher_suites = 8,
663 .num_peers = TARGET_QCA9377_HL_NUM_PEERS,
664 .ast_skid_limit = 0x10,
665 .num_wds_entries = 0x20,
666 .uart_pin_workaround = true,
667 .credit_size_workaround = true,
668 .dynamic_sar_support = false,
669 .hw_restart_disconnect = false,
670 .use_fw_tx_credits = true,
671 .delay_unmap_buffer = false,
672 .mcast_frame_registration = false,
673 },
674 {
675 .id = QCA4019_HW_1_0_DEV_VERSION,
676 .dev_id = 0,
677 .bus = ATH10K_BUS_AHB,
678 .name = "qca4019 hw1.0",
679 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
680 .uart_pin = 7,
681 .led_pin = 0,
682 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
683 .otp_exe_param = 0x0010000,
684 .continuous_frag_desc = true,
685 .cck_rate_map_rev2 = true,
686 .channel_counters_freq_hz = 125000,
687 .max_probe_resp_desc_thres = 24,
688 .tx_chain_mask = 0x3,
689 .rx_chain_mask = 0x3,
690 .max_spatial_stream = 2,
691 .cal_data_len = 12064,
692 .fw = {
693 .dir = QCA4019_HW_1_0_FW_DIR,
694 .board_size = QCA4019_BOARD_DATA_SZ,
695 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,
696 },
697 .sw_decrypt_mcast_mgmt = true,
698 .rx_desc_ops = &qca99x0_rx_desc_ops,
699 .hw_ops = &qca99x0_ops,
700 .decap_align_bytes = 1,
701 .spectral_bin_discard = 4,
702 .spectral_bin_offset = 0,
703 .vht160_mcs_rx_highest = 0,
704 .vht160_mcs_tx_highest = 0,
705 .n_cipher_suites = 11,
706 .ast_skid_limit = 0x10,
707 .num_wds_entries = 0x20,
708 .target_64bit = false,
709 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
710 .shadow_reg_support = false,
711 .rri_on_ddr = false,
712 .hw_filter_reset_required = true,
713 .fw_diag_ce_download = false,
714 .credit_size_workaround = false,
715 .tx_stats_over_pktlog = false,
716 .dynamic_sar_support = false,
717 .hw_restart_disconnect = false,
718 .use_fw_tx_credits = true,
719 .delay_unmap_buffer = false,
720 .mcast_frame_registration = false,
721 },
722 {
723 .id = WCN3990_HW_1_0_DEV_VERSION,
724 .dev_id = 0,
725 .bus = ATH10K_BUS_SNOC,
726 .name = "wcn3990 hw1.0",
727 .led_pin = 0,
728 .continuous_frag_desc = true,
729 .tx_chain_mask = 0x7,
730 .rx_chain_mask = 0x7,
731 .max_spatial_stream = 4,
732 .fw = {
733 .dir = WCN3990_HW_1_0_FW_DIR,
734 .board_size = WCN3990_BOARD_DATA_SZ,
735 .board_ext_size = WCN3990_BOARD_EXT_DATA_SZ,
736 },
737 .sw_decrypt_mcast_mgmt = true,
738 .rx_desc_ops = &wcn3990_rx_desc_ops,
739 .hw_ops = &wcn3990_ops,
740 .decap_align_bytes = 1,
741 .num_peers = TARGET_HL_TLV_NUM_PEERS,
742 .n_cipher_suites = 11,
743 .ast_skid_limit = TARGET_HL_TLV_AST_SKID_LIMIT,
744 .num_wds_entries = TARGET_HL_TLV_NUM_WDS_ENTRIES,
745 .target_64bit = true,
746 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC,
747 .shadow_reg_support = true,
748 .rri_on_ddr = true,
749 .hw_filter_reset_required = false,
750 .fw_diag_ce_download = false,
751 .credit_size_workaround = false,
752 .tx_stats_over_pktlog = false,
753 .dynamic_sar_support = true,
754 .hw_restart_disconnect = true,
755 .use_fw_tx_credits = false,
756 .delay_unmap_buffer = true,
757 .mcast_frame_registration = false,
758 },
759 };
760
761 static const char *const ath10k_core_fw_feature_str[] = {
762 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
763 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
764 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
765 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
766 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
767 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
768 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
769 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
770 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
771 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
772 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
773 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
774 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",
775 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",
776 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param",
777 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war",
778 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast",
779 [ATH10K_FW_FEATURE_NO_PS] = "no-ps",
780 [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference",
781 [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi",
782 [ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL] = "single-chan-info-per-channel",
783 [ATH10K_FW_FEATURE_PEER_FIXED_RATE] = "peer-fixed-rate",
784 [ATH10K_FW_FEATURE_IRAM_RECOVERY] = "iram-recovery",
785 };
786
ath10k_core_get_fw_feature_str(char * buf,size_t buf_len,enum ath10k_fw_features feat)787 static unsigned int ath10k_core_get_fw_feature_str(char *buf,
788 size_t buf_len,
789 enum ath10k_fw_features feat)
790 {
791 /* make sure that ath10k_core_fw_feature_str[] gets updated */
792 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
793 ATH10K_FW_FEATURE_COUNT);
794
795 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
796 WARN_ON(!ath10k_core_fw_feature_str[feat])) {
797 return scnprintf(buf, buf_len, "bit%d", feat);
798 }
799
800 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
801 }
802
ath10k_core_get_fw_features_str(struct ath10k * ar,char * buf,size_t buf_len)803 void ath10k_core_get_fw_features_str(struct ath10k *ar,
804 char *buf,
805 size_t buf_len)
806 {
807 size_t len = 0;
808 int i;
809
810 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
811 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) {
812 if (len > 0)
813 len += scnprintf(buf + len, buf_len - len, ",");
814
815 len += ath10k_core_get_fw_feature_str(buf + len,
816 buf_len - len,
817 i);
818 }
819 }
820 }
821
ath10k_send_suspend_complete(struct ath10k * ar)822 static void ath10k_send_suspend_complete(struct ath10k *ar)
823 {
824 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
825
826 complete(&ar->target_suspend);
827 }
828
ath10k_init_sdio(struct ath10k * ar,enum ath10k_firmware_mode mode)829 static int ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode)
830 {
831 bool mtu_workaround = ar->hw_params.credit_size_workaround;
832 int ret;
833 u32 param = 0;
834
835 ret = ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256);
836 if (ret)
837 return ret;
838
839 ret = ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99);
840 if (ret)
841 return ret;
842
843 ret = ath10k_bmi_read32(ar, hi_acs_flags, ¶m);
844 if (ret)
845 return ret;
846
847 param |= HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET;
848
849 if (mode == ATH10K_FIRMWARE_MODE_NORMAL && !mtu_workaround)
850 param |= HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
851 else
852 param &= ~HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
853
854 if (mode == ATH10K_FIRMWARE_MODE_UTF)
855 param &= ~HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
856 else
857 param |= HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
858
859 ret = ath10k_bmi_write32(ar, hi_acs_flags, param);
860 if (ret)
861 return ret;
862
863 ret = ath10k_bmi_read32(ar, hi_option_flag2, ¶m);
864 if (ret)
865 return ret;
866
867 param |= HI_OPTION_SDIO_CRASH_DUMP_ENHANCEMENT_HOST;
868
869 ret = ath10k_bmi_write32(ar, hi_option_flag2, param);
870 if (ret)
871 return ret;
872
873 return 0;
874 }
875
ath10k_init_configure_target(struct ath10k * ar)876 static int ath10k_init_configure_target(struct ath10k *ar)
877 {
878 u32 param_host;
879 int ret;
880
881 /* tell target which HTC version it is used*/
882 ret = ath10k_bmi_write32(ar, hi_app_host_interest,
883 HTC_PROTOCOL_VERSION);
884 if (ret) {
885 ath10k_err(ar, "settings HTC version failed\n");
886 return ret;
887 }
888
889 /* set the firmware mode to STA/IBSS/AP */
890 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host);
891 if (ret) {
892 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
893 return ret;
894 }
895
896 /* TODO following parameters need to be re-visited. */
897 /* num_device */
898 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
899 /* Firmware mode */
900 /* FIXME: Why FW_MODE_AP ??.*/
901 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
902 /* mac_addr_method */
903 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
904 /* firmware_bridge */
905 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
906 /* fwsubmode */
907 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
908
909 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
910 if (ret) {
911 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
912 return ret;
913 }
914
915 /* We do all byte-swapping on the host */
916 ret = ath10k_bmi_write32(ar, hi_be, 0);
917 if (ret) {
918 ath10k_err(ar, "setting host CPU BE mode failed\n");
919 return ret;
920 }
921
922 /* FW descriptor/Data swap flags */
923 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
924
925 if (ret) {
926 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
927 return ret;
928 }
929
930 /* Some devices have a special sanity check that verifies the PCI
931 * Device ID is written to this host interest var. It is known to be
932 * required to boot QCA6164.
933 */
934 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
935 ar->dev_id);
936 if (ret) {
937 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
938 return ret;
939 }
940
941 return 0;
942 }
943
ath10k_fetch_fw_file(struct ath10k * ar,const char * dir,const char * file)944 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
945 const char *dir,
946 const char *file)
947 {
948 char filename[100];
949 const struct firmware *fw;
950 int ret;
951
952 if (file == NULL)
953 return ERR_PTR(-ENOENT);
954
955 if (dir == NULL)
956 dir = ".";
957
958 if (ar->board_name) {
959 snprintf(filename, sizeof(filename), "%s/%s/%s",
960 dir, ar->board_name, file);
961 ret = firmware_request_nowarn(&fw, filename, ar->dev);
962 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n",
963 filename, ret);
964 if (!ret)
965 return fw;
966 }
967
968 snprintf(filename, sizeof(filename), "%s/%s", dir, file);
969 ret = firmware_request_nowarn(&fw, filename, ar->dev);
970 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n",
971 filename, ret);
972 if (ret)
973 return ERR_PTR(ret);
974
975 return fw;
976 }
977
978 #if defined(__linux__)
ath10k_push_board_ext_data(struct ath10k * ar,const void * data,size_t data_len)979 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
980 #elif defined(__FreeBSD__)
981 static int ath10k_push_board_ext_data(struct ath10k *ar, const u8 *data,
982 #endif
983 size_t data_len)
984 {
985 u32 board_data_size = ar->hw_params.fw.board_size;
986 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
987 u32 board_ext_data_addr;
988 int ret;
989
990 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
991 if (ret) {
992 ath10k_err(ar, "could not read board ext data addr (%d)\n",
993 ret);
994 return ret;
995 }
996
997 ath10k_dbg(ar, ATH10K_DBG_BOOT,
998 "boot push board extended data addr 0x%x\n",
999 board_ext_data_addr);
1000
1001 if (board_ext_data_addr == 0)
1002 return 0;
1003
1004 if (data_len != (board_data_size + board_ext_data_size)) {
1005 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
1006 data_len, board_data_size, board_ext_data_size);
1007 return -EINVAL;
1008 }
1009
1010 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
1011 data + board_data_size,
1012 board_ext_data_size);
1013 if (ret) {
1014 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
1015 return ret;
1016 }
1017
1018 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
1019 (board_ext_data_size << 16) | 1);
1020 if (ret) {
1021 ath10k_err(ar, "could not write board ext data bit (%d)\n",
1022 ret);
1023 return ret;
1024 }
1025
1026 return 0;
1027 }
1028
ath10k_core_get_board_id_from_otp(struct ath10k * ar)1029 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
1030 {
1031 u32 result, address;
1032 u8 board_id, chip_id;
1033 bool ext_bid_support;
1034 int ret, bmi_board_id_param;
1035
1036 address = ar->hw_params.patch_load_addr;
1037
1038 if (!ar->normal_mode_fw.fw_file.otp_data ||
1039 !ar->normal_mode_fw.fw_file.otp_len) {
1040 ath10k_warn(ar,
1041 "failed to retrieve board id because of invalid otp\n");
1042 return -ENODATA;
1043 }
1044
1045 if (ar->id.bmi_ids_valid) {
1046 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1047 "boot already acquired valid otp board id,skip download, board_id %d chip_id %d\n",
1048 ar->id.bmi_board_id, ar->id.bmi_chip_id);
1049 goto skip_otp_download;
1050 }
1051
1052 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1053 "boot upload otp to 0x%x len %zd for board id\n",
1054 address, ar->normal_mode_fw.fw_file.otp_len);
1055
1056 ret = ath10k_bmi_fast_download(ar, address,
1057 ar->normal_mode_fw.fw_file.otp_data,
1058 ar->normal_mode_fw.fw_file.otp_len);
1059 if (ret) {
1060 ath10k_err(ar, "could not write otp for board id check: %d\n",
1061 ret);
1062 return ret;
1063 }
1064
1065 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
1066 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE ||
1067 ar->cal_mode == ATH10K_PRE_CAL_MODE_NVMEM)
1068 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID;
1069 else
1070 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID;
1071
1072 ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result);
1073 if (ret) {
1074 ath10k_err(ar, "could not execute otp for board id check: %d\n",
1075 ret);
1076 return ret;
1077 }
1078
1079 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
1080 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
1081 ext_bid_support = (result & ATH10K_BMI_EXT_BOARD_ID_SUPPORT);
1082
1083 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1084 "boot get otp board id result 0x%08x board_id %d chip_id %d ext_bid_support %d\n",
1085 result, board_id, chip_id, ext_bid_support);
1086
1087 ar->id.ext_bid_supported = ext_bid_support;
1088
1089 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 ||
1090 (board_id == 0)) {
1091 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1092 "board id does not exist in otp, ignore it\n");
1093 return -EOPNOTSUPP;
1094 }
1095
1096 ar->id.bmi_ids_valid = true;
1097 ar->id.bmi_board_id = board_id;
1098 ar->id.bmi_chip_id = chip_id;
1099
1100 skip_otp_download:
1101
1102 return 0;
1103 }
1104
ath10k_core_check_bdfext(const struct dmi_header * hdr,void * data)1105 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data)
1106 {
1107 struct ath10k *ar = data;
1108 const char *bdf_ext;
1109 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC;
1110 u8 bdf_enabled;
1111 int i;
1112
1113 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE)
1114 return;
1115
1116 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) {
1117 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1118 "wrong smbios bdf ext type length (%d).\n",
1119 hdr->length);
1120 return;
1121 }
1122
1123 #if defined(__linux__)
1124 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET);
1125 #elif defined(__FreeBSD__)
1126 bdf_enabled = *((const u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET);
1127 #endif
1128 if (!bdf_enabled) {
1129 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n");
1130 return;
1131 }
1132
1133 /* Only one string exists (per spec) */
1134 #if defined(__linux__)
1135 bdf_ext = (char *)hdr + hdr->length;
1136 #elif defined(__FreeBSD__)
1137 bdf_ext = (const char *)hdr + hdr->length;
1138 #endif
1139
1140 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) {
1141 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1142 "bdf variant magic does not match.\n");
1143 return;
1144 }
1145
1146 for (i = 0; i < strlen(bdf_ext); i++) {
1147 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) {
1148 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1149 "bdf variant name contains non ascii chars.\n");
1150 return;
1151 }
1152 }
1153
1154 /* Copy extension name without magic suffix */
1155 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic),
1156 sizeof(ar->id.bdf_ext)) < 0) {
1157 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1158 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1159 bdf_ext);
1160 return;
1161 }
1162
1163 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1164 "found and validated bdf variant smbios_type 0x%x bdf %s\n",
1165 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext);
1166 }
1167
ath10k_core_check_smbios(struct ath10k * ar)1168 static int ath10k_core_check_smbios(struct ath10k *ar)
1169 {
1170 ar->id.bdf_ext[0] = '\0';
1171 dmi_walk(ath10k_core_check_bdfext, ar);
1172
1173 if (ar->id.bdf_ext[0] == '\0')
1174 return -ENODATA;
1175
1176 return 0;
1177 }
1178
ath10k_core_check_dt(struct ath10k * ar)1179 int ath10k_core_check_dt(struct ath10k *ar)
1180 {
1181 #if defined(__linux__) || (defined(__FreeBSD__) && defined(CONFIG_OF))
1182 struct device_node *node;
1183 const char *variant = NULL;
1184
1185 node = ar->dev->of_node;
1186 if (!node)
1187 return -ENOENT;
1188
1189 of_property_read_string(node, "qcom,calibration-variant",
1190 &variant);
1191 if (!variant)
1192 of_property_read_string(node, "qcom,ath10k-calibration-variant",
1193 &variant);
1194 if (!variant)
1195 return -ENODATA;
1196
1197 if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0)
1198 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1199 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1200 variant);
1201
1202 return 0;
1203 #else
1204 return -ENOENT;
1205 #endif
1206 }
1207 EXPORT_SYMBOL(ath10k_core_check_dt);
1208
ath10k_download_fw(struct ath10k * ar)1209 static int ath10k_download_fw(struct ath10k *ar)
1210 {
1211 u32 address, data_len;
1212 const void *data;
1213 int ret;
1214 struct pm_qos_request latency_qos = {};
1215
1216 address = ar->hw_params.patch_load_addr;
1217
1218 data = ar->running_fw->fw_file.firmware_data;
1219 data_len = ar->running_fw->fw_file.firmware_len;
1220
1221 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file);
1222 if (ret) {
1223 ath10k_err(ar, "failed to configure fw code swap: %d\n",
1224 ret);
1225 return ret;
1226 }
1227
1228 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1229 "boot uploading firmware image %p len %d\n",
1230 data, data_len);
1231
1232 /* Check if device supports to download firmware via
1233 * diag copy engine. Downloading firmware via diag CE
1234 * greatly reduces the time to download firmware.
1235 */
1236 if (ar->hw_params.fw_diag_ce_download) {
1237 ret = ath10k_hw_diag_fast_download(ar, address,
1238 data, data_len);
1239 if (ret == 0)
1240 /* firmware upload via diag ce was successful */
1241 return 0;
1242
1243 ath10k_warn(ar,
1244 "failed to upload firmware via diag ce, trying BMI: %d",
1245 ret);
1246 }
1247
1248 cpu_latency_qos_add_request(&latency_qos, 0);
1249
1250 ret = ath10k_bmi_fast_download(ar, address, data, data_len);
1251
1252 cpu_latency_qos_remove_request(&latency_qos);
1253
1254 return ret;
1255 }
1256
ath10k_core_free_board_files(struct ath10k * ar)1257 void ath10k_core_free_board_files(struct ath10k *ar)
1258 {
1259 if (!IS_ERR(ar->normal_mode_fw.board))
1260 release_firmware(ar->normal_mode_fw.board);
1261
1262 if (!IS_ERR(ar->normal_mode_fw.ext_board))
1263 release_firmware(ar->normal_mode_fw.ext_board);
1264
1265 ar->normal_mode_fw.board = NULL;
1266 ar->normal_mode_fw.board_data = NULL;
1267 ar->normal_mode_fw.board_len = 0;
1268 ar->normal_mode_fw.ext_board = NULL;
1269 ar->normal_mode_fw.ext_board_data = NULL;
1270 ar->normal_mode_fw.ext_board_len = 0;
1271 }
1272 EXPORT_SYMBOL(ath10k_core_free_board_files);
1273
ath10k_core_free_firmware_files(struct ath10k * ar)1274 static void ath10k_core_free_firmware_files(struct ath10k *ar)
1275 {
1276 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware))
1277 release_firmware(ar->normal_mode_fw.fw_file.firmware);
1278
1279 if (!IS_ERR(ar->cal_file))
1280 release_firmware(ar->cal_file);
1281
1282 if (!IS_ERR(ar->pre_cal_file))
1283 release_firmware(ar->pre_cal_file);
1284
1285 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file);
1286
1287 ar->normal_mode_fw.fw_file.otp_data = NULL;
1288 ar->normal_mode_fw.fw_file.otp_len = 0;
1289
1290 ar->normal_mode_fw.fw_file.firmware = NULL;
1291 ar->normal_mode_fw.fw_file.firmware_data = NULL;
1292 ar->normal_mode_fw.fw_file.firmware_len = 0;
1293
1294 ar->cal_file = NULL;
1295 ar->pre_cal_file = NULL;
1296 }
1297
ath10k_fetch_cal_file(struct ath10k * ar)1298 static int ath10k_fetch_cal_file(struct ath10k *ar)
1299 {
1300 char filename[100];
1301
1302 /* pre-cal-<bus>-<id>.bin */
1303 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin",
1304 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1305
1306 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1307 if (!IS_ERR(ar->pre_cal_file))
1308 goto success;
1309
1310 /* cal-<bus>-<id>.bin */
1311 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
1312 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1313
1314 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1315 if (IS_ERR(ar->cal_file))
1316 /* calibration file is optional, don't print any warnings */
1317 return PTR_ERR(ar->cal_file);
1318 success:
1319 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
1320 ATH10K_FW_DIR, filename);
1321
1322 return 0;
1323 }
1324
ath10k_core_fetch_board_data_api_1(struct ath10k * ar,int bd_ie_type)1325 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar, int bd_ie_type)
1326 {
1327 const struct firmware *fw;
1328 char boardname[100];
1329
1330 if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1331 scnprintf(boardname, sizeof(boardname), "board-%s-%s.bin",
1332 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1333
1334 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1335 ar->hw_params.fw.dir,
1336 boardname);
1337 if (IS_ERR(ar->normal_mode_fw.board)) {
1338 fw = ath10k_fetch_fw_file(ar,
1339 ar->hw_params.fw.dir,
1340 ATH10K_BOARD_DATA_FILE);
1341 ar->normal_mode_fw.board = fw;
1342 }
1343
1344 if (IS_ERR(ar->normal_mode_fw.board))
1345 return PTR_ERR(ar->normal_mode_fw.board);
1346
1347 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data;
1348 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size;
1349 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1350 fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1351 ATH10K_EBOARD_DATA_FILE);
1352 ar->normal_mode_fw.ext_board = fw;
1353 if (IS_ERR(ar->normal_mode_fw.ext_board))
1354 return PTR_ERR(ar->normal_mode_fw.ext_board);
1355
1356 ar->normal_mode_fw.ext_board_data = ar->normal_mode_fw.ext_board->data;
1357 ar->normal_mode_fw.ext_board_len = ar->normal_mode_fw.ext_board->size;
1358 }
1359
1360 return 0;
1361 }
1362
ath10k_core_parse_bd_ie_board(struct ath10k * ar,const void * buf,size_t buf_len,const char * boardname,int bd_ie_type)1363 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
1364 #if defined(__linux__)
1365 const void *buf, size_t buf_len,
1366 #elif defined(__FreeBSD__)
1367 const u8 *buf, size_t buf_len,
1368 #endif
1369 const char *boardname,
1370 int bd_ie_type)
1371 {
1372 const struct ath10k_fw_ie *hdr;
1373 bool name_match_found;
1374 int ret, board_ie_id;
1375 size_t board_ie_len;
1376 const void *board_ie_data;
1377
1378 name_match_found = false;
1379
1380 /* go through ATH10K_BD_IE_BOARD_ elements */
1381 while (buf_len > sizeof(struct ath10k_fw_ie)) {
1382 #if defined(__linux__)
1383 hdr = buf;
1384 #elif defined(__FreeBSD__)
1385 hdr = (const void *)buf;
1386 #endif
1387 board_ie_id = le32_to_cpu(hdr->id);
1388 board_ie_len = le32_to_cpu(hdr->len);
1389 board_ie_data = hdr->data;
1390
1391 buf_len -= sizeof(*hdr);
1392 buf += sizeof(*hdr);
1393
1394 if (buf_len < ALIGN(board_ie_len, 4)) {
1395 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
1396 buf_len, ALIGN(board_ie_len, 4));
1397 ret = -EINVAL;
1398 goto out;
1399 }
1400
1401 switch (board_ie_id) {
1402 case ATH10K_BD_IE_BOARD_NAME:
1403 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
1404 board_ie_data, board_ie_len);
1405
1406 if (board_ie_len != strlen(boardname))
1407 break;
1408
1409 ret = memcmp(board_ie_data, boardname, strlen(boardname));
1410 if (ret)
1411 break;
1412
1413 name_match_found = true;
1414 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1415 "boot found match for name '%s'",
1416 boardname);
1417 break;
1418 case ATH10K_BD_IE_BOARD_DATA:
1419 if (!name_match_found)
1420 /* no match found */
1421 break;
1422
1423 if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1424 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1425 "boot found board data for '%s'",
1426 boardname);
1427
1428 ar->normal_mode_fw.board_data = board_ie_data;
1429 ar->normal_mode_fw.board_len = board_ie_len;
1430 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1431 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1432 "boot found eboard data for '%s'",
1433 boardname);
1434
1435 ar->normal_mode_fw.ext_board_data = board_ie_data;
1436 ar->normal_mode_fw.ext_board_len = board_ie_len;
1437 }
1438
1439 ret = 0;
1440 goto out;
1441 default:
1442 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
1443 board_ie_id);
1444 break;
1445 }
1446
1447 /* jump over the padding */
1448 board_ie_len = ALIGN(board_ie_len, 4);
1449
1450 buf_len -= board_ie_len;
1451 buf += board_ie_len;
1452 }
1453
1454 /* no match found */
1455 ret = -ENOENT;
1456
1457 out:
1458 return ret;
1459 }
1460
ath10k_core_search_bd(struct ath10k * ar,const char * boardname,const u8 * data,size_t len)1461 static int ath10k_core_search_bd(struct ath10k *ar,
1462 const char *boardname,
1463 const u8 *data,
1464 size_t len)
1465 {
1466 size_t ie_len;
1467 #if defined(__linux__)
1468 struct ath10k_fw_ie *hdr;
1469 #elif defined(__FreeBSD__)
1470 const struct ath10k_fw_ie *hdr;
1471 #endif
1472 int ret = -ENOENT, ie_id;
1473
1474 while (len > sizeof(struct ath10k_fw_ie)) {
1475 #if defined(__linux__)
1476 hdr = (struct ath10k_fw_ie *)data;
1477 #elif defined(__FreeBSD__)
1478 hdr = (const struct ath10k_fw_ie *)data;
1479 #endif
1480 ie_id = le32_to_cpu(hdr->id);
1481 ie_len = le32_to_cpu(hdr->len);
1482
1483 len -= sizeof(*hdr);
1484 data = hdr->data;
1485
1486 if (len < ALIGN(ie_len, 4)) {
1487 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
1488 ie_id, ie_len, len);
1489 return -EINVAL;
1490 }
1491
1492 switch (ie_id) {
1493 case ATH10K_BD_IE_BOARD:
1494 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1495 boardname,
1496 ATH10K_BD_IE_BOARD);
1497 if (ret == -ENOENT)
1498 /* no match found, continue */
1499 break;
1500
1501 /* either found or error, so stop searching */
1502 goto out;
1503 case ATH10K_BD_IE_BOARD_EXT:
1504 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1505 boardname,
1506 ATH10K_BD_IE_BOARD_EXT);
1507 if (ret == -ENOENT)
1508 /* no match found, continue */
1509 break;
1510
1511 /* either found or error, so stop searching */
1512 goto out;
1513 }
1514
1515 /* jump over the padding */
1516 ie_len = ALIGN(ie_len, 4);
1517
1518 len -= ie_len;
1519 data += ie_len;
1520 }
1521
1522 out:
1523 /* return result of parse_bd_ie_board() or -ENOENT */
1524 return ret;
1525 }
1526
ath10k_core_fetch_board_data_api_n(struct ath10k * ar,const char * boardname,const char * fallback_boardname1,const char * fallback_boardname2,const char * filename)1527 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
1528 const char *boardname,
1529 const char *fallback_boardname1,
1530 const char *fallback_boardname2,
1531 const char *filename)
1532 {
1533 size_t len, magic_len;
1534 const u8 *data;
1535 int ret;
1536
1537 /* Skip if already fetched during board data download */
1538 if (!ar->normal_mode_fw.board)
1539 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1540 ar->hw_params.fw.dir,
1541 filename);
1542 if (IS_ERR(ar->normal_mode_fw.board))
1543 return PTR_ERR(ar->normal_mode_fw.board);
1544
1545 data = ar->normal_mode_fw.board->data;
1546 len = ar->normal_mode_fw.board->size;
1547
1548 /* magic has extra null byte padded */
1549 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
1550 if (len < magic_len) {
1551 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
1552 ar->hw_params.fw.dir, filename, len);
1553 ret = -EINVAL;
1554 goto err;
1555 }
1556
1557 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
1558 ath10k_err(ar, "found invalid board magic\n");
1559 ret = -EINVAL;
1560 goto err;
1561 }
1562
1563 /* magic is padded to 4 bytes */
1564 magic_len = ALIGN(magic_len, 4);
1565 if (len < magic_len) {
1566 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
1567 ar->hw_params.fw.dir, filename, len);
1568 ret = -EINVAL;
1569 goto err;
1570 }
1571
1572 data += magic_len;
1573 len -= magic_len;
1574
1575 /* attempt to find boardname in the IE list */
1576 ret = ath10k_core_search_bd(ar, boardname, data, len);
1577
1578 /* if we didn't find it and have a fallback name, try that */
1579 if (ret == -ENOENT && fallback_boardname1)
1580 ret = ath10k_core_search_bd(ar, fallback_boardname1, data, len);
1581
1582 if (ret == -ENOENT && fallback_boardname2)
1583 ret = ath10k_core_search_bd(ar, fallback_boardname2, data, len);
1584
1585 if (ret == -ENOENT) {
1586 ath10k_err(ar,
1587 "failed to fetch board data for %s from %s/%s\n",
1588 boardname, ar->hw_params.fw.dir, filename);
1589 ret = -ENODATA;
1590 }
1591
1592 if (ret)
1593 goto err;
1594
1595 return 0;
1596
1597 err:
1598 ath10k_core_free_board_files(ar);
1599 return ret;
1600 }
1601
ath10k_core_create_board_name(struct ath10k * ar,char * name,size_t name_len,bool with_variant,bool with_chip_id)1602 static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
1603 size_t name_len, bool with_variant,
1604 bool with_chip_id)
1605 {
1606 /* strlen(',variant=') + strlen(ar->id.bdf_ext) */
1607 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = {};
1608
1609 if (with_variant && ar->id.bdf_ext[0] != '\0')
1610 scnprintf(variant, sizeof(variant), ",variant=%s",
1611 ar->id.bdf_ext);
1612
1613 if (ar->id.bmi_ids_valid) {
1614 scnprintf(name, name_len,
1615 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s",
1616 ath10k_bus_str(ar->hif.bus),
1617 ar->id.bmi_chip_id,
1618 ar->id.bmi_board_id, variant);
1619 goto out;
1620 }
1621
1622 if (ar->id.qmi_ids_valid) {
1623 if (with_chip_id)
1624 scnprintf(name, name_len,
1625 "bus=%s,qmi-board-id=%x,qmi-chip-id=%x%s",
1626 ath10k_bus_str(ar->hif.bus),
1627 ar->id.qmi_board_id, ar->id.qmi_chip_id,
1628 variant);
1629 else
1630 scnprintf(name, name_len,
1631 "bus=%s,qmi-board-id=%x",
1632 ath10k_bus_str(ar->hif.bus),
1633 ar->id.qmi_board_id);
1634 goto out;
1635 }
1636
1637 scnprintf(name, name_len,
1638 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s",
1639 ath10k_bus_str(ar->hif.bus),
1640 ar->id.vendor, ar->id.device,
1641 ar->id.subsystem_vendor, ar->id.subsystem_device, variant);
1642 out:
1643 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
1644
1645 return 0;
1646 }
1647
ath10k_core_create_eboard_name(struct ath10k * ar,char * name,size_t name_len)1648 static int ath10k_core_create_eboard_name(struct ath10k *ar, char *name,
1649 size_t name_len)
1650 {
1651 if (ar->id.bmi_ids_valid) {
1652 scnprintf(name, name_len,
1653 "bus=%s,bmi-chip-id=%d,bmi-eboard-id=%d",
1654 ath10k_bus_str(ar->hif.bus),
1655 ar->id.bmi_chip_id,
1656 ar->id.bmi_eboard_id);
1657
1658 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using eboard name '%s'\n", name);
1659 return 0;
1660 }
1661 /* Fallback if returned board id is zero */
1662 return -1;
1663 }
1664
ath10k_core_fetch_board_file(struct ath10k * ar,int bd_ie_type)1665 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type)
1666 {
1667 char boardname[100], fallback_boardname1[100], fallback_boardname2[100];
1668 int ret;
1669
1670 if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1671 /* With variant and chip id */
1672 ret = ath10k_core_create_board_name(ar, boardname,
1673 sizeof(boardname), true,
1674 true);
1675 if (ret) {
1676 ath10k_err(ar, "failed to create board name: %d", ret);
1677 return ret;
1678 }
1679
1680 /* Without variant and only chip-id */
1681 ret = ath10k_core_create_board_name(ar, fallback_boardname1,
1682 sizeof(boardname), false,
1683 true);
1684 if (ret) {
1685 ath10k_err(ar, "failed to create 1st fallback board name: %d",
1686 ret);
1687 return ret;
1688 }
1689
1690 /* Without variant and without chip-id */
1691 ret = ath10k_core_create_board_name(ar, fallback_boardname2,
1692 sizeof(boardname), false,
1693 false);
1694 if (ret) {
1695 ath10k_err(ar, "failed to create 2nd fallback board name: %d",
1696 ret);
1697 return ret;
1698 }
1699 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1700 ret = ath10k_core_create_eboard_name(ar, boardname,
1701 sizeof(boardname));
1702 if (ret) {
1703 ath10k_err(ar, "fallback to eboard.bin since board id 0");
1704 goto fallback;
1705 }
1706 }
1707
1708 ar->bd_api = 2;
1709 ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
1710 fallback_boardname1,
1711 fallback_boardname2,
1712 ATH10K_BOARD_API2_FILE);
1713 if (!ret)
1714 goto success;
1715
1716 fallback:
1717 ar->bd_api = 1;
1718 ret = ath10k_core_fetch_board_data_api_1(ar, bd_ie_type);
1719 if (ret) {
1720 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n",
1721 ar->hw_params.fw.dir);
1722 return ret;
1723 }
1724
1725 success:
1726 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
1727 return 0;
1728 }
1729 EXPORT_SYMBOL(ath10k_core_fetch_board_file);
1730
ath10k_core_get_ext_board_id_from_otp(struct ath10k * ar)1731 static int ath10k_core_get_ext_board_id_from_otp(struct ath10k *ar)
1732 {
1733 u32 result, address;
1734 u8 ext_board_id;
1735 int ret;
1736
1737 address = ar->hw_params.patch_load_addr;
1738
1739 if (!ar->normal_mode_fw.fw_file.otp_data ||
1740 !ar->normal_mode_fw.fw_file.otp_len) {
1741 ath10k_warn(ar,
1742 "failed to retrieve extended board id due to otp binary missing\n");
1743 return -ENODATA;
1744 }
1745
1746 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1747 "boot upload otp to 0x%x len %zd for ext board id\n",
1748 address, ar->normal_mode_fw.fw_file.otp_len);
1749
1750 ret = ath10k_bmi_fast_download(ar, address,
1751 ar->normal_mode_fw.fw_file.otp_data,
1752 ar->normal_mode_fw.fw_file.otp_len);
1753 if (ret) {
1754 ath10k_err(ar, "could not write otp for ext board id check: %d\n",
1755 ret);
1756 return ret;
1757 }
1758
1759 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EXT_BOARD_ID, &result);
1760 if (ret) {
1761 ath10k_err(ar, "could not execute otp for ext board id check: %d\n",
1762 ret);
1763 return ret;
1764 }
1765
1766 if (!result) {
1767 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1768 "ext board id does not exist in otp, ignore it\n");
1769 return -EOPNOTSUPP;
1770 }
1771
1772 ext_board_id = result & ATH10K_BMI_EBOARD_ID_STATUS_MASK;
1773
1774 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1775 "boot get otp ext board id result 0x%08x ext_board_id %d\n",
1776 result, ext_board_id);
1777
1778 ar->id.bmi_eboard_id = ext_board_id;
1779
1780 return 0;
1781 }
1782
ath10k_download_board_data(struct ath10k * ar,const void * data,size_t data_len)1783 static int ath10k_download_board_data(struct ath10k *ar, const void *data,
1784 size_t data_len)
1785 {
1786 u32 board_data_size = ar->hw_params.fw.board_size;
1787 u32 eboard_data_size = ar->hw_params.fw.ext_board_size;
1788 u32 board_address;
1789 u32 ext_board_address;
1790 int ret;
1791
1792 ret = ath10k_push_board_ext_data(ar, data, data_len);
1793 if (ret) {
1794 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
1795 goto exit;
1796 }
1797
1798 ret = ath10k_bmi_read32(ar, hi_board_data, &board_address);
1799 if (ret) {
1800 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
1801 goto exit;
1802 }
1803
1804 ret = ath10k_bmi_write_memory(ar, board_address, data,
1805 min_t(u32, board_data_size,
1806 data_len));
1807 if (ret) {
1808 ath10k_err(ar, "could not write board data (%d)\n", ret);
1809 goto exit;
1810 }
1811
1812 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
1813 if (ret) {
1814 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
1815 goto exit;
1816 }
1817
1818 if (!ar->id.ext_bid_supported)
1819 goto exit;
1820
1821 /* Extended board data download */
1822 ret = ath10k_core_get_ext_board_id_from_otp(ar);
1823 if (ret == -EOPNOTSUPP) {
1824 /* Not fetching ext_board_data if ext board id is 0 */
1825 ath10k_dbg(ar, ATH10K_DBG_BOOT, "otp returned ext board id 0\n");
1826 return 0;
1827 } else if (ret) {
1828 ath10k_err(ar, "failed to get extended board id: %d\n", ret);
1829 goto exit;
1830 }
1831
1832 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD_EXT);
1833 if (ret)
1834 goto exit;
1835
1836 if (ar->normal_mode_fw.ext_board_data) {
1837 ext_board_address = board_address + EXT_BOARD_ADDRESS_OFFSET;
1838 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1839 "boot writing ext board data to addr 0x%x",
1840 ext_board_address);
1841 ret = ath10k_bmi_write_memory(ar, ext_board_address,
1842 ar->normal_mode_fw.ext_board_data,
1843 min_t(u32, eboard_data_size, data_len));
1844 if (ret)
1845 ath10k_err(ar, "failed to write ext board data: %d\n", ret);
1846 }
1847
1848 exit:
1849 return ret;
1850 }
1851
ath10k_download_and_run_otp(struct ath10k * ar)1852 static int ath10k_download_and_run_otp(struct ath10k *ar)
1853 {
1854 u32 result, address = ar->hw_params.patch_load_addr;
1855 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
1856 int ret;
1857
1858 ret = ath10k_download_board_data(ar,
1859 ar->running_fw->board_data,
1860 ar->running_fw->board_len);
1861 if (ret) {
1862 ath10k_err(ar, "failed to download board data: %d\n", ret);
1863 return ret;
1864 }
1865
1866 /* OTP is optional */
1867
1868 if (!ar->running_fw->fw_file.otp_data ||
1869 !ar->running_fw->fw_file.otp_len) {
1870 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
1871 ar->running_fw->fw_file.otp_data,
1872 ar->running_fw->fw_file.otp_len);
1873 return 0;
1874 }
1875
1876 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
1877 address, ar->running_fw->fw_file.otp_len);
1878
1879 ret = ath10k_bmi_fast_download(ar, address,
1880 ar->running_fw->fw_file.otp_data,
1881 ar->running_fw->fw_file.otp_len);
1882 if (ret) {
1883 ath10k_err(ar, "could not write otp (%d)\n", ret);
1884 return ret;
1885 }
1886
1887 /* As of now pre-cal is valid for 10_4 variants */
1888 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
1889 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE ||
1890 ar->cal_mode == ATH10K_PRE_CAL_MODE_NVMEM)
1891 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL;
1892
1893 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
1894 if (ret) {
1895 ath10k_err(ar, "could not execute otp (%d)\n", ret);
1896 return ret;
1897 }
1898
1899 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
1900
1901 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
1902 ar->running_fw->fw_file.fw_features)) &&
1903 result != 0) {
1904 ath10k_err(ar, "otp calibration failed: %d", result);
1905 return -EINVAL;
1906 }
1907
1908 return 0;
1909 }
1910
ath10k_download_cal_file(struct ath10k * ar,const struct firmware * file)1911 static int ath10k_download_cal_file(struct ath10k *ar,
1912 const struct firmware *file)
1913 {
1914 int ret;
1915
1916 if (!file)
1917 return -ENOENT;
1918
1919 if (IS_ERR(file))
1920 return PTR_ERR(file);
1921
1922 ret = ath10k_download_board_data(ar, file->data, file->size);
1923 if (ret) {
1924 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
1925 return ret;
1926 }
1927
1928 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
1929
1930 return 0;
1931 }
1932
ath10k_download_cal_dt(struct ath10k * ar,const char * dt_name)1933 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name)
1934 {
1935 #if defined(__linux__) || (defined(__FreeBSD__) && defined(CONFIG_OF))
1936 struct device_node *node;
1937 int data_len;
1938 void *data;
1939 int ret;
1940
1941 node = ar->dev->of_node;
1942 if (!node)
1943 /* Device Tree is optional, don't print any warnings if
1944 * there's no node for ath10k.
1945 */
1946 return -ENOENT;
1947
1948 if (!of_get_property(node, dt_name, &data_len)) {
1949 /* The calibration data node is optional */
1950 return -ENOENT;
1951 }
1952
1953 if (data_len != ar->hw_params.cal_data_len) {
1954 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
1955 data_len);
1956 ret = -EMSGSIZE;
1957 goto out;
1958 }
1959
1960 data = kmalloc(data_len, GFP_KERNEL);
1961 if (!data) {
1962 ret = -ENOMEM;
1963 goto out;
1964 }
1965
1966 ret = of_property_read_u8_array(node, dt_name, data, data_len);
1967 if (ret) {
1968 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
1969 ret);
1970 goto out_free;
1971 }
1972
1973 ret = ath10k_download_board_data(ar, data, data_len);
1974 if (ret) {
1975 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
1976 ret);
1977 goto out_free;
1978 }
1979
1980 ret = 0;
1981
1982 out_free:
1983 kfree(data);
1984
1985 out:
1986 return ret;
1987 #else
1988 return -ENOENT;
1989 #endif
1990 }
1991
ath10k_download_cal_eeprom(struct ath10k * ar)1992 static int ath10k_download_cal_eeprom(struct ath10k *ar)
1993 {
1994 size_t data_len;
1995 void *data = NULL;
1996 int ret;
1997
1998 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len);
1999 if (ret) {
2000 if (ret != -EOPNOTSUPP)
2001 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
2002 ret);
2003 goto out_free;
2004 }
2005
2006 ret = ath10k_download_board_data(ar, data, data_len);
2007 if (ret) {
2008 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n",
2009 ret);
2010 goto out_free;
2011 }
2012
2013 ret = 0;
2014
2015 out_free:
2016 kfree(data);
2017
2018 return ret;
2019 }
2020
ath10k_download_cal_nvmem(struct ath10k * ar,const char * cell_name)2021 static int ath10k_download_cal_nvmem(struct ath10k *ar, const char *cell_name)
2022 {
2023 #if defined(__linux__)
2024 struct nvmem_cell *cell;
2025 void *buf;
2026 size_t len;
2027 #endif
2028 int ret;
2029
2030 #if defined(__linux__)
2031 cell = devm_nvmem_cell_get(ar->dev, cell_name);
2032 if (IS_ERR(cell)) {
2033 ret = PTR_ERR(cell);
2034 return ret;
2035 }
2036
2037 buf = nvmem_cell_read(cell, &len);
2038 if (IS_ERR(buf))
2039 return PTR_ERR(buf);
2040
2041 if (ar->hw_params.cal_data_len != len) {
2042 kfree(buf);
2043 ath10k_warn(ar, "invalid calibration data length in nvmem-cell '%s': %zu != %u\n",
2044 cell_name, len, ar->hw_params.cal_data_len);
2045 return -EMSGSIZE;
2046 }
2047
2048 ret = ath10k_download_board_data(ar, buf, len);
2049 kfree(buf);
2050 #elif defined(__FreeBSD__)
2051 ret = -ENXIO;
2052 #endif
2053 if (ret)
2054 ath10k_warn(ar, "failed to download calibration data from nvmem-cell '%s': %d\n",
2055 cell_name, ret);
2056
2057 return ret;
2058 }
2059
ath10k_core_fetch_firmware_api_n(struct ath10k * ar,const char * name,struct ath10k_fw_file * fw_file)2060 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
2061 struct ath10k_fw_file *fw_file)
2062 {
2063 size_t magic_len, len, ie_len;
2064 int ie_id, i, index, bit, ret;
2065 #if defined(__linux__)
2066 struct ath10k_fw_ie *hdr;
2067 #elif defined(__FreeBSD__)
2068 const struct ath10k_fw_ie *hdr;
2069 #endif
2070 const u8 *data;
2071 #if defined(__linux__)
2072 __le32 *timestamp, *version;
2073 #elif defined(__FreeBSD__)
2074 const __le32 *timestamp, *version;
2075 #endif
2076
2077 /* first fetch the firmware file (firmware-*.bin) */
2078 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
2079 name);
2080 if (IS_ERR(fw_file->firmware))
2081 return PTR_ERR(fw_file->firmware);
2082
2083 data = fw_file->firmware->data;
2084 len = fw_file->firmware->size;
2085
2086 /* magic also includes the null byte, check that as well */
2087 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
2088
2089 if (len < magic_len) {
2090 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
2091 ar->hw_params.fw.dir, name, len);
2092 ret = -EINVAL;
2093 goto err;
2094 }
2095
2096 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
2097 ath10k_err(ar, "invalid firmware magic\n");
2098 ret = -EINVAL;
2099 goto err;
2100 }
2101
2102 /* jump over the padding */
2103 magic_len = ALIGN(magic_len, 4);
2104
2105 len -= magic_len;
2106 data += magic_len;
2107
2108 /* loop elements */
2109 while (len > sizeof(struct ath10k_fw_ie)) {
2110 #if defined(__linux__)
2111 hdr = (struct ath10k_fw_ie *)data;
2112 #elif defined(__FreeBSD__)
2113 hdr = (const struct ath10k_fw_ie *)data;
2114 #endif
2115
2116 ie_id = le32_to_cpu(hdr->id);
2117 ie_len = le32_to_cpu(hdr->len);
2118
2119 len -= sizeof(*hdr);
2120 data += sizeof(*hdr);
2121
2122 if (len < ie_len) {
2123 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
2124 ie_id, len, ie_len);
2125 ret = -EINVAL;
2126 goto err;
2127 }
2128
2129 switch (ie_id) {
2130 case ATH10K_FW_IE_FW_VERSION:
2131 if (ie_len > sizeof(fw_file->fw_version) - 1)
2132 break;
2133
2134 memcpy(fw_file->fw_version, data, ie_len);
2135 fw_file->fw_version[ie_len] = '\0';
2136
2137 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2138 "found fw version %s\n",
2139 fw_file->fw_version);
2140 break;
2141 case ATH10K_FW_IE_TIMESTAMP:
2142 if (ie_len != sizeof(u32))
2143 break;
2144
2145 #if defined(__linux__)
2146 timestamp = (__le32 *)data;
2147 #elif defined(__FreeBSD__)
2148 timestamp = (const __le32 *)data;
2149 #endif
2150
2151 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
2152 le32_to_cpup(timestamp));
2153 break;
2154 case ATH10K_FW_IE_FEATURES:
2155 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2156 "found firmware features ie (%zd B)\n",
2157 ie_len);
2158
2159 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
2160 index = i / 8;
2161 bit = i % 8;
2162
2163 if (index == ie_len)
2164 break;
2165
2166 if (data[index] & (1 << bit)) {
2167 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2168 "Enabling feature bit: %i\n",
2169 i);
2170 __set_bit(i, fw_file->fw_features);
2171 }
2172 }
2173
2174 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
2175 fw_file->fw_features,
2176 sizeof(fw_file->fw_features));
2177 break;
2178 case ATH10K_FW_IE_FW_IMAGE:
2179 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2180 "found fw image ie (%zd B)\n",
2181 ie_len);
2182
2183 fw_file->firmware_data = data;
2184 fw_file->firmware_len = ie_len;
2185
2186 break;
2187 case ATH10K_FW_IE_OTP_IMAGE:
2188 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2189 "found otp image ie (%zd B)\n",
2190 ie_len);
2191
2192 fw_file->otp_data = data;
2193 fw_file->otp_len = ie_len;
2194
2195 break;
2196 case ATH10K_FW_IE_WMI_OP_VERSION:
2197 if (ie_len != sizeof(u32))
2198 break;
2199
2200 #if defined(__linux__)
2201 version = (__le32 *)data;
2202 #elif defined(__FreeBSD__)
2203 version = (const __le32 *)data;
2204 #endif
2205
2206 fw_file->wmi_op_version = le32_to_cpup(version);
2207
2208 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
2209 fw_file->wmi_op_version);
2210 break;
2211 case ATH10K_FW_IE_HTT_OP_VERSION:
2212 if (ie_len != sizeof(u32))
2213 break;
2214
2215 #if defined(__linux__)
2216 version = (__le32 *)data;
2217 #elif defined(__FreeBSD__)
2218 version = (const __le32 *)data;
2219 #endif
2220
2221 fw_file->htt_op_version = le32_to_cpup(version);
2222
2223 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
2224 fw_file->htt_op_version);
2225 break;
2226 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
2227 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2228 "found fw code swap image ie (%zd B)\n",
2229 ie_len);
2230 fw_file->codeswap_data = data;
2231 fw_file->codeswap_len = ie_len;
2232 break;
2233 default:
2234 ath10k_warn(ar, "Unknown FW IE: %u\n",
2235 le32_to_cpu(hdr->id));
2236 break;
2237 }
2238
2239 /* jump over the padding */
2240 ie_len = ALIGN(ie_len, 4);
2241
2242 len -= ie_len;
2243 data += ie_len;
2244 }
2245
2246 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) &&
2247 (!fw_file->firmware_data || !fw_file->firmware_len)) {
2248 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
2249 ar->hw_params.fw.dir, name);
2250 ret = -ENOMEDIUM;
2251 goto err;
2252 }
2253
2254 return 0;
2255
2256 err:
2257 ath10k_core_free_firmware_files(ar);
2258 return ret;
2259 }
2260
ath10k_core_get_fw_name(struct ath10k * ar,char * fw_name,size_t fw_name_len,int fw_api)2261 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name,
2262 size_t fw_name_len, int fw_api)
2263 {
2264 switch (ar->hif.bus) {
2265 case ATH10K_BUS_SDIO:
2266 case ATH10K_BUS_USB:
2267 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin",
2268 ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus),
2269 fw_api);
2270 break;
2271 case ATH10K_BUS_PCI:
2272 case ATH10K_BUS_AHB:
2273 case ATH10K_BUS_SNOC:
2274 scnprintf(fw_name, fw_name_len, "%s-%d.bin",
2275 ATH10K_FW_FILE_BASE, fw_api);
2276 break;
2277 }
2278 }
2279
ath10k_core_fetch_firmware_files(struct ath10k * ar)2280 static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
2281 {
2282 int ret, i;
2283 char fw_name[100];
2284
2285 /* calibration file is optional, don't check for any errors */
2286 ath10k_fetch_cal_file(ar);
2287
2288 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) {
2289 ar->fw_api = i;
2290 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n",
2291 ar->fw_api);
2292
2293 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api);
2294 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name,
2295 &ar->normal_mode_fw.fw_file);
2296 if (!ret)
2297 goto success;
2298 }
2299
2300 /* we end up here if we couldn't fetch any firmware */
2301
2302 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d",
2303 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir,
2304 ret);
2305
2306 return ret;
2307
2308 success:
2309 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
2310
2311 return 0;
2312 }
2313
ath10k_core_pre_cal_download(struct ath10k * ar)2314 static int ath10k_core_pre_cal_download(struct ath10k *ar)
2315 {
2316 int ret;
2317
2318 ret = ath10k_download_cal_nvmem(ar, "pre-calibration");
2319 if (ret == 0) {
2320 ar->cal_mode = ATH10K_PRE_CAL_MODE_NVMEM;
2321 goto success;
2322 } else if (ret == -EPROBE_DEFER) {
2323 return ret;
2324 }
2325
2326 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2327 "boot did not find a pre-calibration nvmem-cell, try file next: %d\n",
2328 ret);
2329
2330 ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
2331 if (ret == 0) {
2332 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
2333 goto success;
2334 }
2335
2336 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2337 "boot did not find a pre calibration file, try DT next: %d\n",
2338 ret);
2339
2340 ret = ath10k_download_cal_dt(ar, "qcom,pre-calibration-data");
2341 if (ret == -ENOENT)
2342 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");
2343 if (ret) {
2344 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2345 "unable to load pre cal data from DT: %d\n", ret);
2346 return ret;
2347 }
2348 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT;
2349
2350 success:
2351 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2352 ath10k_cal_mode_str(ar->cal_mode));
2353
2354 return 0;
2355 }
2356
ath10k_core_pre_cal_config(struct ath10k * ar)2357 static int ath10k_core_pre_cal_config(struct ath10k *ar)
2358 {
2359 int ret;
2360
2361 ret = ath10k_core_pre_cal_download(ar);
2362 if (ret) {
2363 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2364 "failed to load pre cal data: %d\n", ret);
2365 return ret;
2366 }
2367
2368 ret = ath10k_core_get_board_id_from_otp(ar);
2369 if (ret) {
2370 ath10k_err(ar, "failed to get board id: %d\n", ret);
2371 return ret;
2372 }
2373
2374 ret = ath10k_download_and_run_otp(ar);
2375 if (ret) {
2376 ath10k_err(ar, "failed to run otp: %d\n", ret);
2377 return ret;
2378 }
2379
2380 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2381 "pre cal configuration done successfully\n");
2382
2383 return 0;
2384 }
2385
ath10k_download_cal_data(struct ath10k * ar)2386 static int ath10k_download_cal_data(struct ath10k *ar)
2387 {
2388 int ret;
2389
2390 ret = ath10k_core_pre_cal_config(ar);
2391 if (ret == 0)
2392 return 0;
2393
2394 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2395 "pre cal download procedure failed, try cal file: %d\n",
2396 ret);
2397
2398 ret = ath10k_download_cal_nvmem(ar, "calibration");
2399 if (ret == 0) {
2400 ar->cal_mode = ATH10K_CAL_MODE_NVMEM;
2401 goto done;
2402 } else if (ret == -EPROBE_DEFER) {
2403 return ret;
2404 }
2405
2406 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2407 "boot did not find a calibration nvmem-cell, try file next: %d\n",
2408 ret);
2409
2410 ret = ath10k_download_cal_file(ar, ar->cal_file);
2411 if (ret == 0) {
2412 ar->cal_mode = ATH10K_CAL_MODE_FILE;
2413 goto done;
2414 }
2415
2416 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2417 "boot did not find a calibration file, try DT next: %d\n",
2418 ret);
2419
2420 ret = ath10k_download_cal_dt(ar, "qcom,calibration-data");
2421 if (ret == -ENOENT)
2422 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");
2423 if (ret == 0) {
2424 ar->cal_mode = ATH10K_CAL_MODE_DT;
2425 goto done;
2426 }
2427
2428 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2429 "boot did not find DT entry, try target EEPROM next: %d\n",
2430 ret);
2431
2432 ret = ath10k_download_cal_eeprom(ar);
2433 if (ret == 0) {
2434 ar->cal_mode = ATH10K_CAL_MODE_EEPROM;
2435 goto done;
2436 }
2437
2438 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2439 "boot did not find target EEPROM entry, try OTP next: %d\n",
2440 ret);
2441
2442 ret = ath10k_download_and_run_otp(ar);
2443 if (ret) {
2444 ath10k_err(ar, "failed to run otp: %d\n", ret);
2445 return ret;
2446 }
2447
2448 ar->cal_mode = ATH10K_CAL_MODE_OTP;
2449
2450 done:
2451 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2452 ath10k_cal_mode_str(ar->cal_mode));
2453 return 0;
2454 }
2455
ath10k_core_fetch_btcoex_dt(struct ath10k * ar)2456 static void ath10k_core_fetch_btcoex_dt(struct ath10k *ar)
2457 {
2458 #if defined(__linux__) || (defined(__FreeBSD__) && defined(CONFIG_OF))
2459 struct device_node *node;
2460 u8 coex_support = 0;
2461 int ret;
2462
2463 node = ar->dev->of_node;
2464 if (!node)
2465 goto out;
2466
2467 ret = of_property_read_u8(node, "qcom,coexist-support", &coex_support);
2468 if (ret) {
2469 ar->coex_support = true;
2470 goto out;
2471 }
2472
2473 if (coex_support) {
2474 ar->coex_support = true;
2475 } else {
2476 ar->coex_support = false;
2477 ar->coex_gpio_pin = -1;
2478 goto out;
2479 }
2480
2481 ret = of_property_read_u32(node, "qcom,coexist-gpio-pin",
2482 &ar->coex_gpio_pin);
2483 if (ret)
2484 ar->coex_gpio_pin = -1;
2485
2486 out:
2487 #endif
2488 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot coex_support %d coex_gpio_pin %d\n",
2489 ar->coex_support, ar->coex_gpio_pin);
2490 }
2491
ath10k_init_uart(struct ath10k * ar)2492 static int ath10k_init_uart(struct ath10k *ar)
2493 {
2494 int ret;
2495
2496 /*
2497 * Explicitly setting UART prints to zero as target turns it on
2498 * based on scratch registers.
2499 */
2500 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
2501 if (ret) {
2502 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
2503 return ret;
2504 }
2505
2506 if (!uart_print) {
2507 if (ar->hw_params.uart_pin_workaround) {
2508 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin,
2509 ar->hw_params.uart_pin);
2510 if (ret) {
2511 ath10k_warn(ar, "failed to set UART TX pin: %d",
2512 ret);
2513 return ret;
2514 }
2515 }
2516
2517 return 0;
2518 }
2519
2520 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
2521 if (ret) {
2522 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2523 return ret;
2524 }
2525
2526 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
2527 if (ret) {
2528 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2529 return ret;
2530 }
2531
2532 /* Set the UART baud rate to 19200. */
2533 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
2534 if (ret) {
2535 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
2536 return ret;
2537 }
2538
2539 ath10k_info(ar, "UART prints enabled\n");
2540 return 0;
2541 }
2542
ath10k_init_hw_params(struct ath10k * ar)2543 static int ath10k_init_hw_params(struct ath10k *ar)
2544 {
2545 const struct ath10k_hw_params *hw_params;
2546 int i;
2547
2548 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
2549 hw_params = &ath10k_hw_params_list[i];
2550
2551 if (hw_params->bus == ar->hif.bus &&
2552 hw_params->id == ar->target_version &&
2553 hw_params->dev_id == ar->dev_id)
2554 break;
2555 }
2556
2557 if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
2558 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
2559 ar->target_version);
2560 return -EINVAL;
2561 }
2562
2563 ar->hw_params = *hw_params;
2564
2565 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
2566 ar->hw_params.name, ar->target_version);
2567
2568 return 0;
2569 }
2570
ath10k_core_recovery_check_work(struct work_struct * work)2571 static void ath10k_core_recovery_check_work(struct work_struct *work)
2572 {
2573 struct ath10k *ar = container_of(work, struct ath10k, recovery_check_work);
2574 long time_left;
2575
2576 /* Sometimes the recovery will fail and then the next all recovery fail,
2577 * so avoid infinite recovery.
2578 */
2579 if (atomic_read(&ar->fail_cont_count) >= ATH10K_RECOVERY_MAX_FAIL_COUNT) {
2580 ath10k_err(ar, "consecutive fail %d times, will shutdown driver!",
2581 atomic_read(&ar->fail_cont_count));
2582 ar->state = ATH10K_STATE_WEDGED;
2583 return;
2584 }
2585
2586 ath10k_dbg(ar, ATH10K_DBG_BOOT, "total recovery count: %d", ++ar->recovery_count);
2587
2588 if (atomic_read(&ar->pending_recovery)) {
2589 /* Sometimes it happened another recovery work before the previous one
2590 * completed, then the second recovery work will destroy the previous
2591 * one, thus below is to avoid that.
2592 */
2593 time_left = wait_for_completion_timeout(&ar->driver_recovery,
2594 ATH10K_RECOVERY_TIMEOUT_HZ);
2595 if (time_left) {
2596 ath10k_warn(ar, "previous recovery succeeded, skip this!\n");
2597 return;
2598 }
2599
2600 /* Record the continuous recovery fail count when recovery failed. */
2601 atomic_inc(&ar->fail_cont_count);
2602
2603 /* Avoid having multiple recoveries at the same time. */
2604 return;
2605 }
2606
2607 atomic_inc(&ar->pending_recovery);
2608 queue_work(ar->workqueue, &ar->restart_work);
2609 }
2610
ath10k_core_start_recovery(struct ath10k * ar)2611 void ath10k_core_start_recovery(struct ath10k *ar)
2612 {
2613 /* Use workqueue_aux to avoid blocking recovery tracking */
2614 queue_work(ar->workqueue_aux, &ar->recovery_check_work);
2615 }
2616 EXPORT_SYMBOL(ath10k_core_start_recovery);
2617
ath10k_core_napi_enable(struct ath10k * ar)2618 void ath10k_core_napi_enable(struct ath10k *ar)
2619 {
2620 lockdep_assert_held(&ar->conf_mutex);
2621
2622 if (test_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags))
2623 return;
2624
2625 napi_enable(&ar->napi);
2626 set_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags);
2627 }
2628 EXPORT_SYMBOL(ath10k_core_napi_enable);
2629
ath10k_core_napi_sync_disable(struct ath10k * ar)2630 void ath10k_core_napi_sync_disable(struct ath10k *ar)
2631 {
2632 lockdep_assert_held(&ar->conf_mutex);
2633
2634 if (!test_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags))
2635 return;
2636
2637 napi_synchronize(&ar->napi);
2638 napi_disable(&ar->napi);
2639 clear_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags);
2640 }
2641 EXPORT_SYMBOL(ath10k_core_napi_sync_disable);
2642
ath10k_core_restart(struct work_struct * work)2643 static void ath10k_core_restart(struct work_struct *work)
2644 {
2645 struct ath10k *ar = container_of(work, struct ath10k, restart_work);
2646 int ret;
2647
2648 reinit_completion(&ar->driver_recovery);
2649
2650 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2651
2652 /* Place a barrier to make sure the compiler doesn't reorder
2653 * CRASH_FLUSH and calling other functions.
2654 */
2655 barrier();
2656
2657 ieee80211_stop_queues(ar->hw);
2658 ath10k_drain_tx(ar);
2659 complete(&ar->scan.started);
2660 complete(&ar->scan.completed);
2661 complete(&ar->scan.on_channel);
2662 complete(&ar->offchan_tx_completed);
2663 complete(&ar->install_key_done);
2664 complete(&ar->vdev_setup_done);
2665 complete(&ar->vdev_delete_done);
2666 complete(&ar->thermal.wmi_sync);
2667 complete(&ar->bss_survey_done);
2668 wake_up(&ar->htt.empty_tx_wq);
2669 wake_up(&ar->wmi.tx_credits_wq);
2670 wake_up(&ar->peer_mapping_wq);
2671
2672 /* TODO: We can have one instance of cancelling coverage_class_work by
2673 * moving it to ath10k_halt(), so that both stop() and restart() would
2674 * call that but it takes conf_mutex() and if we call cancel_work_sync()
2675 * with conf_mutex it will deadlock.
2676 */
2677 cancel_work_sync(&ar->set_coverage_class_work);
2678
2679 mutex_lock(&ar->conf_mutex);
2680
2681 switch (ar->state) {
2682 case ATH10K_STATE_ON:
2683 ar->state = ATH10K_STATE_RESTARTING;
2684 ath10k_halt(ar);
2685 ath10k_scan_finish(ar);
2686 ieee80211_restart_hw(ar->hw);
2687 break;
2688 case ATH10K_STATE_OFF:
2689 /* this can happen if driver is being unloaded
2690 * or if the crash happens during FW probing
2691 */
2692 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
2693 break;
2694 case ATH10K_STATE_RESTARTING:
2695 /* hw restart might be requested from multiple places */
2696 break;
2697 case ATH10K_STATE_RESTARTED:
2698 ar->state = ATH10K_STATE_WEDGED;
2699 fallthrough;
2700 case ATH10K_STATE_WEDGED:
2701 ath10k_warn(ar, "device is wedged, will not restart\n");
2702 break;
2703 case ATH10K_STATE_UTF:
2704 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
2705 break;
2706 }
2707
2708 mutex_unlock(&ar->conf_mutex);
2709
2710 ret = ath10k_coredump_submit(ar);
2711 if (ret)
2712 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d",
2713 ret);
2714 }
2715
ath10k_core_set_coverage_class_work(struct work_struct * work)2716 static void ath10k_core_set_coverage_class_work(struct work_struct *work)
2717 {
2718 struct ath10k *ar = container_of(work, struct ath10k,
2719 set_coverage_class_work);
2720
2721 if (ar->hw_params.hw_ops->set_coverage_class)
2722 ar->hw_params.hw_ops->set_coverage_class(ar, -1, -1);
2723 }
2724
ath10k_core_init_firmware_features(struct ath10k * ar)2725 static int ath10k_core_init_firmware_features(struct ath10k *ar)
2726 {
2727 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2728 int max_num_peers;
2729
2730 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) &&
2731 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2732 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
2733 return -EINVAL;
2734 }
2735
2736 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
2737 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
2738 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version);
2739 return -EINVAL;
2740 }
2741
2742 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
2743 switch (ath10k_cryptmode_param) {
2744 case ATH10K_CRYPT_MODE_HW:
2745 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2746 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2747 break;
2748 case ATH10K_CRYPT_MODE_SW:
2749 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2750 fw_file->fw_features)) {
2751 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
2752 return -EINVAL;
2753 }
2754
2755 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2756 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2757 break;
2758 default:
2759 ath10k_info(ar, "invalid cryptmode: %d\n",
2760 ath10k_cryptmode_param);
2761 return -EINVAL;
2762 }
2763
2764 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
2765 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
2766
2767 if (ath10k_frame_mode == ATH10K_HW_TXRX_RAW) {
2768 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2769 fw_file->fw_features)) {
2770 ath10k_err(ar, "rawmode = 1 requires support from firmware");
2771 return -EINVAL;
2772 }
2773 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2774 }
2775
2776 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
2777 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
2778
2779 /* Workaround:
2780 *
2781 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode
2782 * and causes enormous performance issues (malformed frames,
2783 * etc).
2784 *
2785 * Disabling A-MSDU makes RAW mode stable with heavy traffic
2786 * albeit a bit slower compared to regular operation.
2787 */
2788 ar->htt.max_num_amsdu = 1;
2789 }
2790
2791 /* Backwards compatibility for firmwares without
2792 * ATH10K_FW_IE_WMI_OP_VERSION.
2793 */
2794 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
2795 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2796 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
2797 fw_file->fw_features))
2798 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
2799 else
2800 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
2801 } else {
2802 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
2803 }
2804 }
2805
2806 switch (fw_file->wmi_op_version) {
2807 case ATH10K_FW_WMI_OP_VERSION_MAIN:
2808 max_num_peers = TARGET_NUM_PEERS;
2809 ar->max_num_stations = TARGET_NUM_STATIONS;
2810 ar->max_num_vdevs = TARGET_NUM_VDEVS;
2811 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
2812 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
2813 WMI_STAT_PEER;
2814 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2815 break;
2816 case ATH10K_FW_WMI_OP_VERSION_10_1:
2817 case ATH10K_FW_WMI_OP_VERSION_10_2:
2818 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2819 if (ath10k_peer_stats_enabled(ar)) {
2820 max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS;
2821 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS;
2822 } else {
2823 max_num_peers = TARGET_10X_NUM_PEERS;
2824 ar->max_num_stations = TARGET_10X_NUM_STATIONS;
2825 }
2826 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
2827 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
2828 ar->fw_stats_req_mask = WMI_STAT_PEER;
2829 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2830 #if defined(CONFIG_FWLOG)
2831 ar->fwlog_max_moduleid = ATH10K_FWLOG_MODULE_ID_MAX_10_2_4;
2832 #endif
2833 break;
2834 case ATH10K_FW_WMI_OP_VERSION_TLV:
2835 max_num_peers = TARGET_TLV_NUM_PEERS;
2836 ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
2837 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
2838 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
2839 if (ar->hif.bus == ATH10K_BUS_SDIO)
2840 ar->htt.max_num_pending_tx =
2841 TARGET_TLV_NUM_MSDU_DESC_HL;
2842 else
2843 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
2844 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
2845 ar->fw_stats_req_mask = WMI_TLV_STAT_PDEV | WMI_TLV_STAT_VDEV |
2846 WMI_TLV_STAT_PEER | WMI_TLV_STAT_PEER_EXTD;
2847 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2848 ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC;
2849 break;
2850 case ATH10K_FW_WMI_OP_VERSION_10_4:
2851 max_num_peers = TARGET_10_4_NUM_PEERS;
2852 ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
2853 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
2854 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
2855 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
2856 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER |
2857 WMI_10_4_STAT_PEER_EXTD |
2858 WMI_10_4_STAT_VDEV_EXTD;
2859 ar->max_spatial_stream = ar->hw_params.max_spatial_stream;
2860 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS;
2861
2862 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
2863 fw_file->fw_features))
2864 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC;
2865 else
2866 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
2867 break;
2868 case ATH10K_FW_WMI_OP_VERSION_UNSET:
2869 case ATH10K_FW_WMI_OP_VERSION_MAX:
2870 default:
2871 WARN_ON(1);
2872 return -EINVAL;
2873 }
2874
2875 if (ar->hw_params.num_peers)
2876 ar->max_num_peers = ar->hw_params.num_peers;
2877 else
2878 ar->max_num_peers = max_num_peers;
2879
2880 /* Backwards compatibility for firmwares without
2881 * ATH10K_FW_IE_HTT_OP_VERSION.
2882 */
2883 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
2884 switch (fw_file->wmi_op_version) {
2885 case ATH10K_FW_WMI_OP_VERSION_MAIN:
2886 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
2887 break;
2888 case ATH10K_FW_WMI_OP_VERSION_10_1:
2889 case ATH10K_FW_WMI_OP_VERSION_10_2:
2890 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2891 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
2892 break;
2893 case ATH10K_FW_WMI_OP_VERSION_TLV:
2894 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
2895 break;
2896 case ATH10K_FW_WMI_OP_VERSION_10_4:
2897 case ATH10K_FW_WMI_OP_VERSION_UNSET:
2898 case ATH10K_FW_WMI_OP_VERSION_MAX:
2899 ath10k_err(ar, "htt op version not found from fw meta data");
2900 return -EINVAL;
2901 }
2902 }
2903
2904 return 0;
2905 }
2906
ath10k_core_reset_rx_filter(struct ath10k * ar)2907 static int ath10k_core_reset_rx_filter(struct ath10k *ar)
2908 {
2909 int ret;
2910 int vdev_id;
2911 int vdev_type;
2912 int vdev_subtype;
2913 const u8 *vdev_addr;
2914
2915 vdev_id = 0;
2916 vdev_type = WMI_VDEV_TYPE_STA;
2917 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE);
2918 vdev_addr = ar->mac_addr;
2919
2920 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype,
2921 vdev_addr);
2922 if (ret) {
2923 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret);
2924 return ret;
2925 }
2926
2927 ret = ath10k_wmi_vdev_delete(ar, vdev_id);
2928 if (ret) {
2929 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret);
2930 return ret;
2931 }
2932
2933 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be
2934 * serialized properly implicitly.
2935 *
2936 * Moreover (most) WMI commands have no explicit acknowledges. It is
2937 * possible to infer it implicitly by poking firmware with echo
2938 * command - getting a reply means all preceding comments have been
2939 * (mostly) processed.
2940 *
2941 * In case of vdev create/delete this is sufficient.
2942 *
2943 * Without this it's possible to end up with a race when HTT Rx ring is
2944 * started before vdev create/delete hack is complete allowing a short
2945 * window of opportunity to receive (and Tx ACK) a bunch of frames.
2946 */
2947 ret = ath10k_wmi_barrier(ar);
2948 if (ret) {
2949 ath10k_err(ar, "failed to ping firmware: %d\n", ret);
2950 return ret;
2951 }
2952
2953 return 0;
2954 }
2955
ath10k_core_compat_services(struct ath10k * ar)2956 static int ath10k_core_compat_services(struct ath10k *ar)
2957 {
2958 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2959
2960 /* all 10.x firmware versions support thermal throttling but don't
2961 * advertise the support via service flags so we have to hardcode
2962 * it here
2963 */
2964 switch (fw_file->wmi_op_version) {
2965 case ATH10K_FW_WMI_OP_VERSION_10_1:
2966 case ATH10K_FW_WMI_OP_VERSION_10_2:
2967 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2968 case ATH10K_FW_WMI_OP_VERSION_10_4:
2969 set_bit(WMI_SERVICE_THERM_THROT, ar->wmi.svc_map);
2970 break;
2971 default:
2972 break;
2973 }
2974
2975 return 0;
2976 }
2977
2978 #define TGT_IRAM_READ_PER_ITR (8 * 1024)
2979
ath10k_core_copy_target_iram(struct ath10k * ar)2980 static int ath10k_core_copy_target_iram(struct ath10k *ar)
2981 {
2982 const struct ath10k_hw_mem_layout *hw_mem;
2983 const struct ath10k_mem_region *tmp, *mem_region = NULL;
2984 dma_addr_t paddr;
2985 void *vaddr = NULL;
2986 u8 num_read_itr;
2987 int i, ret;
2988 u32 len, remaining_len;
2989
2990 /* copy target iram feature must work also when
2991 * ATH10K_FW_CRASH_DUMP_RAM_DATA is disabled, so
2992 * _ath10k_coredump_get_mem_layout() to accomplist that
2993 */
2994 hw_mem = _ath10k_coredump_get_mem_layout(ar);
2995 if (!hw_mem)
2996 /* if CONFIG_DEV_COREDUMP is disabled we get NULL, then
2997 * just silently disable the feature by doing nothing
2998 */
2999 return 0;
3000
3001 for (i = 0; i < hw_mem->region_table.size; i++) {
3002 tmp = &hw_mem->region_table.regions[i];
3003 if (tmp->type == ATH10K_MEM_REGION_TYPE_REG) {
3004 mem_region = tmp;
3005 break;
3006 }
3007 }
3008
3009 if (!mem_region)
3010 return -ENOMEM;
3011
3012 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
3013 if (ar->wmi.mem_chunks[i].req_id ==
3014 WMI_IRAM_RECOVERY_HOST_MEM_REQ_ID) {
3015 vaddr = ar->wmi.mem_chunks[i].vaddr;
3016 len = ar->wmi.mem_chunks[i].len;
3017 break;
3018 }
3019 }
3020
3021 if (!vaddr || !len) {
3022 ath10k_warn(ar, "No allocated memory for IRAM back up");
3023 return -ENOMEM;
3024 }
3025
3026 len = (len < mem_region->len) ? len : mem_region->len;
3027 paddr = mem_region->start;
3028 num_read_itr = len / TGT_IRAM_READ_PER_ITR;
3029 remaining_len = len % TGT_IRAM_READ_PER_ITR;
3030 for (i = 0; i < num_read_itr; i++) {
3031 ret = ath10k_hif_diag_read(ar, paddr, vaddr,
3032 TGT_IRAM_READ_PER_ITR);
3033 if (ret) {
3034 ath10k_warn(ar, "failed to copy firmware IRAM contents: %d",
3035 ret);
3036 return ret;
3037 }
3038
3039 paddr += TGT_IRAM_READ_PER_ITR;
3040 #if defined(__linux__)
3041 vaddr += TGT_IRAM_READ_PER_ITR;
3042 #elif defined(__FreeBSD__)
3043 vaddr = (void *)((uintptr_t)vaddr + TGT_IRAM_READ_PER_ITR);
3044 #endif
3045 }
3046
3047 if (remaining_len) {
3048 ret = ath10k_hif_diag_read(ar, paddr, vaddr, remaining_len);
3049 if (ret) {
3050 ath10k_warn(ar, "failed to copy firmware IRAM contents: %d",
3051 ret);
3052 return ret;
3053 }
3054 }
3055
3056 ath10k_dbg(ar, ATH10K_DBG_BOOT, "target IRAM back up completed\n");
3057
3058 return 0;
3059 }
3060
ath10k_core_start(struct ath10k * ar,enum ath10k_firmware_mode mode,const struct ath10k_fw_components * fw)3061 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
3062 const struct ath10k_fw_components *fw)
3063 {
3064 int status;
3065 u32 val;
3066
3067 lockdep_assert_held(&ar->conf_mutex);
3068
3069 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
3070
3071 ar->running_fw = fw;
3072
3073 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3074 ar->running_fw->fw_file.fw_features)) {
3075 ath10k_bmi_start(ar);
3076
3077 /* Enable hardware clock to speed up firmware download */
3078 if (ar->hw_params.hw_ops->enable_pll_clk) {
3079 status = ar->hw_params.hw_ops->enable_pll_clk(ar);
3080 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot enable pll ret %d\n",
3081 status);
3082 }
3083
3084 if (ath10k_init_configure_target(ar)) {
3085 status = -EINVAL;
3086 goto err;
3087 }
3088
3089 status = ath10k_download_cal_data(ar);
3090 if (status)
3091 goto err;
3092
3093 /* Some of qca988x solutions are having global reset issue
3094 * during target initialization. Bypassing PLL setting before
3095 * downloading firmware and letting the SoC run on REF_CLK is
3096 * fixing the problem. Corresponding firmware change is also
3097 * needed to set the clock source once the target is
3098 * initialized.
3099 */
3100 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
3101 ar->running_fw->fw_file.fw_features)) {
3102 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
3103 if (status) {
3104 ath10k_err(ar, "could not write to skip_clock_init: %d\n",
3105 status);
3106 goto err;
3107 }
3108 }
3109
3110 status = ath10k_download_fw(ar);
3111 if (status)
3112 goto err;
3113
3114 status = ath10k_init_uart(ar);
3115 if (status)
3116 goto err;
3117
3118 if (ar->hif.bus == ATH10K_BUS_SDIO) {
3119 status = ath10k_init_sdio(ar, mode);
3120 if (status) {
3121 ath10k_err(ar, "failed to init SDIO: %d\n", status);
3122 goto err;
3123 }
3124 }
3125 }
3126
3127 ar->htc.htc_ops.target_send_suspend_complete =
3128 ath10k_send_suspend_complete;
3129
3130 status = ath10k_htc_init(ar);
3131 if (status) {
3132 ath10k_err(ar, "could not init HTC (%d)\n", status);
3133 goto err;
3134 }
3135
3136 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3137 ar->running_fw->fw_file.fw_features)) {
3138 status = ath10k_bmi_done(ar);
3139 if (status)
3140 goto err;
3141 }
3142
3143 status = ath10k_wmi_attach(ar);
3144 if (status) {
3145 ath10k_err(ar, "WMI attach failed: %d\n", status);
3146 goto err;
3147 }
3148
3149 status = ath10k_htt_init(ar);
3150 if (status) {
3151 ath10k_err(ar, "failed to init htt: %d\n", status);
3152 goto err_wmi_detach;
3153 }
3154
3155 status = ath10k_htt_tx_start(&ar->htt);
3156 if (status) {
3157 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
3158 goto err_wmi_detach;
3159 }
3160
3161 /* If firmware indicates Full Rx Reorder support it must be used in a
3162 * slightly different manner. Let HTT code know.
3163 */
3164 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
3165 ar->wmi.svc_map));
3166
3167 status = ath10k_htt_rx_alloc(&ar->htt);
3168 if (status) {
3169 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
3170 goto err_htt_tx_detach;
3171 }
3172
3173 status = ath10k_hif_start(ar);
3174 if (status) {
3175 ath10k_err(ar, "could not start HIF: %d\n", status);
3176 goto err_htt_rx_detach;
3177 }
3178
3179 status = ath10k_htc_wait_target(&ar->htc);
3180 if (status) {
3181 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
3182 goto err_hif_stop;
3183 }
3184
3185 status = ath10k_hif_start_post(ar);
3186 if (status) {
3187 ath10k_err(ar, "failed to swap mailbox: %d\n", status);
3188 goto err_hif_stop;
3189 }
3190
3191 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3192 status = ath10k_htt_connect(&ar->htt);
3193 if (status) {
3194 ath10k_err(ar, "failed to connect htt (%d)\n", status);
3195 goto err_hif_stop;
3196 }
3197 }
3198
3199 status = ath10k_wmi_connect(ar);
3200 if (status) {
3201 ath10k_err(ar, "could not connect wmi: %d\n", status);
3202 goto err_hif_stop;
3203 }
3204
3205 status = ath10k_htc_start(&ar->htc);
3206 if (status) {
3207 ath10k_err(ar, "failed to start htc: %d\n", status);
3208 goto err_hif_stop;
3209 }
3210
3211 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3212 status = ath10k_wmi_wait_for_service_ready(ar);
3213 if (status) {
3214 ath10k_warn(ar, "wmi service ready event not received");
3215 goto err_hif_stop;
3216 }
3217 }
3218
3219 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
3220 ar->hw->wiphy->fw_version);
3221
3222 if (test_bit(ATH10K_FW_FEATURE_IRAM_RECOVERY,
3223 ar->running_fw->fw_file.fw_features)) {
3224 status = ath10k_core_copy_target_iram(ar);
3225 if (status) {
3226 ath10k_warn(ar, "failed to copy target iram contents: %d",
3227 status);
3228 goto err_hif_stop;
3229 }
3230 }
3231
3232 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) &&
3233 mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3234 val = 0;
3235 if (ath10k_peer_stats_enabled(ar))
3236 val = WMI_10_4_PEER_STATS;
3237
3238 /* Enable vdev stats by default */
3239 val |= WMI_10_4_VDEV_STATS;
3240
3241 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
3242 val |= WMI_10_4_BSS_CHANNEL_INFO_64;
3243
3244 ath10k_core_fetch_btcoex_dt(ar);
3245
3246 /* 10.4 firmware supports BT-Coex without reloading firmware
3247 * via pdev param. To support Bluetooth coexistence pdev param,
3248 * WMI_COEX_GPIO_SUPPORT of extended resource config should be
3249 * enabled always.
3250 *
3251 * We can still enable BTCOEX if firmware has the support
3252 * even though btceox_support value is
3253 * ATH10K_DT_BTCOEX_NOT_FOUND
3254 */
3255
3256 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) &&
3257 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM,
3258 ar->running_fw->fw_file.fw_features) &&
3259 ar->coex_support)
3260 val |= WMI_10_4_COEX_GPIO_SUPPORT;
3261
3262 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
3263 ar->wmi.svc_map))
3264 val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY;
3265
3266 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
3267 ar->wmi.svc_map))
3268 val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA;
3269
3270 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI,
3271 ar->wmi.svc_map))
3272 val |= WMI_10_4_TX_DATA_ACK_RSSI;
3273
3274 if (test_bit(WMI_SERVICE_REPORT_AIRTIME, ar->wmi.svc_map))
3275 val |= WMI_10_4_REPORT_AIRTIME;
3276
3277 if (test_bit(WMI_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT,
3278 ar->wmi.svc_map))
3279 val |= WMI_10_4_EXT_PEER_TID_CONFIGS_SUPPORT;
3280
3281 status = ath10k_mac_ext_resource_config(ar, val);
3282 if (status) {
3283 ath10k_err(ar,
3284 "failed to send ext resource cfg command : %d\n",
3285 status);
3286 goto err_hif_stop;
3287 }
3288 }
3289
3290 status = ath10k_wmi_cmd_init(ar);
3291 if (status) {
3292 ath10k_err(ar, "could not send WMI init command (%d)\n",
3293 status);
3294 goto err_hif_stop;
3295 }
3296
3297 status = ath10k_wmi_wait_for_unified_ready(ar);
3298 if (status) {
3299 ath10k_err(ar, "wmi unified ready event not received\n");
3300 goto err_hif_stop;
3301 }
3302
3303 status = ath10k_core_compat_services(ar);
3304 if (status) {
3305 ath10k_err(ar, "compat services failed: %d\n", status);
3306 goto err_hif_stop;
3307 }
3308
3309 status = ath10k_wmi_pdev_set_base_macaddr(ar, ar->mac_addr);
3310 if (status && status != -EOPNOTSUPP) {
3311 ath10k_err(ar,
3312 "failed to set base mac address: %d\n", status);
3313 goto err_hif_stop;
3314 }
3315
3316 /* Some firmware revisions do not properly set up hardware rx filter
3317 * registers.
3318 *
3319 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK
3320 * is filled with 0s instead of 1s allowing HW to respond with ACKs to
3321 * any frames that matches MAC_PCU_RX_FILTER which is also
3322 * misconfigured to accept anything.
3323 *
3324 * The ADDR1 is programmed using internal firmware structure field and
3325 * can't be (easily/sanely) reached from the driver explicitly. It is
3326 * possible to implicitly make it correct by creating a dummy vdev and
3327 * then deleting it.
3328 */
3329 if (ar->hw_params.hw_filter_reset_required &&
3330 mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3331 status = ath10k_core_reset_rx_filter(ar);
3332 if (status) {
3333 ath10k_err(ar,
3334 "failed to reset rx filter: %d\n", status);
3335 goto err_hif_stop;
3336 }
3337 }
3338
3339 status = ath10k_htt_rx_ring_refill(ar);
3340 if (status) {
3341 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
3342 goto err_hif_stop;
3343 }
3344
3345 if (ar->max_num_vdevs >= 64)
3346 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL;
3347 else
3348 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
3349
3350 INIT_LIST_HEAD(&ar->arvifs);
3351
3352 /* we don't care about HTT in UTF mode */
3353 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3354 status = ath10k_htt_setup(&ar->htt);
3355 if (status) {
3356 ath10k_err(ar, "failed to setup htt: %d\n", status);
3357 goto err_hif_stop;
3358 }
3359 }
3360
3361 status = ath10k_debug_start(ar);
3362 if (status)
3363 goto err_hif_stop;
3364
3365 status = ath10k_hif_set_target_log_mode(ar, fw_diag_log);
3366 if (status && status != -EOPNOTSUPP) {
3367 ath10k_warn(ar, "set target log mode failed: %d\n", status);
3368 goto err_hif_stop;
3369 }
3370
3371 status = ath10k_leds_start(ar);
3372 if (status)
3373 goto err_hif_stop;
3374
3375 return 0;
3376
3377 err_hif_stop:
3378 ath10k_hif_stop(ar);
3379 err_htt_rx_detach:
3380 ath10k_htt_rx_free(&ar->htt);
3381 err_htt_tx_detach:
3382 ath10k_htt_tx_free(&ar->htt);
3383 err_wmi_detach:
3384 ath10k_wmi_detach(ar);
3385 err:
3386 return status;
3387 }
3388 EXPORT_SYMBOL(ath10k_core_start);
3389
ath10k_wait_for_suspend(struct ath10k * ar,u32 suspend_opt)3390 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
3391 {
3392 int ret;
3393 unsigned long time_left;
3394
3395 reinit_completion(&ar->target_suspend);
3396
3397 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
3398 if (ret) {
3399 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
3400 return ret;
3401 }
3402
3403 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
3404
3405 if (!time_left) {
3406 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
3407 return -ETIMEDOUT;
3408 }
3409
3410 return 0;
3411 }
3412
ath10k_core_stop(struct ath10k * ar)3413 void ath10k_core_stop(struct ath10k *ar)
3414 {
3415 lockdep_assert_held(&ar->conf_mutex);
3416 ath10k_debug_stop(ar);
3417
3418 /* try to suspend target */
3419 if (ar->state != ATH10K_STATE_RESTARTING &&
3420 ar->state != ATH10K_STATE_UTF)
3421 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
3422
3423 ath10k_hif_stop(ar);
3424 ath10k_htt_tx_stop(&ar->htt);
3425 ath10k_htt_rx_free(&ar->htt);
3426 ath10k_wmi_detach(ar);
3427
3428 ar->id.bmi_ids_valid = false;
3429 }
3430 EXPORT_SYMBOL(ath10k_core_stop);
3431
3432 /* mac80211 manages fw/hw initialization through start/stop hooks. However in
3433 * order to know what hw capabilities should be advertised to mac80211 it is
3434 * necessary to load the firmware (and tear it down immediately since start
3435 * hook will try to init it again) before registering
3436 */
ath10k_core_probe_fw(struct ath10k * ar)3437 static int ath10k_core_probe_fw(struct ath10k *ar)
3438 {
3439 struct bmi_target_info target_info = {};
3440 int ret = 0;
3441
3442 ret = ath10k_hif_power_up(ar, ATH10K_FIRMWARE_MODE_NORMAL);
3443 if (ret) {
3444 ath10k_err(ar, "could not power on hif bus (%d)\n", ret);
3445 return ret;
3446 }
3447
3448 switch (ar->hif.bus) {
3449 case ATH10K_BUS_SDIO:
3450 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info);
3451 if (ret) {
3452 ath10k_err(ar, "could not get target info (%d)\n", ret);
3453 goto err_power_down;
3454 }
3455 ar->target_version = target_info.version;
3456 ar->hw->wiphy->hw_version = target_info.version;
3457 break;
3458 case ATH10K_BUS_PCI:
3459 case ATH10K_BUS_AHB:
3460 case ATH10K_BUS_USB:
3461 ret = ath10k_bmi_get_target_info(ar, &target_info);
3462 if (ret) {
3463 ath10k_err(ar, "could not get target info (%d)\n", ret);
3464 goto err_power_down;
3465 }
3466 ar->target_version = target_info.version;
3467 ar->hw->wiphy->hw_version = target_info.version;
3468 break;
3469 case ATH10K_BUS_SNOC:
3470 ret = ath10k_hif_get_target_info(ar, &target_info);
3471 if (ret) {
3472 ath10k_err(ar, "could not get target info (%d)\n", ret);
3473 goto err_power_down;
3474 }
3475 ar->target_version = target_info.version;
3476 ar->hw->wiphy->hw_version = target_info.version;
3477 break;
3478 default:
3479 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus);
3480 }
3481
3482 ret = ath10k_init_hw_params(ar);
3483 if (ret) {
3484 ath10k_err(ar, "could not get hw params (%d)\n", ret);
3485 goto err_power_down;
3486 }
3487
3488 ret = ath10k_core_fetch_firmware_files(ar);
3489 if (ret) {
3490 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
3491 goto err_power_down;
3492 }
3493
3494 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) !=
3495 sizeof(ar->normal_mode_fw.fw_file.fw_version));
3496 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version,
3497 sizeof(ar->hw->wiphy->fw_version));
3498
3499 ath10k_debug_print_hwfw_info(ar);
3500
3501 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3502 ar->normal_mode_fw.fw_file.fw_features)) {
3503 ret = ath10k_core_pre_cal_download(ar);
3504 if (ret) {
3505 /* pre calibration data download is not necessary
3506 * for all the chipsets. Ignore failures and continue.
3507 */
3508 ath10k_dbg(ar, ATH10K_DBG_BOOT,
3509 "could not load pre cal data: %d\n", ret);
3510 }
3511
3512 ret = ath10k_core_get_board_id_from_otp(ar);
3513 if (ret && ret != -EOPNOTSUPP) {
3514 ath10k_err(ar, "failed to get board id from otp: %d\n",
3515 ret);
3516 goto err_free_firmware_files;
3517 }
3518
3519 ret = ath10k_core_check_smbios(ar);
3520 if (ret)
3521 ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n");
3522
3523 ret = ath10k_core_check_dt(ar);
3524 if (ret)
3525 ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n");
3526
3527 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD);
3528 if (ret) {
3529 ath10k_err(ar, "failed to fetch board file: %d\n", ret);
3530 goto err_free_firmware_files;
3531 }
3532
3533 ath10k_debug_print_board_info(ar);
3534 }
3535
3536 device_get_mac_address(ar->dev, ar->mac_addr);
3537
3538 ret = ath10k_core_init_firmware_features(ar);
3539 if (ret) {
3540 ath10k_err(ar, "fatal problem with firmware features: %d\n",
3541 ret);
3542 goto err_free_firmware_files;
3543 }
3544
3545 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3546 ar->normal_mode_fw.fw_file.fw_features)) {
3547 ret = ath10k_swap_code_seg_init(ar,
3548 &ar->normal_mode_fw.fw_file);
3549 if (ret) {
3550 ath10k_err(ar, "failed to initialize code swap segment: %d\n",
3551 ret);
3552 goto err_free_firmware_files;
3553 }
3554 }
3555
3556 mutex_lock(&ar->conf_mutex);
3557
3558 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL,
3559 &ar->normal_mode_fw);
3560 if (ret) {
3561 ath10k_err(ar, "could not init core (%d)\n", ret);
3562 goto err_unlock;
3563 }
3564
3565 ath10k_debug_print_boot_info(ar);
3566 ath10k_core_stop(ar);
3567
3568 mutex_unlock(&ar->conf_mutex);
3569
3570 ath10k_hif_power_down(ar);
3571 return 0;
3572
3573 err_unlock:
3574 mutex_unlock(&ar->conf_mutex);
3575
3576 err_free_firmware_files:
3577 ath10k_core_free_firmware_files(ar);
3578
3579 err_power_down:
3580 ath10k_hif_power_down(ar);
3581
3582 return ret;
3583 }
3584
ath10k_core_register_work(struct work_struct * work)3585 static void ath10k_core_register_work(struct work_struct *work)
3586 {
3587 struct ath10k *ar = container_of(work, struct ath10k, register_work);
3588 int status;
3589
3590 /* peer stats are enabled by default */
3591 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags);
3592
3593 status = ath10k_core_probe_fw(ar);
3594 if (status) {
3595 ath10k_err(ar, "could not probe fw (%d)\n", status);
3596 goto err;
3597 }
3598
3599 status = ath10k_mac_register(ar);
3600 if (status) {
3601 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
3602 goto err_release_fw;
3603 }
3604
3605 status = ath10k_coredump_register(ar);
3606 if (status) {
3607 ath10k_err(ar, "unable to register coredump\n");
3608 goto err_unregister_mac;
3609 }
3610
3611 status = ath10k_debug_register(ar);
3612 if (status) {
3613 ath10k_err(ar, "unable to initialize debugfs\n");
3614 goto err_unregister_coredump;
3615 }
3616
3617 status = ath10k_spectral_create(ar);
3618 if (status) {
3619 ath10k_err(ar, "failed to initialize spectral\n");
3620 goto err_debug_destroy;
3621 }
3622
3623 status = ath10k_thermal_register(ar);
3624 if (status) {
3625 ath10k_err(ar, "could not register thermal device: %d\n",
3626 status);
3627 goto err_spectral_destroy;
3628 }
3629 #if defined(CONFIG_FWLOG)
3630 ath10k_fwlog_register(ar);
3631 #endif
3632
3633 status = ath10k_leds_register(ar);
3634 if (status) {
3635 ath10k_err(ar, "could not register leds: %d\n",
3636 status);
3637 goto err_thermal_unregister;
3638 }
3639
3640 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
3641 return;
3642
3643 err_thermal_unregister:
3644 ath10k_thermal_unregister(ar);
3645 err_spectral_destroy:
3646 ath10k_spectral_destroy(ar);
3647 err_debug_destroy:
3648 ath10k_debug_destroy(ar);
3649 err_unregister_coredump:
3650 ath10k_coredump_unregister(ar);
3651 err_unregister_mac:
3652 ath10k_mac_unregister(ar);
3653 err_release_fw:
3654 ath10k_core_free_firmware_files(ar);
3655 err:
3656 /* TODO: It's probably a good idea to release device from the driver
3657 * but calling device_release_driver() here will cause a deadlock.
3658 */
3659 return;
3660 }
3661
ath10k_core_register(struct ath10k * ar,const struct ath10k_bus_params * bus_params)3662 int ath10k_core_register(struct ath10k *ar,
3663 const struct ath10k_bus_params *bus_params)
3664 {
3665 ar->bus_param = *bus_params;
3666
3667 queue_work(ar->workqueue, &ar->register_work);
3668
3669 return 0;
3670 }
3671 EXPORT_SYMBOL(ath10k_core_register);
3672
ath10k_core_unregister(struct ath10k * ar)3673 void ath10k_core_unregister(struct ath10k *ar)
3674 {
3675 cancel_work_sync(&ar->register_work);
3676
3677 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
3678 return;
3679
3680 ath10k_leds_unregister(ar);
3681
3682 ath10k_thermal_unregister(ar);
3683 /* Stop spectral before unregistering from mac80211 to remove the
3684 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
3685 * would be already be free'd recursively, leading to a double free.
3686 */
3687 ath10k_spectral_destroy(ar);
3688
3689 /* We must unregister from mac80211 before we stop HTC and HIF.
3690 * Otherwise we will fail to submit commands to FW and mac80211 will be
3691 * unhappy about callback failures.
3692 */
3693 ath10k_mac_unregister(ar);
3694
3695 ath10k_testmode_destroy(ar);
3696
3697 ath10k_core_free_firmware_files(ar);
3698 ath10k_core_free_board_files(ar);
3699
3700 ath10k_debug_unregister(ar);
3701 #if defined(CONFIG_FWLOG)
3702 ath10k_fwlog_unregister(ar);
3703 #endif
3704 }
3705 EXPORT_SYMBOL(ath10k_core_unregister);
3706
ath10k_core_create(size_t priv_size,struct device * dev,enum ath10k_bus bus,enum ath10k_hw_rev hw_rev,const struct ath10k_hif_ops * hif_ops)3707 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
3708 enum ath10k_bus bus,
3709 enum ath10k_hw_rev hw_rev,
3710 const struct ath10k_hif_ops *hif_ops)
3711 {
3712 struct ath10k *ar;
3713 int ret;
3714
3715 ar = ath10k_mac_create(priv_size);
3716 if (!ar)
3717 return NULL;
3718
3719 ar->ath_common.priv = ar;
3720 ar->ath_common.hw = ar->hw;
3721 ar->dev = dev;
3722 ar->hw_rev = hw_rev;
3723 ar->hif.ops = hif_ops;
3724 ar->hif.bus = bus;
3725
3726 switch (hw_rev) {
3727 case ATH10K_HW_QCA988X:
3728 case ATH10K_HW_QCA9887:
3729 ar->regs = &qca988x_regs;
3730 ar->hw_ce_regs = &qcax_ce_regs;
3731 ar->hw_values = &qca988x_values;
3732 break;
3733 case ATH10K_HW_QCA6174:
3734 case ATH10K_HW_QCA9377:
3735 ar->regs = &qca6174_regs;
3736 ar->hw_ce_regs = &qcax_ce_regs;
3737 ar->hw_values = &qca6174_values;
3738 break;
3739 case ATH10K_HW_QCA99X0:
3740 case ATH10K_HW_QCA9984:
3741 ar->regs = &qca99x0_regs;
3742 ar->hw_ce_regs = &qcax_ce_regs;
3743 ar->hw_values = &qca99x0_values;
3744 break;
3745 case ATH10K_HW_QCA9888:
3746 ar->regs = &qca99x0_regs;
3747 ar->hw_ce_regs = &qcax_ce_regs;
3748 ar->hw_values = &qca9888_values;
3749 break;
3750 case ATH10K_HW_QCA4019:
3751 ar->regs = &qca4019_regs;
3752 ar->hw_ce_regs = &qcax_ce_regs;
3753 ar->hw_values = &qca4019_values;
3754 break;
3755 case ATH10K_HW_WCN3990:
3756 ar->regs = &wcn3990_regs;
3757 ar->hw_ce_regs = &wcn3990_ce_regs;
3758 ar->hw_values = &wcn3990_values;
3759 break;
3760 default:
3761 ath10k_err(ar, "unsupported core hardware revision %d\n",
3762 hw_rev);
3763 ret = -EOPNOTSUPP;
3764 goto err_free_mac;
3765 }
3766
3767 init_completion(&ar->scan.started);
3768 init_completion(&ar->scan.completed);
3769 init_completion(&ar->scan.on_channel);
3770 init_completion(&ar->target_suspend);
3771 init_completion(&ar->driver_recovery);
3772 init_completion(&ar->wow.wakeup_completed);
3773
3774 init_completion(&ar->install_key_done);
3775 init_completion(&ar->vdev_setup_done);
3776 init_completion(&ar->vdev_delete_done);
3777 init_completion(&ar->thermal.wmi_sync);
3778 init_completion(&ar->bss_survey_done);
3779 init_completion(&ar->peer_delete_done);
3780 init_completion(&ar->peer_stats_info_complete);
3781
3782 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
3783
3784 ar->workqueue = create_singlethread_workqueue("ath10k_wq");
3785 if (!ar->workqueue)
3786 goto err_free_mac;
3787
3788 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
3789 if (!ar->workqueue_aux)
3790 goto err_free_wq;
3791
3792 ar->workqueue_tx_complete =
3793 create_singlethread_workqueue("ath10k_tx_complete_wq");
3794 if (!ar->workqueue_tx_complete)
3795 goto err_free_aux_wq;
3796
3797 mutex_init(&ar->conf_mutex);
3798 mutex_init(&ar->dump_mutex);
3799 spin_lock_init(&ar->data_lock);
3800
3801 for (int ac = 0; ac < IEEE80211_NUM_ACS; ac++)
3802 spin_lock_init(&ar->queue_lock[ac]);
3803
3804 INIT_LIST_HEAD(&ar->peers);
3805 init_waitqueue_head(&ar->peer_mapping_wq);
3806 init_waitqueue_head(&ar->htt.empty_tx_wq);
3807 init_waitqueue_head(&ar->wmi.tx_credits_wq);
3808
3809 skb_queue_head_init(&ar->htt.rx_indication_head);
3810
3811 init_completion(&ar->offchan_tx_completed);
3812 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
3813 skb_queue_head_init(&ar->offchan_tx_queue);
3814
3815 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
3816 skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
3817
3818 INIT_WORK(&ar->register_work, ath10k_core_register_work);
3819 INIT_WORK(&ar->restart_work, ath10k_core_restart);
3820 INIT_WORK(&ar->recovery_check_work, ath10k_core_recovery_check_work);
3821 INIT_WORK(&ar->set_coverage_class_work,
3822 ath10k_core_set_coverage_class_work);
3823
3824 ar->napi_dev = alloc_netdev_dummy(0);
3825 if (!ar->napi_dev)
3826 goto err_free_tx_complete;
3827
3828 ret = ath10k_coredump_create(ar);
3829 if (ret)
3830 goto err_free_netdev;
3831
3832 ret = ath10k_debug_create(ar);
3833 if (ret)
3834 goto err_free_coredump;
3835
3836 return ar;
3837
3838 err_free_coredump:
3839 ath10k_coredump_destroy(ar);
3840 err_free_netdev:
3841 free_netdev(ar->napi_dev);
3842 err_free_tx_complete:
3843 destroy_workqueue(ar->workqueue_tx_complete);
3844 err_free_aux_wq:
3845 destroy_workqueue(ar->workqueue_aux);
3846 err_free_wq:
3847 destroy_workqueue(ar->workqueue);
3848 err_free_mac:
3849 ath10k_mac_destroy(ar);
3850
3851 return NULL;
3852 }
3853 EXPORT_SYMBOL(ath10k_core_create);
3854
ath10k_core_destroy(struct ath10k * ar)3855 void ath10k_core_destroy(struct ath10k *ar)
3856 {
3857 destroy_workqueue(ar->workqueue);
3858
3859 destroy_workqueue(ar->workqueue_aux);
3860
3861 destroy_workqueue(ar->workqueue_tx_complete);
3862
3863 free_netdev(ar->napi_dev);
3864 ath10k_debug_destroy(ar);
3865 ath10k_coredump_destroy(ar);
3866 ath10k_htt_tx_destroy(&ar->htt);
3867 ath10k_wmi_free_host_mem(ar);
3868 ath10k_mac_destroy(ar);
3869 }
3870 EXPORT_SYMBOL(ath10k_core_destroy);
3871
3872 MODULE_AUTHOR("Qualcomm Atheros");
3873 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards.");
3874 MODULE_LICENSE("Dual BSD/GPL");
3875