1 /*
2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34 #define LINUXKPI_PARAM_PREFIX mlx4_
35
36 #include <linux/module.h>
37 #include <linux/slab.h>
38 #include <linux/errno.h>
39 #include <linux/etherdevice.h>
40 #include <linux/netdevice.h>
41 #include <linux/if_vlan.h>
42 #include <linux/fs.h>
43 #include <linux/rcupdate.h>
44 #include <linux/notifier.h>
45 #include <linux/delay.h>
46
47 #include <net/ipv6.h>
48
49 #include <rdma/ib_smi.h>
50 #include <rdma/ib_user_verbs.h>
51 #include <rdma/ib_addr.h>
52 #include <rdma/ib_cache.h>
53
54 #include <dev/mlx4/driver.h>
55 #include <dev/mlx4/cmd.h>
56 #include <dev/mlx4/qp.h>
57 #include <linux/sched.h>
58 #include <linux/page.h>
59 #include <linux/printk.h>
60 #include "mlx4_ib.h"
61 #include <rdma/mlx4-abi.h>
62 #include "wc.h"
63
64 #define DRV_NAME MLX4_IB_DRV_NAME
65 #ifndef DRV_VERSION
66 #define DRV_VERSION "3.7.1"
67 #endif
68 #define DRV_RELDATE "November 2021"
69
70 #define MLX4_IB_FLOW_MAX_PRIO 0xFFF
71 #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
72 #define MLX4_IB_CARD_REV_A0 0xA0
73
74 MODULE_AUTHOR("Roland Dreier");
75 MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
76 MODULE_LICENSE("Dual BSD/GPL");
77
78 int mlx4_ib_sm_guid_assign = 0;
79 module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
80 MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)");
81
82 static const char mlx4_ib_version[] =
83 DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
84 DRV_VERSION " (" DRV_RELDATE ")\n";
85
86 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
87
88 static struct workqueue_struct *wq;
89
init_query_mad(struct ib_smp * mad)90 static void init_query_mad(struct ib_smp *mad)
91 {
92 mad->base_version = 1;
93 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
94 mad->class_version = 1;
95 mad->method = IB_MGMT_METHOD_GET;
96 }
97
check_flow_steering_support(struct mlx4_dev * dev)98 static int check_flow_steering_support(struct mlx4_dev *dev)
99 {
100 int eth_num_ports = 0;
101 int ib_num_ports = 0;
102
103 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
104
105 if (dmfs) {
106 int i;
107 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
108 eth_num_ports++;
109 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
110 ib_num_ports++;
111 dmfs &= (!ib_num_ports ||
112 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
113 (!eth_num_ports ||
114 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
115 if (ib_num_ports && mlx4_is_mfunc(dev)) {
116 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
117 dmfs = 0;
118 }
119 }
120 return dmfs;
121 }
122
num_ib_ports(struct mlx4_dev * dev)123 static int num_ib_ports(struct mlx4_dev *dev)
124 {
125 int ib_ports = 0;
126 int i;
127
128 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
129 ib_ports++;
130
131 return ib_ports;
132 }
133
mlx4_ib_get_netdev(struct ib_device * device,u8 port_num)134 static if_t mlx4_ib_get_netdev(struct ib_device *device, u8 port_num)
135 {
136 struct mlx4_ib_dev *ibdev = to_mdev(device);
137 if_t dev;
138
139 rcu_read_lock();
140 dev = mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port_num);
141
142 #if 0
143 if (dev) {
144 if (mlx4_is_bonded(ibdev->dev)) {
145 if_t upper = NULL;
146
147 upper = netdev_master_upper_dev_get_rcu(dev);
148 if (upper) {
149 if_t active;
150
151 active = bond_option_active_slave_get_rcu(mlx4_netdev_priv(upper));
152 if (active)
153 dev = active;
154 }
155 }
156 }
157 #endif
158 if (dev)
159 if_ref(dev);
160
161 rcu_read_unlock();
162 return dev;
163 }
164
mlx4_ib_update_gids_v1(struct gid_entry * gids,struct mlx4_ib_dev * ibdev,u8 port_num)165 static int mlx4_ib_update_gids_v1(struct gid_entry *gids,
166 struct mlx4_ib_dev *ibdev,
167 u8 port_num)
168 {
169 struct mlx4_cmd_mailbox *mailbox;
170 int err;
171 struct mlx4_dev *dev = ibdev->dev;
172 int i;
173 union ib_gid *gid_tbl;
174
175 mailbox = mlx4_alloc_cmd_mailbox(dev);
176 if (IS_ERR(mailbox))
177 return -ENOMEM;
178
179 gid_tbl = mailbox->buf;
180
181 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i)
182 memcpy(&gid_tbl[i], &gids[i].gid, sizeof(union ib_gid));
183
184 err = mlx4_cmd(dev, mailbox->dma,
185 MLX4_SET_PORT_GID_TABLE << 8 | port_num,
186 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
187 MLX4_CMD_WRAPPED);
188 if (mlx4_is_bonded(dev))
189 err += mlx4_cmd(dev, mailbox->dma,
190 MLX4_SET_PORT_GID_TABLE << 8 | 2,
191 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
192 MLX4_CMD_WRAPPED);
193
194 mlx4_free_cmd_mailbox(dev, mailbox);
195 return err;
196 }
197
mlx4_ib_update_gids_v1_v2(struct gid_entry * gids,struct mlx4_ib_dev * ibdev,u8 port_num)198 static int mlx4_ib_update_gids_v1_v2(struct gid_entry *gids,
199 struct mlx4_ib_dev *ibdev,
200 u8 port_num)
201 {
202 struct mlx4_cmd_mailbox *mailbox;
203 int err;
204 struct mlx4_dev *dev = ibdev->dev;
205 int i;
206 struct {
207 union ib_gid gid;
208 __be32 rsrvd1[2];
209 __be16 rsrvd2;
210 u8 type;
211 u8 version;
212 __be32 rsrvd3;
213 } *gid_tbl;
214
215 mailbox = mlx4_alloc_cmd_mailbox(dev);
216 if (IS_ERR(mailbox))
217 return -ENOMEM;
218
219 gid_tbl = mailbox->buf;
220 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) {
221 memcpy(&gid_tbl[i].gid, &gids[i].gid, sizeof(union ib_gid));
222 if (gids[i].gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) {
223 gid_tbl[i].version = 2;
224 if (!ipv6_addr_v4mapped((struct in6_addr *)&gids[i].gid))
225 gid_tbl[i].type = 1;
226 else
227 memset(&gid_tbl[i].gid, 0, 12);
228 }
229 }
230
231 err = mlx4_cmd(dev, mailbox->dma,
232 MLX4_SET_PORT_ROCE_ADDR << 8 | port_num,
233 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
234 MLX4_CMD_WRAPPED);
235 if (mlx4_is_bonded(dev))
236 err += mlx4_cmd(dev, mailbox->dma,
237 MLX4_SET_PORT_ROCE_ADDR << 8 | 2,
238 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
239 MLX4_CMD_WRAPPED);
240
241 mlx4_free_cmd_mailbox(dev, mailbox);
242 return err;
243 }
244
mlx4_ib_update_gids(struct gid_entry * gids,struct mlx4_ib_dev * ibdev,u8 port_num)245 static int mlx4_ib_update_gids(struct gid_entry *gids,
246 struct mlx4_ib_dev *ibdev,
247 u8 port_num)
248 {
249 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2)
250 return mlx4_ib_update_gids_v1_v2(gids, ibdev, port_num);
251
252 return mlx4_ib_update_gids_v1(gids, ibdev, port_num);
253 }
254
mlx4_ib_add_gid(const struct ib_gid_attr * attr,void ** context)255 static int mlx4_ib_add_gid(const struct ib_gid_attr *attr, void **context)
256 {
257 struct mlx4_ib_dev *ibdev = to_mdev(attr->device);
258 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
259 struct mlx4_port_gid_table *port_gid_table;
260 int free = -1, found = -1;
261 int ret = 0;
262 int hw_update = 0;
263 int i;
264 struct gid_entry *gids = NULL;
265
266 if (!rdma_cap_roce_gid_table(attr->device, attr->port_num))
267 return -EINVAL;
268
269 if (attr->port_num > MLX4_MAX_PORTS)
270 return -EINVAL;
271
272 if (!context)
273 return -EINVAL;
274
275 port_gid_table = &iboe->gids[attr->port_num - 1];
276 spin_lock_bh(&iboe->lock);
277 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) {
278 if (!memcmp(&port_gid_table->gids[i].gid,
279 &attr->gid, sizeof(attr->gid)) &&
280 (port_gid_table->gids[i].gid_type == attr->gid_type)) {
281 found = i;
282 break;
283 }
284 if (free < 0 && rdma_is_zero_gid(&port_gid_table->gids[i].gid))
285 free = i; /* HW has space */
286 }
287
288 if (found < 0) {
289 if (free < 0) {
290 ret = -ENOSPC;
291 } else {
292 port_gid_table->gids[free].ctx = kmalloc(sizeof(*port_gid_table->gids[free].ctx), GFP_ATOMIC);
293 if (!port_gid_table->gids[free].ctx) {
294 ret = -ENOMEM;
295 } else {
296 *context = port_gid_table->gids[free].ctx;
297 memcpy(&port_gid_table->gids[free].gid,
298 &attr->gid, sizeof(attr->gid));
299 port_gid_table->gids[free].gid_type = attr->gid_type;
300 port_gid_table->gids[free].ctx->real_index = free;
301 port_gid_table->gids[free].ctx->refcount = 1;
302 hw_update = 1;
303 }
304 }
305 } else {
306 struct gid_cache_context *ctx = port_gid_table->gids[found].ctx;
307 *context = ctx;
308 ctx->refcount++;
309 }
310 if (!ret && hw_update) {
311 gids = kmalloc_array(MLX4_MAX_PORT_GIDS, sizeof(*gids),
312 GFP_ATOMIC);
313 if (!gids) {
314 ret = -ENOMEM;
315 } else {
316 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) {
317 memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid));
318 gids[i].gid_type = port_gid_table->gids[i].gid_type;
319 }
320 }
321 }
322 spin_unlock_bh(&iboe->lock);
323
324 if (!ret && hw_update) {
325 ret = mlx4_ib_update_gids(gids, ibdev, attr->port_num);
326 kfree(gids);
327 }
328
329 return ret;
330 }
331
mlx4_ib_del_gid(const struct ib_gid_attr * attr,void ** context)332 static int mlx4_ib_del_gid(const struct ib_gid_attr *attr, void **context)
333 {
334 struct gid_cache_context *ctx = *context;
335 struct mlx4_ib_dev *ibdev = to_mdev(attr->device);
336 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
337 struct mlx4_port_gid_table *port_gid_table;
338 int ret = 0;
339 int hw_update = 0;
340 struct gid_entry *gids = NULL;
341
342 if (!rdma_cap_roce_gid_table(attr->device, attr->port_num))
343 return -EINVAL;
344
345 if (attr->port_num > MLX4_MAX_PORTS)
346 return -EINVAL;
347
348 port_gid_table = &iboe->gids[attr->port_num - 1];
349 spin_lock_bh(&iboe->lock);
350 if (ctx) {
351 ctx->refcount--;
352 if (!ctx->refcount) {
353 unsigned int real_index = ctx->real_index;
354
355 memset(&port_gid_table->gids[real_index].gid, 0,
356 sizeof(port_gid_table->gids[real_index].gid));
357 kfree(port_gid_table->gids[real_index].ctx);
358 port_gid_table->gids[real_index].ctx = NULL;
359 hw_update = 1;
360 }
361 }
362 if (!ret && hw_update) {
363 int i;
364
365 gids = kmalloc_array(MLX4_MAX_PORT_GIDS, sizeof(*gids),
366 GFP_ATOMIC);
367 if (!gids) {
368 ret = -ENOMEM;
369 } else {
370 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) {
371 memcpy(&gids[i].gid,
372 &port_gid_table->gids[i].gid,
373 sizeof(union ib_gid));
374 gids[i].gid_type =
375 port_gid_table->gids[i].gid_type;
376 }
377 }
378 }
379 spin_unlock_bh(&iboe->lock);
380
381 if (!ret && hw_update) {
382 ret = mlx4_ib_update_gids(gids, ibdev, attr->port_num);
383 kfree(gids);
384 }
385 return ret;
386 }
387
mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev * ibdev,const struct ib_gid_attr * attr)388 int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev,
389 const struct ib_gid_attr *attr)
390 {
391 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
392 struct gid_cache_context *ctx = NULL;
393 struct mlx4_port_gid_table *port_gid_table;
394 int real_index = -EINVAL;
395 int i;
396 unsigned long flags;
397 u8 port_num = attr->port_num;
398
399 if (port_num > MLX4_MAX_PORTS)
400 return -EINVAL;
401
402 if (mlx4_is_bonded(ibdev->dev))
403 port_num = 1;
404
405 if (!rdma_cap_roce_gid_table(&ibdev->ib_dev, port_num))
406 return attr->index;
407
408 spin_lock_irqsave(&iboe->lock, flags);
409 port_gid_table = &iboe->gids[port_num - 1];
410
411 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i)
412 if (!memcmp(&port_gid_table->gids[i].gid,
413 &attr->gid, sizeof(attr->gid)) &&
414 attr->gid_type == port_gid_table->gids[i].gid_type) {
415 ctx = port_gid_table->gids[i].ctx;
416 break;
417 }
418 if (ctx)
419 real_index = ctx->real_index;
420 spin_unlock_irqrestore(&iboe->lock, flags);
421 return real_index;
422 }
423
mlx4_ib_query_device(struct ib_device * ibdev,struct ib_device_attr * props,struct ib_udata * uhw)424 static int mlx4_ib_query_device(struct ib_device *ibdev,
425 struct ib_device_attr *props,
426 struct ib_udata *uhw)
427 {
428 struct mlx4_ib_dev *dev = to_mdev(ibdev);
429 struct ib_smp *in_mad = NULL;
430 struct ib_smp *out_mad = NULL;
431 int err = -ENOMEM;
432 int have_ib_ports;
433 struct mlx4_uverbs_ex_query_device cmd;
434 struct mlx4_uverbs_ex_query_device_resp resp = {.comp_mask = 0};
435 struct mlx4_clock_params clock_params;
436
437 if (uhw->inlen) {
438 if (uhw->inlen < sizeof(cmd))
439 return -EINVAL;
440
441 err = ib_copy_from_udata(&cmd, uhw, sizeof(cmd));
442 if (err)
443 return err;
444
445 if (cmd.comp_mask)
446 return -EINVAL;
447
448 if (cmd.reserved)
449 return -EINVAL;
450 }
451
452 resp.response_length = offsetof(typeof(resp), response_length) +
453 sizeof(resp.response_length);
454 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
455 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
456 if (!in_mad || !out_mad)
457 goto out;
458
459 init_query_mad(in_mad);
460 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
461
462 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
463 1, NULL, NULL, in_mad, out_mad);
464 if (err)
465 goto out;
466
467 memset(props, 0, sizeof *props);
468
469 have_ib_ports = num_ib_ports(dev->dev);
470
471 props->fw_ver = dev->dev->caps.fw_ver;
472 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
473 IB_DEVICE_PORT_ACTIVE_EVENT |
474 IB_DEVICE_SYS_IMAGE_GUID |
475 IB_DEVICE_RC_RNR_NAK_GEN |
476 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
477 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
478 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
479 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
480 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
481 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports)
482 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
483 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
484 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
485 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
486 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
487 if (dev->dev->caps.max_gso_sz &&
488 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) &&
489 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH))
490 props->device_cap_flags |= IB_DEVICE_UD_TSO;
491 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
492 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
493 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
494 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
495 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
496 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
497 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
498 props->device_cap_flags |= IB_DEVICE_XRC;
499 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
500 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
501 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
502 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
503 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
504 else
505 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
506 }
507 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
508 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
509
510 props->device_cap_flags |= IB_DEVICE_RAW_IP_CSUM;
511
512 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
513 0xffffff;
514 props->vendor_part_id = dev->dev->persist->pdev->device;
515 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
516 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
517
518 props->max_mr_size = ~0ull;
519 props->page_size_cap = dev->dev->caps.page_size_cap;
520 props->max_qp = dev->dev->quotas.qp;
521 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
522 props->max_sge = min(dev->dev->caps.max_sq_sg,
523 dev->dev->caps.max_rq_sg);
524 props->max_sge_rd = MLX4_MAX_SGE_RD;
525 props->max_cq = dev->dev->quotas.cq;
526 props->max_cqe = dev->dev->caps.max_cqes;
527 props->max_mr = dev->dev->quotas.mpt;
528 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
529 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
530 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
531 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
532 props->max_srq = dev->dev->quotas.srq;
533 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
534 props->max_srq_sge = dev->dev->caps.max_srq_sge;
535 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
536 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
537 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
538 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
539 props->masked_atomic_cap = props->atomic_cap;
540 props->max_pkeys = dev->dev->caps.pkey_table_len[1];
541 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
542 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
543 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
544 props->max_mcast_grp;
545 props->max_map_per_fmr = dev->dev->caps.max_fmr_maps;
546 props->hca_core_clock = dev->dev->caps.hca_core_clock * 1000UL;
547 props->timestamp_mask = 0xFFFFFFFFFFFFULL;
548
549 if (uhw->outlen >= resp.response_length + sizeof(resp.hca_core_clock_offset)) {
550 resp.response_length += sizeof(resp.hca_core_clock_offset);
551 if (!mlx4_get_internal_clock_params(dev->dev, &clock_params)) {
552 resp.comp_mask |= QUERY_DEVICE_RESP_MASK_TIMESTAMP;
553 resp.hca_core_clock_offset = clock_params.offset % PAGE_SIZE;
554 }
555 }
556
557 if (uhw->outlen) {
558 err = ib_copy_to_udata(uhw, &resp, resp.response_length);
559 if (err)
560 goto out;
561 }
562 out:
563 kfree(in_mad);
564 kfree(out_mad);
565
566 return err;
567 }
568
569 static enum rdma_link_layer
mlx4_ib_port_link_layer(struct ib_device * device,u8 port_num)570 mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
571 {
572 struct mlx4_dev *dev = to_mdev(device)->dev;
573
574 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
575 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
576 }
577
ib_link_query_port(struct ib_device * ibdev,u8 port,struct ib_port_attr * props,int netw_view)578 static int ib_link_query_port(struct ib_device *ibdev, u8 port,
579 struct ib_port_attr *props, int netw_view)
580 {
581 struct ib_smp *in_mad = NULL;
582 struct ib_smp *out_mad = NULL;
583 int ext_active_speed;
584 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
585 int err = -ENOMEM;
586
587 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
588 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
589 if (!in_mad || !out_mad)
590 goto out;
591
592 init_query_mad(in_mad);
593 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
594 in_mad->attr_mod = cpu_to_be32(port);
595
596 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
597 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
598
599 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
600 in_mad, out_mad);
601 if (err)
602 goto out;
603
604
605 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
606 props->lmc = out_mad->data[34] & 0x7;
607 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
608 props->sm_sl = out_mad->data[36] & 0xf;
609 props->state = out_mad->data[32] & 0xf;
610 props->phys_state = out_mad->data[33] >> 4;
611 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
612 if (netw_view)
613 props->gid_tbl_len = out_mad->data[50];
614 else
615 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
616 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
617 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
618 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
619 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
620 props->active_width = out_mad->data[31] & 0xf;
621 props->active_speed = out_mad->data[35] >> 4;
622 props->max_mtu = out_mad->data[41] & 0xf;
623 props->active_mtu = out_mad->data[36] >> 4;
624 props->subnet_timeout = out_mad->data[51] & 0x1f;
625 props->max_vl_num = out_mad->data[37] >> 4;
626 props->init_type_reply = out_mad->data[41] >> 4;
627
628 /* Check if extended speeds (EDR/FDR/...) are supported */
629 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
630 ext_active_speed = out_mad->data[62] >> 4;
631
632 switch (ext_active_speed) {
633 case 1:
634 props->active_speed = IB_SPEED_FDR;
635 break;
636 case 2:
637 props->active_speed = IB_SPEED_EDR;
638 break;
639 }
640 }
641
642 /* If reported active speed is QDR, check if is FDR-10 */
643 if (props->active_speed == IB_SPEED_QDR) {
644 init_query_mad(in_mad);
645 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
646 in_mad->attr_mod = cpu_to_be32(port);
647
648 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
649 NULL, NULL, in_mad, out_mad);
650 if (err)
651 goto out;
652
653 /* Checking LinkSpeedActive for FDR-10 */
654 if (out_mad->data[15] & 0x1)
655 props->active_speed = IB_SPEED_FDR10;
656 }
657
658 /* Avoid wrong speed value returned by FW if the IB link is down. */
659 if (props->state == IB_PORT_DOWN)
660 props->active_speed = IB_SPEED_SDR;
661
662 out:
663 kfree(in_mad);
664 kfree(out_mad);
665 return err;
666 }
667
state_to_phys_state(enum ib_port_state state)668 static u8 state_to_phys_state(enum ib_port_state state)
669 {
670 return state == IB_PORT_ACTIVE ?
671 IB_PORT_PHYS_STATE_LINK_UP : IB_PORT_PHYS_STATE_DISABLED;
672 }
673
eth_link_query_port(struct ib_device * ibdev,u8 port,struct ib_port_attr * props,int netw_view)674 static int eth_link_query_port(struct ib_device *ibdev, u8 port,
675 struct ib_port_attr *props, int netw_view)
676 {
677
678 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
679 struct mlx4_ib_iboe *iboe = &mdev->iboe;
680 if_t ndev;
681 enum ib_mtu tmp;
682 struct mlx4_cmd_mailbox *mailbox;
683 int err = 0;
684 int is_bonded = mlx4_is_bonded(mdev->dev);
685
686 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
687 if (IS_ERR(mailbox))
688 return PTR_ERR(mailbox);
689
690 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
691 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
692 MLX4_CMD_WRAPPED);
693 if (err)
694 goto out;
695
696 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ?
697 IB_WIDTH_4X : IB_WIDTH_1X;
698 props->active_speed = IB_SPEED_QDR;
699 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS;
700 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
701 props->max_msg_sz = mdev->dev->caps.max_msg_sz;
702 props->pkey_tbl_len = 1;
703 props->max_mtu = IB_MTU_4096;
704 props->max_vl_num = 2;
705 props->state = IB_PORT_DOWN;
706 props->phys_state = state_to_phys_state(props->state);
707 props->active_mtu = IB_MTU_256;
708 spin_lock_bh(&iboe->lock);
709 ndev = iboe->netdevs[port - 1];
710 if (ndev && is_bonded) {
711 #if 0
712 rcu_read_lock(); /* required to get upper dev */
713 ndev = netdev_master_upper_dev_get_rcu(ndev);
714 rcu_read_unlock();
715 #endif
716 }
717 if (!ndev)
718 goto out_unlock;
719
720 tmp = iboe_get_mtu(if_getmtu(ndev));
721 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
722
723 props->state = ((if_getdrvflags(ndev) & IFF_DRV_RUNNING) != 0 &&
724 if_getlinkstate(ndev) == LINK_STATE_UP) ?
725 IB_PORT_ACTIVE : IB_PORT_DOWN;
726 props->phys_state = state_to_phys_state(props->state);
727 out_unlock:
728 spin_unlock_bh(&iboe->lock);
729 out:
730 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
731 return err;
732 }
733
__mlx4_ib_query_port(struct ib_device * ibdev,u8 port,struct ib_port_attr * props,int netw_view)734 int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
735 struct ib_port_attr *props, int netw_view)
736 {
737 int err;
738
739 memset(props, 0, sizeof *props);
740
741 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
742 ib_link_query_port(ibdev, port, props, netw_view) :
743 eth_link_query_port(ibdev, port, props, netw_view);
744
745 return err;
746 }
747
mlx4_ib_query_port(struct ib_device * ibdev,u8 port,struct ib_port_attr * props)748 static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
749 struct ib_port_attr *props)
750 {
751 /* returns host view */
752 return __mlx4_ib_query_port(ibdev, port, props, 0);
753 }
754
__mlx4_ib_query_gid(struct ib_device * ibdev,u8 port,int index,union ib_gid * gid,int netw_view)755 int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
756 union ib_gid *gid, int netw_view)
757 {
758 struct ib_smp *in_mad = NULL;
759 struct ib_smp *out_mad = NULL;
760 int err = -ENOMEM;
761 struct mlx4_ib_dev *dev = to_mdev(ibdev);
762 int clear = 0;
763 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
764
765 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
766 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
767 if (!in_mad || !out_mad)
768 goto out;
769
770 init_query_mad(in_mad);
771 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
772 in_mad->attr_mod = cpu_to_be32(port);
773
774 if (mlx4_is_mfunc(dev->dev) && netw_view)
775 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
776
777 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
778 if (err)
779 goto out;
780
781 memcpy(gid->raw, out_mad->data + 8, 8);
782
783 if (mlx4_is_mfunc(dev->dev) && !netw_view) {
784 if (index) {
785 /* For any index > 0, return the null guid */
786 err = 0;
787 clear = 1;
788 goto out;
789 }
790 }
791
792 init_query_mad(in_mad);
793 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
794 in_mad->attr_mod = cpu_to_be32(index / 8);
795
796 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
797 NULL, NULL, in_mad, out_mad);
798 if (err)
799 goto out;
800
801 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
802
803 out:
804 if (clear)
805 memset(gid->raw + 8, 0, 8);
806 kfree(in_mad);
807 kfree(out_mad);
808 return err;
809 }
810
mlx4_ib_query_gid(struct ib_device * ibdev,u8 port,int index,union ib_gid * gid)811 static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
812 union ib_gid *gid)
813 {
814 if (rdma_protocol_ib(ibdev, port))
815 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
816
817 return 0;
818 }
819
mlx4_ib_query_sl2vl(struct ib_device * ibdev,u8 port,u64 * sl2vl_tbl)820 static int mlx4_ib_query_sl2vl(struct ib_device *ibdev, u8 port, u64 *sl2vl_tbl)
821 {
822 union sl2vl_tbl_to_u64 sl2vl64;
823 struct ib_smp *in_mad = NULL;
824 struct ib_smp *out_mad = NULL;
825 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
826 int err = -ENOMEM;
827 int jj;
828
829 if (mlx4_is_slave(to_mdev(ibdev)->dev)) {
830 *sl2vl_tbl = 0;
831 return 0;
832 }
833
834 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
835 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
836 if (!in_mad || !out_mad)
837 goto out;
838
839 init_query_mad(in_mad);
840 in_mad->attr_id = IB_SMP_ATTR_SL_TO_VL_TABLE;
841 in_mad->attr_mod = 0;
842
843 if (mlx4_is_mfunc(to_mdev(ibdev)->dev))
844 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
845
846 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
847 in_mad, out_mad);
848 if (err)
849 goto out;
850
851 for (jj = 0; jj < 8; jj++)
852 sl2vl64.sl8[jj] = ((struct ib_smp *)out_mad)->data[jj];
853 *sl2vl_tbl = sl2vl64.sl64;
854
855 out:
856 kfree(in_mad);
857 kfree(out_mad);
858 return err;
859 }
860
mlx4_init_sl2vl_tbl(struct mlx4_ib_dev * mdev)861 static void mlx4_init_sl2vl_tbl(struct mlx4_ib_dev *mdev)
862 {
863 u64 sl2vl;
864 int i;
865 int err;
866
867 for (i = 1; i <= mdev->dev->caps.num_ports; i++) {
868 if (mdev->dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH)
869 continue;
870 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, i, &sl2vl);
871 if (err) {
872 pr_err("Unable to get default sl to vl mapping for port %d. Using all zeroes (%d)\n",
873 i, err);
874 sl2vl = 0;
875 }
876 atomic64_set(&mdev->sl2vl[i - 1], sl2vl);
877 }
878 }
879
__mlx4_ib_query_pkey(struct ib_device * ibdev,u8 port,u16 index,u16 * pkey,int netw_view)880 int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
881 u16 *pkey, int netw_view)
882 {
883 struct ib_smp *in_mad = NULL;
884 struct ib_smp *out_mad = NULL;
885 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
886 int err = -ENOMEM;
887
888 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
889 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
890 if (!in_mad || !out_mad)
891 goto out;
892
893 init_query_mad(in_mad);
894 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
895 in_mad->attr_mod = cpu_to_be32(index / 32);
896
897 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
898 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
899
900 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
901 in_mad, out_mad);
902 if (err)
903 goto out;
904
905 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
906
907 out:
908 kfree(in_mad);
909 kfree(out_mad);
910 return err;
911 }
912
mlx4_ib_query_pkey(struct ib_device * ibdev,u8 port,u16 index,u16 * pkey)913 static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
914 {
915 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
916 }
917
mlx4_ib_modify_device(struct ib_device * ibdev,int mask,struct ib_device_modify * props)918 static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
919 struct ib_device_modify *props)
920 {
921 struct mlx4_cmd_mailbox *mailbox;
922 unsigned long flags;
923
924 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
925 return -EOPNOTSUPP;
926
927 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
928 return 0;
929
930 if (mlx4_is_slave(to_mdev(ibdev)->dev))
931 return -EOPNOTSUPP;
932
933 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
934 memcpy(ibdev->node_desc, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
935 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
936
937 /*
938 * If possible, pass node desc to FW, so it can generate
939 * a 144 trap. If cmd fails, just ignore.
940 */
941 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
942 if (IS_ERR(mailbox))
943 return 0;
944
945 memcpy(mailbox->buf, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
946 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
947 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
948
949 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
950
951 return 0;
952 }
953
mlx4_ib_SET_PORT(struct mlx4_ib_dev * dev,u8 port,int reset_qkey_viols,u32 cap_mask)954 static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
955 u32 cap_mask)
956 {
957 struct mlx4_cmd_mailbox *mailbox;
958 int err;
959
960 mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
961 if (IS_ERR(mailbox))
962 return PTR_ERR(mailbox);
963
964 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
965 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
966 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
967 } else {
968 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
969 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
970 }
971
972 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE,
973 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
974 MLX4_CMD_WRAPPED);
975
976 mlx4_free_cmd_mailbox(dev->dev, mailbox);
977 return err;
978 }
979
mlx4_ib_modify_port(struct ib_device * ibdev,u8 port,int mask,struct ib_port_modify * props)980 static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
981 struct ib_port_modify *props)
982 {
983 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
984 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
985 struct ib_port_attr attr;
986 u32 cap_mask;
987 int err;
988
989 /* return OK if this is RoCE. CM calls ib_modify_port() regardless
990 * of whether port link layer is ETH or IB. For ETH ports, qkey
991 * violations and port capabilities are not meaningful.
992 */
993 if (is_eth)
994 return 0;
995
996 mutex_lock(&mdev->cap_mask_mutex);
997
998 err = mlx4_ib_query_port(ibdev, port, &attr);
999 if (err)
1000 goto out;
1001
1002 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
1003 ~props->clr_port_cap_mask;
1004
1005 err = mlx4_ib_SET_PORT(mdev, port,
1006 !!(mask & IB_PORT_RESET_QKEY_CNTR),
1007 cap_mask);
1008
1009 out:
1010 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
1011 return err;
1012 }
1013
mlx4_ib_alloc_ucontext(struct ib_ucontext * uctx,struct ib_udata * udata)1014 static int mlx4_ib_alloc_ucontext(struct ib_ucontext *uctx,
1015 struct ib_udata *udata)
1016 {
1017 struct ib_device *ibdev = uctx->device;
1018 struct mlx4_ib_dev *dev = to_mdev(ibdev);
1019 struct mlx4_ib_ucontext *context = to_mucontext(uctx);
1020 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
1021 struct mlx4_ib_alloc_ucontext_resp resp;
1022 int err;
1023
1024 if (!dev->ib_active)
1025 return -EAGAIN;
1026
1027 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
1028 resp_v3.qp_tab_size = dev->dev->caps.num_qps;
1029 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
1030 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
1031 } else {
1032 resp.dev_caps = dev->dev->caps.userspace_caps;
1033 resp.qp_tab_size = dev->dev->caps.num_qps;
1034 resp.bf_reg_size = dev->dev->caps.bf_reg_size;
1035 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
1036 resp.cqe_size = dev->dev->caps.cqe_size;
1037 }
1038
1039 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
1040 if (err)
1041 return err;
1042
1043 INIT_LIST_HEAD(&context->db_page_list);
1044 mutex_init(&context->db_page_mutex);
1045
1046 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
1047 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
1048 else
1049 err = ib_copy_to_udata(udata, &resp, sizeof(resp));
1050
1051 if (err) {
1052 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
1053 return -EFAULT;
1054 }
1055
1056 return err;
1057 }
1058
mlx4_ib_dealloc_ucontext(struct ib_ucontext * ibcontext)1059 static void mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
1060 {
1061 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
1062
1063 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
1064 }
1065
mlx4_ib_mmap(struct ib_ucontext * context,struct vm_area_struct * vma)1066 static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
1067 {
1068 struct mlx4_ib_dev *dev = to_mdev(context->device);
1069
1070 switch (vma->vm_pgoff) {
1071 case 0:
1072 return rdma_user_mmap_io(context, vma,
1073 to_mucontext(context)->uar.pfn,
1074 PAGE_SIZE,
1075 pgprot_noncached(vma->vm_page_prot),
1076 NULL);
1077
1078 case 1:
1079 if (dev->dev->caps.bf_reg_size == 0)
1080 return -EINVAL;
1081 return rdma_user_mmap_io(
1082 context, vma,
1083 to_mucontext(context)->uar.pfn +
1084 dev->dev->caps.num_uars,
1085 PAGE_SIZE, pgprot_writecombine(vma->vm_page_prot),
1086 NULL);
1087
1088 case 3: {
1089 struct mlx4_clock_params params;
1090 int ret;
1091
1092 ret = mlx4_get_internal_clock_params(dev->dev, ¶ms);
1093 if (ret)
1094 return ret;
1095
1096 return rdma_user_mmap_io(
1097 context, vma,
1098 (pci_resource_start(dev->dev->persist->pdev,
1099 params.bar) +
1100 params.offset) >>
1101 PAGE_SHIFT,
1102 PAGE_SIZE, pgprot_noncached(vma->vm_page_prot),
1103 NULL);
1104 }
1105
1106 default:
1107 return -EINVAL;
1108 }
1109 }
1110
mlx4_ib_alloc_pd(struct ib_pd * ibpd,struct ib_udata * udata)1111 static int mlx4_ib_alloc_pd(struct ib_pd *ibpd, struct ib_udata *udata)
1112 {
1113 struct mlx4_ib_pd *pd = to_mpd(ibpd);
1114 struct ib_device *ibdev = ibpd->device;
1115 int err;
1116
1117 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
1118 if (err)
1119 return err;
1120
1121 if (udata && ib_copy_to_udata(udata, &pd->pdn, sizeof(__u32))) {
1122 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
1123 return -EFAULT;
1124 }
1125 return 0;
1126 }
1127
mlx4_ib_dealloc_pd(struct ib_pd * pd,struct ib_udata * udata)1128 static void mlx4_ib_dealloc_pd(struct ib_pd *pd, struct ib_udata *udata)
1129 {
1130 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
1131 }
1132
mlx4_ib_alloc_xrcd(struct ib_device * ibdev,struct ib_udata * udata)1133 static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev,
1134 struct ib_udata *udata)
1135 {
1136 struct mlx4_ib_xrcd *xrcd;
1137 struct ib_cq_init_attr cq_attr = {};
1138 int err;
1139
1140 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
1141 return ERR_PTR(-ENOSYS);
1142
1143 xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL);
1144 if (!xrcd)
1145 return ERR_PTR(-ENOMEM);
1146
1147 err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn);
1148 if (err)
1149 goto err1;
1150
1151 xrcd->pd = ib_alloc_pd(ibdev, 0);
1152 if (IS_ERR(xrcd->pd)) {
1153 err = PTR_ERR(xrcd->pd);
1154 goto err2;
1155 }
1156
1157 cq_attr.cqe = 1;
1158 xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, &cq_attr);
1159 if (IS_ERR(xrcd->cq)) {
1160 err = PTR_ERR(xrcd->cq);
1161 goto err3;
1162 }
1163
1164 return &xrcd->ibxrcd;
1165
1166 err3:
1167 ib_dealloc_pd(xrcd->pd);
1168 err2:
1169 mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn);
1170 err1:
1171 kfree(xrcd);
1172 return ERR_PTR(err);
1173 }
1174
mlx4_ib_dealloc_xrcd(struct ib_xrcd * xrcd,struct ib_udata * udata)1175 static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd, struct ib_udata *udata)
1176 {
1177 ib_destroy_cq(to_mxrcd(xrcd)->cq);
1178 ib_dealloc_pd(to_mxrcd(xrcd)->pd);
1179 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
1180 kfree(xrcd);
1181
1182 return 0;
1183 }
1184
add_gid_entry(struct ib_qp * ibqp,union ib_gid * gid)1185 static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
1186 {
1187 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1188 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1189 struct mlx4_ib_gid_entry *ge;
1190
1191 ge = kzalloc(sizeof *ge, GFP_KERNEL);
1192 if (!ge)
1193 return -ENOMEM;
1194
1195 ge->gid = *gid;
1196 if (mlx4_ib_add_mc(mdev, mqp, gid)) {
1197 ge->port = mqp->port;
1198 ge->added = 1;
1199 }
1200
1201 mutex_lock(&mqp->mutex);
1202 list_add_tail(&ge->list, &mqp->gid_list);
1203 mutex_unlock(&mqp->mutex);
1204
1205 return 0;
1206 }
1207
mlx4_ib_delete_counters_table(struct mlx4_ib_dev * ibdev,struct mlx4_ib_counters * ctr_table)1208 static void mlx4_ib_delete_counters_table(struct mlx4_ib_dev *ibdev,
1209 struct mlx4_ib_counters *ctr_table)
1210 {
1211 struct counter_index *counter, *tmp_count;
1212
1213 mutex_lock(&ctr_table->mutex);
1214 list_for_each_entry_safe(counter, tmp_count, &ctr_table->counters_list,
1215 list) {
1216 if (counter->allocated)
1217 mlx4_counter_free(ibdev->dev, counter->index);
1218 list_del(&counter->list);
1219 kfree(counter);
1220 }
1221 mutex_unlock(&ctr_table->mutex);
1222 }
1223
mlx4_ib_add_mc(struct mlx4_ib_dev * mdev,struct mlx4_ib_qp * mqp,union ib_gid * gid)1224 int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
1225 union ib_gid *gid)
1226 {
1227 if_t ndev;
1228 int ret = 0;
1229
1230 if (!mqp->port)
1231 return 0;
1232
1233 spin_lock_bh(&mdev->iboe.lock);
1234 ndev = mdev->iboe.netdevs[mqp->port - 1];
1235 if (ndev)
1236 if_ref(ndev);
1237 spin_unlock_bh(&mdev->iboe.lock);
1238
1239 if (ndev) {
1240 ret = 1;
1241 if_rele(ndev);
1242 }
1243
1244 return ret;
1245 }
1246
1247 struct mlx4_ib_steering {
1248 struct list_head list;
1249 struct mlx4_flow_reg_id reg_id;
1250 union ib_gid gid;
1251 };
1252
1253 #define LAST_ETH_FIELD vlan_tag
1254 #define LAST_IB_FIELD sl
1255 #define LAST_IPV4_FIELD dst_ip
1256 #define LAST_TCP_UDP_FIELD src_port
1257
1258 /* Field is the last supported field */
1259 #define FIELDS_NOT_SUPPORTED(filter, field)\
1260 memchr_inv((void *)&filter.field +\
1261 sizeof(filter.field), 0,\
1262 sizeof(filter) -\
1263 offsetof(typeof(filter), field) -\
1264 sizeof(filter.field))
1265
parse_flow_attr(struct mlx4_dev * dev,u32 qp_num,union ib_flow_spec * ib_spec,struct _rule_hw * mlx4_spec)1266 static int parse_flow_attr(struct mlx4_dev *dev,
1267 u32 qp_num,
1268 union ib_flow_spec *ib_spec,
1269 struct _rule_hw *mlx4_spec)
1270 {
1271 enum mlx4_net_trans_rule_id type;
1272
1273 switch (ib_spec->type) {
1274 case IB_FLOW_SPEC_ETH:
1275 if (FIELDS_NOT_SUPPORTED(ib_spec->eth.mask, LAST_ETH_FIELD))
1276 return -ENOTSUPP;
1277
1278 type = MLX4_NET_TRANS_RULE_ID_ETH;
1279 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
1280 ETH_ALEN);
1281 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
1282 ETH_ALEN);
1283 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
1284 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
1285 break;
1286 case IB_FLOW_SPEC_IB:
1287 if (FIELDS_NOT_SUPPORTED(ib_spec->ib.mask, LAST_IB_FIELD))
1288 return -ENOTSUPP;
1289
1290 type = MLX4_NET_TRANS_RULE_ID_IB;
1291 mlx4_spec->ib.l3_qpn =
1292 cpu_to_be32(qp_num);
1293 mlx4_spec->ib.qpn_mask =
1294 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
1295 break;
1296
1297
1298 case IB_FLOW_SPEC_IPV4:
1299 if (FIELDS_NOT_SUPPORTED(ib_spec->ipv4.mask, LAST_IPV4_FIELD))
1300 return -ENOTSUPP;
1301
1302 type = MLX4_NET_TRANS_RULE_ID_IPV4;
1303 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
1304 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
1305 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
1306 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
1307 break;
1308
1309 case IB_FLOW_SPEC_TCP:
1310 case IB_FLOW_SPEC_UDP:
1311 if (FIELDS_NOT_SUPPORTED(ib_spec->tcp_udp.mask, LAST_TCP_UDP_FIELD))
1312 return -ENOTSUPP;
1313
1314 type = ib_spec->type == IB_FLOW_SPEC_TCP ?
1315 MLX4_NET_TRANS_RULE_ID_TCP :
1316 MLX4_NET_TRANS_RULE_ID_UDP;
1317 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
1318 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
1319 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
1320 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
1321 break;
1322
1323 default:
1324 return -EINVAL;
1325 }
1326 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
1327 mlx4_hw_rule_sz(dev, type) < 0)
1328 return -EINVAL;
1329 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
1330 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
1331 return mlx4_hw_rule_sz(dev, type);
1332 }
1333
1334 struct default_rules {
1335 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
1336 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
1337 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
1338 __u8 link_layer;
1339 };
1340 static const struct default_rules default_table[] = {
1341 {
1342 .mandatory_fields = {IB_FLOW_SPEC_IPV4},
1343 .mandatory_not_fields = {IB_FLOW_SPEC_ETH},
1344 .rules_create_list = {IB_FLOW_SPEC_IB},
1345 .link_layer = IB_LINK_LAYER_INFINIBAND
1346 }
1347 };
1348
__mlx4_ib_default_rules_match(struct ib_qp * qp,struct ib_flow_attr * flow_attr)1349 static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
1350 struct ib_flow_attr *flow_attr)
1351 {
1352 int i, j, k;
1353 void *ib_flow;
1354 const struct default_rules *pdefault_rules = default_table;
1355 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
1356
1357 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) {
1358 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
1359 memset(&field_types, 0, sizeof(field_types));
1360
1361 if (link_layer != pdefault_rules->link_layer)
1362 continue;
1363
1364 ib_flow = flow_attr + 1;
1365 /* we assume the specs are sorted */
1366 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
1367 j < flow_attr->num_of_specs; k++) {
1368 union ib_flow_spec *current_flow =
1369 (union ib_flow_spec *)ib_flow;
1370
1371 /* same layer but different type */
1372 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
1373 (pdefault_rules->mandatory_fields[k] &
1374 IB_FLOW_SPEC_LAYER_MASK)) &&
1375 (current_flow->type !=
1376 pdefault_rules->mandatory_fields[k]))
1377 goto out;
1378
1379 /* same layer, try match next one */
1380 if (current_flow->type ==
1381 pdefault_rules->mandatory_fields[k]) {
1382 j++;
1383 ib_flow +=
1384 ((union ib_flow_spec *)ib_flow)->size;
1385 }
1386 }
1387
1388 ib_flow = flow_attr + 1;
1389 for (j = 0; j < flow_attr->num_of_specs;
1390 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
1391 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
1392 /* same layer and same type */
1393 if (((union ib_flow_spec *)ib_flow)->type ==
1394 pdefault_rules->mandatory_not_fields[k])
1395 goto out;
1396
1397 return i;
1398 }
1399 out:
1400 return -1;
1401 }
1402
__mlx4_ib_create_default_rules(struct mlx4_ib_dev * mdev,struct ib_qp * qp,const struct default_rules * pdefault_rules,struct _rule_hw * mlx4_spec)1403 static int __mlx4_ib_create_default_rules(
1404 struct mlx4_ib_dev *mdev,
1405 struct ib_qp *qp,
1406 const struct default_rules *pdefault_rules,
1407 struct _rule_hw *mlx4_spec) {
1408 int size = 0;
1409 int i;
1410
1411 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {
1412 int ret;
1413 union ib_flow_spec ib_spec;
1414 switch (pdefault_rules->rules_create_list[i]) {
1415 case 0:
1416 /* no rule */
1417 continue;
1418 case IB_FLOW_SPEC_IB:
1419 ib_spec.type = IB_FLOW_SPEC_IB;
1420 ib_spec.size = sizeof(struct ib_flow_spec_ib);
1421
1422 break;
1423 default:
1424 /* invalid rule */
1425 return -EINVAL;
1426 }
1427 /* We must put empty rule, qpn is being ignored */
1428 ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
1429 mlx4_spec);
1430 if (ret < 0) {
1431 pr_info("invalid parsing\n");
1432 return -EINVAL;
1433 }
1434
1435 mlx4_spec = (void *)mlx4_spec + ret;
1436 size += ret;
1437 }
1438 return size;
1439 }
1440
__mlx4_ib_create_flow(struct ib_qp * qp,struct ib_flow_attr * flow_attr,int domain,enum mlx4_net_trans_promisc_mode flow_type,u64 * reg_id)1441 static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1442 int domain,
1443 enum mlx4_net_trans_promisc_mode flow_type,
1444 u64 *reg_id)
1445 {
1446 int ret, i;
1447 int size = 0;
1448 void *ib_flow;
1449 struct mlx4_ib_dev *mdev = to_mdev(qp->device);
1450 struct mlx4_cmd_mailbox *mailbox;
1451 struct mlx4_net_trans_rule_hw_ctrl *ctrl;
1452 int default_flow;
1453
1454 static const u16 __mlx4_domain[] = {
1455 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
1456 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
1457 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
1458 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
1459 };
1460
1461 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
1462 pr_err("Invalid priority value %d\n", flow_attr->priority);
1463 return -EINVAL;
1464 }
1465
1466 if (domain >= IB_FLOW_DOMAIN_NUM) {
1467 pr_err("Invalid domain value %d\n", domain);
1468 return -EINVAL;
1469 }
1470
1471 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
1472 return -EINVAL;
1473
1474 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
1475 if (IS_ERR(mailbox))
1476 return PTR_ERR(mailbox);
1477 ctrl = mailbox->buf;
1478
1479 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
1480 flow_attr->priority);
1481 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
1482 ctrl->port = flow_attr->port;
1483 ctrl->qpn = cpu_to_be32(qp->qp_num);
1484
1485 ib_flow = flow_attr + 1;
1486 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
1487 /* Add default flows */
1488 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
1489 if (default_flow >= 0) {
1490 ret = __mlx4_ib_create_default_rules(
1491 mdev, qp, default_table + default_flow,
1492 mailbox->buf + size);
1493 if (ret < 0) {
1494 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1495 return -EINVAL;
1496 }
1497 size += ret;
1498 }
1499 for (i = 0; i < flow_attr->num_of_specs; i++) {
1500 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
1501 mailbox->buf + size);
1502 if (ret < 0) {
1503 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1504 return -EINVAL;
1505 }
1506 ib_flow += ((union ib_flow_spec *) ib_flow)->size;
1507 size += ret;
1508 }
1509
1510 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
1511 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
1512 MLX4_CMD_WRAPPED);
1513 if (ret == -ENOMEM)
1514 pr_err("mcg table is full. Fail to register network rule.\n");
1515 else if (ret == -ENXIO)
1516 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
1517 else if (ret)
1518 pr_err("Invalid argument. Fail to register network rule.\n");
1519
1520 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1521 return ret;
1522 }
1523
__mlx4_ib_destroy_flow(struct mlx4_dev * dev,u64 reg_id)1524 static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
1525 {
1526 int err;
1527 err = mlx4_cmd(dev, reg_id, 0, 0,
1528 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
1529 MLX4_CMD_WRAPPED);
1530 if (err)
1531 pr_err("Fail to detach network rule. registration id = 0x%llx\n",
1532 (long long)reg_id);
1533 return err;
1534 }
1535
mlx4_ib_tunnel_steer_add(struct ib_qp * qp,struct ib_flow_attr * flow_attr,u64 * reg_id)1536 static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1537 u64 *reg_id)
1538 {
1539 void *ib_flow;
1540 union ib_flow_spec *ib_spec;
1541 struct mlx4_dev *dev = to_mdev(qp->device)->dev;
1542 int err = 0;
1543
1544 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
1545 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
1546 return 0; /* do nothing */
1547
1548 ib_flow = flow_attr + 1;
1549 ib_spec = (union ib_flow_spec *)ib_flow;
1550
1551 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1)
1552 return 0; /* do nothing */
1553
1554 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac,
1555 flow_attr->port, qp->qp_num,
1556 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff),
1557 reg_id);
1558 return err;
1559 }
1560
mlx4_ib_add_dont_trap_rule(struct mlx4_dev * dev,struct ib_flow_attr * flow_attr,enum mlx4_net_trans_promisc_mode * type)1561 static int mlx4_ib_add_dont_trap_rule(struct mlx4_dev *dev,
1562 struct ib_flow_attr *flow_attr,
1563 enum mlx4_net_trans_promisc_mode *type)
1564 {
1565 int err = 0;
1566
1567 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_UC_MC_SNIFFER) ||
1568 (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) ||
1569 (flow_attr->num_of_specs > 1) || (flow_attr->priority != 0)) {
1570 return -EOPNOTSUPP;
1571 }
1572
1573 if (flow_attr->num_of_specs == 0) {
1574 type[0] = MLX4_FS_MC_SNIFFER;
1575 type[1] = MLX4_FS_UC_SNIFFER;
1576 } else {
1577 union ib_flow_spec *ib_spec;
1578
1579 ib_spec = (union ib_flow_spec *)(flow_attr + 1);
1580 if (ib_spec->type != IB_FLOW_SPEC_ETH)
1581 return -EINVAL;
1582
1583 /* if all is zero than MC and UC */
1584 if (is_zero_ether_addr(ib_spec->eth.mask.dst_mac)) {
1585 type[0] = MLX4_FS_MC_SNIFFER;
1586 type[1] = MLX4_FS_UC_SNIFFER;
1587 } else {
1588 u8 mac[ETH_ALEN] = {ib_spec->eth.mask.dst_mac[0] ^ 0x01,
1589 ib_spec->eth.mask.dst_mac[1],
1590 ib_spec->eth.mask.dst_mac[2],
1591 ib_spec->eth.mask.dst_mac[3],
1592 ib_spec->eth.mask.dst_mac[4],
1593 ib_spec->eth.mask.dst_mac[5]};
1594
1595 /* Above xor was only on MC bit, non empty mask is valid
1596 * only if this bit is set and rest are zero.
1597 */
1598 if (!is_zero_ether_addr(&mac[0]))
1599 return -EINVAL;
1600
1601 if (is_multicast_ether_addr(ib_spec->eth.val.dst_mac))
1602 type[0] = MLX4_FS_MC_SNIFFER;
1603 else
1604 type[0] = MLX4_FS_UC_SNIFFER;
1605 }
1606 }
1607
1608 return err;
1609 }
1610
mlx4_ib_create_flow(struct ib_qp * qp,struct ib_flow_attr * flow_attr,int domain,struct ib_udata * udata)1611 static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
1612 struct ib_flow_attr *flow_attr,
1613 int domain, struct ib_udata *udata)
1614 {
1615 int err = 0, i = 0, j = 0;
1616 struct mlx4_ib_flow *mflow;
1617 enum mlx4_net_trans_promisc_mode type[2];
1618 struct mlx4_dev *dev = (to_mdev(qp->device))->dev;
1619 int is_bonded = mlx4_is_bonded(dev);
1620
1621 if (flow_attr->port < 1 || flow_attr->port > qp->device->phys_port_cnt)
1622 return ERR_PTR(-EINVAL);
1623
1624 if ((flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP) &&
1625 (flow_attr->type != IB_FLOW_ATTR_NORMAL))
1626 return ERR_PTR(-EOPNOTSUPP);
1627
1628 if (udata &&
1629 udata->inlen && !ib_is_udata_cleared(udata, 0, udata->inlen))
1630 return ERR_PTR(-EOPNOTSUPP);
1631
1632 memset(type, 0, sizeof(type));
1633
1634 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
1635 if (!mflow) {
1636 err = -ENOMEM;
1637 goto err_free;
1638 }
1639
1640 switch (flow_attr->type) {
1641 case IB_FLOW_ATTR_NORMAL:
1642 /* If dont trap flag (continue match) is set, under specific
1643 * condition traffic be replicated to given qp,
1644 * without stealing it
1645 */
1646 if (unlikely(flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP)) {
1647 err = mlx4_ib_add_dont_trap_rule(dev,
1648 flow_attr,
1649 type);
1650 if (err)
1651 goto err_free;
1652 } else {
1653 type[0] = MLX4_FS_REGULAR;
1654 }
1655 break;
1656
1657 case IB_FLOW_ATTR_ALL_DEFAULT:
1658 type[0] = MLX4_FS_ALL_DEFAULT;
1659 break;
1660
1661 case IB_FLOW_ATTR_MC_DEFAULT:
1662 type[0] = MLX4_FS_MC_DEFAULT;
1663 break;
1664
1665 case IB_FLOW_ATTR_SNIFFER:
1666 type[0] = MLX4_FS_MIRROR_RX_PORT;
1667 type[1] = MLX4_FS_MIRROR_SX_PORT;
1668 break;
1669
1670 default:
1671 err = -EINVAL;
1672 goto err_free;
1673 }
1674
1675 while (i < ARRAY_SIZE(type) && type[i]) {
1676 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
1677 &mflow->reg_id[i].id);
1678 if (err)
1679 goto err_create_flow;
1680 if (is_bonded) {
1681 /* Application always sees one port so the mirror rule
1682 * must be on port #2
1683 */
1684 flow_attr->port = 2;
1685 err = __mlx4_ib_create_flow(qp, flow_attr,
1686 domain, type[j],
1687 &mflow->reg_id[j].mirror);
1688 flow_attr->port = 1;
1689 if (err)
1690 goto err_create_flow;
1691 j++;
1692 }
1693
1694 i++;
1695 }
1696
1697 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) {
1698 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1699 &mflow->reg_id[i].id);
1700 if (err)
1701 goto err_create_flow;
1702
1703 if (is_bonded) {
1704 flow_attr->port = 2;
1705 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1706 &mflow->reg_id[j].mirror);
1707 flow_attr->port = 1;
1708 if (err)
1709 goto err_create_flow;
1710 j++;
1711 }
1712 /* function to create mirror rule */
1713 i++;
1714 }
1715
1716 return &mflow->ibflow;
1717
1718 err_create_flow:
1719 while (i) {
1720 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1721 mflow->reg_id[i].id);
1722 i--;
1723 }
1724
1725 while (j) {
1726 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1727 mflow->reg_id[j].mirror);
1728 j--;
1729 }
1730 err_free:
1731 kfree(mflow);
1732 return ERR_PTR(err);
1733 }
1734
mlx4_ib_destroy_flow(struct ib_flow * flow_id)1735 static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
1736 {
1737 int err, ret = 0;
1738 int i = 0;
1739 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
1740 struct mlx4_ib_flow *mflow = to_mflow(flow_id);
1741
1742 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) {
1743 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id);
1744 if (err)
1745 ret = err;
1746 if (mflow->reg_id[i].mirror) {
1747 err = __mlx4_ib_destroy_flow(mdev->dev,
1748 mflow->reg_id[i].mirror);
1749 if (err)
1750 ret = err;
1751 }
1752 i++;
1753 }
1754
1755 kfree(mflow);
1756 return ret;
1757 }
1758
mlx4_ib_mcg_attach(struct ib_qp * ibqp,union ib_gid * gid,u16 lid)1759 static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1760 {
1761 int err;
1762 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1763 struct mlx4_dev *dev = mdev->dev;
1764 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1765 struct mlx4_ib_steering *ib_steering = NULL;
1766 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
1767 struct mlx4_flow_reg_id reg_id;
1768
1769 if (mdev->dev->caps.steering_mode ==
1770 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1771 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
1772 if (!ib_steering)
1773 return -ENOMEM;
1774 }
1775
1776 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
1777 !!(mqp->flags &
1778 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1779 prot, ®_id.id);
1780 if (err) {
1781 pr_err("multicast attach op failed, err %d\n", err);
1782 goto err_malloc;
1783 }
1784
1785 reg_id.mirror = 0;
1786 if (mlx4_is_bonded(dev)) {
1787 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw,
1788 (mqp->port == 1) ? 2 : 1,
1789 !!(mqp->flags &
1790 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1791 prot, ®_id.mirror);
1792 if (err)
1793 goto err_add;
1794 }
1795
1796 err = add_gid_entry(ibqp, gid);
1797 if (err)
1798 goto err_add;
1799
1800 if (ib_steering) {
1801 memcpy(ib_steering->gid.raw, gid->raw, 16);
1802 ib_steering->reg_id = reg_id;
1803 mutex_lock(&mqp->mutex);
1804 list_add(&ib_steering->list, &mqp->steering_rules);
1805 mutex_unlock(&mqp->mutex);
1806 }
1807 return 0;
1808
1809 err_add:
1810 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1811 prot, reg_id.id);
1812 if (reg_id.mirror)
1813 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1814 prot, reg_id.mirror);
1815 err_malloc:
1816 kfree(ib_steering);
1817
1818 return err;
1819 }
1820
find_gid_entry(struct mlx4_ib_qp * qp,u8 * raw)1821 static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
1822 {
1823 struct mlx4_ib_gid_entry *ge;
1824 struct mlx4_ib_gid_entry *tmp;
1825 struct mlx4_ib_gid_entry *ret = NULL;
1826
1827 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
1828 if (!memcmp(raw, ge->gid.raw, 16)) {
1829 ret = ge;
1830 break;
1831 }
1832 }
1833
1834 return ret;
1835 }
1836
mlx4_ib_mcg_detach(struct ib_qp * ibqp,union ib_gid * gid,u16 lid)1837 static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1838 {
1839 int err;
1840 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1841 struct mlx4_dev *dev = mdev->dev;
1842 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1843 if_t ndev;
1844 struct mlx4_ib_gid_entry *ge;
1845 struct mlx4_flow_reg_id reg_id = {0, 0};
1846 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
1847
1848 if (mdev->dev->caps.steering_mode ==
1849 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1850 struct mlx4_ib_steering *ib_steering;
1851
1852 mutex_lock(&mqp->mutex);
1853 list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
1854 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
1855 list_del(&ib_steering->list);
1856 break;
1857 }
1858 }
1859 mutex_unlock(&mqp->mutex);
1860 if (&ib_steering->list == &mqp->steering_rules) {
1861 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
1862 return -EINVAL;
1863 }
1864 reg_id = ib_steering->reg_id;
1865 kfree(ib_steering);
1866 }
1867
1868 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1869 prot, reg_id.id);
1870 if (err)
1871 return err;
1872
1873 if (mlx4_is_bonded(dev)) {
1874 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1875 prot, reg_id.mirror);
1876 if (err)
1877 return err;
1878 }
1879
1880 mutex_lock(&mqp->mutex);
1881 ge = find_gid_entry(mqp, gid->raw);
1882 if (ge) {
1883 spin_lock_bh(&mdev->iboe.lock);
1884 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
1885 if (ndev)
1886 if_ref(ndev);
1887 spin_unlock_bh(&mdev->iboe.lock);
1888 if (ndev)
1889 if_rele(ndev);
1890 list_del(&ge->list);
1891 kfree(ge);
1892 } else
1893 pr_warn("could not find mgid entry\n");
1894
1895 mutex_unlock(&mqp->mutex);
1896
1897 return 0;
1898 }
1899
init_node_data(struct mlx4_ib_dev * dev)1900 static int init_node_data(struct mlx4_ib_dev *dev)
1901 {
1902 struct ib_smp *in_mad = NULL;
1903 struct ib_smp *out_mad = NULL;
1904 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
1905 int err = -ENOMEM;
1906
1907 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
1908 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1909 if (!in_mad || !out_mad)
1910 goto out;
1911
1912 init_query_mad(in_mad);
1913 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
1914 if (mlx4_is_master(dev->dev))
1915 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
1916
1917 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
1918 if (err)
1919 goto out;
1920
1921 memcpy(dev->ib_dev.node_desc, out_mad->data, IB_DEVICE_NODE_DESC_MAX);
1922
1923 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
1924
1925 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
1926 if (err)
1927 goto out;
1928
1929 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
1930 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
1931
1932 out:
1933 kfree(in_mad);
1934 kfree(out_mad);
1935 return err;
1936 }
1937
show_hca(struct device * device,struct device_attribute * attr,char * buf)1938 static ssize_t show_hca(struct device *device, struct device_attribute *attr,
1939 char *buf)
1940 {
1941 struct mlx4_ib_dev *dev =
1942 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
1943 return sprintf(buf, "MT%d\n", dev->dev->persist->pdev->device);
1944 }
1945
show_rev(struct device * device,struct device_attribute * attr,char * buf)1946 static ssize_t show_rev(struct device *device, struct device_attribute *attr,
1947 char *buf)
1948 {
1949 struct mlx4_ib_dev *dev =
1950 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
1951 return sprintf(buf, "%x\n", dev->dev->rev_id);
1952 }
1953
show_board(struct device * device,struct device_attribute * attr,char * buf)1954 static ssize_t show_board(struct device *device, struct device_attribute *attr,
1955 char *buf)
1956 {
1957 struct mlx4_ib_dev *dev =
1958 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
1959 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
1960 dev->dev->board_id);
1961 }
1962
1963 static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
1964 static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
1965 static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
1966
1967 static struct device_attribute *mlx4_class_attributes[] = {
1968 &dev_attr_hw_rev,
1969 &dev_attr_hca_type,
1970 &dev_attr_board_id
1971 };
1972
1973 struct diag_counter {
1974 const char *name;
1975 u32 offset;
1976 };
1977
1978 #define DIAG_COUNTER(_name, _offset) \
1979 { .name = #_name, .offset = _offset }
1980
1981 static const struct diag_counter diag_basic[] = {
1982 DIAG_COUNTER(rq_num_lle, 0x00),
1983 DIAG_COUNTER(sq_num_lle, 0x04),
1984 DIAG_COUNTER(rq_num_lqpoe, 0x08),
1985 DIAG_COUNTER(sq_num_lqpoe, 0x0C),
1986 DIAG_COUNTER(rq_num_lpe, 0x18),
1987 DIAG_COUNTER(sq_num_lpe, 0x1C),
1988 DIAG_COUNTER(rq_num_wrfe, 0x20),
1989 DIAG_COUNTER(sq_num_wrfe, 0x24),
1990 DIAG_COUNTER(sq_num_mwbe, 0x2C),
1991 DIAG_COUNTER(sq_num_bre, 0x34),
1992 DIAG_COUNTER(sq_num_rire, 0x44),
1993 DIAG_COUNTER(rq_num_rire, 0x48),
1994 DIAG_COUNTER(sq_num_rae, 0x4C),
1995 DIAG_COUNTER(rq_num_rae, 0x50),
1996 DIAG_COUNTER(sq_num_roe, 0x54),
1997 DIAG_COUNTER(sq_num_tree, 0x5C),
1998 DIAG_COUNTER(sq_num_rree, 0x64),
1999 DIAG_COUNTER(rq_num_rnr, 0x68),
2000 DIAG_COUNTER(sq_num_rnr, 0x6C),
2001 DIAG_COUNTER(rq_num_oos, 0x100),
2002 DIAG_COUNTER(sq_num_oos, 0x104),
2003 };
2004
2005 static const struct diag_counter diag_ext[] = {
2006 DIAG_COUNTER(rq_num_dup, 0x130),
2007 DIAG_COUNTER(sq_num_to, 0x134),
2008 };
2009
2010 static const struct diag_counter diag_device_only[] = {
2011 DIAG_COUNTER(num_cqovf, 0x1A0),
2012 DIAG_COUNTER(rq_num_udsdprd, 0x118),
2013 };
2014
mlx4_ib_alloc_hw_stats(struct ib_device * ibdev,u8 port_num)2015 static struct rdma_hw_stats *mlx4_ib_alloc_hw_stats(struct ib_device *ibdev,
2016 u8 port_num)
2017 {
2018 struct mlx4_ib_dev *dev = to_mdev(ibdev);
2019 struct mlx4_ib_diag_counters *diag = dev->diag_counters;
2020
2021 if (!diag[!!port_num].name)
2022 return NULL;
2023
2024 return rdma_alloc_hw_stats_struct(diag[!!port_num].name,
2025 diag[!!port_num].num_counters,
2026 RDMA_HW_STATS_DEFAULT_LIFESPAN);
2027 }
2028
mlx4_ib_get_hw_stats(struct ib_device * ibdev,struct rdma_hw_stats * stats,u8 port,int index)2029 static int mlx4_ib_get_hw_stats(struct ib_device *ibdev,
2030 struct rdma_hw_stats *stats,
2031 u8 port, int index)
2032 {
2033 struct mlx4_ib_dev *dev = to_mdev(ibdev);
2034 struct mlx4_ib_diag_counters *diag = dev->diag_counters;
2035 u32 hw_value[ARRAY_SIZE(diag_device_only) +
2036 ARRAY_SIZE(diag_ext) + ARRAY_SIZE(diag_basic)] = {};
2037 int ret;
2038 int i;
2039
2040 ret = mlx4_query_diag_counters(dev->dev,
2041 MLX4_OP_MOD_QUERY_TRANSPORT_CI_ERRORS,
2042 diag[!!port].offset, hw_value,
2043 diag[!!port].num_counters, port);
2044
2045 if (ret)
2046 return ret;
2047
2048 for (i = 0; i < diag[!!port].num_counters; i++)
2049 stats->value[i] = hw_value[i];
2050
2051 return diag[!!port].num_counters;
2052 }
2053
__mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev * ibdev,const char *** name,u32 ** offset,u32 * num,bool port)2054 static int __mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev,
2055 const char ***name,
2056 u32 **offset,
2057 u32 *num,
2058 bool port)
2059 {
2060 u32 num_counters;
2061
2062 num_counters = ARRAY_SIZE(diag_basic);
2063
2064 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT)
2065 num_counters += ARRAY_SIZE(diag_ext);
2066
2067 if (!port)
2068 num_counters += ARRAY_SIZE(diag_device_only);
2069
2070 *name = kcalloc(num_counters, sizeof(**name), GFP_KERNEL);
2071 if (!*name)
2072 return -ENOMEM;
2073
2074 *offset = kcalloc(num_counters, sizeof(**offset), GFP_KERNEL);
2075 if (!*offset)
2076 goto err_name;
2077
2078 *num = num_counters;
2079
2080 return 0;
2081
2082 err_name:
2083 kfree(*name);
2084 return -ENOMEM;
2085 }
2086
mlx4_ib_fill_diag_counters(struct mlx4_ib_dev * ibdev,const char ** name,u32 * offset,bool port)2087 static void mlx4_ib_fill_diag_counters(struct mlx4_ib_dev *ibdev,
2088 const char **name,
2089 u32 *offset,
2090 bool port)
2091 {
2092 int i;
2093 int j;
2094
2095 for (i = 0, j = 0; i < ARRAY_SIZE(diag_basic); i++, j++) {
2096 name[i] = diag_basic[i].name;
2097 offset[i] = diag_basic[i].offset;
2098 }
2099
2100 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) {
2101 for (i = 0; i < ARRAY_SIZE(diag_ext); i++, j++) {
2102 name[j] = diag_ext[i].name;
2103 offset[j] = diag_ext[i].offset;
2104 }
2105 }
2106
2107 if (!port) {
2108 for (i = 0; i < ARRAY_SIZE(diag_device_only); i++, j++) {
2109 name[j] = diag_device_only[i].name;
2110 offset[j] = diag_device_only[i].offset;
2111 }
2112 }
2113 }
2114
mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev * ibdev)2115 static int mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev)
2116 {
2117 struct mlx4_ib_diag_counters *diag = ibdev->diag_counters;
2118 int i;
2119 int ret;
2120 bool per_port = !!(ibdev->dev->caps.flags2 &
2121 MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT);
2122
2123 if (mlx4_is_slave(ibdev->dev))
2124 return 0;
2125
2126 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) {
2127 /* i == 1 means we are building port counters */
2128 if (i && !per_port)
2129 continue;
2130
2131 ret = __mlx4_ib_alloc_diag_counters(ibdev, &diag[i].name,
2132 &diag[i].offset,
2133 &diag[i].num_counters, i);
2134 if (ret)
2135 goto err_alloc;
2136
2137 mlx4_ib_fill_diag_counters(ibdev, diag[i].name,
2138 diag[i].offset, i);
2139 }
2140
2141 ibdev->ib_dev.get_hw_stats = mlx4_ib_get_hw_stats;
2142 ibdev->ib_dev.alloc_hw_stats = mlx4_ib_alloc_hw_stats;
2143
2144 return 0;
2145
2146 err_alloc:
2147 if (i) {
2148 kfree(diag[i - 1].name);
2149 kfree(diag[i - 1].offset);
2150 }
2151
2152 return ret;
2153 }
2154
mlx4_ib_diag_cleanup(struct mlx4_ib_dev * ibdev)2155 static void mlx4_ib_diag_cleanup(struct mlx4_ib_dev *ibdev)
2156 {
2157 int i;
2158
2159 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) {
2160 kfree(ibdev->diag_counters[i].offset);
2161 kfree(ibdev->diag_counters[i].name);
2162 }
2163 }
2164
2165 #define MLX4_IB_INVALID_MAC ((u64)-1)
mlx4_ib_update_qps(struct mlx4_ib_dev * ibdev,if_t dev,int port)2166 static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
2167 if_t dev,
2168 int port)
2169 {
2170 u64 new_smac = 0;
2171 u64 release_mac = MLX4_IB_INVALID_MAC;
2172 struct mlx4_ib_qp *qp;
2173
2174 new_smac = mlx4_mac_to_u64(if_getlladdr(dev));
2175
2176 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac);
2177
2178 /* no need for update QP1 and mac registration in non-SRIOV */
2179 if (!mlx4_is_mfunc(ibdev->dev))
2180 return;
2181
2182 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]);
2183 qp = ibdev->qp1_proxy[port - 1];
2184 if (qp) {
2185 int new_smac_index;
2186 u64 old_smac;
2187 struct mlx4_update_qp_params update_params;
2188
2189 mutex_lock(&qp->mutex);
2190 old_smac = qp->pri.smac;
2191 if (new_smac == old_smac)
2192 goto unlock;
2193
2194 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac);
2195
2196 if (new_smac_index < 0)
2197 goto unlock;
2198
2199 update_params.smac_index = new_smac_index;
2200 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC,
2201 &update_params)) {
2202 release_mac = new_smac;
2203 goto unlock;
2204 }
2205 /* if old port was zero, no mac was yet registered for this QP */
2206 if (qp->pri.smac_port)
2207 release_mac = old_smac;
2208 qp->pri.smac = new_smac;
2209 qp->pri.smac_port = port;
2210 qp->pri.smac_index = new_smac_index;
2211 }
2212
2213 unlock:
2214 if (release_mac != MLX4_IB_INVALID_MAC)
2215 mlx4_unregister_mac(ibdev->dev, port, release_mac);
2216 if (qp)
2217 mutex_unlock(&qp->mutex);
2218 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]);
2219 }
2220
mlx4_ib_scan_netdevs(struct mlx4_ib_dev * ibdev,if_t dev,unsigned long event)2221 static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev,
2222 if_t dev,
2223 unsigned long event)
2224
2225 {
2226 struct mlx4_ib_iboe *iboe;
2227 int update_qps_port = -1;
2228 int port;
2229
2230 iboe = &ibdev->iboe;
2231
2232 spin_lock_bh(&iboe->lock);
2233 mlx4_foreach_ib_transport_port(port, ibdev->dev) {
2234
2235 iboe->netdevs[port - 1] =
2236 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
2237
2238 if (dev == iboe->netdevs[port - 1] &&
2239 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER ||
2240 event == NETDEV_UP || event == NETDEV_CHANGE))
2241 update_qps_port = port;
2242
2243 }
2244 spin_unlock_bh(&iboe->lock);
2245
2246 if (update_qps_port > 0)
2247 mlx4_ib_update_qps(ibdev, dev, update_qps_port);
2248 }
2249
mlx4_ib_netdev_event(struct notifier_block * this,unsigned long event,void * ptr)2250 static int mlx4_ib_netdev_event(struct notifier_block *this,
2251 unsigned long event, void *ptr)
2252 {
2253 if_t dev = netdev_notifier_info_to_ifp(ptr);
2254 struct mlx4_ib_dev *ibdev;
2255
2256 if (if_getvnet(dev) != &init_net)
2257 return NOTIFY_DONE;
2258
2259 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
2260 mlx4_ib_scan_netdevs(ibdev, dev, event);
2261
2262 return NOTIFY_DONE;
2263 }
2264
init_pkeys(struct mlx4_ib_dev * ibdev)2265 static void init_pkeys(struct mlx4_ib_dev *ibdev)
2266 {
2267 int port;
2268 int slave;
2269 int i;
2270
2271 if (mlx4_is_master(ibdev->dev)) {
2272 for (slave = 0; slave <= ibdev->dev->persist->num_vfs;
2273 ++slave) {
2274 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2275 for (i = 0;
2276 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2277 ++i) {
2278 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
2279 /* master has the identity virt2phys pkey mapping */
2280 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
2281 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
2282 mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
2283 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
2284 }
2285 }
2286 }
2287 /* initialize pkey cache */
2288 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2289 for (i = 0;
2290 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2291 ++i)
2292 ibdev->pkeys.phys_pkey_cache[port-1][i] =
2293 (i) ? 0 : 0xFFFF;
2294 }
2295 }
2296 }
2297
mlx4_ib_alloc_eqs(struct mlx4_dev * dev,struct mlx4_ib_dev * ibdev)2298 static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2299 {
2300 int i, j, eq = 0, total_eqs = 0;
2301
2302 ibdev->eq_table = kcalloc(dev->caps.num_comp_vectors,
2303 sizeof(ibdev->eq_table[0]), GFP_KERNEL);
2304 if (!ibdev->eq_table)
2305 return;
2306
2307 for (i = 1; i <= dev->caps.num_ports; i++) {
2308 for (j = 0; j < mlx4_get_eqs_per_port(dev, i);
2309 j++, total_eqs++) {
2310 if (i > 1 && mlx4_is_eq_shared(dev, total_eqs))
2311 continue;
2312 ibdev->eq_table[eq] = total_eqs;
2313 if (!mlx4_assign_eq(dev, i,
2314 &ibdev->eq_table[eq]))
2315 eq++;
2316 else
2317 ibdev->eq_table[eq] = -1;
2318 }
2319 }
2320
2321 for (i = eq; i < dev->caps.num_comp_vectors;
2322 ibdev->eq_table[i++] = -1)
2323 ;
2324
2325 /* Advertise the new number of EQs to clients */
2326 ibdev->ib_dev.num_comp_vectors = eq;
2327 }
2328
mlx4_ib_free_eqs(struct mlx4_dev * dev,struct mlx4_ib_dev * ibdev)2329 static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2330 {
2331 int i;
2332 int total_eqs = ibdev->ib_dev.num_comp_vectors;
2333
2334 /* no eqs were allocated */
2335 if (!ibdev->eq_table)
2336 return;
2337
2338 /* Reset the advertised EQ number */
2339 ibdev->ib_dev.num_comp_vectors = 0;
2340
2341 for (i = 0; i < total_eqs; i++)
2342 mlx4_release_eq(dev, ibdev->eq_table[i]);
2343
2344 kfree(ibdev->eq_table);
2345 ibdev->eq_table = NULL;
2346 }
2347
mlx4_port_immutable(struct ib_device * ibdev,u8 port_num,struct ib_port_immutable * immutable)2348 static int mlx4_port_immutable(struct ib_device *ibdev, u8 port_num,
2349 struct ib_port_immutable *immutable)
2350 {
2351 struct ib_port_attr attr;
2352 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
2353 int err;
2354
2355 err = mlx4_ib_query_port(ibdev, port_num, &attr);
2356 if (err)
2357 return err;
2358
2359 immutable->pkey_tbl_len = attr.pkey_tbl_len;
2360 immutable->gid_tbl_len = attr.gid_tbl_len;
2361
2362 if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND) {
2363 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB;
2364 } else {
2365 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE)
2366 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
2367 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2)
2368 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE |
2369 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
2370 }
2371
2372 immutable->max_mad_size = IB_MGMT_MAD_SIZE;
2373
2374 return 0;
2375 }
2376
get_fw_ver_str(struct ib_device * device,char * str,size_t str_len)2377 static void get_fw_ver_str(struct ib_device *device, char *str,
2378 size_t str_len)
2379 {
2380 struct mlx4_ib_dev *dev =
2381 container_of(device, struct mlx4_ib_dev, ib_dev);
2382 snprintf(str, str_len, "%d.%d.%d",
2383 (int) (dev->dev->caps.fw_ver >> 32),
2384 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
2385 (int) dev->dev->caps.fw_ver & 0xffff);
2386 }
2387
mlx4_ib_add(struct mlx4_dev * dev)2388 static void *mlx4_ib_add(struct mlx4_dev *dev)
2389 {
2390 struct mlx4_ib_dev *ibdev;
2391 int num_ports;
2392 int i, j;
2393 int err;
2394 struct mlx4_ib_iboe *iboe;
2395 int ib_num_ports = 0;
2396 int num_req_counters;
2397 int allocated;
2398 u32 counter_index;
2399 struct counter_index *new_counter_index = NULL;
2400
2401 pr_info_once("%s", mlx4_ib_version);
2402
2403 num_ports = 0;
2404 mlx4_foreach_ib_transport_port(i, dev)
2405 num_ports++;
2406
2407 /* No point in registering a device with no ports... */
2408 if (num_ports == 0)
2409 return NULL;
2410
2411 ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
2412 if (!ibdev) {
2413 dev_err(&dev->persist->pdev->dev,
2414 "Device struct alloc failed\n");
2415 return NULL;
2416 }
2417
2418 iboe = &ibdev->iboe;
2419
2420 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
2421 goto err_dealloc;
2422
2423 if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
2424 goto err_pd;
2425
2426 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
2427 PAGE_SIZE);
2428 if (!ibdev->uar_map)
2429 goto err_uar;
2430 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
2431
2432 ibdev->dev = dev;
2433 ibdev->bond_next_port = 0;
2434
2435 INIT_IB_DEVICE_OPS(&ibdev->ib_dev.ops, mlx4, MLX4);
2436 strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX);
2437 ibdev->ib_dev.owner = THIS_MODULE;
2438 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
2439 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
2440 ibdev->num_ports = num_ports;
2441 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ?
2442 1 : ibdev->num_ports;
2443 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
2444 ibdev->ib_dev.dma_device = &dev->persist->pdev->dev;
2445 ibdev->ib_dev.get_netdev = mlx4_ib_get_netdev;
2446 ibdev->ib_dev.add_gid = mlx4_ib_add_gid;
2447 ibdev->ib_dev.del_gid = mlx4_ib_del_gid;
2448
2449 if (dev->caps.userspace_caps)
2450 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION;
2451 else
2452 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
2453
2454 ibdev->ib_dev.uverbs_cmd_mask =
2455 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2456 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2457 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2458 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2459 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2460 (1ull << IB_USER_VERBS_CMD_REG_MR) |
2461 (1ull << IB_USER_VERBS_CMD_REREG_MR) |
2462 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2463 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2464 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
2465 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
2466 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2467 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2468 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
2469 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
2470 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2471 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
2472 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
2473 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
2474 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
2475 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
2476 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
2477 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
2478 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
2479
2480 ibdev->ib_dev.query_device = mlx4_ib_query_device;
2481 ibdev->ib_dev.query_port = mlx4_ib_query_port;
2482 ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer;
2483 ibdev->ib_dev.query_gid = mlx4_ib_query_gid;
2484 ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey;
2485 ibdev->ib_dev.modify_device = mlx4_ib_modify_device;
2486 ibdev->ib_dev.modify_port = mlx4_ib_modify_port;
2487 ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext;
2488 ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext;
2489 ibdev->ib_dev.mmap = mlx4_ib_mmap;
2490 ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd;
2491 ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd;
2492 ibdev->ib_dev.create_ah = mlx4_ib_create_ah;
2493 ibdev->ib_dev.query_ah = mlx4_ib_query_ah;
2494 ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah;
2495 ibdev->ib_dev.create_srq = mlx4_ib_create_srq;
2496 ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq;
2497 ibdev->ib_dev.query_srq = mlx4_ib_query_srq;
2498 ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq;
2499 ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv;
2500 ibdev->ib_dev.create_qp = mlx4_ib_create_qp;
2501 ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp;
2502 ibdev->ib_dev.query_qp = mlx4_ib_query_qp;
2503 ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp;
2504 ibdev->ib_dev.post_send = mlx4_ib_post_send;
2505 ibdev->ib_dev.post_recv = mlx4_ib_post_recv;
2506 ibdev->ib_dev.create_cq = mlx4_ib_create_cq;
2507 ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq;
2508 ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq;
2509 ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq;
2510 ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq;
2511 ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq;
2512 ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr;
2513 ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr;
2514 ibdev->ib_dev.rereg_user_mr = mlx4_ib_rereg_user_mr;
2515 ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr;
2516 ibdev->ib_dev.alloc_mr = mlx4_ib_alloc_mr;
2517 ibdev->ib_dev.map_mr_sg = mlx4_ib_map_mr_sg;
2518 ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach;
2519 ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach;
2520 ibdev->ib_dev.process_mad = mlx4_ib_process_mad;
2521 ibdev->ib_dev.get_port_immutable = mlx4_port_immutable;
2522 ibdev->ib_dev.get_dev_fw_str = get_fw_ver_str;
2523
2524 if (!mlx4_is_slave(ibdev->dev)) {
2525 ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc;
2526 ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr;
2527 ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr;
2528 ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc;
2529 }
2530
2531 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
2532 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
2533 ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw;
2534 ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw;
2535
2536 ibdev->ib_dev.uverbs_cmd_mask |=
2537 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
2538 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
2539 }
2540
2541 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
2542 ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd;
2543 ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd;
2544 ibdev->ib_dev.uverbs_cmd_mask |=
2545 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
2546 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
2547 }
2548
2549 if (check_flow_steering_support(dev)) {
2550 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
2551 ibdev->ib_dev.create_flow = mlx4_ib_create_flow;
2552 ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow;
2553
2554 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2555 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) |
2556 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
2557 }
2558
2559 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2560 (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE) |
2561 (1ull << IB_USER_VERBS_EX_CMD_CREATE_CQ) |
2562 (1ull << IB_USER_VERBS_EX_CMD_CREATE_QP);
2563
2564 mlx4_ib_alloc_eqs(dev, ibdev);
2565
2566 spin_lock_init(&iboe->lock);
2567
2568 if (init_node_data(ibdev))
2569 goto err_map;
2570 mlx4_init_sl2vl_tbl(ibdev);
2571
2572 for (i = 0; i < ibdev->num_ports; ++i) {
2573 mutex_init(&ibdev->counters_table[i].mutex);
2574 INIT_LIST_HEAD(&ibdev->counters_table[i].counters_list);
2575 }
2576
2577 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports;
2578 for (i = 0; i < num_req_counters; ++i) {
2579 mutex_init(&ibdev->qp1_proxy_lock[i]);
2580 allocated = 0;
2581 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
2582 IB_LINK_LAYER_ETHERNET) {
2583 err = mlx4_counter_alloc(ibdev->dev, &counter_index);
2584 /* if failed to allocate a new counter, use default */
2585 if (err)
2586 counter_index =
2587 mlx4_get_default_counter_index(dev,
2588 i + 1);
2589 else
2590 allocated = 1;
2591 } else { /* IB_LINK_LAYER_INFINIBAND use the default counter */
2592 counter_index = mlx4_get_default_counter_index(dev,
2593 i + 1);
2594 }
2595 new_counter_index = kmalloc(sizeof(*new_counter_index),
2596 GFP_KERNEL);
2597 if (!new_counter_index) {
2598 if (allocated)
2599 mlx4_counter_free(ibdev->dev, counter_index);
2600 goto err_counter;
2601 }
2602 new_counter_index->index = counter_index;
2603 new_counter_index->allocated = allocated;
2604 list_add_tail(&new_counter_index->list,
2605 &ibdev->counters_table[i].counters_list);
2606 ibdev->counters_table[i].default_counter = counter_index;
2607 pr_info("counter index %d for port %d allocated %d\n",
2608 counter_index, i + 1, allocated);
2609 }
2610 if (mlx4_is_bonded(dev))
2611 for (i = 1; i < ibdev->num_ports ; ++i) {
2612 new_counter_index =
2613 kmalloc(sizeof(struct counter_index),
2614 GFP_KERNEL);
2615 if (!new_counter_index)
2616 goto err_counter;
2617 new_counter_index->index = counter_index;
2618 new_counter_index->allocated = 0;
2619 list_add_tail(&new_counter_index->list,
2620 &ibdev->counters_table[i].counters_list);
2621 ibdev->counters_table[i].default_counter =
2622 counter_index;
2623 }
2624
2625 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2626 ib_num_ports++;
2627
2628 spin_lock_init(&ibdev->sm_lock);
2629 mutex_init(&ibdev->cap_mask_mutex);
2630 INIT_LIST_HEAD(&ibdev->qp_list);
2631 spin_lock_init(&ibdev->reset_flow_resource_lock);
2632
2633 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
2634 ib_num_ports) {
2635 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
2636 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
2637 MLX4_IB_UC_STEER_QPN_ALIGN,
2638 &ibdev->steer_qpn_base, 0);
2639 if (err)
2640 goto err_counter;
2641
2642 ibdev->ib_uc_qpns_bitmap =
2643 kmalloc_array(BITS_TO_LONGS(ibdev->steer_qpn_count),
2644 sizeof(long),
2645 GFP_KERNEL);
2646 if (!ibdev->ib_uc_qpns_bitmap) {
2647 dev_err(&dev->persist->pdev->dev,
2648 "bit map alloc failed\n");
2649 goto err_steer_qp_release;
2650 }
2651
2652 bitmap_zero(ibdev->ib_uc_qpns_bitmap, ibdev->steer_qpn_count);
2653
2654 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
2655 dev, ibdev->steer_qpn_base,
2656 ibdev->steer_qpn_base +
2657 ibdev->steer_qpn_count - 1);
2658 if (err)
2659 goto err_steer_free_bitmap;
2660 }
2661
2662 for (j = 1; j <= ibdev->dev->caps.num_ports; j++)
2663 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]);
2664
2665 if (mlx4_ib_alloc_diag_counters(ibdev))
2666 goto err_steer_free_bitmap;
2667
2668 if (ib_register_device(&ibdev->ib_dev, NULL))
2669 goto err_diag_counters;
2670
2671 if (mlx4_ib_mad_init(ibdev))
2672 goto err_reg;
2673
2674 if (mlx4_ib_init_sriov(ibdev))
2675 goto err_mad;
2676
2677 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE ||
2678 dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) {
2679 if (!iboe->nb.notifier_call) {
2680 iboe->nb.notifier_call = mlx4_ib_netdev_event;
2681 err = register_netdevice_notifier(&iboe->nb);
2682 if (err) {
2683 iboe->nb.notifier_call = NULL;
2684 goto err_notif;
2685 }
2686 }
2687 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) {
2688 err = mlx4_config_roce_v2_port(dev, ROCE_V2_UDP_DPORT);
2689 if (err) {
2690 goto err_notif;
2691 }
2692 }
2693 }
2694
2695 for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) {
2696 if (device_create_file(&ibdev->ib_dev.dev,
2697 mlx4_class_attributes[j]))
2698 goto err_notif;
2699 }
2700
2701 ibdev->ib_active = true;
2702
2703 if (mlx4_is_mfunc(ibdev->dev))
2704 init_pkeys(ibdev);
2705
2706 /* create paravirt contexts for any VFs which are active */
2707 if (mlx4_is_master(ibdev->dev)) {
2708 for (j = 0; j < MLX4_MFUNC_MAX; j++) {
2709 if (j == mlx4_master_func_num(ibdev->dev))
2710 continue;
2711 if (mlx4_is_slave_active(ibdev->dev, j))
2712 do_slave_init(ibdev, j, 1);
2713 }
2714 }
2715 return ibdev;
2716
2717 err_notif:
2718 if (ibdev->iboe.nb.notifier_call) {
2719 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2720 pr_warn("failure unregistering notifier\n");
2721 ibdev->iboe.nb.notifier_call = NULL;
2722 }
2723 flush_workqueue(wq);
2724
2725 mlx4_ib_close_sriov(ibdev);
2726
2727 err_mad:
2728 mlx4_ib_mad_cleanup(ibdev);
2729
2730 err_reg:
2731 ib_unregister_device(&ibdev->ib_dev);
2732
2733 err_diag_counters:
2734 mlx4_ib_diag_cleanup(ibdev);
2735
2736 err_steer_free_bitmap:
2737 kfree(ibdev->ib_uc_qpns_bitmap);
2738
2739 err_steer_qp_release:
2740 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
2741 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2742 ibdev->steer_qpn_count);
2743 err_counter:
2744 for (i = 0; i < ibdev->num_ports; ++i)
2745 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[i]);
2746
2747 err_map:
2748 iounmap(ibdev->uar_map);
2749
2750 err_uar:
2751 mlx4_uar_free(dev, &ibdev->priv_uar);
2752
2753 err_pd:
2754 mlx4_pd_free(dev, ibdev->priv_pdn);
2755
2756 err_dealloc:
2757 ib_dealloc_device(&ibdev->ib_dev);
2758
2759 return NULL;
2760 }
2761
mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev * dev,int count,int * qpn)2762 int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
2763 {
2764 int offset;
2765
2766 WARN_ON(!dev->ib_uc_qpns_bitmap);
2767
2768 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
2769 dev->steer_qpn_count,
2770 get_count_order(count));
2771 if (offset < 0)
2772 return offset;
2773
2774 *qpn = dev->steer_qpn_base + offset;
2775 return 0;
2776 }
2777
mlx4_ib_steer_qp_free(struct mlx4_ib_dev * dev,u32 qpn,int count)2778 void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
2779 {
2780 if (!qpn ||
2781 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
2782 return;
2783
2784 BUG_ON(qpn < dev->steer_qpn_base);
2785
2786 bitmap_release_region(dev->ib_uc_qpns_bitmap,
2787 qpn - dev->steer_qpn_base,
2788 get_count_order(count));
2789 }
2790
mlx4_ib_steer_qp_reg(struct mlx4_ib_dev * mdev,struct mlx4_ib_qp * mqp,int is_attach)2791 int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
2792 int is_attach)
2793 {
2794 int err;
2795 size_t flow_size;
2796 struct ib_flow_attr *flow = NULL;
2797 struct ib_flow_spec_ib *ib_spec;
2798
2799 if (is_attach) {
2800 flow_size = sizeof(struct ib_flow_attr) +
2801 sizeof(struct ib_flow_spec_ib);
2802 flow = kzalloc(flow_size, GFP_KERNEL);
2803 if (!flow)
2804 return -ENOMEM;
2805 flow->port = mqp->port;
2806 flow->num_of_specs = 1;
2807 flow->size = flow_size;
2808 ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
2809 ib_spec->type = IB_FLOW_SPEC_IB;
2810 ib_spec->size = sizeof(struct ib_flow_spec_ib);
2811 /* Add an empty rule for IB L2 */
2812 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
2813
2814 err = __mlx4_ib_create_flow(&mqp->ibqp, flow,
2815 IB_FLOW_DOMAIN_NIC,
2816 MLX4_FS_REGULAR,
2817 &mqp->reg_id);
2818 } else {
2819 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
2820 }
2821 kfree(flow);
2822 return err;
2823 }
2824
mlx4_ib_remove(struct mlx4_dev * dev,void * ibdev_ptr)2825 static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
2826 {
2827 struct mlx4_ib_dev *ibdev = ibdev_ptr;
2828 int p;
2829
2830 ibdev->ib_active = false;
2831 flush_workqueue(wq);
2832
2833 mlx4_ib_close_sriov(ibdev);
2834 mlx4_ib_mad_cleanup(ibdev);
2835 ib_unregister_device(&ibdev->ib_dev);
2836 mlx4_ib_diag_cleanup(ibdev);
2837 if (ibdev->iboe.nb.notifier_call) {
2838 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2839 pr_warn("failure unregistering notifier\n");
2840 ibdev->iboe.nb.notifier_call = NULL;
2841 }
2842
2843 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) {
2844 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2845 ibdev->steer_qpn_count);
2846 kfree(ibdev->ib_uc_qpns_bitmap);
2847 }
2848
2849 iounmap(ibdev->uar_map);
2850 for (p = 0; p < ibdev->num_ports; ++p)
2851 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[p]);
2852
2853 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
2854 mlx4_CLOSE_PORT(dev, p);
2855
2856 mlx4_ib_free_eqs(dev, ibdev);
2857
2858 mlx4_uar_free(dev, &ibdev->priv_uar);
2859 mlx4_pd_free(dev, ibdev->priv_pdn);
2860 ib_dealloc_device(&ibdev->ib_dev);
2861 }
2862
do_slave_init(struct mlx4_ib_dev * ibdev,int slave,int do_init)2863 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
2864 {
2865 struct mlx4_ib_demux_work **dm = NULL;
2866 struct mlx4_dev *dev = ibdev->dev;
2867 int i;
2868 unsigned long flags;
2869 struct mlx4_active_ports actv_ports;
2870 unsigned int ports;
2871 unsigned int first_port;
2872
2873 if (!mlx4_is_master(dev))
2874 return;
2875
2876 actv_ports = mlx4_get_active_ports(dev, slave);
2877 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports);
2878 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports);
2879
2880 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC);
2881 if (!dm) {
2882 pr_err("failed to allocate memory for tunneling qp update\n");
2883 return;
2884 }
2885
2886 for (i = 0; i < ports; i++) {
2887 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
2888 if (!dm[i]) {
2889 pr_err("failed to allocate memory for tunneling qp update work struct\n");
2890 while (--i >= 0)
2891 kfree(dm[i]);
2892 goto out;
2893 }
2894 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
2895 dm[i]->port = first_port + i + 1;
2896 dm[i]->slave = slave;
2897 dm[i]->do_init = do_init;
2898 dm[i]->dev = ibdev;
2899 }
2900 /* initialize or tear down tunnel QPs for the slave */
2901 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
2902 if (!ibdev->sriov.is_going_down) {
2903 for (i = 0; i < ports; i++)
2904 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
2905 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
2906 } else {
2907 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
2908 for (i = 0; i < ports; i++)
2909 kfree(dm[i]);
2910 }
2911 out:
2912 kfree(dm);
2913 return;
2914 }
2915
mlx4_ib_handle_catas_error(struct mlx4_ib_dev * ibdev)2916 static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev)
2917 {
2918 struct mlx4_ib_qp *mqp;
2919 unsigned long flags_qp;
2920 unsigned long flags_cq;
2921 struct mlx4_ib_cq *send_mcq, *recv_mcq;
2922 struct list_head cq_notify_list;
2923 struct mlx4_cq *mcq;
2924 unsigned long flags;
2925
2926 pr_warn("mlx4_ib_handle_catas_error was started\n");
2927 INIT_LIST_HEAD(&cq_notify_list);
2928
2929 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/
2930 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags);
2931
2932 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) {
2933 spin_lock_irqsave(&mqp->sq.lock, flags_qp);
2934 if (mqp->sq.tail != mqp->sq.head) {
2935 send_mcq = to_mcq(mqp->ibqp.send_cq);
2936 spin_lock_irqsave(&send_mcq->lock, flags_cq);
2937 if (send_mcq->mcq.comp &&
2938 mqp->ibqp.send_cq->comp_handler) {
2939 if (!send_mcq->mcq.reset_notify_added) {
2940 send_mcq->mcq.reset_notify_added = 1;
2941 list_add_tail(&send_mcq->mcq.reset_notify,
2942 &cq_notify_list);
2943 }
2944 }
2945 spin_unlock_irqrestore(&send_mcq->lock, flags_cq);
2946 }
2947 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp);
2948 /* Now, handle the QP's receive queue */
2949 spin_lock_irqsave(&mqp->rq.lock, flags_qp);
2950 /* no handling is needed for SRQ */
2951 if (!mqp->ibqp.srq) {
2952 if (mqp->rq.tail != mqp->rq.head) {
2953 recv_mcq = to_mcq(mqp->ibqp.recv_cq);
2954 spin_lock_irqsave(&recv_mcq->lock, flags_cq);
2955 if (recv_mcq->mcq.comp &&
2956 mqp->ibqp.recv_cq->comp_handler) {
2957 if (!recv_mcq->mcq.reset_notify_added) {
2958 recv_mcq->mcq.reset_notify_added = 1;
2959 list_add_tail(&recv_mcq->mcq.reset_notify,
2960 &cq_notify_list);
2961 }
2962 }
2963 spin_unlock_irqrestore(&recv_mcq->lock,
2964 flags_cq);
2965 }
2966 }
2967 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp);
2968 }
2969
2970 list_for_each_entry(mcq, &cq_notify_list, reset_notify) {
2971 mcq->comp(mcq);
2972 }
2973 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags);
2974 pr_warn("mlx4_ib_handle_catas_error ended\n");
2975 }
2976
handle_bonded_port_state_event(struct work_struct * work)2977 static void handle_bonded_port_state_event(struct work_struct *work)
2978 {
2979 struct ib_event_work *ew =
2980 container_of(work, struct ib_event_work, work);
2981 struct mlx4_ib_dev *ibdev = ew->ib_dev;
2982 enum ib_port_state bonded_port_state = IB_PORT_NOP;
2983 int i;
2984 struct ib_event ibev;
2985
2986 kfree(ew);
2987 spin_lock_bh(&ibdev->iboe.lock);
2988 for (i = 0; i < MLX4_MAX_PORTS; ++i) {
2989 if_t curr_netdev = ibdev->iboe.netdevs[i];
2990 enum ib_port_state curr_port_state;
2991
2992 if (!curr_netdev)
2993 continue;
2994
2995 curr_port_state =
2996 ((if_getdrvflags(curr_netdev) & IFF_DRV_RUNNING) != 0 &&
2997 if_getlinkstate(curr_netdev) == LINK_STATE_UP) ?
2998 IB_PORT_ACTIVE : IB_PORT_DOWN;
2999
3000 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ?
3001 curr_port_state : IB_PORT_ACTIVE;
3002 }
3003 spin_unlock_bh(&ibdev->iboe.lock);
3004
3005 ibev.device = &ibdev->ib_dev;
3006 ibev.element.port_num = 1;
3007 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ?
3008 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
3009
3010 ib_dispatch_event(&ibev);
3011 }
3012
mlx4_ib_sl2vl_update(struct mlx4_ib_dev * mdev,int port)3013 void mlx4_ib_sl2vl_update(struct mlx4_ib_dev *mdev, int port)
3014 {
3015 u64 sl2vl;
3016 int err;
3017
3018 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, port, &sl2vl);
3019 if (err) {
3020 pr_err("Unable to get current sl to vl mapping for port %d. Using all zeroes (%d)\n",
3021 port, err);
3022 sl2vl = 0;
3023 }
3024 atomic64_set(&mdev->sl2vl[port - 1], sl2vl);
3025 }
3026
ib_sl2vl_update_work(struct work_struct * work)3027 static void ib_sl2vl_update_work(struct work_struct *work)
3028 {
3029 struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
3030 struct mlx4_ib_dev *mdev = ew->ib_dev;
3031 int port = ew->port;
3032
3033 mlx4_ib_sl2vl_update(mdev, port);
3034
3035 kfree(ew);
3036 }
3037
mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev * ibdev,int port)3038 void mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev *ibdev,
3039 int port)
3040 {
3041 struct ib_event_work *ew;
3042
3043 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
3044 if (ew) {
3045 INIT_WORK(&ew->work, ib_sl2vl_update_work);
3046 ew->port = port;
3047 ew->ib_dev = ibdev;
3048 queue_work(wq, &ew->work);
3049 } else {
3050 pr_err("failed to allocate memory for sl2vl update work\n");
3051 }
3052 }
3053
mlx4_ib_event(struct mlx4_dev * dev,void * ibdev_ptr,enum mlx4_dev_event event,unsigned long param)3054 static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
3055 enum mlx4_dev_event event, unsigned long param)
3056 {
3057 struct ib_event ibev;
3058 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
3059 struct mlx4_eqe *eqe = NULL;
3060 struct ib_event_work *ew;
3061 int p = 0;
3062
3063 if (mlx4_is_bonded(dev) &&
3064 ((event == MLX4_DEV_EVENT_PORT_UP) ||
3065 (event == MLX4_DEV_EVENT_PORT_DOWN))) {
3066 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
3067 if (!ew)
3068 return;
3069 INIT_WORK(&ew->work, handle_bonded_port_state_event);
3070 ew->ib_dev = ibdev;
3071 queue_work(wq, &ew->work);
3072 return;
3073 }
3074
3075 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
3076 eqe = (struct mlx4_eqe *)param;
3077 else
3078 p = (int) param;
3079
3080 switch (event) {
3081 case MLX4_DEV_EVENT_PORT_UP:
3082 if (p > ibdev->num_ports)
3083 return;
3084 if (!mlx4_is_slave(dev) &&
3085 rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
3086 IB_LINK_LAYER_INFINIBAND) {
3087 if (mlx4_is_master(dev))
3088 mlx4_ib_invalidate_all_guid_record(ibdev, p);
3089 if (ibdev->dev->flags & MLX4_FLAG_SECURE_HOST &&
3090 !(ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT))
3091 mlx4_sched_ib_sl2vl_update_work(ibdev, p);
3092 }
3093 ibev.event = IB_EVENT_PORT_ACTIVE;
3094 break;
3095
3096 case MLX4_DEV_EVENT_PORT_DOWN:
3097 if (p > ibdev->num_ports)
3098 return;
3099 ibev.event = IB_EVENT_PORT_ERR;
3100 break;
3101
3102 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
3103 ibdev->ib_active = false;
3104 ibev.event = IB_EVENT_DEVICE_FATAL;
3105 mlx4_ib_handle_catas_error(ibdev);
3106 break;
3107
3108 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
3109 ew = kmalloc(sizeof *ew, GFP_ATOMIC);
3110 if (!ew) {
3111 pr_err("failed to allocate memory for events work\n");
3112 break;
3113 }
3114
3115 INIT_WORK(&ew->work, handle_port_mgmt_change_event);
3116 memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
3117 ew->ib_dev = ibdev;
3118 /* need to queue only for port owner, which uses GEN_EQE */
3119 if (mlx4_is_master(dev))
3120 queue_work(wq, &ew->work);
3121 else
3122 handle_port_mgmt_change_event(&ew->work);
3123 return;
3124
3125 case MLX4_DEV_EVENT_SLAVE_INIT:
3126 /* here, p is the slave id */
3127 do_slave_init(ibdev, p, 1);
3128 if (mlx4_is_master(dev)) {
3129 int i;
3130
3131 for (i = 1; i <= ibdev->num_ports; i++) {
3132 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
3133 == IB_LINK_LAYER_INFINIBAND)
3134 mlx4_ib_slave_alias_guid_event(ibdev,
3135 p, i,
3136 1);
3137 }
3138 }
3139 return;
3140
3141 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
3142 if (mlx4_is_master(dev)) {
3143 int i;
3144
3145 for (i = 1; i <= ibdev->num_ports; i++) {
3146 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
3147 == IB_LINK_LAYER_INFINIBAND)
3148 mlx4_ib_slave_alias_guid_event(ibdev,
3149 p, i,
3150 0);
3151 }
3152 }
3153 /* here, p is the slave id */
3154 do_slave_init(ibdev, p, 0);
3155 return;
3156
3157 default:
3158 return;
3159 }
3160
3161 ibev.device = ibdev_ptr;
3162 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p;
3163
3164 ib_dispatch_event(&ibev);
3165 }
3166
3167 static struct mlx4_interface mlx4_ib_interface = {
3168 .add = mlx4_ib_add,
3169 .remove = mlx4_ib_remove,
3170 .event = mlx4_ib_event,
3171 .protocol = MLX4_PROT_IB_IPV6,
3172 .flags = MLX4_INTFF_BONDING
3173 };
3174
mlx4_ib_init(void)3175 static int __init mlx4_ib_init(void)
3176 {
3177 int err;
3178
3179 wq = alloc_ordered_workqueue("mlx4_ib", WQ_MEM_RECLAIM);
3180 if (!wq)
3181 return -ENOMEM;
3182
3183 err = mlx4_ib_mcg_init();
3184 if (err)
3185 goto clean_wq;
3186
3187 err = mlx4_register_interface(&mlx4_ib_interface);
3188 if (err)
3189 goto clean_mcg;
3190
3191 return 0;
3192
3193 clean_mcg:
3194 mlx4_ib_mcg_destroy();
3195
3196 clean_wq:
3197 destroy_workqueue(wq);
3198 return err;
3199 }
3200
mlx4_ib_cleanup(void)3201 static void __exit mlx4_ib_cleanup(void)
3202 {
3203 mlx4_unregister_interface(&mlx4_ib_interface);
3204 mlx4_ib_mcg_destroy();
3205 destroy_workqueue(wq);
3206 }
3207
3208 module_init_order(mlx4_ib_init, SI_ORDER_SEVENTH);
3209 module_exit_order(mlx4_ib_cleanup, SI_ORDER_SEVENTH);
3210
3211 static int
mlx4ib_evhand(module_t mod,int event,void * arg)3212 mlx4ib_evhand(module_t mod, int event, void *arg)
3213 {
3214 return (0);
3215 }
3216
3217 static moduledata_t mlx4ib_mod = {
3218 .name = "mlx4ib",
3219 .evhand = mlx4ib_evhand,
3220 };
3221
3222 DECLARE_MODULE(mlx4ib, mlx4ib_mod, SI_SUB_LAST, SI_ORDER_ANY);
3223 MODULE_DEPEND(mlx4ib, mlx4, 1, 1, 1);
3224 MODULE_DEPEND(mlx4ib, ibcore, 1, 1, 1);
3225 MODULE_DEPEND(mlx4ib, linuxkpi, 1, 1, 1);
3226