xref: /freebsd/sys/contrib/dev/athk/ath10k/core.h (revision 6c61f58562b932eb46b2e05b2f5a82d34250435a)
1 /* SPDX-License-Identifier: ISC */
2 /*
3  * Copyright (c) 2005-2011 Atheros Communications Inc.
4  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5  * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
6  * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
7  */
8 
9 #ifndef _CORE_H_
10 #define _CORE_H_
11 
12 #include <linux/completion.h>
13 #include <linux/if_ether.h>
14 #include <linux/types.h>
15 #include <linux/pci.h>
16 #include <linux/uuid.h>
17 #include <linux/time.h>
18 #include <linux/leds.h>
19 
20 #include "htt.h"
21 #include "htc.h"
22 #include "hw.h"
23 #include "targaddrs.h"
24 #include "wmi.h"
25 #include "../ath.h"
26 #include "../regd.h"
27 #include "../dfs_pattern_detector.h"
28 #include "spectral.h"
29 #include "thermal.h"
30 #include "wow.h"
31 #include "swap.h"
32 
33 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
34 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
35 #define WO(_f)      ((_f##_OFFSET) >> 2)
36 
37 #define ATH10K_SCAN_ID 0
38 #define ATH10K_SCAN_CHANNEL_SWITCH_WMI_EVT_OVERHEAD 10 /* msec */
39 #define WMI_READY_TIMEOUT (5 * HZ)
40 #define ATH10K_FLUSH_TIMEOUT_HZ (5 * HZ)
41 #define ATH10K_CONNECTION_LOSS_HZ (3 * HZ)
42 #define ATH10K_NUM_CHANS 41
43 #define ATH10K_MAX_5G_CHAN 173
44 
45 #if defined(CONFIG_FWLOG)
46 #define ATH10K_FWLOG_MODULE_ID_MAX_10_2_4 28
47 #define ATH10K_FWLOG_MODULE_ID_MAX_10_4 35
48 #endif
49 
50 /* Antenna noise floor */
51 #define ATH10K_DEFAULT_NOISE_FLOOR -95
52 
53 #define ATH10K_INVALID_RSSI 128
54 
55 #define ATH10K_MAX_NUM_MGMT_PENDING 128
56 
57 /* number of failed packets (20 packets with 16 sw reties each) */
58 #define ATH10K_KICKOUT_THRESHOLD (20 * 16)
59 
60 /*
61  * Use insanely high numbers to make sure that the firmware implementation
62  * won't start, we have the same functionality already in hostapd. Unit
63  * is seconds.
64  */
65 #define ATH10K_KEEPALIVE_MIN_IDLE 3747
66 #define ATH10K_KEEPALIVE_MAX_IDLE 3895
67 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900
68 
69 /* SMBIOS type containing Board Data File Name Extension */
70 #define ATH10K_SMBIOS_BDF_EXT_TYPE 0xF8
71 
72 /* SMBIOS type structure length (excluding strings-set) */
73 #define ATH10K_SMBIOS_BDF_EXT_LENGTH 0x9
74 
75 /* Offset pointing to Board Data File Name Extension */
76 #define ATH10K_SMBIOS_BDF_EXT_OFFSET 0x8
77 
78 /* Board Data File Name Extension string length.
79  * String format: BDF_<Customer ID>_<Extension>\0
80  */
81 #define ATH10K_SMBIOS_BDF_EXT_STR_LENGTH 0x20
82 
83 /* The magic used by QCA spec */
84 #define ATH10K_SMBIOS_BDF_EXT_MAGIC "BDF_"
85 
86 /* Default Airtime weight multiplier (Tuned for multiclient performance) */
87 #define ATH10K_AIRTIME_WEIGHT_MULTIPLIER  4
88 
89 #define ATH10K_MAX_RETRY_COUNT 30
90 
91 #define ATH10K_ITER_NORMAL_FLAGS (IEEE80211_IFACE_ITER_NORMAL | \
92 				  IEEE80211_IFACE_SKIP_SDATA_NOT_IN_DRIVER)
93 #define ATH10K_ITER_RESUME_FLAGS (IEEE80211_IFACE_ITER_RESUME_ALL |\
94 				  IEEE80211_IFACE_SKIP_SDATA_NOT_IN_DRIVER)
95 #define ATH10K_RECOVERY_TIMEOUT_HZ			(5 * HZ)
96 #define ATH10K_RECOVERY_MAX_FAIL_COUNT			4
97 
98 struct ath10k;
99 
ath10k_bus_str(enum ath10k_bus bus)100 static inline const char *ath10k_bus_str(enum ath10k_bus bus)
101 {
102 	switch (bus) {
103 	case ATH10K_BUS_PCI:
104 		return "pci";
105 	case ATH10K_BUS_AHB:
106 		return "ahb";
107 	case ATH10K_BUS_SDIO:
108 		return "sdio";
109 	case ATH10K_BUS_USB:
110 		return "usb";
111 	case ATH10K_BUS_SNOC:
112 		return "snoc";
113 	}
114 
115 	return "unknown";
116 }
117 
118 enum ath10k_skb_flags {
119 	ATH10K_SKB_F_NO_HWCRYPT = BIT(0),
120 	ATH10K_SKB_F_DTIM_ZERO = BIT(1),
121 	ATH10K_SKB_F_DELIVER_CAB = BIT(2),
122 	ATH10K_SKB_F_MGMT = BIT(3),
123 	ATH10K_SKB_F_QOS = BIT(4),
124 	ATH10K_SKB_F_RAW_TX = BIT(5),
125 	ATH10K_SKB_F_NOACK_TID = BIT(6),
126 };
127 
128 struct ath10k_skb_cb {
129 	dma_addr_t paddr;
130 	u8 flags;
131 	u8 eid;
132 	u16 msdu_id;
133 	u16 airtime_est;
134 	struct ieee80211_vif *vif;
135 	struct ieee80211_txq *txq;
136 	u32 ucast_cipher;
137 } __packed;
138 
139 struct ath10k_skb_rxcb {
140 	dma_addr_t paddr;
141 	struct hlist_node hlist;
142 	u8 eid;
143 };
144 
ATH10K_SKB_CB(struct sk_buff * skb)145 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
146 {
147 	BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
148 		     IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
149 	return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
150 }
151 
ATH10K_SKB_RXCB(struct sk_buff * skb)152 static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb)
153 {
154 	BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb));
155 	return (struct ath10k_skb_rxcb *)skb->cb;
156 }
157 
158 #define ATH10K_RXCB_SKB(rxcb) \
159 		container_of((void *)rxcb, struct sk_buff, cb)
160 
host_interest_item_address(u32 item_offset)161 static inline u32 host_interest_item_address(u32 item_offset)
162 {
163 	return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
164 }
165 
166 enum ath10k_phy_mode {
167 	ATH10K_PHY_MODE_LEGACY = 0,
168 	ATH10K_PHY_MODE_HT = 1,
169 	ATH10K_PHY_MODE_VHT = 2,
170 };
171 
172 /* Data rate 100KBPS based on IE Index */
173 struct ath10k_index_ht_data_rate_type {
174 	u8   beacon_rate_index;
175 	u16  supported_rate[4];
176 };
177 
178 /* Data rate 100KBPS based on IE Index */
179 struct ath10k_index_vht_data_rate_type {
180 	u8   beacon_rate_index;
181 	u16  supported_VHT80_rate[2];
182 	u16  supported_VHT40_rate[2];
183 	u16  supported_VHT20_rate[2];
184 };
185 
186 struct ath10k_bmi {
187 	bool done_sent;
188 };
189 
190 struct ath10k_mem_chunk {
191 	void *vaddr;
192 	dma_addr_t paddr;
193 	u32 len;
194 	u32 req_id;
195 };
196 
197 struct ath10k_wmi {
198 	enum ath10k_htc_ep_id eid;
199 	struct completion service_ready;
200 	struct completion unified_ready;
201 	struct completion barrier;
202 	struct completion radar_confirm;
203 	wait_queue_head_t tx_credits_wq;
204 	DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX);
205 	struct wmi_cmd_map *cmd;
206 	struct wmi_vdev_param_map *vdev_param;
207 	struct wmi_pdev_param_map *pdev_param;
208 	struct wmi_peer_param_map *peer_param;
209 	const struct wmi_ops *ops;
210 	const struct wmi_peer_flags_map *peer_flags;
211 
212 	u32 mgmt_max_num_pending_tx;
213 
214 	/* Protected by data_lock */
215 	struct idr mgmt_pending_tx;
216 
217 	u32 num_mem_chunks;
218 	u32 rx_decap_mode;
219 	struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
220 };
221 
222 struct ath10k_fw_stats_peer {
223 	struct list_head list;
224 
225 	u8 peer_macaddr[ETH_ALEN];
226 	u32 peer_rssi;
227 	u32 peer_tx_rate;
228 	u32 peer_rx_rate; /* 10x only */
229 	u64 rx_duration;
230 };
231 
232 struct ath10k_fw_extd_stats_peer {
233 	struct list_head list;
234 
235 	u8 peer_macaddr[ETH_ALEN];
236 	u64 rx_duration;
237 };
238 
239 struct ath10k_fw_stats_vdev {
240 	struct list_head list;
241 
242 	u32 vdev_id;
243 	u32 beacon_snr;
244 	u32 data_snr;
245 	u32 num_tx_frames[4];
246 	u32 num_rx_frames;
247 	u32 num_tx_frames_retries[4];
248 	u32 num_tx_frames_failures[4];
249 	u32 num_rts_fail;
250 	u32 num_rts_success;
251 	u32 num_rx_err;
252 	u32 num_rx_discard;
253 	u32 num_tx_not_acked;
254 	u32 tx_rate_history[10];
255 	u32 beacon_rssi_history[10];
256 };
257 
258 struct ath10k_fw_stats_vdev_extd {
259 	struct list_head list;
260 
261 	u32 vdev_id;
262 	u32 ppdu_aggr_cnt;
263 	u32 ppdu_noack;
264 	u32 mpdu_queued;
265 	u32 ppdu_nonaggr_cnt;
266 	u32 mpdu_sw_requeued;
267 	u32 mpdu_suc_retry;
268 	u32 mpdu_suc_multitry;
269 	u32 mpdu_fail_retry;
270 	u32 tx_ftm_suc;
271 	u32 tx_ftm_suc_retry;
272 	u32 tx_ftm_fail;
273 	u32 rx_ftmr_cnt;
274 	u32 rx_ftmr_dup_cnt;
275 	u32 rx_iftmr_cnt;
276 	u32 rx_iftmr_dup_cnt;
277 };
278 
279 struct ath10k_fw_stats_pdev {
280 	struct list_head list;
281 
282 	/* PDEV stats */
283 	s32 ch_noise_floor;
284 	u32 tx_frame_count; /* Cycles spent transmitting frames */
285 	u32 rx_frame_count; /* Cycles spent receiving frames */
286 	u32 rx_clear_count; /* Total channel busy time, evidently */
287 	u32 cycle_count; /* Total on-channel time */
288 	u32 phy_err_count;
289 	u32 chan_tx_power;
290 	u32 ack_rx_bad;
291 	u32 rts_bad;
292 	u32 rts_good;
293 	u32 fcs_bad;
294 	u32 no_beacons;
295 	u32 mib_int_count;
296 
297 	/* PDEV TX stats */
298 	s32 comp_queued;
299 	s32 comp_delivered;
300 	s32 msdu_enqued;
301 	s32 mpdu_enqued;
302 	s32 wmm_drop;
303 	s32 local_enqued;
304 	s32 local_freed;
305 	s32 hw_queued;
306 	s32 hw_reaped;
307 	s32 underrun;
308 	u32 hw_paused;
309 	s32 tx_abort;
310 	s32 mpdus_requeued;
311 	u32 tx_ko;
312 	u32 data_rc;
313 	u32 self_triggers;
314 	u32 sw_retry_failure;
315 	u32 illgl_rate_phy_err;
316 	u32 pdev_cont_xretry;
317 	u32 pdev_tx_timeout;
318 	u32 pdev_resets;
319 	u32 phy_underrun;
320 	u32 txop_ovf;
321 	u32 seq_posted;
322 	u32 seq_failed_queueing;
323 	u32 seq_completed;
324 	u32 seq_restarted;
325 	u32 mu_seq_posted;
326 	u32 mpdus_sw_flush;
327 	u32 mpdus_hw_filter;
328 	u32 mpdus_truncated;
329 	u32 mpdus_ack_failed;
330 	u32 mpdus_expired;
331 
332 	/* PDEV RX stats */
333 	s32 mid_ppdu_route_change;
334 	s32 status_rcvd;
335 	s32 r0_frags;
336 	s32 r1_frags;
337 	s32 r2_frags;
338 	s32 r3_frags;
339 	s32 htt_msdus;
340 	s32 htt_mpdus;
341 	s32 loc_msdus;
342 	s32 loc_mpdus;
343 	s32 oversize_amsdu;
344 	s32 phy_errs;
345 	s32 phy_err_drop;
346 	s32 mpdu_errs;
347 	s32 rx_ovfl_errs;
348 };
349 
350 struct ath10k_fw_stats {
351 	bool extended;
352 	struct list_head pdevs;
353 	struct list_head vdevs;
354 	struct list_head peers;
355 	struct list_head peers_extd;
356 };
357 
358 #define ATH10K_TPC_TABLE_TYPE_FLAG	1
359 #define ATH10K_TPC_PREAM_TABLE_END	0xFFFF
360 
361 struct ath10k_tpc_table {
362 	u32 pream_idx[WMI_TPC_RATE_MAX];
363 	u8 rate_code[WMI_TPC_RATE_MAX];
364 	char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
365 };
366 
367 struct ath10k_tpc_stats {
368 	u32 reg_domain;
369 	u32 chan_freq;
370 	u32 phy_mode;
371 	u32 twice_antenna_reduction;
372 	u32 twice_max_rd_power;
373 	s32 twice_antenna_gain;
374 	u32 power_limit;
375 	u32 num_tx_chain;
376 	u32 ctl;
377 	u32 rate_max;
378 	u8 flag[WMI_TPC_FLAG];
379 	struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG];
380 };
381 
382 struct ath10k_tpc_table_final {
383 	u32 pream_idx[WMI_TPC_FINAL_RATE_MAX];
384 	u8 rate_code[WMI_TPC_FINAL_RATE_MAX];
385 	char tpc_value[WMI_TPC_FINAL_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
386 };
387 
388 struct ath10k_tpc_stats_final {
389 	u32 reg_domain;
390 	u32 chan_freq;
391 	u32 phy_mode;
392 	u32 twice_antenna_reduction;
393 	u32 twice_max_rd_power;
394 	s32 twice_antenna_gain;
395 	u32 power_limit;
396 	u32 num_tx_chain;
397 	u32 ctl;
398 	u32 rate_max;
399 	u8 flag[WMI_TPC_FLAG];
400 	struct ath10k_tpc_table_final tpc_table_final[WMI_TPC_FLAG];
401 };
402 
403 struct ath10k_dfs_stats {
404 	u32 phy_errors;
405 	u32 pulses_total;
406 	u32 pulses_detected;
407 	u32 pulses_discarded;
408 	u32 radar_detected;
409 };
410 
411 enum ath10k_radar_confirmation_state {
412 	ATH10K_RADAR_CONFIRMATION_IDLE = 0,
413 	ATH10K_RADAR_CONFIRMATION_INPROGRESS,
414 	ATH10K_RADAR_CONFIRMATION_STOPPED,
415 };
416 
417 struct ath10k_radar_found_info {
418 	u32 pri_min;
419 	u32 pri_max;
420 	u32 width_min;
421 	u32 width_max;
422 	u32 sidx_min;
423 	u32 sidx_max;
424 };
425 
426 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
427 
428 struct ath10k_peer {
429 	struct list_head list;
430 	struct ieee80211_vif *vif;
431 	struct ieee80211_sta *sta;
432 
433 	bool removed;
434 	int vdev_id;
435 	u8 addr[ETH_ALEN];
436 	DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
437 
438 	/* protected by ar->data_lock */
439 	struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
440 	union htt_rx_pn_t tids_last_pn[ATH10K_TXRX_NUM_EXT_TIDS];
441 	bool tids_last_pn_valid[ATH10K_TXRX_NUM_EXT_TIDS];
442 	union htt_rx_pn_t frag_tids_last_pn[ATH10K_TXRX_NUM_EXT_TIDS];
443 	u32 frag_tids_seq[ATH10K_TXRX_NUM_EXT_TIDS];
444 	struct {
445 		enum htt_security_types sec_type;
446 		int pn_len;
447 	} rx_pn[ATH10K_HTT_TXRX_PEER_SECURITY_MAX];
448 };
449 
450 struct ath10k_txq {
451 	struct list_head list;
452 	unsigned long num_fw_queued;
453 	unsigned long num_push_allowed;
454 };
455 
456 enum ath10k_pkt_rx_err {
457 	ATH10K_PKT_RX_ERR_FCS,
458 	ATH10K_PKT_RX_ERR_TKIP,
459 	ATH10K_PKT_RX_ERR_CRYPT,
460 	ATH10K_PKT_RX_ERR_PEER_IDX_INVAL,
461 	ATH10K_PKT_RX_ERR_MAX,
462 };
463 
464 enum ath10k_ampdu_subfrm_num {
465 	ATH10K_AMPDU_SUBFRM_NUM_10,
466 	ATH10K_AMPDU_SUBFRM_NUM_20,
467 	ATH10K_AMPDU_SUBFRM_NUM_30,
468 	ATH10K_AMPDU_SUBFRM_NUM_40,
469 	ATH10K_AMPDU_SUBFRM_NUM_50,
470 	ATH10K_AMPDU_SUBFRM_NUM_60,
471 	ATH10K_AMPDU_SUBFRM_NUM_MORE,
472 	ATH10K_AMPDU_SUBFRM_NUM_MAX,
473 };
474 
475 enum ath10k_amsdu_subfrm_num {
476 	ATH10K_AMSDU_SUBFRM_NUM_1,
477 	ATH10K_AMSDU_SUBFRM_NUM_2,
478 	ATH10K_AMSDU_SUBFRM_NUM_3,
479 	ATH10K_AMSDU_SUBFRM_NUM_4,
480 	ATH10K_AMSDU_SUBFRM_NUM_MORE,
481 	ATH10K_AMSDU_SUBFRM_NUM_MAX,
482 };
483 
484 struct ath10k_sta_tid_stats {
485 	unsigned long rx_pkt_from_fw;
486 	unsigned long rx_pkt_unchained;
487 	unsigned long rx_pkt_drop_chained;
488 	unsigned long rx_pkt_drop_filter;
489 	unsigned long rx_pkt_err[ATH10K_PKT_RX_ERR_MAX];
490 	unsigned long rx_pkt_queued_for_mac;
491 	unsigned long rx_pkt_ampdu[ATH10K_AMPDU_SUBFRM_NUM_MAX];
492 	unsigned long rx_pkt_amsdu[ATH10K_AMSDU_SUBFRM_NUM_MAX];
493 };
494 
495 enum ath10k_counter_type {
496 	ATH10K_COUNTER_TYPE_BYTES,
497 	ATH10K_COUNTER_TYPE_PKTS,
498 	ATH10K_COUNTER_TYPE_MAX,
499 };
500 
501 enum ath10k_stats_type {
502 	ATH10K_STATS_TYPE_SUCC,
503 	ATH10K_STATS_TYPE_FAIL,
504 	ATH10K_STATS_TYPE_RETRY,
505 	ATH10K_STATS_TYPE_AMPDU,
506 	ATH10K_STATS_TYPE_MAX,
507 };
508 
509 struct ath10k_htt_data_stats {
510 	u64 legacy[ATH10K_COUNTER_TYPE_MAX][ATH10K_LEGACY_NUM];
511 	u64 ht[ATH10K_COUNTER_TYPE_MAX][ATH10K_HT_MCS_NUM];
512 	u64 vht[ATH10K_COUNTER_TYPE_MAX][ATH10K_VHT_MCS_NUM];
513 	u64 bw[ATH10K_COUNTER_TYPE_MAX][ATH10K_BW_NUM];
514 	u64 nss[ATH10K_COUNTER_TYPE_MAX][ATH10K_NSS_NUM];
515 	u64 gi[ATH10K_COUNTER_TYPE_MAX][ATH10K_GI_NUM];
516 	u64 rate_table[ATH10K_COUNTER_TYPE_MAX][ATH10K_RATE_TABLE_NUM];
517 };
518 
519 struct ath10k_htt_tx_stats {
520 	struct ath10k_htt_data_stats stats[ATH10K_STATS_TYPE_MAX];
521 	u64 tx_duration;
522 	u64 ba_fails;
523 	u64 ack_fails;
524 };
525 
526 #define ATH10K_TID_MAX	8
527 
528 struct ath10k_sta {
529 	struct ath10k_vif *arvif;
530 
531 	/* the following are protected by ar->data_lock */
532 	u32 changed; /* IEEE80211_RC_* */
533 	u32 bw;
534 	u32 nss;
535 	u32 smps;
536 	u16 peer_id;
537 	struct rate_info txrate;
538 	struct ieee80211_tx_info tx_info;
539 	u32 tx_retries;
540 	u32 tx_failed;
541 	u32 last_tx_bitrate;
542 
543 	u32 rx_rate_code;
544 	u32 rx_bitrate_kbps;
545 	u32 tx_rate_code;
546 	u32 tx_bitrate_kbps;
547 	struct work_struct update_wk;
548 	u64 rx_duration;
549 	struct ath10k_htt_tx_stats *tx_stats;
550 	u32 ucast_cipher;
551 
552 #ifdef CONFIG_MAC80211_DEBUGFS
553 	/* protected by conf_mutex */
554 	bool aggr_mode;
555 
556 	/* Protected with ar->data_lock */
557 	struct ath10k_sta_tid_stats tid_stats[IEEE80211_NUM_TIDS + 1];
558 #endif
559 	/* Protected with ar->data_lock */
560 	u32 peer_ps_state;
561 	struct work_struct tid_config_wk;
562 	int noack[ATH10K_TID_MAX];
563 	int retry_long[ATH10K_TID_MAX];
564 	int ampdu[ATH10K_TID_MAX];
565 	u8 rate_ctrl[ATH10K_TID_MAX];
566 	u32 rate_code[ATH10K_TID_MAX];
567 	int rtscts[ATH10K_TID_MAX];
568 };
569 
570 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ	(5 * HZ)
571 #define ATH10K_VDEV_DELETE_TIMEOUT_HZ	(5 * HZ)
572 
573 enum ath10k_beacon_state {
574 	ATH10K_BEACON_SCHEDULED = 0,
575 	ATH10K_BEACON_SENDING,
576 	ATH10K_BEACON_SENT,
577 };
578 
579 struct ath10k_vif {
580 	struct list_head list;
581 
582 	u32 vdev_id;
583 	u16 peer_id;
584 	enum wmi_vdev_type vdev_type;
585 	enum wmi_vdev_subtype vdev_subtype;
586 	u32 beacon_interval;
587 	u32 dtim_period;
588 	struct sk_buff *beacon;
589 	/* protected by data_lock */
590 	enum ath10k_beacon_state beacon_state;
591 	void *beacon_buf;
592 	dma_addr_t beacon_paddr;
593 	unsigned long tx_paused; /* arbitrary values defined by target */
594 
595 	struct ath10k *ar;
596 	struct ieee80211_vif *vif;
597 
598 	bool is_started;
599 	bool is_up;
600 	bool spectral_enabled;
601 	bool ps;
602 	u32 aid;
603 	u8 bssid[ETH_ALEN];
604 
605 	struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
606 	s8 def_wep_key_idx;
607 
608 	u16 tx_seq_no;
609 
610 	union {
611 		struct {
612 			u32 uapsd;
613 		} sta;
614 		struct {
615 			/* 512 stations */
616 			u8 tim_bitmap[64];
617 			u8 tim_len;
618 			u32 ssid_len;
619 			u8 ssid[IEEE80211_MAX_SSID_LEN] __nonstring;
620 			bool hidden_ssid;
621 			/* P2P_IE with NoA attribute for P2P_GO case */
622 			u32 noa_len;
623 			u8 *noa_data;
624 		} ap;
625 	} u;
626 
627 	bool use_cts_prot;
628 	bool nohwcrypt;
629 	int num_legacy_stations;
630 	int txpower;
631 	bool ftm_responder;
632 	struct wmi_wmm_params_all_arg wmm_params;
633 	struct work_struct ap_csa_work;
634 	struct delayed_work connection_loss_work;
635 	struct cfg80211_bitrate_mask bitrate_mask;
636 
637 	/* For setting VHT peer fixed rate, protected by conf_mutex */
638 	int vht_num_rates;
639 	u8 vht_pfr;
640 	u32 tid_conf_changed[ATH10K_TID_MAX];
641 	int noack[ATH10K_TID_MAX];
642 	int retry_long[ATH10K_TID_MAX];
643 	int ampdu[ATH10K_TID_MAX];
644 	u8 rate_ctrl[ATH10K_TID_MAX];
645 	u32 rate_code[ATH10K_TID_MAX];
646 	int rtscts[ATH10K_TID_MAX];
647 	u32 tids_rst;
648 };
649 
650 struct ath10k_vif_iter {
651 	u32 vdev_id;
652 	struct ath10k_vif *arvif;
653 };
654 
655 /* Copy Engine register dump, protected by ce-lock */
656 struct ath10k_ce_crash_data {
657 	__le32 base_addr;
658 	__le32 src_wr_idx;
659 	__le32 src_r_idx;
660 	__le32 dst_wr_idx;
661 	__le32 dst_r_idx;
662 };
663 
664 struct ath10k_ce_crash_hdr {
665 	__le32 ce_count;
666 	__le32 reserved[3]; /* for future use */
667 	struct ath10k_ce_crash_data entries[];
668 };
669 
670 #define MAX_MEM_DUMP_TYPE	5
671 
672 /* used for crash-dump storage, protected by data-lock */
673 struct ath10k_fw_crash_data {
674 	guid_t guid;
675 	struct timespec64 timestamp;
676 	__le32 registers[REG_DUMP_COUNT_QCA988X];
677 	struct ath10k_ce_crash_data ce_crash_data[CE_COUNT_MAX];
678 
679 	u8 *ramdump_buf;
680 	size_t ramdump_buf_len;
681 };
682 
683 struct ath10k_debug {
684 	struct dentry *debugfs_phy;
685 
686 	struct ath10k_fw_stats fw_stats;
687 	struct completion fw_stats_complete;
688 	bool fw_stats_done;
689 
690 	unsigned long htt_stats_mask;
691 	unsigned long reset_htt_stats;
692 	struct delayed_work htt_stats_dwork;
693 	struct ath10k_dfs_stats dfs_stats;
694 	struct ath_dfs_pool_stats dfs_pool_stats;
695 
696 	/* used for tpc-dump storage, protected by data-lock */
697 	struct ath10k_tpc_stats *tpc_stats;
698 	struct ath10k_tpc_stats_final *tpc_stats_final;
699 
700 	struct completion tpc_complete;
701 
702 	/* protected by conf_mutex */
703 	u64 fw_dbglog_mask;
704 	u32 fw_dbglog_level;
705 	u32 reg_addr;
706 	u32 nf_cal_period;
707 	void *cal_data;
708 	u32 enable_extd_tx_stats;
709 	u8 fw_dbglog_mode;
710 };
711 
712 enum ath10k_state {
713 	ATH10K_STATE_OFF = 0,
714 	ATH10K_STATE_ON,
715 
716 	/* When doing firmware recovery the device is first powered down.
717 	 * mac80211 is supposed to call in to start() hook later on. It is
718 	 * however possible that driver unloading and firmware crash overlap.
719 	 * mac80211 can wait on conf_mutex in stop() while the device is
720 	 * stopped in ath10k_core_restart() work holding conf_mutex. The state
721 	 * RESTARTED means that the device is up and mac80211 has started hw
722 	 * reconfiguration. Once mac80211 is done with the reconfiguration we
723 	 * set the state to STATE_ON in reconfig_complete().
724 	 */
725 	ATH10K_STATE_RESTARTING,
726 	ATH10K_STATE_RESTARTED,
727 
728 	/* The device has crashed while restarting hw. This state is like ON
729 	 * but commands are blocked in HTC and -ECOMM response is given. This
730 	 * prevents completion timeouts and makes the driver more responsive to
731 	 * userspace commands. This is also prevents recursive recovery.
732 	 */
733 	ATH10K_STATE_WEDGED,
734 
735 	/* factory tests */
736 	ATH10K_STATE_UTF,
737 };
738 
739 enum ath10k_firmware_mode {
740 	/* the default mode, standard 802.11 functionality */
741 	ATH10K_FIRMWARE_MODE_NORMAL,
742 
743 	/* factory tests etc */
744 	ATH10K_FIRMWARE_MODE_UTF,
745 };
746 
747 enum ath10k_fw_features {
748 	/* wmi_mgmt_rx_hdr contains extra RSSI information */
749 	ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,
750 
751 	/* Firmware from 10X branch. Deprecated, don't use in new code. */
752 	ATH10K_FW_FEATURE_WMI_10X = 1,
753 
754 	/* firmware support tx frame management over WMI, otherwise it's HTT */
755 	ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2,
756 
757 	/* Firmware does not support P2P */
758 	ATH10K_FW_FEATURE_NO_P2P = 3,
759 
760 	/* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature
761 	 * bit is required to be set as well. Deprecated, don't use in new
762 	 * code.
763 	 */
764 	ATH10K_FW_FEATURE_WMI_10_2 = 4,
765 
766 	/* Some firmware revisions lack proper multi-interface client powersave
767 	 * implementation. Enabling PS could result in connection drops,
768 	 * traffic stalls, etc.
769 	 */
770 	ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5,
771 
772 	/* Some firmware revisions have an incomplete WoWLAN implementation
773 	 * despite WMI service bit being advertised. This feature flag is used
774 	 * to distinguish whether WoWLAN is really supported or not.
775 	 */
776 	ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6,
777 
778 	/* Don't trust error code from otp.bin */
779 	ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7,
780 
781 	/* Some firmware revisions pad 4th hw address to 4 byte boundary making
782 	 * it 8 bytes long in Native Wifi Rx decap.
783 	 */
784 	ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8,
785 
786 	/* Firmware supports bypassing PLL setting on init. */
787 	ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9,
788 
789 	/* Raw mode support. If supported, FW supports receiving and transmitting
790 	 * frames in raw mode.
791 	 */
792 	ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10,
793 
794 	/* Firmware Supports Adaptive CCA*/
795 	ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11,
796 
797 	/* Firmware supports management frame protection */
798 	ATH10K_FW_FEATURE_MFP_SUPPORT = 12,
799 
800 	/* Firmware supports pull-push model where host shares it's software
801 	 * queue state with firmware and firmware generates fetch requests
802 	 * telling host which queues to dequeue tx from.
803 	 *
804 	 * Primary function of this is improved MU-MIMO performance with
805 	 * multiple clients.
806 	 */
807 	ATH10K_FW_FEATURE_PEER_FLOW_CONTROL = 13,
808 
809 	/* Firmware supports BT-Coex without reloading firmware via pdev param.
810 	 * To support Bluetooth coexistence pdev param, WMI_COEX_GPIO_SUPPORT of
811 	 * extended resource config should be enabled always. This firmware IE
812 	 * is used to configure WMI_COEX_GPIO_SUPPORT.
813 	 */
814 	ATH10K_FW_FEATURE_BTCOEX_PARAM = 14,
815 
816 	/* Unused flag and proven to be not working, enable this if you want
817 	 * to experiment sending NULL func data frames in HTT TX
818 	 */
819 	ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR = 15,
820 
821 	/* Firmware allow other BSS mesh broadcast/multicast frames without
822 	 * creating monitor interface. Appropriate rxfilters are programmed for
823 	 * mesh vdev by firmware itself. This feature flags will be used for
824 	 * not creating monitor vdev while configuring mesh node.
825 	 */
826 	ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST = 16,
827 
828 	/* Firmware does not support power save in station mode. */
829 	ATH10K_FW_FEATURE_NO_PS = 17,
830 
831 	/* Firmware allows management tx by reference instead of by value. */
832 	ATH10K_FW_FEATURE_MGMT_TX_BY_REF = 18,
833 
834 	/* Firmware load is done externally, not by bmi */
835 	ATH10K_FW_FEATURE_NON_BMI = 19,
836 
837 	/* Firmware sends only one chan_info event per channel */
838 	ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL = 20,
839 
840 	/* Firmware allows setting peer fixed rate */
841 	ATH10K_FW_FEATURE_PEER_FIXED_RATE = 21,
842 
843 	/* Firmware support IRAM recovery */
844 	ATH10K_FW_FEATURE_IRAM_RECOVERY = 22,
845 
846 	/* keep last */
847 	ATH10K_FW_FEATURE_COUNT,
848 };
849 
850 enum ath10k_dev_flags {
851 	/* Indicates that ath10k device is during CAC phase of DFS */
852 	ATH10K_CAC_RUNNING,
853 	ATH10K_FLAG_CORE_REGISTERED,
854 
855 	/* Device has crashed and needs to restart. This indicates any pending
856 	 * waiters should immediately cancel instead of waiting for a time out.
857 	 */
858 	ATH10K_FLAG_CRASH_FLUSH,
859 
860 	/* Use Raw mode instead of native WiFi Tx/Rx encap mode.
861 	 * Raw mode supports both hardware and software crypto. Native WiFi only
862 	 * supports hardware crypto.
863 	 */
864 	ATH10K_FLAG_RAW_MODE,
865 
866 	/* Disable HW crypto engine */
867 	ATH10K_FLAG_HW_CRYPTO_DISABLED,
868 
869 	/* Bluetooth coexistence enabled */
870 	ATH10K_FLAG_BTCOEX,
871 
872 	/* Per Station statistics service */
873 	ATH10K_FLAG_PEER_STATS,
874 
875 	/* protected by conf_mutex */
876 	ATH10K_FLAG_NAPI_ENABLED,
877 };
878 
879 enum ath10k_cal_mode {
880 	ATH10K_CAL_MODE_FILE,
881 	ATH10K_CAL_MODE_OTP,
882 	ATH10K_CAL_MODE_DT,
883 	ATH10K_CAL_MODE_NVMEM,
884 	ATH10K_PRE_CAL_MODE_FILE,
885 	ATH10K_PRE_CAL_MODE_DT,
886 	ATH10K_PRE_CAL_MODE_NVMEM,
887 	ATH10K_CAL_MODE_EEPROM,
888 };
889 
890 enum ath10k_crypt_mode {
891 	/* Only use hardware crypto engine */
892 	ATH10K_CRYPT_MODE_HW,
893 	/* Only use software crypto engine */
894 	ATH10K_CRYPT_MODE_SW,
895 };
896 
ath10k_cal_mode_str(enum ath10k_cal_mode mode)897 static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode)
898 {
899 	switch (mode) {
900 	case ATH10K_CAL_MODE_FILE:
901 		return "file";
902 	case ATH10K_CAL_MODE_OTP:
903 		return "otp";
904 	case ATH10K_CAL_MODE_DT:
905 		return "dt";
906 	case ATH10K_CAL_MODE_NVMEM:
907 		return "nvmem";
908 	case ATH10K_PRE_CAL_MODE_FILE:
909 		return "pre-cal-file";
910 	case ATH10K_PRE_CAL_MODE_DT:
911 		return "pre-cal-dt";
912 	case ATH10K_PRE_CAL_MODE_NVMEM:
913 		return "pre-cal-nvmem";
914 	case ATH10K_CAL_MODE_EEPROM:
915 		return "eeprom";
916 	}
917 
918 	return "unknown";
919 }
920 
921 enum ath10k_scan_state {
922 	ATH10K_SCAN_IDLE,
923 	ATH10K_SCAN_STARTING,
924 	ATH10K_SCAN_RUNNING,
925 	ATH10K_SCAN_ABORTING,
926 };
927 
ath10k_scan_state_str(enum ath10k_scan_state state)928 static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state)
929 {
930 	switch (state) {
931 	case ATH10K_SCAN_IDLE:
932 		return "idle";
933 	case ATH10K_SCAN_STARTING:
934 		return "starting";
935 	case ATH10K_SCAN_RUNNING:
936 		return "running";
937 	case ATH10K_SCAN_ABORTING:
938 		return "aborting";
939 	}
940 
941 	return "unknown";
942 }
943 
944 enum ath10k_tx_pause_reason {
945 	ATH10K_TX_PAUSE_Q_FULL,
946 	ATH10K_TX_PAUSE_MAX,
947 };
948 
949 struct ath10k_fw_file {
950 	const struct firmware *firmware;
951 
952 	char fw_version[ETHTOOL_FWVERS_LEN];
953 
954 	DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
955 
956 	enum ath10k_fw_wmi_op_version wmi_op_version;
957 	enum ath10k_fw_htt_op_version htt_op_version;
958 
959 	const void *firmware_data;
960 	size_t firmware_len;
961 
962 	const void *otp_data;
963 	size_t otp_len;
964 
965 	const void *codeswap_data;
966 	size_t codeswap_len;
967 
968 	/* The original idea of struct ath10k_fw_file was that it only
969 	 * contains struct firmware and pointers to various parts (actual
970 	 * firmware binary, otp, metadata etc) of the file. This seg_info
971 	 * is actually created separate but as this is used similarly as
972 	 * the other firmware components it's more convenient to have it
973 	 * here.
974 	 */
975 	struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info;
976 };
977 
978 struct ath10k_fw_components {
979 	const struct firmware *board;
980 	const void *board_data;
981 	size_t board_len;
982 	const struct firmware *ext_board;
983 	const void *ext_board_data;
984 	size_t ext_board_len;
985 
986 	struct ath10k_fw_file fw_file;
987 };
988 
989 struct ath10k_per_peer_tx_stats {
990 	u32	succ_bytes;
991 	u32	retry_bytes;
992 	u32	failed_bytes;
993 	u8	ratecode;
994 	u8	flags;
995 	u16	peer_id;
996 	u16	succ_pkts;
997 	u16	retry_pkts;
998 	u16	failed_pkts;
999 	u16	duration;
1000 	u32	reserved1;
1001 	u32	reserved2;
1002 };
1003 
1004 enum ath10k_dev_type {
1005 	ATH10K_DEV_TYPE_LL,
1006 	ATH10K_DEV_TYPE_HL,
1007 };
1008 
1009 struct ath10k_bus_params {
1010 	u32 chip_id;
1011 	enum ath10k_dev_type dev_type;
1012 	bool link_can_suspend;
1013 	bool hl_msdu_ids;
1014 };
1015 
1016 struct ath10k {
1017 	struct ath_common ath_common;
1018 	struct ieee80211_hw *hw;
1019 	struct ieee80211_ops *ops;
1020 	struct device *dev;
1021 	struct msa_region {
1022 		dma_addr_t paddr;
1023 		u32 mem_size;
1024 		void *vaddr;
1025 	} msa;
1026 	u8 mac_addr[ETH_ALEN];
1027 
1028 	enum ath10k_hw_rev hw_rev;
1029 	u16 dev_id;
1030 	u32 chip_id;
1031 	u32 target_version;
1032 	u8 fw_version_major;
1033 	u32 fw_version_minor;
1034 	u16 fw_version_release;
1035 	u16 fw_version_build;
1036 	u32 fw_stats_req_mask;
1037 	u32 phy_capability;
1038 	u32 hw_min_tx_power;
1039 	u32 hw_max_tx_power;
1040 	u32 hw_eeprom_rd;
1041 	u32 ht_cap_info;
1042 	u32 vht_cap_info;
1043 	u32 vht_supp_mcs;
1044 	u32 num_rf_chains;
1045 	u32 max_spatial_stream;
1046 #if defined(CONFIG_FWLOG)
1047 	u32 fwlog_max_moduleid;
1048 #endif
1049 	/* protected by conf_mutex */
1050 	u32 low_2ghz_chan;
1051 	u32 high_2ghz_chan;
1052 	u32 low_5ghz_chan;
1053 	u32 high_5ghz_chan;
1054 	bool ani_enabled;
1055 	u32 sys_cap_info;
1056 
1057 	/* protected by data_lock */
1058 	bool hw_rfkill_on;
1059 
1060 	/* protected by conf_mutex */
1061 	u8 ps_state_enable;
1062 
1063 	bool nlo_enabled;
1064 	bool p2p;
1065 
1066 	struct {
1067 		enum ath10k_bus bus;
1068 		const struct ath10k_hif_ops *ops;
1069 	} hif;
1070 
1071 	struct completion target_suspend;
1072 	struct completion driver_recovery;
1073 
1074 	const struct ath10k_hw_regs *regs;
1075 	const struct ath10k_hw_ce_regs *hw_ce_regs;
1076 	const struct ath10k_hw_values *hw_values;
1077 	struct ath10k_bmi bmi;
1078 	struct ath10k_wmi wmi;
1079 	struct ath10k_htc htc;
1080 	struct ath10k_htt htt;
1081 
1082 	struct ath10k_hw_params hw_params;
1083 
1084 	/* contains the firmware images used with ATH10K_FIRMWARE_MODE_NORMAL */
1085 	struct ath10k_fw_components normal_mode_fw;
1086 
1087 	/* READ-ONLY images of the running firmware, which can be either
1088 	 * normal or UTF. Do not modify, release etc!
1089 	 */
1090 	const struct ath10k_fw_components *running_fw;
1091 
1092 	const char *board_name;
1093 
1094 	const struct firmware *pre_cal_file;
1095 	const struct firmware *cal_file;
1096 
1097 	struct {
1098 		u32 vendor;
1099 		u32 device;
1100 		u32 subsystem_vendor;
1101 		u32 subsystem_device;
1102 
1103 		bool bmi_ids_valid;
1104 		bool qmi_ids_valid;
1105 		u32 qmi_board_id;
1106 		u32 qmi_chip_id;
1107 		u8 bmi_board_id;
1108 		u8 bmi_eboard_id;
1109 		u8 bmi_chip_id;
1110 		bool ext_bid_supported;
1111 
1112 		char bdf_ext[ATH10K_SMBIOS_BDF_EXT_STR_LENGTH];
1113 	} id;
1114 
1115 	int fw_api;
1116 	int bd_api;
1117 	enum ath10k_cal_mode cal_mode;
1118 
1119 	struct {
1120 		struct completion started;
1121 		struct completion completed;
1122 		struct completion on_channel;
1123 		struct delayed_work timeout;
1124 		enum ath10k_scan_state state;
1125 		bool is_roc;
1126 		int vdev_id;
1127 		int roc_freq;
1128 		bool roc_notify;
1129 	} scan;
1130 
1131 	struct {
1132 		struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
1133 	} mac;
1134 
1135 	/* should never be NULL; needed for regular htt rx */
1136 	struct ieee80211_channel *rx_channel;
1137 
1138 	/* valid during scan; needed for mgmt rx during scan */
1139 	struct ieee80211_channel *scan_channel;
1140 
1141 	/* current operating channel definition */
1142 	struct cfg80211_chan_def chandef;
1143 
1144 	/* currently configured operating channel in firmware */
1145 	struct ieee80211_channel *tgt_oper_chan;
1146 
1147 	unsigned long long free_vdev_map;
1148 	struct ath10k_vif *monitor_arvif;
1149 	bool monitor;
1150 	int monitor_vdev_id;
1151 	bool monitor_started;
1152 	unsigned int filter_flags;
1153 	unsigned long dev_flags;
1154 	bool dfs_block_radar_events;
1155 
1156 	/* protected by conf_mutex */
1157 	bool radar_enabled;
1158 	int num_started_vdevs;
1159 
1160 	/* Protected by conf-mutex */
1161 	u8 cfg_tx_chainmask;
1162 	u8 cfg_rx_chainmask;
1163 
1164 	struct completion install_key_done;
1165 
1166 	int last_wmi_vdev_start_status;
1167 	struct completion vdev_setup_done;
1168 	struct completion vdev_delete_done;
1169 	struct completion peer_stats_info_complete;
1170 
1171 	struct workqueue_struct *workqueue;
1172 	/* Auxiliary workqueue */
1173 	struct workqueue_struct *workqueue_aux;
1174 	struct workqueue_struct *workqueue_tx_complete;
1175 	/* prevents concurrent FW reconfiguration */
1176 	struct mutex conf_mutex;
1177 
1178 	/* protects coredump data */
1179 	struct mutex dump_mutex;
1180 
1181 	/* protects shared structure data */
1182 	spinlock_t data_lock;
1183 
1184 	/* serialize wake_tx_queue calls per ac */
1185 	spinlock_t queue_lock[IEEE80211_NUM_ACS];
1186 
1187 	struct list_head arvifs;
1188 	struct list_head peers;
1189 	struct ath10k_peer *peer_map[ATH10K_MAX_NUM_PEER_IDS];
1190 	wait_queue_head_t peer_mapping_wq;
1191 
1192 	/* protected by conf_mutex */
1193 	int num_peers;
1194 	int num_stations;
1195 
1196 	int max_num_peers;
1197 	int max_num_stations;
1198 	int max_num_vdevs;
1199 	int max_num_tdls_vdevs;
1200 	int num_active_peers;
1201 	int num_tids;
1202 
1203 	struct work_struct svc_rdy_work;
1204 	struct sk_buff *svc_rdy_skb;
1205 
1206 	struct work_struct offchan_tx_work;
1207 	struct sk_buff_head offchan_tx_queue;
1208 	struct completion offchan_tx_completed;
1209 	struct sk_buff *offchan_tx_skb;
1210 
1211 	struct work_struct wmi_mgmt_tx_work;
1212 	struct sk_buff_head wmi_mgmt_tx_queue;
1213 
1214 	enum ath10k_state state;
1215 
1216 	struct work_struct register_work;
1217 	struct work_struct restart_work;
1218 	struct work_struct recovery_check_work;
1219 	struct work_struct bundle_tx_work;
1220 	struct work_struct tx_complete_work;
1221 
1222 	atomic_t pending_recovery;
1223 	unsigned int recovery_count;
1224 	/* continuous recovery fail count */
1225 	atomic_t fail_cont_count;
1226 
1227 	/* cycle count is reported twice for each visited channel during scan.
1228 	 * access protected by data_lock
1229 	 */
1230 	u32 survey_last_rx_clear_count;
1231 	u32 survey_last_cycle_count;
1232 	struct survey_info survey[ATH10K_NUM_CHANS];
1233 
1234 	/* Channel info events are expected to come in pairs without and with
1235 	 * COMPLETE flag set respectively for each channel visit during scan.
1236 	 *
1237 	 * However there are deviations from this rule. This flag is used to
1238 	 * avoid reporting garbage data.
1239 	 */
1240 	bool ch_info_can_report_survey;
1241 	struct completion bss_survey_done;
1242 
1243 	struct dfs_pattern_detector *dfs_detector;
1244 
1245 	unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */
1246 
1247 #ifdef CONFIG_ATH10K_DEBUGFS
1248 	struct ath10k_debug debug;
1249 	struct {
1250 		/* relay(fs) channel for spectral scan */
1251 		struct rchan *rfs_chan_spec_scan;
1252 
1253 		/* spectral_mode and spec_config are protected by conf_mutex */
1254 		enum ath10k_spectral_mode mode;
1255 		struct ath10k_spec_scan config;
1256 	} spectral;
1257 #endif
1258 
1259 	u32 pktlog_filter;
1260 
1261 #ifdef CONFIG_DEV_COREDUMP
1262 	struct {
1263 		struct ath10k_fw_crash_data *fw_crash_data;
1264 	} coredump;
1265 #endif
1266 
1267 	struct {
1268 		/* protected by conf_mutex */
1269 		struct ath10k_fw_components utf_mode_fw;
1270 		u8 ftm_msgref;
1271 
1272 		/* protected by data_lock */
1273 		bool utf_monitor;
1274 		u32 data_pos;
1275 		u32 expected_seq;
1276 		u8 *eventdata;
1277 	} testmode;
1278 
1279 	struct {
1280 		struct gpio_led wifi_led;
1281 		struct led_classdev cdev;
1282 		char label[48];
1283 		u32 gpio_state_pin;
1284 	} leds;
1285 
1286 	struct {
1287 		/* protected by data_lock */
1288 		u32 rx_crc_err_drop;
1289 		u32 fw_crash_counter;
1290 		u32 fw_warm_reset_counter;
1291 		u32 fw_cold_reset_counter;
1292 	} stats;
1293 
1294 	struct ath10k_thermal thermal;
1295 	struct ath10k_wow wow;
1296 	struct ath10k_per_peer_tx_stats peer_tx_stats;
1297 
1298 #if defined(CONFIG_FWLOG)
1299 	struct work_struct fwlog_tx_work;
1300 	struct sk_buff_head fwlog_tx_queue;
1301 #endif
1302 
1303 	/* NAPI */
1304 	struct net_device *napi_dev;
1305 	struct napi_struct napi;
1306 
1307 	struct work_struct set_coverage_class_work;
1308 	/* protected by conf_mutex */
1309 	struct {
1310 		/* writing also protected by data_lock */
1311 		s16 coverage_class;
1312 
1313 		u32 reg_phyclk;
1314 		u32 reg_slottime_conf;
1315 		u32 reg_slottime_orig;
1316 		u32 reg_ack_cts_timeout_conf;
1317 		u32 reg_ack_cts_timeout_orig;
1318 	} fw_coverage;
1319 
1320 	u32 ampdu_reference;
1321 
1322 	const u8 *wmi_key_cipher;
1323 	void *ce_priv;
1324 
1325 	u32 sta_tid_stats_mask;
1326 
1327 	/* protected by data_lock */
1328 	enum ath10k_radar_confirmation_state radar_conf_state;
1329 	struct ath10k_radar_found_info last_radar_info;
1330 	struct work_struct radar_confirmation_work;
1331 	struct ath10k_bus_params bus_param;
1332 	struct completion peer_delete_done;
1333 
1334 	bool coex_support;
1335 	int coex_gpio_pin;
1336 
1337 	s32 tx_power_2g_limit;
1338 	s32 tx_power_5g_limit;
1339 
1340 	/* must be last */
1341 	u8 drv_priv[] __aligned(sizeof(void *));
1342 };
1343 
ath10k_peer_stats_enabled(struct ath10k * ar)1344 static inline bool ath10k_peer_stats_enabled(struct ath10k *ar)
1345 {
1346 	if (test_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags) &&
1347 	    test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
1348 		return true;
1349 
1350 	return false;
1351 }
1352 
1353 extern unsigned int ath10k_frame_mode;
1354 extern unsigned long ath10k_coredump_mask;
1355 
1356 void ath10k_core_napi_sync_disable(struct ath10k *ar);
1357 void ath10k_core_napi_enable(struct ath10k *ar);
1358 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
1359 				  enum ath10k_bus bus,
1360 				  enum ath10k_hw_rev hw_rev,
1361 				  const struct ath10k_hif_ops *hif_ops);
1362 void ath10k_core_destroy(struct ath10k *ar);
1363 void ath10k_core_get_fw_features_str(struct ath10k *ar,
1364 				     char *buf,
1365 				     size_t max_len);
1366 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
1367 				     struct ath10k_fw_file *fw_file);
1368 
1369 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
1370 		      const struct ath10k_fw_components *fw_components);
1371 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt);
1372 void ath10k_core_stop(struct ath10k *ar);
1373 void ath10k_core_start_recovery(struct ath10k *ar);
1374 int ath10k_core_register(struct ath10k *ar,
1375 			 const struct ath10k_bus_params *bus_params);
1376 void ath10k_core_unregister(struct ath10k *ar);
1377 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type);
1378 int ath10k_core_check_dt(struct ath10k *ar);
1379 void ath10k_core_free_board_files(struct ath10k *ar);
1380 
1381 #endif /* _CORE_H_ */
1382