1 /*
2 * Copyright (c) 2015-2024, Broadcom. All rights reserved. The term
3 * Broadcom refers to Broadcom Limited and/or its subsidiaries.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in
13 * the documentation and/or other materials provided with the
14 * distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
18 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Description: Fast Path Operators
29 */
30
31 #include <linux/interrupt.h>
32 #include <linux/spinlock.h>
33 #include <linux/sched.h>
34 #include <linux/slab.h>
35 #include <linux/pci.h>
36 #include <linux/delay.h>
37 #include <linux/if_ether.h>
38 #include <linux/hardirq.h>
39 #include <rdma/ib_mad.h>
40
41 #include "hsi_struct_def.h"
42 #include "qplib_tlv.h"
43 #include "qplib_res.h"
44 #include "qplib_rcfw.h"
45 #include "qplib_sp.h"
46 #include "qplib_fp.h"
47 #include "ib_verbs.h"
48
49 static void __clean_cq(struct bnxt_qplib_cq *cq, u64 qp);
50
bnxt_re_legacy_cancel_phantom_processing(struct bnxt_qplib_qp * qp)51 static void bnxt_re_legacy_cancel_phantom_processing(struct bnxt_qplib_qp *qp)
52 {
53 qp->sq.condition = false;
54 qp->sq.legacy_send_phantom = false;
55 qp->sq.single = false;
56 }
57
__bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp * qp)58 static void __bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp *qp)
59 {
60 struct bnxt_qplib_cq *scq, *rcq;
61
62 scq = qp->scq;
63 rcq = qp->rcq;
64
65 if (!qp->sq.flushed) {
66 dev_dbg(&scq->hwq.pdev->dev,
67 "QPLIB: FP: Adding to SQ Flush list = %p\n",
68 qp);
69 bnxt_re_legacy_cancel_phantom_processing(qp);
70 list_add_tail(&qp->sq_flush, &scq->sqf_head);
71 qp->sq.flushed = true;
72 }
73 if (!qp->srq) {
74 if (!qp->rq.flushed) {
75 dev_dbg(&rcq->hwq.pdev->dev,
76 "QPLIB: FP: Adding to RQ Flush list = %p\n",
77 qp);
78 list_add_tail(&qp->rq_flush, &rcq->rqf_head);
79 qp->rq.flushed = true;
80 }
81 }
82 }
83
bnxt_qplib_acquire_cq_flush_locks(struct bnxt_qplib_qp * qp)84 static void bnxt_qplib_acquire_cq_flush_locks(struct bnxt_qplib_qp *qp)
85 __acquires(&qp->scq->flush_lock) __acquires(&qp->rcq->flush_lock)
86 {
87 /* Interrupts are already disabled in calling functions */
88 spin_lock(&qp->scq->flush_lock);
89 if (qp->scq == qp->rcq)
90 __acquire(&qp->rcq->flush_lock);
91 else
92 spin_lock(&qp->rcq->flush_lock);
93 }
94
bnxt_qplib_release_cq_flush_locks(struct bnxt_qplib_qp * qp)95 static void bnxt_qplib_release_cq_flush_locks(struct bnxt_qplib_qp *qp)
96 __releases(&qp->scq->flush_lock) __releases(&qp->rcq->flush_lock)
97 {
98 if (qp->scq == qp->rcq)
99 __release(&qp->rcq->flush_lock);
100 else
101 spin_unlock(&qp->rcq->flush_lock);
102 spin_unlock(&qp->scq->flush_lock);
103 }
104
bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp * qp)105 void bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp *qp)
106 {
107
108 bnxt_qplib_acquire_cq_flush_locks(qp);
109 __bnxt_qplib_add_flush_qp(qp);
110 bnxt_qplib_release_cq_flush_locks(qp);
111 }
112
__bnxt_qplib_del_flush_qp(struct bnxt_qplib_qp * qp)113 static void __bnxt_qplib_del_flush_qp(struct bnxt_qplib_qp *qp)
114 {
115 if (qp->sq.flushed) {
116 qp->sq.flushed = false;
117 list_del(&qp->sq_flush);
118 }
119 if (!qp->srq) {
120 if (qp->rq.flushed) {
121 qp->rq.flushed = false;
122 list_del(&qp->rq_flush);
123 }
124 }
125 }
126
bnxt_qplib_clean_qp(struct bnxt_qplib_qp * qp)127 void bnxt_qplib_clean_qp(struct bnxt_qplib_qp *qp)
128 {
129
130 bnxt_qplib_acquire_cq_flush_locks(qp);
131 __clean_cq(qp->scq, (u64)(unsigned long)qp);
132 qp->sq.hwq.prod = 0;
133 qp->sq.hwq.cons = 0;
134 qp->sq.swq_start = 0;
135 qp->sq.swq_last = 0;
136 __clean_cq(qp->rcq, (u64)(unsigned long)qp);
137 qp->rq.hwq.prod = 0;
138 qp->rq.hwq.cons = 0;
139 qp->rq.swq_start = 0;
140 qp->rq.swq_last = 0;
141
142 __bnxt_qplib_del_flush_qp(qp);
143 bnxt_qplib_release_cq_flush_locks(qp);
144 }
145
bnxt_qpn_cqn_sched_task(struct work_struct * work)146 static void bnxt_qpn_cqn_sched_task(struct work_struct *work)
147 {
148 struct bnxt_qplib_nq_work *nq_work =
149 container_of(work, struct bnxt_qplib_nq_work, work);
150
151 struct bnxt_qplib_cq *cq = nq_work->cq;
152 struct bnxt_qplib_nq *nq = nq_work->nq;
153
154 if (cq && nq) {
155 spin_lock_bh(&cq->compl_lock);
156 if (nq->cqn_handler) {
157 dev_dbg(&nq->res->pdev->dev,
158 "%s:Trigger cq = %p event nq = %p\n",
159 __func__, cq, nq);
160 nq->cqn_handler(nq, cq);
161 }
162 spin_unlock_bh(&cq->compl_lock);
163 }
164 kfree(nq_work);
165 }
166
bnxt_qplib_put_hdr_buf(struct pci_dev * pdev,struct bnxt_qplib_hdrbuf * buf)167 static void bnxt_qplib_put_hdr_buf(struct pci_dev *pdev,
168 struct bnxt_qplib_hdrbuf *buf)
169 {
170 dma_free_coherent(&pdev->dev, buf->len, buf->va, buf->dma_map);
171 kfree(buf);
172 }
173
bnxt_qplib_get_hdr_buf(struct pci_dev * pdev,u32 step,u32 cnt)174 static void *bnxt_qplib_get_hdr_buf(struct pci_dev *pdev, u32 step, u32 cnt)
175 {
176 struct bnxt_qplib_hdrbuf *hdrbuf;
177 u32 len;
178
179 hdrbuf = kmalloc(sizeof(*hdrbuf), GFP_KERNEL);
180 if (!hdrbuf)
181 return NULL;
182
183 len = ALIGN((step * cnt), PAGE_SIZE);
184 hdrbuf->va = dma_alloc_coherent(&pdev->dev, len,
185 &hdrbuf->dma_map, GFP_KERNEL);
186 if (!hdrbuf->va)
187 goto out;
188
189 hdrbuf->len = len;
190 hdrbuf->step = step;
191 return hdrbuf;
192 out:
193 kfree(hdrbuf);
194 return NULL;
195 }
196
bnxt_qplib_free_hdr_buf(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)197 void bnxt_qplib_free_hdr_buf(struct bnxt_qplib_res *res,
198 struct bnxt_qplib_qp *qp)
199 {
200 if (qp->rq_hdr_buf) {
201 bnxt_qplib_put_hdr_buf(res->pdev, qp->rq_hdr_buf);
202 qp->rq_hdr_buf = NULL;
203 }
204
205 if (qp->sq_hdr_buf) {
206 bnxt_qplib_put_hdr_buf(res->pdev, qp->sq_hdr_buf);
207 qp->sq_hdr_buf = NULL;
208 }
209 }
210
bnxt_qplib_alloc_hdr_buf(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp,u32 sstep,u32 rstep)211 int bnxt_qplib_alloc_hdr_buf(struct bnxt_qplib_res *res,
212 struct bnxt_qplib_qp *qp, u32 sstep, u32 rstep)
213 {
214 struct pci_dev *pdev;
215 int rc = 0;
216
217 pdev = res->pdev;
218 if (sstep) {
219 qp->sq_hdr_buf = bnxt_qplib_get_hdr_buf(pdev, sstep,
220 qp->sq.max_wqe);
221 if (!qp->sq_hdr_buf) {
222 dev_err(&pdev->dev, "QPLIB: Failed to get sq_hdr_buf\n");
223 return -ENOMEM;
224 }
225 }
226
227 if (rstep) {
228 qp->rq_hdr_buf = bnxt_qplib_get_hdr_buf(pdev, rstep,
229 qp->rq.max_wqe);
230 if (!qp->rq_hdr_buf) {
231 rc = -ENOMEM;
232 dev_err(&pdev->dev, "QPLIB: Failed to get rq_hdr_buf\n");
233 goto fail;
234 }
235 }
236
237 return 0;
238 fail:
239 bnxt_qplib_free_hdr_buf(res, qp);
240 return rc;
241 }
242
243 /*
244 * clean_nq - Invalidate cqe from given nq.
245 * @cq - Completion queue
246 *
247 * Traverse whole notification queue and invalidate any completion
248 * associated cq handler provided by caller.
249 * Note - This function traverse the hardware queue but do not update
250 * consumer index. Invalidated cqe(marked from this function) will be
251 * ignored from actual completion of notification queue.
252 */
clean_nq(struct bnxt_qplib_cq * cq)253 static void clean_nq(struct bnxt_qplib_cq *cq)
254 {
255 struct bnxt_qplib_hwq *nq_hwq = NULL;
256 struct bnxt_qplib_nq *nq = NULL;
257 struct nq_base *hw_nqe = NULL;
258 struct nq_cn *nqcne = NULL;
259 u32 peek_flags, peek_cons;
260 u64 q_handle;
261 u32 type;
262 int i;
263
264 nq = cq->nq;
265 nq_hwq = &nq->hwq;
266
267 spin_lock_bh(&nq_hwq->lock);
268 peek_flags = nq->nq_db.dbinfo.flags;
269 peek_cons = nq_hwq->cons;
270 for (i = 0; i < nq_hwq->max_elements; i++) {
271 hw_nqe = bnxt_qplib_get_qe(nq_hwq, peek_cons, NULL);
272 if (!NQE_CMP_VALID(hw_nqe, peek_flags))
273 break;
274
275 /* The valid test of the entry must be done first
276 * before reading any further.
277 */
278 dma_rmb();
279 type = le16_to_cpu(hw_nqe->info10_type) &
280 NQ_BASE_TYPE_MASK;
281
282 /* Processing only NQ_BASE_TYPE_CQ_NOTIFICATION */
283 if (type == NQ_BASE_TYPE_CQ_NOTIFICATION) {
284 nqcne = (struct nq_cn *)hw_nqe;
285
286 q_handle = le32_to_cpu(nqcne->cq_handle_low);
287 q_handle |= (u64)le32_to_cpu(nqcne->cq_handle_high) << 32;
288 if (q_handle == (u64)cq) {
289 nqcne->cq_handle_low = 0;
290 nqcne->cq_handle_high = 0;
291 cq->cnq_events++;
292 }
293 }
294 bnxt_qplib_hwq_incr_cons(nq_hwq->max_elements, &peek_cons,
295 1, &peek_flags);
296 }
297 spin_unlock_bh(&nq_hwq->lock);
298 }
299
300 /*
301 * Wait for receiving all NQEs for this CQ.
302 * clean_nq is tried 100 times, each time clean_cq
303 * loops upto budget times. budget is based on the
304 * number of CQs shared by that NQ. So any NQE from
305 * CQ would be already in the NQ.
306 */
__wait_for_all_nqes(struct bnxt_qplib_cq * cq,u16 cnq_events)307 static void __wait_for_all_nqes(struct bnxt_qplib_cq *cq, u16 cnq_events)
308 {
309 u32 retry_cnt = 100;
310 u16 total_events;
311
312 if (!cnq_events) {
313 clean_nq(cq);
314 return;
315 }
316 while (retry_cnt--) {
317 total_events = cq->cnq_events;
318
319 /* Increment total_events by 1 if any CREQ event received with CQ notification */
320 if (cq->is_cq_err_event)
321 total_events++;
322
323 if (cnq_events == total_events) {
324 dev_dbg(&cq->nq->res->pdev->dev,
325 "QPLIB: NQ cleanup - Received all NQ events\n");
326 return;
327 }
328 msleep(1);
329 clean_nq(cq);
330 }
331 }
332
bnxt_qplib_service_nq(unsigned long data)333 static void bnxt_qplib_service_nq(unsigned long data)
334 {
335 struct bnxt_qplib_nq *nq = (struct bnxt_qplib_nq *)data;
336 struct bnxt_qplib_hwq *nq_hwq = &nq->hwq;
337 int budget = nq->budget;
338 struct bnxt_qplib_res *res;
339 struct bnxt_qplib_cq *cq;
340 struct pci_dev *pdev;
341 struct nq_base *nqe;
342 u32 hw_polled = 0;
343 u64 q_handle;
344 u32 type;
345
346 res = nq->res;
347 pdev = res->pdev;
348
349 spin_lock_bh(&nq_hwq->lock);
350 /* Service the NQ until empty or budget expired */
351 while (budget--) {
352 nqe = bnxt_qplib_get_qe(nq_hwq, nq_hwq->cons, NULL);
353 if (!NQE_CMP_VALID(nqe, nq->nq_db.dbinfo.flags))
354 break;
355 /* The valid test of the entry must be done first before
356 * reading any further.
357 */
358 dma_rmb();
359 type = le16_to_cpu(nqe->info10_type) & NQ_BASE_TYPE_MASK;
360 switch (type) {
361 case NQ_BASE_TYPE_CQ_NOTIFICATION:
362 {
363 struct nq_cn *nqcne = (struct nq_cn *)nqe;
364
365 q_handle = le32_to_cpu(nqcne->cq_handle_low);
366 q_handle |= (u64)le32_to_cpu(nqcne->cq_handle_high) << 32;
367 cq = (struct bnxt_qplib_cq *)q_handle;
368 if (!cq)
369 break;
370 cq->toggle = (le16_to_cpu(nqe->info10_type) & NQ_CN_TOGGLE_MASK) >> NQ_CN_TOGGLE_SFT;
371 cq->dbinfo.toggle = cq->toggle;
372 bnxt_qplib_armen_db(&cq->dbinfo,
373 DBC_DBC_TYPE_CQ_ARMENA);
374 spin_lock_bh(&cq->compl_lock);
375 atomic_set(&cq->arm_state, 0) ;
376 if (!nq->cqn_handler(nq, (cq)))
377 nq->stats.num_cqne_processed++;
378 else
379 dev_warn(&pdev->dev,
380 "QPLIB: cqn - type 0x%x not handled\n",
381 type);
382 cq->cnq_events++;
383 spin_unlock_bh(&cq->compl_lock);
384 break;
385 }
386 case NQ_BASE_TYPE_SRQ_EVENT:
387 {
388 struct bnxt_qplib_srq *srq;
389 struct nq_srq_event *nqsrqe =
390 (struct nq_srq_event *)nqe;
391 u8 toggle;
392
393 q_handle = le32_to_cpu(nqsrqe->srq_handle_low);
394 q_handle |= (u64)le32_to_cpu(nqsrqe->srq_handle_high) << 32;
395 srq = (struct bnxt_qplib_srq *)q_handle;
396 toggle = (le16_to_cpu(nqe->info10_type) & NQ_CN_TOGGLE_MASK)
397 >> NQ_CN_TOGGLE_SFT;
398 srq->dbinfo.toggle = toggle;
399 bnxt_qplib_armen_db(&srq->dbinfo,
400 DBC_DBC_TYPE_SRQ_ARMENA);
401 if (!nq->srqn_handler(nq,
402 (struct bnxt_qplib_srq *)q_handle,
403 nqsrqe->event))
404 nq->stats.num_srqne_processed++;
405 else
406 dev_warn(&pdev->dev,
407 "QPLIB: SRQ event 0x%x not handled\n",
408 nqsrqe->event);
409 break;
410 }
411 default:
412 dev_warn(&pdev->dev,
413 "QPLIB: nqe with opcode = 0x%x not handled\n",
414 type);
415 break;
416 }
417 hw_polled++;
418 bnxt_qplib_hwq_incr_cons(nq_hwq->max_elements, &nq_hwq->cons,
419 1, &nq->nq_db.dbinfo.flags);
420 }
421 nqe = bnxt_qplib_get_qe(nq_hwq, nq_hwq->cons, NULL);
422 if (!NQE_CMP_VALID(nqe, nq->nq_db.dbinfo.flags)) {
423 nq->stats.num_nq_rearm++;
424 bnxt_qplib_ring_nq_db(&nq->nq_db.dbinfo, res->cctx, true);
425 } else if (nq->requested) {
426 bnxt_qplib_ring_nq_db(&nq->nq_db.dbinfo, res->cctx, true);
427 nq->stats.num_tasklet_resched++;
428 }
429 dev_dbg(&pdev->dev, "QPLIB: cqn/srqn/dbqn \n");
430 if (hw_polled >= 0)
431 dev_dbg(&pdev->dev,
432 "QPLIB: serviced %llu/%llu/%llu budget 0x%x reaped 0x%x\n",
433 nq->stats.num_cqne_processed, nq->stats.num_srqne_processed,
434 nq->stats.num_dbqne_processed, budget, hw_polled);
435 dev_dbg(&pdev->dev,
436 "QPLIB: resched_cnt = %llu arm_count = %llu\n",
437 nq->stats.num_tasklet_resched, nq->stats.num_nq_rearm);
438 spin_unlock_bh(&nq_hwq->lock);
439 }
440
bnxt_qplib_nq_irq(int irq,void * dev_instance)441 static irqreturn_t bnxt_qplib_nq_irq(int irq, void *dev_instance)
442 {
443 struct bnxt_qplib_nq *nq = dev_instance;
444 struct bnxt_qplib_hwq *nq_hwq = &nq->hwq;
445 u32 sw_cons;
446
447 /* Prefetch the NQ element */
448 sw_cons = HWQ_CMP(nq_hwq->cons, nq_hwq);
449 if (sw_cons >= 0)
450 prefetch(bnxt_qplib_get_qe(nq_hwq, sw_cons, NULL));
451
452 bnxt_qplib_service_nq((unsigned long)nq);
453
454 return IRQ_HANDLED;
455 }
456
bnxt_qplib_nq_stop_irq(struct bnxt_qplib_nq * nq,bool kill)457 void bnxt_qplib_nq_stop_irq(struct bnxt_qplib_nq *nq, bool kill)
458 {
459 struct bnxt_qplib_res *res;
460
461 if (!nq->requested)
462 return;
463
464 nq->requested = false;
465 res = nq->res;
466 /* Mask h/w interrupt */
467 bnxt_qplib_ring_nq_db(&nq->nq_db.dbinfo, res->cctx, false);
468 /* Sync with last running IRQ handler */
469 synchronize_irq(nq->msix_vec);
470 free_irq(nq->msix_vec, nq);
471 kfree(nq->name);
472 nq->name = NULL;
473 }
474
bnxt_qplib_disable_nq(struct bnxt_qplib_nq * nq)475 void bnxt_qplib_disable_nq(struct bnxt_qplib_nq *nq)
476 {
477 if (nq->cqn_wq) {
478 destroy_workqueue(nq->cqn_wq);
479 nq->cqn_wq = NULL;
480 }
481 /* Make sure the HW is stopped! */
482 bnxt_qplib_nq_stop_irq(nq, true);
483
484 nq->nq_db.reg.bar_reg = NULL;
485 nq->nq_db.db = NULL;
486
487 nq->cqn_handler = NULL;
488 nq->srqn_handler = NULL;
489 nq->msix_vec = 0;
490 }
491
bnxt_qplib_nq_start_irq(struct bnxt_qplib_nq * nq,int nq_indx,int msix_vector,bool need_init)492 int bnxt_qplib_nq_start_irq(struct bnxt_qplib_nq *nq, int nq_indx,
493 int msix_vector, bool need_init)
494 {
495 struct bnxt_qplib_res *res;
496 int rc;
497
498 res = nq->res;
499 if (nq->requested)
500 return -EFAULT;
501
502 nq->msix_vec = msix_vector;
503 nq->name = kasprintf(GFP_KERNEL, "bnxt_re-nq-%d@pci:%s\n",
504 nq_indx, pci_name(res->pdev));
505 if (!nq->name)
506 return -ENOMEM;
507 rc = request_irq(nq->msix_vec, bnxt_qplib_nq_irq, 0, nq->name, nq);
508 if (rc) {
509 kfree(nq->name);
510 nq->name = NULL;
511 return rc;
512 }
513 nq->requested = true;
514 bnxt_qplib_ring_nq_db(&nq->nq_db.dbinfo, res->cctx, true);
515
516 return rc;
517 }
518
bnxt_qplib_map_nq_db(struct bnxt_qplib_nq * nq,u32 reg_offt)519 static void bnxt_qplib_map_nq_db(struct bnxt_qplib_nq *nq, u32 reg_offt)
520 {
521 struct bnxt_qplib_reg_desc *dbreg;
522 struct bnxt_qplib_nq_db *nq_db;
523 struct bnxt_qplib_res *res;
524
525 nq_db = &nq->nq_db;
526 res = nq->res;
527 dbreg = &res->dpi_tbl.ucreg;
528
529 nq_db->reg.bar_id = dbreg->bar_id;
530 nq_db->reg.bar_base = dbreg->bar_base;
531 nq_db->reg.bar_reg = dbreg->bar_reg + reg_offt;
532 nq_db->reg.len = _is_chip_gen_p5_p7(res->cctx) ? sizeof(u64) :
533 sizeof(u32);
534
535 nq_db->dbinfo.db = nq_db->reg.bar_reg;
536 nq_db->dbinfo.hwq = &nq->hwq;
537 nq_db->dbinfo.xid = nq->ring_id;
538 nq_db->dbinfo.seed = nq->ring_id;
539 nq_db->dbinfo.flags = 0;
540 spin_lock_init(&nq_db->dbinfo.lock);
541 nq_db->dbinfo.shadow_key = BNXT_QPLIB_DBR_KEY_INVALID;
542 nq_db->dbinfo.res = nq->res;
543
544 return;
545 }
546
bnxt_qplib_enable_nq(struct bnxt_qplib_nq * nq,int nq_idx,int msix_vector,int bar_reg_offset,cqn_handler_t cqn_handler,srqn_handler_t srqn_handler)547 int bnxt_qplib_enable_nq(struct bnxt_qplib_nq *nq, int nq_idx,
548 int msix_vector, int bar_reg_offset,
549 cqn_handler_t cqn_handler,
550 srqn_handler_t srqn_handler)
551 {
552 struct pci_dev *pdev;
553 int rc;
554
555 pdev = nq->res->pdev;
556 nq->cqn_handler = cqn_handler;
557 nq->srqn_handler = srqn_handler;
558 nq->load = 0;
559 mutex_init(&nq->lock);
560
561 /* Have a task to schedule CQ notifiers in post send case */
562 nq->cqn_wq = create_singlethread_workqueue("bnxt_qplib_nq\n");
563 if (!nq->cqn_wq)
564 return -ENOMEM;
565
566 bnxt_qplib_map_nq_db(nq, bar_reg_offset);
567 rc = bnxt_qplib_nq_start_irq(nq, nq_idx, msix_vector, true);
568 if (rc) {
569 dev_err(&pdev->dev,
570 "QPLIB: Failed to request irq for nq-idx %d\n", nq_idx);
571 goto fail;
572 }
573 dev_dbg(&pdev->dev, "QPLIB: NQ max = 0x%x\n", nq->hwq.max_elements);
574
575 return 0;
576 fail:
577 bnxt_qplib_disable_nq(nq);
578 return rc;
579 }
580
bnxt_qplib_free_nq_mem(struct bnxt_qplib_nq * nq)581 void bnxt_qplib_free_nq_mem(struct bnxt_qplib_nq *nq)
582 {
583 if (nq->hwq.max_elements) {
584 bnxt_qplib_free_hwq(nq->res, &nq->hwq);
585 nq->hwq.max_elements = 0;
586 }
587 }
588
bnxt_qplib_alloc_nq_mem(struct bnxt_qplib_res * res,struct bnxt_qplib_nq * nq)589 int bnxt_qplib_alloc_nq_mem(struct bnxt_qplib_res *res,
590 struct bnxt_qplib_nq *nq)
591 {
592 struct bnxt_qplib_hwq_attr hwq_attr = {};
593 struct bnxt_qplib_sg_info sginfo = {};
594
595 nq->res = res;
596 if (!nq->hwq.max_elements ||
597 nq->hwq.max_elements > BNXT_QPLIB_NQE_MAX_CNT)
598 nq->hwq.max_elements = BNXT_QPLIB_NQE_MAX_CNT;
599
600 sginfo.pgsize = PAGE_SIZE;
601 sginfo.pgshft = PAGE_SHIFT;
602 hwq_attr.res = res;
603 hwq_attr.sginfo = &sginfo;
604 hwq_attr.depth = nq->hwq.max_elements;
605 hwq_attr.stride = sizeof(struct nq_base);
606 hwq_attr.type = _get_hwq_type(res);
607 if (bnxt_qplib_alloc_init_hwq(&nq->hwq, &hwq_attr)) {
608 dev_err(&res->pdev->dev, "QPLIB: FP NQ allocation failed\n");
609 return -ENOMEM;
610 }
611 nq->budget = 8;
612 return 0;
613 }
614
615 /* SRQ */
__qplib_destroy_srq(struct bnxt_qplib_rcfw * rcfw,struct bnxt_qplib_srq * srq)616 static int __qplib_destroy_srq(struct bnxt_qplib_rcfw *rcfw,
617 struct bnxt_qplib_srq *srq)
618 {
619 struct creq_destroy_srq_resp resp = {};
620 struct bnxt_qplib_cmdqmsg msg = {};
621 struct cmdq_destroy_srq req = {};
622 /* Configure the request */
623 req.srq_cid = cpu_to_le32(srq->id);
624 bnxt_qplib_rcfw_cmd_prep(&req, CMDQ_BASE_OPCODE_DESTROY_SRQ,
625 sizeof(req));
626 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),
627 sizeof(resp), 0);
628 return bnxt_qplib_rcfw_send_message(rcfw, &msg);
629 }
630
bnxt_qplib_destroy_srq(struct bnxt_qplib_res * res,struct bnxt_qplib_srq * srq)631 int bnxt_qplib_destroy_srq(struct bnxt_qplib_res *res,
632 struct bnxt_qplib_srq *srq)
633 {
634 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
635 int rc;
636
637 rc = __qplib_destroy_srq(rcfw, srq);
638 if (rc)
639 return rc;
640 bnxt_qplib_free_hwq(res, &srq->hwq);
641 kfree(srq->swq);
642 return 0;
643 }
644
bnxt_qplib_create_srq(struct bnxt_qplib_res * res,struct bnxt_qplib_srq * srq)645 int bnxt_qplib_create_srq(struct bnxt_qplib_res *res,
646 struct bnxt_qplib_srq *srq)
647 {
648 struct bnxt_qplib_hwq_attr hwq_attr = {};
649 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
650 struct creq_create_srq_resp resp = {};
651 struct bnxt_qplib_cmdqmsg msg = {};
652 struct cmdq_create_srq req = {};
653 u16 pg_sz_lvl = 0;
654 u16 srq_size;
655 int rc, idx;
656
657 hwq_attr.res = res;
658 hwq_attr.sginfo = &srq->sginfo;
659 hwq_attr.depth = srq->max_wqe;
660 hwq_attr.stride = srq->wqe_size;
661 hwq_attr.type = HWQ_TYPE_QUEUE;
662 rc = bnxt_qplib_alloc_init_hwq(&srq->hwq, &hwq_attr);
663 if (rc)
664 goto exit;
665 /* Configure the request */
666 req.dpi = cpu_to_le32(srq->dpi->dpi);
667 req.srq_handle = cpu_to_le64((uintptr_t)srq);
668 srq_size = min_t(u32, srq->hwq.depth, U16_MAX);
669 req.srq_size = cpu_to_le16(srq_size);
670 pg_sz_lvl |= (_get_base_pg_size(&srq->hwq) <<
671 CMDQ_CREATE_SRQ_PG_SIZE_SFT);
672 pg_sz_lvl |= (srq->hwq.level & CMDQ_CREATE_SRQ_LVL_MASK);
673 req.pg_size_lvl = cpu_to_le16(pg_sz_lvl);
674 req.pbl = cpu_to_le64(_get_base_addr(&srq->hwq));
675 req.pd_id = cpu_to_le32(srq->pd->id);
676 req.eventq_id = cpu_to_le16(srq->eventq_hw_ring_id);
677 bnxt_qplib_rcfw_cmd_prep(&req, CMDQ_BASE_OPCODE_CREATE_SRQ,
678 sizeof(req));
679 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),
680 sizeof(resp), 0);
681 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
682 if (rc)
683 goto fail;
684 if (!srq->is_user) {
685 srq->swq = kcalloc(srq->hwq.depth, sizeof(*srq->swq),
686 GFP_KERNEL);
687 if (!srq->swq)
688 goto srq_fail;
689 srq->start_idx = 0;
690 srq->last_idx = srq->hwq.depth - 1;
691 for (idx = 0; idx < srq->hwq.depth; idx++)
692 srq->swq[idx].next_idx = idx + 1;
693 srq->swq[srq->last_idx].next_idx = -1;
694 }
695
696 spin_lock_init(&srq->lock);
697 srq->id = le32_to_cpu(resp.xid);
698 srq->cctx = res->cctx;
699 srq->dbinfo.hwq = &srq->hwq;
700 srq->dbinfo.xid = srq->id;
701 srq->dbinfo.db = srq->dpi->dbr;
702 srq->dbinfo.max_slot = 1;
703 srq->dbinfo.priv_db = res->dpi_tbl.priv_db;
704 srq->dbinfo.flags = 0;
705 spin_lock_init(&srq->dbinfo.lock);
706 srq->dbinfo.shadow_key = BNXT_QPLIB_DBR_KEY_INVALID;
707 srq->dbinfo.shadow_key_arm_ena = BNXT_QPLIB_DBR_KEY_INVALID;
708 srq->dbinfo.res = res;
709 srq->dbinfo.seed = srq->id;
710 if (srq->threshold)
711 bnxt_qplib_armen_db(&srq->dbinfo, DBC_DBC_TYPE_SRQ_ARMENA);
712 srq->arm_req = false;
713 return 0;
714 srq_fail:
715 __qplib_destroy_srq(rcfw, srq);
716 fail:
717 bnxt_qplib_free_hwq(res, &srq->hwq);
718 exit:
719 return rc;
720 }
721
bnxt_qplib_modify_srq(struct bnxt_qplib_res * res,struct bnxt_qplib_srq * srq)722 int bnxt_qplib_modify_srq(struct bnxt_qplib_res *res,
723 struct bnxt_qplib_srq *srq)
724 {
725 struct bnxt_qplib_hwq *srq_hwq = &srq->hwq;
726 u32 avail = 0;
727
728 avail = __bnxt_qplib_get_avail(srq_hwq);
729 if (avail <= srq->threshold) {
730 srq->arm_req = false;
731 bnxt_qplib_srq_arm_db(&srq->dbinfo);
732 } else {
733 /* Deferred arming */
734 srq->arm_req = true;
735 }
736 return 0;
737 }
738
bnxt_qplib_query_srq(struct bnxt_qplib_res * res,struct bnxt_qplib_srq * srq)739 int bnxt_qplib_query_srq(struct bnxt_qplib_res *res,
740 struct bnxt_qplib_srq *srq)
741 {
742 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
743 struct creq_query_srq_resp resp = {};
744 struct bnxt_qplib_cmdqmsg msg = {};
745 struct creq_query_srq_resp_sb *sb;
746 struct bnxt_qplib_rcfw_sbuf sbuf;
747 struct cmdq_query_srq req = {};
748 int rc = 0;
749
750 bnxt_qplib_rcfw_cmd_prep(&req, CMDQ_BASE_OPCODE_QUERY_SRQ,
751 sizeof(req));
752 sbuf.size = ALIGN(sizeof(*sb), BNXT_QPLIB_CMDQE_UNITS);
753 sbuf.sb = dma_zalloc_coherent(&rcfw->pdev->dev, sbuf.size,
754 &sbuf.dma_addr, GFP_KERNEL);
755 if (!sbuf.sb)
756 return -ENOMEM;
757 req.resp_size = sbuf.size / BNXT_QPLIB_CMDQE_UNITS;
758 req.srq_cid = cpu_to_le32(srq->id);
759 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, &sbuf, sizeof(req),
760 sizeof(resp), 0);
761 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
762 /* TODO: What to do with the query? */
763 dma_free_coherent(&rcfw->pdev->dev, sbuf.size,
764 sbuf.sb, sbuf.dma_addr);
765
766 return rc;
767 }
768
bnxt_qplib_post_srq_recv(struct bnxt_qplib_srq * srq,struct bnxt_qplib_swqe * wqe)769 int bnxt_qplib_post_srq_recv(struct bnxt_qplib_srq *srq,
770 struct bnxt_qplib_swqe *wqe)
771 {
772 struct bnxt_qplib_hwq *srq_hwq = &srq->hwq;
773 struct sq_sge *hw_sge;
774 struct rq_wqe *srqe;
775 int i, rc = 0, next;
776 u32 avail;
777
778 spin_lock(&srq_hwq->lock);
779 if (srq->start_idx == srq->last_idx) {
780 dev_err(&srq_hwq->pdev->dev, "QPLIB: FP: SRQ (0x%x) is full!\n",
781 srq->id);
782 rc = -EINVAL;
783 spin_unlock(&srq_hwq->lock);
784 goto done;
785 }
786 next = srq->start_idx;
787 srq->start_idx = srq->swq[next].next_idx;
788 spin_unlock(&srq_hwq->lock);
789
790 srqe = bnxt_qplib_get_qe(srq_hwq, srq_hwq->prod, NULL);
791 memset(srqe, 0, srq->wqe_size);
792 /* Calculate wqe_size and data_len */
793 for (i = 0, hw_sge = (struct sq_sge *)srqe->data;
794 i < wqe->num_sge; i++, hw_sge++) {
795 hw_sge->va_or_pa = cpu_to_le64(wqe->sg_list[i].addr);
796 hw_sge->l_key = cpu_to_le32(wqe->sg_list[i].lkey);
797 hw_sge->size = cpu_to_le32(wqe->sg_list[i].size);
798 }
799 srqe->wqe_type = wqe->type;
800 srqe->flags = wqe->flags;
801 srqe->wqe_size = wqe->num_sge +
802 ((offsetof(typeof(*srqe), data) + 15) >> 4);
803 if (!wqe->num_sge)
804 srqe->wqe_size++;
805 srqe->wr_id |= cpu_to_le32((u32)next);
806 srq->swq[next].wr_id = wqe->wr_id;
807 bnxt_qplib_hwq_incr_prod(&srq->dbinfo, srq_hwq, srq->dbinfo.max_slot);
808 /* retaining srq_hwq->cons for this logic actually the lock is only
809 * required to read srq_hwq->cons.
810 */
811 spin_lock(&srq_hwq->lock);
812 avail = __bnxt_qplib_get_avail(srq_hwq);
813 spin_unlock(&srq_hwq->lock);
814 /* Ring DB */
815 bnxt_qplib_ring_prod_db(&srq->dbinfo, DBC_DBC_TYPE_SRQ);
816 if (srq->arm_req && avail <= srq->threshold) {
817 srq->arm_req = false;
818 bnxt_qplib_srq_arm_db(&srq->dbinfo);
819 }
820 done:
821 return rc;
822 }
823
824 /* QP */
__qplib_destroy_qp(struct bnxt_qplib_rcfw * rcfw,struct bnxt_qplib_qp * qp)825 static int __qplib_destroy_qp(struct bnxt_qplib_rcfw *rcfw,
826 struct bnxt_qplib_qp *qp)
827 {
828 struct creq_destroy_qp_resp resp = {};
829 struct bnxt_qplib_cmdqmsg msg = {};
830 struct cmdq_destroy_qp req = {};
831
832 req.qp_cid = cpu_to_le32(qp->id);
833 bnxt_qplib_rcfw_cmd_prep(&req, CMDQ_BASE_OPCODE_DESTROY_QP,
834 sizeof(req));
835 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),
836 sizeof(resp), 0);
837 return bnxt_qplib_rcfw_send_message(rcfw, &msg);
838 }
839
bnxt_qplib_alloc_init_swq(struct bnxt_qplib_q * que)840 static int bnxt_qplib_alloc_init_swq(struct bnxt_qplib_q *que)
841 {
842 int rc = 0;
843 int indx;
844
845 que->swq = kcalloc(que->max_sw_wqe, sizeof(*que->swq), GFP_KERNEL);
846 if (!que->swq) {
847 rc = -ENOMEM;
848 goto out;
849 }
850
851 que->swq_start = 0;
852 que->swq_last = que->max_sw_wqe - 1;
853 for (indx = 0; indx < que->max_sw_wqe; indx++)
854 que->swq[indx].next_idx = indx + 1;
855 que->swq[que->swq_last].next_idx = 0; /* Make it circular */
856 que->swq_last = 0;
857 out:
858 return rc;
859 }
860
bnxt_qplib_get_swqe(struct bnxt_qplib_q * que,u32 * swq_idx)861 static struct bnxt_qplib_swq *bnxt_qplib_get_swqe(struct bnxt_qplib_q *que,
862 u32 *swq_idx)
863 {
864 u32 idx;
865
866 idx = que->swq_start;
867 if (swq_idx)
868 *swq_idx = idx;
869 return &que->swq[idx];
870 }
871
bnxt_qplib_swq_mod_start(struct bnxt_qplib_q * que,u32 idx)872 static void bnxt_qplib_swq_mod_start(struct bnxt_qplib_q *que, u32 idx)
873 {
874 que->swq_start = que->swq[idx].next_idx;
875 }
876
bnxt_qplib_get_stride(void)877 static u32 bnxt_qplib_get_stride(void)
878 {
879 return sizeof(struct sq_sge);
880 }
881
bnxt_qplib_get_depth(struct bnxt_qplib_q * que,u8 wqe_mode,bool is_sq)882 u32 bnxt_qplib_get_depth(struct bnxt_qplib_q *que, u8 wqe_mode, bool is_sq)
883 {
884 u32 slots;
885
886 /* Queue depth is the number of slots. */
887 slots = (que->wqe_size * que->max_wqe) / sizeof(struct sq_sge);
888 /* For variable WQE mode, need to align the slots to 256 */
889 if (wqe_mode == BNXT_QPLIB_WQE_MODE_VARIABLE && is_sq)
890 slots = ALIGN(slots, BNXT_VAR_MAX_SLOT_ALIGN);
891 return slots;
892 }
893
_set_sq_size(struct bnxt_qplib_q * que,u8 wqe_mode)894 static u32 _set_sq_size(struct bnxt_qplib_q *que, u8 wqe_mode)
895 {
896 /* For Variable mode supply number of 16B slots */
897 return (wqe_mode == BNXT_QPLIB_WQE_MODE_STATIC) ?
898 que->max_wqe : bnxt_qplib_get_depth(que, wqe_mode, true);
899 }
900
_set_sq_max_slot(u8 wqe_mode)901 static u32 _set_sq_max_slot(u8 wqe_mode)
902 {
903 /* for static mode index divisor is 8 */
904 return (wqe_mode == BNXT_QPLIB_WQE_MODE_STATIC) ?
905 sizeof(struct sq_send) / sizeof(struct sq_sge) : 1;
906 }
907
_set_rq_max_slot(struct bnxt_qplib_q * que)908 static u32 _set_rq_max_slot(struct bnxt_qplib_q *que)
909 {
910 return (que->wqe_size / sizeof(struct sq_sge));
911 }
912
bnxt_qplib_create_qp1(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)913 int bnxt_qplib_create_qp1(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
914 {
915 struct bnxt_qplib_hwq_attr hwq_attr = {};
916 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
917 struct creq_create_qp1_resp resp = {};
918 struct bnxt_qplib_cmdqmsg msg = {};
919 struct bnxt_qplib_q *sq = &qp->sq;
920 struct bnxt_qplib_q *rq = &qp->rq;
921 struct cmdq_create_qp1 req = {};
922 struct bnxt_qplib_reftbl *tbl;
923 unsigned long flag;
924 u8 pg_sz_lvl = 0;
925 u32 qp_flags = 0;
926 int rc;
927
928 /* General */
929 req.type = qp->type;
930 req.dpi = cpu_to_le32(qp->dpi->dpi);
931 req.qp_handle = cpu_to_le64(qp->qp_handle);
932 /* SQ */
933 hwq_attr.res = res;
934 hwq_attr.sginfo = &sq->sginfo;
935 hwq_attr.stride = bnxt_qplib_get_stride();
936 hwq_attr.depth = bnxt_qplib_get_depth(sq, qp->wqe_mode, false);
937 hwq_attr.type = HWQ_TYPE_QUEUE;
938 rc = bnxt_qplib_alloc_init_hwq(&sq->hwq, &hwq_attr);
939 if (rc)
940 goto exit;
941
942 req.sq_size = cpu_to_le32(_set_sq_size(sq, qp->wqe_mode));
943 req.sq_pbl = cpu_to_le64(_get_base_addr(&sq->hwq));
944 pg_sz_lvl = _get_base_pg_size(&sq->hwq) <<
945 CMDQ_CREATE_QP1_SQ_PG_SIZE_SFT;
946 pg_sz_lvl |= ((sq->hwq.level & CMDQ_CREATE_QP1_SQ_LVL_MASK) <<
947 CMDQ_CREATE_QP1_SQ_LVL_SFT);
948 req.sq_pg_size_sq_lvl = pg_sz_lvl;
949 req.sq_fwo_sq_sge = cpu_to_le16(((0 << CMDQ_CREATE_QP1_SQ_FWO_SFT) &
950 CMDQ_CREATE_QP1_SQ_FWO_MASK) |
951 (sq->max_sge &
952 CMDQ_CREATE_QP1_SQ_SGE_MASK));
953 req.scq_cid = cpu_to_le32(qp->scq->id);
954
955 /* RQ */
956 if (!qp->srq) {
957 hwq_attr.res = res;
958 hwq_attr.sginfo = &rq->sginfo;
959 hwq_attr.stride = bnxt_qplib_get_stride();
960 hwq_attr.depth = bnxt_qplib_get_depth(rq, qp->wqe_mode, false);
961 hwq_attr.type = HWQ_TYPE_QUEUE;
962 rc = bnxt_qplib_alloc_init_hwq(&rq->hwq, &hwq_attr);
963 if (rc)
964 goto fail_sq;
965 req.rq_size = cpu_to_le32(rq->max_wqe);
966 req.rq_pbl = cpu_to_le64(_get_base_addr(&rq->hwq));
967 pg_sz_lvl = _get_base_pg_size(&rq->hwq) <<
968 CMDQ_CREATE_QP1_RQ_PG_SIZE_SFT;
969 pg_sz_lvl |= ((rq->hwq.level & CMDQ_CREATE_QP1_RQ_LVL_MASK) <<
970 CMDQ_CREATE_QP1_RQ_LVL_SFT);
971 req.rq_pg_size_rq_lvl = pg_sz_lvl;
972 req.rq_fwo_rq_sge =
973 cpu_to_le16(((0 << CMDQ_CREATE_QP1_RQ_FWO_SFT) &
974 CMDQ_CREATE_QP1_RQ_FWO_MASK) |
975 (rq->max_sge &
976 CMDQ_CREATE_QP1_RQ_SGE_MASK));
977 } else {
978 /* SRQ */
979 qp_flags |= CMDQ_CREATE_QP1_QP_FLAGS_SRQ_USED;
980 req.srq_cid = cpu_to_le32(qp->srq->id);
981 }
982 req.rcq_cid = cpu_to_le32(qp->rcq->id);
983
984 qp_flags |= CMDQ_CREATE_QP1_QP_FLAGS_RESERVED_LKEY_ENABLE;
985 req.qp_flags = cpu_to_le32(qp_flags);
986 req.pd_id = cpu_to_le32(qp->pd->id);
987
988 bnxt_qplib_rcfw_cmd_prep(&req, CMDQ_BASE_OPCODE_CREATE_QP1,
989 sizeof(req));
990 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),
991 sizeof(resp), 0);
992 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
993 if (rc)
994 goto fail_rq;
995
996 rc = bnxt_qplib_alloc_init_swq(sq);
997 if (rc)
998 goto sq_swq;
999
1000 if (!qp->srq) {
1001 rc = bnxt_qplib_alloc_init_swq(rq);
1002 if (rc)
1003 goto rq_swq;
1004 }
1005
1006 qp->id = le32_to_cpu(resp.xid);
1007 qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET;
1008 qp->cctx = res->cctx;
1009 sq->dbinfo.hwq = &sq->hwq;
1010 sq->dbinfo.xid = qp->id;
1011 sq->dbinfo.db = qp->dpi->dbr;
1012 sq->dbinfo.max_slot = _set_sq_max_slot(qp->wqe_mode);
1013 sq->dbinfo.flags = 0;
1014 spin_lock_init(&sq->dbinfo.lock);
1015 sq->dbinfo.shadow_key = BNXT_QPLIB_DBR_KEY_INVALID;
1016 sq->dbinfo.res = res;
1017 if (rq->max_wqe) {
1018 rq->dbinfo.hwq = &rq->hwq;
1019 rq->dbinfo.xid = qp->id;
1020 rq->dbinfo.db = qp->dpi->dbr;
1021 rq->dbinfo.max_slot = _set_rq_max_slot(rq);
1022 rq->dbinfo.flags = 0;
1023 spin_lock_init(&rq->dbinfo.lock);
1024 rq->dbinfo.shadow_key = BNXT_QPLIB_DBR_KEY_INVALID;
1025 rq->dbinfo.res = res;
1026 }
1027
1028 tbl = &res->reftbl.qpref;
1029 spin_lock_irqsave(&tbl->lock, flag);
1030 tbl->rec[tbl->max].xid = qp->id;
1031 tbl->rec[tbl->max].handle = qp;
1032 spin_unlock_irqrestore(&tbl->lock, flag);
1033
1034 return 0;
1035 rq_swq:
1036 kfree(sq->swq);
1037 sq_swq:
1038 __qplib_destroy_qp(rcfw, qp);
1039 fail_rq:
1040 bnxt_qplib_free_hwq(res, &rq->hwq);
1041 fail_sq:
1042 bnxt_qplib_free_hwq(res, &sq->hwq);
1043 exit:
1044 return rc;
1045 }
1046
bnxt_qplib_init_psn_ptr(struct bnxt_qplib_qp * qp,int size)1047 static void bnxt_qplib_init_psn_ptr(struct bnxt_qplib_qp *qp, int size)
1048 {
1049 struct bnxt_qplib_hwq *sq_hwq;
1050 struct bnxt_qplib_q *sq;
1051 u64 fpsne, psn_pg;
1052 u16 indx_pad = 0;
1053
1054 sq = &qp->sq;
1055 sq_hwq = &sq->hwq;
1056 /* First psn entry */
1057 fpsne = (u64)bnxt_qplib_get_qe(sq_hwq, sq_hwq->depth, &psn_pg);
1058 if (!IS_ALIGNED(fpsne, PAGE_SIZE))
1059 indx_pad = (fpsne & ~PAGE_MASK) / size;
1060 sq_hwq->pad_pgofft = indx_pad;
1061 sq_hwq->pad_pg = (u64 *)psn_pg;
1062 sq_hwq->pad_stride = size;
1063 }
1064
bnxt_qplib_create_qp(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)1065 int bnxt_qplib_create_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
1066 {
1067 struct bnxt_qplib_hwq_attr hwq_attr = {};
1068 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
1069 struct bnxt_qplib_sg_info sginfo = {};
1070 struct creq_create_qp_resp resp = {};
1071 struct bnxt_qplib_cmdqmsg msg = {};
1072 struct bnxt_qplib_q *sq = &qp->sq;
1073 struct bnxt_qplib_q *rq = &qp->rq;
1074 struct cmdq_create_qp req = {};
1075 struct bnxt_qplib_reftbl *tbl;
1076 struct bnxt_qplib_hwq *xrrq;
1077 int rc, req_size, psn_sz;
1078 unsigned long flag;
1079 u8 pg_sz_lvl = 0;
1080 u32 qp_flags = 0;
1081 u32 qp_idx;
1082 u16 nsge;
1083 u32 sqsz;
1084
1085 qp->cctx = res->cctx;
1086 if (res->dattr) {
1087 qp->dev_cap_flags = res->dattr->dev_cap_flags;
1088 qp->is_host_msn_tbl = _is_host_msn_table(res->dattr->dev_cap_ext_flags2);
1089 }
1090
1091 /* General */
1092 req.type = qp->type;
1093 req.dpi = cpu_to_le32(qp->dpi->dpi);
1094 req.qp_handle = cpu_to_le64(qp->qp_handle);
1095
1096 /* SQ */
1097 if (qp->type == CMDQ_CREATE_QP_TYPE_RC) {
1098 psn_sz = _is_chip_gen_p5_p7(qp->cctx) ?
1099 sizeof(struct sq_psn_search_ext) :
1100 sizeof(struct sq_psn_search);
1101 if (qp->is_host_msn_tbl) {
1102 psn_sz = sizeof(struct sq_msn_search);
1103 qp->msn = 0;
1104 }
1105 } else {
1106 psn_sz = 0;
1107 }
1108
1109 hwq_attr.res = res;
1110 hwq_attr.sginfo = &sq->sginfo;
1111 hwq_attr.stride = bnxt_qplib_get_stride();
1112 hwq_attr.depth = bnxt_qplib_get_depth(sq, qp->wqe_mode, true);
1113 hwq_attr.aux_stride = psn_sz;
1114 hwq_attr.aux_depth = (psn_sz) ?
1115 _set_sq_size(sq, qp->wqe_mode) : 0;
1116 /* Update msn tbl size */
1117 if (qp->is_host_msn_tbl && psn_sz) {
1118 if (qp->wqe_mode == BNXT_QPLIB_WQE_MODE_STATIC)
1119 hwq_attr.aux_depth = roundup_pow_of_two(_set_sq_size(sq, qp->wqe_mode));
1120 else
1121 hwq_attr.aux_depth = roundup_pow_of_two(_set_sq_size(sq, qp->wqe_mode)) / 2;
1122 qp->msn_tbl_sz = hwq_attr.aux_depth;
1123 qp->msn = 0;
1124 }
1125 hwq_attr.type = HWQ_TYPE_QUEUE;
1126 rc = bnxt_qplib_alloc_init_hwq(&sq->hwq, &hwq_attr);
1127 if (rc)
1128 goto exit;
1129
1130 sqsz = _set_sq_size(sq, qp->wqe_mode);
1131 /* 0xffff is the max sq size hw limits to */
1132 if (sqsz > BNXT_QPLIB_MAX_SQSZ) {
1133 pr_err("QPLIB: FP: QP (0x%x) exceeds sq size %d\n", qp->id, sqsz);
1134 goto fail_sq;
1135 }
1136 req.sq_size = cpu_to_le32(sqsz);
1137 req.sq_pbl = cpu_to_le64(_get_base_addr(&sq->hwq));
1138 pg_sz_lvl = _get_base_pg_size(&sq->hwq) <<
1139 CMDQ_CREATE_QP_SQ_PG_SIZE_SFT;
1140 pg_sz_lvl |= ((sq->hwq.level & CMDQ_CREATE_QP_SQ_LVL_MASK) <<
1141 CMDQ_CREATE_QP_SQ_LVL_SFT);
1142 req.sq_pg_size_sq_lvl = pg_sz_lvl;
1143 req.sq_fwo_sq_sge = cpu_to_le16(((0 << CMDQ_CREATE_QP_SQ_FWO_SFT) &
1144 CMDQ_CREATE_QP_SQ_FWO_MASK) |
1145 (sq->max_sge &
1146 CMDQ_CREATE_QP_SQ_SGE_MASK));
1147 req.scq_cid = cpu_to_le32(qp->scq->id);
1148
1149 /* RQ/SRQ */
1150 if (!qp->srq) {
1151 hwq_attr.res = res;
1152 hwq_attr.sginfo = &rq->sginfo;
1153 hwq_attr.stride = bnxt_qplib_get_stride();
1154 hwq_attr.depth = bnxt_qplib_get_depth(rq, qp->wqe_mode, false);
1155 hwq_attr.aux_stride = 0;
1156 hwq_attr.aux_depth = 0;
1157 hwq_attr.type = HWQ_TYPE_QUEUE;
1158 rc = bnxt_qplib_alloc_init_hwq(&rq->hwq, &hwq_attr);
1159 if (rc)
1160 goto fail_sq;
1161 req.rq_size = cpu_to_le32(rq->max_wqe);
1162 req.rq_pbl = cpu_to_le64(_get_base_addr(&rq->hwq));
1163 pg_sz_lvl = _get_base_pg_size(&rq->hwq) <<
1164 CMDQ_CREATE_QP_RQ_PG_SIZE_SFT;
1165 pg_sz_lvl |= ((rq->hwq.level & CMDQ_CREATE_QP_RQ_LVL_MASK) <<
1166 CMDQ_CREATE_QP_RQ_LVL_SFT);
1167 req.rq_pg_size_rq_lvl = pg_sz_lvl;
1168 nsge = (qp->wqe_mode == BNXT_QPLIB_WQE_MODE_STATIC) ?
1169 res->dattr->max_qp_sges : rq->max_sge;
1170 req.rq_fwo_rq_sge =
1171 cpu_to_le16(((0 << CMDQ_CREATE_QP_RQ_FWO_SFT) &
1172 CMDQ_CREATE_QP_RQ_FWO_MASK) |
1173 (nsge & CMDQ_CREATE_QP_RQ_SGE_MASK));
1174 } else {
1175 qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_SRQ_USED;
1176 req.srq_cid = cpu_to_le32(qp->srq->id);
1177 }
1178 req.rcq_cid = cpu_to_le32(qp->rcq->id);
1179
1180 qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_RESERVED_LKEY_ENABLE;
1181 qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_FR_PMR_ENABLED;
1182 if (qp->sig_type)
1183 qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_FORCE_COMPLETION;
1184 if (qp->wqe_mode == BNXT_QPLIB_WQE_MODE_VARIABLE)
1185 qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_VARIABLE_SIZED_WQE_ENABLED;
1186 if (res->cctx->modes.te_bypass)
1187 qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_OPTIMIZED_TRANSMIT_ENABLED;
1188 if (res->dattr &&
1189 bnxt_ext_stats_supported(qp->cctx, res->dattr->dev_cap_flags, res->is_vf))
1190 qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_EXT_STATS_ENABLED;
1191 req.qp_flags = cpu_to_le32(qp_flags);
1192
1193 /* ORRQ and IRRQ */
1194 if (psn_sz) {
1195 xrrq = &qp->orrq;
1196 xrrq->max_elements =
1197 ORD_LIMIT_TO_ORRQ_SLOTS(qp->max_rd_atomic);
1198 req_size = xrrq->max_elements *
1199 BNXT_QPLIB_MAX_ORRQE_ENTRY_SIZE + PAGE_SIZE - 1;
1200 req_size &= ~(PAGE_SIZE - 1);
1201 sginfo.pgsize = req_size;
1202 sginfo.pgshft = PAGE_SHIFT;
1203
1204 hwq_attr.res = res;
1205 hwq_attr.sginfo = &sginfo;
1206 hwq_attr.depth = xrrq->max_elements;
1207 hwq_attr.stride = BNXT_QPLIB_MAX_ORRQE_ENTRY_SIZE;
1208 hwq_attr.aux_stride = 0;
1209 hwq_attr.aux_depth = 0;
1210 hwq_attr.type = HWQ_TYPE_CTX;
1211 rc = bnxt_qplib_alloc_init_hwq(xrrq, &hwq_attr);
1212 if (rc)
1213 goto fail_rq;
1214 req.orrq_addr = cpu_to_le64(_get_base_addr(xrrq));
1215
1216 xrrq = &qp->irrq;
1217 xrrq->max_elements = IRD_LIMIT_TO_IRRQ_SLOTS(
1218 qp->max_dest_rd_atomic);
1219 req_size = xrrq->max_elements *
1220 BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE + PAGE_SIZE - 1;
1221 req_size &= ~(PAGE_SIZE - 1);
1222 sginfo.pgsize = req_size;
1223 hwq_attr.depth = xrrq->max_elements;
1224 hwq_attr.stride = BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE;
1225 rc = bnxt_qplib_alloc_init_hwq(xrrq, &hwq_attr);
1226 if (rc)
1227 goto fail_orrq;
1228 req.irrq_addr = cpu_to_le64(_get_base_addr(xrrq));
1229 }
1230 req.pd_id = cpu_to_le32(qp->pd->id);
1231
1232 bnxt_qplib_rcfw_cmd_prep(&req, CMDQ_BASE_OPCODE_CREATE_QP,
1233 sizeof(req));
1234 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),
1235 sizeof(resp), 0);
1236 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
1237 if (rc)
1238 goto fail;
1239
1240 if (!qp->is_user) {
1241 rc = bnxt_qplib_alloc_init_swq(sq);
1242 if (rc)
1243 goto swq_sq;
1244 if (!qp->srq) {
1245 rc = bnxt_qplib_alloc_init_swq(rq);
1246 if (rc)
1247 goto swq_rq;
1248 }
1249 if (psn_sz)
1250 bnxt_qplib_init_psn_ptr(qp, psn_sz);
1251 }
1252 qp->id = le32_to_cpu(resp.xid);
1253 qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET;
1254 INIT_LIST_HEAD(&qp->sq_flush);
1255 INIT_LIST_HEAD(&qp->rq_flush);
1256
1257 sq->dbinfo.hwq = &sq->hwq;
1258 sq->dbinfo.xid = qp->id;
1259 sq->dbinfo.db = qp->dpi->dbr;
1260 sq->dbinfo.max_slot = _set_sq_max_slot(qp->wqe_mode);
1261 sq->dbinfo.flags = 0;
1262 spin_lock_init(&sq->dbinfo.lock);
1263 sq->dbinfo.shadow_key = BNXT_QPLIB_DBR_KEY_INVALID;
1264 sq->dbinfo.res = res;
1265 sq->dbinfo.seed = qp->id;
1266 if (rq->max_wqe) {
1267 rq->dbinfo.hwq = &rq->hwq;
1268 rq->dbinfo.xid = qp->id;
1269 rq->dbinfo.db = qp->dpi->dbr;
1270 rq->dbinfo.max_slot = _set_rq_max_slot(rq);
1271 rq->dbinfo.flags = 0;
1272 spin_lock_init(&rq->dbinfo.lock);
1273 rq->dbinfo.shadow_key = BNXT_QPLIB_DBR_KEY_INVALID;
1274 rq->dbinfo.res = res;
1275 rq->dbinfo.seed = qp->id;
1276 }
1277
1278 tbl = &res->reftbl.qpref;
1279 qp_idx = map_qp_id_to_tbl_indx(qp->id, tbl);
1280 spin_lock_irqsave(&tbl->lock, flag);
1281 tbl->rec[qp_idx].xid = qp->id;
1282 tbl->rec[qp_idx].handle = qp;
1283 spin_unlock_irqrestore(&tbl->lock, flag);
1284
1285 return 0;
1286 swq_rq:
1287 kfree(sq->swq);
1288 swq_sq:
1289 __qplib_destroy_qp(rcfw, qp);
1290 fail:
1291 bnxt_qplib_free_hwq(res, &qp->irrq);
1292 fail_orrq:
1293 bnxt_qplib_free_hwq(res, &qp->orrq);
1294 fail_rq:
1295 bnxt_qplib_free_hwq(res, &rq->hwq);
1296 fail_sq:
1297 bnxt_qplib_free_hwq(res, &sq->hwq);
1298 exit:
1299 return rc;
1300 }
1301
__filter_modify_flags(struct bnxt_qplib_qp * qp)1302 static void __filter_modify_flags(struct bnxt_qplib_qp *qp)
1303 {
1304 switch (qp->cur_qp_state) {
1305 case CMDQ_MODIFY_QP_NEW_STATE_RESET:
1306 switch (qp->state) {
1307 case CMDQ_MODIFY_QP_NEW_STATE_INIT:
1308 break;
1309 default:
1310 break;
1311 }
1312 break;
1313 case CMDQ_MODIFY_QP_NEW_STATE_INIT:
1314 switch (qp->state) {
1315 case CMDQ_MODIFY_QP_NEW_STATE_RTR:
1316 if (!(qp->modify_flags &
1317 CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU)) {
1318 qp->modify_flags |=
1319 CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU;
1320 qp->path_mtu = CMDQ_MODIFY_QP_PATH_MTU_MTU_2048;
1321 }
1322 qp->modify_flags &=
1323 ~CMDQ_MODIFY_QP_MODIFY_MASK_VLAN_ID;
1324 /* Bono FW requires the max_dest_rd_atomic to be >= 1 */
1325 if (qp->max_dest_rd_atomic < 1)
1326 qp->max_dest_rd_atomic = 1;
1327 qp->modify_flags &= ~CMDQ_MODIFY_QP_MODIFY_MASK_SRC_MAC;
1328 /* Bono FW 20.6.5 requires SGID_INDEX to be configured */
1329 if (!(qp->modify_flags &
1330 CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX)) {
1331 qp->modify_flags |=
1332 CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX;
1333 qp->ah.sgid_index = 0;
1334 }
1335 break;
1336 default:
1337 break;
1338 }
1339 break;
1340 case CMDQ_MODIFY_QP_NEW_STATE_RTR:
1341 switch (qp->state) {
1342 case CMDQ_MODIFY_QP_NEW_STATE_RTS:
1343 /* Bono FW requires the max_rd_atomic to be >= 1 */
1344 if (qp->max_rd_atomic < 1)
1345 qp->max_rd_atomic = 1;
1346 qp->modify_flags &=
1347 ~(CMDQ_MODIFY_QP_MODIFY_MASK_PKEY |
1348 CMDQ_MODIFY_QP_MODIFY_MASK_DGID |
1349 CMDQ_MODIFY_QP_MODIFY_MASK_FLOW_LABEL |
1350 CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX |
1351 CMDQ_MODIFY_QP_MODIFY_MASK_HOP_LIMIT |
1352 CMDQ_MODIFY_QP_MODIFY_MASK_TRAFFIC_CLASS |
1353 CMDQ_MODIFY_QP_MODIFY_MASK_DEST_MAC |
1354 CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU |
1355 CMDQ_MODIFY_QP_MODIFY_MASK_RQ_PSN |
1356 CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER |
1357 CMDQ_MODIFY_QP_MODIFY_MASK_MAX_DEST_RD_ATOMIC |
1358 CMDQ_MODIFY_QP_MODIFY_MASK_DEST_QP_ID);
1359 break;
1360 default:
1361 break;
1362 }
1363 break;
1364 case CMDQ_MODIFY_QP_NEW_STATE_RTS:
1365 break;
1366 case CMDQ_MODIFY_QP_NEW_STATE_SQD:
1367 break;
1368 case CMDQ_MODIFY_QP_NEW_STATE_SQE:
1369 break;
1370 case CMDQ_MODIFY_QP_NEW_STATE_ERR:
1371 break;
1372 default:
1373 break;
1374 }
1375 }
1376
bnxt_qplib_modify_qp(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)1377 int bnxt_qplib_modify_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
1378 {
1379 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
1380 struct creq_modify_qp_resp resp = {};
1381 struct bnxt_qplib_cmdqmsg msg = {};
1382 struct cmdq_modify_qp req = {};
1383 bool ppp_requested = false;
1384 u32 temp32[4];
1385 u32 bmask;
1386 int rc;
1387
1388 bnxt_qplib_rcfw_cmd_prep(&req, CMDQ_BASE_OPCODE_MODIFY_QP,
1389 sizeof(req));
1390
1391 /* Filter out the qp_attr_mask based on the state->new transition */
1392 __filter_modify_flags(qp);
1393 bmask = qp->modify_flags;
1394 req.modify_mask = cpu_to_le32(qp->modify_flags);
1395 req.qp_cid = cpu_to_le32(qp->id);
1396 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_STATE) {
1397 req.network_type_en_sqd_async_notify_new_state =
1398 (qp->state & CMDQ_MODIFY_QP_NEW_STATE_MASK) |
1399 (qp->en_sqd_async_notify == true ?
1400 CMDQ_MODIFY_QP_EN_SQD_ASYNC_NOTIFY : 0);
1401 if (__can_request_ppp(qp)) {
1402 req.path_mtu_pingpong_push_enable =
1403 CMDQ_MODIFY_QP_PINGPONG_PUSH_ENABLE;
1404 req.pingpong_push_dpi = qp->ppp.dpi;
1405 ppp_requested = true;
1406 }
1407 }
1408 req.network_type_en_sqd_async_notify_new_state |= qp->nw_type;
1409
1410 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_ACCESS) {
1411 req.access = qp->access;
1412 }
1413 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_PKEY)
1414 req.pkey = IB_DEFAULT_PKEY_FULL;
1415
1416 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_QKEY) {
1417 req.qkey = cpu_to_le32(qp->qkey);
1418 }
1419 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DGID) {
1420 memcpy(temp32, qp->ah.dgid.data, sizeof(struct bnxt_qplib_gid));
1421 req.dgid[0] = cpu_to_le32(temp32[0]);
1422 req.dgid[1] = cpu_to_le32(temp32[1]);
1423 req.dgid[2] = cpu_to_le32(temp32[2]);
1424 req.dgid[3] = cpu_to_le32(temp32[3]);
1425 }
1426 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_FLOW_LABEL) {
1427 req.flow_label = cpu_to_le32(qp->ah.flow_label);
1428 }
1429 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX) {
1430 req.sgid_index = cpu_to_le16(res->sgid_tbl.hw_id[qp->ah.sgid_index]);
1431 }
1432 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_HOP_LIMIT) {
1433 req.hop_limit = qp->ah.hop_limit;
1434 }
1435 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_TRAFFIC_CLASS) {
1436 req.traffic_class = qp->ah.traffic_class;
1437 }
1438 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DEST_MAC) {
1439 memcpy(req.dest_mac, qp->ah.dmac, 6);
1440 }
1441 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU) {
1442 req.path_mtu_pingpong_push_enable = qp->path_mtu;
1443 }
1444 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_TIMEOUT) {
1445 req.timeout = qp->timeout;
1446 }
1447 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RETRY_CNT) {
1448 req.retry_cnt = qp->retry_cnt;
1449 }
1450 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RNR_RETRY) {
1451 req.rnr_retry = qp->rnr_retry;
1452 }
1453 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER) {
1454 req.min_rnr_timer = qp->min_rnr_timer;
1455 }
1456 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RQ_PSN) {
1457 req.rq_psn = cpu_to_le32(qp->rq.psn);
1458 }
1459 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_SQ_PSN) {
1460 req.sq_psn = cpu_to_le32(qp->sq.psn);
1461 }
1462 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MAX_RD_ATOMIC) {
1463 req.max_rd_atomic =
1464 ORD_LIMIT_TO_ORRQ_SLOTS(qp->max_rd_atomic);
1465 }
1466 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MAX_DEST_RD_ATOMIC) {
1467 req.max_dest_rd_atomic =
1468 IRD_LIMIT_TO_IRRQ_SLOTS(qp->max_dest_rd_atomic);
1469 }
1470 req.sq_size = cpu_to_le32(qp->sq.hwq.max_elements);
1471 req.rq_size = cpu_to_le32(qp->rq.hwq.max_elements);
1472 req.sq_sge = cpu_to_le16(qp->sq.max_sge);
1473 req.rq_sge = cpu_to_le16(qp->rq.max_sge);
1474 req.max_inline_data = cpu_to_le32(qp->max_inline_data);
1475 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DEST_QP_ID)
1476 req.dest_qp_id = cpu_to_le32(qp->dest_qpn);
1477 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_ENABLE_CC)
1478 req.enable_cc = cpu_to_le16(CMDQ_MODIFY_QP_ENABLE_CC);
1479 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_TOS_ECN)
1480 req.tos_dscp_tos_ecn =
1481 ((qp->tos_ecn << CMDQ_MODIFY_QP_TOS_ECN_SFT) &
1482 CMDQ_MODIFY_QP_TOS_ECN_MASK);
1483 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_TOS_DSCP)
1484 req.tos_dscp_tos_ecn |=
1485 ((qp->tos_dscp << CMDQ_MODIFY_QP_TOS_DSCP_SFT) &
1486 CMDQ_MODIFY_QP_TOS_DSCP_MASK);
1487 req.vlan_pcp_vlan_dei_vlan_id = cpu_to_le16(qp->vlan_id);
1488 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),
1489 sizeof(resp), 0);
1490 msg.qp_state = qp->state;
1491
1492 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
1493 if (rc == -ETIMEDOUT && (qp->state == CMDQ_MODIFY_QP_NEW_STATE_ERR)) {
1494 qp->cur_qp_state = qp->state;
1495 return 0;
1496 } else if (rc) {
1497 return rc;
1498 }
1499
1500 if (ppp_requested)
1501 qp->ppp.st_idx_en = resp.pingpong_push_state_index_enabled;
1502
1503 qp->cur_qp_state = qp->state;
1504 return 0;
1505 }
1506
bnxt_qplib_query_qp(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)1507 int bnxt_qplib_query_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
1508 {
1509 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
1510 struct creq_query_qp_resp resp = {};
1511 struct bnxt_qplib_cmdqmsg msg = {};
1512 struct bnxt_qplib_rcfw_sbuf sbuf;
1513 struct creq_query_qp_resp_sb *sb;
1514 struct cmdq_query_qp req = {};
1515 u32 temp32[4];
1516 int i, rc;
1517
1518 sbuf.size = ALIGN(sizeof(*sb), BNXT_QPLIB_CMDQE_UNITS);
1519 sbuf.sb = dma_zalloc_coherent(&rcfw->pdev->dev, sbuf.size,
1520 &sbuf.dma_addr, GFP_KERNEL);
1521 if (!sbuf.sb)
1522 return -ENOMEM;
1523 sb = sbuf.sb;
1524
1525 bnxt_qplib_rcfw_cmd_prep(&req, CMDQ_BASE_OPCODE_QUERY_QP,
1526 sizeof(req));
1527 req.qp_cid = cpu_to_le32(qp->id);
1528 req.resp_size = sbuf.size / BNXT_QPLIB_CMDQE_UNITS;
1529 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, &sbuf, sizeof(req),
1530 sizeof(resp), 0);
1531 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
1532 if (rc)
1533 goto bail;
1534
1535 /* Extract the context from the side buffer */
1536 qp->state = sb->en_sqd_async_notify_state &
1537 CREQ_QUERY_QP_RESP_SB_STATE_MASK;
1538 qp->cur_qp_state = qp->state;
1539 qp->en_sqd_async_notify = sb->en_sqd_async_notify_state &
1540 CREQ_QUERY_QP_RESP_SB_EN_SQD_ASYNC_NOTIFY ?
1541 true : false;
1542 qp->access = sb->access;
1543 qp->pkey_index = le16_to_cpu(sb->pkey);
1544 qp->qkey = le32_to_cpu(sb->qkey);
1545
1546 temp32[0] = le32_to_cpu(sb->dgid[0]);
1547 temp32[1] = le32_to_cpu(sb->dgid[1]);
1548 temp32[2] = le32_to_cpu(sb->dgid[2]);
1549 temp32[3] = le32_to_cpu(sb->dgid[3]);
1550 memcpy(qp->ah.dgid.data, temp32, sizeof(qp->ah.dgid.data));
1551
1552 qp->ah.flow_label = le32_to_cpu(sb->flow_label);
1553
1554 qp->ah.sgid_index = 0;
1555 for (i = 0; i < res->sgid_tbl.max; i++) {
1556 if (res->sgid_tbl.hw_id[i] == le16_to_cpu(sb->sgid_index)) {
1557 qp->ah.sgid_index = i;
1558 break;
1559 }
1560 }
1561 if (i == res->sgid_tbl.max)
1562 dev_dbg(&res->pdev->dev,
1563 "QPLIB: SGID not found qp->id = 0x%x sgid_index = 0x%x\n",
1564 qp->id, le16_to_cpu(sb->sgid_index));
1565
1566 qp->ah.hop_limit = sb->hop_limit;
1567 qp->ah.traffic_class = sb->traffic_class;
1568 memcpy(qp->ah.dmac, sb->dest_mac, ETH_ALEN);
1569 qp->ah.vlan_id = le16_to_cpu(sb->path_mtu_dest_vlan_id) &
1570 CREQ_QUERY_QP_RESP_SB_VLAN_ID_MASK >>
1571 CREQ_QUERY_QP_RESP_SB_VLAN_ID_SFT;
1572 qp->path_mtu = le16_to_cpu(sb->path_mtu_dest_vlan_id) &
1573 CREQ_QUERY_QP_RESP_SB_PATH_MTU_MASK;
1574 qp->timeout = sb->timeout;
1575 qp->retry_cnt = sb->retry_cnt;
1576 qp->rnr_retry = sb->rnr_retry;
1577 qp->min_rnr_timer = sb->min_rnr_timer;
1578 qp->rq.psn = le32_to_cpu(sb->rq_psn);
1579 qp->max_rd_atomic = ORRQ_SLOTS_TO_ORD_LIMIT(sb->max_rd_atomic);
1580 qp->sq.psn = le32_to_cpu(sb->sq_psn);
1581 qp->max_dest_rd_atomic =
1582 IRRQ_SLOTS_TO_IRD_LIMIT(sb->max_dest_rd_atomic);
1583 qp->sq.max_wqe = qp->sq.hwq.max_elements;
1584 qp->rq.max_wqe = qp->rq.hwq.max_elements;
1585 qp->sq.max_sge = le16_to_cpu(sb->sq_sge);
1586 qp->rq.max_sge = le16_to_cpu(sb->rq_sge);
1587 qp->max_inline_data = le32_to_cpu(sb->max_inline_data);
1588 qp->dest_qpn = le32_to_cpu(sb->dest_qp_id);
1589 memcpy(qp->smac, sb->src_mac, ETH_ALEN);
1590 qp->vlan_id = le16_to_cpu(sb->vlan_pcp_vlan_dei_vlan_id);
1591 qp->port_id = le16_to_cpu(sb->port_id);
1592 bail:
1593 dma_free_coherent(&rcfw->pdev->dev, sbuf.size,
1594 sbuf.sb, sbuf.dma_addr);
1595 return rc;
1596 }
1597
1598
__clean_cq(struct bnxt_qplib_cq * cq,u64 qp)1599 static void __clean_cq(struct bnxt_qplib_cq *cq, u64 qp)
1600 {
1601 struct bnxt_qplib_hwq *cq_hwq = &cq->hwq;
1602 u32 peek_flags, peek_cons;
1603 struct cq_base *hw_cqe;
1604 int i;
1605
1606 peek_flags = cq->dbinfo.flags;
1607 peek_cons = cq_hwq->cons;
1608 for (i = 0; i < cq_hwq->depth; i++) {
1609 hw_cqe = bnxt_qplib_get_qe(cq_hwq, peek_cons, NULL);
1610 if (CQE_CMP_VALID(hw_cqe, peek_flags)) {
1611 dma_rmb();
1612 switch (hw_cqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK) {
1613 case CQ_BASE_CQE_TYPE_REQ:
1614 case CQ_BASE_CQE_TYPE_TERMINAL:
1615 {
1616 struct cq_req *cqe = (struct cq_req *)hw_cqe;
1617
1618 if (qp == le64_to_cpu(cqe->qp_handle))
1619 cqe->qp_handle = 0;
1620 break;
1621 }
1622 case CQ_BASE_CQE_TYPE_RES_RC:
1623 case CQ_BASE_CQE_TYPE_RES_UD:
1624 case CQ_BASE_CQE_TYPE_RES_RAWETH_QP1:
1625 {
1626 struct cq_res_rc *cqe = (struct cq_res_rc *)hw_cqe;
1627
1628 if (qp == le64_to_cpu(cqe->qp_handle))
1629 cqe->qp_handle = 0;
1630 break;
1631 }
1632 default:
1633 break;
1634 }
1635 }
1636 bnxt_qplib_hwq_incr_cons(cq_hwq->depth, &peek_cons,
1637 1, &peek_flags);
1638 }
1639 }
1640
bnxt_qplib_destroy_qp(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)1641 int bnxt_qplib_destroy_qp(struct bnxt_qplib_res *res,
1642 struct bnxt_qplib_qp *qp)
1643 {
1644 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
1645 struct bnxt_qplib_reftbl *tbl;
1646 unsigned long flags;
1647 u32 qp_idx;
1648 int rc;
1649
1650 tbl = &res->reftbl.qpref;
1651 qp_idx = map_qp_id_to_tbl_indx(qp->id, tbl);
1652 spin_lock_irqsave(&tbl->lock, flags);
1653 tbl->rec[qp_idx].xid = BNXT_QPLIB_QP_ID_INVALID;
1654 tbl->rec[qp_idx].handle = NULL;
1655 spin_unlock_irqrestore(&tbl->lock, flags);
1656
1657 rc = __qplib_destroy_qp(rcfw, qp);
1658 if (rc) {
1659 spin_lock_irqsave(&tbl->lock, flags);
1660 tbl->rec[qp_idx].xid = qp->id;
1661 tbl->rec[qp_idx].handle = qp;
1662 spin_unlock_irqrestore(&tbl->lock, flags);
1663 return rc;
1664 }
1665
1666 return 0;
1667 }
1668
bnxt_qplib_free_qp_res(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)1669 void bnxt_qplib_free_qp_res(struct bnxt_qplib_res *res,
1670 struct bnxt_qplib_qp *qp)
1671 {
1672 if (qp->irrq.max_elements)
1673 bnxt_qplib_free_hwq(res, &qp->irrq);
1674 if (qp->orrq.max_elements)
1675 bnxt_qplib_free_hwq(res, &qp->orrq);
1676
1677 if (!qp->is_user)
1678 kfree(qp->rq.swq);
1679 bnxt_qplib_free_hwq(res, &qp->rq.hwq);
1680
1681 if (!qp->is_user)
1682 kfree(qp->sq.swq);
1683 bnxt_qplib_free_hwq(res, &qp->sq.hwq);
1684 }
1685
bnxt_qplib_get_qp1_sq_buf(struct bnxt_qplib_qp * qp,struct bnxt_qplib_sge * sge)1686 void *bnxt_qplib_get_qp1_sq_buf(struct bnxt_qplib_qp *qp,
1687 struct bnxt_qplib_sge *sge)
1688 {
1689 struct bnxt_qplib_q *sq = &qp->sq;
1690 struct bnxt_qplib_hdrbuf *buf;
1691 u32 sw_prod;
1692
1693 memset(sge, 0, sizeof(*sge));
1694
1695 buf = qp->sq_hdr_buf;
1696 if (buf) {
1697 sw_prod = sq->swq_start;
1698 sge->addr = (dma_addr_t)(buf->dma_map + sw_prod * buf->step);
1699 sge->lkey = 0xFFFFFFFF;
1700 sge->size = buf->step;
1701 return buf->va + sw_prod * sge->size;
1702 }
1703 return NULL;
1704 }
1705
bnxt_qplib_get_rq_prod_index(struct bnxt_qplib_qp * qp)1706 u32 bnxt_qplib_get_rq_prod_index(struct bnxt_qplib_qp *qp)
1707 {
1708 struct bnxt_qplib_q *rq = &qp->rq;
1709
1710 return rq->swq_start;
1711 }
1712
bnxt_qplib_get_qp1_rq_buf(struct bnxt_qplib_qp * qp,struct bnxt_qplib_sge * sge)1713 void *bnxt_qplib_get_qp1_rq_buf(struct bnxt_qplib_qp *qp,
1714 struct bnxt_qplib_sge *sge)
1715 {
1716 struct bnxt_qplib_q *rq = &qp->rq;
1717 struct bnxt_qplib_hdrbuf *buf;
1718 u32 sw_prod;
1719
1720 memset(sge, 0, sizeof(*sge));
1721
1722 buf = qp->rq_hdr_buf;
1723 if (buf) {
1724 sw_prod = rq->swq_start;
1725 sge->addr = (dma_addr_t)(buf->dma_map + sw_prod * buf->step);
1726 sge->lkey = 0xFFFFFFFF;
1727 sge->size = buf->step;
1728 return buf->va + sw_prod * sge->size;
1729 }
1730 return NULL;
1731 }
1732
1733 /* Fil the MSN table into the next psn row */
bnxt_qplib_fill_msn_search(struct bnxt_qplib_qp * qp,struct bnxt_qplib_swqe * wqe,struct bnxt_qplib_swq * swq)1734 static void bnxt_qplib_fill_msn_search(struct bnxt_qplib_qp *qp,
1735 struct bnxt_qplib_swqe *wqe,
1736 struct bnxt_qplib_swq *swq)
1737 {
1738 struct sq_msn_search *msns;
1739 u32 start_psn, next_psn;
1740 u16 start_idx;
1741
1742 msns = (struct sq_msn_search *)swq->psn_search;
1743 msns->start_idx_next_psn_start_psn = 0;
1744
1745 start_psn = swq->start_psn;
1746 next_psn = swq->next_psn;
1747 start_idx = swq->slot_idx;
1748 msns->start_idx_next_psn_start_psn |=
1749 bnxt_re_update_msn_tbl(start_idx, next_psn, start_psn);
1750 pr_debug("QP_LIB MSN %d START_IDX %u NEXT_PSN %u START_PSN %u\n",
1751 qp->msn,
1752 (u16)
1753 cpu_to_le16(BNXT_RE_MSN_IDX(msns->start_idx_next_psn_start_psn)),
1754 (u32)
1755 cpu_to_le32(BNXT_RE_MSN_NPSN(msns->start_idx_next_psn_start_psn)),
1756 (u32)
1757 cpu_to_le32(BNXT_RE_MSN_SPSN(msns->start_idx_next_psn_start_psn)));
1758 qp->msn++;
1759 qp->msn %= qp->msn_tbl_sz;
1760 }
1761
bnxt_qplib_fill_psn_search(struct bnxt_qplib_qp * qp,struct bnxt_qplib_swqe * wqe,struct bnxt_qplib_swq * swq)1762 static void bnxt_qplib_fill_psn_search(struct bnxt_qplib_qp *qp,
1763 struct bnxt_qplib_swqe *wqe,
1764 struct bnxt_qplib_swq *swq)
1765 {
1766 struct sq_psn_search_ext *psns_ext;
1767 struct sq_psn_search *psns;
1768 u32 flg_npsn;
1769 u32 op_spsn;
1770
1771 if (!swq->psn_search)
1772 return;
1773
1774 /* Handle MSN differently on cap flags */
1775 if (qp->is_host_msn_tbl) {
1776 bnxt_qplib_fill_msn_search(qp, wqe, swq);
1777 return;
1778 }
1779 psns = (struct sq_psn_search *)swq->psn_search;
1780 psns_ext = (struct sq_psn_search_ext *)swq->psn_search;
1781
1782 op_spsn = ((swq->start_psn << SQ_PSN_SEARCH_START_PSN_SFT) &
1783 SQ_PSN_SEARCH_START_PSN_MASK);
1784 op_spsn |= ((wqe->type << SQ_PSN_SEARCH_OPCODE_SFT) &
1785 SQ_PSN_SEARCH_OPCODE_MASK);
1786 flg_npsn = ((swq->next_psn << SQ_PSN_SEARCH_NEXT_PSN_SFT) &
1787 SQ_PSN_SEARCH_NEXT_PSN_MASK);
1788
1789 if (_is_chip_gen_p5_p7(qp->cctx)) {
1790 psns_ext->opcode_start_psn = cpu_to_le32(op_spsn);
1791 psns_ext->flags_next_psn = cpu_to_le32(flg_npsn);
1792 psns_ext->start_slot_idx = cpu_to_le16(swq->slot_idx);
1793 } else {
1794 psns->opcode_start_psn = cpu_to_le32(op_spsn);
1795 psns->flags_next_psn = cpu_to_le32(flg_npsn);
1796 }
1797 }
1798
_calc_ilsize(struct bnxt_qplib_swqe * wqe)1799 static u16 _calc_ilsize(struct bnxt_qplib_swqe *wqe)
1800 {
1801 u16 size = 0;
1802 int indx;
1803
1804 for (indx = 0; indx < wqe->num_sge; indx++)
1805 size += wqe->sg_list[indx].size;
1806 return size;
1807 }
1808
bnxt_qplib_put_inline(struct bnxt_qplib_qp * qp,struct bnxt_qplib_swqe * wqe,u32 * sw_prod)1809 static int bnxt_qplib_put_inline(struct bnxt_qplib_qp *qp,
1810 struct bnxt_qplib_swqe *wqe,
1811 u32 *sw_prod)
1812 {
1813 struct bnxt_qplib_hwq *sq_hwq;
1814 int len, t_len, offt = 0;
1815 int t_cplen = 0, cplen;
1816 bool pull_dst = true;
1817 void *il_dst = NULL;
1818 void *il_src = NULL;
1819 int indx;
1820
1821 sq_hwq = &qp->sq.hwq;
1822 t_len = 0;
1823 for (indx = 0; indx < wqe->num_sge; indx++) {
1824 len = wqe->sg_list[indx].size;
1825 il_src = (void *)wqe->sg_list[indx].addr;
1826 t_len += len;
1827 if (t_len > qp->max_inline_data)
1828 goto bad;
1829 while (len) {
1830 if (pull_dst) {
1831 pull_dst = false;
1832 il_dst = bnxt_qplib_get_qe(sq_hwq, ((*sw_prod) %
1833 sq_hwq->depth), NULL);
1834 (*sw_prod)++;
1835 t_cplen = 0;
1836 offt = 0;
1837 }
1838 cplen = min_t(int, len, sizeof(struct sq_sge));
1839 cplen = min_t(int, cplen,
1840 (sizeof(struct sq_sge) - offt));
1841 memcpy(il_dst, il_src, cplen);
1842 t_cplen += cplen;
1843 il_src += cplen;
1844 il_dst += cplen;
1845 offt += cplen;
1846 len -= cplen;
1847 if (t_cplen == sizeof(struct sq_sge))
1848 pull_dst = true;
1849 }
1850 }
1851
1852 return t_len;
1853 bad:
1854 return -ENOMEM;
1855 }
1856
bnxt_qplib_put_sges(struct bnxt_qplib_hwq * sq_hwq,struct bnxt_qplib_sge * ssge,u32 nsge,u32 * sw_prod)1857 static int bnxt_qplib_put_sges(struct bnxt_qplib_hwq *sq_hwq,
1858 struct bnxt_qplib_sge *ssge,
1859 u32 nsge, u32 *sw_prod)
1860 {
1861 struct sq_sge *dsge;
1862 int indx, len = 0;
1863
1864 for (indx = 0; indx < nsge; indx++, (*sw_prod)++) {
1865 dsge = bnxt_qplib_get_qe(sq_hwq, ((*sw_prod) % sq_hwq->depth), NULL);
1866 dsge->va_or_pa = cpu_to_le64(ssge[indx].addr);
1867 dsge->l_key = cpu_to_le32(ssge[indx].lkey);
1868 dsge->size = cpu_to_le32(ssge[indx].size);
1869 len += ssge[indx].size;
1870 }
1871 return len;
1872 }
1873
_calculate_wqe_byte(struct bnxt_qplib_qp * qp,struct bnxt_qplib_swqe * wqe,u16 * wqe_byte)1874 static u16 _calculate_wqe_byte(struct bnxt_qplib_qp *qp,
1875 struct bnxt_qplib_swqe *wqe, u16 *wqe_byte)
1876 {
1877 u16 wqe_size;
1878 u32 ilsize;
1879 u16 nsge;
1880
1881 nsge = wqe->num_sge;
1882 if (wqe->flags & BNXT_QPLIB_SWQE_FLAGS_INLINE) {
1883 ilsize = _calc_ilsize(wqe);
1884 wqe_size = (ilsize > qp->max_inline_data) ?
1885 qp->max_inline_data : ilsize;
1886 wqe_size = ALIGN(wqe_size, sizeof(struct sq_sge));
1887 } else {
1888 wqe_size = nsge * sizeof(struct sq_sge);
1889 }
1890 /* Adding sq_send_hdr is a misnomer, for rq also hdr size is same. */
1891 wqe_size += sizeof(struct sq_send_hdr);
1892 if (wqe_byte)
1893 *wqe_byte = wqe_size;
1894 return wqe_size / sizeof(struct sq_sge);
1895 }
1896
_translate_q_full_delta(struct bnxt_qplib_q * que,u16 wqe_bytes)1897 static u16 _translate_q_full_delta(struct bnxt_qplib_q *que, u16 wqe_bytes)
1898 {
1899 /* For Cu/Wh delta = 128, stride = 16, wqe_bytes = 128
1900 * For Gen-p5 B/C mode delta = 0, stride = 16, wqe_bytes = 128.
1901 * For Gen-p5 delta = 0, stride = 16, 32 <= wqe_bytes <= 512.
1902 * when 8916 is disabled.
1903 */
1904 return (que->q_full_delta * wqe_bytes) / que->hwq.element_size;
1905 }
1906
bnxt_qplib_pull_psn_buff(struct bnxt_qplib_qp * qp,struct bnxt_qplib_q * sq,struct bnxt_qplib_swq * swq,bool is_host_msn_tbl)1907 static void bnxt_qplib_pull_psn_buff(struct bnxt_qplib_qp *qp, struct bnxt_qplib_q *sq,
1908 struct bnxt_qplib_swq *swq, bool is_host_msn_tbl)
1909 {
1910 struct bnxt_qplib_hwq *sq_hwq;
1911 u32 pg_num, pg_indx;
1912 void *buff;
1913 u32 tail;
1914
1915 sq_hwq = &sq->hwq;
1916 if (!sq_hwq->pad_pg)
1917 return;
1918
1919 tail = swq->slot_idx / sq->dbinfo.max_slot;
1920 if (is_host_msn_tbl) {
1921 /* For HW retx use qp msn index */
1922 tail = qp->msn;
1923 tail %= qp->msn_tbl_sz;
1924 }
1925 pg_num = (tail + sq_hwq->pad_pgofft) / (PAGE_SIZE / sq_hwq->pad_stride);
1926 pg_indx = (tail + sq_hwq->pad_pgofft) % (PAGE_SIZE / sq_hwq->pad_stride);
1927 buff = (void *)(sq_hwq->pad_pg[pg_num] + pg_indx * sq_hwq->pad_stride);
1928 /* the start ptr for buff is same ie after the SQ */
1929 swq->psn_search = buff;
1930 }
1931
bnxt_qplib_post_send_db(struct bnxt_qplib_qp * qp)1932 void bnxt_qplib_post_send_db(struct bnxt_qplib_qp *qp)
1933 {
1934 struct bnxt_qplib_q *sq = &qp->sq;
1935
1936 bnxt_qplib_ring_prod_db(&sq->dbinfo, DBC_DBC_TYPE_SQ);
1937 }
1938
bnxt_qplib_post_send(struct bnxt_qplib_qp * qp,struct bnxt_qplib_swqe * wqe)1939 int bnxt_qplib_post_send(struct bnxt_qplib_qp *qp,
1940 struct bnxt_qplib_swqe *wqe)
1941 {
1942 struct bnxt_qplib_nq_work *nq_work = NULL;
1943 int i, rc = 0, data_len = 0, pkt_num = 0;
1944 struct bnxt_qplib_q *sq = &qp->sq;
1945 struct bnxt_qplib_hwq *sq_hwq;
1946 struct bnxt_qplib_swq *swq;
1947 bool sch_handler = false;
1948 u16 slots_needed;
1949 bool msn_update;
1950 void *base_hdr;
1951 void *ext_hdr;
1952 __le32 temp32;
1953 u16 qfd_slots;
1954 u8 wqe_slots;
1955 u16 wqe_size;
1956 u32 sw_prod;
1957 u32 wqe_idx;
1958
1959 sq_hwq = &sq->hwq;
1960 if (qp->state != CMDQ_MODIFY_QP_NEW_STATE_RTS &&
1961 qp->state != CMDQ_MODIFY_QP_NEW_STATE_ERR) {
1962 dev_err(&sq_hwq->pdev->dev,
1963 "QPLIB: FP: QP (0x%x) is in the 0x%x state\n",
1964 qp->id, qp->state);
1965 rc = -EINVAL;
1966 goto done;
1967 }
1968
1969 wqe_slots = _calculate_wqe_byte(qp, wqe, &wqe_size);
1970 slots_needed = (qp->wqe_mode == BNXT_QPLIB_WQE_MODE_STATIC) ?
1971 sq->dbinfo.max_slot : wqe_slots;
1972 qfd_slots = _translate_q_full_delta(sq, wqe_size);
1973 if (bnxt_qplib_queue_full(sq_hwq, (slots_needed + qfd_slots))) {
1974 dev_err(&sq_hwq->pdev->dev,
1975 "QPLIB: FP: QP (0x%x) SQ is full!\n", qp->id);
1976 dev_err(&sq_hwq->pdev->dev,
1977 "QPLIB: prod = %#x cons = %#x qdepth = %#x delta = %#x slots = %#x\n",
1978 HWQ_CMP(sq_hwq->prod, sq_hwq),
1979 HWQ_CMP(sq_hwq->cons, sq_hwq),
1980 sq_hwq->max_elements, qfd_slots, slots_needed);
1981 dev_err(&sq_hwq->pdev->dev,
1982 "QPLIB: phantom_wqe_cnt: %d phantom_cqe_cnt: %d\n",
1983 sq->phantom_wqe_cnt, sq->phantom_cqe_cnt);
1984 rc = -ENOMEM;
1985 goto done;
1986 }
1987
1988 sw_prod = sq_hwq->prod;
1989 swq = bnxt_qplib_get_swqe(sq, &wqe_idx);
1990 swq->slot_idx = sw_prod;
1991 bnxt_qplib_pull_psn_buff(qp, sq, swq, qp->is_host_msn_tbl);
1992
1993 swq->wr_id = wqe->wr_id;
1994 swq->type = wqe->type;
1995 swq->flags = wqe->flags;
1996 swq->slots = slots_needed;
1997 swq->start_psn = sq->psn & BTH_PSN_MASK;
1998 if (qp->sig_type || wqe->flags & BNXT_QPLIB_SWQE_FLAGS_SIGNAL_COMP)
1999 swq->flags |= SQ_SEND_FLAGS_SIGNAL_COMP;
2000
2001 dev_dbg(&sq_hwq->pdev->dev,
2002 "QPLIB: FP: QP(0x%x) post SQ wr_id[%d] = 0x%llx\n",
2003 qp->id, wqe_idx, swq->wr_id);
2004 if (qp->cur_qp_state == CMDQ_MODIFY_QP_NEW_STATE_ERR) {
2005 sch_handler = true;
2006 dev_dbg(&sq_hwq->pdev->dev,
2007 "%s Error QP. Scheduling for poll_cq\n", __func__);
2008 goto queue_err;
2009 }
2010
2011 base_hdr = bnxt_qplib_get_qe(sq_hwq, sw_prod, NULL);
2012 sw_prod++;
2013 ext_hdr = bnxt_qplib_get_qe(sq_hwq, (sw_prod % sq_hwq->depth), NULL);
2014 sw_prod++;
2015 memset(base_hdr, 0, sizeof(struct sq_sge));
2016 memset(ext_hdr, 0, sizeof(struct sq_sge));
2017
2018 if (wqe->flags & BNXT_QPLIB_SWQE_FLAGS_INLINE)
2019 data_len = bnxt_qplib_put_inline(qp, wqe, &sw_prod);
2020 else
2021 data_len = bnxt_qplib_put_sges(sq_hwq, wqe->sg_list,
2022 wqe->num_sge, &sw_prod);
2023 if (data_len < 0)
2024 goto queue_err;
2025 /* Make sure we update MSN table only for wired wqes */
2026 msn_update = true;
2027
2028 /* Specifics */
2029 switch (wqe->type) {
2030 case BNXT_QPLIB_SWQE_TYPE_SEND:
2031 if (qp->type == CMDQ_CREATE_QP_TYPE_RAW_ETHERTYPE ||
2032 qp->type == CMDQ_CREATE_QP1_TYPE_GSI) {
2033 /* Assemble info for Raw Ethertype QPs */
2034 struct sq_send_raweth_qp1_hdr *sqe = base_hdr;
2035 struct sq_raw_ext_hdr *ext_sqe = ext_hdr;
2036
2037 sqe->wqe_type = wqe->type;
2038 sqe->flags = wqe->flags;
2039 sqe->wqe_size = wqe_slots;
2040 sqe->cfa_action = cpu_to_le16(wqe->rawqp1.cfa_action);
2041 sqe->lflags = cpu_to_le16(wqe->rawqp1.lflags);
2042 sqe->length = cpu_to_le32(data_len);
2043 ext_sqe->cfa_meta = cpu_to_le32((wqe->rawqp1.cfa_meta &
2044 SQ_SEND_RAWETH_QP1_CFA_META_VLAN_VID_MASK) <<
2045 SQ_SEND_RAWETH_QP1_CFA_META_VLAN_VID_SFT);
2046
2047 dev_dbg(&sq_hwq->pdev->dev,
2048 "QPLIB: FP: RAW/QP1 Send WQE:\n"
2049 "\twqe_type = 0x%x\n"
2050 "\tflags = 0x%x\n"
2051 "\twqe_size = 0x%x\n"
2052 "\tlflags = 0x%x\n"
2053 "\tcfa_action = 0x%x\n"
2054 "\tlength = 0x%x\n"
2055 "\tcfa_meta = 0x%x\n",
2056 sqe->wqe_type, sqe->flags, sqe->wqe_size,
2057 sqe->lflags, sqe->cfa_action,
2058 sqe->length, ext_sqe->cfa_meta);
2059 break;
2060 }
2061 fallthrough;
2062 case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_IMM:
2063 fallthrough;
2064 case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_INV:
2065 {
2066 struct sq_send_hdr *sqe = base_hdr;
2067 struct sq_ud_ext_hdr *ext_sqe = ext_hdr;
2068
2069 sqe->wqe_type = wqe->type;
2070 sqe->flags = wqe->flags;
2071 sqe->wqe_size = wqe_slots;
2072 sqe->inv_key_or_imm_data = cpu_to_le32(wqe->send.inv_key);
2073 if (qp->type == CMDQ_CREATE_QP_TYPE_UD ||
2074 qp->type == CMDQ_CREATE_QP_TYPE_GSI) {
2075 sqe->q_key = cpu_to_le32(wqe->send.q_key);
2076 sqe->length = cpu_to_le32(data_len);
2077 ext_sqe->dst_qp = cpu_to_le32(
2078 wqe->send.dst_qp & SQ_SEND_DST_QP_MASK);
2079 ext_sqe->avid = cpu_to_le32(wqe->send.avid &
2080 SQ_SEND_AVID_MASK);
2081 sq->psn = (sq->psn + 1) & BTH_PSN_MASK;
2082 msn_update = false;
2083 } else {
2084 sqe->length = cpu_to_le32(data_len);
2085 if (qp->mtu)
2086 pkt_num = (data_len + qp->mtu - 1) / qp->mtu;
2087 if (!pkt_num)
2088 pkt_num = 1;
2089 sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK;
2090 }
2091 dev_dbg(&sq_hwq->pdev->dev,
2092 "QPLIB: FP: Send WQE:\n"
2093 "\twqe_type = 0x%x\n"
2094 "\tflags = 0x%x\n"
2095 "\twqe_size = 0x%x\n"
2096 "\tinv_key/immdata = 0x%x\n"
2097 "\tq_key = 0x%x\n"
2098 "\tdst_qp = 0x%x\n"
2099 "\tlength = 0x%x\n"
2100 "\tavid = 0x%x\n",
2101 sqe->wqe_type, sqe->flags, sqe->wqe_size,
2102 sqe->inv_key_or_imm_data, sqe->q_key, ext_sqe->dst_qp,
2103 sqe->length, ext_sqe->avid);
2104 break;
2105 }
2106 case BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE:
2107 /* fall-thru */
2108 case BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE_WITH_IMM:
2109 /* fall-thru */
2110 case BNXT_QPLIB_SWQE_TYPE_RDMA_READ:
2111 {
2112 struct sq_rdma_hdr *sqe = base_hdr;
2113 struct sq_rdma_ext_hdr *ext_sqe = ext_hdr;
2114
2115 sqe->wqe_type = wqe->type;
2116 sqe->flags = wqe->flags;
2117 sqe->wqe_size = wqe_slots;
2118 sqe->imm_data = cpu_to_le32(wqe->rdma.inv_key);
2119 sqe->length = cpu_to_le32((u32)data_len);
2120 ext_sqe->remote_va = cpu_to_le64(wqe->rdma.remote_va);
2121 ext_sqe->remote_key = cpu_to_le32(wqe->rdma.r_key);
2122 if (qp->mtu)
2123 pkt_num = (data_len + qp->mtu - 1) / qp->mtu;
2124 if (!pkt_num)
2125 pkt_num = 1;
2126 sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK;
2127
2128 dev_dbg(&sq_hwq->pdev->dev,
2129 "QPLIB: FP: RDMA WQE:\n"
2130 "\twqe_type = 0x%x\n"
2131 "\tflags = 0x%x\n"
2132 "\twqe_size = 0x%x\n"
2133 "\timmdata = 0x%x\n"
2134 "\tlength = 0x%x\n"
2135 "\tremote_va = 0x%llx\n"
2136 "\tremote_key = 0x%x\n",
2137 sqe->wqe_type, sqe->flags, sqe->wqe_size,
2138 sqe->imm_data, sqe->length, ext_sqe->remote_va,
2139 ext_sqe->remote_key);
2140 break;
2141 }
2142 case BNXT_QPLIB_SWQE_TYPE_ATOMIC_CMP_AND_SWP:
2143 /* fall-thru */
2144 case BNXT_QPLIB_SWQE_TYPE_ATOMIC_FETCH_AND_ADD:
2145 {
2146 struct sq_atomic_hdr *sqe = base_hdr;
2147 struct sq_atomic_ext_hdr *ext_sqe = ext_hdr;
2148
2149 sqe->wqe_type = wqe->type;
2150 sqe->flags = wqe->flags;
2151 sqe->remote_key = cpu_to_le32(wqe->atomic.r_key);
2152 sqe->remote_va = cpu_to_le64(wqe->atomic.remote_va);
2153 ext_sqe->swap_data = cpu_to_le64(wqe->atomic.swap_data);
2154 ext_sqe->cmp_data = cpu_to_le64(wqe->atomic.cmp_data);
2155 if (qp->mtu)
2156 pkt_num = (data_len + qp->mtu - 1) / qp->mtu;
2157 if (!pkt_num)
2158 pkt_num = 1;
2159 sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK;
2160 break;
2161 }
2162 case BNXT_QPLIB_SWQE_TYPE_LOCAL_INV:
2163 {
2164 struct sq_localinvalidate_hdr *sqe = base_hdr;
2165
2166 sqe->wqe_type = wqe->type;
2167 sqe->flags = wqe->flags;
2168 sqe->inv_l_key = cpu_to_le32(wqe->local_inv.inv_l_key);
2169
2170 dev_dbg(&sq_hwq->pdev->dev,
2171 "QPLIB: FP: LOCAL INV WQE:\n"
2172 "\twqe_type = 0x%x\n"
2173 "\tflags = 0x%x\n"
2174 "\tinv_l_key = 0x%x\n",
2175 sqe->wqe_type, sqe->flags, sqe->inv_l_key);
2176 msn_update = false;
2177 break;
2178 }
2179 case BNXT_QPLIB_SWQE_TYPE_FAST_REG_MR:
2180 {
2181 struct sq_fr_pmr_hdr *sqe = base_hdr;
2182 struct sq_fr_pmr_ext_hdr *ext_sqe = ext_hdr;
2183
2184 sqe->wqe_type = wqe->type;
2185 sqe->flags = wqe->flags;
2186 sqe->access_cntl = wqe->frmr.access_cntl |
2187 SQ_FR_PMR_ACCESS_CNTL_LOCAL_WRITE;
2188 sqe->zero_based_page_size_log =
2189 (wqe->frmr.pg_sz_log & SQ_FR_PMR_PAGE_SIZE_LOG_MASK) <<
2190 SQ_FR_PMR_PAGE_SIZE_LOG_SFT |
2191 (wqe->frmr.zero_based == true ? SQ_FR_PMR_ZERO_BASED : 0);
2192 sqe->l_key = cpu_to_le32(wqe->frmr.l_key);
2193 /* TODO: OFED only provides length of MR up to 32-bits for FRMR */
2194 temp32 = cpu_to_le32(wqe->frmr.length);
2195 memcpy(sqe->length, &temp32, sizeof(wqe->frmr.length));
2196 sqe->numlevels_pbl_page_size_log =
2197 ((wqe->frmr.pbl_pg_sz_log <<
2198 SQ_FR_PMR_PBL_PAGE_SIZE_LOG_SFT) &
2199 SQ_FR_PMR_PBL_PAGE_SIZE_LOG_MASK) |
2200 ((wqe->frmr.levels << SQ_FR_PMR_NUMLEVELS_SFT) &
2201 SQ_FR_PMR_NUMLEVELS_MASK);
2202 if (!wqe->frmr.levels && !wqe->frmr.pbl_ptr) {
2203 ext_sqe->pblptr = cpu_to_le64(wqe->frmr.page_list[0]);
2204 } else {
2205 for (i = 0; i < wqe->frmr.page_list_len; i++)
2206 wqe->frmr.pbl_ptr[i] = cpu_to_le64(
2207 wqe->frmr.page_list[i] |
2208 PTU_PTE_VALID);
2209 ext_sqe->pblptr = cpu_to_le64(wqe->frmr.pbl_dma_ptr);
2210 }
2211 ext_sqe->va = cpu_to_le64(wqe->frmr.va);
2212 dev_dbg(&sq_hwq->pdev->dev,
2213 "QPLIB: FP: FRMR WQE:\n"
2214 "\twqe_type = 0x%x\n"
2215 "\tflags = 0x%x\n"
2216 "\taccess_cntl = 0x%x\n"
2217 "\tzero_based_page_size_log = 0x%x\n"
2218 "\tl_key = 0x%x\n"
2219 "\tlength = 0x%x\n"
2220 "\tnumlevels_pbl_page_size_log = 0x%x\n"
2221 "\tpblptr = 0x%llx\n"
2222 "\tva = 0x%llx\n",
2223 sqe->wqe_type, sqe->flags, sqe->access_cntl,
2224 sqe->zero_based_page_size_log, sqe->l_key,
2225 *(u32 *)sqe->length, sqe->numlevels_pbl_page_size_log,
2226 ext_sqe->pblptr, ext_sqe->va);
2227 msn_update = false;
2228 break;
2229 }
2230 case BNXT_QPLIB_SWQE_TYPE_BIND_MW:
2231 {
2232 struct sq_bind_hdr *sqe = base_hdr;
2233 struct sq_bind_ext_hdr *ext_sqe = ext_hdr;
2234
2235 sqe->wqe_type = wqe->type;
2236 sqe->flags = wqe->flags;
2237 sqe->access_cntl = wqe->bind.access_cntl;
2238 sqe->mw_type_zero_based = wqe->bind.mw_type |
2239 (wqe->bind.zero_based == true ? SQ_BIND_ZERO_BASED : 0);
2240 sqe->parent_l_key = cpu_to_le32(wqe->bind.parent_l_key);
2241 sqe->l_key = cpu_to_le32(wqe->bind.r_key);
2242 ext_sqe->va = cpu_to_le64(wqe->bind.va);
2243 ext_sqe->length_lo = cpu_to_le32(wqe->bind.length);
2244 dev_dbg(&sq_hwq->pdev->dev,
2245 "QPLIB: FP: BIND WQE:\n"
2246 "\twqe_type = 0x%x\n"
2247 "\tflags = 0x%x\n"
2248 "\taccess_cntl = 0x%x\n"
2249 "\tmw_type_zero_based = 0x%x\n"
2250 "\tparent_l_key = 0x%x\n"
2251 "\tl_key = 0x%x\n"
2252 "\tva = 0x%llx\n"
2253 "\tlength = 0x%x\n",
2254 sqe->wqe_type, sqe->flags, sqe->access_cntl,
2255 sqe->mw_type_zero_based, sqe->parent_l_key,
2256 sqe->l_key, sqe->va, ext_sqe->length_lo);
2257 msn_update = false;
2258 break;
2259 }
2260 default:
2261 /* Bad wqe, return error */
2262 rc = -EINVAL;
2263 goto done;
2264 }
2265 if (!qp->is_host_msn_tbl || msn_update) {
2266 swq->next_psn = sq->psn & BTH_PSN_MASK;
2267 bnxt_qplib_fill_psn_search(qp, wqe, swq);
2268 }
2269
2270 queue_err:
2271 bnxt_qplib_swq_mod_start(sq, wqe_idx);
2272 bnxt_qplib_hwq_incr_prod(&sq->dbinfo, sq_hwq, swq->slots);
2273 qp->wqe_cnt++;
2274 done:
2275 if (sch_handler) {
2276 nq_work = kzalloc(sizeof(*nq_work), GFP_ATOMIC);
2277 if (nq_work) {
2278 nq_work->cq = qp->scq;
2279 nq_work->nq = qp->scq->nq;
2280 INIT_WORK(&nq_work->work, bnxt_qpn_cqn_sched_task);
2281 queue_work(qp->scq->nq->cqn_wq, &nq_work->work);
2282 } else {
2283 dev_err(&sq->hwq.pdev->dev,
2284 "QPLIB: FP: Failed to allocate SQ nq_work!\n");
2285 rc = -ENOMEM;
2286 }
2287 }
2288 return rc;
2289 }
2290
bnxt_qplib_post_recv_db(struct bnxt_qplib_qp * qp)2291 void bnxt_qplib_post_recv_db(struct bnxt_qplib_qp *qp)
2292 {
2293 struct bnxt_qplib_q *rq = &qp->rq;
2294
2295 bnxt_qplib_ring_prod_db(&rq->dbinfo, DBC_DBC_TYPE_RQ);
2296 }
2297
bnxt_re_handle_cqn(struct bnxt_qplib_cq * cq)2298 void bnxt_re_handle_cqn(struct bnxt_qplib_cq *cq)
2299 {
2300 struct bnxt_qplib_nq *nq;
2301
2302 if (!(cq && cq->nq))
2303 return;
2304
2305 nq = cq->nq;
2306 spin_lock_bh(&cq->compl_lock);
2307 if (nq->cqn_handler) {
2308 dev_dbg(&nq->res->pdev->dev,
2309 "%s:Trigger cq = %p event nq = %p\n",
2310 __func__, cq, nq);
2311 nq->cqn_handler(nq, cq);
2312 }
2313 spin_unlock_bh(&cq->compl_lock);
2314 }
2315
bnxt_qplib_post_recv(struct bnxt_qplib_qp * qp,struct bnxt_qplib_swqe * wqe)2316 int bnxt_qplib_post_recv(struct bnxt_qplib_qp *qp,
2317 struct bnxt_qplib_swqe *wqe)
2318 {
2319 struct bnxt_qplib_nq_work *nq_work = NULL;
2320 struct bnxt_qplib_q *rq = &qp->rq;
2321 struct bnxt_qplib_hwq *rq_hwq;
2322 struct bnxt_qplib_swq *swq;
2323 bool sch_handler = false;
2324 struct rq_wqe_hdr *base_hdr;
2325 struct rq_ext_hdr *ext_hdr;
2326 struct sq_sge *dsge;
2327 u8 wqe_slots;
2328 u32 wqe_idx;
2329 u32 sw_prod;
2330 int rc = 0;
2331
2332 rq_hwq = &rq->hwq;
2333 if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_RESET) {
2334 dev_err(&rq_hwq->pdev->dev,
2335 "QPLIB: FP: QP (0x%x) is in the 0x%x state\n",
2336 qp->id, qp->state);
2337 rc = -EINVAL;
2338 goto done;
2339 }
2340
2341 wqe_slots = _calculate_wqe_byte(qp, wqe, NULL);
2342 if (bnxt_qplib_queue_full(rq_hwq, rq->dbinfo.max_slot)) {
2343 dev_err(&rq_hwq->pdev->dev,
2344 "QPLIB: FP: QP (0x%x) RQ is full!\n", qp->id);
2345 rc = -EINVAL;
2346 goto done;
2347 }
2348
2349 swq = bnxt_qplib_get_swqe(rq, &wqe_idx);
2350 swq->wr_id = wqe->wr_id;
2351 swq->slots = rq->dbinfo.max_slot;
2352 dev_dbg(&rq_hwq->pdev->dev,
2353 "QPLIB: FP: post RQ wr_id[%d] = 0x%llx\n",
2354 wqe_idx, swq->wr_id);
2355 if (qp->cur_qp_state == CMDQ_MODIFY_QP_NEW_STATE_ERR) {
2356 sch_handler = true;
2357 dev_dbg(&rq_hwq->pdev->dev, "%s Error QP. Sched a flushed cmpl\n",
2358 __func__);
2359 goto queue_err;
2360 }
2361
2362 sw_prod = rq_hwq->prod;
2363 base_hdr = bnxt_qplib_get_qe(rq_hwq, sw_prod, NULL);
2364 sw_prod++;
2365 ext_hdr = bnxt_qplib_get_qe(rq_hwq, (sw_prod % rq_hwq->depth), NULL);
2366 sw_prod++;
2367 memset(base_hdr, 0, sizeof(struct sq_sge));
2368 memset(ext_hdr, 0, sizeof(struct sq_sge));
2369
2370 if (!wqe->num_sge) {
2371 dsge = bnxt_qplib_get_qe(rq_hwq, (sw_prod % rq_hwq->depth), NULL);
2372 dsge->size = 0;
2373 wqe_slots++;
2374 } else {
2375 bnxt_qplib_put_sges(rq_hwq, wqe->sg_list, wqe->num_sge, &sw_prod);
2376 }
2377 base_hdr->wqe_type = wqe->type;
2378 base_hdr->flags = wqe->flags;
2379 base_hdr->wqe_size = wqe_slots;
2380 base_hdr->wr_id |= cpu_to_le32(wqe_idx);
2381 queue_err:
2382 bnxt_qplib_swq_mod_start(rq, wqe_idx);
2383 bnxt_qplib_hwq_incr_prod(&rq->dbinfo, &rq->hwq, swq->slots);
2384 done:
2385 if (sch_handler) {
2386 nq_work = kzalloc(sizeof(*nq_work), GFP_ATOMIC);
2387 if (nq_work) {
2388 nq_work->cq = qp->rcq;
2389 nq_work->nq = qp->rcq->nq;
2390 INIT_WORK(&nq_work->work, bnxt_qpn_cqn_sched_task);
2391 queue_work(qp->rcq->nq->cqn_wq, &nq_work->work);
2392 } else {
2393 dev_err(&rq->hwq.pdev->dev,
2394 "QPLIB: FP: Failed to allocate RQ nq_work!\n");
2395 rc = -ENOMEM;
2396 }
2397 }
2398 return rc;
2399 }
2400
2401 /* CQ */
bnxt_qplib_create_cq(struct bnxt_qplib_res * res,struct bnxt_qplib_cq * cq)2402 int bnxt_qplib_create_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq)
2403 {
2404 struct bnxt_qplib_hwq_attr hwq_attr = {};
2405 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
2406 struct creq_create_cq_resp resp = {};
2407 struct bnxt_qplib_cmdqmsg msg = {};
2408 struct cmdq_create_cq req = {};
2409 struct bnxt_qplib_reftbl *tbl;
2410 unsigned long flag;
2411 u32 pg_sz_lvl = 0;
2412 int rc;
2413
2414 hwq_attr.res = res;
2415 hwq_attr.depth = cq->max_wqe;
2416 hwq_attr.stride = sizeof(struct cq_base);
2417 hwq_attr.type = HWQ_TYPE_QUEUE;
2418 hwq_attr.sginfo = &cq->sginfo;
2419 rc = bnxt_qplib_alloc_init_hwq(&cq->hwq, &hwq_attr);
2420 if (rc)
2421 goto exit;
2422
2423 bnxt_qplib_rcfw_cmd_prep(&req, CMDQ_BASE_OPCODE_CREATE_CQ,
2424 sizeof(req));
2425
2426 if (!cq->dpi) {
2427 dev_err(&rcfw->pdev->dev,
2428 "QPLIB: FP: CREATE_CQ failed due to NULL DPI\n");
2429 return -EINVAL;
2430 }
2431 req.dpi = cpu_to_le32(cq->dpi->dpi);
2432 req.cq_handle = cpu_to_le64(cq->cq_handle);
2433
2434 req.cq_size = cpu_to_le32(cq->max_wqe);
2435 req.pbl = cpu_to_le64(_get_base_addr(&cq->hwq));
2436 pg_sz_lvl = _get_base_pg_size(&cq->hwq) << CMDQ_CREATE_CQ_PG_SIZE_SFT;
2437 pg_sz_lvl |= ((cq->hwq.level & CMDQ_CREATE_CQ_LVL_MASK) <<
2438 CMDQ_CREATE_CQ_LVL_SFT);
2439 req.pg_size_lvl = cpu_to_le32(pg_sz_lvl);
2440
2441 req.cq_fco_cnq_id = cpu_to_le32(
2442 (cq->cnq_hw_ring_id & CMDQ_CREATE_CQ_CNQ_ID_MASK) <<
2443 CMDQ_CREATE_CQ_CNQ_ID_SFT);
2444 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),
2445 sizeof(resp), 0);
2446 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
2447 if (rc)
2448 goto fail;
2449 cq->id = le32_to_cpu(resp.xid);
2450 cq->period = BNXT_QPLIB_QUEUE_START_PERIOD;
2451 init_waitqueue_head(&cq->waitq);
2452 INIT_LIST_HEAD(&cq->sqf_head);
2453 INIT_LIST_HEAD(&cq->rqf_head);
2454 spin_lock_init(&cq->flush_lock);
2455 spin_lock_init(&cq->compl_lock);
2456
2457 /* init dbinfo */
2458 cq->cctx = res->cctx;
2459 cq->dbinfo.hwq = &cq->hwq;
2460 cq->dbinfo.xid = cq->id;
2461 cq->dbinfo.db = cq->dpi->dbr;
2462 cq->dbinfo.priv_db = res->dpi_tbl.priv_db;
2463 cq->dbinfo.flags = 0;
2464 cq->dbinfo.toggle = 0;
2465 cq->dbinfo.res = res;
2466 cq->dbinfo.seed = cq->id;
2467 spin_lock_init(&cq->dbinfo.lock);
2468 cq->dbinfo.shadow_key = BNXT_QPLIB_DBR_KEY_INVALID;
2469 cq->dbinfo.shadow_key_arm_ena = BNXT_QPLIB_DBR_KEY_INVALID;
2470
2471 tbl = &res->reftbl.cqref;
2472 spin_lock_irqsave(&tbl->lock, flag);
2473 tbl->rec[GET_TBL_INDEX(cq->id, tbl)].xid = cq->id;
2474 tbl->rec[GET_TBL_INDEX(cq->id, tbl)].handle = cq;
2475 spin_unlock_irqrestore(&tbl->lock, flag);
2476
2477 bnxt_qplib_armen_db(&cq->dbinfo, DBC_DBC_TYPE_CQ_ARMENA);
2478 return 0;
2479
2480 fail:
2481 bnxt_qplib_free_hwq(res, &cq->hwq);
2482 exit:
2483 return rc;
2484 }
2485
bnxt_qplib_modify_cq(struct bnxt_qplib_res * res,struct bnxt_qplib_cq * cq)2486 int bnxt_qplib_modify_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq)
2487 {
2488 /* TODO: Modify CQ threshold are passed to the HW via DBR */
2489 return 0;
2490 }
2491
bnxt_qplib_resize_cq_complete(struct bnxt_qplib_res * res,struct bnxt_qplib_cq * cq)2492 void bnxt_qplib_resize_cq_complete(struct bnxt_qplib_res *res,
2493 struct bnxt_qplib_cq *cq)
2494 {
2495 bnxt_qplib_free_hwq(res, &cq->hwq);
2496 memcpy(&cq->hwq, &cq->resize_hwq, sizeof(cq->hwq));
2497 /* Reset only the cons bit in the flags */
2498 cq->dbinfo.flags &= ~(1UL << BNXT_QPLIB_FLAG_EPOCH_CONS_SHIFT);
2499
2500 /* Tell HW to switch over to the new CQ */
2501 if (!cq->resize_hwq.is_user)
2502 bnxt_qplib_cq_coffack_db(&cq->dbinfo);
2503 }
2504
bnxt_qplib_resize_cq(struct bnxt_qplib_res * res,struct bnxt_qplib_cq * cq,int new_cqes)2505 int bnxt_qplib_resize_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq,
2506 int new_cqes)
2507 {
2508 struct bnxt_qplib_hwq_attr hwq_attr = {};
2509 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
2510 struct creq_resize_cq_resp resp = {};
2511 struct bnxt_qplib_cmdqmsg msg = {};
2512 struct cmdq_resize_cq req = {};
2513 u32 pgsz = 0, lvl = 0, nsz = 0;
2514 struct bnxt_qplib_pbl *pbl;
2515 u16 count = -1;
2516 int rc;
2517
2518 bnxt_qplib_rcfw_cmd_prep(&req, CMDQ_BASE_OPCODE_RESIZE_CQ,
2519 sizeof(req));
2520
2521 hwq_attr.sginfo = &cq->sginfo;
2522 hwq_attr.res = res;
2523 hwq_attr.depth = new_cqes;
2524 hwq_attr.stride = sizeof(struct cq_base);
2525 hwq_attr.type = HWQ_TYPE_QUEUE;
2526 rc = bnxt_qplib_alloc_init_hwq(&cq->resize_hwq, &hwq_attr);
2527 if (rc)
2528 return rc;
2529
2530 dev_dbg(&rcfw->pdev->dev, "QPLIB: FP: %s: pbl_lvl: %d\n", __func__,
2531 cq->resize_hwq.level);
2532 req.cq_cid = cpu_to_le32(cq->id);
2533 pbl = &cq->resize_hwq.pbl[PBL_LVL_0];
2534 pgsz = ((pbl->pg_size == ROCE_PG_SIZE_4K ? CMDQ_RESIZE_CQ_PG_SIZE_PG_4K :
2535 pbl->pg_size == ROCE_PG_SIZE_8K ? CMDQ_RESIZE_CQ_PG_SIZE_PG_8K :
2536 pbl->pg_size == ROCE_PG_SIZE_64K ? CMDQ_RESIZE_CQ_PG_SIZE_PG_64K :
2537 pbl->pg_size == ROCE_PG_SIZE_2M ? CMDQ_RESIZE_CQ_PG_SIZE_PG_2M :
2538 pbl->pg_size == ROCE_PG_SIZE_8M ? CMDQ_RESIZE_CQ_PG_SIZE_PG_8M :
2539 pbl->pg_size == ROCE_PG_SIZE_1G ? CMDQ_RESIZE_CQ_PG_SIZE_PG_1G :
2540 CMDQ_RESIZE_CQ_PG_SIZE_PG_4K) & CMDQ_RESIZE_CQ_PG_SIZE_MASK);
2541 lvl = (cq->resize_hwq.level << CMDQ_RESIZE_CQ_LVL_SFT) &
2542 CMDQ_RESIZE_CQ_LVL_MASK;
2543 nsz = (new_cqes << CMDQ_RESIZE_CQ_NEW_CQ_SIZE_SFT) &
2544 CMDQ_RESIZE_CQ_NEW_CQ_SIZE_MASK;
2545 req.new_cq_size_pg_size_lvl = cpu_to_le32(nsz|pgsz|lvl);
2546 req.new_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
2547
2548 if (!cq->resize_hwq.is_user)
2549 set_bit(CQ_FLAGS_RESIZE_IN_PROG, &cq->flags);
2550
2551 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),
2552 sizeof(resp), 0);
2553 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
2554 if (rc)
2555 goto fail;
2556
2557 if (!cq->resize_hwq.is_user) {
2558 wait:
2559 /* Wait here for the HW to switch the CQ over */
2560 if (wait_event_interruptible_timeout(cq->waitq,
2561 !test_bit(CQ_FLAGS_RESIZE_IN_PROG, &cq->flags),
2562 msecs_to_jiffies(CQ_RESIZE_WAIT_TIME_MS)) ==
2563 -ERESTARTSYS && count--)
2564 goto wait;
2565
2566 if (test_bit(CQ_FLAGS_RESIZE_IN_PROG, &cq->flags)) {
2567 dev_err(&rcfw->pdev->dev,
2568 "QPLIB: FP: RESIZE_CQ timed out\n");
2569 rc = -ETIMEDOUT;
2570 goto fail;
2571 }
2572
2573 bnxt_qplib_resize_cq_complete(res, cq);
2574 }
2575
2576 return 0;
2577 fail:
2578 if (!cq->resize_hwq.is_user) {
2579 bnxt_qplib_free_hwq(res, &cq->resize_hwq);
2580 clear_bit(CQ_FLAGS_RESIZE_IN_PROG, &cq->flags);
2581 }
2582 return rc;
2583 }
2584
bnxt_qplib_free_cq(struct bnxt_qplib_res * res,struct bnxt_qplib_cq * cq)2585 void bnxt_qplib_free_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq)
2586 {
2587 bnxt_qplib_free_hwq(res, &cq->hwq);
2588 }
2589
bnxt_qplib_sync_cq(struct bnxt_qplib_cq * cq)2590 static void bnxt_qplib_sync_cq(struct bnxt_qplib_cq *cq)
2591 {
2592 struct bnxt_qplib_nq *nq = cq->nq;
2593 /* Flush any pending work and synchronize irq */
2594 flush_workqueue(cq->nq->cqn_wq);
2595 mutex_lock(&nq->lock);
2596 if (nq->requested)
2597 synchronize_irq(nq->msix_vec);
2598 mutex_unlock(&nq->lock);
2599 }
2600
bnxt_qplib_destroy_cq(struct bnxt_qplib_res * res,struct bnxt_qplib_cq * cq)2601 int bnxt_qplib_destroy_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq)
2602 {
2603 struct bnxt_qplib_rcfw *rcfw = res->rcfw;
2604 struct creq_destroy_cq_resp resp = {};
2605 struct bnxt_qplib_cmdqmsg msg = {};
2606 struct cmdq_destroy_cq req = {};
2607 struct bnxt_qplib_reftbl *tbl;
2608 u16 total_cnq_events;
2609 unsigned long flag;
2610 int rc;
2611
2612 tbl = &res->reftbl.cqref;
2613 spin_lock_irqsave(&tbl->lock, flag);
2614 tbl->rec[GET_TBL_INDEX(cq->id, tbl)].handle = NULL;
2615 tbl->rec[GET_TBL_INDEX(cq->id, tbl)].xid = 0;
2616 spin_unlock_irqrestore(&tbl->lock, flag);
2617
2618 bnxt_qplib_rcfw_cmd_prep(&req, CMDQ_BASE_OPCODE_DESTROY_CQ,
2619 sizeof(req));
2620
2621 req.cq_cid = cpu_to_le32(cq->id);
2622 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),
2623 sizeof(resp), 0);
2624 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
2625 if (rc)
2626 return rc;
2627
2628 total_cnq_events = le16_to_cpu(resp.total_cnq_events);
2629 if (total_cnq_events >= 0)
2630 dev_dbg(&rcfw->pdev->dev,
2631 "%s: cq_id = 0x%x cq = 0x%p resp.total_cnq_events = 0x%x\n",
2632 __func__, cq->id, cq, total_cnq_events);
2633 __wait_for_all_nqes(cq, total_cnq_events);
2634 bnxt_qplib_sync_cq(cq);
2635 bnxt_qplib_free_hwq(res, &cq->hwq);
2636 return 0;
2637 }
2638
__flush_sq(struct bnxt_qplib_q * sq,struct bnxt_qplib_qp * qp,struct bnxt_qplib_cqe ** pcqe,int * budget)2639 static int __flush_sq(struct bnxt_qplib_q *sq, struct bnxt_qplib_qp *qp,
2640 struct bnxt_qplib_cqe **pcqe, int *budget)
2641 {
2642 struct bnxt_qplib_cqe *cqe;
2643 u32 start, last;
2644 int rc = 0;
2645
2646 /* Now complete all outstanding SQEs with FLUSHED_ERR */
2647 start = sq->swq_start;
2648 cqe = *pcqe;
2649 while (*budget) {
2650 last = sq->swq_last;
2651 if (start == last) {
2652 break;
2653 }
2654 /* Skip the FENCE WQE completions */
2655 if (sq->swq[last].wr_id == BNXT_QPLIB_FENCE_WRID) {
2656 bnxt_re_legacy_cancel_phantom_processing(qp);
2657 goto skip_compl;
2658 }
2659
2660 memset(cqe, 0, sizeof(*cqe));
2661 cqe->status = CQ_REQ_STATUS_WORK_REQUEST_FLUSHED_ERR;
2662 cqe->opcode = CQ_BASE_CQE_TYPE_REQ;
2663 cqe->qp_handle = (u64)qp;
2664 cqe->wr_id = sq->swq[last].wr_id;
2665 cqe->src_qp = qp->id;
2666 cqe->type = sq->swq[last].type;
2667 dev_dbg(&sq->hwq.pdev->dev,
2668 "QPLIB: FP: CQ Processed terminal Req \n");
2669 dev_dbg(&sq->hwq.pdev->dev,
2670 "QPLIB: wr_id[%d] = 0x%llx with status 0x%x\n",
2671 last, cqe->wr_id, cqe->status);
2672 cqe++;
2673 (*budget)--;
2674 skip_compl:
2675 bnxt_qplib_hwq_incr_cons(sq->hwq.depth,
2676 &sq->hwq.cons,
2677 sq->swq[last].slots,
2678 &sq->dbinfo.flags);
2679 sq->swq_last = sq->swq[last].next_idx;
2680 }
2681 *pcqe = cqe;
2682 if (!*budget && sq->swq_last != start)
2683 /* Out of budget */
2684 rc = -EAGAIN;
2685 dev_dbg(&sq->hwq.pdev->dev, "QPLIB: FP: Flush SQ rc = 0x%x\n", rc);
2686
2687 return rc;
2688 }
2689
__flush_rq(struct bnxt_qplib_q * rq,struct bnxt_qplib_qp * qp,struct bnxt_qplib_cqe ** pcqe,int * budget)2690 static int __flush_rq(struct bnxt_qplib_q *rq, struct bnxt_qplib_qp *qp,
2691 struct bnxt_qplib_cqe **pcqe, int *budget)
2692 {
2693 struct bnxt_qplib_cqe *cqe;
2694 u32 start, last;
2695 int opcode = 0;
2696 int rc = 0;
2697
2698 switch (qp->type) {
2699 case CMDQ_CREATE_QP1_TYPE_GSI:
2700 opcode = CQ_BASE_CQE_TYPE_RES_RAWETH_QP1;
2701 break;
2702 case CMDQ_CREATE_QP_TYPE_RC:
2703 opcode = CQ_BASE_CQE_TYPE_RES_RC;
2704 break;
2705 case CMDQ_CREATE_QP_TYPE_UD:
2706 opcode = CQ_BASE_CQE_TYPE_RES_UD;
2707 break;
2708 }
2709
2710 /* Flush the rest of the RQ */
2711 start = rq->swq_start;
2712 cqe = *pcqe;
2713 while (*budget) {
2714 last = rq->swq_last;
2715 if (last == start)
2716 break;
2717 memset(cqe, 0, sizeof(*cqe));
2718 cqe->status =
2719 CQ_RES_RC_STATUS_WORK_REQUEST_FLUSHED_ERR;
2720 cqe->opcode = opcode;
2721 cqe->qp_handle = (u64)qp;
2722 cqe->wr_id = rq->swq[last].wr_id;
2723 dev_dbg(&rq->hwq.pdev->dev, "QPLIB: FP: CQ Processed Res RC \n");
2724 dev_dbg(&rq->hwq.pdev->dev,
2725 "QPLIB: rq[%d] = 0x%llx with status 0x%x\n",
2726 last, cqe->wr_id, cqe->status);
2727 cqe++;
2728 (*budget)--;
2729 bnxt_qplib_hwq_incr_cons(rq->hwq.depth,
2730 &rq->hwq.cons,
2731 rq->swq[last].slots,
2732 &rq->dbinfo.flags);
2733 rq->swq_last = rq->swq[last].next_idx;
2734 }
2735 *pcqe = cqe;
2736 if (!*budget && rq->swq_last != start)
2737 /* Out of budget */
2738 rc = -EAGAIN;
2739
2740 dev_dbg(&rq->hwq.pdev->dev, "QPLIB: FP: Flush RQ rc = 0x%x\n", rc);
2741 return rc;
2742 }
2743
bnxt_qplib_mark_qp_error(void * qp_handle)2744 void bnxt_qplib_mark_qp_error(void *qp_handle)
2745 {
2746 struct bnxt_qplib_qp *qp = qp_handle;
2747
2748 if (!qp)
2749 return;
2750
2751 /* Must block new posting of SQ and RQ */
2752 qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
2753 qp->state = qp->cur_qp_state;
2754
2755 /* Add qp to flush list of the CQ */
2756 if (!qp->is_user)
2757 bnxt_qplib_add_flush_qp(qp);
2758 }
2759
2760 /* Note: SQE is valid from sw_sq_cons up to cqe_sq_cons (exclusive)
2761 * CQE is track from sw_cq_cons to max_element but valid only if VALID=1
2762 */
bnxt_re_legacy_do_wa9060(struct bnxt_qplib_qp * qp,struct bnxt_qplib_cq * cq,u32 cq_cons,u32 swq_last,u32 cqe_sq_cons)2763 static int bnxt_re_legacy_do_wa9060(struct bnxt_qplib_qp *qp,
2764 struct bnxt_qplib_cq *cq,
2765 u32 cq_cons, u32 swq_last,
2766 u32 cqe_sq_cons)
2767 {
2768 struct bnxt_qplib_q *sq = &qp->sq;
2769 struct bnxt_qplib_swq *swq;
2770 u32 peek_sw_cq_cons, peek_sq_cons_idx, peek_flags;
2771 struct cq_terminal *peek_term_hwcqe;
2772 struct cq_req *peek_req_hwcqe;
2773 struct bnxt_qplib_qp *peek_qp;
2774 struct bnxt_qplib_q *peek_sq;
2775 struct cq_base *peek_hwcqe;
2776 int i, rc = 0;
2777
2778 /* Check for the psn_search marking before completing */
2779 swq = &sq->swq[swq_last];
2780 if (swq->psn_search &&
2781 le32_to_cpu(swq->psn_search->flags_next_psn) & 0x80000000) {
2782 /* Unmark */
2783 swq->psn_search->flags_next_psn = cpu_to_le32
2784 (le32_to_cpu(swq->psn_search->flags_next_psn)
2785 & ~0x80000000);
2786 dev_dbg(&cq->hwq.pdev->dev,
2787 "FP: Process Req cq_cons=0x%x qp=0x%x sq cons sw=0x%x cqe=0x%x marked!\n",
2788 cq_cons, qp->id, swq_last, cqe_sq_cons);
2789 sq->condition = true;
2790 sq->legacy_send_phantom = true;
2791
2792 /* TODO: Only ARM if the previous SQE is ARMALL */
2793 bnxt_qplib_ring_db(&cq->dbinfo, DBC_DBC_TYPE_CQ_ARMALL);
2794
2795 rc = -EAGAIN;
2796 goto out;
2797 }
2798 if (sq->condition == true) {
2799 /* Peek at the completions */
2800 peek_flags = cq->dbinfo.flags;
2801 peek_sw_cq_cons = cq_cons;
2802 i = cq->hwq.depth;
2803 while (i--) {
2804 peek_hwcqe = bnxt_qplib_get_qe(&cq->hwq,
2805 peek_sw_cq_cons, NULL);
2806 /* If the next hwcqe is VALID */
2807 if (CQE_CMP_VALID(peek_hwcqe, peek_flags)) {
2808 /* If the next hwcqe is a REQ */
2809 dma_rmb();
2810 switch (peek_hwcqe->cqe_type_toggle &
2811 CQ_BASE_CQE_TYPE_MASK) {
2812 case CQ_BASE_CQE_TYPE_REQ:
2813 peek_req_hwcqe = (struct cq_req *)
2814 peek_hwcqe;
2815 peek_qp = (struct bnxt_qplib_qp *)
2816 le64_to_cpu(
2817 peek_req_hwcqe->qp_handle);
2818 peek_sq = &peek_qp->sq;
2819 peek_sq_cons_idx =
2820 ((le16_to_cpu(
2821 peek_req_hwcqe->sq_cons_idx)
2822 - 1) % sq->max_wqe);
2823 /* If the hwcqe's sq's wr_id matches */
2824 if (peek_sq == sq &&
2825 sq->swq[peek_sq_cons_idx].wr_id ==
2826 BNXT_QPLIB_FENCE_WRID) {
2827 /* Unbreak only if the phantom
2828 comes back */
2829 dev_dbg(&cq->hwq.pdev->dev,
2830 "FP: Process Req qp=0x%x current sq cons sw=0x%x cqe=0x%x\n",
2831 qp->id, swq_last,
2832 cqe_sq_cons);
2833 sq->condition = false;
2834 sq->single = true;
2835 sq->phantom_cqe_cnt++;
2836 dev_dbg(&cq->hwq.pdev->dev,
2837 "qp %#x condition restored at peek cq_cons=%#x sq_cons_idx %#x, phantom_cqe_cnt: %d unmark\n",
2838 peek_qp->id,
2839 peek_sw_cq_cons,
2840 peek_sq_cons_idx,
2841 sq->phantom_cqe_cnt);
2842 rc = 0;
2843 goto out;
2844 }
2845 break;
2846
2847 case CQ_BASE_CQE_TYPE_TERMINAL:
2848 /* In case the QP has gone into the
2849 error state */
2850 peek_term_hwcqe = (struct cq_terminal *)
2851 peek_hwcqe;
2852 peek_qp = (struct bnxt_qplib_qp *)
2853 le64_to_cpu(
2854 peek_term_hwcqe->qp_handle);
2855 if (peek_qp == qp) {
2856 sq->condition = false;
2857 rc = 0;
2858 goto out;
2859 }
2860 break;
2861 default:
2862 break;
2863 }
2864 /* Valid but not the phantom, so keep looping */
2865 } else {
2866 /* Not valid yet, just exit and wait */
2867 rc = -EINVAL;
2868 goto out;
2869 }
2870 bnxt_qplib_hwq_incr_cons(cq->hwq.depth,
2871 &peek_sw_cq_cons,
2872 1, &peek_flags);
2873 }
2874 dev_err(&cq->hwq.pdev->dev,
2875 "Should not have come here! cq_cons=0x%x qp=0x%x sq cons sw=0x%x hw=0x%x\n",
2876 cq_cons, qp->id, swq_last, cqe_sq_cons);
2877 rc = -EINVAL;
2878 }
2879 out:
2880 return rc;
2881 }
2882
bnxt_qplib_get_cqe_sq_cons(struct bnxt_qplib_q * sq,u32 cqe_slot)2883 static int bnxt_qplib_get_cqe_sq_cons(struct bnxt_qplib_q *sq, u32 cqe_slot)
2884 {
2885 struct bnxt_qplib_hwq *sq_hwq;
2886 struct bnxt_qplib_swq *swq;
2887 int cqe_sq_cons = -1;
2888 u32 start, last;
2889
2890 sq_hwq = &sq->hwq;
2891
2892 start = sq->swq_start;
2893 last = sq->swq_last;
2894
2895 while (last != start) {
2896 swq = &sq->swq[last];
2897 if (swq->slot_idx == cqe_slot) {
2898 cqe_sq_cons = swq->next_idx;
2899 dev_err(&sq_hwq->pdev->dev, "%s: Found cons wqe = %d slot = %d\n",
2900 __func__, cqe_sq_cons, cqe_slot);
2901 break;
2902 }
2903
2904 last = swq->next_idx;
2905 }
2906 return cqe_sq_cons;
2907 }
2908
bnxt_qplib_cq_process_req(struct bnxt_qplib_cq * cq,struct cq_req * hwcqe,struct bnxt_qplib_cqe ** pcqe,int * budget,u32 cq_cons,struct bnxt_qplib_qp ** lib_qp)2909 static int bnxt_qplib_cq_process_req(struct bnxt_qplib_cq *cq,
2910 struct cq_req *hwcqe,
2911 struct bnxt_qplib_cqe **pcqe, int *budget,
2912 u32 cq_cons, struct bnxt_qplib_qp **lib_qp)
2913 {
2914 struct bnxt_qplib_qp *qp;
2915 struct bnxt_qplib_q *sq;
2916 struct bnxt_qplib_cqe *cqe;
2917 u32 cqe_sq_cons, slot_num;
2918 struct bnxt_qplib_swq *swq;
2919 int cqe_cons;
2920 int rc = 0;
2921
2922 qp = (struct bnxt_qplib_qp *)le64_to_cpu(hwcqe->qp_handle);
2923 dev_dbg(&cq->hwq.pdev->dev, "FP: Process Req qp=0x%p\n", qp);
2924 if (!qp) {
2925 dev_err(&cq->hwq.pdev->dev,
2926 "QPLIB: FP: Process Req qp is NULL\n");
2927 return -EINVAL;
2928 }
2929 sq = &qp->sq;
2930
2931 cqe_sq_cons = le16_to_cpu(hwcqe->sq_cons_idx) % sq->max_sw_wqe;
2932 if (qp->sq.flushed) {
2933 dev_dbg(&cq->hwq.pdev->dev,
2934 "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp);
2935 goto done;
2936 }
2937
2938 if (__is_err_cqe_for_var_wqe(qp, hwcqe->status)) {
2939 slot_num = le16_to_cpu(hwcqe->sq_cons_idx);
2940 cqe_cons = bnxt_qplib_get_cqe_sq_cons(sq, slot_num);
2941 if (cqe_cons < 0) {
2942 dev_dbg(&cq->hwq.pdev->dev, "%s: Wrong SQ cons cqe_slot_indx = %d\n",
2943 __func__, slot_num);
2944 goto done;
2945 }
2946 cqe_sq_cons = cqe_cons;
2947 dev_dbg(&cq->hwq.pdev->dev, "%s: cqe_sq_cons = %d swq_last = %d swq_start = %d\n",
2948 __func__, cqe_sq_cons, sq->swq_last, sq->swq_start);
2949 }
2950
2951 /* Require to walk the sq's swq to fabricate CQEs for all previously
2952 * signaled SWQEs due to CQE aggregation from the current sq cons
2953 * to the cqe_sq_cons
2954 */
2955 cqe = *pcqe;
2956 while (*budget) {
2957 if (sq->swq_last == cqe_sq_cons)
2958 /* Done */
2959 break;
2960
2961 swq = &sq->swq[sq->swq_last];
2962 memset(cqe, 0, sizeof(*cqe));
2963 cqe->opcode = CQ_BASE_CQE_TYPE_REQ;
2964 cqe->qp_handle = (u64)qp;
2965 cqe->src_qp = qp->id;
2966 cqe->wr_id = swq->wr_id;
2967
2968 if (cqe->wr_id == BNXT_QPLIB_FENCE_WRID)
2969 goto skip;
2970
2971 cqe->type = swq->type;
2972
2973 /* For the last CQE, check for status. For errors, regardless
2974 * of the request being signaled or not, it must complete with
2975 * the hwcqe error status
2976 */
2977 if (swq->next_idx == cqe_sq_cons &&
2978 hwcqe->status != CQ_REQ_STATUS_OK) {
2979 cqe->status = hwcqe->status;
2980 dev_err(&cq->hwq.pdev->dev,
2981 "QPLIB: FP: CQ Processed Req \n");
2982 dev_err(&cq->hwq.pdev->dev,
2983 "QPLIB: QP 0x%x wr_id[%d] = 0x%lx vendor type 0x%x with vendor status 0x%x\n",
2984 cqe->src_qp, sq->swq_last, cqe->wr_id, cqe->type, cqe->status);
2985 cqe++;
2986 (*budget)--;
2987 bnxt_qplib_mark_qp_error(qp);
2988 } else {
2989 /* Before we complete, do WA 9060 */
2990 if (!_is_chip_gen_p5_p7(qp->cctx)) {
2991 if (bnxt_re_legacy_do_wa9060(qp, cq, cq_cons,
2992 sq->swq_last,
2993 cqe_sq_cons)) {
2994 *lib_qp = qp;
2995 goto out;
2996 }
2997 }
2998 if (swq->flags & SQ_SEND_FLAGS_SIGNAL_COMP) {
2999
3000 dev_dbg(&cq->hwq.pdev->dev,
3001 "QPLIB: FP: CQ Processed Req \n");
3002 dev_dbg(&cq->hwq.pdev->dev,
3003 "QPLIB: wr_id[%d] = 0x%llx \n",
3004 sq->swq_last, cqe->wr_id);
3005 dev_dbg(&cq->hwq.pdev->dev,
3006 "QPLIB: with status 0x%x\n", cqe->status);
3007 cqe->status = CQ_REQ_STATUS_OK;
3008 cqe++;
3009 (*budget)--;
3010 }
3011 }
3012 skip:
3013 bnxt_qplib_hwq_incr_cons(sq->hwq.depth, &sq->hwq.cons,
3014 swq->slots, &sq->dbinfo.flags);
3015 sq->swq_last = swq->next_idx;
3016 if (sq->single == true)
3017 break;
3018 }
3019 out:
3020 *pcqe = cqe;
3021 if (sq->swq_last != cqe_sq_cons) {
3022 /* Out of budget */
3023 rc = -EAGAIN;
3024 goto done;
3025 }
3026 /* Back to normal completion mode only after it has completed all of
3027 the WC for this CQE */
3028 sq->single = false;
3029 done:
3030 return rc;
3031 }
3032
bnxt_qplib_release_srqe(struct bnxt_qplib_srq * srq,u32 tag)3033 static void bnxt_qplib_release_srqe(struct bnxt_qplib_srq *srq, u32 tag)
3034 {
3035 spin_lock(&srq->hwq.lock);
3036 srq->swq[srq->last_idx].next_idx = (int)tag;
3037 srq->last_idx = (int)tag;
3038 srq->swq[srq->last_idx].next_idx = -1;
3039 bnxt_qplib_hwq_incr_cons(srq->hwq.depth, &srq->hwq.cons,
3040 srq->dbinfo.max_slot, &srq->dbinfo.flags);
3041 spin_unlock(&srq->hwq.lock);
3042 }
3043
bnxt_qplib_cq_process_res_rc(struct bnxt_qplib_cq * cq,struct cq_res_rc * hwcqe,struct bnxt_qplib_cqe ** pcqe,int * budget)3044 static int bnxt_qplib_cq_process_res_rc(struct bnxt_qplib_cq *cq,
3045 struct cq_res_rc *hwcqe,
3046 struct bnxt_qplib_cqe **pcqe,
3047 int *budget)
3048 {
3049 struct bnxt_qplib_srq *srq;
3050 struct bnxt_qplib_cqe *cqe;
3051 struct bnxt_qplib_qp *qp;
3052 struct bnxt_qplib_q *rq;
3053 u32 wr_id_idx;
3054 int rc = 0;
3055
3056 qp = (struct bnxt_qplib_qp *)le64_to_cpu(hwcqe->qp_handle);
3057 if (!qp) {
3058 dev_err(&cq->hwq.pdev->dev, "QPLIB: process_cq RC qp is NULL\n");
3059 return -EINVAL;
3060 }
3061 if (qp->rq.flushed) {
3062 dev_dbg(&cq->hwq.pdev->dev,
3063 "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp);
3064 goto done;
3065 }
3066
3067 cqe = *pcqe;
3068 cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK;
3069 cqe->length = le32_to_cpu(hwcqe->length);
3070 cqe->invrkey = le32_to_cpu(hwcqe->imm_data_or_inv_r_key);
3071 cqe->mr_handle = le64_to_cpu(hwcqe->mr_handle);
3072 cqe->flags = le16_to_cpu(hwcqe->flags);
3073 cqe->status = hwcqe->status;
3074 cqe->qp_handle = (u64)(unsigned long)qp;
3075
3076 wr_id_idx = le32_to_cpu(hwcqe->srq_or_rq_wr_id) &
3077 CQ_RES_RC_SRQ_OR_RQ_WR_ID_MASK;
3078 if (cqe->flags & CQ_RES_RC_FLAGS_SRQ_SRQ) {
3079 srq = qp->srq;
3080 if (!srq) {
3081 dev_err(&cq->hwq.pdev->dev,
3082 "QPLIB: FP: SRQ used but not defined??\n");
3083 return -EINVAL;
3084 }
3085 if (wr_id_idx > srq->hwq.depth - 1) {
3086 dev_err(&cq->hwq.pdev->dev,
3087 "QPLIB: FP: CQ Process RC \n");
3088 dev_err(&cq->hwq.pdev->dev,
3089 "QPLIB: wr_id idx 0x%x exceeded SRQ max 0x%x\n",
3090 wr_id_idx, srq->hwq.depth);
3091 return -EINVAL;
3092 }
3093 cqe->wr_id = srq->swq[wr_id_idx].wr_id;
3094 bnxt_qplib_release_srqe(srq, wr_id_idx);
3095 dev_dbg(&srq->hwq.pdev->dev,
3096 "QPLIB: FP: CQ Processed RC SRQ wr_id[%d] = 0x%llx\n",
3097 wr_id_idx, cqe->wr_id);
3098 cqe++;
3099 (*budget)--;
3100 *pcqe = cqe;
3101 } else {
3102 rq = &qp->rq;
3103 if (wr_id_idx > (rq->max_wqe - 1)) {
3104 dev_err(&cq->hwq.pdev->dev,
3105 "QPLIB: FP: CQ Process RC \n");
3106 dev_err(&cq->hwq.pdev->dev,
3107 "QPLIB: wr_id idx 0x%x exceeded RQ max 0x%x\n",
3108 wr_id_idx, rq->hwq.depth);
3109 return -EINVAL;
3110 }
3111 if (wr_id_idx != rq->swq_last)
3112 return -EINVAL;
3113 cqe->wr_id = rq->swq[rq->swq_last].wr_id;
3114 dev_dbg(&cq->hwq.pdev->dev,
3115 "QPLIB: FP: CQ Processed RC RQ wr_id[%d] = 0x%llx\n",
3116 rq->swq_last, cqe->wr_id);
3117 cqe++;
3118 (*budget)--;
3119 bnxt_qplib_hwq_incr_cons(rq->hwq.depth, &rq->hwq.cons,
3120 rq->swq[rq->swq_last].slots,
3121 &rq->dbinfo.flags);
3122 rq->swq_last = rq->swq[rq->swq_last].next_idx;
3123 *pcqe = cqe;
3124
3125 if (hwcqe->status != CQ_RES_RC_STATUS_OK)
3126 bnxt_qplib_mark_qp_error(qp);
3127 }
3128 done:
3129 return rc;
3130 }
3131
bnxt_qplib_cq_process_res_ud(struct bnxt_qplib_cq * cq,struct cq_res_ud_v2 * hwcqe,struct bnxt_qplib_cqe ** pcqe,int * budget)3132 static int bnxt_qplib_cq_process_res_ud(struct bnxt_qplib_cq *cq,
3133 struct cq_res_ud_v2 *hwcqe,
3134 struct bnxt_qplib_cqe **pcqe,
3135 int *budget)
3136 {
3137 struct bnxt_qplib_srq *srq;
3138 struct bnxt_qplib_cqe *cqe;
3139 struct bnxt_qplib_qp *qp;
3140 struct bnxt_qplib_q *rq;
3141 u32 wr_id_idx;
3142 int rc = 0;
3143 u16 *smac;
3144
3145 qp = (struct bnxt_qplib_qp *)le64_to_cpu(hwcqe->qp_handle);
3146 if (!qp) {
3147 dev_err(&cq->hwq.pdev->dev, "QPLIB: process_cq UD qp is NULL\n");
3148 return -EINVAL;
3149 }
3150 if (qp->rq.flushed) {
3151 dev_dbg(&cq->hwq.pdev->dev,
3152 "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp);
3153 goto done;
3154 }
3155 cqe = *pcqe;
3156 cqe->opcode = hwcqe->cqe_type_toggle & CQ_RES_UD_V2_CQE_TYPE_MASK;
3157 cqe->length = le32_to_cpu((hwcqe->length & CQ_RES_UD_V2_LENGTH_MASK));
3158 cqe->cfa_meta = le16_to_cpu(hwcqe->cfa_metadata0);
3159 /* V2 format has metadata1 */
3160 cqe->cfa_meta |= (((le32_to_cpu(hwcqe->src_qp_high_srq_or_rq_wr_id) &
3161 CQ_RES_UD_V2_CFA_METADATA1_MASK) >>
3162 CQ_RES_UD_V2_CFA_METADATA1_SFT) <<
3163 BNXT_QPLIB_META1_SHIFT);
3164 cqe->invrkey = le32_to_cpu(hwcqe->imm_data);
3165 cqe->flags = le16_to_cpu(hwcqe->flags);
3166 cqe->status = hwcqe->status;
3167 cqe->qp_handle = (u64)(unsigned long)qp;
3168 smac = (u16 *)cqe->smac;
3169 smac[2] = ntohs(le16_to_cpu(hwcqe->src_mac[0]));
3170 smac[1] = ntohs(le16_to_cpu(hwcqe->src_mac[1]));
3171 smac[0] = ntohs(le16_to_cpu(hwcqe->src_mac[2]));
3172 wr_id_idx = le32_to_cpu(hwcqe->src_qp_high_srq_or_rq_wr_id)
3173 & CQ_RES_UD_V2_SRQ_OR_RQ_WR_ID_MASK;
3174 cqe->src_qp = le16_to_cpu(hwcqe->src_qp_low) |
3175 ((le32_to_cpu(
3176 hwcqe->src_qp_high_srq_or_rq_wr_id) &
3177 CQ_RES_UD_V2_SRC_QP_HIGH_MASK) >> 8);
3178
3179 if (cqe->flags & CQ_RES_UD_V2_FLAGS_SRQ) {
3180 srq = qp->srq;
3181 if (!srq) {
3182 dev_err(&cq->hwq.pdev->dev,
3183 "QPLIB: FP: SRQ used but not defined??\n");
3184 return -EINVAL;
3185 }
3186 if (wr_id_idx > srq->hwq.depth - 1) {
3187 dev_err(&cq->hwq.pdev->dev,
3188 "QPLIB: FP: CQ Process UD \n");
3189 dev_err(&cq->hwq.pdev->dev,
3190 "QPLIB: wr_id idx 0x%x exceeded SRQ max 0x%x\n",
3191 wr_id_idx, srq->hwq.depth);
3192 return -EINVAL;
3193 }
3194 cqe->wr_id = srq->swq[wr_id_idx].wr_id;
3195 bnxt_qplib_release_srqe(srq, wr_id_idx);
3196 dev_dbg(&cq->hwq.pdev->dev,
3197 "QPLIB: FP: CQ Processed UD SRQ wr_id[%d] = 0x%llx\n",
3198 wr_id_idx, cqe->wr_id);
3199 cqe++;
3200 (*budget)--;
3201 *pcqe = cqe;
3202 } else {
3203 rq = &qp->rq;
3204 if (wr_id_idx > (rq->max_wqe - 1)) {
3205 dev_err(&cq->hwq.pdev->dev,
3206 "QPLIB: FP: CQ Process UD \n");
3207 dev_err(&cq->hwq.pdev->dev,
3208 "QPLIB: wr_id idx 0x%x exceeded RQ max 0x%x\n",
3209 wr_id_idx, rq->hwq.depth);
3210 return -EINVAL;
3211 }
3212 if (rq->swq_last != wr_id_idx)
3213 return -EINVAL;
3214
3215 cqe->wr_id = rq->swq[rq->swq_last].wr_id;
3216 dev_dbg(&cq->hwq.pdev->dev,
3217 "QPLIB: FP: CQ Processed UD RQ wr_id[%d] = 0x%llx\n",
3218 rq->swq_last, cqe->wr_id);
3219 cqe++;
3220 (*budget)--;
3221 bnxt_qplib_hwq_incr_cons(rq->hwq.depth, &rq->hwq.cons,
3222 rq->swq[rq->swq_last].slots,
3223 &rq->dbinfo.flags);
3224 rq->swq_last = rq->swq[rq->swq_last].next_idx;
3225 *pcqe = cqe;
3226
3227 if (hwcqe->status != CQ_RES_UD_V2_STATUS_OK)
3228 bnxt_qplib_mark_qp_error(qp);
3229 }
3230 done:
3231 return rc;
3232 }
3233
bnxt_qplib_is_cq_empty(struct bnxt_qplib_cq * cq)3234 bool bnxt_qplib_is_cq_empty(struct bnxt_qplib_cq *cq)
3235 {
3236
3237 struct cq_base *hw_cqe;
3238 unsigned long flags;
3239 bool rc = true;
3240
3241 spin_lock_irqsave(&cq->hwq.lock, flags);
3242 hw_cqe = bnxt_qplib_get_qe(&cq->hwq, cq->hwq.cons, NULL);
3243
3244 /* Check for Valid bit. If the CQE is valid, return false */
3245 rc = !CQE_CMP_VALID(hw_cqe, cq->dbinfo.flags);
3246 spin_unlock_irqrestore(&cq->hwq.lock, flags);
3247 return rc;
3248 }
3249
bnxt_qplib_cq_process_res_raweth_qp1(struct bnxt_qplib_cq * cq,struct cq_res_raweth_qp1 * hwcqe,struct bnxt_qplib_cqe ** pcqe,int * budget)3250 static int bnxt_qplib_cq_process_res_raweth_qp1(struct bnxt_qplib_cq *cq,
3251 struct cq_res_raweth_qp1 *hwcqe,
3252 struct bnxt_qplib_cqe **pcqe,
3253 int *budget)
3254 {
3255 struct bnxt_qplib_qp *qp;
3256 struct bnxt_qplib_q *rq;
3257 struct bnxt_qplib_srq *srq;
3258 struct bnxt_qplib_cqe *cqe;
3259 u32 wr_id_idx;
3260 int rc = 0;
3261
3262 qp = (struct bnxt_qplib_qp *)le64_to_cpu(hwcqe->qp_handle);
3263 if (!qp) {
3264 dev_err(&cq->hwq.pdev->dev,
3265 "QPLIB: process_cq Raw/QP1 qp is NULL\n");
3266 return -EINVAL;
3267 }
3268 if (qp->rq.flushed) {
3269 dev_dbg(&cq->hwq.pdev->dev,
3270 "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp);
3271 goto done;
3272 }
3273 cqe = *pcqe;
3274 cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK;
3275 cqe->flags = le16_to_cpu(hwcqe->flags);
3276 cqe->qp_handle = (u64)(unsigned long)qp;
3277
3278 wr_id_idx = le32_to_cpu(hwcqe->raweth_qp1_payload_offset_srq_or_rq_wr_id)
3279 & CQ_RES_RAWETH_QP1_SRQ_OR_RQ_WR_ID_MASK;
3280 cqe->src_qp = qp->id;
3281 if (qp->id == 1 && !cqe->length) {
3282 /* Add workaround for the length misdetection */
3283 cqe->length = 296;
3284 } else {
3285 cqe->length = le16_to_cpu(hwcqe->length);
3286 }
3287 cqe->pkey_index = qp->pkey_index;
3288 memcpy(cqe->smac, qp->smac, 6);
3289
3290 cqe->raweth_qp1_flags = le16_to_cpu(hwcqe->raweth_qp1_flags);
3291 cqe->raweth_qp1_flags2 = le32_to_cpu(hwcqe->raweth_qp1_flags2);
3292 cqe->raweth_qp1_metadata = le32_to_cpu(hwcqe->raweth_qp1_metadata);
3293
3294 dev_dbg(&cq->hwq.pdev->dev,
3295 "QPLIB: raweth_qp1_flags = 0x%x raweth_qp1_flags2 = 0x%x\n",
3296 cqe->raweth_qp1_flags, cqe->raweth_qp1_flags2);
3297
3298 if (cqe->flags & CQ_RES_RAWETH_QP1_FLAGS_SRQ_SRQ) {
3299 srq = qp->srq;
3300 if (!srq) {
3301 dev_err(&cq->hwq.pdev->dev,
3302 "QPLIB: FP: SRQ used but not defined??\n");
3303 return -EINVAL;
3304 }
3305 if (wr_id_idx > srq->hwq.depth - 1) {
3306 dev_err(&cq->hwq.pdev->dev,
3307 "QPLIB: FP: CQ Process Raw/QP1 \n");
3308 dev_err(&cq->hwq.pdev->dev,
3309 "QPLIB: wr_id idx 0x%x exceeded SRQ max 0x%x\n",
3310 wr_id_idx, srq->hwq.depth);
3311 return -EINVAL;
3312 }
3313 cqe->wr_id = srq->swq[wr_id_idx].wr_id;
3314 dev_dbg(&cq->hwq.pdev->dev,
3315 "QPLIB: FP: CQ Processed Raw/QP1 SRQ \n");
3316 dev_dbg(&cq->hwq.pdev->dev,
3317 "QPLIB: wr_id[%d] = 0x%llx with status = 0x%x\n",
3318 wr_id_idx, cqe->wr_id, hwcqe->status);
3319 cqe++;
3320 (*budget)--;
3321 srq->hwq.cons++;
3322 *pcqe = cqe;
3323 } else {
3324 rq = &qp->rq;
3325 if (wr_id_idx > (rq->max_wqe - 1)) {
3326 dev_err(&cq->hwq.pdev->dev,
3327 "QPLIB: FP: CQ Process Raw/QP1 RQ wr_id \n");
3328 dev_err(&cq->hwq.pdev->dev,
3329 "QPLIB: ix 0x%x exceeded RQ max 0x%x\n",
3330 wr_id_idx, rq->max_wqe);
3331 return -EINVAL;
3332 }
3333 if (wr_id_idx != rq->swq_last)
3334 return -EINVAL;
3335 cqe->wr_id = rq->swq[rq->swq_last].wr_id;
3336 dev_dbg(&cq->hwq.pdev->dev,
3337 "QPLIB: FP: CQ Processed Raw/QP1 RQ \n");
3338 dev_dbg(&cq->hwq.pdev->dev,
3339 "QPLIB: wr_id[%d] = 0x%llx with status = 0x%x\n",
3340 wr_id_idx, cqe->wr_id, hwcqe->status);
3341 cqe++;
3342 (*budget)--;
3343 bnxt_qplib_hwq_incr_cons(rq->hwq.depth, &rq->hwq.cons,
3344 rq->swq[wr_id_idx].slots,
3345 &rq->dbinfo.flags);
3346 rq->swq_last = rq->swq[rq->swq_last].next_idx;
3347 *pcqe = cqe;
3348
3349 if (hwcqe->status != CQ_RES_RC_STATUS_OK)
3350 bnxt_qplib_mark_qp_error(qp);
3351 }
3352 done:
3353 return rc;
3354 }
3355
bnxt_qplib_cq_process_terminal(struct bnxt_qplib_cq * cq,struct cq_terminal * hwcqe,struct bnxt_qplib_cqe ** pcqe,int * budget)3356 static int bnxt_qplib_cq_process_terminal(struct bnxt_qplib_cq *cq,
3357 struct cq_terminal *hwcqe,
3358 struct bnxt_qplib_cqe **pcqe,
3359 int *budget)
3360 {
3361 struct bnxt_qplib_q *sq, *rq;
3362 struct bnxt_qplib_cqe *cqe;
3363 struct bnxt_qplib_qp *qp;
3364 u32 swq_last;
3365 u32 cqe_cons;
3366 int rc = 0;
3367
3368 /* Check the Status */
3369 if (hwcqe->status != CQ_TERMINAL_STATUS_OK)
3370 dev_warn(&cq->hwq.pdev->dev,
3371 "QPLIB: FP: CQ Process Terminal Error status = 0x%x\n",
3372 hwcqe->status);
3373
3374 qp = (struct bnxt_qplib_qp *)le64_to_cpu(hwcqe->qp_handle);
3375 if (!qp)
3376 return -EINVAL;
3377 dev_dbg(&cq->hwq.pdev->dev,
3378 "QPLIB: FP: CQ Process terminal for qp (0x%x)\n", qp->id);
3379
3380 /* Terminal CQE requires all posted RQEs to complete with FLUSHED_ERR
3381 * from the current rq->cons to the rq->prod regardless what the
3382 * rq->cons the terminal CQE indicates.
3383 */
3384 bnxt_qplib_mark_qp_error(qp);
3385
3386 sq = &qp->sq;
3387 rq = &qp->rq;
3388
3389 cqe_cons = le16_to_cpu(hwcqe->sq_cons_idx);
3390 if (cqe_cons == 0xFFFF)
3391 goto do_rq;
3392
3393 cqe_cons %= sq->max_sw_wqe;
3394 if (qp->sq.flushed) {
3395 dev_dbg(&cq->hwq.pdev->dev,
3396 "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp);
3397 goto sq_done;
3398 }
3399
3400 /* Terminal CQE can also include aggregated successful CQEs prior.
3401 So we must complete all CQEs from the current sq's cons to the
3402 cq_cons with status OK */
3403 cqe = *pcqe;
3404 while (*budget) {
3405 /*sw_cons = HWQ_CMP(sq->hwq.cons, &sq->hwq);*/
3406 swq_last = sq->swq_last;
3407 if (swq_last == cqe_cons)
3408 break;
3409 if (sq->swq[swq_last].flags & SQ_SEND_FLAGS_SIGNAL_COMP) {
3410 memset(cqe, 0, sizeof(*cqe));
3411 cqe->status = CQ_REQ_STATUS_OK;
3412 cqe->opcode = CQ_BASE_CQE_TYPE_REQ;
3413 cqe->qp_handle = (u64)qp;
3414 cqe->src_qp = qp->id;
3415 cqe->wr_id = sq->swq[swq_last].wr_id;
3416 cqe->type = sq->swq[swq_last].type;
3417 dev_dbg(&cq->hwq.pdev->dev,
3418 "QPLIB: FP: CQ Processed terminal Req \n");
3419 dev_dbg(&cq->hwq.pdev->dev,
3420 "QPLIB: wr_id[%d] = 0x%llx with status 0x%x\n",
3421 swq_last, cqe->wr_id, cqe->status);
3422 cqe++;
3423 (*budget)--;
3424 }
3425 bnxt_qplib_hwq_incr_cons(sq->hwq.depth, &sq->hwq.cons,
3426 sq->swq[swq_last].slots,
3427 &sq->dbinfo.flags);
3428 sq->swq_last = sq->swq[swq_last].next_idx;
3429 }
3430 *pcqe = cqe;
3431 if (!*budget && swq_last != cqe_cons) {
3432 /* Out of budget */
3433 rc = -EAGAIN;
3434 goto sq_done;
3435 }
3436 sq_done:
3437 if (rc)
3438 return rc;
3439 do_rq:
3440 cqe_cons = le16_to_cpu(hwcqe->rq_cons_idx);
3441 if (cqe_cons == 0xFFFF) {
3442 goto done;
3443 } else if (cqe_cons > (rq->max_wqe - 1)) {
3444 dev_err(&cq->hwq.pdev->dev,
3445 "QPLIB: FP: CQ Processed terminal \n");
3446 dev_err(&cq->hwq.pdev->dev,
3447 "QPLIB: reported rq_cons_idx 0x%x exceeds max 0x%x\n",
3448 cqe_cons, rq->hwq.depth);
3449 goto done;
3450 }
3451 if (qp->rq.flushed) {
3452 dev_dbg(&cq->hwq.pdev->dev,
3453 "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp);
3454 rc = 0;
3455 goto rq_done;
3456 }
3457
3458 rq_done:
3459 done:
3460 return rc;
3461 }
3462
bnxt_qplib_cq_process_cutoff(struct bnxt_qplib_cq * cq,struct cq_cutoff * hwcqe)3463 static int bnxt_qplib_cq_process_cutoff(struct bnxt_qplib_cq *cq,
3464 struct cq_cutoff *hwcqe)
3465 {
3466 /* Check the Status */
3467 if (hwcqe->status != CQ_CUTOFF_STATUS_OK) {
3468 dev_err(&cq->hwq.pdev->dev,
3469 "QPLIB: FP: CQ Process Cutoff Error status = 0x%x\n",
3470 hwcqe->status);
3471 return -EINVAL;
3472 }
3473 clear_bit(CQ_FLAGS_RESIZE_IN_PROG, &cq->flags);
3474 wake_up_interruptible(&cq->waitq);
3475
3476 dev_dbg(&cq->hwq.pdev->dev, "QPLIB: FP: CQ Processed Cutoff\n");
3477 return 0;
3478 }
3479
bnxt_qplib_process_flush_list(struct bnxt_qplib_cq * cq,struct bnxt_qplib_cqe * cqe,int num_cqes)3480 int bnxt_qplib_process_flush_list(struct bnxt_qplib_cq *cq,
3481 struct bnxt_qplib_cqe *cqe,
3482 int num_cqes)
3483 {
3484 struct bnxt_qplib_qp *qp = NULL;
3485 u32 budget = num_cqes;
3486 unsigned long flags;
3487
3488 spin_lock_irqsave(&cq->flush_lock, flags);
3489 list_for_each_entry(qp, &cq->sqf_head, sq_flush) {
3490 dev_dbg(&cq->hwq.pdev->dev,
3491 "QPLIB: FP: Flushing SQ QP= %p\n",
3492 qp);
3493 __flush_sq(&qp->sq, qp, &cqe, &budget);
3494 }
3495
3496 list_for_each_entry(qp, &cq->rqf_head, rq_flush) {
3497 dev_dbg(&cq->hwq.pdev->dev,
3498 "QPLIB: FP: Flushing RQ QP= %p\n",
3499 qp);
3500 __flush_rq(&qp->rq, qp, &cqe, &budget);
3501 }
3502 spin_unlock_irqrestore(&cq->flush_lock, flags);
3503
3504 return num_cqes - budget;
3505 }
3506
bnxt_qplib_poll_cq(struct bnxt_qplib_cq * cq,struct bnxt_qplib_cqe * cqe,int num_cqes,struct bnxt_qplib_qp ** lib_qp)3507 int bnxt_qplib_poll_cq(struct bnxt_qplib_cq *cq, struct bnxt_qplib_cqe *cqe,
3508 int num_cqes, struct bnxt_qplib_qp **lib_qp)
3509 {
3510 struct cq_base *hw_cqe;
3511 u32 hw_polled = 0;
3512 int budget, rc = 0;
3513 u8 type;
3514
3515 budget = num_cqes;
3516
3517 while (budget) {
3518 hw_cqe = bnxt_qplib_get_qe(&cq->hwq, cq->hwq.cons, NULL);
3519
3520 /* Check for Valid bit */
3521 if (!CQE_CMP_VALID(hw_cqe, cq->dbinfo.flags))
3522 break;
3523
3524 /* The valid test of the entry must be done first before
3525 * reading any further.
3526 */
3527 dma_rmb();
3528 /* From the device's respective CQE format to qplib_wc*/
3529 type = hw_cqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK;
3530 switch (type) {
3531 case CQ_BASE_CQE_TYPE_REQ:
3532 rc = bnxt_qplib_cq_process_req(cq,
3533 (struct cq_req *)hw_cqe, &cqe, &budget,
3534 cq->hwq.cons, lib_qp);
3535 break;
3536 case CQ_BASE_CQE_TYPE_RES_RC:
3537 rc = bnxt_qplib_cq_process_res_rc(cq,
3538 (struct cq_res_rc *)hw_cqe, &cqe,
3539 &budget);
3540 break;
3541 case CQ_BASE_CQE_TYPE_RES_UD:
3542 rc = bnxt_qplib_cq_process_res_ud(cq,
3543 (struct cq_res_ud_v2 *)hw_cqe,
3544 &cqe, &budget);
3545 break;
3546 case CQ_BASE_CQE_TYPE_RES_RAWETH_QP1:
3547 rc = bnxt_qplib_cq_process_res_raweth_qp1(cq,
3548 (struct cq_res_raweth_qp1 *)
3549 hw_cqe, &cqe, &budget);
3550 break;
3551 case CQ_BASE_CQE_TYPE_TERMINAL:
3552 rc = bnxt_qplib_cq_process_terminal(cq,
3553 (struct cq_terminal *)hw_cqe,
3554 &cqe, &budget);
3555 break;
3556 case CQ_BASE_CQE_TYPE_CUT_OFF:
3557 bnxt_qplib_cq_process_cutoff(cq,
3558 (struct cq_cutoff *)hw_cqe);
3559 /* Done processing this CQ */
3560 goto exit;
3561 default:
3562 dev_err(&cq->hwq.pdev->dev,
3563 "QPLIB: process_cq unknown type 0x%x\n",
3564 hw_cqe->cqe_type_toggle &
3565 CQ_BASE_CQE_TYPE_MASK);
3566 rc = -EINVAL;
3567 break;
3568 }
3569 if (rc < 0) {
3570 dev_dbg(&cq->hwq.pdev->dev,
3571 "QPLIB: process_cqe rc = 0x%x\n", rc);
3572 if (rc == -EAGAIN)
3573 break;
3574 /* Error while processing the CQE, just skip to the
3575 next one */
3576 if (type != CQ_BASE_CQE_TYPE_TERMINAL)
3577 dev_err(&cq->hwq.pdev->dev,
3578 "QPLIB: process_cqe error rc = 0x%x\n",
3579 rc);
3580 }
3581 hw_polled++;
3582 bnxt_qplib_hwq_incr_cons(cq->hwq.depth, &cq->hwq.cons,
3583 1, &cq->dbinfo.flags);
3584 }
3585 if (hw_polled)
3586 bnxt_qplib_ring_db(&cq->dbinfo, DBC_DBC_TYPE_CQ);
3587 exit:
3588 return num_cqes - budget;
3589 }
3590
bnxt_qplib_req_notify_cq(struct bnxt_qplib_cq * cq,u32 arm_type)3591 void bnxt_qplib_req_notify_cq(struct bnxt_qplib_cq *cq, u32 arm_type)
3592 {
3593 cq->dbinfo.toggle = cq->toggle;
3594 if (arm_type)
3595 bnxt_qplib_ring_db(&cq->dbinfo, arm_type);
3596 /* Using cq->arm_state variable to track whether to issue cq handler */
3597 atomic_set(&cq->arm_state, 1);
3598 }
3599
bnxt_qplib_flush_cqn_wq(struct bnxt_qplib_qp * qp)3600 void bnxt_qplib_flush_cqn_wq(struct bnxt_qplib_qp *qp)
3601 {
3602 flush_workqueue(qp->scq->nq->cqn_wq);
3603 if (qp->scq != qp->rcq)
3604 flush_workqueue(qp->rcq->nq->cqn_wq);
3605 }
3606