1 // SPDX-License-Identifier: BSD-3-Clause-Clear
2 /*
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
5 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
6 */
7
8 #include "core.h"
9 #include "dp_tx.h"
10 #include "debug.h"
11 #include "debugfs_sta.h"
12 #include "hw.h"
13 #include "peer.h"
14 #include "mac.h"
15
16 static enum hal_tcl_encap_type
ath11k_dp_tx_get_encap_type(struct ath11k_vif * arvif,struct sk_buff * skb)17 ath11k_dp_tx_get_encap_type(struct ath11k_vif *arvif, struct sk_buff *skb)
18 {
19 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
20 struct ath11k_base *ab = arvif->ar->ab;
21
22 if (test_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags))
23 return HAL_TCL_ENCAP_TYPE_RAW;
24
25 if (tx_info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP)
26 return HAL_TCL_ENCAP_TYPE_ETHERNET;
27
28 return HAL_TCL_ENCAP_TYPE_NATIVE_WIFI;
29 }
30
ath11k_dp_tx_encap_nwifi(struct sk_buff * skb)31 static void ath11k_dp_tx_encap_nwifi(struct sk_buff *skb)
32 {
33 struct ieee80211_hdr *hdr = (void *)skb->data;
34 u8 *qos_ctl;
35
36 if (!ieee80211_is_data_qos(hdr->frame_control))
37 return;
38
39 qos_ctl = ieee80211_get_qos_ctl(hdr);
40 memmove(skb->data + IEEE80211_QOS_CTL_LEN,
41 #if defined(__linux__)
42 skb->data, (void *)qos_ctl - (void *)skb->data);
43 #elif defined(__FreeBSD__)
44 skb->data, qos_ctl - (u8 *)skb->data);
45 #endif
46 skb_pull(skb, IEEE80211_QOS_CTL_LEN);
47
48 hdr = (void *)skb->data;
49 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_STYPE_QOS_DATA);
50 }
51
ath11k_dp_tx_get_tid(struct sk_buff * skb)52 static u8 ath11k_dp_tx_get_tid(struct sk_buff *skb)
53 {
54 struct ieee80211_hdr *hdr = (void *)skb->data;
55 struct ath11k_skb_cb *cb = ATH11K_SKB_CB(skb);
56
57 if (cb->flags & ATH11K_SKB_HW_80211_ENCAP)
58 return skb->priority & IEEE80211_QOS_CTL_TID_MASK;
59 else if (!ieee80211_is_data_qos(hdr->frame_control))
60 return HAL_DESC_REO_NON_QOS_TID;
61 else
62 return skb->priority & IEEE80211_QOS_CTL_TID_MASK;
63 }
64
ath11k_dp_tx_get_encrypt_type(u32 cipher)65 enum hal_encrypt_type ath11k_dp_tx_get_encrypt_type(u32 cipher)
66 {
67 switch (cipher) {
68 case WLAN_CIPHER_SUITE_WEP40:
69 return HAL_ENCRYPT_TYPE_WEP_40;
70 case WLAN_CIPHER_SUITE_WEP104:
71 return HAL_ENCRYPT_TYPE_WEP_104;
72 case WLAN_CIPHER_SUITE_TKIP:
73 return HAL_ENCRYPT_TYPE_TKIP_MIC;
74 case WLAN_CIPHER_SUITE_CCMP:
75 return HAL_ENCRYPT_TYPE_CCMP_128;
76 case WLAN_CIPHER_SUITE_CCMP_256:
77 return HAL_ENCRYPT_TYPE_CCMP_256;
78 case WLAN_CIPHER_SUITE_GCMP:
79 return HAL_ENCRYPT_TYPE_GCMP_128;
80 case WLAN_CIPHER_SUITE_GCMP_256:
81 return HAL_ENCRYPT_TYPE_AES_GCMP_256;
82 default:
83 return HAL_ENCRYPT_TYPE_OPEN;
84 }
85 }
86
ath11k_dp_tx(struct ath11k * ar,struct ath11k_vif * arvif,struct ath11k_sta * arsta,struct sk_buff * skb)87 int ath11k_dp_tx(struct ath11k *ar, struct ath11k_vif *arvif,
88 struct ath11k_sta *arsta, struct sk_buff *skb)
89 {
90 struct ath11k_base *ab = ar->ab;
91 struct ath11k_dp *dp = &ab->dp;
92 struct hal_tx_info ti = {};
93 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
94 struct ath11k_skb_cb *skb_cb = ATH11K_SKB_CB(skb);
95 struct hal_srng *tcl_ring;
96 struct ieee80211_hdr *hdr = (void *)skb->data;
97 struct dp_tx_ring *tx_ring;
98 size_t num_tx_rings = ab->hw_params.hal_params->num_tx_rings;
99 #if defined(__linux__)
100 void *hal_tcl_desc;
101 #elif defined(__FreeBSD__)
102 u8 *hal_tcl_desc;
103 #endif
104 u8 pool_id;
105 u8 hal_ring_id;
106 int ret;
107 u32 ring_selector = 0;
108 u8 ring_map = 0;
109 bool tcl_ring_retry;
110
111 if (unlikely(test_bit(ATH11K_FLAG_CRASH_FLUSH, &ar->ab->dev_flags)))
112 return -ESHUTDOWN;
113
114 if (unlikely(!(info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP) &&
115 !ieee80211_is_data(hdr->frame_control)))
116 return -EOPNOTSUPP;
117
118 pool_id = skb_get_queue_mapping(skb) & (ATH11K_HW_MAX_QUEUES - 1);
119
120 ring_selector = ab->hw_params.hw_ops->get_ring_selector(skb);
121
122 tcl_ring_sel:
123 tcl_ring_retry = false;
124
125 ti.ring_id = ring_selector % num_tx_rings;
126 ti.rbm_id = ab->hw_params.hal_params->tcl2wbm_rbm_map[ti.ring_id].rbm_id;
127
128 ring_map |= BIT(ti.ring_id);
129
130 tx_ring = &dp->tx_ring[ti.ring_id];
131
132 spin_lock_bh(&tx_ring->tx_idr_lock);
133 ret = idr_alloc(&tx_ring->txbuf_idr, skb, 0,
134 DP_TX_IDR_SIZE - 1, GFP_ATOMIC);
135 spin_unlock_bh(&tx_ring->tx_idr_lock);
136
137 if (unlikely(ret < 0)) {
138 if (ring_map == (BIT(num_tx_rings) - 1) ||
139 !ab->hw_params.tcl_ring_retry) {
140 atomic_inc(&ab->soc_stats.tx_err.misc_fail);
141 return -ENOSPC;
142 }
143
144 /* Check if the next ring is available */
145 ring_selector++;
146 goto tcl_ring_sel;
147 }
148
149 ti.desc_id = FIELD_PREP(DP_TX_DESC_ID_MAC_ID, ar->pdev_idx) |
150 FIELD_PREP(DP_TX_DESC_ID_MSDU_ID, ret) |
151 FIELD_PREP(DP_TX_DESC_ID_POOL_ID, pool_id);
152 ti.encap_type = ath11k_dp_tx_get_encap_type(arvif, skb);
153
154 if (ieee80211_has_a4(hdr->frame_control) &&
155 is_multicast_ether_addr(hdr->addr3) && arsta &&
156 arsta->use_4addr_set) {
157 ti.meta_data_flags = arsta->tcl_metadata;
158 ti.flags0 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TO_FW, 1);
159 } else {
160 ti.meta_data_flags = arvif->tcl_metadata;
161 }
162
163 if (unlikely(ti.encap_type == HAL_TCL_ENCAP_TYPE_RAW)) {
164 if (skb_cb->flags & ATH11K_SKB_CIPHER_SET) {
165 ti.encrypt_type =
166 ath11k_dp_tx_get_encrypt_type(skb_cb->cipher);
167
168 if (ieee80211_has_protected(hdr->frame_control))
169 skb_put(skb, IEEE80211_CCMP_MIC_LEN);
170 } else {
171 ti.encrypt_type = HAL_ENCRYPT_TYPE_OPEN;
172 }
173 }
174
175 ti.addr_search_flags = arvif->hal_addr_search_flags;
176 ti.search_type = arvif->search_type;
177 ti.type = HAL_TCL_DESC_TYPE_BUFFER;
178 ti.pkt_offset = 0;
179 ti.lmac_id = ar->lmac_id;
180 ti.bss_ast_hash = arvif->ast_hash;
181 ti.bss_ast_idx = arvif->ast_idx;
182 ti.dscp_tid_tbl_idx = 0;
183
184 if (likely(skb->ip_summed == CHECKSUM_PARTIAL &&
185 ti.encap_type != HAL_TCL_ENCAP_TYPE_RAW)) {
186 ti.flags0 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_IP4_CKSUM_EN, 1) |
187 FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_UDP4_CKSUM_EN, 1) |
188 FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_UDP6_CKSUM_EN, 1) |
189 FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TCP4_CKSUM_EN, 1) |
190 FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TCP6_CKSUM_EN, 1);
191 }
192
193 if (ieee80211_vif_is_mesh(arvif->vif))
194 ti.enable_mesh = true;
195
196 ti.flags1 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO2_TID_OVERWRITE, 1);
197
198 ti.tid = ath11k_dp_tx_get_tid(skb);
199
200 switch (ti.encap_type) {
201 case HAL_TCL_ENCAP_TYPE_NATIVE_WIFI:
202 ath11k_dp_tx_encap_nwifi(skb);
203 break;
204 case HAL_TCL_ENCAP_TYPE_RAW:
205 if (!test_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags)) {
206 ret = -EINVAL;
207 goto fail_remove_idr;
208 }
209 break;
210 case HAL_TCL_ENCAP_TYPE_ETHERNET:
211 /* no need to encap */
212 break;
213 case HAL_TCL_ENCAP_TYPE_802_3:
214 default:
215 /* TODO: Take care of other encap modes as well */
216 ret = -EINVAL;
217 atomic_inc(&ab->soc_stats.tx_err.misc_fail);
218 goto fail_remove_idr;
219 }
220
221 ti.paddr = dma_map_single(ab->dev, skb->data, skb->len, DMA_TO_DEVICE);
222 if (unlikely(dma_mapping_error(ab->dev, ti.paddr))) {
223 atomic_inc(&ab->soc_stats.tx_err.misc_fail);
224 ath11k_warn(ab, "failed to DMA map data Tx buffer\n");
225 ret = -ENOMEM;
226 goto fail_remove_idr;
227 }
228
229 ti.data_len = skb->len;
230 skb_cb->paddr = ti.paddr;
231 skb_cb->vif = arvif->vif;
232 skb_cb->ar = ar;
233
234 hal_ring_id = tx_ring->tcl_data_ring.ring_id;
235 tcl_ring = &ab->hal.srng_list[hal_ring_id];
236
237 spin_lock_bh(&tcl_ring->lock);
238
239 ath11k_hal_srng_access_begin(ab, tcl_ring);
240
241 hal_tcl_desc = (void *)ath11k_hal_srng_src_get_next_entry(ab, tcl_ring);
242 if (unlikely(!hal_tcl_desc)) {
243 /* NOTE: It is highly unlikely we'll be running out of tcl_ring
244 * desc because the desc is directly enqueued onto hw queue.
245 */
246 ath11k_hal_srng_access_end(ab, tcl_ring);
247 ab->soc_stats.tx_err.desc_na[ti.ring_id]++;
248 spin_unlock_bh(&tcl_ring->lock);
249 ret = -ENOMEM;
250
251 /* Checking for available tcl descriptors in another ring in
252 * case of failure due to full tcl ring now, is better than
253 * checking this ring earlier for each pkt tx.
254 * Restart ring selection if some rings are not checked yet.
255 */
256 if (unlikely(ring_map != (BIT(num_tx_rings)) - 1) &&
257 ab->hw_params.tcl_ring_retry && num_tx_rings > 1) {
258 tcl_ring_retry = true;
259 ring_selector++;
260 }
261
262 goto fail_unmap_dma;
263 }
264
265 ath11k_hal_tx_cmd_desc_setup(ab, hal_tcl_desc +
266 sizeof(struct hal_tlv_hdr), &ti);
267
268 ath11k_hal_srng_access_end(ab, tcl_ring);
269
270 ath11k_dp_shadow_start_timer(ab, tcl_ring, &dp->tx_ring_timer[ti.ring_id]);
271
272 spin_unlock_bh(&tcl_ring->lock);
273
274 ath11k_dbg_dump(ab, ATH11K_DBG_DP_TX, NULL, "dp tx msdu: ",
275 skb->data, skb->len);
276
277 atomic_inc(&ar->dp.num_tx_pending);
278
279 return 0;
280
281 fail_unmap_dma:
282 dma_unmap_single(ab->dev, ti.paddr, ti.data_len, DMA_TO_DEVICE);
283
284 fail_remove_idr:
285 spin_lock_bh(&tx_ring->tx_idr_lock);
286 idr_remove(&tx_ring->txbuf_idr,
287 FIELD_GET(DP_TX_DESC_ID_MSDU_ID, ti.desc_id));
288 spin_unlock_bh(&tx_ring->tx_idr_lock);
289
290 if (tcl_ring_retry)
291 goto tcl_ring_sel;
292
293 return ret;
294 }
295
ath11k_dp_tx_free_txbuf(struct ath11k_base * ab,u8 mac_id,int msdu_id,struct dp_tx_ring * tx_ring)296 static void ath11k_dp_tx_free_txbuf(struct ath11k_base *ab, u8 mac_id,
297 int msdu_id,
298 struct dp_tx_ring *tx_ring)
299 {
300 struct ath11k *ar;
301 struct sk_buff *msdu;
302 struct ath11k_skb_cb *skb_cb;
303
304 spin_lock(&tx_ring->tx_idr_lock);
305 msdu = idr_remove(&tx_ring->txbuf_idr, msdu_id);
306 spin_unlock(&tx_ring->tx_idr_lock);
307
308 if (unlikely(!msdu)) {
309 ath11k_warn(ab, "tx completion for unknown msdu_id %d\n",
310 msdu_id);
311 return;
312 }
313
314 skb_cb = ATH11K_SKB_CB(msdu);
315
316 dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
317 dev_kfree_skb_any(msdu);
318
319 ar = ab->pdevs[mac_id].ar;
320 if (atomic_dec_and_test(&ar->dp.num_tx_pending))
321 wake_up(&ar->dp.tx_empty_waitq);
322 }
323
324 static void
ath11k_dp_tx_htt_tx_complete_buf(struct ath11k_base * ab,struct dp_tx_ring * tx_ring,struct ath11k_dp_htt_wbm_tx_status * ts)325 ath11k_dp_tx_htt_tx_complete_buf(struct ath11k_base *ab,
326 struct dp_tx_ring *tx_ring,
327 struct ath11k_dp_htt_wbm_tx_status *ts)
328 {
329 struct ieee80211_tx_status status = {};
330 struct sk_buff *msdu;
331 struct ieee80211_tx_info *info;
332 struct ath11k_skb_cb *skb_cb;
333 struct ath11k *ar;
334 struct ath11k_peer *peer;
335
336 spin_lock(&tx_ring->tx_idr_lock);
337 msdu = idr_remove(&tx_ring->txbuf_idr, ts->msdu_id);
338 spin_unlock(&tx_ring->tx_idr_lock);
339
340 if (unlikely(!msdu)) {
341 ath11k_warn(ab, "htt tx completion for unknown msdu_id %d\n",
342 ts->msdu_id);
343 return;
344 }
345
346 skb_cb = ATH11K_SKB_CB(msdu);
347 info = IEEE80211_SKB_CB(msdu);
348
349 ar = skb_cb->ar;
350
351 if (atomic_dec_and_test(&ar->dp.num_tx_pending))
352 wake_up(&ar->dp.tx_empty_waitq);
353
354 dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
355
356 if (!skb_cb->vif) {
357 ieee80211_free_txskb(ar->hw, msdu);
358 return;
359 }
360
361 memset(&info->status, 0, sizeof(info->status));
362
363 if (ts->acked) {
364 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
365 info->flags |= IEEE80211_TX_STAT_ACK;
366 info->status.ack_signal = ts->ack_rssi;
367
368 if (!test_bit(WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT,
369 ab->wmi_ab.svc_map))
370 info->status.ack_signal += ATH11K_DEFAULT_NOISE_FLOOR;
371
372 info->status.flags |=
373 IEEE80211_TX_STATUS_ACK_SIGNAL_VALID;
374 } else {
375 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
376 }
377 }
378
379 spin_lock_bh(&ab->base_lock);
380 peer = ath11k_peer_find_by_id(ab, ts->peer_id);
381 if (!peer || !peer->sta) {
382 ath11k_dbg(ab, ATH11K_DBG_DATA,
383 "dp_tx: failed to find the peer with peer_id %d\n",
384 ts->peer_id);
385 spin_unlock_bh(&ab->base_lock);
386 ieee80211_free_txskb(ar->hw, msdu);
387 return;
388 }
389 spin_unlock_bh(&ab->base_lock);
390
391 status.sta = peer->sta;
392 status.info = info;
393 status.skb = msdu;
394
395 ieee80211_tx_status_ext(ar->hw, &status);
396 }
397
398 static void
ath11k_dp_tx_process_htt_tx_complete(struct ath11k_base * ab,void * desc,u8 mac_id,u32 msdu_id,struct dp_tx_ring * tx_ring)399 ath11k_dp_tx_process_htt_tx_complete(struct ath11k_base *ab,
400 #if defined(__linux__)
401 void *desc, u8 mac_id,
402 #elif defined(__FreeBSD__)
403 u8 *desc, u8 mac_id,
404 #endif
405 u32 msdu_id, struct dp_tx_ring *tx_ring)
406 {
407 struct htt_tx_wbm_completion *status_desc;
408 struct ath11k_dp_htt_wbm_tx_status ts = {};
409 enum hal_wbm_htt_tx_comp_status wbm_status;
410
411 #if defined(__linux__)
412 status_desc = desc + HTT_TX_WBM_COMP_STATUS_OFFSET;
413 #elif defined(__FreeBSD__)
414 status_desc = (void *)(desc + HTT_TX_WBM_COMP_STATUS_OFFSET);
415 #endif
416
417 wbm_status = FIELD_GET(HTT_TX_WBM_COMP_INFO0_STATUS,
418 status_desc->info0);
419 switch (wbm_status) {
420 case HAL_WBM_REL_HTT_TX_COMP_STATUS_OK:
421 case HAL_WBM_REL_HTT_TX_COMP_STATUS_DROP:
422 case HAL_WBM_REL_HTT_TX_COMP_STATUS_TTL:
423 ts.acked = (wbm_status == HAL_WBM_REL_HTT_TX_COMP_STATUS_OK);
424 ts.msdu_id = msdu_id;
425 ts.ack_rssi = FIELD_GET(HTT_TX_WBM_COMP_INFO1_ACK_RSSI,
426 status_desc->info1);
427
428 if (FIELD_GET(HTT_TX_WBM_COMP_INFO2_VALID, status_desc->info2))
429 ts.peer_id = FIELD_GET(HTT_TX_WBM_COMP_INFO2_SW_PEER_ID,
430 status_desc->info2);
431 else
432 ts.peer_id = HTT_INVALID_PEER_ID;
433
434 ath11k_dp_tx_htt_tx_complete_buf(ab, tx_ring, &ts);
435
436 break;
437 case HAL_WBM_REL_HTT_TX_COMP_STATUS_REINJ:
438 case HAL_WBM_REL_HTT_TX_COMP_STATUS_INSPECT:
439 ath11k_dp_tx_free_txbuf(ab, mac_id, msdu_id, tx_ring);
440 break;
441 case HAL_WBM_REL_HTT_TX_COMP_STATUS_MEC_NOTIFY:
442 /* This event is to be handled only when the driver decides to
443 * use WDS offload functionality.
444 */
445 break;
446 default:
447 ath11k_warn(ab, "Unknown htt tx status %d\n", wbm_status);
448 break;
449 }
450 }
451
ath11k_dp_tx_cache_peer_stats(struct ath11k * ar,struct sk_buff * msdu,struct hal_tx_status * ts)452 static void ath11k_dp_tx_cache_peer_stats(struct ath11k *ar,
453 struct sk_buff *msdu,
454 struct hal_tx_status *ts)
455 {
456 struct ath11k_per_peer_tx_stats *peer_stats = &ar->cached_stats;
457
458 if (ts->try_cnt > 1) {
459 peer_stats->retry_pkts += ts->try_cnt - 1;
460 peer_stats->retry_bytes += (ts->try_cnt - 1) * msdu->len;
461
462 if (ts->status != HAL_WBM_TQM_REL_REASON_FRAME_ACKED) {
463 peer_stats->failed_pkts += 1;
464 peer_stats->failed_bytes += msdu->len;
465 }
466 }
467 }
468
ath11k_dp_tx_update_txcompl(struct ath11k * ar,struct hal_tx_status * ts)469 void ath11k_dp_tx_update_txcompl(struct ath11k *ar, struct hal_tx_status *ts)
470 {
471 struct ath11k_base *ab = ar->ab;
472 struct ath11k_per_peer_tx_stats *peer_stats = &ar->cached_stats;
473 enum hal_tx_rate_stats_pkt_type pkt_type;
474 enum hal_tx_rate_stats_sgi sgi;
475 enum hal_tx_rate_stats_bw bw;
476 struct ath11k_peer *peer;
477 struct ath11k_sta *arsta;
478 struct ieee80211_sta *sta;
479 u16 rate, ru_tones;
480 u8 mcs, rate_idx = 0, ofdma;
481 int ret;
482
483 spin_lock_bh(&ab->base_lock);
484 peer = ath11k_peer_find_by_id(ab, ts->peer_id);
485 if (!peer || !peer->sta) {
486 ath11k_dbg(ab, ATH11K_DBG_DP_TX,
487 "failed to find the peer by id %u\n", ts->peer_id);
488 goto err_out;
489 }
490
491 sta = peer->sta;
492 arsta = ath11k_sta_to_arsta(sta);
493
494 memset(&arsta->txrate, 0, sizeof(arsta->txrate));
495 pkt_type = FIELD_GET(HAL_TX_RATE_STATS_INFO0_PKT_TYPE,
496 ts->rate_stats);
497 mcs = FIELD_GET(HAL_TX_RATE_STATS_INFO0_MCS,
498 ts->rate_stats);
499 sgi = FIELD_GET(HAL_TX_RATE_STATS_INFO0_SGI,
500 ts->rate_stats);
501 bw = FIELD_GET(HAL_TX_RATE_STATS_INFO0_BW, ts->rate_stats);
502 ru_tones = FIELD_GET(HAL_TX_RATE_STATS_INFO0_TONES_IN_RU, ts->rate_stats);
503 ofdma = FIELD_GET(HAL_TX_RATE_STATS_INFO0_OFDMA_TX, ts->rate_stats);
504
505 /* This is to prefer choose the real NSS value arsta->last_txrate.nss,
506 * if it is invalid, then choose the NSS value while assoc.
507 */
508 if (arsta->last_txrate.nss)
509 arsta->txrate.nss = arsta->last_txrate.nss;
510 else
511 arsta->txrate.nss = arsta->peer_nss;
512
513 if (pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11A ||
514 pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11B) {
515 ret = ath11k_mac_hw_ratecode_to_legacy_rate(mcs,
516 pkt_type,
517 &rate_idx,
518 &rate);
519 if (ret < 0)
520 goto err_out;
521 arsta->txrate.legacy = rate;
522 } else if (pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11N) {
523 if (mcs > 7) {
524 ath11k_warn(ab, "Invalid HT mcs index %d\n", mcs);
525 goto err_out;
526 }
527
528 if (arsta->txrate.nss != 0)
529 arsta->txrate.mcs = mcs + 8 * (arsta->txrate.nss - 1);
530 arsta->txrate.flags = RATE_INFO_FLAGS_MCS;
531 if (sgi)
532 arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;
533 } else if (pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11AC) {
534 if (mcs > 9) {
535 ath11k_warn(ab, "Invalid VHT mcs index %d\n", mcs);
536 goto err_out;
537 }
538
539 arsta->txrate.mcs = mcs;
540 arsta->txrate.flags = RATE_INFO_FLAGS_VHT_MCS;
541 if (sgi)
542 arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;
543 } else if (pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11AX) {
544 if (mcs > 11) {
545 ath11k_warn(ab, "Invalid HE mcs index %d\n", mcs);
546 goto err_out;
547 }
548
549 arsta->txrate.mcs = mcs;
550 arsta->txrate.flags = RATE_INFO_FLAGS_HE_MCS;
551 arsta->txrate.he_gi = ath11k_mac_he_gi_to_nl80211_he_gi(sgi);
552 }
553
554 arsta->txrate.bw = ath11k_mac_bw_to_mac80211_bw(bw);
555 if (ofdma && pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11AX) {
556 arsta->txrate.bw = RATE_INFO_BW_HE_RU;
557 arsta->txrate.he_ru_alloc =
558 ath11k_mac_he_ru_tones_to_nl80211_he_ru_alloc(ru_tones);
559 }
560
561 if (ath11k_debugfs_is_extd_tx_stats_enabled(ar))
562 ath11k_debugfs_sta_add_tx_stats(arsta, peer_stats, rate_idx);
563
564 err_out:
565 spin_unlock_bh(&ab->base_lock);
566 }
567
ath11k_dp_tx_complete_msdu(struct ath11k * ar,struct sk_buff * msdu,struct hal_tx_status * ts)568 static void ath11k_dp_tx_complete_msdu(struct ath11k *ar,
569 struct sk_buff *msdu,
570 struct hal_tx_status *ts)
571 {
572 struct ieee80211_tx_status status = {};
573 struct ieee80211_rate_status status_rate = {};
574 struct ath11k_base *ab = ar->ab;
575 struct ieee80211_tx_info *info;
576 struct ath11k_skb_cb *skb_cb;
577 struct ath11k_peer *peer;
578 struct ath11k_sta *arsta;
579 struct rate_info rate;
580
581 if (WARN_ON_ONCE(ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_TQM)) {
582 /* Must not happen */
583 return;
584 }
585
586 skb_cb = ATH11K_SKB_CB(msdu);
587
588 dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
589
590 if (unlikely(!rcu_access_pointer(ab->pdevs_active[ar->pdev_idx]))) {
591 ieee80211_free_txskb(ar->hw, msdu);
592 return;
593 }
594
595 if (unlikely(!skb_cb->vif)) {
596 ieee80211_free_txskb(ar->hw, msdu);
597 return;
598 }
599
600 info = IEEE80211_SKB_CB(msdu);
601 memset(&info->status, 0, sizeof(info->status));
602
603 /* skip tx rate update from ieee80211_status*/
604 info->status.rates[0].idx = -1;
605
606 if (ts->status == HAL_WBM_TQM_REL_REASON_FRAME_ACKED &&
607 !(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
608 info->flags |= IEEE80211_TX_STAT_ACK;
609 info->status.ack_signal = ts->ack_rssi;
610
611 if (!test_bit(WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT,
612 ab->wmi_ab.svc_map))
613 info->status.ack_signal += ATH11K_DEFAULT_NOISE_FLOOR;
614
615 info->status.flags |= IEEE80211_TX_STATUS_ACK_SIGNAL_VALID;
616 }
617
618 if (ts->status == HAL_WBM_TQM_REL_REASON_CMD_REMOVE_TX &&
619 (info->flags & IEEE80211_TX_CTL_NO_ACK))
620 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
621
622 if (unlikely(ath11k_debugfs_is_extd_tx_stats_enabled(ar)) ||
623 ab->hw_params.single_pdev_only) {
624 if (ts->flags & HAL_TX_STATUS_FLAGS_FIRST_MSDU) {
625 if (ar->last_ppdu_id == 0) {
626 ar->last_ppdu_id = ts->ppdu_id;
627 } else if (ar->last_ppdu_id == ts->ppdu_id ||
628 ar->cached_ppdu_id == ar->last_ppdu_id) {
629 ar->cached_ppdu_id = ar->last_ppdu_id;
630 ar->cached_stats.is_ampdu = true;
631 ath11k_dp_tx_update_txcompl(ar, ts);
632 memset(&ar->cached_stats, 0,
633 sizeof(struct ath11k_per_peer_tx_stats));
634 } else {
635 ar->cached_stats.is_ampdu = false;
636 ath11k_dp_tx_update_txcompl(ar, ts);
637 memset(&ar->cached_stats, 0,
638 sizeof(struct ath11k_per_peer_tx_stats));
639 }
640 ar->last_ppdu_id = ts->ppdu_id;
641 }
642
643 ath11k_dp_tx_cache_peer_stats(ar, msdu, ts);
644 }
645
646 spin_lock_bh(&ab->base_lock);
647 peer = ath11k_peer_find_by_id(ab, ts->peer_id);
648 if (!peer || !peer->sta) {
649 ath11k_dbg(ab, ATH11K_DBG_DATA,
650 "dp_tx: failed to find the peer with peer_id %d\n",
651 ts->peer_id);
652 spin_unlock_bh(&ab->base_lock);
653 ieee80211_free_txskb(ar->hw, msdu);
654 return;
655 }
656 arsta = ath11k_sta_to_arsta(peer->sta);
657 status.sta = peer->sta;
658 status.skb = msdu;
659 status.info = info;
660 rate = arsta->last_txrate;
661
662 status_rate.rate_idx = rate;
663 status_rate.try_count = 1;
664
665 status.rates = &status_rate;
666 status.n_rates = 1;
667
668 spin_unlock_bh(&ab->base_lock);
669
670 ieee80211_tx_status_ext(ar->hw, &status);
671 }
672
ath11k_dp_tx_status_parse(struct ath11k_base * ab,struct hal_wbm_release_ring * desc,struct hal_tx_status * ts)673 static inline void ath11k_dp_tx_status_parse(struct ath11k_base *ab,
674 struct hal_wbm_release_ring *desc,
675 struct hal_tx_status *ts)
676 {
677 ts->buf_rel_source =
678 FIELD_GET(HAL_WBM_RELEASE_INFO0_REL_SRC_MODULE, desc->info0);
679 if (unlikely(ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_FW &&
680 ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_TQM))
681 return;
682
683 if (unlikely(ts->buf_rel_source == HAL_WBM_REL_SRC_MODULE_FW))
684 return;
685
686 ts->status = FIELD_GET(HAL_WBM_RELEASE_INFO0_TQM_RELEASE_REASON,
687 desc->info0);
688 ts->ppdu_id = FIELD_GET(HAL_WBM_RELEASE_INFO1_TQM_STATUS_NUMBER,
689 desc->info1);
690 ts->try_cnt = FIELD_GET(HAL_WBM_RELEASE_INFO1_TRANSMIT_COUNT,
691 desc->info1);
692 ts->ack_rssi = FIELD_GET(HAL_WBM_RELEASE_INFO2_ACK_FRAME_RSSI,
693 desc->info2);
694 if (desc->info2 & HAL_WBM_RELEASE_INFO2_FIRST_MSDU)
695 ts->flags |= HAL_TX_STATUS_FLAGS_FIRST_MSDU;
696 ts->peer_id = FIELD_GET(HAL_WBM_RELEASE_INFO3_PEER_ID, desc->info3);
697 ts->tid = FIELD_GET(HAL_WBM_RELEASE_INFO3_TID, desc->info3);
698 if (desc->rate_stats.info0 & HAL_TX_RATE_STATS_INFO0_VALID)
699 ts->rate_stats = desc->rate_stats.info0;
700 else
701 ts->rate_stats = 0;
702 }
703
ath11k_dp_tx_completion_handler(struct ath11k_base * ab,int ring_id)704 void ath11k_dp_tx_completion_handler(struct ath11k_base *ab, int ring_id)
705 {
706 struct ath11k *ar;
707 struct ath11k_dp *dp = &ab->dp;
708 int hal_ring_id = dp->tx_ring[ring_id].tcl_comp_ring.ring_id;
709 struct hal_srng *status_ring = &ab->hal.srng_list[hal_ring_id];
710 struct sk_buff *msdu;
711 struct hal_tx_status ts = {};
712 struct dp_tx_ring *tx_ring = &dp->tx_ring[ring_id];
713 u32 *desc;
714 u32 msdu_id;
715 u8 mac_id;
716
717 spin_lock_bh(&status_ring->lock);
718
719 ath11k_hal_srng_access_begin(ab, status_ring);
720
721 while ((ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head) !=
722 tx_ring->tx_status_tail) &&
723 (desc = ath11k_hal_srng_dst_get_next_entry(ab, status_ring))) {
724 memcpy(&tx_ring->tx_status[tx_ring->tx_status_head],
725 desc, sizeof(struct hal_wbm_release_ring));
726 tx_ring->tx_status_head =
727 ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head);
728 }
729
730 if (unlikely((ath11k_hal_srng_dst_peek(ab, status_ring) != NULL) &&
731 (ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head) ==
732 tx_ring->tx_status_tail))) {
733 /* TODO: Process pending tx_status messages when kfifo_is_full() */
734 ath11k_warn(ab, "Unable to process some of the tx_status ring desc because status_fifo is full\n");
735 }
736
737 ath11k_hal_srng_access_end(ab, status_ring);
738
739 spin_unlock_bh(&status_ring->lock);
740
741 while (ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_tail) != tx_ring->tx_status_head) {
742 struct hal_wbm_release_ring *tx_status;
743 u32 desc_id;
744
745 tx_ring->tx_status_tail =
746 ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_tail);
747 tx_status = &tx_ring->tx_status[tx_ring->tx_status_tail];
748 ath11k_dp_tx_status_parse(ab, tx_status, &ts);
749
750 desc_id = FIELD_GET(BUFFER_ADDR_INFO1_SW_COOKIE,
751 tx_status->buf_addr_info.info1);
752 mac_id = FIELD_GET(DP_TX_DESC_ID_MAC_ID, desc_id);
753 msdu_id = FIELD_GET(DP_TX_DESC_ID_MSDU_ID, desc_id);
754
755 if (unlikely(ts.buf_rel_source == HAL_WBM_REL_SRC_MODULE_FW)) {
756 ath11k_dp_tx_process_htt_tx_complete(ab,
757 (void *)tx_status,
758 mac_id, msdu_id,
759 tx_ring);
760 continue;
761 }
762
763 spin_lock(&tx_ring->tx_idr_lock);
764 msdu = idr_remove(&tx_ring->txbuf_idr, msdu_id);
765 if (unlikely(!msdu)) {
766 ath11k_warn(ab, "tx completion for unknown msdu_id %d\n",
767 msdu_id);
768 spin_unlock(&tx_ring->tx_idr_lock);
769 continue;
770 }
771
772 spin_unlock(&tx_ring->tx_idr_lock);
773
774 ar = ab->pdevs[mac_id].ar;
775
776 if (atomic_dec_and_test(&ar->dp.num_tx_pending))
777 wake_up(&ar->dp.tx_empty_waitq);
778
779 ath11k_dp_tx_complete_msdu(ar, msdu, &ts);
780 }
781 }
782
ath11k_dp_tx_send_reo_cmd(struct ath11k_base * ab,struct dp_rx_tid * rx_tid,enum hal_reo_cmd_type type,struct ath11k_hal_reo_cmd * cmd,void (* cb)(struct ath11k_dp *,void *,enum hal_reo_cmd_status))783 int ath11k_dp_tx_send_reo_cmd(struct ath11k_base *ab, struct dp_rx_tid *rx_tid,
784 enum hal_reo_cmd_type type,
785 struct ath11k_hal_reo_cmd *cmd,
786 void (*cb)(struct ath11k_dp *, void *,
787 enum hal_reo_cmd_status))
788 {
789 struct ath11k_dp *dp = &ab->dp;
790 struct dp_reo_cmd *dp_cmd;
791 struct hal_srng *cmd_ring;
792 int cmd_num;
793
794 if (test_bit(ATH11K_FLAG_CRASH_FLUSH, &ab->dev_flags))
795 return -ESHUTDOWN;
796
797 cmd_ring = &ab->hal.srng_list[dp->reo_cmd_ring.ring_id];
798 cmd_num = ath11k_hal_reo_cmd_send(ab, cmd_ring, type, cmd);
799
800 /* cmd_num should start from 1, during failure return the error code */
801 if (cmd_num < 0)
802 return cmd_num;
803
804 /* reo cmd ring descriptors has cmd_num starting from 1 */
805 if (cmd_num == 0)
806 return -EINVAL;
807
808 if (!cb)
809 return 0;
810
811 /* Can this be optimized so that we keep the pending command list only
812 * for tid delete command to free up the resource on the command status
813 * indication?
814 */
815 dp_cmd = kzalloc_obj(*dp_cmd, GFP_ATOMIC);
816
817 if (!dp_cmd)
818 return -ENOMEM;
819
820 memcpy(&dp_cmd->data, rx_tid, sizeof(struct dp_rx_tid));
821 dp_cmd->cmd_num = cmd_num;
822 dp_cmd->handler = cb;
823
824 spin_lock_bh(&dp->reo_cmd_lock);
825 list_add_tail(&dp_cmd->list, &dp->reo_cmd_list);
826 spin_unlock_bh(&dp->reo_cmd_lock);
827
828 return 0;
829 }
830
831 static int
ath11k_dp_tx_get_ring_id_type(struct ath11k_base * ab,int mac_id,u32 ring_id,enum hal_ring_type ring_type,enum htt_srng_ring_type * htt_ring_type,enum htt_srng_ring_id * htt_ring_id)832 ath11k_dp_tx_get_ring_id_type(struct ath11k_base *ab,
833 int mac_id, u32 ring_id,
834 enum hal_ring_type ring_type,
835 enum htt_srng_ring_type *htt_ring_type,
836 enum htt_srng_ring_id *htt_ring_id)
837 {
838 int lmac_ring_id_offset = 0;
839 int ret = 0;
840
841 switch (ring_type) {
842 case HAL_RXDMA_BUF:
843 lmac_ring_id_offset = mac_id * HAL_SRNG_RINGS_PER_LMAC;
844
845 /* for QCA6390, host fills rx buffer to fw and fw fills to
846 * rxbuf ring for each rxdma
847 */
848 if (!ab->hw_params.rx_mac_buf_ring) {
849 if (!(ring_id == (HAL_SRNG_RING_ID_WMAC1_SW2RXDMA0_BUF +
850 lmac_ring_id_offset) ||
851 ring_id == (HAL_SRNG_RING_ID_WMAC1_SW2RXDMA1_BUF +
852 lmac_ring_id_offset))) {
853 ret = -EINVAL;
854 }
855 *htt_ring_id = HTT_RXDMA_HOST_BUF_RING;
856 *htt_ring_type = HTT_SW_TO_HW_RING;
857 } else {
858 if (ring_id == HAL_SRNG_RING_ID_WMAC1_SW2RXDMA0_BUF) {
859 *htt_ring_id = HTT_HOST1_TO_FW_RXBUF_RING;
860 *htt_ring_type = HTT_SW_TO_SW_RING;
861 } else {
862 *htt_ring_id = HTT_RXDMA_HOST_BUF_RING;
863 *htt_ring_type = HTT_SW_TO_HW_RING;
864 }
865 }
866 break;
867 case HAL_RXDMA_DST:
868 *htt_ring_id = HTT_RXDMA_NON_MONITOR_DEST_RING;
869 *htt_ring_type = HTT_HW_TO_SW_RING;
870 break;
871 case HAL_RXDMA_MONITOR_BUF:
872 *htt_ring_id = HTT_RXDMA_MONITOR_BUF_RING;
873 *htt_ring_type = HTT_SW_TO_HW_RING;
874 break;
875 case HAL_RXDMA_MONITOR_STATUS:
876 *htt_ring_id = HTT_RXDMA_MONITOR_STATUS_RING;
877 *htt_ring_type = HTT_SW_TO_HW_RING;
878 break;
879 case HAL_RXDMA_MONITOR_DST:
880 *htt_ring_id = HTT_RXDMA_MONITOR_DEST_RING;
881 *htt_ring_type = HTT_HW_TO_SW_RING;
882 break;
883 case HAL_RXDMA_MONITOR_DESC:
884 *htt_ring_id = HTT_RXDMA_MONITOR_DESC_RING;
885 *htt_ring_type = HTT_SW_TO_HW_RING;
886 break;
887 default:
888 ath11k_warn(ab, "Unsupported ring type in DP :%d\n", ring_type);
889 ret = -EINVAL;
890 }
891 return ret;
892 }
893
ath11k_dp_tx_htt_srng_setup(struct ath11k_base * ab,u32 ring_id,int mac_id,enum hal_ring_type ring_type)894 int ath11k_dp_tx_htt_srng_setup(struct ath11k_base *ab, u32 ring_id,
895 int mac_id, enum hal_ring_type ring_type)
896 {
897 struct htt_srng_setup_cmd *cmd;
898 struct hal_srng *srng = &ab->hal.srng_list[ring_id];
899 struct hal_srng_params params;
900 struct sk_buff *skb;
901 u32 ring_entry_sz;
902 int len = sizeof(*cmd);
903 dma_addr_t hp_addr, tp_addr;
904 enum htt_srng_ring_type htt_ring_type;
905 enum htt_srng_ring_id htt_ring_id;
906 int ret;
907
908 skb = ath11k_htc_alloc_skb(ab, len);
909 if (!skb)
910 return -ENOMEM;
911
912 memset(¶ms, 0, sizeof(params));
913 ath11k_hal_srng_get_params(ab, srng, ¶ms);
914
915 hp_addr = ath11k_hal_srng_get_hp_addr(ab, srng);
916 tp_addr = ath11k_hal_srng_get_tp_addr(ab, srng);
917
918 ret = ath11k_dp_tx_get_ring_id_type(ab, mac_id, ring_id,
919 ring_type, &htt_ring_type,
920 &htt_ring_id);
921 if (ret)
922 goto err_free;
923
924 skb_put(skb, len);
925 cmd = (struct htt_srng_setup_cmd *)skb->data;
926 cmd->info0 = FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_MSG_TYPE,
927 HTT_H2T_MSG_TYPE_SRING_SETUP);
928 if (htt_ring_type == HTT_SW_TO_HW_RING ||
929 htt_ring_type == HTT_HW_TO_SW_RING)
930 cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_PDEV_ID,
931 DP_SW2HW_MACID(mac_id));
932 else
933 cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_PDEV_ID,
934 mac_id);
935 cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_RING_TYPE,
936 htt_ring_type);
937 cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_RING_ID, htt_ring_id);
938
939 cmd->ring_base_addr_lo = params.ring_base_paddr &
940 HAL_ADDR_LSB_REG_MASK;
941
942 cmd->ring_base_addr_hi = (u64)params.ring_base_paddr >>
943 HAL_ADDR_MSB_REG_SHIFT;
944
945 ret = ath11k_hal_srng_get_entrysize(ab, ring_type);
946 if (ret < 0)
947 goto err_free;
948
949 ring_entry_sz = ret;
950
951 ring_entry_sz >>= 2;
952 cmd->info1 = FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_ENTRY_SIZE,
953 ring_entry_sz);
954 cmd->info1 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_SIZE,
955 params.num_entries * ring_entry_sz);
956 cmd->info1 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_MSI_SWAP,
957 !!(params.flags & HAL_SRNG_FLAGS_MSI_SWAP));
958 cmd->info1 |= FIELD_PREP(
959 HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_TLV_SWAP,
960 !!(params.flags & HAL_SRNG_FLAGS_DATA_TLV_SWAP));
961 cmd->info1 |= FIELD_PREP(
962 HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_HOST_FW_SWAP,
963 !!(params.flags & HAL_SRNG_FLAGS_RING_PTR_SWAP));
964 if (htt_ring_type == HTT_SW_TO_HW_RING)
965 cmd->info1 |= HTT_SRNG_SETUP_CMD_INFO1_RING_LOOP_CNT_DIS;
966
967 cmd->ring_head_off32_remote_addr_lo = hp_addr & HAL_ADDR_LSB_REG_MASK;
968 cmd->ring_head_off32_remote_addr_hi = (u64)hp_addr >>
969 HAL_ADDR_MSB_REG_SHIFT;
970
971 cmd->ring_tail_off32_remote_addr_lo = tp_addr & HAL_ADDR_LSB_REG_MASK;
972 cmd->ring_tail_off32_remote_addr_hi = (u64)tp_addr >>
973 HAL_ADDR_MSB_REG_SHIFT;
974
975 cmd->ring_msi_addr_lo = lower_32_bits(params.msi_addr);
976 cmd->ring_msi_addr_hi = upper_32_bits(params.msi_addr);
977 cmd->msi_data = params.msi_data;
978
979 cmd->intr_info = FIELD_PREP(
980 HTT_SRNG_SETUP_CMD_INTR_INFO_BATCH_COUNTER_THRESH,
981 params.intr_batch_cntr_thres_entries * ring_entry_sz);
982 cmd->intr_info |= FIELD_PREP(
983 HTT_SRNG_SETUP_CMD_INTR_INFO_INTR_TIMER_THRESH,
984 params.intr_timer_thres_us >> 3);
985
986 cmd->info2 = 0;
987 if (params.flags & HAL_SRNG_FLAGS_LOW_THRESH_INTR_EN) {
988 cmd->info2 = FIELD_PREP(
989 HTT_SRNG_SETUP_CMD_INFO2_INTR_LOW_THRESH,
990 params.low_threshold);
991 }
992
993 ath11k_dbg(ab, ATH11K_DBG_DP_TX,
994 "htt srng setup msi_addr_lo 0x%x msi_addr_hi 0x%x msi_data 0x%x ring_id %d ring_type %d intr_info 0x%x flags 0x%x\n",
995 cmd->ring_msi_addr_lo, cmd->ring_msi_addr_hi,
996 cmd->msi_data, ring_id, ring_type, cmd->intr_info, cmd->info2);
997
998 ret = ath11k_htc_send(&ab->htc, ab->dp.eid, skb);
999 if (ret)
1000 goto err_free;
1001
1002 return 0;
1003
1004 err_free:
1005 dev_kfree_skb_any(skb);
1006
1007 return ret;
1008 }
1009
1010 #define HTT_TARGET_VERSION_TIMEOUT_HZ (3 * HZ)
1011
ath11k_dp_tx_htt_h2t_ver_req_msg(struct ath11k_base * ab)1012 int ath11k_dp_tx_htt_h2t_ver_req_msg(struct ath11k_base *ab)
1013 {
1014 struct ath11k_dp *dp = &ab->dp;
1015 struct sk_buff *skb;
1016 struct htt_ver_req_cmd *cmd;
1017 int len = sizeof(*cmd);
1018 int ret;
1019
1020 init_completion(&dp->htt_tgt_version_received);
1021
1022 skb = ath11k_htc_alloc_skb(ab, len);
1023 if (!skb)
1024 return -ENOMEM;
1025
1026 skb_put(skb, len);
1027 cmd = (struct htt_ver_req_cmd *)skb->data;
1028 cmd->ver_reg_info = FIELD_PREP(HTT_VER_REQ_INFO_MSG_ID,
1029 HTT_H2T_MSG_TYPE_VERSION_REQ);
1030
1031 ret = ath11k_htc_send(&ab->htc, dp->eid, skb);
1032 if (ret) {
1033 dev_kfree_skb_any(skb);
1034 return ret;
1035 }
1036
1037 ret = wait_for_completion_timeout(&dp->htt_tgt_version_received,
1038 HTT_TARGET_VERSION_TIMEOUT_HZ);
1039 if (ret == 0) {
1040 ath11k_warn(ab, "htt target version request timed out\n");
1041 return -ETIMEDOUT;
1042 }
1043
1044 if (dp->htt_tgt_ver_major != HTT_TARGET_VERSION_MAJOR) {
1045 ath11k_err(ab, "unsupported htt major version %d supported version is %d\n",
1046 dp->htt_tgt_ver_major, HTT_TARGET_VERSION_MAJOR);
1047 return -EOPNOTSUPP;
1048 }
1049
1050 return 0;
1051 }
1052
ath11k_dp_tx_htt_h2t_ppdu_stats_req(struct ath11k * ar,u32 mask)1053 int ath11k_dp_tx_htt_h2t_ppdu_stats_req(struct ath11k *ar, u32 mask)
1054 {
1055 struct ath11k_base *ab = ar->ab;
1056 struct ath11k_dp *dp = &ab->dp;
1057 struct sk_buff *skb;
1058 struct htt_ppdu_stats_cfg_cmd *cmd;
1059 int len = sizeof(*cmd);
1060 u8 pdev_mask;
1061 int ret;
1062 int i;
1063
1064 for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) {
1065 skb = ath11k_htc_alloc_skb(ab, len);
1066 if (!skb)
1067 return -ENOMEM;
1068
1069 skb_put(skb, len);
1070 cmd = (struct htt_ppdu_stats_cfg_cmd *)skb->data;
1071 cmd->msg = FIELD_PREP(HTT_PPDU_STATS_CFG_MSG_TYPE,
1072 HTT_H2T_MSG_TYPE_PPDU_STATS_CFG);
1073
1074 pdev_mask = 1 << (ar->pdev_idx + i);
1075 cmd->msg |= FIELD_PREP(HTT_PPDU_STATS_CFG_PDEV_ID, pdev_mask);
1076 cmd->msg |= FIELD_PREP(HTT_PPDU_STATS_CFG_TLV_TYPE_BITMASK, mask);
1077
1078 ret = ath11k_htc_send(&ab->htc, dp->eid, skb);
1079 if (ret) {
1080 dev_kfree_skb_any(skb);
1081 return ret;
1082 }
1083 }
1084
1085 return 0;
1086 }
1087
ath11k_dp_tx_htt_rx_filter_setup(struct ath11k_base * ab,u32 ring_id,int mac_id,enum hal_ring_type ring_type,int rx_buf_size,struct htt_rx_ring_tlv_filter * tlv_filter)1088 int ath11k_dp_tx_htt_rx_filter_setup(struct ath11k_base *ab, u32 ring_id,
1089 int mac_id, enum hal_ring_type ring_type,
1090 int rx_buf_size,
1091 struct htt_rx_ring_tlv_filter *tlv_filter)
1092 {
1093 struct htt_rx_ring_selection_cfg_cmd *cmd;
1094 struct hal_srng *srng = &ab->hal.srng_list[ring_id];
1095 struct hal_srng_params params;
1096 struct sk_buff *skb;
1097 int len = sizeof(*cmd);
1098 enum htt_srng_ring_type htt_ring_type;
1099 enum htt_srng_ring_id htt_ring_id;
1100 int ret;
1101
1102 skb = ath11k_htc_alloc_skb(ab, len);
1103 if (!skb)
1104 return -ENOMEM;
1105
1106 memset(¶ms, 0, sizeof(params));
1107 ath11k_hal_srng_get_params(ab, srng, ¶ms);
1108
1109 ret = ath11k_dp_tx_get_ring_id_type(ab, mac_id, ring_id,
1110 ring_type, &htt_ring_type,
1111 &htt_ring_id);
1112 if (ret)
1113 goto err_free;
1114
1115 skb_put(skb, len);
1116 cmd = (struct htt_rx_ring_selection_cfg_cmd *)skb->data;
1117 cmd->info0 = FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_MSG_TYPE,
1118 HTT_H2T_MSG_TYPE_RX_RING_SELECTION_CFG);
1119 if (htt_ring_type == HTT_SW_TO_HW_RING ||
1120 htt_ring_type == HTT_HW_TO_SW_RING)
1121 cmd->info0 |=
1122 FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PDEV_ID,
1123 DP_SW2HW_MACID(mac_id));
1124 else
1125 cmd->info0 |=
1126 FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PDEV_ID,
1127 mac_id);
1128 cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_RING_ID,
1129 htt_ring_id);
1130 cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_SS,
1131 !!(params.flags & HAL_SRNG_FLAGS_MSI_SWAP));
1132 cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PS,
1133 !!(params.flags & HAL_SRNG_FLAGS_DATA_TLV_SWAP));
1134
1135 cmd->info1 = FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO1_BUF_SIZE,
1136 rx_buf_size);
1137 cmd->pkt_type_en_flags0 = tlv_filter->pkt_filter_flags0;
1138 cmd->pkt_type_en_flags1 = tlv_filter->pkt_filter_flags1;
1139 cmd->pkt_type_en_flags2 = tlv_filter->pkt_filter_flags2;
1140 cmd->pkt_type_en_flags3 = tlv_filter->pkt_filter_flags3;
1141 cmd->rx_filter_tlv = tlv_filter->rx_filter;
1142
1143 ret = ath11k_htc_send(&ab->htc, ab->dp.eid, skb);
1144 if (ret)
1145 goto err_free;
1146
1147 return 0;
1148
1149 err_free:
1150 dev_kfree_skb_any(skb);
1151
1152 return ret;
1153 }
1154
1155 int
ath11k_dp_tx_htt_h2t_ext_stats_req(struct ath11k * ar,u8 type,struct htt_ext_stats_cfg_params * cfg_params,u64 cookie)1156 ath11k_dp_tx_htt_h2t_ext_stats_req(struct ath11k *ar, u8 type,
1157 struct htt_ext_stats_cfg_params *cfg_params,
1158 u64 cookie)
1159 {
1160 struct ath11k_base *ab = ar->ab;
1161 struct ath11k_dp *dp = &ab->dp;
1162 struct sk_buff *skb;
1163 struct htt_ext_stats_cfg_cmd *cmd;
1164 u32 pdev_id;
1165 int len = sizeof(*cmd);
1166 int ret;
1167
1168 skb = ath11k_htc_alloc_skb(ab, len);
1169 if (!skb)
1170 return -ENOMEM;
1171
1172 skb_put(skb, len);
1173
1174 cmd = (struct htt_ext_stats_cfg_cmd *)skb->data;
1175 memset(cmd, 0, sizeof(*cmd));
1176 cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_EXT_STATS_CFG;
1177
1178 if (ab->hw_params.single_pdev_only)
1179 pdev_id = ath11k_mac_get_target_pdev_id(ar);
1180 else
1181 pdev_id = ar->pdev->pdev_id;
1182
1183 cmd->hdr.pdev_mask = 1 << pdev_id;
1184
1185 cmd->hdr.stats_type = type;
1186 cmd->cfg_param0 = cfg_params->cfg0;
1187 cmd->cfg_param1 = cfg_params->cfg1;
1188 cmd->cfg_param2 = cfg_params->cfg2;
1189 cmd->cfg_param3 = cfg_params->cfg3;
1190 cmd->cookie_lsb = lower_32_bits(cookie);
1191 cmd->cookie_msb = upper_32_bits(cookie);
1192
1193 ret = ath11k_htc_send(&ab->htc, dp->eid, skb);
1194 if (ret) {
1195 ath11k_warn(ab, "failed to send htt type stats request: %d",
1196 ret);
1197 dev_kfree_skb_any(skb);
1198 return ret;
1199 }
1200
1201 return 0;
1202 }
1203
ath11k_dp_tx_htt_monitor_mode_ring_config(struct ath11k * ar,bool reset)1204 int ath11k_dp_tx_htt_monitor_mode_ring_config(struct ath11k *ar, bool reset)
1205 {
1206 struct ath11k_pdev_dp *dp = &ar->dp;
1207 struct ath11k_base *ab = ar->ab;
1208 struct htt_rx_ring_tlv_filter tlv_filter = {};
1209 int ret = 0, ring_id = 0, i;
1210
1211 if (ab->hw_params.full_monitor_mode) {
1212 ret = ath11k_dp_tx_htt_rx_full_mon_setup(ab,
1213 dp->mac_id, !reset);
1214 if (ret < 0) {
1215 ath11k_err(ab, "failed to setup full monitor %d\n", ret);
1216 return ret;
1217 }
1218 }
1219
1220 ring_id = dp->rxdma_mon_buf_ring.refill_buf_ring.ring_id;
1221
1222 if (!reset) {
1223 tlv_filter.rx_filter = HTT_RX_MON_FILTER_TLV_FLAGS_MON_BUF_RING;
1224 tlv_filter.pkt_filter_flags0 =
1225 HTT_RX_MON_FP_MGMT_FILTER_FLAGS0 |
1226 HTT_RX_MON_MO_MGMT_FILTER_FLAGS0;
1227 tlv_filter.pkt_filter_flags1 =
1228 HTT_RX_MON_FP_MGMT_FILTER_FLAGS1 |
1229 HTT_RX_MON_MO_MGMT_FILTER_FLAGS1;
1230 tlv_filter.pkt_filter_flags2 =
1231 HTT_RX_MON_FP_CTRL_FILTER_FLASG2 |
1232 HTT_RX_MON_MO_CTRL_FILTER_FLASG2;
1233 tlv_filter.pkt_filter_flags3 =
1234 HTT_RX_MON_FP_CTRL_FILTER_FLASG3 |
1235 HTT_RX_MON_MO_CTRL_FILTER_FLASG3 |
1236 HTT_RX_MON_FP_DATA_FILTER_FLASG3 |
1237 HTT_RX_MON_MO_DATA_FILTER_FLASG3;
1238 }
1239
1240 if (ab->hw_params.rxdma1_enable) {
1241 ret = ath11k_dp_tx_htt_rx_filter_setup(ar->ab, ring_id, dp->mac_id,
1242 HAL_RXDMA_MONITOR_BUF,
1243 DP_RXDMA_REFILL_RING_SIZE,
1244 &tlv_filter);
1245 } else if (!reset) {
1246 /* set in monitor mode only */
1247 for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) {
1248 ring_id = dp->rx_mac_buf_ring[i].ring_id;
1249 ret = ath11k_dp_tx_htt_rx_filter_setup(ar->ab, ring_id,
1250 dp->mac_id + i,
1251 HAL_RXDMA_BUF,
1252 1024,
1253 &tlv_filter);
1254 }
1255 }
1256
1257 if (ret)
1258 return ret;
1259
1260 for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) {
1261 ring_id = dp->rx_mon_status_refill_ring[i].refill_buf_ring.ring_id;
1262 if (!reset) {
1263 tlv_filter.rx_filter =
1264 HTT_RX_MON_FILTER_TLV_FLAGS_MON_STATUS_RING;
1265 } else {
1266 tlv_filter = ath11k_mac_mon_status_filter_default;
1267
1268 if (ath11k_debugfs_is_extd_rx_stats_enabled(ar))
1269 tlv_filter.rx_filter = ath11k_debugfs_rx_filter(ar);
1270 }
1271
1272 ret = ath11k_dp_tx_htt_rx_filter_setup(ab, ring_id,
1273 dp->mac_id + i,
1274 HAL_RXDMA_MONITOR_STATUS,
1275 DP_RXDMA_REFILL_RING_SIZE,
1276 &tlv_filter);
1277 }
1278
1279 if (!ar->ab->hw_params.rxdma1_enable)
1280 mod_timer(&ar->ab->mon_reap_timer, jiffies +
1281 msecs_to_jiffies(ATH11K_MON_TIMER_INTERVAL));
1282
1283 return ret;
1284 }
1285
ath11k_dp_tx_htt_rx_full_mon_setup(struct ath11k_base * ab,int mac_id,bool config)1286 int ath11k_dp_tx_htt_rx_full_mon_setup(struct ath11k_base *ab, int mac_id,
1287 bool config)
1288 {
1289 struct htt_rx_full_monitor_mode_cfg_cmd *cmd;
1290 struct sk_buff *skb;
1291 int ret, len = sizeof(*cmd);
1292
1293 skb = ath11k_htc_alloc_skb(ab, len);
1294 if (!skb)
1295 return -ENOMEM;
1296
1297 skb_put(skb, len);
1298 cmd = (struct htt_rx_full_monitor_mode_cfg_cmd *)skb->data;
1299 memset(cmd, 0, sizeof(*cmd));
1300 cmd->info0 = FIELD_PREP(HTT_RX_FULL_MON_MODE_CFG_CMD_INFO0_MSG_TYPE,
1301 HTT_H2T_MSG_TYPE_RX_FULL_MONITOR_MODE);
1302
1303 cmd->info0 |= FIELD_PREP(HTT_RX_FULL_MON_MODE_CFG_CMD_INFO0_PDEV_ID, mac_id);
1304
1305 cmd->cfg = HTT_RX_FULL_MON_MODE_CFG_CMD_CFG_ENABLE |
1306 FIELD_PREP(HTT_RX_FULL_MON_MODE_CFG_CMD_CFG_RELEASE_RING,
1307 HTT_RX_MON_RING_SW);
1308 if (config) {
1309 cmd->cfg |= HTT_RX_FULL_MON_MODE_CFG_CMD_CFG_ZERO_MPDUS_END |
1310 HTT_RX_FULL_MON_MODE_CFG_CMD_CFG_NON_ZERO_MPDUS_END;
1311 }
1312
1313 ret = ath11k_htc_send(&ab->htc, ab->dp.eid, skb);
1314 if (ret)
1315 goto err_free;
1316
1317 return 0;
1318
1319 err_free:
1320 dev_kfree_skb_any(skb);
1321
1322 return ret;
1323 }
1324