1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * comedi/drivers/pcl812.c
4 *
5 * Author: Michal Dobes <dobes@tesnet.cz>
6 *
7 * hardware driver for Advantech cards
8 * card: PCL-812, PCL-812PG, PCL-813, PCL-813B
9 * driver: pcl812, pcl812pg, pcl813, pcl813b
10 * and for ADlink cards
11 * card: ACL-8112DG, ACL-8112HG, ACL-8112PG, ACL-8113, ACL-8216
12 * driver: acl8112dg, acl8112hg, acl8112pg, acl8113, acl8216
13 * and for ICP DAS cards
14 * card: ISO-813, A-821PGH, A-821PGL, A-821PGL-NDA, A-822PGH, A-822PGL,
15 * driver: iso813, a821pgh, a-821pgl, a-821pglnda, a822pgh, a822pgl,
16 * card: A-823PGH, A-823PGL, A-826PG
17 * driver: a823pgh, a823pgl, a826pg
18 */
19
20 /*
21 * Driver: pcl812
22 * Description: Advantech PCL-812/PG, PCL-813/B,
23 * ADLink ACL-8112DG/HG/PG, ACL-8113, ACL-8216,
24 * ICP DAS A-821PGH/PGL/PGL-NDA, A-822PGH/PGL, A-823PGH/PGL, A-826PG,
25 * ICP DAS ISO-813
26 * Author: Michal Dobes <dobes@tesnet.cz>
27 * Devices: [Advantech] PCL-812 (pcl812), PCL-812PG (pcl812pg),
28 * PCL-813 (pcl813), PCL-813B (pcl813b), [ADLink] ACL-8112DG (acl8112dg),
29 * ACL-8112HG (acl8112hg), ACL-8113 (acl-8113), ACL-8216 (acl8216),
30 * [ICP] ISO-813 (iso813), A-821PGH (a821pgh), A-821PGL (a821pgl),
31 * A-821PGL-NDA (a821pclnda), A-822PGH (a822pgh), A-822PGL (a822pgl),
32 * A-823PGH (a823pgh), A-823PGL (a823pgl), A-826PG (a826pg)
33 * Updated: Mon, 06 Aug 2007 12:03:15 +0100
34 * Status: works (I hope. My board fire up under my hands
35 * and I cann't test all features.)
36 *
37 * This driver supports insn and cmd interfaces. Some boards support only insn
38 * because their hardware don't allow more (PCL-813/B, ACL-8113, ISO-813).
39 * Data transfer over DMA is supported only when you measure only one
40 * channel, this is too hardware limitation of these boards.
41 *
42 * Options for PCL-812:
43 * [0] - IO Base
44 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7; 10, 11, 12, 14, 15)
45 * [2] - DMA (0=disable, 1, 3)
46 * [3] - 0=trigger source is internal 8253 with 2MHz clock
47 * 1=trigger source is external
48 * [4] - 0=A/D input range is +/-10V
49 * 1=A/D input range is +/-5V
50 * 2=A/D input range is +/-2.5V
51 * 3=A/D input range is +/-1.25V
52 * 4=A/D input range is +/-0.625V
53 * 5=A/D input range is +/-0.3125V
54 * [5] - 0=D/A outputs 0-5V (internal reference -5V)
55 * 1=D/A outputs 0-10V (internal reference -10V)
56 * 2=D/A outputs unknown (external reference)
57 *
58 * Options for PCL-812PG, ACL-8112PG:
59 * [0] - IO Base
60 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7; 10, 11, 12, 14, 15)
61 * [2] - DMA (0=disable, 1, 3)
62 * [3] - 0=trigger source is internal 8253 with 2MHz clock
63 * 1=trigger source is external
64 * [4] - 0=A/D have max +/-5V input
65 * 1=A/D have max +/-10V input
66 * [5] - 0=D/A outputs 0-5V (internal reference -5V)
67 * 1=D/A outputs 0-10V (internal reference -10V)
68 * 2=D/A outputs unknown (external reference)
69 *
70 * Options for ACL-8112DG/HG, A-822PGL/PGH, A-823PGL/PGH, ACL-8216, A-826PG:
71 * [0] - IO Base
72 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7; 10, 11, 12, 14, 15)
73 * [2] - DMA (0=disable, 1, 3)
74 * [3] - 0=trigger source is internal 8253 with 2MHz clock
75 * 1=trigger source is external
76 * [4] - 0=A/D channels are S.E.
77 * 1=A/D channels are DIFF
78 * [5] - 0=D/A outputs 0-5V (internal reference -5V)
79 * 1=D/A outputs 0-10V (internal reference -10V)
80 * 2=D/A outputs unknown (external reference)
81 *
82 * Options for A-821PGL/PGH:
83 * [0] - IO Base
84 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7)
85 * [2] - 0=A/D channels are S.E.
86 * 1=A/D channels are DIFF
87 * [3] - 0=D/A output 0-5V (internal reference -5V)
88 * 1=D/A output 0-10V (internal reference -10V)
89 *
90 * Options for A-821PGL-NDA:
91 * [0] - IO Base
92 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7)
93 * [2] - 0=A/D channels are S.E.
94 * 1=A/D channels are DIFF
95 *
96 * Options for PCL-813:
97 * [0] - IO Base
98 *
99 * Options for PCL-813B:
100 * [0] - IO Base
101 * [1] - 0= bipolar inputs
102 * 1= unipolar inputs
103 *
104 * Options for ACL-8113, ISO-813:
105 * [0] - IO Base
106 * [1] - 0= 10V bipolar inputs
107 * 1= 10V unipolar inputs
108 * 2= 20V bipolar inputs
109 * 3= 20V unipolar inputs
110 */
111
112 #include <linux/module.h>
113 #include <linux/interrupt.h>
114 #include <linux/gfp.h>
115 #include <linux/delay.h>
116 #include <linux/io.h>
117 #include <linux/comedi/comedidev.h>
118 #include <linux/comedi/comedi_8254.h>
119 #include <linux/comedi/comedi_isadma.h>
120
121 /*
122 * Register I/O map
123 */
124 #define PCL812_TIMER_BASE 0x00
125 #define PCL812_AI_LSB_REG 0x04
126 #define PCL812_AI_MSB_REG 0x05
127 #define PCL812_AI_MSB_DRDY BIT(4)
128 #define PCL812_AO_LSB_REG(x) (0x04 + ((x) * 2))
129 #define PCL812_AO_MSB_REG(x) (0x05 + ((x) * 2))
130 #define PCL812_DI_LSB_REG 0x06
131 #define PCL812_DI_MSB_REG 0x07
132 #define PCL812_STATUS_REG 0x08
133 #define PCL812_STATUS_DRDY BIT(5)
134 #define PCL812_RANGE_REG 0x09
135 #define PCL812_MUX_REG 0x0a
136 #define PCL812_MUX_CHAN(x) ((x) << 0)
137 #define PCL812_MUX_CS0 BIT(4)
138 #define PCL812_MUX_CS1 BIT(5)
139 #define PCL812_CTRL_REG 0x0b
140 #define PCL812_CTRL_TRIG(x) (((x) & 0x7) << 0)
141 #define PCL812_CTRL_DISABLE_TRIG PCL812_CTRL_TRIG(0)
142 #define PCL812_CTRL_SOFT_TRIG PCL812_CTRL_TRIG(1)
143 #define PCL812_CTRL_PACER_DMA_TRIG PCL812_CTRL_TRIG(2)
144 #define PCL812_CTRL_PACER_EOC_TRIG PCL812_CTRL_TRIG(6)
145 #define PCL812_SOFTTRIG_REG 0x0c
146 #define PCL812_DO_LSB_REG 0x0d
147 #define PCL812_DO_MSB_REG 0x0e
148
149 #define MAX_CHANLIST_LEN 256 /* length of scan list */
150
151 static const struct comedi_lrange range_pcl812pg_ai = {
152 5, {
153 BIP_RANGE(5),
154 BIP_RANGE(2.5),
155 BIP_RANGE(1.25),
156 BIP_RANGE(0.625),
157 BIP_RANGE(0.3125)
158 }
159 };
160
161 static const struct comedi_lrange range_pcl812pg2_ai = {
162 5, {
163 BIP_RANGE(10),
164 BIP_RANGE(5),
165 BIP_RANGE(2.5),
166 BIP_RANGE(1.25),
167 BIP_RANGE(0.625)
168 }
169 };
170
171 static const struct comedi_lrange range812_bipolar1_25 = {
172 1, {
173 BIP_RANGE(1.25)
174 }
175 };
176
177 static const struct comedi_lrange range812_bipolar0_625 = {
178 1, {
179 BIP_RANGE(0.625)
180 }
181 };
182
183 static const struct comedi_lrange range812_bipolar0_3125 = {
184 1, {
185 BIP_RANGE(0.3125)
186 }
187 };
188
189 static const struct comedi_lrange range_pcl813b_ai = {
190 4, {
191 BIP_RANGE(5),
192 BIP_RANGE(2.5),
193 BIP_RANGE(1.25),
194 BIP_RANGE(0.625)
195 }
196 };
197
198 static const struct comedi_lrange range_pcl813b2_ai = {
199 4, {
200 UNI_RANGE(10),
201 UNI_RANGE(5),
202 UNI_RANGE(2.5),
203 UNI_RANGE(1.25)
204 }
205 };
206
207 static const struct comedi_lrange range_iso813_1_ai = {
208 5, {
209 BIP_RANGE(5),
210 BIP_RANGE(2.5),
211 BIP_RANGE(1.25),
212 BIP_RANGE(0.625),
213 BIP_RANGE(0.3125)
214 }
215 };
216
217 static const struct comedi_lrange range_iso813_1_2_ai = {
218 5, {
219 UNI_RANGE(10),
220 UNI_RANGE(5),
221 UNI_RANGE(2.5),
222 UNI_RANGE(1.25),
223 UNI_RANGE(0.625)
224 }
225 };
226
227 static const struct comedi_lrange range_iso813_2_ai = {
228 4, {
229 BIP_RANGE(5),
230 BIP_RANGE(2.5),
231 BIP_RANGE(1.25),
232 BIP_RANGE(0.625)
233 }
234 };
235
236 static const struct comedi_lrange range_iso813_2_2_ai = {
237 4, {
238 UNI_RANGE(10),
239 UNI_RANGE(5),
240 UNI_RANGE(2.5),
241 UNI_RANGE(1.25)
242 }
243 };
244
245 static const struct comedi_lrange range_acl8113_1_ai = {
246 4, {
247 BIP_RANGE(5),
248 BIP_RANGE(2.5),
249 BIP_RANGE(1.25),
250 BIP_RANGE(0.625)
251 }
252 };
253
254 static const struct comedi_lrange range_acl8113_1_2_ai = {
255 4, {
256 UNI_RANGE(10),
257 UNI_RANGE(5),
258 UNI_RANGE(2.5),
259 UNI_RANGE(1.25)
260 }
261 };
262
263 static const struct comedi_lrange range_acl8113_2_ai = {
264 3, {
265 BIP_RANGE(5),
266 BIP_RANGE(2.5),
267 BIP_RANGE(1.25)
268 }
269 };
270
271 static const struct comedi_lrange range_acl8113_2_2_ai = {
272 3, {
273 UNI_RANGE(10),
274 UNI_RANGE(5),
275 UNI_RANGE(2.5)
276 }
277 };
278
279 static const struct comedi_lrange range_acl8112dg_ai = {
280 9, {
281 BIP_RANGE(5),
282 BIP_RANGE(2.5),
283 BIP_RANGE(1.25),
284 BIP_RANGE(0.625),
285 UNI_RANGE(10),
286 UNI_RANGE(5),
287 UNI_RANGE(2.5),
288 UNI_RANGE(1.25),
289 BIP_RANGE(10)
290 }
291 };
292
293 static const struct comedi_lrange range_acl8112hg_ai = {
294 12, {
295 BIP_RANGE(5),
296 BIP_RANGE(0.5),
297 BIP_RANGE(0.05),
298 BIP_RANGE(0.005),
299 UNI_RANGE(10),
300 UNI_RANGE(1),
301 UNI_RANGE(0.1),
302 UNI_RANGE(0.01),
303 BIP_RANGE(10),
304 BIP_RANGE(1),
305 BIP_RANGE(0.1),
306 BIP_RANGE(0.01)
307 }
308 };
309
310 static const struct comedi_lrange range_a821pgh_ai = {
311 4, {
312 BIP_RANGE(5),
313 BIP_RANGE(0.5),
314 BIP_RANGE(0.05),
315 BIP_RANGE(0.005)
316 }
317 };
318
319 enum pcl812_boardtype {
320 BOARD_PCL812PG = 0, /* and ACL-8112PG */
321 BOARD_PCL813B = 1,
322 BOARD_PCL812 = 2,
323 BOARD_PCL813 = 3,
324 BOARD_ISO813 = 5,
325 BOARD_ACL8113 = 6,
326 BOARD_ACL8112 = 7, /* ACL-8112DG/HG, A-822PGL/PGH, A-823PGL/PGH */
327 BOARD_ACL8216 = 8, /* and ICP DAS A-826PG */
328 BOARD_A821 = 9, /* PGH, PGL, PGL/NDA versions */
329 };
330
331 struct pcl812_board {
332 const char *name;
333 enum pcl812_boardtype board_type;
334 unsigned short min_io_start;
335 int n_aichan;
336 int n_aochan;
337 unsigned int ai_ns_min;
338 const struct comedi_lrange *rangelist_ai;
339 unsigned int irq_bits;
340 unsigned int has_dma:1;
341 unsigned int has_16bit_ai:1;
342 unsigned int has_mpc508_mux:1;
343 unsigned int has_dio:1;
344 };
345
346 static const struct pcl812_board boardtypes[] = {
347 {
348 .name = "pcl812",
349 .board_type = BOARD_PCL812,
350 .min_io_start = 0,
351 .n_aichan = 16,
352 .n_aochan = 2,
353 .ai_ns_min = 33000,
354 .rangelist_ai = &range_bipolar10,
355 .irq_bits = 0xdcfc,
356 .has_dma = 1,
357 .has_dio = 1,
358 }, {
359 .name = "pcl812pg",
360 .min_io_start = 0,
361 .board_type = BOARD_PCL812PG,
362 .n_aichan = 16,
363 .n_aochan = 2,
364 .ai_ns_min = 33000,
365 .rangelist_ai = &range_pcl812pg_ai,
366 .irq_bits = 0xdcfc,
367 .has_dma = 1,
368 .has_dio = 1,
369 }, {
370 .name = "acl8112pg",
371 .board_type = BOARD_PCL812PG,
372 .min_io_start = 0x200,
373 .n_aichan = 16,
374 .n_aochan = 2,
375 .ai_ns_min = 10000,
376 .rangelist_ai = &range_pcl812pg_ai,
377 .irq_bits = 0xdcfc,
378 .has_dma = 1,
379 .has_dio = 1,
380 }, {
381 .name = "acl8112dg",
382 .board_type = BOARD_ACL8112,
383 .min_io_start = 0x200,
384 .n_aichan = 16, /* 8 differential */
385 .n_aochan = 2,
386 .ai_ns_min = 10000,
387 .rangelist_ai = &range_acl8112dg_ai,
388 .irq_bits = 0xdcfc,
389 .has_dma = 1,
390 .has_mpc508_mux = 1,
391 .has_dio = 1,
392 }, {
393 .name = "acl8112hg",
394 .board_type = BOARD_ACL8112,
395 .min_io_start = 0x200,
396 .n_aichan = 16, /* 8 differential */
397 .n_aochan = 2,
398 .ai_ns_min = 10000,
399 .rangelist_ai = &range_acl8112hg_ai,
400 .irq_bits = 0xdcfc,
401 .has_dma = 1,
402 .has_mpc508_mux = 1,
403 .has_dio = 1,
404 }, {
405 .name = "a821pgl",
406 .board_type = BOARD_A821,
407 .min_io_start = 0,
408 .n_aichan = 16, /* 8 differential */
409 .n_aochan = 1,
410 .ai_ns_min = 10000,
411 .rangelist_ai = &range_pcl813b_ai,
412 .irq_bits = 0x000c,
413 .has_dio = 1,
414 }, {
415 .name = "a821pglnda",
416 .board_type = BOARD_A821,
417 .min_io_start = 0,
418 .n_aichan = 16, /* 8 differential */
419 .ai_ns_min = 10000,
420 .rangelist_ai = &range_pcl813b_ai,
421 .irq_bits = 0x000c,
422 }, {
423 .name = "a821pgh",
424 .board_type = BOARD_A821,
425 .min_io_start = 0,
426 .n_aichan = 16, /* 8 differential */
427 .n_aochan = 1,
428 .ai_ns_min = 10000,
429 .rangelist_ai = &range_a821pgh_ai,
430 .irq_bits = 0x000c,
431 .has_dio = 1,
432 }, {
433 .name = "a822pgl",
434 .board_type = BOARD_ACL8112,
435 .min_io_start = 0,
436 .n_aichan = 16, /* 8 differential */
437 .n_aochan = 2,
438 .ai_ns_min = 10000,
439 .rangelist_ai = &range_acl8112dg_ai,
440 .irq_bits = 0xdcfc,
441 .has_dma = 1,
442 .has_dio = 1,
443 }, {
444 .name = "a822pgh",
445 .board_type = BOARD_ACL8112,
446 .min_io_start = 0,
447 .n_aichan = 16, /* 8 differential */
448 .n_aochan = 2,
449 .ai_ns_min = 10000,
450 .rangelist_ai = &range_acl8112hg_ai,
451 .irq_bits = 0xdcfc,
452 .has_dma = 1,
453 .has_dio = 1,
454 }, {
455 .name = "a823pgl",
456 .board_type = BOARD_ACL8112,
457 .min_io_start = 0,
458 .n_aichan = 16, /* 8 differential */
459 .n_aochan = 2,
460 .ai_ns_min = 8000,
461 .rangelist_ai = &range_acl8112dg_ai,
462 .irq_bits = 0xdcfc,
463 .has_dma = 1,
464 .has_dio = 1,
465 }, {
466 .name = "a823pgh",
467 .board_type = BOARD_ACL8112,
468 .min_io_start = 0,
469 .n_aichan = 16, /* 8 differential */
470 .n_aochan = 2,
471 .ai_ns_min = 8000,
472 .rangelist_ai = &range_acl8112hg_ai,
473 .irq_bits = 0xdcfc,
474 .has_dma = 1,
475 .has_dio = 1,
476 }, {
477 .name = "pcl813",
478 .board_type = BOARD_PCL813,
479 .min_io_start = 0,
480 .n_aichan = 32,
481 .rangelist_ai = &range_pcl813b_ai,
482 }, {
483 .name = "pcl813b",
484 .board_type = BOARD_PCL813B,
485 .min_io_start = 0,
486 .n_aichan = 32,
487 .rangelist_ai = &range_pcl813b_ai,
488 }, {
489 .name = "acl8113",
490 .board_type = BOARD_ACL8113,
491 .min_io_start = 0x200,
492 .n_aichan = 32,
493 .rangelist_ai = &range_acl8113_1_ai,
494 }, {
495 .name = "iso813",
496 .board_type = BOARD_ISO813,
497 .min_io_start = 0,
498 .n_aichan = 32,
499 .rangelist_ai = &range_iso813_1_ai,
500 }, {
501 .name = "acl8216",
502 .board_type = BOARD_ACL8216,
503 .min_io_start = 0x200,
504 .n_aichan = 16, /* 8 differential */
505 .n_aochan = 2,
506 .ai_ns_min = 10000,
507 .rangelist_ai = &range_pcl813b2_ai,
508 .irq_bits = 0xdcfc,
509 .has_dma = 1,
510 .has_16bit_ai = 1,
511 .has_mpc508_mux = 1,
512 .has_dio = 1,
513 }, {
514 .name = "a826pg",
515 .board_type = BOARD_ACL8216,
516 .min_io_start = 0,
517 .n_aichan = 16, /* 8 differential */
518 .n_aochan = 2,
519 .ai_ns_min = 10000,
520 .rangelist_ai = &range_pcl813b2_ai,
521 .irq_bits = 0xdcfc,
522 .has_dma = 1,
523 .has_16bit_ai = 1,
524 .has_dio = 1,
525 },
526 };
527
528 struct pcl812_private {
529 struct comedi_isadma *dma;
530 unsigned char range_correction; /* =1 we must add 1 to range number */
531 unsigned int last_ai_chanspec;
532 unsigned char mode_reg_int; /* stored INT number for some cards */
533 unsigned int ai_poll_ptr; /* how many samples transfer poll */
534 unsigned int max_812_ai_mode0_rangewait; /* settling time for gain */
535 unsigned int use_diff:1;
536 unsigned int use_mpc508:1;
537 unsigned int use_ext_trg:1;
538 unsigned int ai_dma:1;
539 unsigned int ai_eos:1;
540 };
541
pcl812_ai_setup_dma(struct comedi_device * dev,struct comedi_subdevice * s,unsigned int unread_samples)542 static void pcl812_ai_setup_dma(struct comedi_device *dev,
543 struct comedi_subdevice *s,
544 unsigned int unread_samples)
545 {
546 struct pcl812_private *devpriv = dev->private;
547 struct comedi_isadma *dma = devpriv->dma;
548 struct comedi_isadma_desc *desc = &dma->desc[dma->cur_dma];
549 unsigned int bytes;
550 unsigned int max_samples;
551 unsigned int nsamples;
552
553 comedi_isadma_disable(dma->chan);
554
555 /* if using EOS, adapt DMA buffer to one scan */
556 bytes = devpriv->ai_eos ? comedi_bytes_per_scan(s) : desc->maxsize;
557 max_samples = comedi_bytes_to_samples(s, bytes);
558
559 /*
560 * Determine dma size based on the buffer size plus the number of
561 * unread samples and the number of samples remaining in the command.
562 */
563 nsamples = comedi_nsamples_left(s, max_samples + unread_samples);
564 if (nsamples > unread_samples) {
565 nsamples -= unread_samples;
566 desc->size = comedi_samples_to_bytes(s, nsamples);
567 comedi_isadma_program(desc);
568 }
569 }
570
pcl812_ai_set_chan_range(struct comedi_device * dev,unsigned int chanspec,char wait)571 static void pcl812_ai_set_chan_range(struct comedi_device *dev,
572 unsigned int chanspec, char wait)
573 {
574 struct pcl812_private *devpriv = dev->private;
575 unsigned int chan = CR_CHAN(chanspec);
576 unsigned int range = CR_RANGE(chanspec);
577 unsigned int mux = 0;
578
579 if (chanspec == devpriv->last_ai_chanspec)
580 return;
581
582 devpriv->last_ai_chanspec = chanspec;
583
584 if (devpriv->use_mpc508) {
585 if (devpriv->use_diff) {
586 mux |= PCL812_MUX_CS0 | PCL812_MUX_CS1;
587 } else {
588 if (chan < 8)
589 mux |= PCL812_MUX_CS0;
590 else
591 mux |= PCL812_MUX_CS1;
592 }
593 }
594
595 outb(mux | PCL812_MUX_CHAN(chan), dev->iobase + PCL812_MUX_REG);
596 outb(range + devpriv->range_correction, dev->iobase + PCL812_RANGE_REG);
597
598 if (wait)
599 /*
600 * XXX this depends on selected range and can be very long for
601 * some high gain ranges!
602 */
603 udelay(devpriv->max_812_ai_mode0_rangewait);
604 }
605
pcl812_ai_clear_eoc(struct comedi_device * dev)606 static void pcl812_ai_clear_eoc(struct comedi_device *dev)
607 {
608 /* writing any value clears the interrupt request */
609 outb(0, dev->iobase + PCL812_STATUS_REG);
610 }
611
pcl812_ai_soft_trig(struct comedi_device * dev)612 static void pcl812_ai_soft_trig(struct comedi_device *dev)
613 {
614 /* writing any value triggers a software conversion */
615 outb(255, dev->iobase + PCL812_SOFTTRIG_REG);
616 }
617
pcl812_ai_get_sample(struct comedi_device * dev,struct comedi_subdevice * s)618 static unsigned int pcl812_ai_get_sample(struct comedi_device *dev,
619 struct comedi_subdevice *s)
620 {
621 unsigned int val;
622
623 val = inb(dev->iobase + PCL812_AI_MSB_REG) << 8;
624 val |= inb(dev->iobase + PCL812_AI_LSB_REG);
625
626 return val & s->maxdata;
627 }
628
pcl812_ai_eoc(struct comedi_device * dev,struct comedi_subdevice * s,struct comedi_insn * insn,unsigned long context)629 static int pcl812_ai_eoc(struct comedi_device *dev,
630 struct comedi_subdevice *s,
631 struct comedi_insn *insn,
632 unsigned long context)
633 {
634 unsigned int status;
635
636 if (s->maxdata > 0x0fff) {
637 status = inb(dev->iobase + PCL812_STATUS_REG);
638 if ((status & PCL812_STATUS_DRDY) == 0)
639 return 0;
640 } else {
641 status = inb(dev->iobase + PCL812_AI_MSB_REG);
642 if ((status & PCL812_AI_MSB_DRDY) == 0)
643 return 0;
644 }
645 return -EBUSY;
646 }
647
pcl812_ai_cmdtest(struct comedi_device * dev,struct comedi_subdevice * s,struct comedi_cmd * cmd)648 static int pcl812_ai_cmdtest(struct comedi_device *dev,
649 struct comedi_subdevice *s, struct comedi_cmd *cmd)
650 {
651 const struct pcl812_board *board = dev->board_ptr;
652 struct pcl812_private *devpriv = dev->private;
653 int err = 0;
654 unsigned int flags;
655
656 /* Step 1 : check if triggers are trivially valid */
657
658 err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
659 err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
660
661 if (devpriv->use_ext_trg)
662 flags = TRIG_EXT;
663 else
664 flags = TRIG_TIMER;
665 err |= comedi_check_trigger_src(&cmd->convert_src, flags);
666
667 err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
668 err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
669
670 if (err)
671 return 1;
672
673 /* Step 2a : make sure trigger sources are unique */
674
675 err |= comedi_check_trigger_is_unique(cmd->stop_src);
676
677 /* Step 2b : and mutually compatible */
678
679 if (err)
680 return 2;
681
682 /* Step 3: check if arguments are trivially valid */
683
684 err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
685 err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
686
687 if (cmd->convert_src == TRIG_TIMER) {
688 err |= comedi_check_trigger_arg_min(&cmd->convert_arg,
689 board->ai_ns_min);
690 } else { /* TRIG_EXT */
691 err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0);
692 }
693
694 err |= comedi_check_trigger_arg_min(&cmd->chanlist_len, 1);
695 err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
696 cmd->chanlist_len);
697
698 if (cmd->stop_src == TRIG_COUNT)
699 err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
700 else /* TRIG_NONE */
701 err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
702
703 if (err)
704 return 3;
705
706 /* step 4: fix up any arguments */
707
708 if (cmd->convert_src == TRIG_TIMER) {
709 unsigned int arg = cmd->convert_arg;
710
711 comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
712 err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
713 }
714
715 if (err)
716 return 4;
717
718 return 0;
719 }
720
pcl812_ai_cmd(struct comedi_device * dev,struct comedi_subdevice * s)721 static int pcl812_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
722 {
723 struct pcl812_private *devpriv = dev->private;
724 struct comedi_isadma *dma = devpriv->dma;
725 struct comedi_cmd *cmd = &s->async->cmd;
726 unsigned int ctrl = 0;
727 unsigned int i;
728
729 pcl812_ai_set_chan_range(dev, cmd->chanlist[0], 1);
730
731 if (dma) { /* check if we can use DMA transfer */
732 devpriv->ai_dma = 1;
733 for (i = 1; i < cmd->chanlist_len; i++)
734 if (cmd->chanlist[0] != cmd->chanlist[i]) {
735 /* we cann't use DMA :-( */
736 devpriv->ai_dma = 0;
737 break;
738 }
739 } else {
740 devpriv->ai_dma = 0;
741 }
742
743 devpriv->ai_poll_ptr = 0;
744
745 /* don't we want wake up every scan? */
746 if (cmd->flags & CMDF_WAKE_EOS) {
747 devpriv->ai_eos = 1;
748
749 /* DMA is useless for this situation */
750 if (cmd->chanlist_len == 1)
751 devpriv->ai_dma = 0;
752 }
753
754 if (devpriv->ai_dma) {
755 /* setup and enable dma for the first buffer */
756 dma->cur_dma = 0;
757 pcl812_ai_setup_dma(dev, s, 0);
758 }
759
760 switch (cmd->convert_src) {
761 case TRIG_TIMER:
762 comedi_8254_update_divisors(dev->pacer);
763 comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
764 break;
765 }
766
767 if (devpriv->ai_dma)
768 ctrl |= PCL812_CTRL_PACER_DMA_TRIG;
769 else
770 ctrl |= PCL812_CTRL_PACER_EOC_TRIG;
771 outb(devpriv->mode_reg_int | ctrl, dev->iobase + PCL812_CTRL_REG);
772
773 return 0;
774 }
775
pcl812_ai_next_chan(struct comedi_device * dev,struct comedi_subdevice * s)776 static bool pcl812_ai_next_chan(struct comedi_device *dev,
777 struct comedi_subdevice *s)
778 {
779 struct comedi_cmd *cmd = &s->async->cmd;
780
781 if (cmd->stop_src == TRIG_COUNT &&
782 s->async->scans_done >= cmd->stop_arg) {
783 s->async->events |= COMEDI_CB_EOA;
784 return false;
785 }
786
787 return true;
788 }
789
pcl812_handle_eoc(struct comedi_device * dev,struct comedi_subdevice * s)790 static void pcl812_handle_eoc(struct comedi_device *dev,
791 struct comedi_subdevice *s)
792 {
793 struct comedi_cmd *cmd = &s->async->cmd;
794 unsigned int chan = s->async->cur_chan;
795 unsigned int next_chan;
796 unsigned short val;
797
798 if (pcl812_ai_eoc(dev, s, NULL, 0)) {
799 dev_dbg(dev->class_dev, "A/D cmd IRQ without DRDY!\n");
800 s->async->events |= COMEDI_CB_ERROR;
801 return;
802 }
803
804 val = pcl812_ai_get_sample(dev, s);
805 comedi_buf_write_samples(s, &val, 1);
806
807 /* Set up next channel. Added by abbotti 2010-01-20, but untested. */
808 next_chan = s->async->cur_chan;
809 if (cmd->chanlist[chan] != cmd->chanlist[next_chan])
810 pcl812_ai_set_chan_range(dev, cmd->chanlist[next_chan], 0);
811
812 pcl812_ai_next_chan(dev, s);
813 }
814
transfer_from_dma_buf(struct comedi_device * dev,struct comedi_subdevice * s,unsigned short * ptr,unsigned int bufptr,unsigned int len)815 static void transfer_from_dma_buf(struct comedi_device *dev,
816 struct comedi_subdevice *s,
817 unsigned short *ptr,
818 unsigned int bufptr, unsigned int len)
819 {
820 unsigned int i;
821 unsigned short val;
822
823 for (i = len; i; i--) {
824 val = ptr[bufptr++];
825 comedi_buf_write_samples(s, &val, 1);
826
827 if (!pcl812_ai_next_chan(dev, s))
828 break;
829 }
830 }
831
pcl812_handle_dma(struct comedi_device * dev,struct comedi_subdevice * s)832 static void pcl812_handle_dma(struct comedi_device *dev,
833 struct comedi_subdevice *s)
834 {
835 struct pcl812_private *devpriv = dev->private;
836 struct comedi_isadma *dma = devpriv->dma;
837 struct comedi_isadma_desc *desc = &dma->desc[dma->cur_dma];
838 unsigned int nsamples;
839 int bufptr;
840
841 nsamples = comedi_bytes_to_samples(s, desc->size) -
842 devpriv->ai_poll_ptr;
843 bufptr = devpriv->ai_poll_ptr;
844 devpriv->ai_poll_ptr = 0;
845
846 /* restart dma with the next buffer */
847 dma->cur_dma = 1 - dma->cur_dma;
848 pcl812_ai_setup_dma(dev, s, nsamples);
849
850 transfer_from_dma_buf(dev, s, desc->virt_addr, bufptr, nsamples);
851 }
852
pcl812_interrupt(int irq,void * d)853 static irqreturn_t pcl812_interrupt(int irq, void *d)
854 {
855 struct comedi_device *dev = d;
856 struct comedi_subdevice *s = dev->read_subdev;
857 struct pcl812_private *devpriv = dev->private;
858
859 if (!dev->attached) {
860 pcl812_ai_clear_eoc(dev);
861 return IRQ_HANDLED;
862 }
863
864 if (devpriv->ai_dma)
865 pcl812_handle_dma(dev, s);
866 else
867 pcl812_handle_eoc(dev, s);
868
869 pcl812_ai_clear_eoc(dev);
870
871 comedi_handle_events(dev, s);
872 return IRQ_HANDLED;
873 }
874
pcl812_ai_poll(struct comedi_device * dev,struct comedi_subdevice * s)875 static int pcl812_ai_poll(struct comedi_device *dev, struct comedi_subdevice *s)
876 {
877 struct pcl812_private *devpriv = dev->private;
878 struct comedi_isadma *dma = devpriv->dma;
879 struct comedi_isadma_desc *desc;
880 unsigned long flags;
881 unsigned int poll;
882 int ret;
883
884 /* poll is valid only for DMA transfer */
885 if (!devpriv->ai_dma)
886 return 0;
887
888 spin_lock_irqsave(&dev->spinlock, flags);
889
890 poll = comedi_isadma_poll(dma);
891 poll = comedi_bytes_to_samples(s, poll);
892 if (poll > devpriv->ai_poll_ptr) {
893 desc = &dma->desc[dma->cur_dma];
894 transfer_from_dma_buf(dev, s, desc->virt_addr,
895 devpriv->ai_poll_ptr,
896 poll - devpriv->ai_poll_ptr);
897 /* new buffer position */
898 devpriv->ai_poll_ptr = poll;
899
900 ret = comedi_buf_n_bytes_ready(s);
901 } else {
902 /* no new samples */
903 ret = 0;
904 }
905
906 spin_unlock_irqrestore(&dev->spinlock, flags);
907
908 return ret;
909 }
910
pcl812_ai_cancel(struct comedi_device * dev,struct comedi_subdevice * s)911 static int pcl812_ai_cancel(struct comedi_device *dev,
912 struct comedi_subdevice *s)
913 {
914 struct pcl812_private *devpriv = dev->private;
915
916 if (devpriv->ai_dma)
917 comedi_isadma_disable(devpriv->dma->chan);
918
919 outb(devpriv->mode_reg_int | PCL812_CTRL_DISABLE_TRIG,
920 dev->iobase + PCL812_CTRL_REG);
921 comedi_8254_pacer_enable(dev->pacer, 1, 2, false);
922 pcl812_ai_clear_eoc(dev);
923 return 0;
924 }
925
pcl812_ai_insn_read(struct comedi_device * dev,struct comedi_subdevice * s,struct comedi_insn * insn,unsigned int * data)926 static int pcl812_ai_insn_read(struct comedi_device *dev,
927 struct comedi_subdevice *s,
928 struct comedi_insn *insn,
929 unsigned int *data)
930 {
931 struct pcl812_private *devpriv = dev->private;
932 int ret = 0;
933 int i;
934
935 outb(devpriv->mode_reg_int | PCL812_CTRL_SOFT_TRIG,
936 dev->iobase + PCL812_CTRL_REG);
937
938 pcl812_ai_set_chan_range(dev, insn->chanspec, 1);
939
940 for (i = 0; i < insn->n; i++) {
941 pcl812_ai_clear_eoc(dev);
942 pcl812_ai_soft_trig(dev);
943
944 ret = comedi_timeout(dev, s, insn, pcl812_ai_eoc, 0);
945 if (ret)
946 break;
947
948 data[i] = pcl812_ai_get_sample(dev, s);
949 }
950 outb(devpriv->mode_reg_int | PCL812_CTRL_DISABLE_TRIG,
951 dev->iobase + PCL812_CTRL_REG);
952 pcl812_ai_clear_eoc(dev);
953
954 return ret ? ret : insn->n;
955 }
956
pcl812_ao_insn_write(struct comedi_device * dev,struct comedi_subdevice * s,struct comedi_insn * insn,unsigned int * data)957 static int pcl812_ao_insn_write(struct comedi_device *dev,
958 struct comedi_subdevice *s,
959 struct comedi_insn *insn,
960 unsigned int *data)
961 {
962 unsigned int chan = CR_CHAN(insn->chanspec);
963 unsigned int val = s->readback[chan];
964 int i;
965
966 for (i = 0; i < insn->n; i++) {
967 val = data[i];
968 outb(val & 0xff, dev->iobase + PCL812_AO_LSB_REG(chan));
969 outb((val >> 8) & 0x0f, dev->iobase + PCL812_AO_MSB_REG(chan));
970 }
971 s->readback[chan] = val;
972
973 return insn->n;
974 }
975
pcl812_di_insn_bits(struct comedi_device * dev,struct comedi_subdevice * s,struct comedi_insn * insn,unsigned int * data)976 static int pcl812_di_insn_bits(struct comedi_device *dev,
977 struct comedi_subdevice *s,
978 struct comedi_insn *insn,
979 unsigned int *data)
980 {
981 data[1] = inb(dev->iobase + PCL812_DI_LSB_REG) |
982 (inb(dev->iobase + PCL812_DI_MSB_REG) << 8);
983
984 return insn->n;
985 }
986
pcl812_do_insn_bits(struct comedi_device * dev,struct comedi_subdevice * s,struct comedi_insn * insn,unsigned int * data)987 static int pcl812_do_insn_bits(struct comedi_device *dev,
988 struct comedi_subdevice *s,
989 struct comedi_insn *insn,
990 unsigned int *data)
991 {
992 if (comedi_dio_update_state(s, data)) {
993 outb(s->state & 0xff, dev->iobase + PCL812_DO_LSB_REG);
994 outb((s->state >> 8), dev->iobase + PCL812_DO_MSB_REG);
995 }
996
997 data[1] = s->state;
998
999 return insn->n;
1000 }
1001
pcl812_reset(struct comedi_device * dev)1002 static void pcl812_reset(struct comedi_device *dev)
1003 {
1004 const struct pcl812_board *board = dev->board_ptr;
1005 struct pcl812_private *devpriv = dev->private;
1006 unsigned int chan;
1007
1008 /* disable analog input trigger */
1009 outb(devpriv->mode_reg_int | PCL812_CTRL_DISABLE_TRIG,
1010 dev->iobase + PCL812_CTRL_REG);
1011 pcl812_ai_clear_eoc(dev);
1012
1013 /*
1014 * Invalidate last_ai_chanspec then set analog input to
1015 * known channel/range.
1016 */
1017 devpriv->last_ai_chanspec = CR_PACK(16, 0, 0);
1018 pcl812_ai_set_chan_range(dev, CR_PACK(0, 0, 0), 0);
1019
1020 /* set analog output channels to 0V */
1021 for (chan = 0; chan < board->n_aochan; chan++) {
1022 outb(0, dev->iobase + PCL812_AO_LSB_REG(chan));
1023 outb(0, dev->iobase + PCL812_AO_MSB_REG(chan));
1024 }
1025
1026 /* set all digital outputs low */
1027 if (board->has_dio) {
1028 outb(0, dev->iobase + PCL812_DO_MSB_REG);
1029 outb(0, dev->iobase + PCL812_DO_LSB_REG);
1030 }
1031 }
1032
pcl812_set_ai_range_table(struct comedi_device * dev,struct comedi_subdevice * s,struct comedi_devconfig * it)1033 static void pcl812_set_ai_range_table(struct comedi_device *dev,
1034 struct comedi_subdevice *s,
1035 struct comedi_devconfig *it)
1036 {
1037 const struct pcl812_board *board = dev->board_ptr;
1038 struct pcl812_private *devpriv = dev->private;
1039
1040 switch (board->board_type) {
1041 case BOARD_PCL812PG:
1042 if (it->options[4] == 1)
1043 s->range_table = &range_pcl812pg2_ai;
1044 else
1045 s->range_table = board->rangelist_ai;
1046 break;
1047 case BOARD_PCL812:
1048 switch (it->options[4]) {
1049 case 0:
1050 s->range_table = &range_bipolar10;
1051 break;
1052 case 1:
1053 s->range_table = &range_bipolar5;
1054 break;
1055 case 2:
1056 s->range_table = &range_bipolar2_5;
1057 break;
1058 case 3:
1059 s->range_table = &range812_bipolar1_25;
1060 break;
1061 case 4:
1062 s->range_table = &range812_bipolar0_625;
1063 break;
1064 case 5:
1065 s->range_table = &range812_bipolar0_3125;
1066 break;
1067 default:
1068 s->range_table = &range_bipolar10;
1069 break;
1070 }
1071 break;
1072 case BOARD_PCL813B:
1073 if (it->options[1] == 1)
1074 s->range_table = &range_pcl813b2_ai;
1075 else
1076 s->range_table = board->rangelist_ai;
1077 break;
1078 case BOARD_ISO813:
1079 switch (it->options[1]) {
1080 case 0:
1081 s->range_table = &range_iso813_1_ai;
1082 break;
1083 case 1:
1084 s->range_table = &range_iso813_1_2_ai;
1085 break;
1086 case 2:
1087 s->range_table = &range_iso813_2_ai;
1088 devpriv->range_correction = 1;
1089 break;
1090 case 3:
1091 s->range_table = &range_iso813_2_2_ai;
1092 devpriv->range_correction = 1;
1093 break;
1094 default:
1095 s->range_table = &range_iso813_1_ai;
1096 break;
1097 }
1098 break;
1099 case BOARD_ACL8113:
1100 switch (it->options[1]) {
1101 case 0:
1102 s->range_table = &range_acl8113_1_ai;
1103 break;
1104 case 1:
1105 s->range_table = &range_acl8113_1_2_ai;
1106 break;
1107 case 2:
1108 s->range_table = &range_acl8113_2_ai;
1109 devpriv->range_correction = 1;
1110 break;
1111 case 3:
1112 s->range_table = &range_acl8113_2_2_ai;
1113 devpriv->range_correction = 1;
1114 break;
1115 default:
1116 s->range_table = &range_acl8113_1_ai;
1117 break;
1118 }
1119 break;
1120 default:
1121 s->range_table = board->rangelist_ai;
1122 break;
1123 }
1124 }
1125
pcl812_alloc_dma(struct comedi_device * dev,unsigned int dma_chan)1126 static void pcl812_alloc_dma(struct comedi_device *dev, unsigned int dma_chan)
1127 {
1128 struct pcl812_private *devpriv = dev->private;
1129
1130 /* only DMA channels 3 and 1 are valid */
1131 if (!(dma_chan == 3 || dma_chan == 1))
1132 return;
1133
1134 /* DMA uses two 8K buffers */
1135 devpriv->dma = comedi_isadma_alloc(dev, 2, dma_chan, dma_chan,
1136 PAGE_SIZE * 2, COMEDI_ISADMA_READ);
1137 }
1138
pcl812_free_dma(struct comedi_device * dev)1139 static void pcl812_free_dma(struct comedi_device *dev)
1140 {
1141 struct pcl812_private *devpriv = dev->private;
1142
1143 if (devpriv)
1144 comedi_isadma_free(devpriv->dma);
1145 }
1146
pcl812_attach(struct comedi_device * dev,struct comedi_devconfig * it)1147 static int pcl812_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1148 {
1149 const struct pcl812_board *board = dev->board_ptr;
1150 struct pcl812_private *devpriv;
1151 struct comedi_subdevice *s;
1152 int n_subdevices;
1153 int subdev;
1154 int ret;
1155
1156 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
1157 if (!devpriv)
1158 return -ENOMEM;
1159
1160 ret = comedi_check_request_region(dev, it->options[0], 0x10,
1161 board->min_io_start, 0x3ff, 16);
1162 if (ret)
1163 return ret;
1164
1165 if (board->irq_bits) {
1166 dev->pacer =
1167 comedi_8254_io_alloc(dev->iobase + PCL812_TIMER_BASE,
1168 I8254_OSC_BASE_2MHZ, I8254_IO8, 0);
1169 if (IS_ERR(dev->pacer))
1170 return PTR_ERR(dev->pacer);
1171
1172 if (it->options[1] > 0 && it->options[1] < 16 &&
1173 (1 << it->options[1]) & board->irq_bits) {
1174 ret = request_irq(it->options[1], pcl812_interrupt, 0,
1175 dev->board_name, dev);
1176 if (ret == 0)
1177 dev->irq = it->options[1];
1178 }
1179 }
1180
1181 /* we need an IRQ to do DMA on channel 3 or 1 */
1182 if (dev->irq && board->has_dma)
1183 pcl812_alloc_dma(dev, it->options[2]);
1184
1185 /* differential analog inputs? */
1186 switch (board->board_type) {
1187 case BOARD_A821:
1188 if (it->options[2] == 1)
1189 devpriv->use_diff = 1;
1190 break;
1191 case BOARD_ACL8112:
1192 case BOARD_ACL8216:
1193 if (it->options[4] == 1)
1194 devpriv->use_diff = 1;
1195 break;
1196 default:
1197 break;
1198 }
1199
1200 n_subdevices = 1; /* all boardtypes have analog inputs */
1201 if (board->n_aochan > 0)
1202 n_subdevices++;
1203 if (board->has_dio)
1204 n_subdevices += 2;
1205
1206 ret = comedi_alloc_subdevices(dev, n_subdevices);
1207 if (ret)
1208 return ret;
1209
1210 subdev = 0;
1211
1212 /* Analog Input subdevice */
1213 s = &dev->subdevices[subdev];
1214 s->type = COMEDI_SUBD_AI;
1215 s->subdev_flags = SDF_READABLE;
1216 if (devpriv->use_diff) {
1217 s->subdev_flags |= SDF_DIFF;
1218 s->n_chan = board->n_aichan / 2;
1219 } else {
1220 s->subdev_flags |= SDF_GROUND;
1221 s->n_chan = board->n_aichan;
1222 }
1223 s->maxdata = board->has_16bit_ai ? 0xffff : 0x0fff;
1224
1225 pcl812_set_ai_range_table(dev, s, it);
1226
1227 s->insn_read = pcl812_ai_insn_read;
1228
1229 if (dev->irq) {
1230 dev->read_subdev = s;
1231 s->subdev_flags |= SDF_CMD_READ;
1232 s->len_chanlist = MAX_CHANLIST_LEN;
1233 s->do_cmdtest = pcl812_ai_cmdtest;
1234 s->do_cmd = pcl812_ai_cmd;
1235 s->poll = pcl812_ai_poll;
1236 s->cancel = pcl812_ai_cancel;
1237 }
1238
1239 devpriv->use_mpc508 = board->has_mpc508_mux;
1240
1241 subdev++;
1242
1243 /* analog output */
1244 if (board->n_aochan > 0) {
1245 s = &dev->subdevices[subdev];
1246 s->type = COMEDI_SUBD_AO;
1247 s->subdev_flags = SDF_WRITABLE | SDF_GROUND;
1248 s->n_chan = board->n_aochan;
1249 s->maxdata = 0xfff;
1250 switch (board->board_type) {
1251 case BOARD_A821:
1252 if (it->options[3] == 1)
1253 s->range_table = &range_unipolar10;
1254 else
1255 s->range_table = &range_unipolar5;
1256 break;
1257 case BOARD_PCL812:
1258 case BOARD_ACL8112:
1259 case BOARD_PCL812PG:
1260 case BOARD_ACL8216:
1261 switch (it->options[5]) {
1262 case 1:
1263 s->range_table = &range_unipolar10;
1264 break;
1265 case 2:
1266 s->range_table = &range_unknown;
1267 break;
1268 default:
1269 s->range_table = &range_unipolar5;
1270 break;
1271 }
1272 break;
1273 default:
1274 s->range_table = &range_unipolar5;
1275 break;
1276 }
1277 s->insn_write = pcl812_ao_insn_write;
1278
1279 ret = comedi_alloc_subdev_readback(s);
1280 if (ret)
1281 return ret;
1282
1283 subdev++;
1284 }
1285
1286 if (board->has_dio) {
1287 /* Digital Input subdevice */
1288 s = &dev->subdevices[subdev];
1289 s->type = COMEDI_SUBD_DI;
1290 s->subdev_flags = SDF_READABLE;
1291 s->n_chan = 16;
1292 s->maxdata = 1;
1293 s->range_table = &range_digital;
1294 s->insn_bits = pcl812_di_insn_bits;
1295 subdev++;
1296
1297 /* Digital Output subdevice */
1298 s = &dev->subdevices[subdev];
1299 s->type = COMEDI_SUBD_DO;
1300 s->subdev_flags = SDF_WRITABLE;
1301 s->n_chan = 16;
1302 s->maxdata = 1;
1303 s->range_table = &range_digital;
1304 s->insn_bits = pcl812_do_insn_bits;
1305 subdev++;
1306 }
1307
1308 switch (board->board_type) {
1309 case BOARD_ACL8216:
1310 case BOARD_PCL812PG:
1311 case BOARD_PCL812:
1312 case BOARD_ACL8112:
1313 devpriv->max_812_ai_mode0_rangewait = 1;
1314 if (it->options[3] > 0)
1315 /* we use external trigger */
1316 devpriv->use_ext_trg = 1;
1317 break;
1318 case BOARD_A821:
1319 devpriv->max_812_ai_mode0_rangewait = 1;
1320 devpriv->mode_reg_int = (dev->irq << 4) & 0xf0;
1321 break;
1322 case BOARD_PCL813B:
1323 case BOARD_PCL813:
1324 case BOARD_ISO813:
1325 case BOARD_ACL8113:
1326 /* maybe there must by greatest timeout */
1327 devpriv->max_812_ai_mode0_rangewait = 5;
1328 break;
1329 }
1330
1331 pcl812_reset(dev);
1332
1333 return 0;
1334 }
1335
pcl812_detach(struct comedi_device * dev)1336 static void pcl812_detach(struct comedi_device *dev)
1337 {
1338 pcl812_free_dma(dev);
1339 comedi_legacy_detach(dev);
1340 }
1341
1342 static struct comedi_driver pcl812_driver = {
1343 .driver_name = "pcl812",
1344 .module = THIS_MODULE,
1345 .attach = pcl812_attach,
1346 .detach = pcl812_detach,
1347 .board_name = &boardtypes[0].name,
1348 .num_names = ARRAY_SIZE(boardtypes),
1349 .offset = sizeof(struct pcl812_board),
1350 };
1351 module_comedi_driver(pcl812_driver);
1352
1353 MODULE_AUTHOR("Comedi https://www.comedi.org");
1354 MODULE_DESCRIPTION("Comedi low-level driver");
1355 MODULE_LICENSE("GPL");
1356